xref: /openbmc/linux/drivers/net/wireless/ralink/rt2x00/rt2x00mmio.h (revision 58e16d792a6a8c6b750f637a4649967fcac853dc)
1*1ccea77eSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */
233aca94dSKalle Valo /*
333aca94dSKalle Valo 	Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
433aca94dSKalle Valo 	<http://rt2x00.serialmonkey.com>
533aca94dSKalle Valo 
633aca94dSKalle Valo  */
733aca94dSKalle Valo 
833aca94dSKalle Valo /*
933aca94dSKalle Valo 	Module: rt2x00mmio
1033aca94dSKalle Valo 	Abstract: Data structures for the rt2x00mmio module.
1133aca94dSKalle Valo  */
1233aca94dSKalle Valo 
1333aca94dSKalle Valo #ifndef RT2X00MMIO_H
1433aca94dSKalle Valo #define RT2X00MMIO_H
1533aca94dSKalle Valo 
1633aca94dSKalle Valo #include <linux/io.h>
1733aca94dSKalle Valo 
1833aca94dSKalle Valo /*
1933aca94dSKalle Valo  * Register access.
2033aca94dSKalle Valo  */
rt2x00mmio_register_read(struct rt2x00_dev * rt2x00dev,const unsigned int offset)213954b4e3SArnd Bergmann static inline u32 rt2x00mmio_register_read(struct rt2x00_dev *rt2x00dev,
226b81745eSArnd Bergmann 					   const unsigned int offset)
236b81745eSArnd Bergmann {
246b81745eSArnd Bergmann 	return readl(rt2x00dev->csr.base + offset);
256b81745eSArnd Bergmann }
266b81745eSArnd Bergmann 
rt2x00mmio_register_multiread(struct rt2x00_dev * rt2x00dev,const unsigned int offset,void * value,const u32 length)2733aca94dSKalle Valo static inline void rt2x00mmio_register_multiread(struct rt2x00_dev *rt2x00dev,
2833aca94dSKalle Valo 						 const unsigned int offset,
2933aca94dSKalle Valo 						 void *value, const u32 length)
3033aca94dSKalle Valo {
3133aca94dSKalle Valo 	memcpy_fromio(value, rt2x00dev->csr.base + offset, length);
3233aca94dSKalle Valo }
3333aca94dSKalle Valo 
rt2x00mmio_register_write(struct rt2x00_dev * rt2x00dev,const unsigned int offset,u32 value)3433aca94dSKalle Valo static inline void rt2x00mmio_register_write(struct rt2x00_dev *rt2x00dev,
3533aca94dSKalle Valo 					     const unsigned int offset,
3633aca94dSKalle Valo 					     u32 value)
3733aca94dSKalle Valo {
3833aca94dSKalle Valo 	writel(value, rt2x00dev->csr.base + offset);
3933aca94dSKalle Valo }
4033aca94dSKalle Valo 
rt2x00mmio_register_multiwrite(struct rt2x00_dev * rt2x00dev,const unsigned int offset,const void * value,const u32 length)4133aca94dSKalle Valo static inline void rt2x00mmio_register_multiwrite(struct rt2x00_dev *rt2x00dev,
4233aca94dSKalle Valo 						  const unsigned int offset,
4333aca94dSKalle Valo 						  const void *value,
4433aca94dSKalle Valo 						  const u32 length)
4533aca94dSKalle Valo {
4633aca94dSKalle Valo 	__iowrite32_copy(rt2x00dev->csr.base + offset, value, length >> 2);
4733aca94dSKalle Valo }
4833aca94dSKalle Valo 
4933aca94dSKalle Valo /**
5033aca94dSKalle Valo  * rt2x00mmio_regbusy_read - Read from register with busy check
5133aca94dSKalle Valo  * @rt2x00dev: Device pointer, see &struct rt2x00_dev.
5233aca94dSKalle Valo  * @offset: Register offset
5333aca94dSKalle Valo  * @field: Field to check if register is busy
5433aca94dSKalle Valo  * @reg: Pointer to where register contents should be stored
5533aca94dSKalle Valo  *
5633aca94dSKalle Valo  * This function will read the given register, and checks if the
5733aca94dSKalle Valo  * register is busy. If it is, it will sleep for a couple of
5833aca94dSKalle Valo  * microseconds before reading the register again. If the register
5933aca94dSKalle Valo  * is not read after a certain timeout, this function will return
6033aca94dSKalle Valo  * FALSE.
6133aca94dSKalle Valo  */
6233aca94dSKalle Valo int rt2x00mmio_regbusy_read(struct rt2x00_dev *rt2x00dev,
6333aca94dSKalle Valo 			    const unsigned int offset,
6433aca94dSKalle Valo 			    const struct rt2x00_field32 field,
6533aca94dSKalle Valo 			    u32 *reg);
6633aca94dSKalle Valo 
6733aca94dSKalle Valo /**
6833aca94dSKalle Valo  * struct queue_entry_priv_mmio: Per entry PCI specific information
6933aca94dSKalle Valo  *
7033aca94dSKalle Valo  * @desc: Pointer to device descriptor
7133aca94dSKalle Valo  * @desc_dma: DMA pointer to &desc.
7233aca94dSKalle Valo  */
7333aca94dSKalle Valo struct queue_entry_priv_mmio {
7433aca94dSKalle Valo 	__le32 *desc;
7533aca94dSKalle Valo 	dma_addr_t desc_dma;
7633aca94dSKalle Valo };
7733aca94dSKalle Valo 
7833aca94dSKalle Valo /**
7933aca94dSKalle Valo  * rt2x00mmio_rxdone - Handle RX done events
8033aca94dSKalle Valo  * @rt2x00dev: Device pointer, see &struct rt2x00_dev.
8133aca94dSKalle Valo  *
8233aca94dSKalle Valo  * Returns true if there are still rx frames pending and false if all
8333aca94dSKalle Valo  * pending rx frames were processed.
8433aca94dSKalle Valo  */
8533aca94dSKalle Valo bool rt2x00mmio_rxdone(struct rt2x00_dev *rt2x00dev);
8633aca94dSKalle Valo 
8733aca94dSKalle Valo /**
8833aca94dSKalle Valo  * rt2x00mmio_flush_queue - Flush data queue
8933aca94dSKalle Valo  * @queue: Data queue to stop
9033aca94dSKalle Valo  * @drop: True to drop all pending frames.
9133aca94dSKalle Valo  *
9233aca94dSKalle Valo  * This will wait for a maximum of 100ms, waiting for the queues
9333aca94dSKalle Valo  * to become empty.
9433aca94dSKalle Valo  */
9533aca94dSKalle Valo void rt2x00mmio_flush_queue(struct data_queue *queue, bool drop);
9633aca94dSKalle Valo 
9733aca94dSKalle Valo /*
9833aca94dSKalle Valo  * Device initialization handlers.
9933aca94dSKalle Valo  */
10033aca94dSKalle Valo int rt2x00mmio_initialize(struct rt2x00_dev *rt2x00dev);
10133aca94dSKalle Valo void rt2x00mmio_uninitialize(struct rt2x00_dev *rt2x00dev);
10233aca94dSKalle Valo 
10333aca94dSKalle Valo #endif /* RT2X00MMIO_H */
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