133aca94dSKalle Valo /* 233aca94dSKalle Valo Copyright (C) 2010 Willow Garage <http://www.willowgarage.com> 333aca94dSKalle Valo Copyright (C) 2004 - 2010 Ivo van Doorn <IvDoorn@gmail.com> 433aca94dSKalle Valo Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com> 533aca94dSKalle Valo <http://rt2x00.serialmonkey.com> 633aca94dSKalle Valo 733aca94dSKalle Valo This program is free software; you can redistribute it and/or modify 833aca94dSKalle Valo it under the terms of the GNU General Public License as published by 933aca94dSKalle Valo the Free Software Foundation; either version 2 of the License, or 1033aca94dSKalle Valo (at your option) any later version. 1133aca94dSKalle Valo 1233aca94dSKalle Valo This program is distributed in the hope that it will be useful, 1333aca94dSKalle Valo but WITHOUT ANY WARRANTY; without even the implied warranty of 1433aca94dSKalle Valo MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1533aca94dSKalle Valo GNU General Public License for more details. 1633aca94dSKalle Valo 1733aca94dSKalle Valo You should have received a copy of the GNU General Public License 1833aca94dSKalle Valo along with this program; if not, see <http://www.gnu.org/licenses/>. 1933aca94dSKalle Valo */ 2033aca94dSKalle Valo 2133aca94dSKalle Valo /* 2233aca94dSKalle Valo Module: rt2x00 2333aca94dSKalle Valo Abstract: rt2x00 global information. 2433aca94dSKalle Valo */ 2533aca94dSKalle Valo 2633aca94dSKalle Valo #ifndef RT2X00_H 2733aca94dSKalle Valo #define RT2X00_H 2833aca94dSKalle Valo 2933aca94dSKalle Valo #include <linux/bitops.h> 3033aca94dSKalle Valo #include <linux/interrupt.h> 3133aca94dSKalle Valo #include <linux/skbuff.h> 3233aca94dSKalle Valo #include <linux/workqueue.h> 3333aca94dSKalle Valo #include <linux/firmware.h> 3433aca94dSKalle Valo #include <linux/leds.h> 3533aca94dSKalle Valo #include <linux/mutex.h> 3633aca94dSKalle Valo #include <linux/etherdevice.h> 3733aca94dSKalle Valo #include <linux/input-polldev.h> 3833aca94dSKalle Valo #include <linux/kfifo.h> 3933aca94dSKalle Valo #include <linux/hrtimer.h> 4033aca94dSKalle Valo #include <linux/average.h> 418b4c0009SVishal Thanki #include <linux/usb.h> 4233aca94dSKalle Valo 4333aca94dSKalle Valo #include <net/mac80211.h> 4433aca94dSKalle Valo 4533aca94dSKalle Valo #include "rt2x00debug.h" 4633aca94dSKalle Valo #include "rt2x00dump.h" 4733aca94dSKalle Valo #include "rt2x00leds.h" 4833aca94dSKalle Valo #include "rt2x00reg.h" 4933aca94dSKalle Valo #include "rt2x00queue.h" 5033aca94dSKalle Valo 5133aca94dSKalle Valo /* 5233aca94dSKalle Valo * Module information. 5333aca94dSKalle Valo */ 5433aca94dSKalle Valo #define DRV_VERSION "2.3.0" 5533aca94dSKalle Valo #define DRV_PROJECT "http://rt2x00.serialmonkey.com" 5633aca94dSKalle Valo 5733aca94dSKalle Valo /* Debug definitions. 5833aca94dSKalle Valo * Debug output has to be enabled during compile time. 5933aca94dSKalle Valo */ 6033aca94dSKalle Valo #ifdef CONFIG_RT2X00_DEBUG 6133aca94dSKalle Valo #define DEBUG 6233aca94dSKalle Valo #endif /* CONFIG_RT2X00_DEBUG */ 6333aca94dSKalle Valo 6433aca94dSKalle Valo /* Utility printing macros 6533aca94dSKalle Valo * rt2x00_probe_err is for messages when rt2x00_dev is uninitialized 6633aca94dSKalle Valo */ 6733aca94dSKalle Valo #define rt2x00_probe_err(fmt, ...) \ 6833aca94dSKalle Valo printk(KERN_ERR KBUILD_MODNAME ": %s: Error - " fmt, \ 6933aca94dSKalle Valo __func__, ##__VA_ARGS__) 7033aca94dSKalle Valo #define rt2x00_err(dev, fmt, ...) \ 7133aca94dSKalle Valo wiphy_err((dev)->hw->wiphy, "%s: Error - " fmt, \ 7233aca94dSKalle Valo __func__, ##__VA_ARGS__) 7333aca94dSKalle Valo #define rt2x00_warn(dev, fmt, ...) \ 7433aca94dSKalle Valo wiphy_warn((dev)->hw->wiphy, "%s: Warning - " fmt, \ 7533aca94dSKalle Valo __func__, ##__VA_ARGS__) 7633aca94dSKalle Valo #define rt2x00_info(dev, fmt, ...) \ 7733aca94dSKalle Valo wiphy_info((dev)->hw->wiphy, "%s: Info - " fmt, \ 7833aca94dSKalle Valo __func__, ##__VA_ARGS__) 7933aca94dSKalle Valo 8033aca94dSKalle Valo /* Various debug levels */ 8133aca94dSKalle Valo #define rt2x00_dbg(dev, fmt, ...) \ 8233aca94dSKalle Valo wiphy_dbg((dev)->hw->wiphy, "%s: Debug - " fmt, \ 8333aca94dSKalle Valo __func__, ##__VA_ARGS__) 8433aca94dSKalle Valo #define rt2x00_eeprom_dbg(dev, fmt, ...) \ 8533aca94dSKalle Valo wiphy_dbg((dev)->hw->wiphy, "%s: EEPROM recovery - " fmt, \ 8633aca94dSKalle Valo __func__, ##__VA_ARGS__) 8733aca94dSKalle Valo 8833aca94dSKalle Valo /* 8933aca94dSKalle Valo * Duration calculations 9033aca94dSKalle Valo * The rate variable passed is: 100kbs. 9133aca94dSKalle Valo * To convert from bytes to bits we multiply size with 8, 9233aca94dSKalle Valo * then the size is multiplied with 10 to make the 9333aca94dSKalle Valo * real rate -> rate argument correction. 9433aca94dSKalle Valo */ 9533aca94dSKalle Valo #define GET_DURATION(__size, __rate) (((__size) * 8 * 10) / (__rate)) 9633aca94dSKalle Valo #define GET_DURATION_RES(__size, __rate)(((__size) * 8 * 10) % (__rate)) 9733aca94dSKalle Valo 9833aca94dSKalle Valo /* 9933aca94dSKalle Valo * Determine the number of L2 padding bytes required between the header and 10033aca94dSKalle Valo * the payload. 10133aca94dSKalle Valo */ 10233aca94dSKalle Valo #define L2PAD_SIZE(__hdrlen) (-(__hdrlen) & 3) 10333aca94dSKalle Valo 10433aca94dSKalle Valo /* 10533aca94dSKalle Valo * Determine the alignment requirement, 10633aca94dSKalle Valo * to make sure the 802.11 payload is padded to a 4-byte boundrary 10733aca94dSKalle Valo * we must determine the address of the payload and calculate the 10833aca94dSKalle Valo * amount of bytes needed to move the data. 10933aca94dSKalle Valo */ 11033aca94dSKalle Valo #define ALIGN_SIZE(__skb, __header) \ 11133aca94dSKalle Valo (((unsigned long)((__skb)->data + (__header))) & 3) 11233aca94dSKalle Valo 11333aca94dSKalle Valo /* 11433aca94dSKalle Valo * Constants for extra TX headroom for alignment purposes. 11533aca94dSKalle Valo */ 11633aca94dSKalle Valo #define RT2X00_ALIGN_SIZE 4 /* Only whole frame needs alignment */ 11733aca94dSKalle Valo #define RT2X00_L2PAD_SIZE 8 /* Both header & payload need alignment */ 11833aca94dSKalle Valo 11933aca94dSKalle Valo /* 12033aca94dSKalle Valo * Standard timing and size defines. 12133aca94dSKalle Valo * These values should follow the ieee80211 specifications. 12233aca94dSKalle Valo */ 12333aca94dSKalle Valo #define ACK_SIZE 14 12433aca94dSKalle Valo #define IEEE80211_HEADER 24 12533aca94dSKalle Valo #define PLCP 48 12633aca94dSKalle Valo #define BEACON 100 12733aca94dSKalle Valo #define PREAMBLE 144 12833aca94dSKalle Valo #define SHORT_PREAMBLE 72 12933aca94dSKalle Valo #define SLOT_TIME 20 13033aca94dSKalle Valo #define SHORT_SLOT_TIME 9 13133aca94dSKalle Valo #define SIFS 10 13233aca94dSKalle Valo #define PIFS (SIFS + SLOT_TIME) 13333aca94dSKalle Valo #define SHORT_PIFS (SIFS + SHORT_SLOT_TIME) 13433aca94dSKalle Valo #define DIFS (PIFS + SLOT_TIME) 13533aca94dSKalle Valo #define SHORT_DIFS (SHORT_PIFS + SHORT_SLOT_TIME) 13633aca94dSKalle Valo #define EIFS (SIFS + DIFS + \ 13733aca94dSKalle Valo GET_DURATION(IEEE80211_HEADER + ACK_SIZE, 10)) 13833aca94dSKalle Valo #define SHORT_EIFS (SIFS + SHORT_DIFS + \ 13933aca94dSKalle Valo GET_DURATION(IEEE80211_HEADER + ACK_SIZE, 10)) 14033aca94dSKalle Valo 14133aca94dSKalle Valo enum rt2x00_chip_intf { 14233aca94dSKalle Valo RT2X00_CHIP_INTF_PCI, 14333aca94dSKalle Valo RT2X00_CHIP_INTF_PCIE, 14433aca94dSKalle Valo RT2X00_CHIP_INTF_USB, 14533aca94dSKalle Valo RT2X00_CHIP_INTF_SOC, 14633aca94dSKalle Valo }; 14733aca94dSKalle Valo 14833aca94dSKalle Valo /* 14933aca94dSKalle Valo * Chipset identification 15033aca94dSKalle Valo * The chipset on the device is composed of a RT and RF chip. 15133aca94dSKalle Valo * The chipset combination is important for determining device capabilities. 15233aca94dSKalle Valo */ 15333aca94dSKalle Valo struct rt2x00_chip { 15433aca94dSKalle Valo u16 rt; 15533aca94dSKalle Valo #define RT2460 0x2460 15633aca94dSKalle Valo #define RT2560 0x2560 15733aca94dSKalle Valo #define RT2570 0x2570 15833aca94dSKalle Valo #define RT2661 0x2661 15933aca94dSKalle Valo #define RT2573 0x2573 16033aca94dSKalle Valo #define RT2860 0x2860 /* 2.4GHz */ 16133aca94dSKalle Valo #define RT2872 0x2872 /* WSOC */ 16233aca94dSKalle Valo #define RT2883 0x2883 /* WSOC */ 16333aca94dSKalle Valo #define RT3070 0x3070 16433aca94dSKalle Valo #define RT3071 0x3071 16533aca94dSKalle Valo #define RT3090 0x3090 /* 2.4GHz PCIe */ 16633aca94dSKalle Valo #define RT3290 0x3290 16733aca94dSKalle Valo #define RT3352 0x3352 /* WSOC */ 16833aca94dSKalle Valo #define RT3390 0x3390 16933aca94dSKalle Valo #define RT3572 0x3572 17033aca94dSKalle Valo #define RT3593 0x3593 17133aca94dSKalle Valo #define RT3883 0x3883 /* WSOC */ 17233aca94dSKalle Valo #define RT5390 0x5390 /* 2.4GHz */ 17333aca94dSKalle Valo #define RT5392 0x5392 /* 2.4GHz */ 17433aca94dSKalle Valo #define RT5592 0x5592 17533aca94dSKalle Valo 17633aca94dSKalle Valo u16 rf; 17733aca94dSKalle Valo u16 rev; 17833aca94dSKalle Valo 17933aca94dSKalle Valo enum rt2x00_chip_intf intf; 18033aca94dSKalle Valo }; 18133aca94dSKalle Valo 18233aca94dSKalle Valo /* 18333aca94dSKalle Valo * RF register values that belong to a particular channel. 18433aca94dSKalle Valo */ 18533aca94dSKalle Valo struct rf_channel { 18633aca94dSKalle Valo int channel; 18733aca94dSKalle Valo u32 rf1; 18833aca94dSKalle Valo u32 rf2; 18933aca94dSKalle Valo u32 rf3; 19033aca94dSKalle Valo u32 rf4; 19133aca94dSKalle Valo }; 19233aca94dSKalle Valo 19333aca94dSKalle Valo /* 19433aca94dSKalle Valo * Channel information structure 19533aca94dSKalle Valo */ 19633aca94dSKalle Valo struct channel_info { 19733aca94dSKalle Valo unsigned int flags; 19833aca94dSKalle Valo #define GEOGRAPHY_ALLOWED 0x00000001 19933aca94dSKalle Valo 20033aca94dSKalle Valo short max_power; 20133aca94dSKalle Valo short default_power1; 20233aca94dSKalle Valo short default_power2; 20333aca94dSKalle Valo short default_power3; 20433aca94dSKalle Valo }; 20533aca94dSKalle Valo 20633aca94dSKalle Valo /* 20733aca94dSKalle Valo * Antenna setup values. 20833aca94dSKalle Valo */ 20933aca94dSKalle Valo struct antenna_setup { 21033aca94dSKalle Valo enum antenna rx; 21133aca94dSKalle Valo enum antenna tx; 21233aca94dSKalle Valo u8 rx_chain_num; 21333aca94dSKalle Valo u8 tx_chain_num; 21433aca94dSKalle Valo }; 21533aca94dSKalle Valo 21633aca94dSKalle Valo /* 21733aca94dSKalle Valo * Quality statistics about the currently active link. 21833aca94dSKalle Valo */ 21933aca94dSKalle Valo struct link_qual { 22033aca94dSKalle Valo /* 22133aca94dSKalle Valo * Statistics required for Link tuning by driver 22233aca94dSKalle Valo * The rssi value is provided by rt2x00lib during the 22333aca94dSKalle Valo * link_tuner() callback function. 22433aca94dSKalle Valo * The false_cca field is filled during the link_stats() 22533aca94dSKalle Valo * callback function and could be used during the 22633aca94dSKalle Valo * link_tuner() callback function. 22733aca94dSKalle Valo */ 22833aca94dSKalle Valo int rssi; 22933aca94dSKalle Valo int false_cca; 23033aca94dSKalle Valo 23133aca94dSKalle Valo /* 23233aca94dSKalle Valo * VGC levels 23333aca94dSKalle Valo * Hardware driver will tune the VGC level during each call 23433aca94dSKalle Valo * to the link_tuner() callback function. This vgc_level is 23533aca94dSKalle Valo * is determined based on the link quality statistics like 23633aca94dSKalle Valo * average RSSI and the false CCA count. 23733aca94dSKalle Valo * 23833aca94dSKalle Valo * In some cases the drivers need to differentiate between 23933aca94dSKalle Valo * the currently "desired" VGC level and the level configured 24033aca94dSKalle Valo * in the hardware. The latter is important to reduce the 24133aca94dSKalle Valo * number of BBP register reads to reduce register access 24233aca94dSKalle Valo * overhead. For this reason we store both values here. 24333aca94dSKalle Valo */ 24433aca94dSKalle Valo u8 vgc_level; 24533aca94dSKalle Valo u8 vgc_level_reg; 24633aca94dSKalle Valo 24733aca94dSKalle Valo /* 24833aca94dSKalle Valo * Statistics required for Signal quality calculation. 24933aca94dSKalle Valo * These fields might be changed during the link_stats() 25033aca94dSKalle Valo * callback function. 25133aca94dSKalle Valo */ 25233aca94dSKalle Valo int rx_success; 25333aca94dSKalle Valo int rx_failed; 25433aca94dSKalle Valo int tx_success; 25533aca94dSKalle Valo int tx_failed; 25633aca94dSKalle Valo }; 25733aca94dSKalle Valo 25833aca94dSKalle Valo DECLARE_EWMA(rssi, 1024, 8) 25933aca94dSKalle Valo 26033aca94dSKalle Valo /* 26133aca94dSKalle Valo * Antenna settings about the currently active link. 26233aca94dSKalle Valo */ 26333aca94dSKalle Valo struct link_ant { 26433aca94dSKalle Valo /* 26533aca94dSKalle Valo * Antenna flags 26633aca94dSKalle Valo */ 26733aca94dSKalle Valo unsigned int flags; 26833aca94dSKalle Valo #define ANTENNA_RX_DIVERSITY 0x00000001 26933aca94dSKalle Valo #define ANTENNA_TX_DIVERSITY 0x00000002 27033aca94dSKalle Valo #define ANTENNA_MODE_SAMPLE 0x00000004 27133aca94dSKalle Valo 27233aca94dSKalle Valo /* 27333aca94dSKalle Valo * Currently active TX/RX antenna setup. 27433aca94dSKalle Valo * When software diversity is used, this will indicate 27533aca94dSKalle Valo * which antenna is actually used at this time. 27633aca94dSKalle Valo */ 27733aca94dSKalle Valo struct antenna_setup active; 27833aca94dSKalle Valo 27933aca94dSKalle Valo /* 28033aca94dSKalle Valo * RSSI history information for the antenna. 28133aca94dSKalle Valo * Used to determine when to switch antenna 28233aca94dSKalle Valo * when using software diversity. 28333aca94dSKalle Valo */ 28433aca94dSKalle Valo int rssi_history; 28533aca94dSKalle Valo 28633aca94dSKalle Valo /* 28733aca94dSKalle Valo * Current RSSI average of the currently active antenna. 28833aca94dSKalle Valo * Similar to the avg_rssi in the link_qual structure 28933aca94dSKalle Valo * this value is updated by using the walking average. 29033aca94dSKalle Valo */ 29133aca94dSKalle Valo struct ewma_rssi rssi_ant; 29233aca94dSKalle Valo }; 29333aca94dSKalle Valo 29433aca94dSKalle Valo /* 29533aca94dSKalle Valo * To optimize the quality of the link we need to store 29633aca94dSKalle Valo * the quality of received frames and periodically 29733aca94dSKalle Valo * optimize the link. 29833aca94dSKalle Valo */ 29933aca94dSKalle Valo struct link { 30033aca94dSKalle Valo /* 30133aca94dSKalle Valo * Link tuner counter 30233aca94dSKalle Valo * The number of times the link has been tuned 30333aca94dSKalle Valo * since the radio has been switched on. 30433aca94dSKalle Valo */ 30533aca94dSKalle Valo u32 count; 30633aca94dSKalle Valo 30733aca94dSKalle Valo /* 30833aca94dSKalle Valo * Quality measurement values. 30933aca94dSKalle Valo */ 31033aca94dSKalle Valo struct link_qual qual; 31133aca94dSKalle Valo 31233aca94dSKalle Valo /* 31333aca94dSKalle Valo * TX/RX antenna setup. 31433aca94dSKalle Valo */ 31533aca94dSKalle Valo struct link_ant ant; 31633aca94dSKalle Valo 31733aca94dSKalle Valo /* 31833aca94dSKalle Valo * Currently active average RSSI value 31933aca94dSKalle Valo */ 32033aca94dSKalle Valo struct ewma_rssi avg_rssi; 32133aca94dSKalle Valo 32233aca94dSKalle Valo /* 32333aca94dSKalle Valo * Work structure for scheduling periodic link tuning. 32433aca94dSKalle Valo */ 32533aca94dSKalle Valo struct delayed_work work; 32633aca94dSKalle Valo 32733aca94dSKalle Valo /* 32833aca94dSKalle Valo * Work structure for scheduling periodic watchdog monitoring. 32933aca94dSKalle Valo * This work must be scheduled on the kernel workqueue, while 33033aca94dSKalle Valo * all other work structures must be queued on the mac80211 33133aca94dSKalle Valo * workqueue. This guarantees that the watchdog can schedule 33233aca94dSKalle Valo * other work structures and wait for their completion in order 33333aca94dSKalle Valo * to bring the device/driver back into the desired state. 33433aca94dSKalle Valo */ 33533aca94dSKalle Valo struct delayed_work watchdog_work; 33633aca94dSKalle Valo 33733aca94dSKalle Valo /* 33833aca94dSKalle Valo * Work structure for scheduling periodic AGC adjustments. 33933aca94dSKalle Valo */ 34033aca94dSKalle Valo struct delayed_work agc_work; 34133aca94dSKalle Valo 34233aca94dSKalle Valo /* 34333aca94dSKalle Valo * Work structure for scheduling periodic VCO calibration. 34433aca94dSKalle Valo */ 34533aca94dSKalle Valo struct delayed_work vco_work; 34633aca94dSKalle Valo }; 34733aca94dSKalle Valo 34833aca94dSKalle Valo enum rt2x00_delayed_flags { 34933aca94dSKalle Valo DELAYED_UPDATE_BEACON, 35033aca94dSKalle Valo }; 35133aca94dSKalle Valo 35233aca94dSKalle Valo /* 35333aca94dSKalle Valo * Interface structure 35433aca94dSKalle Valo * Per interface configuration details, this structure 35533aca94dSKalle Valo * is allocated as the private data for ieee80211_vif. 35633aca94dSKalle Valo */ 35733aca94dSKalle Valo struct rt2x00_intf { 35833aca94dSKalle Valo /* 35933aca94dSKalle Valo * beacon->skb must be protected with the mutex. 36033aca94dSKalle Valo */ 36133aca94dSKalle Valo struct mutex beacon_skb_mutex; 36233aca94dSKalle Valo 36333aca94dSKalle Valo /* 36433aca94dSKalle Valo * Entry in the beacon queue which belongs to 36533aca94dSKalle Valo * this interface. Each interface has its own 36633aca94dSKalle Valo * dedicated beacon entry. 36733aca94dSKalle Valo */ 36833aca94dSKalle Valo struct queue_entry *beacon; 36933aca94dSKalle Valo bool enable_beacon; 37033aca94dSKalle Valo 37133aca94dSKalle Valo /* 37233aca94dSKalle Valo * Actions that needed rescheduling. 37333aca94dSKalle Valo */ 37433aca94dSKalle Valo unsigned long delayed_flags; 37533aca94dSKalle Valo 37633aca94dSKalle Valo /* 37733aca94dSKalle Valo * Software sequence counter, this is only required 37833aca94dSKalle Valo * for hardware which doesn't support hardware 37933aca94dSKalle Valo * sequence counting. 38033aca94dSKalle Valo */ 38133aca94dSKalle Valo atomic_t seqno; 38233aca94dSKalle Valo }; 38333aca94dSKalle Valo 38433aca94dSKalle Valo static inline struct rt2x00_intf* vif_to_intf(struct ieee80211_vif *vif) 38533aca94dSKalle Valo { 38633aca94dSKalle Valo return (struct rt2x00_intf *)vif->drv_priv; 38733aca94dSKalle Valo } 38833aca94dSKalle Valo 38933aca94dSKalle Valo /** 39033aca94dSKalle Valo * struct hw_mode_spec: Hardware specifications structure 39133aca94dSKalle Valo * 39233aca94dSKalle Valo * Details about the supported modes, rates and channels 39333aca94dSKalle Valo * of a particular chipset. This is used by rt2x00lib 39433aca94dSKalle Valo * to build the ieee80211_hw_mode array for mac80211. 39533aca94dSKalle Valo * 39633aca94dSKalle Valo * @supported_bands: Bitmask contained the supported bands (2.4GHz, 5.2GHz). 39733aca94dSKalle Valo * @supported_rates: Rate types which are supported (CCK, OFDM). 39833aca94dSKalle Valo * @num_channels: Number of supported channels. This is used as array size 39933aca94dSKalle Valo * for @tx_power_a, @tx_power_bg and @channels. 40033aca94dSKalle Valo * @channels: Device/chipset specific channel values (See &struct rf_channel). 40133aca94dSKalle Valo * @channels_info: Additional information for channels (See &struct channel_info). 40233aca94dSKalle Valo * @ht: Driver HT Capabilities (See &ieee80211_sta_ht_cap). 40333aca94dSKalle Valo */ 40433aca94dSKalle Valo struct hw_mode_spec { 40533aca94dSKalle Valo unsigned int supported_bands; 40633aca94dSKalle Valo #define SUPPORT_BAND_2GHZ 0x00000001 40733aca94dSKalle Valo #define SUPPORT_BAND_5GHZ 0x00000002 40833aca94dSKalle Valo 40933aca94dSKalle Valo unsigned int supported_rates; 41033aca94dSKalle Valo #define SUPPORT_RATE_CCK 0x00000001 41133aca94dSKalle Valo #define SUPPORT_RATE_OFDM 0x00000002 41233aca94dSKalle Valo 41333aca94dSKalle Valo unsigned int num_channels; 41433aca94dSKalle Valo const struct rf_channel *channels; 41533aca94dSKalle Valo const struct channel_info *channels_info; 41633aca94dSKalle Valo 41733aca94dSKalle Valo struct ieee80211_sta_ht_cap ht; 41833aca94dSKalle Valo }; 41933aca94dSKalle Valo 42033aca94dSKalle Valo /* 42133aca94dSKalle Valo * Configuration structure wrapper around the 42233aca94dSKalle Valo * mac80211 configuration structure. 42333aca94dSKalle Valo * When mac80211 configures the driver, rt2x00lib 42433aca94dSKalle Valo * can precalculate values which are equal for all 42533aca94dSKalle Valo * rt2x00 drivers. Those values can be stored in here. 42633aca94dSKalle Valo */ 42733aca94dSKalle Valo struct rt2x00lib_conf { 42833aca94dSKalle Valo struct ieee80211_conf *conf; 42933aca94dSKalle Valo 43033aca94dSKalle Valo struct rf_channel rf; 43133aca94dSKalle Valo struct channel_info channel; 43233aca94dSKalle Valo }; 43333aca94dSKalle Valo 43433aca94dSKalle Valo /* 43533aca94dSKalle Valo * Configuration structure for erp settings. 43633aca94dSKalle Valo */ 43733aca94dSKalle Valo struct rt2x00lib_erp { 43833aca94dSKalle Valo int short_preamble; 43933aca94dSKalle Valo int cts_protection; 44033aca94dSKalle Valo 44133aca94dSKalle Valo u32 basic_rates; 44233aca94dSKalle Valo 44333aca94dSKalle Valo int slot_time; 44433aca94dSKalle Valo 44533aca94dSKalle Valo short sifs; 44633aca94dSKalle Valo short pifs; 44733aca94dSKalle Valo short difs; 44833aca94dSKalle Valo short eifs; 44933aca94dSKalle Valo 45033aca94dSKalle Valo u16 beacon_int; 45133aca94dSKalle Valo u16 ht_opmode; 45233aca94dSKalle Valo }; 45333aca94dSKalle Valo 45433aca94dSKalle Valo /* 45533aca94dSKalle Valo * Configuration structure for hardware encryption. 45633aca94dSKalle Valo */ 45733aca94dSKalle Valo struct rt2x00lib_crypto { 45833aca94dSKalle Valo enum cipher cipher; 45933aca94dSKalle Valo 46033aca94dSKalle Valo enum set_key_cmd cmd; 46133aca94dSKalle Valo const u8 *address; 46233aca94dSKalle Valo 46333aca94dSKalle Valo u32 bssidx; 46433aca94dSKalle Valo 46533aca94dSKalle Valo u8 key[16]; 46633aca94dSKalle Valo u8 tx_mic[8]; 46733aca94dSKalle Valo u8 rx_mic[8]; 46833aca94dSKalle Valo 46933aca94dSKalle Valo int wcid; 47033aca94dSKalle Valo }; 47133aca94dSKalle Valo 47233aca94dSKalle Valo /* 47333aca94dSKalle Valo * Configuration structure wrapper around the 47433aca94dSKalle Valo * rt2x00 interface configuration handler. 47533aca94dSKalle Valo */ 47633aca94dSKalle Valo struct rt2x00intf_conf { 47733aca94dSKalle Valo /* 47833aca94dSKalle Valo * Interface type 47933aca94dSKalle Valo */ 48033aca94dSKalle Valo enum nl80211_iftype type; 48133aca94dSKalle Valo 48233aca94dSKalle Valo /* 48333aca94dSKalle Valo * TSF sync value, this is dependent on the operation type. 48433aca94dSKalle Valo */ 48533aca94dSKalle Valo enum tsf_sync sync; 48633aca94dSKalle Valo 48733aca94dSKalle Valo /* 48833aca94dSKalle Valo * The MAC and BSSID addresses are simple array of bytes, 48933aca94dSKalle Valo * these arrays are little endian, so when sending the addresses 49033aca94dSKalle Valo * to the drivers, copy the it into a endian-signed variable. 49133aca94dSKalle Valo * 49233aca94dSKalle Valo * Note that all devices (except rt2500usb) have 32 bits 49333aca94dSKalle Valo * register word sizes. This means that whatever variable we 49433aca94dSKalle Valo * pass _must_ be a multiple of 32 bits. Otherwise the device 49533aca94dSKalle Valo * might not accept what we are sending to it. 49633aca94dSKalle Valo * This will also make it easier for the driver to write 49733aca94dSKalle Valo * the data to the device. 49833aca94dSKalle Valo */ 49933aca94dSKalle Valo __le32 mac[2]; 50033aca94dSKalle Valo __le32 bssid[2]; 50133aca94dSKalle Valo }; 50233aca94dSKalle Valo 50333aca94dSKalle Valo /* 50433aca94dSKalle Valo * Private structure for storing STA details 50533aca94dSKalle Valo * wcid: Wireless Client ID 50633aca94dSKalle Valo */ 50733aca94dSKalle Valo struct rt2x00_sta { 50833aca94dSKalle Valo int wcid; 50933aca94dSKalle Valo }; 51033aca94dSKalle Valo 51133aca94dSKalle Valo static inline struct rt2x00_sta* sta_to_rt2x00_sta(struct ieee80211_sta *sta) 51233aca94dSKalle Valo { 51333aca94dSKalle Valo return (struct rt2x00_sta *)sta->drv_priv; 51433aca94dSKalle Valo } 51533aca94dSKalle Valo 51633aca94dSKalle Valo /* 51733aca94dSKalle Valo * rt2x00lib callback functions. 51833aca94dSKalle Valo */ 51933aca94dSKalle Valo struct rt2x00lib_ops { 52033aca94dSKalle Valo /* 52133aca94dSKalle Valo * Interrupt handlers. 52233aca94dSKalle Valo */ 52333aca94dSKalle Valo irq_handler_t irq_handler; 52433aca94dSKalle Valo 52533aca94dSKalle Valo /* 52633aca94dSKalle Valo * TX status tasklet handler. 52733aca94dSKalle Valo */ 52833aca94dSKalle Valo void (*txstatus_tasklet) (unsigned long data); 52933aca94dSKalle Valo void (*pretbtt_tasklet) (unsigned long data); 53033aca94dSKalle Valo void (*tbtt_tasklet) (unsigned long data); 53133aca94dSKalle Valo void (*rxdone_tasklet) (unsigned long data); 53233aca94dSKalle Valo void (*autowake_tasklet) (unsigned long data); 53333aca94dSKalle Valo 53433aca94dSKalle Valo /* 53533aca94dSKalle Valo * Device init handlers. 53633aca94dSKalle Valo */ 53733aca94dSKalle Valo int (*probe_hw) (struct rt2x00_dev *rt2x00dev); 53833aca94dSKalle Valo char *(*get_firmware_name) (struct rt2x00_dev *rt2x00dev); 53933aca94dSKalle Valo int (*check_firmware) (struct rt2x00_dev *rt2x00dev, 54033aca94dSKalle Valo const u8 *data, const size_t len); 54133aca94dSKalle Valo int (*load_firmware) (struct rt2x00_dev *rt2x00dev, 54233aca94dSKalle Valo const u8 *data, const size_t len); 54333aca94dSKalle Valo 54433aca94dSKalle Valo /* 54533aca94dSKalle Valo * Device initialization/deinitialization handlers. 54633aca94dSKalle Valo */ 54733aca94dSKalle Valo int (*initialize) (struct rt2x00_dev *rt2x00dev); 54833aca94dSKalle Valo void (*uninitialize) (struct rt2x00_dev *rt2x00dev); 54933aca94dSKalle Valo 55033aca94dSKalle Valo /* 55133aca94dSKalle Valo * queue initialization handlers 55233aca94dSKalle Valo */ 55333aca94dSKalle Valo bool (*get_entry_state) (struct queue_entry *entry); 55433aca94dSKalle Valo void (*clear_entry) (struct queue_entry *entry); 55533aca94dSKalle Valo 55633aca94dSKalle Valo /* 55733aca94dSKalle Valo * Radio control handlers. 55833aca94dSKalle Valo */ 55933aca94dSKalle Valo int (*set_device_state) (struct rt2x00_dev *rt2x00dev, 56033aca94dSKalle Valo enum dev_state state); 56133aca94dSKalle Valo int (*rfkill_poll) (struct rt2x00_dev *rt2x00dev); 56233aca94dSKalle Valo void (*link_stats) (struct rt2x00_dev *rt2x00dev, 56333aca94dSKalle Valo struct link_qual *qual); 56433aca94dSKalle Valo void (*reset_tuner) (struct rt2x00_dev *rt2x00dev, 56533aca94dSKalle Valo struct link_qual *qual); 56633aca94dSKalle Valo void (*link_tuner) (struct rt2x00_dev *rt2x00dev, 56733aca94dSKalle Valo struct link_qual *qual, const u32 count); 56833aca94dSKalle Valo void (*gain_calibration) (struct rt2x00_dev *rt2x00dev); 56933aca94dSKalle Valo void (*vco_calibration) (struct rt2x00_dev *rt2x00dev); 57033aca94dSKalle Valo 57133aca94dSKalle Valo /* 57233aca94dSKalle Valo * Data queue handlers. 57333aca94dSKalle Valo */ 57433aca94dSKalle Valo void (*watchdog) (struct rt2x00_dev *rt2x00dev); 57533aca94dSKalle Valo void (*start_queue) (struct data_queue *queue); 57633aca94dSKalle Valo void (*kick_queue) (struct data_queue *queue); 57733aca94dSKalle Valo void (*stop_queue) (struct data_queue *queue); 57833aca94dSKalle Valo void (*flush_queue) (struct data_queue *queue, bool drop); 57933aca94dSKalle Valo void (*tx_dma_done) (struct queue_entry *entry); 58033aca94dSKalle Valo 58133aca94dSKalle Valo /* 58233aca94dSKalle Valo * TX control handlers 58333aca94dSKalle Valo */ 58433aca94dSKalle Valo void (*write_tx_desc) (struct queue_entry *entry, 58533aca94dSKalle Valo struct txentry_desc *txdesc); 58633aca94dSKalle Valo void (*write_tx_data) (struct queue_entry *entry, 58733aca94dSKalle Valo struct txentry_desc *txdesc); 58833aca94dSKalle Valo void (*write_beacon) (struct queue_entry *entry, 58933aca94dSKalle Valo struct txentry_desc *txdesc); 59033aca94dSKalle Valo void (*clear_beacon) (struct queue_entry *entry); 59133aca94dSKalle Valo int (*get_tx_data_len) (struct queue_entry *entry); 59233aca94dSKalle Valo 59333aca94dSKalle Valo /* 59433aca94dSKalle Valo * RX control handlers 59533aca94dSKalle Valo */ 59633aca94dSKalle Valo void (*fill_rxdone) (struct queue_entry *entry, 59733aca94dSKalle Valo struct rxdone_entry_desc *rxdesc); 59833aca94dSKalle Valo 59933aca94dSKalle Valo /* 60033aca94dSKalle Valo * Configuration handlers. 60133aca94dSKalle Valo */ 60233aca94dSKalle Valo int (*config_shared_key) (struct rt2x00_dev *rt2x00dev, 60333aca94dSKalle Valo struct rt2x00lib_crypto *crypto, 60433aca94dSKalle Valo struct ieee80211_key_conf *key); 60533aca94dSKalle Valo int (*config_pairwise_key) (struct rt2x00_dev *rt2x00dev, 60633aca94dSKalle Valo struct rt2x00lib_crypto *crypto, 60733aca94dSKalle Valo struct ieee80211_key_conf *key); 60833aca94dSKalle Valo void (*config_filter) (struct rt2x00_dev *rt2x00dev, 60933aca94dSKalle Valo const unsigned int filter_flags); 61033aca94dSKalle Valo void (*config_intf) (struct rt2x00_dev *rt2x00dev, 61133aca94dSKalle Valo struct rt2x00_intf *intf, 61233aca94dSKalle Valo struct rt2x00intf_conf *conf, 61333aca94dSKalle Valo const unsigned int flags); 61433aca94dSKalle Valo #define CONFIG_UPDATE_TYPE ( 1 << 1 ) 61533aca94dSKalle Valo #define CONFIG_UPDATE_MAC ( 1 << 2 ) 61633aca94dSKalle Valo #define CONFIG_UPDATE_BSSID ( 1 << 3 ) 61733aca94dSKalle Valo 61833aca94dSKalle Valo void (*config_erp) (struct rt2x00_dev *rt2x00dev, 61933aca94dSKalle Valo struct rt2x00lib_erp *erp, 62033aca94dSKalle Valo u32 changed); 62133aca94dSKalle Valo void (*config_ant) (struct rt2x00_dev *rt2x00dev, 62233aca94dSKalle Valo struct antenna_setup *ant); 62333aca94dSKalle Valo void (*config) (struct rt2x00_dev *rt2x00dev, 62433aca94dSKalle Valo struct rt2x00lib_conf *libconf, 62533aca94dSKalle Valo const unsigned int changed_flags); 62633aca94dSKalle Valo int (*sta_add) (struct rt2x00_dev *rt2x00dev, 62733aca94dSKalle Valo struct ieee80211_vif *vif, 62833aca94dSKalle Valo struct ieee80211_sta *sta); 62933aca94dSKalle Valo int (*sta_remove) (struct rt2x00_dev *rt2x00dev, 63033aca94dSKalle Valo int wcid); 63133aca94dSKalle Valo }; 63233aca94dSKalle Valo 63333aca94dSKalle Valo /* 63433aca94dSKalle Valo * rt2x00 driver callback operation structure. 63533aca94dSKalle Valo */ 63633aca94dSKalle Valo struct rt2x00_ops { 63733aca94dSKalle Valo const char *name; 63833aca94dSKalle Valo const unsigned int drv_data_size; 63933aca94dSKalle Valo const unsigned int max_ap_intf; 64033aca94dSKalle Valo const unsigned int eeprom_size; 64133aca94dSKalle Valo const unsigned int rf_size; 64233aca94dSKalle Valo const unsigned int tx_queues; 64333aca94dSKalle Valo void (*queue_init)(struct data_queue *queue); 64433aca94dSKalle Valo const struct rt2x00lib_ops *lib; 64533aca94dSKalle Valo const void *drv; 64633aca94dSKalle Valo const struct ieee80211_ops *hw; 64733aca94dSKalle Valo #ifdef CONFIG_RT2X00_LIB_DEBUGFS 64833aca94dSKalle Valo const struct rt2x00debug *debugfs; 64933aca94dSKalle Valo #endif /* CONFIG_RT2X00_LIB_DEBUGFS */ 65033aca94dSKalle Valo }; 65133aca94dSKalle Valo 65233aca94dSKalle Valo /* 65333aca94dSKalle Valo * rt2x00 state flags 65433aca94dSKalle Valo */ 65533aca94dSKalle Valo enum rt2x00_state_flags { 65633aca94dSKalle Valo /* 65733aca94dSKalle Valo * Device flags 65833aca94dSKalle Valo */ 65933aca94dSKalle Valo DEVICE_STATE_PRESENT, 66033aca94dSKalle Valo DEVICE_STATE_REGISTERED_HW, 66133aca94dSKalle Valo DEVICE_STATE_INITIALIZED, 66233aca94dSKalle Valo DEVICE_STATE_STARTED, 66333aca94dSKalle Valo DEVICE_STATE_ENABLED_RADIO, 66433aca94dSKalle Valo DEVICE_STATE_SCANNING, 66533aca94dSKalle Valo 66633aca94dSKalle Valo /* 66733aca94dSKalle Valo * Driver configuration 66833aca94dSKalle Valo */ 66933aca94dSKalle Valo CONFIG_CHANNEL_HT40, 67033aca94dSKalle Valo CONFIG_POWERSAVING, 67133aca94dSKalle Valo CONFIG_HT_DISABLED, 67233aca94dSKalle Valo CONFIG_QOS_DISABLED, 673262c741eSEli Cooper CONFIG_MONITORING, 67433aca94dSKalle Valo 67533aca94dSKalle Valo /* 67633aca94dSKalle Valo * Mark we currently are sequentially reading TX_STA_FIFO register 67733aca94dSKalle Valo * FIXME: this is for only rt2800usb, should go to private data 67833aca94dSKalle Valo */ 67933aca94dSKalle Valo TX_STATUS_READING, 68033aca94dSKalle Valo }; 68133aca94dSKalle Valo 68233aca94dSKalle Valo /* 68333aca94dSKalle Valo * rt2x00 capability flags 68433aca94dSKalle Valo */ 68533aca94dSKalle Valo enum rt2x00_capability_flags { 68633aca94dSKalle Valo /* 68733aca94dSKalle Valo * Requirements 68833aca94dSKalle Valo */ 68933aca94dSKalle Valo REQUIRE_FIRMWARE, 69033aca94dSKalle Valo REQUIRE_BEACON_GUARD, 69133aca94dSKalle Valo REQUIRE_ATIM_QUEUE, 69233aca94dSKalle Valo REQUIRE_DMA, 69333aca94dSKalle Valo REQUIRE_COPY_IV, 69433aca94dSKalle Valo REQUIRE_L2PAD, 69533aca94dSKalle Valo REQUIRE_TXSTATUS_FIFO, 69633aca94dSKalle Valo REQUIRE_TASKLET_CONTEXT, 69733aca94dSKalle Valo REQUIRE_SW_SEQNO, 69833aca94dSKalle Valo REQUIRE_HT_TX_DESC, 69933aca94dSKalle Valo REQUIRE_PS_AUTOWAKE, 70033aca94dSKalle Valo REQUIRE_DELAYED_RFKILL, 70133aca94dSKalle Valo 70233aca94dSKalle Valo /* 70333aca94dSKalle Valo * Capabilities 70433aca94dSKalle Valo */ 70533aca94dSKalle Valo CAPABILITY_HW_BUTTON, 70633aca94dSKalle Valo CAPABILITY_HW_CRYPTO, 70733aca94dSKalle Valo CAPABILITY_POWER_LIMIT, 70833aca94dSKalle Valo CAPABILITY_CONTROL_FILTERS, 70933aca94dSKalle Valo CAPABILITY_CONTROL_FILTER_PSPOLL, 71033aca94dSKalle Valo CAPABILITY_PRE_TBTT_INTERRUPT, 71133aca94dSKalle Valo CAPABILITY_LINK_TUNING, 71233aca94dSKalle Valo CAPABILITY_FRAME_TYPE, 71333aca94dSKalle Valo CAPABILITY_RF_SEQUENCE, 71433aca94dSKalle Valo CAPABILITY_EXTERNAL_LNA_A, 71533aca94dSKalle Valo CAPABILITY_EXTERNAL_LNA_BG, 71633aca94dSKalle Valo CAPABILITY_DOUBLE_ANTENNA, 71733aca94dSKalle Valo CAPABILITY_BT_COEXIST, 71833aca94dSKalle Valo CAPABILITY_VCO_RECALIBRATION, 71933aca94dSKalle Valo }; 72033aca94dSKalle Valo 72133aca94dSKalle Valo /* 72233aca94dSKalle Valo * Interface combinations 72333aca94dSKalle Valo */ 72433aca94dSKalle Valo enum { 72533aca94dSKalle Valo IF_COMB_AP = 0, 72633aca94dSKalle Valo NUM_IF_COMB, 72733aca94dSKalle Valo }; 72833aca94dSKalle Valo 72933aca94dSKalle Valo /* 73033aca94dSKalle Valo * rt2x00 device structure. 73133aca94dSKalle Valo */ 73233aca94dSKalle Valo struct rt2x00_dev { 73333aca94dSKalle Valo /* 73433aca94dSKalle Valo * Device structure. 73533aca94dSKalle Valo * The structure stored in here depends on the 73633aca94dSKalle Valo * system bus (PCI or USB). 73733aca94dSKalle Valo * When accessing this variable, the rt2x00dev_{pci,usb} 73833aca94dSKalle Valo * macros should be used for correct typecasting. 73933aca94dSKalle Valo */ 74033aca94dSKalle Valo struct device *dev; 74133aca94dSKalle Valo 74233aca94dSKalle Valo /* 74333aca94dSKalle Valo * Callback functions. 74433aca94dSKalle Valo */ 74533aca94dSKalle Valo const struct rt2x00_ops *ops; 74633aca94dSKalle Valo 74733aca94dSKalle Valo /* 74833aca94dSKalle Valo * Driver data. 74933aca94dSKalle Valo */ 75033aca94dSKalle Valo void *drv_data; 75133aca94dSKalle Valo 75233aca94dSKalle Valo /* 75333aca94dSKalle Valo * IEEE80211 control structure. 75433aca94dSKalle Valo */ 75533aca94dSKalle Valo struct ieee80211_hw *hw; 756*57fbcce3SJohannes Berg struct ieee80211_supported_band bands[NUM_NL80211_BANDS]; 757*57fbcce3SJohannes Berg enum nl80211_band curr_band; 75833aca94dSKalle Valo int curr_freq; 75933aca94dSKalle Valo 76033aca94dSKalle Valo /* 76133aca94dSKalle Valo * If enabled, the debugfs interface structures 76233aca94dSKalle Valo * required for deregistration of debugfs. 76333aca94dSKalle Valo */ 76433aca94dSKalle Valo #ifdef CONFIG_RT2X00_LIB_DEBUGFS 76533aca94dSKalle Valo struct rt2x00debug_intf *debugfs_intf; 76633aca94dSKalle Valo #endif /* CONFIG_RT2X00_LIB_DEBUGFS */ 76733aca94dSKalle Valo 76833aca94dSKalle Valo /* 76933aca94dSKalle Valo * LED structure for changing the LED status 77033aca94dSKalle Valo * by mac8011 or the kernel. 77133aca94dSKalle Valo */ 77233aca94dSKalle Valo #ifdef CONFIG_RT2X00_LIB_LEDS 77333aca94dSKalle Valo struct rt2x00_led led_radio; 77433aca94dSKalle Valo struct rt2x00_led led_assoc; 77533aca94dSKalle Valo struct rt2x00_led led_qual; 77633aca94dSKalle Valo u16 led_mcu_reg; 77733aca94dSKalle Valo #endif /* CONFIG_RT2X00_LIB_LEDS */ 77833aca94dSKalle Valo 77933aca94dSKalle Valo /* 78033aca94dSKalle Valo * Device state flags. 78133aca94dSKalle Valo * In these flags the current status is stored. 78233aca94dSKalle Valo * Access to these flags should occur atomically. 78333aca94dSKalle Valo */ 78433aca94dSKalle Valo unsigned long flags; 78533aca94dSKalle Valo 78633aca94dSKalle Valo /* 78733aca94dSKalle Valo * Device capabiltiy flags. 78833aca94dSKalle Valo * In these flags the device/driver capabilities are stored. 78933aca94dSKalle Valo * Access to these flags should occur non-atomically. 79033aca94dSKalle Valo */ 79133aca94dSKalle Valo unsigned long cap_flags; 79233aca94dSKalle Valo 79333aca94dSKalle Valo /* 79433aca94dSKalle Valo * Device information, Bus IRQ and name (PCI, SoC) 79533aca94dSKalle Valo */ 79633aca94dSKalle Valo int irq; 79733aca94dSKalle Valo const char *name; 79833aca94dSKalle Valo 79933aca94dSKalle Valo /* 80033aca94dSKalle Valo * Chipset identification. 80133aca94dSKalle Valo */ 80233aca94dSKalle Valo struct rt2x00_chip chip; 80333aca94dSKalle Valo 80433aca94dSKalle Valo /* 80533aca94dSKalle Valo * hw capability specifications. 80633aca94dSKalle Valo */ 80733aca94dSKalle Valo struct hw_mode_spec spec; 80833aca94dSKalle Valo 80933aca94dSKalle Valo /* 81033aca94dSKalle Valo * This is the default TX/RX antenna setup as indicated 81133aca94dSKalle Valo * by the device's EEPROM. 81233aca94dSKalle Valo */ 81333aca94dSKalle Valo struct antenna_setup default_ant; 81433aca94dSKalle Valo 81533aca94dSKalle Valo /* 81633aca94dSKalle Valo * Register pointers 81733aca94dSKalle Valo * csr.base: CSR base register address. (PCI) 81833aca94dSKalle Valo * csr.cache: CSR cache for usb_control_msg. (USB) 81933aca94dSKalle Valo */ 82033aca94dSKalle Valo union csr { 82133aca94dSKalle Valo void __iomem *base; 82233aca94dSKalle Valo void *cache; 82333aca94dSKalle Valo } csr; 82433aca94dSKalle Valo 82533aca94dSKalle Valo /* 82633aca94dSKalle Valo * Mutex to protect register accesses. 82733aca94dSKalle Valo * For PCI and USB devices it protects against concurrent indirect 82833aca94dSKalle Valo * register access (BBP, RF, MCU) since accessing those 82933aca94dSKalle Valo * registers require multiple calls to the CSR registers. 83033aca94dSKalle Valo * For USB devices it also protects the csr_cache since that 83133aca94dSKalle Valo * field is used for normal CSR access and it cannot support 83233aca94dSKalle Valo * multiple callers simultaneously. 83333aca94dSKalle Valo */ 83433aca94dSKalle Valo struct mutex csr_mutex; 83533aca94dSKalle Valo 83633aca94dSKalle Valo /* 83733aca94dSKalle Valo * Current packet filter configuration for the device. 83833aca94dSKalle Valo * This contains all currently active FIF_* flags send 83933aca94dSKalle Valo * to us by mac80211 during configure_filter(). 84033aca94dSKalle Valo */ 84133aca94dSKalle Valo unsigned int packet_filter; 84233aca94dSKalle Valo 84333aca94dSKalle Valo /* 84433aca94dSKalle Valo * Interface details: 84533aca94dSKalle Valo * - Open ap interface count. 84633aca94dSKalle Valo * - Open sta interface count. 84733aca94dSKalle Valo * - Association count. 84833aca94dSKalle Valo * - Beaconing enabled count. 84933aca94dSKalle Valo */ 85033aca94dSKalle Valo unsigned int intf_ap_count; 85133aca94dSKalle Valo unsigned int intf_sta_count; 85233aca94dSKalle Valo unsigned int intf_associated; 85333aca94dSKalle Valo unsigned int intf_beaconing; 85433aca94dSKalle Valo 85533aca94dSKalle Valo /* 85633aca94dSKalle Valo * Interface combinations 85733aca94dSKalle Valo */ 85833aca94dSKalle Valo struct ieee80211_iface_limit if_limits_ap; 85933aca94dSKalle Valo struct ieee80211_iface_combination if_combinations[NUM_IF_COMB]; 86033aca94dSKalle Valo 86133aca94dSKalle Valo /* 86233aca94dSKalle Valo * Link quality 86333aca94dSKalle Valo */ 86433aca94dSKalle Valo struct link link; 86533aca94dSKalle Valo 86633aca94dSKalle Valo /* 86733aca94dSKalle Valo * EEPROM data. 86833aca94dSKalle Valo */ 86933aca94dSKalle Valo __le16 *eeprom; 87033aca94dSKalle Valo 87133aca94dSKalle Valo /* 87233aca94dSKalle Valo * Active RF register values. 87333aca94dSKalle Valo * These are stored here so we don't need 87433aca94dSKalle Valo * to read the rf registers and can directly 87533aca94dSKalle Valo * use this value instead. 87633aca94dSKalle Valo * This field should be accessed by using 87733aca94dSKalle Valo * rt2x00_rf_read() and rt2x00_rf_write(). 87833aca94dSKalle Valo */ 87933aca94dSKalle Valo u32 *rf; 88033aca94dSKalle Valo 88133aca94dSKalle Valo /* 88233aca94dSKalle Valo * LNA gain 88333aca94dSKalle Valo */ 88433aca94dSKalle Valo short lna_gain; 88533aca94dSKalle Valo 88633aca94dSKalle Valo /* 88733aca94dSKalle Valo * Current TX power value. 88833aca94dSKalle Valo */ 88933aca94dSKalle Valo u16 tx_power; 89033aca94dSKalle Valo 89133aca94dSKalle Valo /* 89233aca94dSKalle Valo * Current retry values. 89333aca94dSKalle Valo */ 89433aca94dSKalle Valo u8 short_retry; 89533aca94dSKalle Valo u8 long_retry; 89633aca94dSKalle Valo 89733aca94dSKalle Valo /* 89833aca94dSKalle Valo * Rssi <-> Dbm offset 89933aca94dSKalle Valo */ 90033aca94dSKalle Valo u8 rssi_offset; 90133aca94dSKalle Valo 90233aca94dSKalle Valo /* 90333aca94dSKalle Valo * Frequency offset. 90433aca94dSKalle Valo */ 90533aca94dSKalle Valo u8 freq_offset; 90633aca94dSKalle Valo 90733aca94dSKalle Valo /* 90833aca94dSKalle Valo * Association id. 90933aca94dSKalle Valo */ 91033aca94dSKalle Valo u16 aid; 91133aca94dSKalle Valo 91233aca94dSKalle Valo /* 91333aca94dSKalle Valo * Beacon interval. 91433aca94dSKalle Valo */ 91533aca94dSKalle Valo u16 beacon_int; 91633aca94dSKalle Valo 91733aca94dSKalle Valo /** 91833aca94dSKalle Valo * Timestamp of last received beacon 91933aca94dSKalle Valo */ 92033aca94dSKalle Valo unsigned long last_beacon; 92133aca94dSKalle Valo 92233aca94dSKalle Valo /* 92333aca94dSKalle Valo * Low level statistics which will have 92433aca94dSKalle Valo * to be kept up to date while device is running. 92533aca94dSKalle Valo */ 92633aca94dSKalle Valo struct ieee80211_low_level_stats low_level_stats; 92733aca94dSKalle Valo 92833aca94dSKalle Valo /** 92933aca94dSKalle Valo * Work queue for all work which should not be placed 93033aca94dSKalle Valo * on the mac80211 workqueue (because of dependencies 93133aca94dSKalle Valo * between various work structures). 93233aca94dSKalle Valo */ 93333aca94dSKalle Valo struct workqueue_struct *workqueue; 93433aca94dSKalle Valo 93533aca94dSKalle Valo /* 93633aca94dSKalle Valo * Scheduled work. 93733aca94dSKalle Valo * NOTE: intf_work will use ieee80211_iterate_active_interfaces() 93833aca94dSKalle Valo * which means it cannot be placed on the hw->workqueue 93933aca94dSKalle Valo * due to RTNL locking requirements. 94033aca94dSKalle Valo */ 94133aca94dSKalle Valo struct work_struct intf_work; 94233aca94dSKalle Valo 94333aca94dSKalle Valo /** 94433aca94dSKalle Valo * Scheduled work for TX/RX done handling (USB devices) 94533aca94dSKalle Valo */ 94633aca94dSKalle Valo struct work_struct rxdone_work; 94733aca94dSKalle Valo struct work_struct txdone_work; 94833aca94dSKalle Valo 94933aca94dSKalle Valo /* 95033aca94dSKalle Valo * Powersaving work 95133aca94dSKalle Valo */ 95233aca94dSKalle Valo struct delayed_work autowakeup_work; 95333aca94dSKalle Valo struct work_struct sleep_work; 95433aca94dSKalle Valo 95533aca94dSKalle Valo /* 95633aca94dSKalle Valo * Data queue arrays for RX, TX, Beacon and ATIM. 95733aca94dSKalle Valo */ 95833aca94dSKalle Valo unsigned int data_queues; 95933aca94dSKalle Valo struct data_queue *rx; 96033aca94dSKalle Valo struct data_queue *tx; 96133aca94dSKalle Valo struct data_queue *bcn; 96233aca94dSKalle Valo struct data_queue *atim; 96333aca94dSKalle Valo 96433aca94dSKalle Valo /* 96533aca94dSKalle Valo * Firmware image. 96633aca94dSKalle Valo */ 96733aca94dSKalle Valo const struct firmware *fw; 96833aca94dSKalle Valo 96933aca94dSKalle Valo /* 97033aca94dSKalle Valo * FIFO for storing tx status reports between isr and tasklet. 97133aca94dSKalle Valo */ 97233aca94dSKalle Valo DECLARE_KFIFO_PTR(txstatus_fifo, u32); 97333aca94dSKalle Valo 97433aca94dSKalle Valo /* 97533aca94dSKalle Valo * Timer to ensure tx status reports are read (rt2800usb). 97633aca94dSKalle Valo */ 97733aca94dSKalle Valo struct hrtimer txstatus_timer; 97833aca94dSKalle Valo 97933aca94dSKalle Valo /* 98033aca94dSKalle Valo * Tasklet for processing tx status reports (rt2800pci). 98133aca94dSKalle Valo */ 98233aca94dSKalle Valo struct tasklet_struct txstatus_tasklet; 98333aca94dSKalle Valo struct tasklet_struct pretbtt_tasklet; 98433aca94dSKalle Valo struct tasklet_struct tbtt_tasklet; 98533aca94dSKalle Valo struct tasklet_struct rxdone_tasklet; 98633aca94dSKalle Valo struct tasklet_struct autowake_tasklet; 98733aca94dSKalle Valo 98833aca94dSKalle Valo /* 98933aca94dSKalle Valo * Used for VCO periodic calibration. 99033aca94dSKalle Valo */ 99133aca94dSKalle Valo int rf_channel; 99233aca94dSKalle Valo 99333aca94dSKalle Valo /* 99433aca94dSKalle Valo * Protect the interrupt mask register. 99533aca94dSKalle Valo */ 99633aca94dSKalle Valo spinlock_t irqmask_lock; 99733aca94dSKalle Valo 99833aca94dSKalle Valo /* 99933aca94dSKalle Valo * List of BlockAckReq TX entries that need driver BlockAck processing. 100033aca94dSKalle Valo */ 100133aca94dSKalle Valo struct list_head bar_list; 100233aca94dSKalle Valo spinlock_t bar_list_lock; 100333aca94dSKalle Valo 100433aca94dSKalle Valo /* Extra TX headroom required for alignment purposes. */ 100533aca94dSKalle Valo unsigned int extra_tx_headroom; 10068b4c0009SVishal Thanki 10078b4c0009SVishal Thanki struct usb_anchor *anchor; 100833aca94dSKalle Valo }; 100933aca94dSKalle Valo 101033aca94dSKalle Valo struct rt2x00_bar_list_entry { 101133aca94dSKalle Valo struct list_head list; 101233aca94dSKalle Valo struct rcu_head head; 101333aca94dSKalle Valo 101433aca94dSKalle Valo struct queue_entry *entry; 101533aca94dSKalle Valo int block_acked; 101633aca94dSKalle Valo 101733aca94dSKalle Valo /* Relevant parts of the IEEE80211 BAR header */ 101833aca94dSKalle Valo __u8 ra[6]; 101933aca94dSKalle Valo __u8 ta[6]; 102033aca94dSKalle Valo __le16 control; 102133aca94dSKalle Valo __le16 start_seq_num; 102233aca94dSKalle Valo }; 102333aca94dSKalle Valo 102433aca94dSKalle Valo /* 102533aca94dSKalle Valo * Register defines. 102633aca94dSKalle Valo * Some registers require multiple attempts before success, 102733aca94dSKalle Valo * in those cases REGISTER_BUSY_COUNT attempts should be 102833aca94dSKalle Valo * taken with a REGISTER_BUSY_DELAY interval. Due to USB 102933aca94dSKalle Valo * bus delays, we do not have to loop so many times to wait 103033aca94dSKalle Valo * for valid register value on that bus. 103133aca94dSKalle Valo */ 103233aca94dSKalle Valo #define REGISTER_BUSY_COUNT 100 103333aca94dSKalle Valo #define REGISTER_USB_BUSY_COUNT 20 103433aca94dSKalle Valo #define REGISTER_BUSY_DELAY 100 103533aca94dSKalle Valo 103633aca94dSKalle Valo /* 103733aca94dSKalle Valo * Generic RF access. 103833aca94dSKalle Valo * The RF is being accessed by word index. 103933aca94dSKalle Valo */ 104033aca94dSKalle Valo static inline void rt2x00_rf_read(struct rt2x00_dev *rt2x00dev, 104133aca94dSKalle Valo const unsigned int word, u32 *data) 104233aca94dSKalle Valo { 104333aca94dSKalle Valo BUG_ON(word < 1 || word > rt2x00dev->ops->rf_size / sizeof(u32)); 104433aca94dSKalle Valo *data = rt2x00dev->rf[word - 1]; 104533aca94dSKalle Valo } 104633aca94dSKalle Valo 104733aca94dSKalle Valo static inline void rt2x00_rf_write(struct rt2x00_dev *rt2x00dev, 104833aca94dSKalle Valo const unsigned int word, u32 data) 104933aca94dSKalle Valo { 105033aca94dSKalle Valo BUG_ON(word < 1 || word > rt2x00dev->ops->rf_size / sizeof(u32)); 105133aca94dSKalle Valo rt2x00dev->rf[word - 1] = data; 105233aca94dSKalle Valo } 105333aca94dSKalle Valo 105433aca94dSKalle Valo /* 105533aca94dSKalle Valo * Generic EEPROM access. The EEPROM is being accessed by word or byte index. 105633aca94dSKalle Valo */ 105733aca94dSKalle Valo static inline void *rt2x00_eeprom_addr(struct rt2x00_dev *rt2x00dev, 105833aca94dSKalle Valo const unsigned int word) 105933aca94dSKalle Valo { 106033aca94dSKalle Valo return (void *)&rt2x00dev->eeprom[word]; 106133aca94dSKalle Valo } 106233aca94dSKalle Valo 106333aca94dSKalle Valo static inline void rt2x00_eeprom_read(struct rt2x00_dev *rt2x00dev, 106433aca94dSKalle Valo const unsigned int word, u16 *data) 106533aca94dSKalle Valo { 106633aca94dSKalle Valo *data = le16_to_cpu(rt2x00dev->eeprom[word]); 106733aca94dSKalle Valo } 106833aca94dSKalle Valo 106933aca94dSKalle Valo static inline void rt2x00_eeprom_write(struct rt2x00_dev *rt2x00dev, 107033aca94dSKalle Valo const unsigned int word, u16 data) 107133aca94dSKalle Valo { 107233aca94dSKalle Valo rt2x00dev->eeprom[word] = cpu_to_le16(data); 107333aca94dSKalle Valo } 107433aca94dSKalle Valo 107533aca94dSKalle Valo static inline u8 rt2x00_eeprom_byte(struct rt2x00_dev *rt2x00dev, 107633aca94dSKalle Valo const unsigned int byte) 107733aca94dSKalle Valo { 107833aca94dSKalle Valo return *(((u8 *)rt2x00dev->eeprom) + byte); 107933aca94dSKalle Valo } 108033aca94dSKalle Valo 108133aca94dSKalle Valo /* 108233aca94dSKalle Valo * Chipset handlers 108333aca94dSKalle Valo */ 108433aca94dSKalle Valo static inline void rt2x00_set_chip(struct rt2x00_dev *rt2x00dev, 108533aca94dSKalle Valo const u16 rt, const u16 rf, const u16 rev) 108633aca94dSKalle Valo { 108733aca94dSKalle Valo rt2x00dev->chip.rt = rt; 108833aca94dSKalle Valo rt2x00dev->chip.rf = rf; 108933aca94dSKalle Valo rt2x00dev->chip.rev = rev; 109033aca94dSKalle Valo 109133aca94dSKalle Valo rt2x00_info(rt2x00dev, "Chipset detected - rt: %04x, rf: %04x, rev: %04x\n", 109233aca94dSKalle Valo rt2x00dev->chip.rt, rt2x00dev->chip.rf, 109333aca94dSKalle Valo rt2x00dev->chip.rev); 109433aca94dSKalle Valo } 109533aca94dSKalle Valo 109633aca94dSKalle Valo static inline void rt2x00_set_rt(struct rt2x00_dev *rt2x00dev, 109733aca94dSKalle Valo const u16 rt, const u16 rev) 109833aca94dSKalle Valo { 109933aca94dSKalle Valo rt2x00dev->chip.rt = rt; 110033aca94dSKalle Valo rt2x00dev->chip.rev = rev; 110133aca94dSKalle Valo 110233aca94dSKalle Valo rt2x00_info(rt2x00dev, "RT chipset %04x, rev %04x detected\n", 110333aca94dSKalle Valo rt2x00dev->chip.rt, rt2x00dev->chip.rev); 110433aca94dSKalle Valo } 110533aca94dSKalle Valo 110633aca94dSKalle Valo static inline void rt2x00_set_rf(struct rt2x00_dev *rt2x00dev, const u16 rf) 110733aca94dSKalle Valo { 110833aca94dSKalle Valo rt2x00dev->chip.rf = rf; 110933aca94dSKalle Valo 111033aca94dSKalle Valo rt2x00_info(rt2x00dev, "RF chipset %04x detected\n", 111133aca94dSKalle Valo rt2x00dev->chip.rf); 111233aca94dSKalle Valo } 111333aca94dSKalle Valo 111433aca94dSKalle Valo static inline bool rt2x00_rt(struct rt2x00_dev *rt2x00dev, const u16 rt) 111533aca94dSKalle Valo { 111633aca94dSKalle Valo return (rt2x00dev->chip.rt == rt); 111733aca94dSKalle Valo } 111833aca94dSKalle Valo 111933aca94dSKalle Valo static inline bool rt2x00_rf(struct rt2x00_dev *rt2x00dev, const u16 rf) 112033aca94dSKalle Valo { 112133aca94dSKalle Valo return (rt2x00dev->chip.rf == rf); 112233aca94dSKalle Valo } 112333aca94dSKalle Valo 112433aca94dSKalle Valo static inline u16 rt2x00_rev(struct rt2x00_dev *rt2x00dev) 112533aca94dSKalle Valo { 112633aca94dSKalle Valo return rt2x00dev->chip.rev; 112733aca94dSKalle Valo } 112833aca94dSKalle Valo 112933aca94dSKalle Valo static inline bool rt2x00_rt_rev(struct rt2x00_dev *rt2x00dev, 113033aca94dSKalle Valo const u16 rt, const u16 rev) 113133aca94dSKalle Valo { 113233aca94dSKalle Valo return (rt2x00_rt(rt2x00dev, rt) && rt2x00_rev(rt2x00dev) == rev); 113333aca94dSKalle Valo } 113433aca94dSKalle Valo 113533aca94dSKalle Valo static inline bool rt2x00_rt_rev_lt(struct rt2x00_dev *rt2x00dev, 113633aca94dSKalle Valo const u16 rt, const u16 rev) 113733aca94dSKalle Valo { 113833aca94dSKalle Valo return (rt2x00_rt(rt2x00dev, rt) && rt2x00_rev(rt2x00dev) < rev); 113933aca94dSKalle Valo } 114033aca94dSKalle Valo 114133aca94dSKalle Valo static inline bool rt2x00_rt_rev_gte(struct rt2x00_dev *rt2x00dev, 114233aca94dSKalle Valo const u16 rt, const u16 rev) 114333aca94dSKalle Valo { 114433aca94dSKalle Valo return (rt2x00_rt(rt2x00dev, rt) && rt2x00_rev(rt2x00dev) >= rev); 114533aca94dSKalle Valo } 114633aca94dSKalle Valo 114733aca94dSKalle Valo static inline void rt2x00_set_chip_intf(struct rt2x00_dev *rt2x00dev, 114833aca94dSKalle Valo enum rt2x00_chip_intf intf) 114933aca94dSKalle Valo { 115033aca94dSKalle Valo rt2x00dev->chip.intf = intf; 115133aca94dSKalle Valo } 115233aca94dSKalle Valo 115333aca94dSKalle Valo static inline bool rt2x00_intf(struct rt2x00_dev *rt2x00dev, 115433aca94dSKalle Valo enum rt2x00_chip_intf intf) 115533aca94dSKalle Valo { 115633aca94dSKalle Valo return (rt2x00dev->chip.intf == intf); 115733aca94dSKalle Valo } 115833aca94dSKalle Valo 115933aca94dSKalle Valo static inline bool rt2x00_is_pci(struct rt2x00_dev *rt2x00dev) 116033aca94dSKalle Valo { 116133aca94dSKalle Valo return rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_PCI) || 116233aca94dSKalle Valo rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_PCIE); 116333aca94dSKalle Valo } 116433aca94dSKalle Valo 116533aca94dSKalle Valo static inline bool rt2x00_is_pcie(struct rt2x00_dev *rt2x00dev) 116633aca94dSKalle Valo { 116733aca94dSKalle Valo return rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_PCIE); 116833aca94dSKalle Valo } 116933aca94dSKalle Valo 117033aca94dSKalle Valo static inline bool rt2x00_is_usb(struct rt2x00_dev *rt2x00dev) 117133aca94dSKalle Valo { 117233aca94dSKalle Valo return rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_USB); 117333aca94dSKalle Valo } 117433aca94dSKalle Valo 117533aca94dSKalle Valo static inline bool rt2x00_is_soc(struct rt2x00_dev *rt2x00dev) 117633aca94dSKalle Valo { 117733aca94dSKalle Valo return rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_SOC); 117833aca94dSKalle Valo } 117933aca94dSKalle Valo 118033aca94dSKalle Valo /* Helpers for capability flags */ 118133aca94dSKalle Valo 118233aca94dSKalle Valo static inline bool 118333aca94dSKalle Valo rt2x00_has_cap_flag(struct rt2x00_dev *rt2x00dev, 118433aca94dSKalle Valo enum rt2x00_capability_flags cap_flag) 118533aca94dSKalle Valo { 118633aca94dSKalle Valo return test_bit(cap_flag, &rt2x00dev->cap_flags); 118733aca94dSKalle Valo } 118833aca94dSKalle Valo 118933aca94dSKalle Valo static inline bool 119033aca94dSKalle Valo rt2x00_has_cap_hw_crypto(struct rt2x00_dev *rt2x00dev) 119133aca94dSKalle Valo { 119233aca94dSKalle Valo return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_HW_CRYPTO); 119333aca94dSKalle Valo } 119433aca94dSKalle Valo 119533aca94dSKalle Valo static inline bool 119633aca94dSKalle Valo rt2x00_has_cap_power_limit(struct rt2x00_dev *rt2x00dev) 119733aca94dSKalle Valo { 119833aca94dSKalle Valo return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_POWER_LIMIT); 119933aca94dSKalle Valo } 120033aca94dSKalle Valo 120133aca94dSKalle Valo static inline bool 120233aca94dSKalle Valo rt2x00_has_cap_control_filters(struct rt2x00_dev *rt2x00dev) 120333aca94dSKalle Valo { 120433aca94dSKalle Valo return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_CONTROL_FILTERS); 120533aca94dSKalle Valo } 120633aca94dSKalle Valo 120733aca94dSKalle Valo static inline bool 120833aca94dSKalle Valo rt2x00_has_cap_control_filter_pspoll(struct rt2x00_dev *rt2x00dev) 120933aca94dSKalle Valo { 121033aca94dSKalle Valo return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_CONTROL_FILTER_PSPOLL); 121133aca94dSKalle Valo } 121233aca94dSKalle Valo 121333aca94dSKalle Valo static inline bool 121433aca94dSKalle Valo rt2x00_has_cap_pre_tbtt_interrupt(struct rt2x00_dev *rt2x00dev) 121533aca94dSKalle Valo { 121633aca94dSKalle Valo return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_PRE_TBTT_INTERRUPT); 121733aca94dSKalle Valo } 121833aca94dSKalle Valo 121933aca94dSKalle Valo static inline bool 122033aca94dSKalle Valo rt2x00_has_cap_link_tuning(struct rt2x00_dev *rt2x00dev) 122133aca94dSKalle Valo { 122233aca94dSKalle Valo return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_LINK_TUNING); 122333aca94dSKalle Valo } 122433aca94dSKalle Valo 122533aca94dSKalle Valo static inline bool 122633aca94dSKalle Valo rt2x00_has_cap_frame_type(struct rt2x00_dev *rt2x00dev) 122733aca94dSKalle Valo { 122833aca94dSKalle Valo return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_FRAME_TYPE); 122933aca94dSKalle Valo } 123033aca94dSKalle Valo 123133aca94dSKalle Valo static inline bool 123233aca94dSKalle Valo rt2x00_has_cap_rf_sequence(struct rt2x00_dev *rt2x00dev) 123333aca94dSKalle Valo { 123433aca94dSKalle Valo return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_RF_SEQUENCE); 123533aca94dSKalle Valo } 123633aca94dSKalle Valo 123733aca94dSKalle Valo static inline bool 123833aca94dSKalle Valo rt2x00_has_cap_external_lna_a(struct rt2x00_dev *rt2x00dev) 123933aca94dSKalle Valo { 124033aca94dSKalle Valo return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_EXTERNAL_LNA_A); 124133aca94dSKalle Valo } 124233aca94dSKalle Valo 124333aca94dSKalle Valo static inline bool 124433aca94dSKalle Valo rt2x00_has_cap_external_lna_bg(struct rt2x00_dev *rt2x00dev) 124533aca94dSKalle Valo { 124633aca94dSKalle Valo return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_EXTERNAL_LNA_BG); 124733aca94dSKalle Valo } 124833aca94dSKalle Valo 124933aca94dSKalle Valo static inline bool 125033aca94dSKalle Valo rt2x00_has_cap_double_antenna(struct rt2x00_dev *rt2x00dev) 125133aca94dSKalle Valo { 125233aca94dSKalle Valo return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_DOUBLE_ANTENNA); 125333aca94dSKalle Valo } 125433aca94dSKalle Valo 125533aca94dSKalle Valo static inline bool 125633aca94dSKalle Valo rt2x00_has_cap_bt_coexist(struct rt2x00_dev *rt2x00dev) 125733aca94dSKalle Valo { 125833aca94dSKalle Valo return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_BT_COEXIST); 125933aca94dSKalle Valo } 126033aca94dSKalle Valo 126133aca94dSKalle Valo static inline bool 126233aca94dSKalle Valo rt2x00_has_cap_vco_recalibration(struct rt2x00_dev *rt2x00dev) 126333aca94dSKalle Valo { 126433aca94dSKalle Valo return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_VCO_RECALIBRATION); 126533aca94dSKalle Valo } 126633aca94dSKalle Valo 126733aca94dSKalle Valo /** 126833aca94dSKalle Valo * rt2x00queue_map_txskb - Map a skb into DMA for TX purposes. 126933aca94dSKalle Valo * @entry: Pointer to &struct queue_entry 127033aca94dSKalle Valo * 127133aca94dSKalle Valo * Returns -ENOMEM if mapping fail, 0 otherwise. 127233aca94dSKalle Valo */ 127333aca94dSKalle Valo int rt2x00queue_map_txskb(struct queue_entry *entry); 127433aca94dSKalle Valo 127533aca94dSKalle Valo /** 127633aca94dSKalle Valo * rt2x00queue_unmap_skb - Unmap a skb from DMA. 127733aca94dSKalle Valo * @entry: Pointer to &struct queue_entry 127833aca94dSKalle Valo */ 127933aca94dSKalle Valo void rt2x00queue_unmap_skb(struct queue_entry *entry); 128033aca94dSKalle Valo 128133aca94dSKalle Valo /** 128233aca94dSKalle Valo * rt2x00queue_get_tx_queue - Convert tx queue index to queue pointer 128333aca94dSKalle Valo * @rt2x00dev: Pointer to &struct rt2x00_dev. 128433aca94dSKalle Valo * @queue: rt2x00 queue index (see &enum data_queue_qid). 128533aca94dSKalle Valo * 128633aca94dSKalle Valo * Returns NULL for non tx queues. 128733aca94dSKalle Valo */ 128833aca94dSKalle Valo static inline struct data_queue * 128933aca94dSKalle Valo rt2x00queue_get_tx_queue(struct rt2x00_dev *rt2x00dev, 129033aca94dSKalle Valo const enum data_queue_qid queue) 129133aca94dSKalle Valo { 129233aca94dSKalle Valo if (queue < rt2x00dev->ops->tx_queues && rt2x00dev->tx) 129333aca94dSKalle Valo return &rt2x00dev->tx[queue]; 129433aca94dSKalle Valo 129533aca94dSKalle Valo if (queue == QID_ATIM) 129633aca94dSKalle Valo return rt2x00dev->atim; 129733aca94dSKalle Valo 129833aca94dSKalle Valo return NULL; 129933aca94dSKalle Valo } 130033aca94dSKalle Valo 130133aca94dSKalle Valo /** 130233aca94dSKalle Valo * rt2x00queue_get_entry - Get queue entry where the given index points to. 130333aca94dSKalle Valo * @queue: Pointer to &struct data_queue from where we obtain the entry. 130433aca94dSKalle Valo * @index: Index identifier for obtaining the correct index. 130533aca94dSKalle Valo */ 130633aca94dSKalle Valo struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue, 130733aca94dSKalle Valo enum queue_index index); 130833aca94dSKalle Valo 130933aca94dSKalle Valo /** 131033aca94dSKalle Valo * rt2x00queue_pause_queue - Pause a data queue 131133aca94dSKalle Valo * @queue: Pointer to &struct data_queue. 131233aca94dSKalle Valo * 131333aca94dSKalle Valo * This function will pause the data queue locally, preventing 131433aca94dSKalle Valo * new frames to be added to the queue (while the hardware is 131533aca94dSKalle Valo * still allowed to run). 131633aca94dSKalle Valo */ 131733aca94dSKalle Valo void rt2x00queue_pause_queue(struct data_queue *queue); 131833aca94dSKalle Valo 131933aca94dSKalle Valo /** 132033aca94dSKalle Valo * rt2x00queue_unpause_queue - unpause a data queue 132133aca94dSKalle Valo * @queue: Pointer to &struct data_queue. 132233aca94dSKalle Valo * 132333aca94dSKalle Valo * This function will unpause the data queue locally, allowing 132433aca94dSKalle Valo * new frames to be added to the queue again. 132533aca94dSKalle Valo */ 132633aca94dSKalle Valo void rt2x00queue_unpause_queue(struct data_queue *queue); 132733aca94dSKalle Valo 132833aca94dSKalle Valo /** 132933aca94dSKalle Valo * rt2x00queue_start_queue - Start a data queue 133033aca94dSKalle Valo * @queue: Pointer to &struct data_queue. 133133aca94dSKalle Valo * 133233aca94dSKalle Valo * This function will start handling all pending frames in the queue. 133333aca94dSKalle Valo */ 133433aca94dSKalle Valo void rt2x00queue_start_queue(struct data_queue *queue); 133533aca94dSKalle Valo 133633aca94dSKalle Valo /** 133733aca94dSKalle Valo * rt2x00queue_stop_queue - Halt a data queue 133833aca94dSKalle Valo * @queue: Pointer to &struct data_queue. 133933aca94dSKalle Valo * 134033aca94dSKalle Valo * This function will stop all pending frames in the queue. 134133aca94dSKalle Valo */ 134233aca94dSKalle Valo void rt2x00queue_stop_queue(struct data_queue *queue); 134333aca94dSKalle Valo 134433aca94dSKalle Valo /** 134533aca94dSKalle Valo * rt2x00queue_flush_queue - Flush a data queue 134633aca94dSKalle Valo * @queue: Pointer to &struct data_queue. 134733aca94dSKalle Valo * @drop: True to drop all pending frames. 134833aca94dSKalle Valo * 134933aca94dSKalle Valo * This function will flush the queue. After this call 135033aca94dSKalle Valo * the queue is guaranteed to be empty. 135133aca94dSKalle Valo */ 135233aca94dSKalle Valo void rt2x00queue_flush_queue(struct data_queue *queue, bool drop); 135333aca94dSKalle Valo 135433aca94dSKalle Valo /** 135533aca94dSKalle Valo * rt2x00queue_start_queues - Start all data queues 135633aca94dSKalle Valo * @rt2x00dev: Pointer to &struct rt2x00_dev. 135733aca94dSKalle Valo * 135833aca94dSKalle Valo * This function will loop through all available queues to start them 135933aca94dSKalle Valo */ 136033aca94dSKalle Valo void rt2x00queue_start_queues(struct rt2x00_dev *rt2x00dev); 136133aca94dSKalle Valo 136233aca94dSKalle Valo /** 136333aca94dSKalle Valo * rt2x00queue_stop_queues - Halt all data queues 136433aca94dSKalle Valo * @rt2x00dev: Pointer to &struct rt2x00_dev. 136533aca94dSKalle Valo * 136633aca94dSKalle Valo * This function will loop through all available queues to stop 136733aca94dSKalle Valo * any pending frames. 136833aca94dSKalle Valo */ 136933aca94dSKalle Valo void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev); 137033aca94dSKalle Valo 137133aca94dSKalle Valo /** 137233aca94dSKalle Valo * rt2x00queue_flush_queues - Flush all data queues 137333aca94dSKalle Valo * @rt2x00dev: Pointer to &struct rt2x00_dev. 137433aca94dSKalle Valo * @drop: True to drop all pending frames. 137533aca94dSKalle Valo * 137633aca94dSKalle Valo * This function will loop through all available queues to flush 137733aca94dSKalle Valo * any pending frames. 137833aca94dSKalle Valo */ 137933aca94dSKalle Valo void rt2x00queue_flush_queues(struct rt2x00_dev *rt2x00dev, bool drop); 138033aca94dSKalle Valo 138133aca94dSKalle Valo /* 138233aca94dSKalle Valo * Debugfs handlers. 138333aca94dSKalle Valo */ 138433aca94dSKalle Valo /** 138533aca94dSKalle Valo * rt2x00debug_dump_frame - Dump a frame to userspace through debugfs. 138633aca94dSKalle Valo * @rt2x00dev: Pointer to &struct rt2x00_dev. 138733aca94dSKalle Valo * @type: The type of frame that is being dumped. 138833aca94dSKalle Valo * @skb: The skb containing the frame to be dumped. 138933aca94dSKalle Valo */ 139033aca94dSKalle Valo #ifdef CONFIG_RT2X00_LIB_DEBUGFS 139133aca94dSKalle Valo void rt2x00debug_dump_frame(struct rt2x00_dev *rt2x00dev, 139233aca94dSKalle Valo enum rt2x00_dump_type type, struct sk_buff *skb); 139333aca94dSKalle Valo #else 139433aca94dSKalle Valo static inline void rt2x00debug_dump_frame(struct rt2x00_dev *rt2x00dev, 139533aca94dSKalle Valo enum rt2x00_dump_type type, 139633aca94dSKalle Valo struct sk_buff *skb) 139733aca94dSKalle Valo { 139833aca94dSKalle Valo } 139933aca94dSKalle Valo #endif /* CONFIG_RT2X00_LIB_DEBUGFS */ 140033aca94dSKalle Valo 140133aca94dSKalle Valo /* 140233aca94dSKalle Valo * Utility functions. 140333aca94dSKalle Valo */ 140433aca94dSKalle Valo u32 rt2x00lib_get_bssidx(struct rt2x00_dev *rt2x00dev, 140533aca94dSKalle Valo struct ieee80211_vif *vif); 140633aca94dSKalle Valo 140733aca94dSKalle Valo /* 140833aca94dSKalle Valo * Interrupt context handlers. 140933aca94dSKalle Valo */ 141033aca94dSKalle Valo void rt2x00lib_beacondone(struct rt2x00_dev *rt2x00dev); 141133aca94dSKalle Valo void rt2x00lib_pretbtt(struct rt2x00_dev *rt2x00dev); 141233aca94dSKalle Valo void rt2x00lib_dmastart(struct queue_entry *entry); 141333aca94dSKalle Valo void rt2x00lib_dmadone(struct queue_entry *entry); 141433aca94dSKalle Valo void rt2x00lib_txdone(struct queue_entry *entry, 141533aca94dSKalle Valo struct txdone_entry_desc *txdesc); 141633aca94dSKalle Valo void rt2x00lib_txdone_noinfo(struct queue_entry *entry, u32 status); 141733aca94dSKalle Valo void rt2x00lib_rxdone(struct queue_entry *entry, gfp_t gfp); 141833aca94dSKalle Valo 141933aca94dSKalle Valo /* 142033aca94dSKalle Valo * mac80211 handlers. 142133aca94dSKalle Valo */ 142233aca94dSKalle Valo void rt2x00mac_tx(struct ieee80211_hw *hw, 142333aca94dSKalle Valo struct ieee80211_tx_control *control, 142433aca94dSKalle Valo struct sk_buff *skb); 142533aca94dSKalle Valo int rt2x00mac_start(struct ieee80211_hw *hw); 142633aca94dSKalle Valo void rt2x00mac_stop(struct ieee80211_hw *hw); 142733aca94dSKalle Valo int rt2x00mac_add_interface(struct ieee80211_hw *hw, 142833aca94dSKalle Valo struct ieee80211_vif *vif); 142933aca94dSKalle Valo void rt2x00mac_remove_interface(struct ieee80211_hw *hw, 143033aca94dSKalle Valo struct ieee80211_vif *vif); 143133aca94dSKalle Valo int rt2x00mac_config(struct ieee80211_hw *hw, u32 changed); 143233aca94dSKalle Valo void rt2x00mac_configure_filter(struct ieee80211_hw *hw, 143333aca94dSKalle Valo unsigned int changed_flags, 143433aca94dSKalle Valo unsigned int *total_flags, 143533aca94dSKalle Valo u64 multicast); 143633aca94dSKalle Valo int rt2x00mac_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta, 143733aca94dSKalle Valo bool set); 143833aca94dSKalle Valo #ifdef CONFIG_RT2X00_LIB_CRYPTO 143933aca94dSKalle Valo int rt2x00mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, 144033aca94dSKalle Valo struct ieee80211_vif *vif, struct ieee80211_sta *sta, 144133aca94dSKalle Valo struct ieee80211_key_conf *key); 144233aca94dSKalle Valo #else 144333aca94dSKalle Valo #define rt2x00mac_set_key NULL 144433aca94dSKalle Valo #endif /* CONFIG_RT2X00_LIB_CRYPTO */ 144533aca94dSKalle Valo int rt2x00mac_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 144633aca94dSKalle Valo struct ieee80211_sta *sta); 144733aca94dSKalle Valo int rt2x00mac_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 144833aca94dSKalle Valo struct ieee80211_sta *sta); 144933aca94dSKalle Valo void rt2x00mac_sw_scan_start(struct ieee80211_hw *hw, 145033aca94dSKalle Valo struct ieee80211_vif *vif, 145133aca94dSKalle Valo const u8 *mac_addr); 145233aca94dSKalle Valo void rt2x00mac_sw_scan_complete(struct ieee80211_hw *hw, 145333aca94dSKalle Valo struct ieee80211_vif *vif); 145433aca94dSKalle Valo int rt2x00mac_get_stats(struct ieee80211_hw *hw, 145533aca94dSKalle Valo struct ieee80211_low_level_stats *stats); 145633aca94dSKalle Valo void rt2x00mac_bss_info_changed(struct ieee80211_hw *hw, 145733aca94dSKalle Valo struct ieee80211_vif *vif, 145833aca94dSKalle Valo struct ieee80211_bss_conf *bss_conf, 145933aca94dSKalle Valo u32 changes); 146033aca94dSKalle Valo int rt2x00mac_conf_tx(struct ieee80211_hw *hw, 146133aca94dSKalle Valo struct ieee80211_vif *vif, u16 queue, 146233aca94dSKalle Valo const struct ieee80211_tx_queue_params *params); 146333aca94dSKalle Valo void rt2x00mac_rfkill_poll(struct ieee80211_hw *hw); 146433aca94dSKalle Valo void rt2x00mac_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 146533aca94dSKalle Valo u32 queues, bool drop); 146633aca94dSKalle Valo int rt2x00mac_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant); 146733aca94dSKalle Valo int rt2x00mac_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant); 146833aca94dSKalle Valo void rt2x00mac_get_ringparam(struct ieee80211_hw *hw, 146933aca94dSKalle Valo u32 *tx, u32 *tx_max, u32 *rx, u32 *rx_max); 147033aca94dSKalle Valo bool rt2x00mac_tx_frames_pending(struct ieee80211_hw *hw); 147133aca94dSKalle Valo 147233aca94dSKalle Valo /* 147333aca94dSKalle Valo * Driver allocation handlers. 147433aca94dSKalle Valo */ 147533aca94dSKalle Valo int rt2x00lib_probe_dev(struct rt2x00_dev *rt2x00dev); 147633aca94dSKalle Valo void rt2x00lib_remove_dev(struct rt2x00_dev *rt2x00dev); 147733aca94dSKalle Valo #ifdef CONFIG_PM 147833aca94dSKalle Valo int rt2x00lib_suspend(struct rt2x00_dev *rt2x00dev, pm_message_t state); 147933aca94dSKalle Valo int rt2x00lib_resume(struct rt2x00_dev *rt2x00dev); 148033aca94dSKalle Valo #endif /* CONFIG_PM */ 148133aca94dSKalle Valo 148233aca94dSKalle Valo #endif /* RT2X00_H */ 1483