11ccea77eSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */
233aca94dSKalle Valo /*
333aca94dSKalle Valo Copyright (C) 2010 Willow Garage <http://www.willowgarage.com>
433aca94dSKalle Valo Copyright (C) 2004 - 2010 Ivo van Doorn <IvDoorn@gmail.com>
533aca94dSKalle Valo Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
633aca94dSKalle Valo <http://rt2x00.serialmonkey.com>
733aca94dSKalle Valo
833aca94dSKalle Valo */
933aca94dSKalle Valo
1033aca94dSKalle Valo /*
1133aca94dSKalle Valo Module: rt2x00
1233aca94dSKalle Valo Abstract: rt2x00 global information.
1333aca94dSKalle Valo */
1433aca94dSKalle Valo
1533aca94dSKalle Valo #ifndef RT2X00_H
1633aca94dSKalle Valo #define RT2X00_H
1733aca94dSKalle Valo
1833aca94dSKalle Valo #include <linux/bitops.h>
1933aca94dSKalle Valo #include <linux/interrupt.h>
2033aca94dSKalle Valo #include <linux/skbuff.h>
2133aca94dSKalle Valo #include <linux/workqueue.h>
2233aca94dSKalle Valo #include <linux/firmware.h>
2333aca94dSKalle Valo #include <linux/leds.h>
2433aca94dSKalle Valo #include <linux/mutex.h>
2533aca94dSKalle Valo #include <linux/etherdevice.h>
2633aca94dSKalle Valo #include <linux/kfifo.h>
2733aca94dSKalle Valo #include <linux/hrtimer.h>
2833aca94dSKalle Valo #include <linux/average.h>
298b4c0009SVishal Thanki #include <linux/usb.h>
3034db70b9SStanislaw Gruszka #include <linux/clk.h>
3133aca94dSKalle Valo
3233aca94dSKalle Valo #include <net/mac80211.h>
3333aca94dSKalle Valo
3433aca94dSKalle Valo #include "rt2x00debug.h"
3533aca94dSKalle Valo #include "rt2x00dump.h"
3633aca94dSKalle Valo #include "rt2x00leds.h"
3733aca94dSKalle Valo #include "rt2x00reg.h"
3833aca94dSKalle Valo #include "rt2x00queue.h"
3933aca94dSKalle Valo
4033aca94dSKalle Valo /*
4133aca94dSKalle Valo * Module information.
4233aca94dSKalle Valo */
4333aca94dSKalle Valo #define DRV_VERSION "2.3.0"
4433aca94dSKalle Valo #define DRV_PROJECT "http://rt2x00.serialmonkey.com"
4533aca94dSKalle Valo
4633aca94dSKalle Valo /* Debug definitions.
4733aca94dSKalle Valo * Debug output has to be enabled during compile time.
4833aca94dSKalle Valo */
4933aca94dSKalle Valo #ifdef CONFIG_RT2X00_DEBUG
5033aca94dSKalle Valo #define DEBUG
5133aca94dSKalle Valo #endif /* CONFIG_RT2X00_DEBUG */
5233aca94dSKalle Valo
5333aca94dSKalle Valo /* Utility printing macros
5433aca94dSKalle Valo * rt2x00_probe_err is for messages when rt2x00_dev is uninitialized
5533aca94dSKalle Valo */
5633aca94dSKalle Valo #define rt2x00_probe_err(fmt, ...) \
5733aca94dSKalle Valo printk(KERN_ERR KBUILD_MODNAME ": %s: Error - " fmt, \
5833aca94dSKalle Valo __func__, ##__VA_ARGS__)
5933aca94dSKalle Valo #define rt2x00_err(dev, fmt, ...) \
60bb3b18c9SStanislaw Gruszka wiphy_err_ratelimited((dev)->hw->wiphy, "%s: Error - " fmt, \
6133aca94dSKalle Valo __func__, ##__VA_ARGS__)
6233aca94dSKalle Valo #define rt2x00_warn(dev, fmt, ...) \
63bb3b18c9SStanislaw Gruszka wiphy_warn_ratelimited((dev)->hw->wiphy, "%s: Warning - " fmt, \
6433aca94dSKalle Valo __func__, ##__VA_ARGS__)
6533aca94dSKalle Valo #define rt2x00_info(dev, fmt, ...) \
6633aca94dSKalle Valo wiphy_info((dev)->hw->wiphy, "%s: Info - " fmt, \
6733aca94dSKalle Valo __func__, ##__VA_ARGS__)
6833aca94dSKalle Valo
6933aca94dSKalle Valo /* Various debug levels */
7033aca94dSKalle Valo #define rt2x00_dbg(dev, fmt, ...) \
7133aca94dSKalle Valo wiphy_dbg((dev)->hw->wiphy, "%s: Debug - " fmt, \
7233aca94dSKalle Valo __func__, ##__VA_ARGS__)
7333aca94dSKalle Valo #define rt2x00_eeprom_dbg(dev, fmt, ...) \
7433aca94dSKalle Valo wiphy_dbg((dev)->hw->wiphy, "%s: EEPROM recovery - " fmt, \
7533aca94dSKalle Valo __func__, ##__VA_ARGS__)
7633aca94dSKalle Valo
7733aca94dSKalle Valo /*
7833aca94dSKalle Valo * Duration calculations
7933aca94dSKalle Valo * The rate variable passed is: 100kbs.
8033aca94dSKalle Valo * To convert from bytes to bits we multiply size with 8,
8133aca94dSKalle Valo * then the size is multiplied with 10 to make the
8233aca94dSKalle Valo * real rate -> rate argument correction.
8333aca94dSKalle Valo */
8433aca94dSKalle Valo #define GET_DURATION(__size, __rate) (((__size) * 8 * 10) / (__rate))
8533aca94dSKalle Valo #define GET_DURATION_RES(__size, __rate)(((__size) * 8 * 10) % (__rate))
8633aca94dSKalle Valo
8733aca94dSKalle Valo /*
8833aca94dSKalle Valo * Determine the number of L2 padding bytes required between the header and
8933aca94dSKalle Valo * the payload.
9033aca94dSKalle Valo */
9133aca94dSKalle Valo #define L2PAD_SIZE(__hdrlen) (-(__hdrlen) & 3)
9233aca94dSKalle Valo
9333aca94dSKalle Valo /*
9433aca94dSKalle Valo * Determine the alignment requirement,
9533aca94dSKalle Valo * to make sure the 802.11 payload is padded to a 4-byte boundrary
9633aca94dSKalle Valo * we must determine the address of the payload and calculate the
9733aca94dSKalle Valo * amount of bytes needed to move the data.
9833aca94dSKalle Valo */
9933aca94dSKalle Valo #define ALIGN_SIZE(__skb, __header) \
10033aca94dSKalle Valo (((unsigned long)((__skb)->data + (__header))) & 3)
10133aca94dSKalle Valo
10233aca94dSKalle Valo /*
10333aca94dSKalle Valo * Constants for extra TX headroom for alignment purposes.
10433aca94dSKalle Valo */
10533aca94dSKalle Valo #define RT2X00_ALIGN_SIZE 4 /* Only whole frame needs alignment */
10633aca94dSKalle Valo #define RT2X00_L2PAD_SIZE 8 /* Both header & payload need alignment */
10733aca94dSKalle Valo
10833aca94dSKalle Valo /*
10933aca94dSKalle Valo * Standard timing and size defines.
11033aca94dSKalle Valo * These values should follow the ieee80211 specifications.
11133aca94dSKalle Valo */
11233aca94dSKalle Valo #define ACK_SIZE 14
11333aca94dSKalle Valo #define IEEE80211_HEADER 24
11433aca94dSKalle Valo #define PLCP 48
11533aca94dSKalle Valo #define BEACON 100
11633aca94dSKalle Valo #define PREAMBLE 144
11733aca94dSKalle Valo #define SHORT_PREAMBLE 72
11833aca94dSKalle Valo #define SLOT_TIME 20
11933aca94dSKalle Valo #define SHORT_SLOT_TIME 9
12033aca94dSKalle Valo #define SIFS 10
12133aca94dSKalle Valo #define PIFS (SIFS + SLOT_TIME)
12233aca94dSKalle Valo #define SHORT_PIFS (SIFS + SHORT_SLOT_TIME)
12333aca94dSKalle Valo #define DIFS (PIFS + SLOT_TIME)
12433aca94dSKalle Valo #define SHORT_DIFS (SHORT_PIFS + SHORT_SLOT_TIME)
12533aca94dSKalle Valo #define EIFS (SIFS + DIFS + \
12633aca94dSKalle Valo GET_DURATION(IEEE80211_HEADER + ACK_SIZE, 10))
12733aca94dSKalle Valo #define SHORT_EIFS (SIFS + SHORT_DIFS + \
12833aca94dSKalle Valo GET_DURATION(IEEE80211_HEADER + ACK_SIZE, 10))
12933aca94dSKalle Valo
13033aca94dSKalle Valo enum rt2x00_chip_intf {
13133aca94dSKalle Valo RT2X00_CHIP_INTF_PCI,
13233aca94dSKalle Valo RT2X00_CHIP_INTF_PCIE,
13333aca94dSKalle Valo RT2X00_CHIP_INTF_USB,
13433aca94dSKalle Valo RT2X00_CHIP_INTF_SOC,
13533aca94dSKalle Valo };
13633aca94dSKalle Valo
13733aca94dSKalle Valo /*
13833aca94dSKalle Valo * Chipset identification
13933aca94dSKalle Valo * The chipset on the device is composed of a RT and RF chip.
14033aca94dSKalle Valo * The chipset combination is important for determining device capabilities.
14133aca94dSKalle Valo */
14233aca94dSKalle Valo struct rt2x00_chip {
14333aca94dSKalle Valo u16 rt;
14433aca94dSKalle Valo #define RT2460 0x2460
14533aca94dSKalle Valo #define RT2560 0x2560
14633aca94dSKalle Valo #define RT2570 0x2570
14733aca94dSKalle Valo #define RT2661 0x2661
14833aca94dSKalle Valo #define RT2573 0x2573
14933aca94dSKalle Valo #define RT2860 0x2860 /* 2.4GHz */
15033aca94dSKalle Valo #define RT2872 0x2872 /* WSOC */
15133aca94dSKalle Valo #define RT2883 0x2883 /* WSOC */
15233aca94dSKalle Valo #define RT3070 0x3070
15333aca94dSKalle Valo #define RT3071 0x3071
15433aca94dSKalle Valo #define RT3090 0x3090 /* 2.4GHz PCIe */
15533aca94dSKalle Valo #define RT3290 0x3290
15633aca94dSKalle Valo #define RT3352 0x3352 /* WSOC */
15733aca94dSKalle Valo #define RT3390 0x3390
15833aca94dSKalle Valo #define RT3572 0x3572
15933aca94dSKalle Valo #define RT3593 0x3593
16033aca94dSKalle Valo #define RT3883 0x3883 /* WSOC */
16198e71f44SSerge Vasilugin #define RT5350 0x5350 /* WSOC 2.4GHz */
16233aca94dSKalle Valo #define RT5390 0x5390 /* 2.4GHz */
16333aca94dSKalle Valo #define RT5392 0x5392 /* 2.4GHz */
16433aca94dSKalle Valo #define RT5592 0x5592
16541977e86SRoman Yeryomin #define RT6352 0x6352 /* WSOC 2.4GHz */
16633aca94dSKalle Valo
16733aca94dSKalle Valo u16 rf;
16833aca94dSKalle Valo u16 rev;
16933aca94dSKalle Valo
17033aca94dSKalle Valo enum rt2x00_chip_intf intf;
17133aca94dSKalle Valo };
17233aca94dSKalle Valo
17333aca94dSKalle Valo /*
17433aca94dSKalle Valo * RF register values that belong to a particular channel.
17533aca94dSKalle Valo */
17633aca94dSKalle Valo struct rf_channel {
17733aca94dSKalle Valo int channel;
17833aca94dSKalle Valo u32 rf1;
17933aca94dSKalle Valo u32 rf2;
18033aca94dSKalle Valo u32 rf3;
18133aca94dSKalle Valo u32 rf4;
18233aca94dSKalle Valo };
18333aca94dSKalle Valo
18433aca94dSKalle Valo /*
18554476269SMarkov Mikhail * Information structure for channel survey.
18654476269SMarkov Mikhail */
18754476269SMarkov Mikhail struct rt2x00_chan_survey {
18854476269SMarkov Mikhail u64 time_idle;
18954476269SMarkov Mikhail u64 time_busy;
19054476269SMarkov Mikhail u64 time_ext_busy;
19154476269SMarkov Mikhail };
19254476269SMarkov Mikhail
19354476269SMarkov Mikhail /*
19433aca94dSKalle Valo * Channel information structure
19533aca94dSKalle Valo */
19633aca94dSKalle Valo struct channel_info {
19733aca94dSKalle Valo unsigned int flags;
19833aca94dSKalle Valo #define GEOGRAPHY_ALLOWED 0x00000001
19933aca94dSKalle Valo
20033aca94dSKalle Valo short max_power;
20133aca94dSKalle Valo short default_power1;
20233aca94dSKalle Valo short default_power2;
20333aca94dSKalle Valo short default_power3;
20433aca94dSKalle Valo };
20533aca94dSKalle Valo
20633aca94dSKalle Valo /*
20733aca94dSKalle Valo * Antenna setup values.
20833aca94dSKalle Valo */
20933aca94dSKalle Valo struct antenna_setup {
21033aca94dSKalle Valo enum antenna rx;
21133aca94dSKalle Valo enum antenna tx;
21233aca94dSKalle Valo u8 rx_chain_num;
21333aca94dSKalle Valo u8 tx_chain_num;
21433aca94dSKalle Valo };
21533aca94dSKalle Valo
21633aca94dSKalle Valo /*
21733aca94dSKalle Valo * Quality statistics about the currently active link.
21833aca94dSKalle Valo */
21933aca94dSKalle Valo struct link_qual {
22033aca94dSKalle Valo /*
22133aca94dSKalle Valo * Statistics required for Link tuning by driver
22233aca94dSKalle Valo * The rssi value is provided by rt2x00lib during the
22333aca94dSKalle Valo * link_tuner() callback function.
22433aca94dSKalle Valo * The false_cca field is filled during the link_stats()
22533aca94dSKalle Valo * callback function and could be used during the
22633aca94dSKalle Valo * link_tuner() callback function.
22733aca94dSKalle Valo */
22833aca94dSKalle Valo int rssi;
22933aca94dSKalle Valo int false_cca;
23033aca94dSKalle Valo
23133aca94dSKalle Valo /*
23233aca94dSKalle Valo * VGC levels
23333aca94dSKalle Valo * Hardware driver will tune the VGC level during each call
23433aca94dSKalle Valo * to the link_tuner() callback function. This vgc_level is
235a319b7f0SJilin Yuan * determined based on the link quality statistics like
23633aca94dSKalle Valo * average RSSI and the false CCA count.
23733aca94dSKalle Valo *
23833aca94dSKalle Valo * In some cases the drivers need to differentiate between
23933aca94dSKalle Valo * the currently "desired" VGC level and the level configured
24033aca94dSKalle Valo * in the hardware. The latter is important to reduce the
24133aca94dSKalle Valo * number of BBP register reads to reduce register access
24233aca94dSKalle Valo * overhead. For this reason we store both values here.
24333aca94dSKalle Valo */
24433aca94dSKalle Valo u8 vgc_level;
24533aca94dSKalle Valo u8 vgc_level_reg;
24633aca94dSKalle Valo
24733aca94dSKalle Valo /*
24833aca94dSKalle Valo * Statistics required for Signal quality calculation.
24933aca94dSKalle Valo * These fields might be changed during the link_stats()
25033aca94dSKalle Valo * callback function.
25133aca94dSKalle Valo */
25233aca94dSKalle Valo int rx_success;
25333aca94dSKalle Valo int rx_failed;
25433aca94dSKalle Valo int tx_success;
25533aca94dSKalle Valo int tx_failed;
25633aca94dSKalle Valo };
25733aca94dSKalle Valo
258eb1e011aSJohannes Berg DECLARE_EWMA(rssi, 10, 8)
25933aca94dSKalle Valo
26033aca94dSKalle Valo /*
26133aca94dSKalle Valo * Antenna settings about the currently active link.
26233aca94dSKalle Valo */
26333aca94dSKalle Valo struct link_ant {
26433aca94dSKalle Valo /*
26533aca94dSKalle Valo * Antenna flags
26633aca94dSKalle Valo */
26733aca94dSKalle Valo unsigned int flags;
26833aca94dSKalle Valo #define ANTENNA_RX_DIVERSITY 0x00000001
26933aca94dSKalle Valo #define ANTENNA_TX_DIVERSITY 0x00000002
27033aca94dSKalle Valo #define ANTENNA_MODE_SAMPLE 0x00000004
27133aca94dSKalle Valo
27233aca94dSKalle Valo /*
27333aca94dSKalle Valo * Currently active TX/RX antenna setup.
27433aca94dSKalle Valo * When software diversity is used, this will indicate
27533aca94dSKalle Valo * which antenna is actually used at this time.
27633aca94dSKalle Valo */
27733aca94dSKalle Valo struct antenna_setup active;
27833aca94dSKalle Valo
27933aca94dSKalle Valo /*
28033aca94dSKalle Valo * RSSI history information for the antenna.
28133aca94dSKalle Valo * Used to determine when to switch antenna
28233aca94dSKalle Valo * when using software diversity.
28333aca94dSKalle Valo */
28433aca94dSKalle Valo int rssi_history;
28533aca94dSKalle Valo
28633aca94dSKalle Valo /*
28733aca94dSKalle Valo * Current RSSI average of the currently active antenna.
28833aca94dSKalle Valo * Similar to the avg_rssi in the link_qual structure
28933aca94dSKalle Valo * this value is updated by using the walking average.
29033aca94dSKalle Valo */
29133aca94dSKalle Valo struct ewma_rssi rssi_ant;
29233aca94dSKalle Valo };
29333aca94dSKalle Valo
29433aca94dSKalle Valo /*
29533aca94dSKalle Valo * To optimize the quality of the link we need to store
29633aca94dSKalle Valo * the quality of received frames and periodically
29733aca94dSKalle Valo * optimize the link.
29833aca94dSKalle Valo */
29933aca94dSKalle Valo struct link {
30033aca94dSKalle Valo /*
30133aca94dSKalle Valo * Link tuner counter
30233aca94dSKalle Valo * The number of times the link has been tuned
30333aca94dSKalle Valo * since the radio has been switched on.
30433aca94dSKalle Valo */
30533aca94dSKalle Valo u32 count;
30633aca94dSKalle Valo
30733aca94dSKalle Valo /*
30833aca94dSKalle Valo * Quality measurement values.
30933aca94dSKalle Valo */
31033aca94dSKalle Valo struct link_qual qual;
31133aca94dSKalle Valo
31233aca94dSKalle Valo /*
31333aca94dSKalle Valo * TX/RX antenna setup.
31433aca94dSKalle Valo */
31533aca94dSKalle Valo struct link_ant ant;
31633aca94dSKalle Valo
31733aca94dSKalle Valo /*
31833aca94dSKalle Valo * Currently active average RSSI value
31933aca94dSKalle Valo */
32033aca94dSKalle Valo struct ewma_rssi avg_rssi;
32133aca94dSKalle Valo
32233aca94dSKalle Valo /*
32333aca94dSKalle Valo * Work structure for scheduling periodic link tuning.
32433aca94dSKalle Valo */
32533aca94dSKalle Valo struct delayed_work work;
32633aca94dSKalle Valo
32733aca94dSKalle Valo /*
32833aca94dSKalle Valo * Work structure for scheduling periodic watchdog monitoring.
32933aca94dSKalle Valo * This work must be scheduled on the kernel workqueue, while
33033aca94dSKalle Valo * all other work structures must be queued on the mac80211
33133aca94dSKalle Valo * workqueue. This guarantees that the watchdog can schedule
33233aca94dSKalle Valo * other work structures and wait for their completion in order
33333aca94dSKalle Valo * to bring the device/driver back into the desired state.
33433aca94dSKalle Valo */
33533aca94dSKalle Valo struct delayed_work watchdog_work;
3369f3e3323SStanislaw Gruszka unsigned int watchdog_interval;
3370f47aeeaSStanislaw Gruszka bool watchdog_disabled;
33833aca94dSKalle Valo
33933aca94dSKalle Valo /*
34033aca94dSKalle Valo * Work structure for scheduling periodic AGC adjustments.
34133aca94dSKalle Valo */
34233aca94dSKalle Valo struct delayed_work agc_work;
34333aca94dSKalle Valo
34433aca94dSKalle Valo /*
34533aca94dSKalle Valo * Work structure for scheduling periodic VCO calibration.
34633aca94dSKalle Valo */
34733aca94dSKalle Valo struct delayed_work vco_work;
34833aca94dSKalle Valo };
34933aca94dSKalle Valo
35033aca94dSKalle Valo enum rt2x00_delayed_flags {
35133aca94dSKalle Valo DELAYED_UPDATE_BEACON,
35233aca94dSKalle Valo };
35333aca94dSKalle Valo
35433aca94dSKalle Valo /*
35533aca94dSKalle Valo * Interface structure
35633aca94dSKalle Valo * Per interface configuration details, this structure
35733aca94dSKalle Valo * is allocated as the private data for ieee80211_vif.
35833aca94dSKalle Valo */
35933aca94dSKalle Valo struct rt2x00_intf {
36033aca94dSKalle Valo /*
36133aca94dSKalle Valo * beacon->skb must be protected with the mutex.
36233aca94dSKalle Valo */
36333aca94dSKalle Valo struct mutex beacon_skb_mutex;
36433aca94dSKalle Valo
36533aca94dSKalle Valo /*
36633aca94dSKalle Valo * Entry in the beacon queue which belongs to
36733aca94dSKalle Valo * this interface. Each interface has its own
36833aca94dSKalle Valo * dedicated beacon entry.
36933aca94dSKalle Valo */
37033aca94dSKalle Valo struct queue_entry *beacon;
37133aca94dSKalle Valo bool enable_beacon;
37233aca94dSKalle Valo
37333aca94dSKalle Valo /*
37433aca94dSKalle Valo * Actions that needed rescheduling.
37533aca94dSKalle Valo */
37633aca94dSKalle Valo unsigned long delayed_flags;
37733aca94dSKalle Valo
37833aca94dSKalle Valo /*
37933aca94dSKalle Valo * Software sequence counter, this is only required
38033aca94dSKalle Valo * for hardware which doesn't support hardware
38133aca94dSKalle Valo * sequence counting.
38233aca94dSKalle Valo */
38333aca94dSKalle Valo atomic_t seqno;
38433aca94dSKalle Valo };
38533aca94dSKalle Valo
vif_to_intf(struct ieee80211_vif * vif)38633aca94dSKalle Valo static inline struct rt2x00_intf* vif_to_intf(struct ieee80211_vif *vif)
38733aca94dSKalle Valo {
38833aca94dSKalle Valo return (struct rt2x00_intf *)vif->drv_priv;
38933aca94dSKalle Valo }
39033aca94dSKalle Valo
39133aca94dSKalle Valo /**
39233aca94dSKalle Valo * struct hw_mode_spec: Hardware specifications structure
39333aca94dSKalle Valo *
39433aca94dSKalle Valo * Details about the supported modes, rates and channels
39533aca94dSKalle Valo * of a particular chipset. This is used by rt2x00lib
39633aca94dSKalle Valo * to build the ieee80211_hw_mode array for mac80211.
39733aca94dSKalle Valo *
39833aca94dSKalle Valo * @supported_bands: Bitmask contained the supported bands (2.4GHz, 5.2GHz).
39933aca94dSKalle Valo * @supported_rates: Rate types which are supported (CCK, OFDM).
40033aca94dSKalle Valo * @num_channels: Number of supported channels. This is used as array size
40133aca94dSKalle Valo * for @tx_power_a, @tx_power_bg and @channels.
40233aca94dSKalle Valo * @channels: Device/chipset specific channel values (See &struct rf_channel).
40333aca94dSKalle Valo * @channels_info: Additional information for channels (See &struct channel_info).
40433aca94dSKalle Valo * @ht: Driver HT Capabilities (See &ieee80211_sta_ht_cap).
40533aca94dSKalle Valo */
40633aca94dSKalle Valo struct hw_mode_spec {
40733aca94dSKalle Valo unsigned int supported_bands;
40833aca94dSKalle Valo #define SUPPORT_BAND_2GHZ 0x00000001
40933aca94dSKalle Valo #define SUPPORT_BAND_5GHZ 0x00000002
41033aca94dSKalle Valo
41133aca94dSKalle Valo unsigned int supported_rates;
41233aca94dSKalle Valo #define SUPPORT_RATE_CCK 0x00000001
41333aca94dSKalle Valo #define SUPPORT_RATE_OFDM 0x00000002
41433aca94dSKalle Valo
41533aca94dSKalle Valo unsigned int num_channels;
41633aca94dSKalle Valo const struct rf_channel *channels;
41733aca94dSKalle Valo const struct channel_info *channels_info;
41833aca94dSKalle Valo
41933aca94dSKalle Valo struct ieee80211_sta_ht_cap ht;
42033aca94dSKalle Valo };
42133aca94dSKalle Valo
42233aca94dSKalle Valo /*
42333aca94dSKalle Valo * Configuration structure wrapper around the
42433aca94dSKalle Valo * mac80211 configuration structure.
42533aca94dSKalle Valo * When mac80211 configures the driver, rt2x00lib
42633aca94dSKalle Valo * can precalculate values which are equal for all
42733aca94dSKalle Valo * rt2x00 drivers. Those values can be stored in here.
42833aca94dSKalle Valo */
42933aca94dSKalle Valo struct rt2x00lib_conf {
43033aca94dSKalle Valo struct ieee80211_conf *conf;
43133aca94dSKalle Valo
43233aca94dSKalle Valo struct rf_channel rf;
43333aca94dSKalle Valo struct channel_info channel;
43433aca94dSKalle Valo };
43533aca94dSKalle Valo
43633aca94dSKalle Valo /*
43733aca94dSKalle Valo * Configuration structure for erp settings.
43833aca94dSKalle Valo */
43933aca94dSKalle Valo struct rt2x00lib_erp {
44033aca94dSKalle Valo int short_preamble;
44133aca94dSKalle Valo int cts_protection;
44233aca94dSKalle Valo
44333aca94dSKalle Valo u32 basic_rates;
44433aca94dSKalle Valo
44533aca94dSKalle Valo int slot_time;
44633aca94dSKalle Valo
44733aca94dSKalle Valo short sifs;
44833aca94dSKalle Valo short pifs;
44933aca94dSKalle Valo short difs;
45033aca94dSKalle Valo short eifs;
45133aca94dSKalle Valo
45233aca94dSKalle Valo u16 beacon_int;
45333aca94dSKalle Valo u16 ht_opmode;
45433aca94dSKalle Valo };
45533aca94dSKalle Valo
45633aca94dSKalle Valo /*
45733aca94dSKalle Valo * Configuration structure for hardware encryption.
45833aca94dSKalle Valo */
45933aca94dSKalle Valo struct rt2x00lib_crypto {
46033aca94dSKalle Valo enum cipher cipher;
46133aca94dSKalle Valo
46233aca94dSKalle Valo enum set_key_cmd cmd;
46333aca94dSKalle Valo const u8 *address;
46433aca94dSKalle Valo
46533aca94dSKalle Valo u32 bssidx;
46633aca94dSKalle Valo
46733aca94dSKalle Valo u8 key[16];
46833aca94dSKalle Valo u8 tx_mic[8];
46933aca94dSKalle Valo u8 rx_mic[8];
47033aca94dSKalle Valo
47133aca94dSKalle Valo int wcid;
47233aca94dSKalle Valo };
47333aca94dSKalle Valo
47433aca94dSKalle Valo /*
47533aca94dSKalle Valo * Configuration structure wrapper around the
47633aca94dSKalle Valo * rt2x00 interface configuration handler.
47733aca94dSKalle Valo */
47833aca94dSKalle Valo struct rt2x00intf_conf {
47933aca94dSKalle Valo /*
48033aca94dSKalle Valo * Interface type
48133aca94dSKalle Valo */
48233aca94dSKalle Valo enum nl80211_iftype type;
48333aca94dSKalle Valo
48433aca94dSKalle Valo /*
48533aca94dSKalle Valo * TSF sync value, this is dependent on the operation type.
48633aca94dSKalle Valo */
48733aca94dSKalle Valo enum tsf_sync sync;
48833aca94dSKalle Valo
48933aca94dSKalle Valo /*
49033aca94dSKalle Valo * The MAC and BSSID addresses are simple array of bytes,
49133aca94dSKalle Valo * these arrays are little endian, so when sending the addresses
49233aca94dSKalle Valo * to the drivers, copy the it into a endian-signed variable.
49333aca94dSKalle Valo *
49433aca94dSKalle Valo * Note that all devices (except rt2500usb) have 32 bits
49533aca94dSKalle Valo * register word sizes. This means that whatever variable we
49633aca94dSKalle Valo * pass _must_ be a multiple of 32 bits. Otherwise the device
49733aca94dSKalle Valo * might not accept what we are sending to it.
49833aca94dSKalle Valo * This will also make it easier for the driver to write
49933aca94dSKalle Valo * the data to the device.
50033aca94dSKalle Valo */
50133aca94dSKalle Valo __le32 mac[2];
50233aca94dSKalle Valo __le32 bssid[2];
50333aca94dSKalle Valo };
50433aca94dSKalle Valo
50533aca94dSKalle Valo /*
50633aca94dSKalle Valo * Private structure for storing STA details
50733aca94dSKalle Valo * wcid: Wireless Client ID
50833aca94dSKalle Valo */
50933aca94dSKalle Valo struct rt2x00_sta {
51033aca94dSKalle Valo int wcid;
51133aca94dSKalle Valo };
51233aca94dSKalle Valo
sta_to_rt2x00_sta(struct ieee80211_sta * sta)51333aca94dSKalle Valo static inline struct rt2x00_sta* sta_to_rt2x00_sta(struct ieee80211_sta *sta)
51433aca94dSKalle Valo {
51533aca94dSKalle Valo return (struct rt2x00_sta *)sta->drv_priv;
51633aca94dSKalle Valo }
51733aca94dSKalle Valo
51833aca94dSKalle Valo /*
51933aca94dSKalle Valo * rt2x00lib callback functions.
52033aca94dSKalle Valo */
52133aca94dSKalle Valo struct rt2x00lib_ops {
52233aca94dSKalle Valo /*
52333aca94dSKalle Valo * Interrupt handlers.
52433aca94dSKalle Valo */
52533aca94dSKalle Valo irq_handler_t irq_handler;
52633aca94dSKalle Valo
52733aca94dSKalle Valo /*
52833aca94dSKalle Valo * TX status tasklet handler.
52933aca94dSKalle Valo */
530a0d6ea9bSAllen Pais void (*txstatus_tasklet) (struct tasklet_struct *t);
531a0d6ea9bSAllen Pais void (*pretbtt_tasklet) (struct tasklet_struct *t);
532a0d6ea9bSAllen Pais void (*tbtt_tasklet) (struct tasklet_struct *t);
533a0d6ea9bSAllen Pais void (*rxdone_tasklet) (struct tasklet_struct *t);
534a0d6ea9bSAllen Pais void (*autowake_tasklet) (struct tasklet_struct *t);
53533aca94dSKalle Valo
53633aca94dSKalle Valo /*
53733aca94dSKalle Valo * Device init handlers.
53833aca94dSKalle Valo */
53933aca94dSKalle Valo int (*probe_hw) (struct rt2x00_dev *rt2x00dev);
54033aca94dSKalle Valo char *(*get_firmware_name) (struct rt2x00_dev *rt2x00dev);
54133aca94dSKalle Valo int (*check_firmware) (struct rt2x00_dev *rt2x00dev,
54233aca94dSKalle Valo const u8 *data, const size_t len);
54333aca94dSKalle Valo int (*load_firmware) (struct rt2x00_dev *rt2x00dev,
54433aca94dSKalle Valo const u8 *data, const size_t len);
54533aca94dSKalle Valo
54633aca94dSKalle Valo /*
54733aca94dSKalle Valo * Device initialization/deinitialization handlers.
54833aca94dSKalle Valo */
54933aca94dSKalle Valo int (*initialize) (struct rt2x00_dev *rt2x00dev);
55033aca94dSKalle Valo void (*uninitialize) (struct rt2x00_dev *rt2x00dev);
55133aca94dSKalle Valo
55233aca94dSKalle Valo /*
55333aca94dSKalle Valo * queue initialization handlers
55433aca94dSKalle Valo */
55533aca94dSKalle Valo bool (*get_entry_state) (struct queue_entry *entry);
55633aca94dSKalle Valo void (*clear_entry) (struct queue_entry *entry);
55733aca94dSKalle Valo
55833aca94dSKalle Valo /*
55933aca94dSKalle Valo * Radio control handlers.
56033aca94dSKalle Valo */
56133aca94dSKalle Valo int (*set_device_state) (struct rt2x00_dev *rt2x00dev,
56233aca94dSKalle Valo enum dev_state state);
56333aca94dSKalle Valo int (*rfkill_poll) (struct rt2x00_dev *rt2x00dev);
56433aca94dSKalle Valo void (*link_stats) (struct rt2x00_dev *rt2x00dev,
56533aca94dSKalle Valo struct link_qual *qual);
56633aca94dSKalle Valo void (*reset_tuner) (struct rt2x00_dev *rt2x00dev,
56733aca94dSKalle Valo struct link_qual *qual);
56833aca94dSKalle Valo void (*link_tuner) (struct rt2x00_dev *rt2x00dev,
56933aca94dSKalle Valo struct link_qual *qual, const u32 count);
57033aca94dSKalle Valo void (*gain_calibration) (struct rt2x00_dev *rt2x00dev);
57133aca94dSKalle Valo void (*vco_calibration) (struct rt2x00_dev *rt2x00dev);
57233aca94dSKalle Valo
57333aca94dSKalle Valo /*
57433aca94dSKalle Valo * Data queue handlers.
57533aca94dSKalle Valo */
57633aca94dSKalle Valo void (*watchdog) (struct rt2x00_dev *rt2x00dev);
57733aca94dSKalle Valo void (*start_queue) (struct data_queue *queue);
57833aca94dSKalle Valo void (*kick_queue) (struct data_queue *queue);
57933aca94dSKalle Valo void (*stop_queue) (struct data_queue *queue);
58033aca94dSKalle Valo void (*flush_queue) (struct data_queue *queue, bool drop);
58133aca94dSKalle Valo void (*tx_dma_done) (struct queue_entry *entry);
58233aca94dSKalle Valo
58333aca94dSKalle Valo /*
58433aca94dSKalle Valo * TX control handlers
58533aca94dSKalle Valo */
58633aca94dSKalle Valo void (*write_tx_desc) (struct queue_entry *entry,
58733aca94dSKalle Valo struct txentry_desc *txdesc);
58833aca94dSKalle Valo void (*write_tx_data) (struct queue_entry *entry,
58933aca94dSKalle Valo struct txentry_desc *txdesc);
59033aca94dSKalle Valo void (*write_beacon) (struct queue_entry *entry,
59133aca94dSKalle Valo struct txentry_desc *txdesc);
59233aca94dSKalle Valo void (*clear_beacon) (struct queue_entry *entry);
59333aca94dSKalle Valo int (*get_tx_data_len) (struct queue_entry *entry);
59433aca94dSKalle Valo
59533aca94dSKalle Valo /*
59633aca94dSKalle Valo * RX control handlers
59733aca94dSKalle Valo */
59833aca94dSKalle Valo void (*fill_rxdone) (struct queue_entry *entry,
59933aca94dSKalle Valo struct rxdone_entry_desc *rxdesc);
60033aca94dSKalle Valo
60133aca94dSKalle Valo /*
60233aca94dSKalle Valo * Configuration handlers.
60333aca94dSKalle Valo */
60433aca94dSKalle Valo int (*config_shared_key) (struct rt2x00_dev *rt2x00dev,
60533aca94dSKalle Valo struct rt2x00lib_crypto *crypto,
60633aca94dSKalle Valo struct ieee80211_key_conf *key);
60733aca94dSKalle Valo int (*config_pairwise_key) (struct rt2x00_dev *rt2x00dev,
60833aca94dSKalle Valo struct rt2x00lib_crypto *crypto,
60933aca94dSKalle Valo struct ieee80211_key_conf *key);
61033aca94dSKalle Valo void (*config_filter) (struct rt2x00_dev *rt2x00dev,
61133aca94dSKalle Valo const unsigned int filter_flags);
61233aca94dSKalle Valo void (*config_intf) (struct rt2x00_dev *rt2x00dev,
61333aca94dSKalle Valo struct rt2x00_intf *intf,
61433aca94dSKalle Valo struct rt2x00intf_conf *conf,
61533aca94dSKalle Valo const unsigned int flags);
61633aca94dSKalle Valo #define CONFIG_UPDATE_TYPE ( 1 << 1 )
61733aca94dSKalle Valo #define CONFIG_UPDATE_MAC ( 1 << 2 )
61833aca94dSKalle Valo #define CONFIG_UPDATE_BSSID ( 1 << 3 )
61933aca94dSKalle Valo
62033aca94dSKalle Valo void (*config_erp) (struct rt2x00_dev *rt2x00dev,
62133aca94dSKalle Valo struct rt2x00lib_erp *erp,
62233aca94dSKalle Valo u32 changed);
62333aca94dSKalle Valo void (*config_ant) (struct rt2x00_dev *rt2x00dev,
62433aca94dSKalle Valo struct antenna_setup *ant);
62533aca94dSKalle Valo void (*config) (struct rt2x00_dev *rt2x00dev,
62633aca94dSKalle Valo struct rt2x00lib_conf *libconf,
62733aca94dSKalle Valo const unsigned int changed_flags);
62809db3b00SStanislaw Gruszka void (*pre_reset_hw) (struct rt2x00_dev *rt2x00dev);
62933aca94dSKalle Valo int (*sta_add) (struct rt2x00_dev *rt2x00dev,
63033aca94dSKalle Valo struct ieee80211_vif *vif,
63133aca94dSKalle Valo struct ieee80211_sta *sta);
63233aca94dSKalle Valo int (*sta_remove) (struct rt2x00_dev *rt2x00dev,
6338f03a7c6SStanislaw Gruszka struct ieee80211_sta *sta);
63433aca94dSKalle Valo };
63533aca94dSKalle Valo
63633aca94dSKalle Valo /*
63733aca94dSKalle Valo * rt2x00 driver callback operation structure.
63833aca94dSKalle Valo */
63933aca94dSKalle Valo struct rt2x00_ops {
64033aca94dSKalle Valo const char *name;
64133aca94dSKalle Valo const unsigned int drv_data_size;
64233aca94dSKalle Valo const unsigned int max_ap_intf;
64333aca94dSKalle Valo const unsigned int eeprom_size;
64433aca94dSKalle Valo const unsigned int rf_size;
64533aca94dSKalle Valo const unsigned int tx_queues;
64633aca94dSKalle Valo void (*queue_init)(struct data_queue *queue);
64733aca94dSKalle Valo const struct rt2x00lib_ops *lib;
64833aca94dSKalle Valo const void *drv;
64933aca94dSKalle Valo const struct ieee80211_ops *hw;
65033aca94dSKalle Valo #ifdef CONFIG_RT2X00_LIB_DEBUGFS
65133aca94dSKalle Valo const struct rt2x00debug *debugfs;
65233aca94dSKalle Valo #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
65333aca94dSKalle Valo };
65433aca94dSKalle Valo
65533aca94dSKalle Valo /*
65633aca94dSKalle Valo * rt2x00 state flags
65733aca94dSKalle Valo */
65833aca94dSKalle Valo enum rt2x00_state_flags {
65933aca94dSKalle Valo /*
66033aca94dSKalle Valo * Device flags
66133aca94dSKalle Valo */
66233aca94dSKalle Valo DEVICE_STATE_PRESENT,
66333aca94dSKalle Valo DEVICE_STATE_REGISTERED_HW,
66433aca94dSKalle Valo DEVICE_STATE_INITIALIZED,
66533aca94dSKalle Valo DEVICE_STATE_STARTED,
66633aca94dSKalle Valo DEVICE_STATE_ENABLED_RADIO,
66733aca94dSKalle Valo DEVICE_STATE_SCANNING,
668adf26a35SStanislaw Gruszka DEVICE_STATE_FLUSHING,
66995844124SStanislaw Gruszka DEVICE_STATE_RESET,
67033aca94dSKalle Valo
67133aca94dSKalle Valo /*
67233aca94dSKalle Valo * Driver configuration
67333aca94dSKalle Valo */
67433aca94dSKalle Valo CONFIG_CHANNEL_HT40,
67533aca94dSKalle Valo CONFIG_POWERSAVING,
67633aca94dSKalle Valo CONFIG_HT_DISABLED,
677262c741eSEli Cooper CONFIG_MONITORING,
67833aca94dSKalle Valo
67933aca94dSKalle Valo /*
68033aca94dSKalle Valo * Mark we currently are sequentially reading TX_STA_FIFO register
68133aca94dSKalle Valo * FIXME: this is for only rt2800usb, should go to private data
68233aca94dSKalle Valo */
68333aca94dSKalle Valo TX_STATUS_READING,
68433aca94dSKalle Valo };
68533aca94dSKalle Valo
68633aca94dSKalle Valo /*
68733aca94dSKalle Valo * rt2x00 capability flags
68833aca94dSKalle Valo */
68933aca94dSKalle Valo enum rt2x00_capability_flags {
69033aca94dSKalle Valo /*
69133aca94dSKalle Valo * Requirements
69233aca94dSKalle Valo */
69333aca94dSKalle Valo REQUIRE_FIRMWARE,
69433aca94dSKalle Valo REQUIRE_BEACON_GUARD,
69533aca94dSKalle Valo REQUIRE_ATIM_QUEUE,
69633aca94dSKalle Valo REQUIRE_DMA,
69733aca94dSKalle Valo REQUIRE_COPY_IV,
69833aca94dSKalle Valo REQUIRE_L2PAD,
69933aca94dSKalle Valo REQUIRE_TXSTATUS_FIFO,
70033aca94dSKalle Valo REQUIRE_TASKLET_CONTEXT,
70133aca94dSKalle Valo REQUIRE_SW_SEQNO,
70233aca94dSKalle Valo REQUIRE_HT_TX_DESC,
70333aca94dSKalle Valo REQUIRE_PS_AUTOWAKE,
70433aca94dSKalle Valo REQUIRE_DELAYED_RFKILL,
70533aca94dSKalle Valo
70633aca94dSKalle Valo /*
70733aca94dSKalle Valo * Capabilities
70833aca94dSKalle Valo */
70933aca94dSKalle Valo CAPABILITY_HW_BUTTON,
71033aca94dSKalle Valo CAPABILITY_HW_CRYPTO,
71133aca94dSKalle Valo CAPABILITY_POWER_LIMIT,
71233aca94dSKalle Valo CAPABILITY_CONTROL_FILTERS,
71333aca94dSKalle Valo CAPABILITY_CONTROL_FILTER_PSPOLL,
71433aca94dSKalle Valo CAPABILITY_PRE_TBTT_INTERRUPT,
71533aca94dSKalle Valo CAPABILITY_LINK_TUNING,
71633aca94dSKalle Valo CAPABILITY_FRAME_TYPE,
71733aca94dSKalle Valo CAPABILITY_RF_SEQUENCE,
71833aca94dSKalle Valo CAPABILITY_EXTERNAL_LNA_A,
71933aca94dSKalle Valo CAPABILITY_EXTERNAL_LNA_BG,
72033aca94dSKalle Valo CAPABILITY_DOUBLE_ANTENNA,
72133aca94dSKalle Valo CAPABILITY_BT_COEXIST,
72233aca94dSKalle Valo CAPABILITY_VCO_RECALIBRATION,
7231f242a3dSDaniel Golle CAPABILITY_EXTERNAL_PA_TX0,
7241f242a3dSDaniel Golle CAPABILITY_EXTERNAL_PA_TX1,
725e403fa31SStanislaw Gruszka CAPABILITY_RESTART_HW,
72633aca94dSKalle Valo };
72733aca94dSKalle Valo
72833aca94dSKalle Valo /*
72933aca94dSKalle Valo * Interface combinations
73033aca94dSKalle Valo */
73133aca94dSKalle Valo enum {
73233aca94dSKalle Valo IF_COMB_AP = 0,
73333aca94dSKalle Valo NUM_IF_COMB,
73433aca94dSKalle Valo };
73533aca94dSKalle Valo
73633aca94dSKalle Valo /*
73733aca94dSKalle Valo * rt2x00 device structure.
73833aca94dSKalle Valo */
73933aca94dSKalle Valo struct rt2x00_dev {
74033aca94dSKalle Valo /*
74133aca94dSKalle Valo * Device structure.
74233aca94dSKalle Valo * The structure stored in here depends on the
74333aca94dSKalle Valo * system bus (PCI or USB).
74433aca94dSKalle Valo * When accessing this variable, the rt2x00dev_{pci,usb}
74533aca94dSKalle Valo * macros should be used for correct typecasting.
74633aca94dSKalle Valo */
74733aca94dSKalle Valo struct device *dev;
74833aca94dSKalle Valo
74933aca94dSKalle Valo /*
75033aca94dSKalle Valo * Callback functions.
75133aca94dSKalle Valo */
75233aca94dSKalle Valo const struct rt2x00_ops *ops;
75333aca94dSKalle Valo
75433aca94dSKalle Valo /*
75533aca94dSKalle Valo * Driver data.
75633aca94dSKalle Valo */
75733aca94dSKalle Valo void *drv_data;
75833aca94dSKalle Valo
75933aca94dSKalle Valo /*
76033aca94dSKalle Valo * IEEE80211 control structure.
76133aca94dSKalle Valo */
76233aca94dSKalle Valo struct ieee80211_hw *hw;
76357fbcce3SJohannes Berg struct ieee80211_supported_band bands[NUM_NL80211_BANDS];
76454476269SMarkov Mikhail struct rt2x00_chan_survey *chan_survey;
76557fbcce3SJohannes Berg enum nl80211_band curr_band;
76633aca94dSKalle Valo int curr_freq;
76733aca94dSKalle Valo
76833aca94dSKalle Valo /*
76933aca94dSKalle Valo * If enabled, the debugfs interface structures
77033aca94dSKalle Valo * required for deregistration of debugfs.
77133aca94dSKalle Valo */
77233aca94dSKalle Valo #ifdef CONFIG_RT2X00_LIB_DEBUGFS
77333aca94dSKalle Valo struct rt2x00debug_intf *debugfs_intf;
77433aca94dSKalle Valo #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
77533aca94dSKalle Valo
77633aca94dSKalle Valo /*
77733aca94dSKalle Valo * LED structure for changing the LED status
77833aca94dSKalle Valo * by mac8011 or the kernel.
77933aca94dSKalle Valo */
78033aca94dSKalle Valo #ifdef CONFIG_RT2X00_LIB_LEDS
78133aca94dSKalle Valo struct rt2x00_led led_radio;
78233aca94dSKalle Valo struct rt2x00_led led_assoc;
78333aca94dSKalle Valo struct rt2x00_led led_qual;
78433aca94dSKalle Valo u16 led_mcu_reg;
78533aca94dSKalle Valo #endif /* CONFIG_RT2X00_LIB_LEDS */
78633aca94dSKalle Valo
78733aca94dSKalle Valo /*
78833aca94dSKalle Valo * Device state flags.
78933aca94dSKalle Valo * In these flags the current status is stored.
79033aca94dSKalle Valo * Access to these flags should occur atomically.
79133aca94dSKalle Valo */
79233aca94dSKalle Valo unsigned long flags;
79333aca94dSKalle Valo
79433aca94dSKalle Valo /*
79533aca94dSKalle Valo * Device capabiltiy flags.
79633aca94dSKalle Valo * In these flags the device/driver capabilities are stored.
79733aca94dSKalle Valo * Access to these flags should occur non-atomically.
79833aca94dSKalle Valo */
79933aca94dSKalle Valo unsigned long cap_flags;
80033aca94dSKalle Valo
80133aca94dSKalle Valo /*
80233aca94dSKalle Valo * Device information, Bus IRQ and name (PCI, SoC)
80333aca94dSKalle Valo */
80433aca94dSKalle Valo int irq;
80533aca94dSKalle Valo const char *name;
80633aca94dSKalle Valo
80733aca94dSKalle Valo /*
80833aca94dSKalle Valo * Chipset identification.
80933aca94dSKalle Valo */
81033aca94dSKalle Valo struct rt2x00_chip chip;
81133aca94dSKalle Valo
81233aca94dSKalle Valo /*
81333aca94dSKalle Valo * hw capability specifications.
81433aca94dSKalle Valo */
81533aca94dSKalle Valo struct hw_mode_spec spec;
81633aca94dSKalle Valo
81733aca94dSKalle Valo /*
81833aca94dSKalle Valo * This is the default TX/RX antenna setup as indicated
81933aca94dSKalle Valo * by the device's EEPROM.
82033aca94dSKalle Valo */
82133aca94dSKalle Valo struct antenna_setup default_ant;
82233aca94dSKalle Valo
82333aca94dSKalle Valo /*
82433aca94dSKalle Valo * Register pointers
82533aca94dSKalle Valo * csr.base: CSR base register address. (PCI)
82633aca94dSKalle Valo * csr.cache: CSR cache for usb_control_msg. (USB)
82733aca94dSKalle Valo */
82833aca94dSKalle Valo union csr {
82933aca94dSKalle Valo void __iomem *base;
83033aca94dSKalle Valo void *cache;
83133aca94dSKalle Valo } csr;
83233aca94dSKalle Valo
83333aca94dSKalle Valo /*
83433aca94dSKalle Valo * Mutex to protect register accesses.
83533aca94dSKalle Valo * For PCI and USB devices it protects against concurrent indirect
83633aca94dSKalle Valo * register access (BBP, RF, MCU) since accessing those
83733aca94dSKalle Valo * registers require multiple calls to the CSR registers.
83833aca94dSKalle Valo * For USB devices it also protects the csr_cache since that
83933aca94dSKalle Valo * field is used for normal CSR access and it cannot support
84033aca94dSKalle Valo * multiple callers simultaneously.
84133aca94dSKalle Valo */
84233aca94dSKalle Valo struct mutex csr_mutex;
84333aca94dSKalle Valo
84433aca94dSKalle Valo /*
845c7d1c777SStanislaw Gruszka * Mutex to synchronize config and link tuner.
846c7d1c777SStanislaw Gruszka */
847c7d1c777SStanislaw Gruszka struct mutex conf_mutex;
848c7d1c777SStanislaw Gruszka /*
84933aca94dSKalle Valo * Current packet filter configuration for the device.
85033aca94dSKalle Valo * This contains all currently active FIF_* flags send
85133aca94dSKalle Valo * to us by mac80211 during configure_filter().
85233aca94dSKalle Valo */
85333aca94dSKalle Valo unsigned int packet_filter;
85433aca94dSKalle Valo
85533aca94dSKalle Valo /*
85633aca94dSKalle Valo * Interface details:
85733aca94dSKalle Valo * - Open ap interface count.
85833aca94dSKalle Valo * - Open sta interface count.
85933aca94dSKalle Valo * - Association count.
86033aca94dSKalle Valo * - Beaconing enabled count.
86133aca94dSKalle Valo */
86233aca94dSKalle Valo unsigned int intf_ap_count;
86333aca94dSKalle Valo unsigned int intf_sta_count;
86433aca94dSKalle Valo unsigned int intf_associated;
86533aca94dSKalle Valo unsigned int intf_beaconing;
86633aca94dSKalle Valo
86733aca94dSKalle Valo /*
86833aca94dSKalle Valo * Interface combinations
86933aca94dSKalle Valo */
87033aca94dSKalle Valo struct ieee80211_iface_limit if_limits_ap;
87133aca94dSKalle Valo struct ieee80211_iface_combination if_combinations[NUM_IF_COMB];
87233aca94dSKalle Valo
87333aca94dSKalle Valo /*
87433aca94dSKalle Valo * Link quality
87533aca94dSKalle Valo */
87633aca94dSKalle Valo struct link link;
87733aca94dSKalle Valo
87833aca94dSKalle Valo /*
87933aca94dSKalle Valo * EEPROM data.
88033aca94dSKalle Valo */
88133aca94dSKalle Valo __le16 *eeprom;
88233aca94dSKalle Valo
88333aca94dSKalle Valo /*
88433aca94dSKalle Valo * Active RF register values.
88533aca94dSKalle Valo * These are stored here so we don't need
88633aca94dSKalle Valo * to read the rf registers and can directly
88733aca94dSKalle Valo * use this value instead.
88833aca94dSKalle Valo * This field should be accessed by using
88933aca94dSKalle Valo * rt2x00_rf_read() and rt2x00_rf_write().
89033aca94dSKalle Valo */
89133aca94dSKalle Valo u32 *rf;
89233aca94dSKalle Valo
89333aca94dSKalle Valo /*
89433aca94dSKalle Valo * LNA gain
89533aca94dSKalle Valo */
89633aca94dSKalle Valo short lna_gain;
89733aca94dSKalle Valo
89833aca94dSKalle Valo /*
89933aca94dSKalle Valo * Current TX power value.
90033aca94dSKalle Valo */
90133aca94dSKalle Valo u16 tx_power;
90233aca94dSKalle Valo
90333aca94dSKalle Valo /*
90433aca94dSKalle Valo * Current retry values.
90533aca94dSKalle Valo */
90633aca94dSKalle Valo u8 short_retry;
90733aca94dSKalle Valo u8 long_retry;
90833aca94dSKalle Valo
90933aca94dSKalle Valo /*
91033aca94dSKalle Valo * Rssi <-> Dbm offset
91133aca94dSKalle Valo */
91233aca94dSKalle Valo u8 rssi_offset;
91333aca94dSKalle Valo
91433aca94dSKalle Valo /*
91533aca94dSKalle Valo * Frequency offset.
91633aca94dSKalle Valo */
91733aca94dSKalle Valo u8 freq_offset;
91833aca94dSKalle Valo
91933aca94dSKalle Valo /*
92033aca94dSKalle Valo * Association id.
92133aca94dSKalle Valo */
92233aca94dSKalle Valo u16 aid;
92333aca94dSKalle Valo
92433aca94dSKalle Valo /*
92533aca94dSKalle Valo * Beacon interval.
92633aca94dSKalle Valo */
92733aca94dSKalle Valo u16 beacon_int;
92833aca94dSKalle Valo
92933aca94dSKalle Valo /**
93033aca94dSKalle Valo * Timestamp of last received beacon
93133aca94dSKalle Valo */
93233aca94dSKalle Valo unsigned long last_beacon;
93333aca94dSKalle Valo
93433aca94dSKalle Valo /*
93533aca94dSKalle Valo * Low level statistics which will have
93633aca94dSKalle Valo * to be kept up to date while device is running.
93733aca94dSKalle Valo */
93833aca94dSKalle Valo struct ieee80211_low_level_stats low_level_stats;
93933aca94dSKalle Valo
94033aca94dSKalle Valo /**
94133aca94dSKalle Valo * Work queue for all work which should not be placed
94233aca94dSKalle Valo * on the mac80211 workqueue (because of dependencies
94333aca94dSKalle Valo * between various work structures).
94433aca94dSKalle Valo */
94533aca94dSKalle Valo struct workqueue_struct *workqueue;
94633aca94dSKalle Valo
94733aca94dSKalle Valo /*
94833aca94dSKalle Valo * Scheduled work.
94933aca94dSKalle Valo * NOTE: intf_work will use ieee80211_iterate_active_interfaces()
95033aca94dSKalle Valo * which means it cannot be placed on the hw->workqueue
95133aca94dSKalle Valo * due to RTNL locking requirements.
95233aca94dSKalle Valo */
95333aca94dSKalle Valo struct work_struct intf_work;
95433aca94dSKalle Valo
95533aca94dSKalle Valo /**
95633aca94dSKalle Valo * Scheduled work for TX/RX done handling (USB devices)
95733aca94dSKalle Valo */
95833aca94dSKalle Valo struct work_struct rxdone_work;
95933aca94dSKalle Valo struct work_struct txdone_work;
96033aca94dSKalle Valo
96133aca94dSKalle Valo /*
96233aca94dSKalle Valo * Powersaving work
96333aca94dSKalle Valo */
96433aca94dSKalle Valo struct delayed_work autowakeup_work;
96533aca94dSKalle Valo struct work_struct sleep_work;
96633aca94dSKalle Valo
96733aca94dSKalle Valo /*
96833aca94dSKalle Valo * Data queue arrays for RX, TX, Beacon and ATIM.
96933aca94dSKalle Valo */
97033aca94dSKalle Valo unsigned int data_queues;
97133aca94dSKalle Valo struct data_queue *rx;
97233aca94dSKalle Valo struct data_queue *tx;
97333aca94dSKalle Valo struct data_queue *bcn;
97433aca94dSKalle Valo struct data_queue *atim;
97533aca94dSKalle Valo
97633aca94dSKalle Valo /*
97733aca94dSKalle Valo * Firmware image.
97833aca94dSKalle Valo */
97933aca94dSKalle Valo const struct firmware *fw;
98033aca94dSKalle Valo
98133aca94dSKalle Valo /*
98233aca94dSKalle Valo * FIFO for storing tx status reports between isr and tasklet.
98333aca94dSKalle Valo */
98433aca94dSKalle Valo DECLARE_KFIFO_PTR(txstatus_fifo, u32);
98533aca94dSKalle Valo
98633aca94dSKalle Valo /*
98733aca94dSKalle Valo * Timer to ensure tx status reports are read (rt2800usb).
98833aca94dSKalle Valo */
98933aca94dSKalle Valo struct hrtimer txstatus_timer;
99033aca94dSKalle Valo
99133aca94dSKalle Valo /*
99233aca94dSKalle Valo * Tasklet for processing tx status reports (rt2800pci).
99333aca94dSKalle Valo */
99433aca94dSKalle Valo struct tasklet_struct txstatus_tasklet;
99533aca94dSKalle Valo struct tasklet_struct pretbtt_tasklet;
99633aca94dSKalle Valo struct tasklet_struct tbtt_tasklet;
99733aca94dSKalle Valo struct tasklet_struct rxdone_tasklet;
99833aca94dSKalle Valo struct tasklet_struct autowake_tasklet;
99933aca94dSKalle Valo
100033aca94dSKalle Valo /*
100133aca94dSKalle Valo * Used for VCO periodic calibration.
100233aca94dSKalle Valo */
100333aca94dSKalle Valo int rf_channel;
100433aca94dSKalle Valo
100533aca94dSKalle Valo /*
100633aca94dSKalle Valo * Protect the interrupt mask register.
100733aca94dSKalle Valo */
100833aca94dSKalle Valo spinlock_t irqmask_lock;
100933aca94dSKalle Valo
101033aca94dSKalle Valo /*
101133aca94dSKalle Valo * List of BlockAckReq TX entries that need driver BlockAck processing.
101233aca94dSKalle Valo */
101333aca94dSKalle Valo struct list_head bar_list;
101433aca94dSKalle Valo spinlock_t bar_list_lock;
101533aca94dSKalle Valo
101633aca94dSKalle Valo /* Extra TX headroom required for alignment purposes. */
101733aca94dSKalle Valo unsigned int extra_tx_headroom;
10188b4c0009SVishal Thanki
10198b4c0009SVishal Thanki struct usb_anchor *anchor;
1020e383c704SStanislaw Gruszka unsigned int num_proto_errs;
102134db70b9SStanislaw Gruszka
102234db70b9SStanislaw Gruszka /* Clock for System On Chip devices. */
102334db70b9SStanislaw Gruszka struct clk *clk;
102433aca94dSKalle Valo };
102533aca94dSKalle Valo
102633aca94dSKalle Valo struct rt2x00_bar_list_entry {
102733aca94dSKalle Valo struct list_head list;
102833aca94dSKalle Valo struct rcu_head head;
102933aca94dSKalle Valo
103033aca94dSKalle Valo struct queue_entry *entry;
103133aca94dSKalle Valo int block_acked;
103233aca94dSKalle Valo
103333aca94dSKalle Valo /* Relevant parts of the IEEE80211 BAR header */
103433aca94dSKalle Valo __u8 ra[6];
103533aca94dSKalle Valo __u8 ta[6];
103633aca94dSKalle Valo __le16 control;
103733aca94dSKalle Valo __le16 start_seq_num;
103833aca94dSKalle Valo };
103933aca94dSKalle Valo
104033aca94dSKalle Valo /*
104133aca94dSKalle Valo * Register defines.
104233aca94dSKalle Valo * Some registers require multiple attempts before success,
104333aca94dSKalle Valo * in those cases REGISTER_BUSY_COUNT attempts should be
104433aca94dSKalle Valo * taken with a REGISTER_BUSY_DELAY interval. Due to USB
104533aca94dSKalle Valo * bus delays, we do not have to loop so many times to wait
104633aca94dSKalle Valo * for valid register value on that bus.
104733aca94dSKalle Valo */
104833aca94dSKalle Valo #define REGISTER_BUSY_COUNT 100
104933aca94dSKalle Valo #define REGISTER_USB_BUSY_COUNT 20
105033aca94dSKalle Valo #define REGISTER_BUSY_DELAY 100
105133aca94dSKalle Valo
105233aca94dSKalle Valo /*
105333aca94dSKalle Valo * Generic RF access.
105433aca94dSKalle Valo * The RF is being accessed by word index.
105533aca94dSKalle Valo */
rt2x00_rf_read(struct rt2x00_dev * rt2x00dev,const unsigned int word)1056aea8baa1SArnd Bergmann static inline u32 rt2x00_rf_read(struct rt2x00_dev *rt2x00dev,
10576b81745eSArnd Bergmann const unsigned int word)
10586b81745eSArnd Bergmann {
10596b81745eSArnd Bergmann BUG_ON(word < 1 || word > rt2x00dev->ops->rf_size / sizeof(u32));
10606b81745eSArnd Bergmann return rt2x00dev->rf[word - 1];
10616b81745eSArnd Bergmann }
10626b81745eSArnd Bergmann
rt2x00_rf_write(struct rt2x00_dev * rt2x00dev,const unsigned int word,u32 data)106333aca94dSKalle Valo static inline void rt2x00_rf_write(struct rt2x00_dev *rt2x00dev,
106433aca94dSKalle Valo const unsigned int word, u32 data)
106533aca94dSKalle Valo {
106633aca94dSKalle Valo BUG_ON(word < 1 || word > rt2x00dev->ops->rf_size / sizeof(u32));
106733aca94dSKalle Valo rt2x00dev->rf[word - 1] = data;
106833aca94dSKalle Valo }
106933aca94dSKalle Valo
107033aca94dSKalle Valo /*
107133aca94dSKalle Valo * Generic EEPROM access. The EEPROM is being accessed by word or byte index.
107233aca94dSKalle Valo */
rt2x00_eeprom_addr(struct rt2x00_dev * rt2x00dev,const unsigned int word)107333aca94dSKalle Valo static inline void *rt2x00_eeprom_addr(struct rt2x00_dev *rt2x00dev,
107433aca94dSKalle Valo const unsigned int word)
107533aca94dSKalle Valo {
107633aca94dSKalle Valo return (void *)&rt2x00dev->eeprom[word];
107733aca94dSKalle Valo }
107833aca94dSKalle Valo
rt2x00_eeprom_read(struct rt2x00_dev * rt2x00dev,const unsigned int word)107938651683SArnd Bergmann static inline u16 rt2x00_eeprom_read(struct rt2x00_dev *rt2x00dev,
10806b81745eSArnd Bergmann const unsigned int word)
10816b81745eSArnd Bergmann {
10826b81745eSArnd Bergmann return le16_to_cpu(rt2x00dev->eeprom[word]);
10836b81745eSArnd Bergmann }
10846b81745eSArnd Bergmann
rt2x00_eeprom_write(struct rt2x00_dev * rt2x00dev,const unsigned int word,u16 data)108533aca94dSKalle Valo static inline void rt2x00_eeprom_write(struct rt2x00_dev *rt2x00dev,
108633aca94dSKalle Valo const unsigned int word, u16 data)
108733aca94dSKalle Valo {
108833aca94dSKalle Valo rt2x00dev->eeprom[word] = cpu_to_le16(data);
108933aca94dSKalle Valo }
109033aca94dSKalle Valo
rt2x00_eeprom_byte(struct rt2x00_dev * rt2x00dev,const unsigned int byte)109133aca94dSKalle Valo static inline u8 rt2x00_eeprom_byte(struct rt2x00_dev *rt2x00dev,
109233aca94dSKalle Valo const unsigned int byte)
109333aca94dSKalle Valo {
109433aca94dSKalle Valo return *(((u8 *)rt2x00dev->eeprom) + byte);
109533aca94dSKalle Valo }
109633aca94dSKalle Valo
109733aca94dSKalle Valo /*
109833aca94dSKalle Valo * Chipset handlers
109933aca94dSKalle Valo */
rt2x00_set_chip(struct rt2x00_dev * rt2x00dev,const u16 rt,const u16 rf,const u16 rev)110033aca94dSKalle Valo static inline void rt2x00_set_chip(struct rt2x00_dev *rt2x00dev,
110133aca94dSKalle Valo const u16 rt, const u16 rf, const u16 rev)
110233aca94dSKalle Valo {
110333aca94dSKalle Valo rt2x00dev->chip.rt = rt;
110433aca94dSKalle Valo rt2x00dev->chip.rf = rf;
110533aca94dSKalle Valo rt2x00dev->chip.rev = rev;
110633aca94dSKalle Valo
110733aca94dSKalle Valo rt2x00_info(rt2x00dev, "Chipset detected - rt: %04x, rf: %04x, rev: %04x\n",
110833aca94dSKalle Valo rt2x00dev->chip.rt, rt2x00dev->chip.rf,
110933aca94dSKalle Valo rt2x00dev->chip.rev);
111033aca94dSKalle Valo }
111133aca94dSKalle Valo
rt2x00_set_rt(struct rt2x00_dev * rt2x00dev,const u16 rt,const u16 rev)111233aca94dSKalle Valo static inline void rt2x00_set_rt(struct rt2x00_dev *rt2x00dev,
111333aca94dSKalle Valo const u16 rt, const u16 rev)
111433aca94dSKalle Valo {
111533aca94dSKalle Valo rt2x00dev->chip.rt = rt;
111633aca94dSKalle Valo rt2x00dev->chip.rev = rev;
111733aca94dSKalle Valo
111833aca94dSKalle Valo rt2x00_info(rt2x00dev, "RT chipset %04x, rev %04x detected\n",
111933aca94dSKalle Valo rt2x00dev->chip.rt, rt2x00dev->chip.rev);
112033aca94dSKalle Valo }
112133aca94dSKalle Valo
rt2x00_set_rf(struct rt2x00_dev * rt2x00dev,const u16 rf)112233aca94dSKalle Valo static inline void rt2x00_set_rf(struct rt2x00_dev *rt2x00dev, const u16 rf)
112333aca94dSKalle Valo {
112433aca94dSKalle Valo rt2x00dev->chip.rf = rf;
112533aca94dSKalle Valo
112633aca94dSKalle Valo rt2x00_info(rt2x00dev, "RF chipset %04x detected\n",
112733aca94dSKalle Valo rt2x00dev->chip.rf);
112833aca94dSKalle Valo }
112933aca94dSKalle Valo
rt2x00_rt(struct rt2x00_dev * rt2x00dev,const u16 rt)113033aca94dSKalle Valo static inline bool rt2x00_rt(struct rt2x00_dev *rt2x00dev, const u16 rt)
113133aca94dSKalle Valo {
113233aca94dSKalle Valo return (rt2x00dev->chip.rt == rt);
113333aca94dSKalle Valo }
113433aca94dSKalle Valo
rt2x00_rf(struct rt2x00_dev * rt2x00dev,const u16 rf)113533aca94dSKalle Valo static inline bool rt2x00_rf(struct rt2x00_dev *rt2x00dev, const u16 rf)
113633aca94dSKalle Valo {
113733aca94dSKalle Valo return (rt2x00dev->chip.rf == rf);
113833aca94dSKalle Valo }
113933aca94dSKalle Valo
rt2x00_rev(struct rt2x00_dev * rt2x00dev)114033aca94dSKalle Valo static inline u16 rt2x00_rev(struct rt2x00_dev *rt2x00dev)
114133aca94dSKalle Valo {
114233aca94dSKalle Valo return rt2x00dev->chip.rev;
114333aca94dSKalle Valo }
114433aca94dSKalle Valo
rt2x00_rt_rev(struct rt2x00_dev * rt2x00dev,const u16 rt,const u16 rev)114533aca94dSKalle Valo static inline bool rt2x00_rt_rev(struct rt2x00_dev *rt2x00dev,
114633aca94dSKalle Valo const u16 rt, const u16 rev)
114733aca94dSKalle Valo {
114833aca94dSKalle Valo return (rt2x00_rt(rt2x00dev, rt) && rt2x00_rev(rt2x00dev) == rev);
114933aca94dSKalle Valo }
115033aca94dSKalle Valo
rt2x00_rt_rev_lt(struct rt2x00_dev * rt2x00dev,const u16 rt,const u16 rev)115133aca94dSKalle Valo static inline bool rt2x00_rt_rev_lt(struct rt2x00_dev *rt2x00dev,
115233aca94dSKalle Valo const u16 rt, const u16 rev)
115333aca94dSKalle Valo {
115433aca94dSKalle Valo return (rt2x00_rt(rt2x00dev, rt) && rt2x00_rev(rt2x00dev) < rev);
115533aca94dSKalle Valo }
115633aca94dSKalle Valo
rt2x00_rt_rev_gte(struct rt2x00_dev * rt2x00dev,const u16 rt,const u16 rev)115733aca94dSKalle Valo static inline bool rt2x00_rt_rev_gte(struct rt2x00_dev *rt2x00dev,
115833aca94dSKalle Valo const u16 rt, const u16 rev)
115933aca94dSKalle Valo {
116033aca94dSKalle Valo return (rt2x00_rt(rt2x00dev, rt) && rt2x00_rev(rt2x00dev) >= rev);
116133aca94dSKalle Valo }
116233aca94dSKalle Valo
rt2x00_set_chip_intf(struct rt2x00_dev * rt2x00dev,enum rt2x00_chip_intf intf)116333aca94dSKalle Valo static inline void rt2x00_set_chip_intf(struct rt2x00_dev *rt2x00dev,
116433aca94dSKalle Valo enum rt2x00_chip_intf intf)
116533aca94dSKalle Valo {
116633aca94dSKalle Valo rt2x00dev->chip.intf = intf;
116733aca94dSKalle Valo }
116833aca94dSKalle Valo
rt2x00_intf(struct rt2x00_dev * rt2x00dev,enum rt2x00_chip_intf intf)116933aca94dSKalle Valo static inline bool rt2x00_intf(struct rt2x00_dev *rt2x00dev,
117033aca94dSKalle Valo enum rt2x00_chip_intf intf)
117133aca94dSKalle Valo {
117233aca94dSKalle Valo return (rt2x00dev->chip.intf == intf);
117333aca94dSKalle Valo }
117433aca94dSKalle Valo
rt2x00_is_pci(struct rt2x00_dev * rt2x00dev)117533aca94dSKalle Valo static inline bool rt2x00_is_pci(struct rt2x00_dev *rt2x00dev)
117633aca94dSKalle Valo {
117733aca94dSKalle Valo return rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_PCI) ||
117833aca94dSKalle Valo rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_PCIE);
117933aca94dSKalle Valo }
118033aca94dSKalle Valo
rt2x00_is_pcie(struct rt2x00_dev * rt2x00dev)118133aca94dSKalle Valo static inline bool rt2x00_is_pcie(struct rt2x00_dev *rt2x00dev)
118233aca94dSKalle Valo {
118333aca94dSKalle Valo return rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_PCIE);
118433aca94dSKalle Valo }
118533aca94dSKalle Valo
rt2x00_is_usb(struct rt2x00_dev * rt2x00dev)118633aca94dSKalle Valo static inline bool rt2x00_is_usb(struct rt2x00_dev *rt2x00dev)
118733aca94dSKalle Valo {
118833aca94dSKalle Valo return rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_USB);
118933aca94dSKalle Valo }
119033aca94dSKalle Valo
rt2x00_is_soc(struct rt2x00_dev * rt2x00dev)119133aca94dSKalle Valo static inline bool rt2x00_is_soc(struct rt2x00_dev *rt2x00dev)
119233aca94dSKalle Valo {
119333aca94dSKalle Valo return rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_SOC);
119433aca94dSKalle Valo }
119533aca94dSKalle Valo
119633aca94dSKalle Valo /* Helpers for capability flags */
119733aca94dSKalle Valo
119833aca94dSKalle Valo static inline bool
rt2x00_has_cap_flag(struct rt2x00_dev * rt2x00dev,enum rt2x00_capability_flags cap_flag)119933aca94dSKalle Valo rt2x00_has_cap_flag(struct rt2x00_dev *rt2x00dev,
120033aca94dSKalle Valo enum rt2x00_capability_flags cap_flag)
120133aca94dSKalle Valo {
120233aca94dSKalle Valo return test_bit(cap_flag, &rt2x00dev->cap_flags);
120333aca94dSKalle Valo }
120433aca94dSKalle Valo
120533aca94dSKalle Valo static inline bool
rt2x00_has_cap_hw_crypto(struct rt2x00_dev * rt2x00dev)120633aca94dSKalle Valo rt2x00_has_cap_hw_crypto(struct rt2x00_dev *rt2x00dev)
120733aca94dSKalle Valo {
120833aca94dSKalle Valo return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_HW_CRYPTO);
120933aca94dSKalle Valo }
121033aca94dSKalle Valo
121133aca94dSKalle Valo static inline bool
rt2x00_has_cap_power_limit(struct rt2x00_dev * rt2x00dev)121233aca94dSKalle Valo rt2x00_has_cap_power_limit(struct rt2x00_dev *rt2x00dev)
121333aca94dSKalle Valo {
121433aca94dSKalle Valo return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_POWER_LIMIT);
121533aca94dSKalle Valo }
121633aca94dSKalle Valo
121733aca94dSKalle Valo static inline bool
rt2x00_has_cap_control_filters(struct rt2x00_dev * rt2x00dev)121833aca94dSKalle Valo rt2x00_has_cap_control_filters(struct rt2x00_dev *rt2x00dev)
121933aca94dSKalle Valo {
122033aca94dSKalle Valo return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_CONTROL_FILTERS);
122133aca94dSKalle Valo }
122233aca94dSKalle Valo
122333aca94dSKalle Valo static inline bool
rt2x00_has_cap_control_filter_pspoll(struct rt2x00_dev * rt2x00dev)122433aca94dSKalle Valo rt2x00_has_cap_control_filter_pspoll(struct rt2x00_dev *rt2x00dev)
122533aca94dSKalle Valo {
122633aca94dSKalle Valo return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_CONTROL_FILTER_PSPOLL);
122733aca94dSKalle Valo }
122833aca94dSKalle Valo
122933aca94dSKalle Valo static inline bool
rt2x00_has_cap_pre_tbtt_interrupt(struct rt2x00_dev * rt2x00dev)123033aca94dSKalle Valo rt2x00_has_cap_pre_tbtt_interrupt(struct rt2x00_dev *rt2x00dev)
123133aca94dSKalle Valo {
123233aca94dSKalle Valo return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_PRE_TBTT_INTERRUPT);
123333aca94dSKalle Valo }
123433aca94dSKalle Valo
123533aca94dSKalle Valo static inline bool
rt2x00_has_cap_link_tuning(struct rt2x00_dev * rt2x00dev)123633aca94dSKalle Valo rt2x00_has_cap_link_tuning(struct rt2x00_dev *rt2x00dev)
123733aca94dSKalle Valo {
123833aca94dSKalle Valo return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_LINK_TUNING);
123933aca94dSKalle Valo }
124033aca94dSKalle Valo
124133aca94dSKalle Valo static inline bool
rt2x00_has_cap_frame_type(struct rt2x00_dev * rt2x00dev)124233aca94dSKalle Valo rt2x00_has_cap_frame_type(struct rt2x00_dev *rt2x00dev)
124333aca94dSKalle Valo {
124433aca94dSKalle Valo return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_FRAME_TYPE);
124533aca94dSKalle Valo }
124633aca94dSKalle Valo
124733aca94dSKalle Valo static inline bool
rt2x00_has_cap_rf_sequence(struct rt2x00_dev * rt2x00dev)124833aca94dSKalle Valo rt2x00_has_cap_rf_sequence(struct rt2x00_dev *rt2x00dev)
124933aca94dSKalle Valo {
125033aca94dSKalle Valo return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_RF_SEQUENCE);
125133aca94dSKalle Valo }
125233aca94dSKalle Valo
125333aca94dSKalle Valo static inline bool
rt2x00_has_cap_external_lna_a(struct rt2x00_dev * rt2x00dev)125433aca94dSKalle Valo rt2x00_has_cap_external_lna_a(struct rt2x00_dev *rt2x00dev)
125533aca94dSKalle Valo {
125633aca94dSKalle Valo return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_EXTERNAL_LNA_A);
125733aca94dSKalle Valo }
125833aca94dSKalle Valo
125933aca94dSKalle Valo static inline bool
rt2x00_has_cap_external_lna_bg(struct rt2x00_dev * rt2x00dev)126033aca94dSKalle Valo rt2x00_has_cap_external_lna_bg(struct rt2x00_dev *rt2x00dev)
126133aca94dSKalle Valo {
126233aca94dSKalle Valo return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_EXTERNAL_LNA_BG);
126333aca94dSKalle Valo }
126433aca94dSKalle Valo
126533aca94dSKalle Valo static inline bool
rt2x00_has_cap_double_antenna(struct rt2x00_dev * rt2x00dev)126633aca94dSKalle Valo rt2x00_has_cap_double_antenna(struct rt2x00_dev *rt2x00dev)
126733aca94dSKalle Valo {
126833aca94dSKalle Valo return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_DOUBLE_ANTENNA);
126933aca94dSKalle Valo }
127033aca94dSKalle Valo
127133aca94dSKalle Valo static inline bool
rt2x00_has_cap_bt_coexist(struct rt2x00_dev * rt2x00dev)127233aca94dSKalle Valo rt2x00_has_cap_bt_coexist(struct rt2x00_dev *rt2x00dev)
127333aca94dSKalle Valo {
127433aca94dSKalle Valo return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_BT_COEXIST);
127533aca94dSKalle Valo }
127633aca94dSKalle Valo
127733aca94dSKalle Valo static inline bool
rt2x00_has_cap_vco_recalibration(struct rt2x00_dev * rt2x00dev)127833aca94dSKalle Valo rt2x00_has_cap_vco_recalibration(struct rt2x00_dev *rt2x00dev)
127933aca94dSKalle Valo {
128033aca94dSKalle Valo return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_VCO_RECALIBRATION);
128133aca94dSKalle Valo }
128233aca94dSKalle Valo
1283e403fa31SStanislaw Gruszka static inline bool
rt2x00_has_cap_restart_hw(struct rt2x00_dev * rt2x00dev)1284e403fa31SStanislaw Gruszka rt2x00_has_cap_restart_hw(struct rt2x00_dev *rt2x00dev)
1285e403fa31SStanislaw Gruszka {
1286e403fa31SStanislaw Gruszka return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_RESTART_HW);
1287e403fa31SStanislaw Gruszka }
1288e403fa31SStanislaw Gruszka
128933aca94dSKalle Valo /**
129033aca94dSKalle Valo * rt2x00queue_map_txskb - Map a skb into DMA for TX purposes.
129133aca94dSKalle Valo * @entry: Pointer to &struct queue_entry
129233aca94dSKalle Valo *
129333aca94dSKalle Valo * Returns -ENOMEM if mapping fail, 0 otherwise.
129433aca94dSKalle Valo */
129533aca94dSKalle Valo int rt2x00queue_map_txskb(struct queue_entry *entry);
129633aca94dSKalle Valo
129733aca94dSKalle Valo /**
129833aca94dSKalle Valo * rt2x00queue_unmap_skb - Unmap a skb from DMA.
129933aca94dSKalle Valo * @entry: Pointer to &struct queue_entry
130033aca94dSKalle Valo */
130133aca94dSKalle Valo void rt2x00queue_unmap_skb(struct queue_entry *entry);
130233aca94dSKalle Valo
130333aca94dSKalle Valo /**
130433aca94dSKalle Valo * rt2x00queue_get_tx_queue - Convert tx queue index to queue pointer
130533aca94dSKalle Valo * @rt2x00dev: Pointer to &struct rt2x00_dev.
130633aca94dSKalle Valo * @queue: rt2x00 queue index (see &enum data_queue_qid).
130733aca94dSKalle Valo *
130833aca94dSKalle Valo * Returns NULL for non tx queues.
130933aca94dSKalle Valo */
131033aca94dSKalle Valo static inline struct data_queue *
rt2x00queue_get_tx_queue(struct rt2x00_dev * rt2x00dev,enum data_queue_qid queue)131133aca94dSKalle Valo rt2x00queue_get_tx_queue(struct rt2x00_dev *rt2x00dev,
1312*f2c6e7caSHans de Goede enum data_queue_qid queue)
131333aca94dSKalle Valo {
1314*f2c6e7caSHans de Goede if (queue >= rt2x00dev->ops->tx_queues && queue < IEEE80211_NUM_ACS)
1315*f2c6e7caSHans de Goede queue = rt2x00dev->ops->tx_queues - 1;
1316*f2c6e7caSHans de Goede
131733aca94dSKalle Valo if (queue < rt2x00dev->ops->tx_queues && rt2x00dev->tx)
131833aca94dSKalle Valo return &rt2x00dev->tx[queue];
131933aca94dSKalle Valo
132033aca94dSKalle Valo if (queue == QID_ATIM)
132133aca94dSKalle Valo return rt2x00dev->atim;
132233aca94dSKalle Valo
132333aca94dSKalle Valo return NULL;
132433aca94dSKalle Valo }
132533aca94dSKalle Valo
132633aca94dSKalle Valo /**
132733aca94dSKalle Valo * rt2x00queue_get_entry - Get queue entry where the given index points to.
132833aca94dSKalle Valo * @queue: Pointer to &struct data_queue from where we obtain the entry.
132933aca94dSKalle Valo * @index: Index identifier for obtaining the correct index.
133033aca94dSKalle Valo */
133133aca94dSKalle Valo struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
133233aca94dSKalle Valo enum queue_index index);
133333aca94dSKalle Valo
133433aca94dSKalle Valo /**
133533aca94dSKalle Valo * rt2x00queue_pause_queue - Pause a data queue
133633aca94dSKalle Valo * @queue: Pointer to &struct data_queue.
133733aca94dSKalle Valo *
133833aca94dSKalle Valo * This function will pause the data queue locally, preventing
133933aca94dSKalle Valo * new frames to be added to the queue (while the hardware is
134033aca94dSKalle Valo * still allowed to run).
134133aca94dSKalle Valo */
134233aca94dSKalle Valo void rt2x00queue_pause_queue(struct data_queue *queue);
134333aca94dSKalle Valo
134433aca94dSKalle Valo /**
134533aca94dSKalle Valo * rt2x00queue_unpause_queue - unpause a data queue
134633aca94dSKalle Valo * @queue: Pointer to &struct data_queue.
134733aca94dSKalle Valo *
134833aca94dSKalle Valo * This function will unpause the data queue locally, allowing
134933aca94dSKalle Valo * new frames to be added to the queue again.
135033aca94dSKalle Valo */
135133aca94dSKalle Valo void rt2x00queue_unpause_queue(struct data_queue *queue);
135233aca94dSKalle Valo
135333aca94dSKalle Valo /**
135433aca94dSKalle Valo * rt2x00queue_start_queue - Start a data queue
135533aca94dSKalle Valo * @queue: Pointer to &struct data_queue.
135633aca94dSKalle Valo *
135733aca94dSKalle Valo * This function will start handling all pending frames in the queue.
135833aca94dSKalle Valo */
135933aca94dSKalle Valo void rt2x00queue_start_queue(struct data_queue *queue);
136033aca94dSKalle Valo
136133aca94dSKalle Valo /**
136233aca94dSKalle Valo * rt2x00queue_stop_queue - Halt a data queue
136333aca94dSKalle Valo * @queue: Pointer to &struct data_queue.
136433aca94dSKalle Valo *
136533aca94dSKalle Valo * This function will stop all pending frames in the queue.
136633aca94dSKalle Valo */
136733aca94dSKalle Valo void rt2x00queue_stop_queue(struct data_queue *queue);
136833aca94dSKalle Valo
136933aca94dSKalle Valo /**
137033aca94dSKalle Valo * rt2x00queue_flush_queue - Flush a data queue
137133aca94dSKalle Valo * @queue: Pointer to &struct data_queue.
137233aca94dSKalle Valo * @drop: True to drop all pending frames.
137333aca94dSKalle Valo *
137433aca94dSKalle Valo * This function will flush the queue. After this call
137533aca94dSKalle Valo * the queue is guaranteed to be empty.
137633aca94dSKalle Valo */
137733aca94dSKalle Valo void rt2x00queue_flush_queue(struct data_queue *queue, bool drop);
137833aca94dSKalle Valo
137933aca94dSKalle Valo /**
138033aca94dSKalle Valo * rt2x00queue_start_queues - Start all data queues
138133aca94dSKalle Valo * @rt2x00dev: Pointer to &struct rt2x00_dev.
138233aca94dSKalle Valo *
138333aca94dSKalle Valo * This function will loop through all available queues to start them
138433aca94dSKalle Valo */
138533aca94dSKalle Valo void rt2x00queue_start_queues(struct rt2x00_dev *rt2x00dev);
138633aca94dSKalle Valo
138733aca94dSKalle Valo /**
138833aca94dSKalle Valo * rt2x00queue_stop_queues - Halt all data queues
138933aca94dSKalle Valo * @rt2x00dev: Pointer to &struct rt2x00_dev.
139033aca94dSKalle Valo *
139133aca94dSKalle Valo * This function will loop through all available queues to stop
139233aca94dSKalle Valo * any pending frames.
139333aca94dSKalle Valo */
139433aca94dSKalle Valo void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev);
139533aca94dSKalle Valo
139633aca94dSKalle Valo /**
139733aca94dSKalle Valo * rt2x00queue_flush_queues - Flush all data queues
139833aca94dSKalle Valo * @rt2x00dev: Pointer to &struct rt2x00_dev.
139933aca94dSKalle Valo * @drop: True to drop all pending frames.
140033aca94dSKalle Valo *
140133aca94dSKalle Valo * This function will loop through all available queues to flush
140233aca94dSKalle Valo * any pending frames.
140333aca94dSKalle Valo */
140433aca94dSKalle Valo void rt2x00queue_flush_queues(struct rt2x00_dev *rt2x00dev, bool drop);
140533aca94dSKalle Valo
140633aca94dSKalle Valo /*
140733aca94dSKalle Valo * Debugfs handlers.
140833aca94dSKalle Valo */
140933aca94dSKalle Valo /**
141033aca94dSKalle Valo * rt2x00debug_dump_frame - Dump a frame to userspace through debugfs.
141133aca94dSKalle Valo * @rt2x00dev: Pointer to &struct rt2x00_dev.
141233aca94dSKalle Valo * @type: The type of frame that is being dumped.
1413dd35cc08SStanislaw Gruszka * @entry: The queue entry containing the frame to be dumped.
141433aca94dSKalle Valo */
141533aca94dSKalle Valo #ifdef CONFIG_RT2X00_LIB_DEBUGFS
141633aca94dSKalle Valo void rt2x00debug_dump_frame(struct rt2x00_dev *rt2x00dev,
14172ceb8137SStanislaw Gruszka enum rt2x00_dump_type type, struct queue_entry *entry);
141833aca94dSKalle Valo #else
rt2x00debug_dump_frame(struct rt2x00_dev * rt2x00dev,enum rt2x00_dump_type type,struct queue_entry * entry)141933aca94dSKalle Valo static inline void rt2x00debug_dump_frame(struct rt2x00_dev *rt2x00dev,
142033aca94dSKalle Valo enum rt2x00_dump_type type,
14212ceb8137SStanislaw Gruszka struct queue_entry *entry)
142233aca94dSKalle Valo {
142333aca94dSKalle Valo }
142433aca94dSKalle Valo #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
142533aca94dSKalle Valo
142633aca94dSKalle Valo /*
142733aca94dSKalle Valo * Utility functions.
142833aca94dSKalle Valo */
142933aca94dSKalle Valo u32 rt2x00lib_get_bssidx(struct rt2x00_dev *rt2x00dev,
143033aca94dSKalle Valo struct ieee80211_vif *vif);
14319766cb70SMathias Kresin void rt2x00lib_set_mac_address(struct rt2x00_dev *rt2x00dev, u8 *eeprom_mac_addr);
143233aca94dSKalle Valo
143333aca94dSKalle Valo /*
143433aca94dSKalle Valo * Interrupt context handlers.
143533aca94dSKalle Valo */
143633aca94dSKalle Valo void rt2x00lib_beacondone(struct rt2x00_dev *rt2x00dev);
143733aca94dSKalle Valo void rt2x00lib_pretbtt(struct rt2x00_dev *rt2x00dev);
143833aca94dSKalle Valo void rt2x00lib_dmastart(struct queue_entry *entry);
143933aca94dSKalle Valo void rt2x00lib_dmadone(struct queue_entry *entry);
144033aca94dSKalle Valo void rt2x00lib_txdone(struct queue_entry *entry,
144133aca94dSKalle Valo struct txdone_entry_desc *txdesc);
1442a09305d0SStanislaw Gruszka void rt2x00lib_txdone_nomatch(struct queue_entry *entry,
1443a09305d0SStanislaw Gruszka struct txdone_entry_desc *txdesc);
144433aca94dSKalle Valo void rt2x00lib_txdone_noinfo(struct queue_entry *entry, u32 status);
144533aca94dSKalle Valo void rt2x00lib_rxdone(struct queue_entry *entry, gfp_t gfp);
144633aca94dSKalle Valo
144733aca94dSKalle Valo /*
144833aca94dSKalle Valo * mac80211 handlers.
144933aca94dSKalle Valo */
145033aca94dSKalle Valo void rt2x00mac_tx(struct ieee80211_hw *hw,
145133aca94dSKalle Valo struct ieee80211_tx_control *control,
145233aca94dSKalle Valo struct sk_buff *skb);
145333aca94dSKalle Valo int rt2x00mac_start(struct ieee80211_hw *hw);
145433aca94dSKalle Valo void rt2x00mac_stop(struct ieee80211_hw *hw);
145557f9807dSStanislaw Gruszka void rt2x00mac_reconfig_complete(struct ieee80211_hw *hw,
145657f9807dSStanislaw Gruszka enum ieee80211_reconfig_type reconfig_type);
145733aca94dSKalle Valo int rt2x00mac_add_interface(struct ieee80211_hw *hw,
145833aca94dSKalle Valo struct ieee80211_vif *vif);
145933aca94dSKalle Valo void rt2x00mac_remove_interface(struct ieee80211_hw *hw,
146033aca94dSKalle Valo struct ieee80211_vif *vif);
146133aca94dSKalle Valo int rt2x00mac_config(struct ieee80211_hw *hw, u32 changed);
146233aca94dSKalle Valo void rt2x00mac_configure_filter(struct ieee80211_hw *hw,
146333aca94dSKalle Valo unsigned int changed_flags,
146433aca94dSKalle Valo unsigned int *total_flags,
146533aca94dSKalle Valo u64 multicast);
146633aca94dSKalle Valo int rt2x00mac_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta,
146733aca94dSKalle Valo bool set);
146833aca94dSKalle Valo #ifdef CONFIG_RT2X00_LIB_CRYPTO
146933aca94dSKalle Valo int rt2x00mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
147033aca94dSKalle Valo struct ieee80211_vif *vif, struct ieee80211_sta *sta,
147133aca94dSKalle Valo struct ieee80211_key_conf *key);
147233aca94dSKalle Valo #else
147333aca94dSKalle Valo #define rt2x00mac_set_key NULL
147433aca94dSKalle Valo #endif /* CONFIG_RT2X00_LIB_CRYPTO */
147533aca94dSKalle Valo void rt2x00mac_sw_scan_start(struct ieee80211_hw *hw,
147633aca94dSKalle Valo struct ieee80211_vif *vif,
147733aca94dSKalle Valo const u8 *mac_addr);
147833aca94dSKalle Valo void rt2x00mac_sw_scan_complete(struct ieee80211_hw *hw,
147933aca94dSKalle Valo struct ieee80211_vif *vif);
148033aca94dSKalle Valo int rt2x00mac_get_stats(struct ieee80211_hw *hw,
148133aca94dSKalle Valo struct ieee80211_low_level_stats *stats);
148233aca94dSKalle Valo void rt2x00mac_bss_info_changed(struct ieee80211_hw *hw,
148333aca94dSKalle Valo struct ieee80211_vif *vif,
148433aca94dSKalle Valo struct ieee80211_bss_conf *bss_conf,
14857b7090b4SJohannes Berg u64 changes);
148633aca94dSKalle Valo int rt2x00mac_conf_tx(struct ieee80211_hw *hw,
1487b3e2130bSJohannes Berg struct ieee80211_vif *vif,
1488b3e2130bSJohannes Berg unsigned int link_id, u16 queue,
148933aca94dSKalle Valo const struct ieee80211_tx_queue_params *params);
149033aca94dSKalle Valo void rt2x00mac_rfkill_poll(struct ieee80211_hw *hw);
149133aca94dSKalle Valo void rt2x00mac_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
149233aca94dSKalle Valo u32 queues, bool drop);
149333aca94dSKalle Valo int rt2x00mac_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant);
149433aca94dSKalle Valo int rt2x00mac_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant);
149533aca94dSKalle Valo void rt2x00mac_get_ringparam(struct ieee80211_hw *hw,
149633aca94dSKalle Valo u32 *tx, u32 *tx_max, u32 *rx, u32 *rx_max);
149733aca94dSKalle Valo bool rt2x00mac_tx_frames_pending(struct ieee80211_hw *hw);
149833aca94dSKalle Valo
149933aca94dSKalle Valo /*
150033aca94dSKalle Valo * Driver allocation handlers.
150133aca94dSKalle Valo */
150233aca94dSKalle Valo int rt2x00lib_probe_dev(struct rt2x00_dev *rt2x00dev);
150333aca94dSKalle Valo void rt2x00lib_remove_dev(struct rt2x00_dev *rt2x00dev);
1504560a218dSVaibhav Gupta
1505560a218dSVaibhav Gupta int rt2x00lib_suspend(struct rt2x00_dev *rt2x00dev);
150633aca94dSKalle Valo int rt2x00lib_resume(struct rt2x00_dev *rt2x00dev);
150733aca94dSKalle Valo
150833aca94dSKalle Valo #endif /* RT2X00_H */
1509