1e57b7901SRyder Lee /* SPDX-License-Identifier: ISC */ 2e57b7901SRyder Lee /* Copyright (C) 2020 MediaTek Inc. */ 3e57b7901SRyder Lee 4e57b7901SRyder Lee #ifndef __MT7915_MAC_H 5e57b7901SRyder Lee #define __MT7915_MAC_H 6e57b7901SRyder Lee 790211957SLorenzo Bianconi #include "../mt76_connac2_mac.h" 890211957SLorenzo Bianconi 9c17780e7SBo Jiao #define MT_TX_FREE_VER GENMASK(18, 16) 10f68d6762SFelix Fietkau #define MT_TX_FREE_MSDU_CNT_V0 GENMASK(6, 0) 11e57b7901SRyder Lee /* 0: success, others: dropped */ 12*943e4fb9SRyder Lee #define MT_TX_FREE_COUNT GENMASK(12, 0) 13*943e4fb9SRyder Lee #define MT_TX_FREE_COUNT_V3 GENMASK(27, 24) 14*943e4fb9SRyder Lee #define MT_TX_FREE_STAT GENMASK(14, 13) 15*943e4fb9SRyder Lee #define MT_TX_FREE_STAT_V3 GENMASK(29, 28) 16*943e4fb9SRyder Lee #define MT_TX_FREE_MPDU_HEADER BIT(15) 17*943e4fb9SRyder Lee #define MT_TX_FREE_MPDU_HEADER_V3 BIT(30) 18c17780e7SBo Jiao #define MT_TX_FREE_MSDU_ID_V3 GENMASK(14, 0) 19c17780e7SBo Jiao 203de4cb17SFelix Fietkau #define MT_TXS5_F0_FINAL_MPDU BIT(31) 213de4cb17SFelix Fietkau #define MT_TXS5_F0_QOS BIT(30) 223de4cb17SFelix Fietkau #define MT_TXS5_F0_TX_COUNT GENMASK(29, 25) 233de4cb17SFelix Fietkau #define MT_TXS5_F0_FRONT_TIME GENMASK(24, 0) 243de4cb17SFelix Fietkau #define MT_TXS5_F1_MPDU_TX_COUNT GENMASK(31, 24) 253de4cb17SFelix Fietkau #define MT_TXS5_F1_MPDU_TX_BYTES GENMASK(23, 0) 263de4cb17SFelix Fietkau 273de4cb17SFelix Fietkau #define MT_TXS6_F0_NOISE_3 GENMASK(31, 24) 283de4cb17SFelix Fietkau #define MT_TXS6_F0_NOISE_2 GENMASK(23, 16) 293de4cb17SFelix Fietkau #define MT_TXS6_F0_NOISE_1 GENMASK(15, 8) 303de4cb17SFelix Fietkau #define MT_TXS6_F0_NOISE_0 GENMASK(7, 0) 313de4cb17SFelix Fietkau #define MT_TXS6_F1_MPDU_FAIL_COUNT GENMASK(31, 24) 323de4cb17SFelix Fietkau #define MT_TXS6_F1_MPDU_FAIL_BYTES GENMASK(23, 0) 333de4cb17SFelix Fietkau 343de4cb17SFelix Fietkau #define MT_TXS7_F0_RCPI_3 GENMASK(31, 24) 353de4cb17SFelix Fietkau #define MT_TXS7_F0_RCPI_2 GENMASK(23, 16) 363de4cb17SFelix Fietkau #define MT_TXS7_F0_RCPI_1 GENMASK(15, 8) 373de4cb17SFelix Fietkau #define MT_TXS7_F0_RCPI_0 GENMASK(7, 0) 383de4cb17SFelix Fietkau #define MT_TXS7_F1_MPDU_RETRY_COUNT GENMASK(31, 24) 393de4cb17SFelix Fietkau #define MT_TXS7_F1_MPDU_RETRY_BYTES GENMASK(23, 0) 403de4cb17SFelix Fietkau 41e57b7901SRyder Lee struct mt7915_dfs_pulse { 42e57b7901SRyder Lee u32 max_width; /* us */ 43e57b7901SRyder Lee int max_pwr; /* dbm */ 44e57b7901SRyder Lee int min_pwr; /* dbm */ 45e57b7901SRyder Lee u32 min_stgr_pri; /* us */ 46e57b7901SRyder Lee u32 max_stgr_pri; /* us */ 47e57b7901SRyder Lee u32 min_cr_pri; /* us */ 48e57b7901SRyder Lee u32 max_cr_pri; /* us */ 49e57b7901SRyder Lee }; 50e57b7901SRyder Lee 51e57b7901SRyder Lee struct mt7915_dfs_pattern { 52e57b7901SRyder Lee u8 enb; 53e57b7901SRyder Lee u8 stgr; 54e57b7901SRyder Lee u8 min_crpn; 55e57b7901SRyder Lee u8 max_crpn; 56e57b7901SRyder Lee u8 min_crpr; 57e57b7901SRyder Lee u8 min_pw; 58e57b7901SRyder Lee u32 min_pri; 59e57b7901SRyder Lee u32 max_pri; 60e57b7901SRyder Lee u8 max_pw; 61e57b7901SRyder Lee u8 min_crbn; 62e57b7901SRyder Lee u8 max_crbn; 63e57b7901SRyder Lee u8 min_stgpn; 64e57b7901SRyder Lee u8 max_stgpn; 65e57b7901SRyder Lee u8 min_stgpr; 66e57b7901SRyder Lee u8 rsv[2]; 67e57b7901SRyder Lee u32 min_stgpr_diff; 68e57b7901SRyder Lee } __packed; 69e57b7901SRyder Lee 70e57b7901SRyder Lee struct mt7915_dfs_radar_spec { 71e57b7901SRyder Lee struct mt7915_dfs_pulse pulse_th; 72e57b7901SRyder Lee struct mt7915_dfs_pattern radar_pattern[16]; 73e57b7901SRyder Lee }; 74e57b7901SRyder Lee 75e57b7901SRyder Lee #endif 76