xref: /openbmc/linux/drivers/net/wireless/mediatek/mt76/mt76x02_dma.h (revision cbecf716ca618fd44feda6bd9a64a8179d031fc5)
1*0e3d6777SRyder Lee /* SPDX-License-Identifier: ISC */
26181bf2aSLorenzo Bianconi /*
36181bf2aSLorenzo Bianconi  * Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
46181bf2aSLorenzo Bianconi  */
56181bf2aSLorenzo Bianconi 
66181bf2aSLorenzo Bianconi #ifndef __MT76x02_DMA_H
76181bf2aSLorenzo Bianconi #define __MT76x02_DMA_H
86181bf2aSLorenzo Bianconi 
9a23fde09SLorenzo Bianconi #include "mt76x02.h"
106181bf2aSLorenzo Bianconi #include "dma.h"
116181bf2aSLorenzo Bianconi 
126181bf2aSLorenzo Bianconi #define MT_TXD_INFO_LEN			GENMASK(15, 0)
136181bf2aSLorenzo Bianconi #define MT_TXD_INFO_NEXT_VLD		BIT(16)
146181bf2aSLorenzo Bianconi #define MT_TXD_INFO_TX_BURST		BIT(17)
156181bf2aSLorenzo Bianconi #define MT_TXD_INFO_80211		BIT(19)
166181bf2aSLorenzo Bianconi #define MT_TXD_INFO_TSO			BIT(20)
176181bf2aSLorenzo Bianconi #define MT_TXD_INFO_CSO			BIT(21)
186181bf2aSLorenzo Bianconi #define MT_TXD_INFO_WIV			BIT(24)
196181bf2aSLorenzo Bianconi #define MT_TXD_INFO_QSEL		GENMASK(26, 25)
206181bf2aSLorenzo Bianconi #define MT_TXD_INFO_DPORT		GENMASK(29, 27)
216181bf2aSLorenzo Bianconi #define MT_TXD_INFO_TYPE		GENMASK(31, 30)
226181bf2aSLorenzo Bianconi 
236181bf2aSLorenzo Bianconi #define MT_RX_FCE_INFO_LEN		GENMASK(13, 0)
246181bf2aSLorenzo Bianconi #define MT_RX_FCE_INFO_SELF_GEN		BIT(15)
256181bf2aSLorenzo Bianconi #define MT_RX_FCE_INFO_CMD_SEQ		GENMASK(19, 16)
266181bf2aSLorenzo Bianconi #define MT_RX_FCE_INFO_EVT_TYPE		GENMASK(23, 20)
276181bf2aSLorenzo Bianconi #define MT_RX_FCE_INFO_PCIE_INTR	BIT(24)
286181bf2aSLorenzo Bianconi #define MT_RX_FCE_INFO_QSEL		GENMASK(26, 25)
296181bf2aSLorenzo Bianconi #define MT_RX_FCE_INFO_D_PORT		GENMASK(29, 27)
306181bf2aSLorenzo Bianconi #define MT_RX_FCE_INFO_TYPE		GENMASK(31, 30)
316181bf2aSLorenzo Bianconi 
326181bf2aSLorenzo Bianconi /* MCU request message header  */
336181bf2aSLorenzo Bianconi #define MT_MCU_MSG_LEN			GENMASK(15, 0)
346181bf2aSLorenzo Bianconi #define MT_MCU_MSG_CMD_SEQ		GENMASK(19, 16)
356181bf2aSLorenzo Bianconi #define MT_MCU_MSG_CMD_TYPE		GENMASK(26, 20)
366181bf2aSLorenzo Bianconi #define MT_MCU_MSG_PORT			GENMASK(29, 27)
376181bf2aSLorenzo Bianconi #define MT_MCU_MSG_TYPE			GENMASK(31, 30)
386181bf2aSLorenzo Bianconi #define MT_MCU_MSG_TYPE_CMD		BIT(30)
396181bf2aSLorenzo Bianconi 
40b2eabd4cSLorenzo Bianconi #define MT_RX_HEADROOM			32
41b2eabd4cSLorenzo Bianconi #define MT76X02_RX_RING_SIZE		256
42b2eabd4cSLorenzo Bianconi 
436181bf2aSLorenzo Bianconi enum dma_msg_port {
446181bf2aSLorenzo Bianconi 	WLAN_PORT,
456181bf2aSLorenzo Bianconi 	CPU_RX_PORT,
466181bf2aSLorenzo Bianconi 	CPU_TX_PORT,
476181bf2aSLorenzo Bianconi 	HOST_PORT,
486181bf2aSLorenzo Bianconi 	VIRTUAL_CPU_RX_PORT,
496181bf2aSLorenzo Bianconi 	VIRTUAL_CPU_TX_PORT,
506181bf2aSLorenzo Bianconi 	DISCARD,
516181bf2aSLorenzo Bianconi };
526181bf2aSLorenzo Bianconi 
535f1fa4cdSLorenzo Bianconi static inline bool
mt76x02_wait_for_wpdma(struct mt76_dev * dev,int timeout)545f1fa4cdSLorenzo Bianconi mt76x02_wait_for_wpdma(struct mt76_dev *dev, int timeout)
555f1fa4cdSLorenzo Bianconi {
565f1fa4cdSLorenzo Bianconi 	return __mt76_poll(dev, MT_WPDMA_GLO_CFG,
575f1fa4cdSLorenzo Bianconi 			   MT_WPDMA_GLO_CFG_TX_DMA_BUSY |
585f1fa4cdSLorenzo Bianconi 			   MT_WPDMA_GLO_CFG_RX_DMA_BUSY,
595f1fa4cdSLorenzo Bianconi 			   0, timeout);
605f1fa4cdSLorenzo Bianconi }
615f1fa4cdSLorenzo Bianconi 
62a23fde09SLorenzo Bianconi int mt76x02_dma_init(struct mt76x02_dev *dev);
63a23fde09SLorenzo Bianconi void mt76x02_dma_disable(struct mt76x02_dev *dev);
6420885649SLorenzo Bianconi 
656181bf2aSLorenzo Bianconi #endif /* __MT76x02_DMA_H */
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