xref: /openbmc/linux/drivers/net/wireless/mediatek/mt76/mt76x0/phy.h (revision 976e3645923bdd2fe7893aae33fd7a21098bfb28)
11802d0beSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */
210de7a8bSStanislaw Gruszka /*
310de7a8bSStanislaw Gruszka  * (c) Copyright 2002-2010, Ralink Technology, Inc.
410de7a8bSStanislaw Gruszka  * Copyright (C) 2018 Stanislaw Gruszka <stf_xl@wp.pl>
510de7a8bSStanislaw Gruszka  */
610de7a8bSStanislaw Gruszka #ifndef _MT76X0_PHY_H_
710de7a8bSStanislaw Gruszka #define _MT76X0_PHY_H_
810de7a8bSStanislaw Gruszka 
910de7a8bSStanislaw Gruszka #define RF_G_BAND	0x0100
1010de7a8bSStanislaw Gruszka #define RF_A_BAND	0x0200
1110de7a8bSStanislaw Gruszka #define RF_A_BAND_LB	0x0400
1210de7a8bSStanislaw Gruszka #define RF_A_BAND_MB	0x0800
1310de7a8bSStanislaw Gruszka #define RF_A_BAND_HB	0x1000
1410de7a8bSStanislaw Gruszka #define RF_A_BAND_11J	0x2000
1510de7a8bSStanislaw Gruszka 
1610de7a8bSStanislaw Gruszka #define RF_BW_20        1
1710de7a8bSStanislaw Gruszka #define RF_BW_40        2
1810de7a8bSStanislaw Gruszka #define RF_BW_10        4
1910de7a8bSStanislaw Gruszka #define RF_BW_80        8
2010de7a8bSStanislaw Gruszka 
2110de7a8bSStanislaw Gruszka #define MT_RF(bank, reg)		((bank) << 16 | (reg))
22*ff97c52aSRyder Lee #define MT_RF_BANK(offset)		((offset) >> 16)
23*ff97c52aSRyder Lee #define MT_RF_REG(offset)		((offset) & 0xff)
2410de7a8bSStanislaw Gruszka 
25d3caa060SLorenzo Bianconi #define MT_RF_VCO_BP_CLOSE_LOOP		BIT(3)
26d3caa060SLorenzo Bianconi #define MT_RF_VCO_BP_CLOSE_LOOP_MASK	GENMASK(3, 0)
27d3caa060SLorenzo Bianconi #define MT_RF_VCO_CAL_MASK		GENMASK(2, 0)
28d3caa060SLorenzo Bianconi #define MT_RF_START_TIME		0x3
29d3caa060SLorenzo Bianconi #define MT_RF_START_TIME_MASK		GENMASK(2, 0)
30d3caa060SLorenzo Bianconi #define MT_RF_SETTLE_TIME_MASK		GENMASK(6, 4)
31d3caa060SLorenzo Bianconi 
32d3caa060SLorenzo Bianconi #define MT_RF_PLL_DEN_MASK		GENMASK(4, 0)
33d3caa060SLorenzo Bianconi #define MT_RF_PLL_K_MASK		GENMASK(4, 0)
34d3caa060SLorenzo Bianconi #define MT_RF_SDM_RESET_MASK		BIT(7)
35d3caa060SLorenzo Bianconi #define MT_RF_SDM_MASH_PRBS_MASK	GENMASK(6, 2)
36d3caa060SLorenzo Bianconi #define MT_RF_SDM_BP_MASK		BIT(1)
37d3caa060SLorenzo Bianconi #define MT_RF_ISI_ISO_MASK		GENMASK(7, 6)
38d3caa060SLorenzo Bianconi #define MT_RF_PFD_DLY_MASK		GENMASK(5, 4)
39d3caa060SLorenzo Bianconi #define MT_RF_CLK_SEL_MASK		GENMASK(3, 2)
40d3caa060SLorenzo Bianconi #define MT_RF_XO_DIV_MASK		GENMASK(1, 0)
41d3caa060SLorenzo Bianconi 
4210de7a8bSStanislaw Gruszka struct mt76x0_bbp_switch_item {
4310de7a8bSStanislaw Gruszka 	u16 bw_band;
4410de7a8bSStanislaw Gruszka 	struct mt76_reg_pair reg_pair;
4510de7a8bSStanislaw Gruszka };
4610de7a8bSStanislaw Gruszka 
4710de7a8bSStanislaw Gruszka struct mt76x0_rf_switch_item {
4810de7a8bSStanislaw Gruszka 	u32 rf_bank_reg;
4910de7a8bSStanislaw Gruszka 	u16 bw_band;
5010de7a8bSStanislaw Gruszka 	u8 value;
5110de7a8bSStanislaw Gruszka };
5210de7a8bSStanislaw Gruszka 
5310de7a8bSStanislaw Gruszka struct mt76x0_freq_item {
5410de7a8bSStanislaw Gruszka 	u8 channel;
5510de7a8bSStanislaw Gruszka 	u32 band;
5610de7a8bSStanislaw Gruszka 	u8 pllR37;
5710de7a8bSStanislaw Gruszka 	u8 pllR36;
5810de7a8bSStanislaw Gruszka 	u8 pllR35;
5910de7a8bSStanislaw Gruszka 	u8 pllR34;
6010de7a8bSStanislaw Gruszka 	u8 pllR33;
6110de7a8bSStanislaw Gruszka 	u8 pllR32_b7b5;
6210de7a8bSStanislaw Gruszka 	u8 pllR32_b4b0; /* PLL_DEN (Denomina - 8) */
6310de7a8bSStanislaw Gruszka 	u8 pllR31_b7b5;
6410de7a8bSStanislaw Gruszka 	u8 pllR31_b4b0; /* PLL_K (Nominator *)*/
6510de7a8bSStanislaw Gruszka 	u8 pllR30_b7;	/* sdm_reset_n */
6610de7a8bSStanislaw Gruszka 	u8 pllR30_b6b2; /* sdmmash_prbs,sin */
6710de7a8bSStanislaw Gruszka 	u8 pllR30_b1;	/* sdm_bp */
6810de7a8bSStanislaw Gruszka 	u16 pll_n;	/* R30<0>, R29<7:0> (hex) */
6910de7a8bSStanislaw Gruszka 	u8 pllR28_b7b6; /* isi,iso */
7010de7a8bSStanislaw Gruszka 	u8 pllR28_b5b4;	/* pfd_dly */
7110de7a8bSStanislaw Gruszka 	u8 pllR28_b3b2;	/* clksel option */
7210de7a8bSStanislaw Gruszka 	u32 pll_sdm_k;	/* R28<1:0>, R27<7:0>, R26<7:0> (hex) SDM_k */
7310de7a8bSStanislaw Gruszka 	u8 pllR24_b1b0;	/* xo_div */
7410de7a8bSStanislaw Gruszka };
7510de7a8bSStanislaw Gruszka 
7610de7a8bSStanislaw Gruszka struct mt76x0_rate_pwr_item {
7710de7a8bSStanislaw Gruszka 	s8 mcs_power;
7810de7a8bSStanislaw Gruszka 	u8 rf_pa_mode;
7910de7a8bSStanislaw Gruszka };
8010de7a8bSStanislaw Gruszka 
8110de7a8bSStanislaw Gruszka struct mt76x0_rate_pwr_tab {
8210de7a8bSStanislaw Gruszka 	struct mt76x0_rate_pwr_item cck[4];
8310de7a8bSStanislaw Gruszka 	struct mt76x0_rate_pwr_item ofdm[8];
8410de7a8bSStanislaw Gruszka 	struct mt76x0_rate_pwr_item ht[8];
8510de7a8bSStanislaw Gruszka 	struct mt76x0_rate_pwr_item vht[10];
8610de7a8bSStanislaw Gruszka 	struct mt76x0_rate_pwr_item stbc[8];
8710de7a8bSStanislaw Gruszka 	struct mt76x0_rate_pwr_item mcs32;
8810de7a8bSStanislaw Gruszka };
8910de7a8bSStanislaw Gruszka 
9010de7a8bSStanislaw Gruszka #endif /* _MT76X0_PHY_H_ */
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