1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* 3 * Copyright (C) 2012-2014, 2018-2022 Intel Corporation 4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH 5 * Copyright (C) 2016-2017 Intel Deutschland GmbH 6 */ 7 #include <net/mac80211.h> 8 #include <linux/netdevice.h> 9 #include <linux/dmi.h> 10 11 #include "iwl-trans.h" 12 #include "iwl-op-mode.h" 13 #include "fw/img.h" 14 #include "iwl-debug.h" 15 #include "iwl-prph.h" 16 #include "fw/acpi.h" 17 #include "fw/pnvm.h" 18 19 #include "mvm.h" 20 #include "fw/dbg.h" 21 #include "iwl-phy-db.h" 22 #include "iwl-modparams.h" 23 #include "iwl-nvm-parse.h" 24 25 #define MVM_UCODE_ALIVE_TIMEOUT (HZ) 26 #define MVM_UCODE_CALIB_TIMEOUT (2 * HZ) 27 28 #define IWL_TAS_US_MCC 0x5553 29 #define IWL_TAS_CANADA_MCC 0x4341 30 31 struct iwl_mvm_alive_data { 32 bool valid; 33 u32 scd_base_addr; 34 }; 35 36 static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant) 37 { 38 struct iwl_tx_ant_cfg_cmd tx_ant_cmd = { 39 .valid = cpu_to_le32(valid_tx_ant), 40 }; 41 42 IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant); 43 return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0, 44 sizeof(tx_ant_cmd), &tx_ant_cmd); 45 } 46 47 static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm) 48 { 49 int i; 50 struct iwl_rss_config_cmd cmd = { 51 .flags = cpu_to_le32(IWL_RSS_ENABLE), 52 .hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) | 53 BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) | 54 BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) | 55 BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) | 56 BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) | 57 BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD), 58 }; 59 60 if (mvm->trans->num_rx_queues == 1) 61 return 0; 62 63 /* Do not direct RSS traffic to Q 0 which is our fallback queue */ 64 for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++) 65 cmd.indirection_table[i] = 66 1 + (i % (mvm->trans->num_rx_queues - 1)); 67 netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key)); 68 69 return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd); 70 } 71 72 static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm) 73 { 74 struct iwl_dqa_enable_cmd dqa_cmd = { 75 .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE), 76 }; 77 u32 cmd_id = WIDE_ID(DATA_PATH_GROUP, DQA_ENABLE_CMD); 78 int ret; 79 80 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd); 81 if (ret) 82 IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret); 83 else 84 IWL_DEBUG_FW(mvm, "Working in DQA mode\n"); 85 86 return ret; 87 } 88 89 void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm, 90 struct iwl_rx_cmd_buffer *rxb) 91 { 92 struct iwl_rx_packet *pkt = rxb_addr(rxb); 93 struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data; 94 __le32 *dump_data = mfu_dump_notif->data; 95 int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32); 96 int i; 97 98 if (mfu_dump_notif->index_num == 0) 99 IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n", 100 le32_to_cpu(mfu_dump_notif->assert_id)); 101 102 for (i = 0; i < n_words; i++) 103 IWL_DEBUG_INFO(mvm, 104 "MFUART assert dump, dword %u: 0x%08x\n", 105 le16_to_cpu(mfu_dump_notif->index_num) * 106 n_words + i, 107 le32_to_cpu(dump_data[i])); 108 } 109 110 static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait, 111 struct iwl_rx_packet *pkt, void *data) 112 { 113 unsigned int pkt_len = iwl_rx_packet_payload_len(pkt); 114 struct iwl_mvm *mvm = 115 container_of(notif_wait, struct iwl_mvm, notif_wait); 116 struct iwl_mvm_alive_data *alive_data = data; 117 struct iwl_umac_alive *umac; 118 struct iwl_lmac_alive *lmac1; 119 struct iwl_lmac_alive *lmac2 = NULL; 120 u16 status; 121 u32 lmac_error_event_table, umac_error_table; 122 u32 version = iwl_fw_lookup_notif_ver(mvm->fw, LEGACY_GROUP, 123 UCODE_ALIVE_NTFY, 0); 124 u32 i; 125 126 if (version == 6) { 127 struct iwl_alive_ntf_v6 *palive; 128 129 if (pkt_len < sizeof(*palive)) 130 return false; 131 132 palive = (void *)pkt->data; 133 mvm->trans->dbg.imr_data.imr_enable = 134 le32_to_cpu(palive->imr.enabled); 135 mvm->trans->dbg.imr_data.imr_size = 136 le32_to_cpu(palive->imr.size); 137 mvm->trans->dbg.imr_data.imr2sram_remainbyte = 138 mvm->trans->dbg.imr_data.imr_size; 139 mvm->trans->dbg.imr_data.imr_base_addr = 140 palive->imr.base_addr; 141 mvm->trans->dbg.imr_data.imr_curr_addr = 142 le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr); 143 IWL_DEBUG_FW(mvm, "IMR Enabled: 0x0%x size 0x0%x Address 0x%016llx\n", 144 mvm->trans->dbg.imr_data.imr_enable, 145 mvm->trans->dbg.imr_data.imr_size, 146 le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr)); 147 148 if (!mvm->trans->dbg.imr_data.imr_enable) { 149 for (i = 0; i < ARRAY_SIZE(mvm->trans->dbg.active_regions); i++) { 150 struct iwl_ucode_tlv *reg_tlv; 151 struct iwl_fw_ini_region_tlv *reg; 152 153 reg_tlv = mvm->trans->dbg.active_regions[i]; 154 if (!reg_tlv) 155 continue; 156 157 reg = (void *)reg_tlv->data; 158 /* 159 * We have only one DRAM IMR region, so we 160 * can break as soon as we find the first 161 * one. 162 */ 163 if (reg->type == IWL_FW_INI_REGION_DRAM_IMR) { 164 mvm->trans->dbg.unsupported_region_msk |= BIT(i); 165 break; 166 } 167 } 168 } 169 } 170 171 if (version >= 5) { 172 struct iwl_alive_ntf_v5 *palive; 173 174 if (pkt_len < sizeof(*palive)) 175 return false; 176 177 palive = (void *)pkt->data; 178 umac = &palive->umac_data; 179 lmac1 = &palive->lmac_data[0]; 180 lmac2 = &palive->lmac_data[1]; 181 status = le16_to_cpu(palive->status); 182 183 mvm->trans->sku_id[0] = le32_to_cpu(palive->sku_id.data[0]); 184 mvm->trans->sku_id[1] = le32_to_cpu(palive->sku_id.data[1]); 185 mvm->trans->sku_id[2] = le32_to_cpu(palive->sku_id.data[2]); 186 187 IWL_DEBUG_FW(mvm, "Got sku_id: 0x0%x 0x0%x 0x0%x\n", 188 mvm->trans->sku_id[0], 189 mvm->trans->sku_id[1], 190 mvm->trans->sku_id[2]); 191 } else if (iwl_rx_packet_payload_len(pkt) == sizeof(struct iwl_alive_ntf_v4)) { 192 struct iwl_alive_ntf_v4 *palive; 193 194 if (pkt_len < sizeof(*palive)) 195 return false; 196 197 palive = (void *)pkt->data; 198 umac = &palive->umac_data; 199 lmac1 = &palive->lmac_data[0]; 200 lmac2 = &palive->lmac_data[1]; 201 status = le16_to_cpu(palive->status); 202 } else if (iwl_rx_packet_payload_len(pkt) == 203 sizeof(struct iwl_alive_ntf_v3)) { 204 struct iwl_alive_ntf_v3 *palive3; 205 206 if (pkt_len < sizeof(*palive3)) 207 return false; 208 209 palive3 = (void *)pkt->data; 210 umac = &palive3->umac_data; 211 lmac1 = &palive3->lmac_data; 212 status = le16_to_cpu(palive3->status); 213 } else { 214 WARN(1, "unsupported alive notification (size %d)\n", 215 iwl_rx_packet_payload_len(pkt)); 216 /* get timeout later */ 217 return false; 218 } 219 220 lmac_error_event_table = 221 le32_to_cpu(lmac1->dbg_ptrs.error_event_table_ptr); 222 iwl_fw_lmac1_set_alive_err_table(mvm->trans, lmac_error_event_table); 223 224 if (lmac2) 225 mvm->trans->dbg.lmac_error_event_table[1] = 226 le32_to_cpu(lmac2->dbg_ptrs.error_event_table_ptr); 227 228 umac_error_table = le32_to_cpu(umac->dbg_ptrs.error_info_addr) & 229 ~FW_ADDR_CACHE_CONTROL; 230 231 if (umac_error_table) { 232 if (umac_error_table >= 233 mvm->trans->cfg->min_umac_error_event_table) { 234 iwl_fw_umac_set_alive_err_table(mvm->trans, 235 umac_error_table); 236 } else { 237 IWL_ERR(mvm, 238 "Not valid error log pointer 0x%08X for %s uCode\n", 239 umac_error_table, 240 (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ? 241 "Init" : "RT"); 242 } 243 } 244 245 alive_data->scd_base_addr = le32_to_cpu(lmac1->dbg_ptrs.scd_base_ptr); 246 alive_data->valid = status == IWL_ALIVE_STATUS_OK; 247 248 IWL_DEBUG_FW(mvm, 249 "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n", 250 status, lmac1->ver_type, lmac1->ver_subtype); 251 252 if (lmac2) 253 IWL_DEBUG_FW(mvm, "Alive ucode CDB\n"); 254 255 IWL_DEBUG_FW(mvm, 256 "UMAC version: Major - 0x%x, Minor - 0x%x\n", 257 le32_to_cpu(umac->umac_major), 258 le32_to_cpu(umac->umac_minor)); 259 260 iwl_fwrt_update_fw_versions(&mvm->fwrt, lmac1, umac); 261 262 return true; 263 } 264 265 static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait, 266 struct iwl_rx_packet *pkt, void *data) 267 { 268 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 269 270 return true; 271 } 272 273 static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait, 274 struct iwl_rx_packet *pkt, void *data) 275 { 276 struct iwl_phy_db *phy_db = data; 277 278 if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) { 279 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 280 return true; 281 } 282 283 WARN_ON(iwl_phy_db_set_section(phy_db, pkt)); 284 285 return false; 286 } 287 288 static void iwl_mvm_print_pd_notification(struct iwl_mvm *mvm) 289 { 290 #define IWL_FW_PRINT_REG_INFO(reg_name) \ 291 IWL_ERR(mvm, #reg_name ": 0x%x\n", iwl_read_umac_prph(trans, reg_name)) 292 293 struct iwl_trans *trans = mvm->trans; 294 enum iwl_device_family device_family = trans->trans_cfg->device_family; 295 296 if (device_family < IWL_DEVICE_FAMILY_8000) 297 return; 298 299 if (device_family <= IWL_DEVICE_FAMILY_9000) 300 IWL_FW_PRINT_REG_INFO(WFPM_ARC1_PD_NOTIFICATION); 301 else 302 IWL_FW_PRINT_REG_INFO(WFPM_LMAC1_PD_NOTIFICATION); 303 304 IWL_FW_PRINT_REG_INFO(HPM_SECONDARY_DEVICE_STATE); 305 306 /* print OPT info */ 307 IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_ADDR); 308 IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_DATA); 309 } 310 311 static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm, 312 enum iwl_ucode_type ucode_type) 313 { 314 struct iwl_notification_wait alive_wait; 315 struct iwl_mvm_alive_data alive_data = {}; 316 const struct fw_img *fw; 317 int ret; 318 enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img; 319 static const u16 alive_cmd[] = { UCODE_ALIVE_NTFY }; 320 bool run_in_rfkill = 321 ucode_type == IWL_UCODE_INIT || iwl_mvm_has_unified_ucode(mvm); 322 323 if (ucode_type == IWL_UCODE_REGULAR && 324 iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) && 325 !(fw_has_capa(&mvm->fw->ucode_capa, 326 IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED))) 327 fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER); 328 else 329 fw = iwl_get_ucode_image(mvm->fw, ucode_type); 330 if (WARN_ON(!fw)) 331 return -EINVAL; 332 iwl_fw_set_current_image(&mvm->fwrt, ucode_type); 333 clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status); 334 335 iwl_init_notification_wait(&mvm->notif_wait, &alive_wait, 336 alive_cmd, ARRAY_SIZE(alive_cmd), 337 iwl_alive_fn, &alive_data); 338 339 /* 340 * We want to load the INIT firmware even in RFKILL 341 * For the unified firmware case, the ucode_type is not 342 * INIT, but we still need to run it. 343 */ 344 ret = iwl_trans_start_fw(mvm->trans, fw, run_in_rfkill); 345 if (ret) { 346 iwl_fw_set_current_image(&mvm->fwrt, old_type); 347 iwl_remove_notification(&mvm->notif_wait, &alive_wait); 348 return ret; 349 } 350 351 /* 352 * Some things may run in the background now, but we 353 * just wait for the ALIVE notification here. 354 */ 355 ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait, 356 MVM_UCODE_ALIVE_TIMEOUT); 357 358 if (mvm->trans->trans_cfg->device_family == 359 IWL_DEVICE_FAMILY_AX210) { 360 /* print these registers regardless of alive fail/success */ 361 IWL_INFO(mvm, "WFPM_UMAC_PD_NOTIFICATION: 0x%x\n", 362 iwl_read_umac_prph(mvm->trans, WFPM_ARC1_PD_NOTIFICATION)); 363 IWL_INFO(mvm, "WFPM_LMAC2_PD_NOTIFICATION: 0x%x\n", 364 iwl_read_umac_prph(mvm->trans, WFPM_LMAC2_PD_NOTIFICATION)); 365 IWL_INFO(mvm, "WFPM_AUTH_KEY_0: 0x%x\n", 366 iwl_read_umac_prph(mvm->trans, SB_MODIFY_CFG_FLAG)); 367 IWL_INFO(mvm, "CNVI_SCU_SEQ_DATA_DW9: 0x%x\n", 368 iwl_read_prph(mvm->trans, CNVI_SCU_SEQ_DATA_DW9)); 369 } 370 371 if (ret) { 372 struct iwl_trans *trans = mvm->trans; 373 374 /* SecBoot info */ 375 if (trans->trans_cfg->device_family >= 376 IWL_DEVICE_FAMILY_22000) { 377 IWL_ERR(mvm, 378 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 379 iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS), 380 iwl_read_umac_prph(trans, 381 UMAG_SB_CPU_2_STATUS)); 382 } else if (trans->trans_cfg->device_family >= 383 IWL_DEVICE_FAMILY_8000) { 384 IWL_ERR(mvm, 385 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 386 iwl_read_prph(trans, SB_CPU_1_STATUS), 387 iwl_read_prph(trans, SB_CPU_2_STATUS)); 388 } 389 390 iwl_mvm_print_pd_notification(mvm); 391 392 /* LMAC/UMAC PC info */ 393 if (trans->trans_cfg->device_family >= 394 IWL_DEVICE_FAMILY_9000) { 395 IWL_ERR(mvm, "UMAC PC: 0x%x\n", 396 iwl_read_umac_prph(trans, 397 UREG_UMAC_CURRENT_PC)); 398 IWL_ERR(mvm, "LMAC PC: 0x%x\n", 399 iwl_read_umac_prph(trans, 400 UREG_LMAC1_CURRENT_PC)); 401 if (iwl_mvm_is_cdb_supported(mvm)) 402 IWL_ERR(mvm, "LMAC2 PC: 0x%x\n", 403 iwl_read_umac_prph(trans, 404 UREG_LMAC2_CURRENT_PC)); 405 } 406 407 if (ret == -ETIMEDOUT && !mvm->pldr_sync) 408 iwl_fw_dbg_error_collect(&mvm->fwrt, 409 FW_DBG_TRIGGER_ALIVE_TIMEOUT); 410 411 iwl_fw_set_current_image(&mvm->fwrt, old_type); 412 return ret; 413 } 414 415 if (!alive_data.valid) { 416 IWL_ERR(mvm, "Loaded ucode is not valid!\n"); 417 iwl_fw_set_current_image(&mvm->fwrt, old_type); 418 return -EIO; 419 } 420 421 /* if reached this point, Alive notification was received */ 422 iwl_mei_alive_notif(true); 423 424 ret = iwl_pnvm_load(mvm->trans, &mvm->notif_wait); 425 if (ret) { 426 IWL_ERR(mvm, "Timeout waiting for PNVM load!\n"); 427 iwl_fw_set_current_image(&mvm->fwrt, old_type); 428 return ret; 429 } 430 431 iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr); 432 433 /* 434 * Note: all the queues are enabled as part of the interface 435 * initialization, but in firmware restart scenarios they 436 * could be stopped, so wake them up. In firmware restart, 437 * mac80211 will have the queues stopped as well until the 438 * reconfiguration completes. During normal startup, they 439 * will be empty. 440 */ 441 442 memset(&mvm->queue_info, 0, sizeof(mvm->queue_info)); 443 /* 444 * Set a 'fake' TID for the command queue, since we use the 445 * hweight() of the tid_bitmap as a refcount now. Not that 446 * we ever even consider the command queue as one we might 447 * want to reuse, but be safe nevertheless. 448 */ 449 mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap = 450 BIT(IWL_MAX_TID_COUNT + 2); 451 452 set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status); 453 #ifdef CONFIG_IWLWIFI_DEBUGFS 454 iwl_fw_set_dbg_rec_on(&mvm->fwrt); 455 #endif 456 457 /* 458 * All the BSSes in the BSS table include the GP2 in the system 459 * at the beacon Rx time, this is of course no longer relevant 460 * since we are resetting the firmware. 461 * Purge all the BSS table. 462 */ 463 cfg80211_bss_flush(mvm->hw->wiphy); 464 465 return 0; 466 } 467 468 static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm) 469 { 470 struct iwl_notification_wait init_wait; 471 struct iwl_nvm_access_complete_cmd nvm_complete = {}; 472 struct iwl_init_extended_cfg_cmd init_cfg = { 473 .init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)), 474 }; 475 static const u16 init_complete[] = { 476 INIT_COMPLETE_NOTIF, 477 }; 478 int ret; 479 480 if (mvm->trans->cfg->tx_with_siso_diversity) 481 init_cfg.init_flags |= cpu_to_le32(BIT(IWL_INIT_PHY)); 482 483 lockdep_assert_held(&mvm->mutex); 484 485 mvm->rfkill_safe_init_done = false; 486 487 iwl_init_notification_wait(&mvm->notif_wait, 488 &init_wait, 489 init_complete, 490 ARRAY_SIZE(init_complete), 491 iwl_wait_init_complete, 492 NULL); 493 494 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL); 495 496 /* Will also start the device */ 497 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 498 if (ret) { 499 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 500 goto error; 501 } 502 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE, 503 NULL); 504 505 /* Send init config command to mark that we are sending NVM access 506 * commands 507 */ 508 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP, 509 INIT_EXTENDED_CFG_CMD), 510 CMD_SEND_IN_RFKILL, 511 sizeof(init_cfg), &init_cfg); 512 if (ret) { 513 IWL_ERR(mvm, "Failed to run init config command: %d\n", 514 ret); 515 goto error; 516 } 517 518 /* Load NVM to NIC if needed */ 519 if (mvm->nvm_file_name) { 520 ret = iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name, 521 mvm->nvm_sections); 522 if (ret) 523 goto error; 524 ret = iwl_mvm_load_nvm_to_nic(mvm); 525 if (ret) 526 goto error; 527 } 528 529 if (IWL_MVM_PARSE_NVM && !mvm->nvm_data) { 530 ret = iwl_nvm_init(mvm); 531 if (ret) { 532 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 533 goto error; 534 } 535 } 536 537 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP, 538 NVM_ACCESS_COMPLETE), 539 CMD_SEND_IN_RFKILL, 540 sizeof(nvm_complete), &nvm_complete); 541 if (ret) { 542 IWL_ERR(mvm, "Failed to run complete NVM access: %d\n", 543 ret); 544 goto error; 545 } 546 547 /* We wait for the INIT complete notification */ 548 ret = iwl_wait_notification(&mvm->notif_wait, &init_wait, 549 MVM_UCODE_ALIVE_TIMEOUT); 550 if (ret) 551 return ret; 552 553 /* Read the NVM only at driver load time, no need to do this twice */ 554 if (!IWL_MVM_PARSE_NVM && !mvm->nvm_data) { 555 mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw); 556 if (IS_ERR(mvm->nvm_data)) { 557 ret = PTR_ERR(mvm->nvm_data); 558 mvm->nvm_data = NULL; 559 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 560 return ret; 561 } 562 } 563 564 mvm->rfkill_safe_init_done = true; 565 566 return 0; 567 568 error: 569 iwl_remove_notification(&mvm->notif_wait, &init_wait); 570 return ret; 571 } 572 573 #ifdef CONFIG_ACPI 574 static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm, 575 struct iwl_phy_specific_cfg *phy_filters) 576 { 577 /* 578 * TODO: read specific phy config from BIOS 579 * ACPI table for this feature has not been defined yet, 580 * so for now we use hardcoded values. 581 */ 582 583 if (IWL_MVM_PHY_FILTER_CHAIN_A) { 584 phy_filters->filter_cfg_chain_a = 585 cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_A); 586 } 587 if (IWL_MVM_PHY_FILTER_CHAIN_B) { 588 phy_filters->filter_cfg_chain_b = 589 cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_B); 590 } 591 if (IWL_MVM_PHY_FILTER_CHAIN_C) { 592 phy_filters->filter_cfg_chain_c = 593 cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_C); 594 } 595 if (IWL_MVM_PHY_FILTER_CHAIN_D) { 596 phy_filters->filter_cfg_chain_d = 597 cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_D); 598 } 599 } 600 #else /* CONFIG_ACPI */ 601 602 static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm, 603 struct iwl_phy_specific_cfg *phy_filters) 604 { 605 } 606 #endif /* CONFIG_ACPI */ 607 608 #if defined(CONFIG_ACPI) && defined(CONFIG_EFI) 609 static int iwl_mvm_sgom_init(struct iwl_mvm *mvm) 610 { 611 u8 cmd_ver; 612 int ret; 613 struct iwl_host_cmd cmd = { 614 .id = WIDE_ID(REGULATORY_AND_NVM_GROUP, 615 SAR_OFFSET_MAPPING_TABLE_CMD), 616 .flags = 0, 617 .data[0] = &mvm->fwrt.sgom_table, 618 .len[0] = sizeof(mvm->fwrt.sgom_table), 619 .dataflags[0] = IWL_HCMD_DFL_NOCOPY, 620 }; 621 622 if (!mvm->fwrt.sgom_enabled) { 623 IWL_DEBUG_RADIO(mvm, "SGOM table is disabled\n"); 624 return 0; 625 } 626 627 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id, 628 IWL_FW_CMD_VER_UNKNOWN); 629 630 if (cmd_ver != 2) { 631 IWL_DEBUG_RADIO(mvm, "command version is unsupported. version = %d\n", 632 cmd_ver); 633 return 0; 634 } 635 636 ret = iwl_mvm_send_cmd(mvm, &cmd); 637 if (ret < 0) 638 IWL_ERR(mvm, "failed to send SAR_OFFSET_MAPPING_CMD (%d)\n", ret); 639 640 return ret; 641 } 642 #else 643 644 static int iwl_mvm_sgom_init(struct iwl_mvm *mvm) 645 { 646 return 0; 647 } 648 #endif 649 650 static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm) 651 { 652 u32 cmd_id = PHY_CONFIGURATION_CMD; 653 struct iwl_phy_cfg_cmd_v3 phy_cfg_cmd; 654 enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img; 655 struct iwl_phy_specific_cfg phy_filters = {}; 656 u8 cmd_ver; 657 size_t cmd_size; 658 659 if (iwl_mvm_has_unified_ucode(mvm) && 660 !mvm->trans->cfg->tx_with_siso_diversity) 661 return 0; 662 663 if (mvm->trans->cfg->tx_with_siso_diversity) { 664 /* 665 * TODO: currently we don't set the antenna but letting the NIC 666 * to decide which antenna to use. This should come from BIOS. 667 */ 668 phy_cfg_cmd.phy_cfg = 669 cpu_to_le32(FW_PHY_CFG_CHAIN_SAD_ENABLED); 670 } 671 672 /* Set parameters */ 673 phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm)); 674 675 /* set flags extra PHY configuration flags from the device's cfg */ 676 phy_cfg_cmd.phy_cfg |= 677 cpu_to_le32(mvm->trans->trans_cfg->extra_phy_cfg_flags); 678 679 phy_cfg_cmd.calib_control.event_trigger = 680 mvm->fw->default_calib[ucode_type].event_trigger; 681 phy_cfg_cmd.calib_control.flow_trigger = 682 mvm->fw->default_calib[ucode_type].flow_trigger; 683 684 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 685 IWL_FW_CMD_VER_UNKNOWN); 686 if (cmd_ver == 3) { 687 iwl_mvm_phy_filter_init(mvm, &phy_filters); 688 memcpy(&phy_cfg_cmd.phy_specific_cfg, &phy_filters, 689 sizeof(struct iwl_phy_specific_cfg)); 690 } 691 692 IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n", 693 phy_cfg_cmd.phy_cfg); 694 cmd_size = (cmd_ver == 3) ? sizeof(struct iwl_phy_cfg_cmd_v3) : 695 sizeof(struct iwl_phy_cfg_cmd_v1); 696 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, &phy_cfg_cmd); 697 } 698 699 int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm) 700 { 701 struct iwl_notification_wait calib_wait; 702 static const u16 init_complete[] = { 703 INIT_COMPLETE_NOTIF, 704 CALIB_RES_NOTIF_PHY_DB 705 }; 706 int ret; 707 708 if (iwl_mvm_has_unified_ucode(mvm)) 709 return iwl_run_unified_mvm_ucode(mvm); 710 711 lockdep_assert_held(&mvm->mutex); 712 713 mvm->rfkill_safe_init_done = false; 714 715 iwl_init_notification_wait(&mvm->notif_wait, 716 &calib_wait, 717 init_complete, 718 ARRAY_SIZE(init_complete), 719 iwl_wait_phy_db_entry, 720 mvm->phy_db); 721 722 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL); 723 724 /* Will also start the device */ 725 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT); 726 if (ret) { 727 IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret); 728 goto remove_notif; 729 } 730 731 if (mvm->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_8000) { 732 ret = iwl_mvm_send_bt_init_conf(mvm); 733 if (ret) 734 goto remove_notif; 735 } 736 737 /* Read the NVM only at driver load time, no need to do this twice */ 738 if (!mvm->nvm_data) { 739 ret = iwl_nvm_init(mvm); 740 if (ret) { 741 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 742 goto remove_notif; 743 } 744 } 745 746 /* In case we read the NVM from external file, load it to the NIC */ 747 if (mvm->nvm_file_name) { 748 ret = iwl_mvm_load_nvm_to_nic(mvm); 749 if (ret) 750 goto remove_notif; 751 } 752 753 WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver, 754 "Too old NVM version (0x%0x, required = 0x%0x)", 755 mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver); 756 757 /* 758 * abort after reading the nvm in case RF Kill is on, we will complete 759 * the init seq later when RF kill will switch to off 760 */ 761 if (iwl_mvm_is_radio_hw_killed(mvm)) { 762 IWL_DEBUG_RF_KILL(mvm, 763 "jump over all phy activities due to RF kill\n"); 764 goto remove_notif; 765 } 766 767 mvm->rfkill_safe_init_done = true; 768 769 /* Send TX valid antennas before triggering calibrations */ 770 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 771 if (ret) 772 goto remove_notif; 773 774 ret = iwl_send_phy_cfg_cmd(mvm); 775 if (ret) { 776 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 777 ret); 778 goto remove_notif; 779 } 780 781 /* 782 * Some things may run in the background now, but we 783 * just wait for the calibration complete notification. 784 */ 785 ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait, 786 MVM_UCODE_CALIB_TIMEOUT); 787 if (!ret) 788 goto out; 789 790 if (iwl_mvm_is_radio_hw_killed(mvm)) { 791 IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n"); 792 ret = 0; 793 } else { 794 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 795 ret); 796 } 797 798 goto out; 799 800 remove_notif: 801 iwl_remove_notification(&mvm->notif_wait, &calib_wait); 802 out: 803 mvm->rfkill_safe_init_done = false; 804 if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) { 805 /* we want to debug INIT and we have no NVM - fake */ 806 mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) + 807 sizeof(struct ieee80211_channel) + 808 sizeof(struct ieee80211_rate), 809 GFP_KERNEL); 810 if (!mvm->nvm_data) 811 return -ENOMEM; 812 mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels; 813 mvm->nvm_data->bands[0].n_channels = 1; 814 mvm->nvm_data->bands[0].n_bitrates = 1; 815 mvm->nvm_data->bands[0].bitrates = 816 (void *)((u8 *)mvm->nvm_data->channels + 1); 817 mvm->nvm_data->bands[0].bitrates->hw_value = 10; 818 } 819 820 return ret; 821 } 822 823 static int iwl_mvm_config_ltr(struct iwl_mvm *mvm) 824 { 825 struct iwl_ltr_config_cmd cmd = { 826 .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE), 827 }; 828 829 if (!mvm->trans->ltr_enabled) 830 return 0; 831 832 return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0, 833 sizeof(cmd), &cmd); 834 } 835 836 #ifdef CONFIG_ACPI 837 int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b) 838 { 839 u32 cmd_id = REDUCE_TX_POWER_CMD; 840 struct iwl_dev_tx_power_cmd cmd = { 841 .common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS), 842 }; 843 __le16 *per_chain; 844 int ret; 845 u16 len = 0; 846 u32 n_subbands; 847 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 848 IWL_FW_CMD_VER_UNKNOWN); 849 if (cmd_ver == 7) { 850 len = sizeof(cmd.v7); 851 n_subbands = IWL_NUM_SUB_BANDS_V2; 852 per_chain = cmd.v7.per_chain[0][0]; 853 cmd.v7.flags = cpu_to_le32(mvm->fwrt.reduced_power_flags); 854 } else if (cmd_ver == 6) { 855 len = sizeof(cmd.v6); 856 n_subbands = IWL_NUM_SUB_BANDS_V2; 857 per_chain = cmd.v6.per_chain[0][0]; 858 } else if (fw_has_api(&mvm->fw->ucode_capa, 859 IWL_UCODE_TLV_API_REDUCE_TX_POWER)) { 860 len = sizeof(cmd.v5); 861 n_subbands = IWL_NUM_SUB_BANDS_V1; 862 per_chain = cmd.v5.per_chain[0][0]; 863 } else if (fw_has_capa(&mvm->fw->ucode_capa, 864 IWL_UCODE_TLV_CAPA_TX_POWER_ACK)) { 865 len = sizeof(cmd.v4); 866 n_subbands = IWL_NUM_SUB_BANDS_V1; 867 per_chain = cmd.v4.per_chain[0][0]; 868 } else { 869 len = sizeof(cmd.v3); 870 n_subbands = IWL_NUM_SUB_BANDS_V1; 871 per_chain = cmd.v3.per_chain[0][0]; 872 } 873 874 /* all structs have the same common part, add it */ 875 len += sizeof(cmd.common); 876 877 ret = iwl_sar_select_profile(&mvm->fwrt, per_chain, 878 IWL_NUM_CHAIN_TABLES, 879 n_subbands, prof_a, prof_b); 880 881 /* return on error or if the profile is disabled (positive number) */ 882 if (ret) 883 return ret; 884 885 iwl_mei_set_power_limit(per_chain); 886 887 IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n"); 888 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, &cmd); 889 } 890 891 int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) 892 { 893 union iwl_geo_tx_power_profiles_cmd geo_tx_cmd; 894 struct iwl_geo_tx_power_profiles_resp *resp; 895 u16 len; 896 int ret; 897 struct iwl_host_cmd cmd = { 898 .id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD), 899 .flags = CMD_WANT_SKB, 900 .data = { &geo_tx_cmd }, 901 }; 902 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id, 903 IWL_FW_CMD_VER_UNKNOWN); 904 905 /* the ops field is at the same spot for all versions, so set in v1 */ 906 geo_tx_cmd.v1.ops = 907 cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE); 908 909 if (cmd_ver == 5) 910 len = sizeof(geo_tx_cmd.v5); 911 else if (cmd_ver == 4) 912 len = sizeof(geo_tx_cmd.v4); 913 else if (cmd_ver == 3) 914 len = sizeof(geo_tx_cmd.v3); 915 else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 916 IWL_UCODE_TLV_API_SAR_TABLE_VER)) 917 len = sizeof(geo_tx_cmd.v2); 918 else 919 len = sizeof(geo_tx_cmd.v1); 920 921 if (!iwl_sar_geo_support(&mvm->fwrt)) 922 return -EOPNOTSUPP; 923 924 cmd.len[0] = len; 925 926 ret = iwl_mvm_send_cmd(mvm, &cmd); 927 if (ret) { 928 IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret); 929 return ret; 930 } 931 932 resp = (void *)cmd.resp_pkt->data; 933 ret = le32_to_cpu(resp->profile_idx); 934 935 if (WARN_ON(ret > ACPI_NUM_GEO_PROFILES_REV3)) 936 ret = -EIO; 937 938 iwl_free_resp(&cmd); 939 return ret; 940 } 941 942 static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) 943 { 944 u32 cmd_id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD); 945 union iwl_geo_tx_power_profiles_cmd cmd; 946 u16 len; 947 u32 n_bands; 948 u32 n_profiles; 949 u32 sk = 0; 950 int ret; 951 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 952 IWL_FW_CMD_VER_UNKNOWN); 953 954 BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, ops) != 955 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) || 956 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) != 957 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) || 958 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) != 959 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) || 960 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) != 961 offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, ops)); 962 963 /* the ops field is at the same spot for all versions, so set in v1 */ 964 cmd.v1.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES); 965 966 if (cmd_ver == 5) { 967 len = sizeof(cmd.v5); 968 n_bands = ARRAY_SIZE(cmd.v5.table[0]); 969 n_profiles = ACPI_NUM_GEO_PROFILES_REV3; 970 } else if (cmd_ver == 4) { 971 len = sizeof(cmd.v4); 972 n_bands = ARRAY_SIZE(cmd.v4.table[0]); 973 n_profiles = ACPI_NUM_GEO_PROFILES_REV3; 974 } else if (cmd_ver == 3) { 975 len = sizeof(cmd.v3); 976 n_bands = ARRAY_SIZE(cmd.v3.table[0]); 977 n_profiles = ACPI_NUM_GEO_PROFILES; 978 } else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 979 IWL_UCODE_TLV_API_SAR_TABLE_VER)) { 980 len = sizeof(cmd.v2); 981 n_bands = ARRAY_SIZE(cmd.v2.table[0]); 982 n_profiles = ACPI_NUM_GEO_PROFILES; 983 } else { 984 len = sizeof(cmd.v1); 985 n_bands = ARRAY_SIZE(cmd.v1.table[0]); 986 n_profiles = ACPI_NUM_GEO_PROFILES; 987 } 988 989 BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, table) != 990 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) || 991 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) != 992 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) || 993 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) != 994 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) || 995 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) != 996 offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, table)); 997 /* the table is at the same position for all versions, so set use v1 */ 998 ret = iwl_sar_geo_init(&mvm->fwrt, &cmd.v1.table[0][0], 999 n_bands, n_profiles); 1000 1001 /* 1002 * It is a valid scenario to not support SAR, or miss wgds table, 1003 * but in that case there is no need to send the command. 1004 */ 1005 if (ret) 1006 return 0; 1007 1008 /* Only set to South Korea if the table revision is 1 */ 1009 if (mvm->fwrt.geo_rev == 1) 1010 sk = 1; 1011 1012 /* 1013 * Set the table_revision to South Korea (1) or not (0). The 1014 * element name is misleading, as it doesn't contain the table 1015 * revision number, but whether the South Korea variation 1016 * should be used. 1017 * This must be done after calling iwl_sar_geo_init(). 1018 */ 1019 if (cmd_ver == 5) 1020 cmd.v5.table_revision = cpu_to_le32(sk); 1021 else if (cmd_ver == 4) 1022 cmd.v4.table_revision = cpu_to_le32(sk); 1023 else if (cmd_ver == 3) 1024 cmd.v3.table_revision = cpu_to_le32(sk); 1025 else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 1026 IWL_UCODE_TLV_API_SAR_TABLE_VER)) 1027 cmd.v2.table_revision = cpu_to_le32(sk); 1028 1029 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, &cmd); 1030 } 1031 1032 int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm) 1033 { 1034 union iwl_ppag_table_cmd cmd; 1035 int ret, cmd_size; 1036 1037 ret = iwl_read_ppag_table(&mvm->fwrt, &cmd, &cmd_size); 1038 /* Not supporting PPAG table is a valid scenario */ 1039 if(ret < 0) 1040 return 0; 1041 1042 IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n"); 1043 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP, 1044 PER_PLATFORM_ANT_GAIN_CMD), 1045 0, cmd_size, &cmd); 1046 if (ret < 0) 1047 IWL_ERR(mvm, "failed to send PER_PLATFORM_ANT_GAIN_CMD (%d)\n", 1048 ret); 1049 1050 return ret; 1051 } 1052 1053 static int iwl_mvm_ppag_init(struct iwl_mvm *mvm) 1054 { 1055 /* no need to read the table, done in INIT stage */ 1056 if (!(iwl_acpi_is_ppag_approved(&mvm->fwrt))) 1057 return 0; 1058 1059 return iwl_mvm_ppag_send_cmd(mvm); 1060 } 1061 1062 static const struct dmi_system_id dmi_tas_approved_list[] = { 1063 { .ident = "HP", 1064 .matches = { 1065 DMI_MATCH(DMI_SYS_VENDOR, "HP"), 1066 }, 1067 }, 1068 { .ident = "SAMSUNG", 1069 .matches = { 1070 DMI_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD"), 1071 }, 1072 }, 1073 { .ident = "LENOVO", 1074 .matches = { 1075 DMI_MATCH(DMI_SYS_VENDOR, "Lenovo"), 1076 }, 1077 }, 1078 { .ident = "DELL", 1079 .matches = { 1080 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 1081 }, 1082 }, 1083 1084 /* keep last */ 1085 {} 1086 }; 1087 1088 static bool iwl_mvm_add_to_tas_block_list(__le32 *list, __le32 *le_size, unsigned int mcc) 1089 { 1090 int i; 1091 u32 size = le32_to_cpu(*le_size); 1092 1093 /* Verify that there is room for another country */ 1094 if (size >= IWL_TAS_BLOCK_LIST_MAX) 1095 return false; 1096 1097 for (i = 0; i < size; i++) { 1098 if (list[i] == cpu_to_le32(mcc)) 1099 return true; 1100 } 1101 1102 list[size++] = cpu_to_le32(mcc); 1103 *le_size = cpu_to_le32(size); 1104 return true; 1105 } 1106 1107 static void iwl_mvm_tas_init(struct iwl_mvm *mvm) 1108 { 1109 u32 cmd_id = WIDE_ID(REGULATORY_AND_NVM_GROUP, TAS_CONFIG); 1110 int ret; 1111 union iwl_tas_config_cmd cmd = {}; 1112 int cmd_size, fw_ver; 1113 1114 BUILD_BUG_ON(ARRAY_SIZE(cmd.v3.block_list_array) < 1115 APCI_WTAS_BLACK_LIST_MAX); 1116 1117 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TAS_CFG)) { 1118 IWL_DEBUG_RADIO(mvm, "TAS not enabled in FW\n"); 1119 return; 1120 } 1121 1122 fw_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 1123 IWL_FW_CMD_VER_UNKNOWN); 1124 1125 ret = iwl_acpi_get_tas(&mvm->fwrt, &cmd, fw_ver); 1126 if (ret < 0) { 1127 IWL_DEBUG_RADIO(mvm, 1128 "TAS table invalid or unavailable. (%d)\n", 1129 ret); 1130 return; 1131 } 1132 1133 if (ret == 0) 1134 return; 1135 1136 if (!dmi_check_system(dmi_tas_approved_list)) { 1137 IWL_DEBUG_RADIO(mvm, 1138 "System vendor '%s' is not in the approved list, disabling TAS in US and Canada.\n", 1139 dmi_get_system_info(DMI_SYS_VENDOR)); 1140 if ((!iwl_mvm_add_to_tas_block_list(cmd.v4.block_list_array, 1141 &cmd.v4.block_list_size, 1142 IWL_TAS_US_MCC)) || 1143 (!iwl_mvm_add_to_tas_block_list(cmd.v4.block_list_array, 1144 &cmd.v4.block_list_size, 1145 IWL_TAS_CANADA_MCC))) { 1146 IWL_DEBUG_RADIO(mvm, 1147 "Unable to add US/Canada to TAS block list, disabling TAS\n"); 1148 return; 1149 } 1150 } 1151 1152 /* v4 is the same size as v3, so no need to differentiate here */ 1153 cmd_size = fw_ver < 3 ? 1154 sizeof(struct iwl_tas_config_cmd_v2) : 1155 sizeof(struct iwl_tas_config_cmd_v3); 1156 1157 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, &cmd); 1158 if (ret < 0) 1159 IWL_DEBUG_RADIO(mvm, "failed to send TAS_CONFIG (%d)\n", ret); 1160 } 1161 1162 static u8 iwl_mvm_eval_dsm_rfi(struct iwl_mvm *mvm) 1163 { 1164 u8 value; 1165 int ret = iwl_acpi_get_dsm_u8(mvm->fwrt.dev, 0, DSM_RFI_FUNC_ENABLE, 1166 &iwl_rfi_guid, &value); 1167 1168 if (ret < 0) { 1169 IWL_DEBUG_RADIO(mvm, "Failed to get DSM RFI, ret=%d\n", ret); 1170 1171 } else if (value >= DSM_VALUE_RFI_MAX) { 1172 IWL_DEBUG_RADIO(mvm, "DSM RFI got invalid value, ret=%d\n", 1173 value); 1174 1175 } else if (value == DSM_VALUE_RFI_ENABLE) { 1176 IWL_DEBUG_RADIO(mvm, "DSM RFI is evaluated to enable\n"); 1177 return DSM_VALUE_RFI_ENABLE; 1178 } 1179 1180 IWL_DEBUG_RADIO(mvm, "DSM RFI is disabled\n"); 1181 1182 /* default behaviour is disabled */ 1183 return DSM_VALUE_RFI_DISABLE; 1184 } 1185 1186 static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm) 1187 { 1188 int ret; 1189 u32 value; 1190 struct iwl_lari_config_change_cmd_v6 cmd = {}; 1191 1192 cmd.config_bitmap = iwl_acpi_get_lari_config_bitmap(&mvm->fwrt); 1193 1194 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, DSM_FUNC_11AX_ENABLEMENT, 1195 &iwl_guid, &value); 1196 if (!ret) 1197 cmd.oem_11ax_allow_bitmap = cpu_to_le32(value); 1198 1199 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 1200 DSM_FUNC_ENABLE_UNII4_CHAN, 1201 &iwl_guid, &value); 1202 if (!ret) 1203 cmd.oem_unii4_allow_bitmap = cpu_to_le32(value); 1204 1205 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 1206 DSM_FUNC_ACTIVATE_CHANNEL, 1207 &iwl_guid, &value); 1208 if (!ret) 1209 cmd.chan_state_active_bitmap = cpu_to_le32(value); 1210 1211 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 1212 DSM_FUNC_ENABLE_6E, 1213 &iwl_guid, &value); 1214 if (!ret) 1215 cmd.oem_uhb_allow_bitmap = cpu_to_le32(value); 1216 1217 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 1218 DSM_FUNC_FORCE_DISABLE_CHANNELS, 1219 &iwl_guid, &value); 1220 if (!ret) 1221 cmd.force_disable_channels_bitmap = cpu_to_le32(value); 1222 1223 if (cmd.config_bitmap || 1224 cmd.oem_uhb_allow_bitmap || 1225 cmd.oem_11ax_allow_bitmap || 1226 cmd.oem_unii4_allow_bitmap || 1227 cmd.chan_state_active_bitmap || 1228 cmd.force_disable_channels_bitmap) { 1229 size_t cmd_size; 1230 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, 1231 WIDE_ID(REGULATORY_AND_NVM_GROUP, 1232 LARI_CONFIG_CHANGE), 1233 1); 1234 switch (cmd_ver) { 1235 case 6: 1236 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v6); 1237 break; 1238 case 5: 1239 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v5); 1240 break; 1241 case 4: 1242 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v4); 1243 break; 1244 case 3: 1245 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v3); 1246 break; 1247 case 2: 1248 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v2); 1249 break; 1250 default: 1251 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v1); 1252 break; 1253 } 1254 1255 IWL_DEBUG_RADIO(mvm, 1256 "sending LARI_CONFIG_CHANGE, config_bitmap=0x%x, oem_11ax_allow_bitmap=0x%x\n", 1257 le32_to_cpu(cmd.config_bitmap), 1258 le32_to_cpu(cmd.oem_11ax_allow_bitmap)); 1259 IWL_DEBUG_RADIO(mvm, 1260 "sending LARI_CONFIG_CHANGE, oem_unii4_allow_bitmap=0x%x, chan_state_active_bitmap=0x%x, cmd_ver=%d\n", 1261 le32_to_cpu(cmd.oem_unii4_allow_bitmap), 1262 le32_to_cpu(cmd.chan_state_active_bitmap), 1263 cmd_ver); 1264 IWL_DEBUG_RADIO(mvm, 1265 "sending LARI_CONFIG_CHANGE, oem_uhb_allow_bitmap=0x%x, force_disable_channels_bitmap=0x%x\n", 1266 le32_to_cpu(cmd.oem_uhb_allow_bitmap), 1267 le32_to_cpu(cmd.force_disable_channels_bitmap)); 1268 ret = iwl_mvm_send_cmd_pdu(mvm, 1269 WIDE_ID(REGULATORY_AND_NVM_GROUP, 1270 LARI_CONFIG_CHANGE), 1271 0, cmd_size, &cmd); 1272 if (ret < 0) 1273 IWL_DEBUG_RADIO(mvm, 1274 "Failed to send LARI_CONFIG_CHANGE (%d)\n", 1275 ret); 1276 } 1277 } 1278 1279 void iwl_mvm_get_acpi_tables(struct iwl_mvm *mvm) 1280 { 1281 int ret; 1282 1283 /* read PPAG table */ 1284 ret = iwl_acpi_get_ppag_table(&mvm->fwrt); 1285 if (ret < 0) { 1286 IWL_DEBUG_RADIO(mvm, 1287 "PPAG BIOS table invalid or unavailable. (%d)\n", 1288 ret); 1289 } 1290 1291 /* read SAR tables */ 1292 ret = iwl_sar_get_wrds_table(&mvm->fwrt); 1293 if (ret < 0) { 1294 IWL_DEBUG_RADIO(mvm, 1295 "WRDS SAR BIOS table invalid or unavailable. (%d)\n", 1296 ret); 1297 /* 1298 * If not available, don't fail and don't bother with EWRD and 1299 * WGDS */ 1300 1301 if (!iwl_sar_get_wgds_table(&mvm->fwrt)) { 1302 /* 1303 * If basic SAR is not available, we check for WGDS, 1304 * which should *not* be available either. If it is 1305 * available, issue an error, because we can't use SAR 1306 * Geo without basic SAR. 1307 */ 1308 IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n"); 1309 } 1310 1311 } else { 1312 ret = iwl_sar_get_ewrd_table(&mvm->fwrt); 1313 /* if EWRD is not available, we can still use 1314 * WRDS, so don't fail */ 1315 if (ret < 0) 1316 IWL_DEBUG_RADIO(mvm, 1317 "EWRD SAR BIOS table invalid or unavailable. (%d)\n", 1318 ret); 1319 1320 /* read geo SAR table */ 1321 if (iwl_sar_geo_support(&mvm->fwrt)) { 1322 ret = iwl_sar_get_wgds_table(&mvm->fwrt); 1323 if (ret < 0) 1324 IWL_DEBUG_RADIO(mvm, 1325 "Geo SAR BIOS table invalid or unavailable. (%d)\n", 1326 ret); 1327 /* we don't fail if the table is not available */ 1328 } 1329 } 1330 } 1331 #else /* CONFIG_ACPI */ 1332 1333 inline int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, 1334 int prof_a, int prof_b) 1335 { 1336 return 1; 1337 } 1338 1339 inline int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) 1340 { 1341 return -ENOENT; 1342 } 1343 1344 static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) 1345 { 1346 return 0; 1347 } 1348 1349 int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm) 1350 { 1351 return -ENOENT; 1352 } 1353 1354 static int iwl_mvm_ppag_init(struct iwl_mvm *mvm) 1355 { 1356 return 0; 1357 } 1358 1359 static void iwl_mvm_tas_init(struct iwl_mvm *mvm) 1360 { 1361 } 1362 1363 static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm) 1364 { 1365 } 1366 1367 static u8 iwl_mvm_eval_dsm_rfi(struct iwl_mvm *mvm) 1368 { 1369 return DSM_VALUE_RFI_DISABLE; 1370 } 1371 1372 void iwl_mvm_get_acpi_tables(struct iwl_mvm *mvm) 1373 { 1374 } 1375 1376 #endif /* CONFIG_ACPI */ 1377 1378 void iwl_mvm_send_recovery_cmd(struct iwl_mvm *mvm, u32 flags) 1379 { 1380 u32 error_log_size = mvm->fw->ucode_capa.error_log_size; 1381 int ret; 1382 u32 resp; 1383 1384 struct iwl_fw_error_recovery_cmd recovery_cmd = { 1385 .flags = cpu_to_le32(flags), 1386 .buf_size = 0, 1387 }; 1388 struct iwl_host_cmd host_cmd = { 1389 .id = WIDE_ID(SYSTEM_GROUP, FW_ERROR_RECOVERY_CMD), 1390 .flags = CMD_WANT_SKB, 1391 .data = {&recovery_cmd, }, 1392 .len = {sizeof(recovery_cmd), }, 1393 }; 1394 1395 /* no error log was defined in TLV */ 1396 if (!error_log_size) 1397 return; 1398 1399 if (flags & ERROR_RECOVERY_UPDATE_DB) { 1400 /* no buf was allocated while HW reset */ 1401 if (!mvm->error_recovery_buf) 1402 return; 1403 1404 host_cmd.data[1] = mvm->error_recovery_buf; 1405 host_cmd.len[1] = error_log_size; 1406 host_cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY; 1407 recovery_cmd.buf_size = cpu_to_le32(error_log_size); 1408 } 1409 1410 ret = iwl_mvm_send_cmd(mvm, &host_cmd); 1411 kfree(mvm->error_recovery_buf); 1412 mvm->error_recovery_buf = NULL; 1413 1414 if (ret) { 1415 IWL_ERR(mvm, "Failed to send recovery cmd %d\n", ret); 1416 return; 1417 } 1418 1419 /* skb respond is only relevant in ERROR_RECOVERY_UPDATE_DB */ 1420 if (flags & ERROR_RECOVERY_UPDATE_DB) { 1421 resp = le32_to_cpu(*(__le32 *)host_cmd.resp_pkt->data); 1422 if (resp) 1423 IWL_ERR(mvm, 1424 "Failed to send recovery cmd blob was invalid %d\n", 1425 resp); 1426 } 1427 } 1428 1429 static int iwl_mvm_sar_init(struct iwl_mvm *mvm) 1430 { 1431 return iwl_mvm_sar_select_profile(mvm, 1, 1); 1432 } 1433 1434 static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm) 1435 { 1436 int ret; 1437 1438 if (iwl_mvm_has_unified_ucode(mvm)) 1439 return iwl_run_unified_mvm_ucode(mvm); 1440 1441 ret = iwl_run_init_mvm_ucode(mvm); 1442 1443 if (ret) { 1444 IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret); 1445 1446 if (iwlmvm_mod_params.init_dbg) 1447 return 0; 1448 return ret; 1449 } 1450 1451 iwl_fw_dbg_stop_sync(&mvm->fwrt); 1452 iwl_trans_stop_device(mvm->trans); 1453 ret = iwl_trans_start_hw(mvm->trans); 1454 if (ret) 1455 return ret; 1456 1457 mvm->rfkill_safe_init_done = false; 1458 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 1459 if (ret) 1460 return ret; 1461 1462 mvm->rfkill_safe_init_done = true; 1463 1464 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE, 1465 NULL); 1466 1467 return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img); 1468 } 1469 1470 int iwl_mvm_up(struct iwl_mvm *mvm) 1471 { 1472 int ret, i; 1473 struct ieee80211_channel *chan; 1474 struct cfg80211_chan_def chandef; 1475 struct ieee80211_supported_band *sband = NULL; 1476 u32 sb_cfg; 1477 1478 lockdep_assert_held(&mvm->mutex); 1479 1480 ret = iwl_trans_start_hw(mvm->trans); 1481 if (ret) 1482 return ret; 1483 1484 sb_cfg = iwl_read_umac_prph(mvm->trans, SB_MODIFY_CFG_FLAG); 1485 mvm->pldr_sync = !(sb_cfg & SB_CFG_RESIDES_IN_OTP_MASK); 1486 if (mvm->pldr_sync && iwl_mei_pldr_req()) 1487 return -EBUSY; 1488 1489 ret = iwl_mvm_load_rt_fw(mvm); 1490 if (ret) { 1491 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 1492 if (ret != -ERFKILL && !mvm->pldr_sync) 1493 iwl_fw_dbg_error_collect(&mvm->fwrt, 1494 FW_DBG_TRIGGER_DRIVER); 1495 goto error; 1496 } 1497 1498 /* FW loaded successfully */ 1499 mvm->pldr_sync = false; 1500 1501 iwl_get_shared_mem_conf(&mvm->fwrt); 1502 1503 ret = iwl_mvm_sf_update(mvm, NULL, false); 1504 if (ret) 1505 IWL_ERR(mvm, "Failed to initialize Smart Fifo\n"); 1506 1507 if (!iwl_trans_dbg_ini_valid(mvm->trans)) { 1508 mvm->fwrt.dump.conf = FW_DBG_INVALID; 1509 /* if we have a destination, assume EARLY START */ 1510 if (mvm->fw->dbg.dest_tlv) 1511 mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE; 1512 iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE); 1513 } 1514 1515 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1516 if (ret) 1517 goto error; 1518 1519 if (!iwl_mvm_has_unified_ucode(mvm)) { 1520 /* Send phy db control command and then phy db calibration */ 1521 ret = iwl_send_phy_db_data(mvm->phy_db); 1522 if (ret) 1523 goto error; 1524 } 1525 1526 ret = iwl_send_phy_cfg_cmd(mvm); 1527 if (ret) 1528 goto error; 1529 1530 ret = iwl_mvm_send_bt_init_conf(mvm); 1531 if (ret) 1532 goto error; 1533 1534 if (fw_has_capa(&mvm->fw->ucode_capa, 1535 IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT)) { 1536 ret = iwl_set_soc_latency(&mvm->fwrt); 1537 if (ret) 1538 goto error; 1539 } 1540 1541 /* Init RSS configuration */ 1542 ret = iwl_configure_rxq(&mvm->fwrt); 1543 if (ret) 1544 goto error; 1545 1546 if (iwl_mvm_has_new_rx_api(mvm)) { 1547 ret = iwl_send_rss_cfg_cmd(mvm); 1548 if (ret) { 1549 IWL_ERR(mvm, "Failed to configure RSS queues: %d\n", 1550 ret); 1551 goto error; 1552 } 1553 } 1554 1555 /* init the fw <-> mac80211 STA mapping */ 1556 for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) 1557 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1558 1559 mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA; 1560 1561 /* reset quota debouncing buffer - 0xff will yield invalid data */ 1562 memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd)); 1563 1564 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_DQA_SUPPORT)) { 1565 ret = iwl_mvm_send_dqa_cmd(mvm); 1566 if (ret) 1567 goto error; 1568 } 1569 1570 /* 1571 * Add auxiliary station for scanning. 1572 * Newer versions of this command implies that the fw uses 1573 * internal aux station for all aux activities that don't 1574 * requires a dedicated data queue. 1575 */ 1576 if (iwl_fw_lookup_cmd_ver(mvm->fw, ADD_STA, 0) < 12) { 1577 /* 1578 * In old version the aux station uses mac id like other 1579 * station and not lmac id 1580 */ 1581 ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX); 1582 if (ret) 1583 goto error; 1584 } 1585 1586 /* Add all the PHY contexts */ 1587 i = 0; 1588 while (!sband && i < NUM_NL80211_BANDS) 1589 sband = mvm->hw->wiphy->bands[i++]; 1590 1591 if (WARN_ON_ONCE(!sband)) { 1592 ret = -ENODEV; 1593 goto error; 1594 } 1595 1596 chan = &sband->channels[0]; 1597 1598 cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT); 1599 for (i = 0; i < NUM_PHY_CTX; i++) { 1600 /* 1601 * The channel used here isn't relevant as it's 1602 * going to be overwritten in the other flows. 1603 * For now use the first channel we have. 1604 */ 1605 ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i], 1606 &chandef, 1, 1); 1607 if (ret) 1608 goto error; 1609 } 1610 1611 if (iwl_mvm_is_tt_in_fw(mvm)) { 1612 /* in order to give the responsibility of ct-kill and 1613 * TX backoff to FW we need to send empty temperature reporting 1614 * cmd during init time 1615 */ 1616 iwl_mvm_send_temp_report_ths_cmd(mvm); 1617 } else { 1618 /* Initialize tx backoffs to the minimal possible */ 1619 iwl_mvm_tt_tx_backoff(mvm, 0); 1620 } 1621 1622 #ifdef CONFIG_THERMAL 1623 /* TODO: read the budget from BIOS / Platform NVM */ 1624 1625 /* 1626 * In case there is no budget from BIOS / Platform NVM the default 1627 * budget should be 2000mW (cooling state 0). 1628 */ 1629 if (iwl_mvm_is_ctdp_supported(mvm)) { 1630 ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START, 1631 mvm->cooling_dev.cur_state); 1632 if (ret) 1633 goto error; 1634 } 1635 #endif 1636 1637 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_LTR_GEN2)) 1638 WARN_ON(iwl_mvm_config_ltr(mvm)); 1639 1640 ret = iwl_mvm_power_update_device(mvm); 1641 if (ret) 1642 goto error; 1643 1644 iwl_mvm_lari_cfg(mvm); 1645 /* 1646 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx 1647 * anyway, so don't init MCC. 1648 */ 1649 if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) { 1650 ret = iwl_mvm_init_mcc(mvm); 1651 if (ret) 1652 goto error; 1653 } 1654 1655 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) { 1656 mvm->scan_type = IWL_SCAN_TYPE_NOT_SET; 1657 mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET; 1658 ret = iwl_mvm_config_scan(mvm); 1659 if (ret) 1660 goto error; 1661 } 1662 1663 if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) 1664 iwl_mvm_send_recovery_cmd(mvm, ERROR_RECOVERY_UPDATE_DB); 1665 1666 if (iwl_acpi_get_eckv(mvm->dev, &mvm->ext_clock_valid)) 1667 IWL_DEBUG_INFO(mvm, "ECKV table doesn't exist in BIOS\n"); 1668 1669 ret = iwl_mvm_ppag_init(mvm); 1670 if (ret) 1671 goto error; 1672 1673 ret = iwl_mvm_sar_init(mvm); 1674 if (ret == 0) 1675 ret = iwl_mvm_sar_geo_init(mvm); 1676 if (ret < 0) 1677 goto error; 1678 1679 ret = iwl_mvm_sgom_init(mvm); 1680 if (ret) 1681 goto error; 1682 1683 iwl_mvm_tas_init(mvm); 1684 iwl_mvm_leds_sync(mvm); 1685 1686 iwl_mvm_ftm_initiator_smooth_config(mvm); 1687 1688 if (fw_has_capa(&mvm->fw->ucode_capa, 1689 IWL_UCODE_TLV_CAPA_RFIM_SUPPORT)) { 1690 if (iwl_mvm_eval_dsm_rfi(mvm) == DSM_VALUE_RFI_ENABLE) 1691 iwl_rfi_send_config_cmd(mvm, NULL); 1692 } 1693 1694 iwl_mvm_mei_device_state(mvm, true); 1695 1696 IWL_DEBUG_INFO(mvm, "RT uCode started.\n"); 1697 return 0; 1698 error: 1699 if (!iwlmvm_mod_params.init_dbg || !ret) 1700 iwl_mvm_stop_device(mvm); 1701 return ret; 1702 } 1703 1704 int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm) 1705 { 1706 int ret, i; 1707 1708 lockdep_assert_held(&mvm->mutex); 1709 1710 ret = iwl_trans_start_hw(mvm->trans); 1711 if (ret) 1712 return ret; 1713 1714 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN); 1715 if (ret) { 1716 IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret); 1717 goto error; 1718 } 1719 1720 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1721 if (ret) 1722 goto error; 1723 1724 /* Send phy db control command and then phy db calibration*/ 1725 ret = iwl_send_phy_db_data(mvm->phy_db); 1726 if (ret) 1727 goto error; 1728 1729 ret = iwl_send_phy_cfg_cmd(mvm); 1730 if (ret) 1731 goto error; 1732 1733 /* init the fw <-> mac80211 STA mapping */ 1734 for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) 1735 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1736 1737 if (iwl_fw_lookup_cmd_ver(mvm->fw, ADD_STA, 0) < 12) { 1738 /* 1739 * Add auxiliary station for scanning. 1740 * Newer versions of this command implies that the fw uses 1741 * internal aux station for all aux activities that don't 1742 * requires a dedicated data queue. 1743 * In old version the aux station uses mac id like other 1744 * station and not lmac id 1745 */ 1746 ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX); 1747 if (ret) 1748 goto error; 1749 } 1750 1751 return 0; 1752 error: 1753 iwl_mvm_stop_device(mvm); 1754 return ret; 1755 } 1756 1757 void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm, 1758 struct iwl_rx_cmd_buffer *rxb) 1759 { 1760 struct iwl_rx_packet *pkt = rxb_addr(rxb); 1761 struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data; 1762 1763 IWL_DEBUG_INFO(mvm, 1764 "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n", 1765 le32_to_cpu(mfuart_notif->installed_ver), 1766 le32_to_cpu(mfuart_notif->external_ver), 1767 le32_to_cpu(mfuart_notif->status), 1768 le32_to_cpu(mfuart_notif->duration)); 1769 1770 if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif)) 1771 IWL_DEBUG_INFO(mvm, 1772 "MFUART: image size: 0x%08x\n", 1773 le32_to_cpu(mfuart_notif->image_size)); 1774 } 1775