xref: /openbmc/linux/drivers/net/wireless/intel/iwlegacy/3945-mac.c (revision 9a87ffc99ec8eb8d35eed7c4f816d75f5cc9662e)
116da78b7SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
27ac9a364SKalle Valo /******************************************************************************
37ac9a364SKalle Valo  *
47ac9a364SKalle Valo  * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
57ac9a364SKalle Valo  *
67ac9a364SKalle Valo  * Portions of this file are derived from the ipw3945 project, as well
77ac9a364SKalle Valo  * as portions of the ieee80211 subsystem header files.
87ac9a364SKalle Valo  *
97ac9a364SKalle Valo  * Contact Information:
107ac9a364SKalle Valo  *  Intel Linux Wireless <ilw@linux.intel.com>
117ac9a364SKalle Valo  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
127ac9a364SKalle Valo  *
137ac9a364SKalle Valo  *****************************************************************************/
147ac9a364SKalle Valo 
157ac9a364SKalle Valo #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
167ac9a364SKalle Valo 
177ac9a364SKalle Valo #include <linux/kernel.h>
187ac9a364SKalle Valo #include <linux/module.h>
197ac9a364SKalle Valo #include <linux/init.h>
207ac9a364SKalle Valo #include <linux/pci.h>
217ac9a364SKalle Valo #include <linux/slab.h>
227ac9a364SKalle Valo #include <linux/dma-mapping.h>
237ac9a364SKalle Valo #include <linux/delay.h>
247ac9a364SKalle Valo #include <linux/sched.h>
257ac9a364SKalle Valo #include <linux/skbuff.h>
267ac9a364SKalle Valo #include <linux/netdevice.h>
277ac9a364SKalle Valo #include <linux/firmware.h>
287ac9a364SKalle Valo #include <linux/etherdevice.h>
297ac9a364SKalle Valo #include <linux/if_arp.h>
307ac9a364SKalle Valo 
317ac9a364SKalle Valo #include <net/ieee80211_radiotap.h>
327ac9a364SKalle Valo #include <net/mac80211.h>
337ac9a364SKalle Valo 
347ac9a364SKalle Valo #include <asm/div64.h>
357ac9a364SKalle Valo 
367ac9a364SKalle Valo #define DRV_NAME	"iwl3945"
377ac9a364SKalle Valo 
387ac9a364SKalle Valo #include "commands.h"
397ac9a364SKalle Valo #include "common.h"
407ac9a364SKalle Valo #include "3945.h"
417ac9a364SKalle Valo #include "iwl-spectrum.h"
427ac9a364SKalle Valo 
437ac9a364SKalle Valo /*
447ac9a364SKalle Valo  * module name, copyright, version, etc.
457ac9a364SKalle Valo  */
467ac9a364SKalle Valo 
477ac9a364SKalle Valo #define DRV_DESCRIPTION	\
487ac9a364SKalle Valo "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
497ac9a364SKalle Valo 
507ac9a364SKalle Valo #ifdef CONFIG_IWLEGACY_DEBUG
517ac9a364SKalle Valo #define VD "d"
527ac9a364SKalle Valo #else
537ac9a364SKalle Valo #define VD
547ac9a364SKalle Valo #endif
557ac9a364SKalle Valo 
567ac9a364SKalle Valo /*
577ac9a364SKalle Valo  * add "s" to indicate spectrum measurement included.
587ac9a364SKalle Valo  * we add it here to be consistent with previous releases in which
597ac9a364SKalle Valo  * this was configurable.
607ac9a364SKalle Valo  */
617ac9a364SKalle Valo #define DRV_VERSION  IWLWIFI_VERSION VD "s"
627ac9a364SKalle Valo #define DRV_COPYRIGHT	"Copyright(c) 2003-2011 Intel Corporation"
637ac9a364SKalle Valo #define DRV_AUTHOR     "<ilw@linux.intel.com>"
647ac9a364SKalle Valo 
657ac9a364SKalle Valo MODULE_DESCRIPTION(DRV_DESCRIPTION);
667ac9a364SKalle Valo MODULE_VERSION(DRV_VERSION);
677ac9a364SKalle Valo MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
687ac9a364SKalle Valo MODULE_LICENSE("GPL");
697ac9a364SKalle Valo 
707ac9a364SKalle Valo  /* module parameters */
717ac9a364SKalle Valo struct il_mod_params il3945_mod_params = {
727ac9a364SKalle Valo 	.sw_crypto = 1,
737ac9a364SKalle Valo 	.restart_fw = 1,
747ac9a364SKalle Valo 	.disable_hw_scan = 1,
757ac9a364SKalle Valo 	/* the rest are 0 by default */
767ac9a364SKalle Valo };
777ac9a364SKalle Valo 
787ac9a364SKalle Valo /**
797ac9a364SKalle Valo  * il3945_get_antenna_flags - Get antenna flags for RXON command
807ac9a364SKalle Valo  * @il: eeprom and antenna fields are used to determine antenna flags
817ac9a364SKalle Valo  *
827ac9a364SKalle Valo  * il->eeprom39  is used to determine if antenna AUX/MAIN are reversed
837ac9a364SKalle Valo  * il3945_mod_params.antenna specifies the antenna diversity mode:
847ac9a364SKalle Valo  *
857ac9a364SKalle Valo  * IL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
867ac9a364SKalle Valo  * IL_ANTENNA_MAIN      - Force MAIN antenna
877ac9a364SKalle Valo  * IL_ANTENNA_AUX       - Force AUX antenna
887ac9a364SKalle Valo  */
897ac9a364SKalle Valo __le32
il3945_get_antenna_flags(const struct il_priv * il)907ac9a364SKalle Valo il3945_get_antenna_flags(const struct il_priv *il)
917ac9a364SKalle Valo {
927ac9a364SKalle Valo 	struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
937ac9a364SKalle Valo 
947ac9a364SKalle Valo 	switch (il3945_mod_params.antenna) {
957ac9a364SKalle Valo 	case IL_ANTENNA_DIVERSITY:
967ac9a364SKalle Valo 		return 0;
977ac9a364SKalle Valo 
987ac9a364SKalle Valo 	case IL_ANTENNA_MAIN:
997ac9a364SKalle Valo 		if (eeprom->antenna_switch_type)
1007ac9a364SKalle Valo 			return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
1017ac9a364SKalle Valo 		return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
1027ac9a364SKalle Valo 
1037ac9a364SKalle Valo 	case IL_ANTENNA_AUX:
1047ac9a364SKalle Valo 		if (eeprom->antenna_switch_type)
1057ac9a364SKalle Valo 			return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
1067ac9a364SKalle Valo 		return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
1077ac9a364SKalle Valo 	}
1087ac9a364SKalle Valo 
1097ac9a364SKalle Valo 	/* bad antenna selector value */
1107ac9a364SKalle Valo 	IL_ERR("Bad antenna selector value (0x%x)\n",
1117ac9a364SKalle Valo 	       il3945_mod_params.antenna);
1127ac9a364SKalle Valo 
1137ac9a364SKalle Valo 	return 0;		/* "diversity" is default if error */
1147ac9a364SKalle Valo }
1157ac9a364SKalle Valo 
1167ac9a364SKalle Valo static int
il3945_set_ccmp_dynamic_key_info(struct il_priv * il,struct ieee80211_key_conf * keyconf,u8 sta_id)1177ac9a364SKalle Valo il3945_set_ccmp_dynamic_key_info(struct il_priv *il,
1187ac9a364SKalle Valo 				 struct ieee80211_key_conf *keyconf, u8 sta_id)
1197ac9a364SKalle Valo {
1207ac9a364SKalle Valo 	unsigned long flags;
1217ac9a364SKalle Valo 	__le16 key_flags = 0;
1227ac9a364SKalle Valo 	int ret;
1237ac9a364SKalle Valo 
1247ac9a364SKalle Valo 	key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
1257ac9a364SKalle Valo 	key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1267ac9a364SKalle Valo 
1277ac9a364SKalle Valo 	if (sta_id == il->hw_params.bcast_id)
1287ac9a364SKalle Valo 		key_flags |= STA_KEY_MULTICAST_MSK;
1297ac9a364SKalle Valo 
1307ac9a364SKalle Valo 	keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1317ac9a364SKalle Valo 	keyconf->hw_key_idx = keyconf->keyidx;
1327ac9a364SKalle Valo 	key_flags &= ~STA_KEY_FLG_INVALID;
1337ac9a364SKalle Valo 
1347ac9a364SKalle Valo 	spin_lock_irqsave(&il->sta_lock, flags);
1357ac9a364SKalle Valo 	il->stations[sta_id].keyinfo.cipher = keyconf->cipher;
1367ac9a364SKalle Valo 	il->stations[sta_id].keyinfo.keylen = keyconf->keylen;
1377ac9a364SKalle Valo 	memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, keyconf->keylen);
1387ac9a364SKalle Valo 
1397ac9a364SKalle Valo 	memcpy(il->stations[sta_id].sta.key.key, keyconf->key, keyconf->keylen);
1407ac9a364SKalle Valo 
1417ac9a364SKalle Valo 	if ((il->stations[sta_id].sta.key.
1427ac9a364SKalle Valo 	     key_flags & STA_KEY_FLG_ENCRYPT_MSK) == STA_KEY_FLG_NO_ENC)
1437ac9a364SKalle Valo 		il->stations[sta_id].sta.key.key_offset =
1447ac9a364SKalle Valo 		    il_get_free_ucode_key_idx(il);
1457ac9a364SKalle Valo 	/* else, we are overriding an existing key => no need to allocated room
1467ac9a364SKalle Valo 	 * in uCode. */
1477ac9a364SKalle Valo 
1487ac9a364SKalle Valo 	WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
1497ac9a364SKalle Valo 	     "no space for a new key");
1507ac9a364SKalle Valo 
1517ac9a364SKalle Valo 	il->stations[sta_id].sta.key.key_flags = key_flags;
1527ac9a364SKalle Valo 	il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1537ac9a364SKalle Valo 	il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1547ac9a364SKalle Valo 
1557ac9a364SKalle Valo 	D_INFO("hwcrypto: modify ucode station key info\n");
1567ac9a364SKalle Valo 
1577ac9a364SKalle Valo 	ret = il_send_add_sta(il, &il->stations[sta_id].sta, CMD_ASYNC);
1587ac9a364SKalle Valo 
1597ac9a364SKalle Valo 	spin_unlock_irqrestore(&il->sta_lock, flags);
1607ac9a364SKalle Valo 
1617ac9a364SKalle Valo 	return ret;
1627ac9a364SKalle Valo }
1637ac9a364SKalle Valo 
1647ac9a364SKalle Valo static int
il3945_set_tkip_dynamic_key_info(struct il_priv * il,struct ieee80211_key_conf * keyconf,u8 sta_id)1657ac9a364SKalle Valo il3945_set_tkip_dynamic_key_info(struct il_priv *il,
1667ac9a364SKalle Valo 				 struct ieee80211_key_conf *keyconf, u8 sta_id)
1677ac9a364SKalle Valo {
1687ac9a364SKalle Valo 	return -EOPNOTSUPP;
1697ac9a364SKalle Valo }
1707ac9a364SKalle Valo 
1717ac9a364SKalle Valo static int
il3945_set_wep_dynamic_key_info(struct il_priv * il,struct ieee80211_key_conf * keyconf,u8 sta_id)1727ac9a364SKalle Valo il3945_set_wep_dynamic_key_info(struct il_priv *il,
1737ac9a364SKalle Valo 				struct ieee80211_key_conf *keyconf, u8 sta_id)
1747ac9a364SKalle Valo {
1757ac9a364SKalle Valo 	return -EOPNOTSUPP;
1767ac9a364SKalle Valo }
1777ac9a364SKalle Valo 
1787ac9a364SKalle Valo static int
il3945_clear_sta_key_info(struct il_priv * il,u8 sta_id)1797ac9a364SKalle Valo il3945_clear_sta_key_info(struct il_priv *il, u8 sta_id)
1807ac9a364SKalle Valo {
1817ac9a364SKalle Valo 	unsigned long flags;
1827ac9a364SKalle Valo 	struct il_addsta_cmd sta_cmd;
1837ac9a364SKalle Valo 
1847ac9a364SKalle Valo 	spin_lock_irqsave(&il->sta_lock, flags);
1857ac9a364SKalle Valo 	memset(&il->stations[sta_id].keyinfo, 0, sizeof(struct il_hw_key));
1867ac9a364SKalle Valo 	memset(&il->stations[sta_id].sta.key, 0, sizeof(struct il4965_keyinfo));
1877ac9a364SKalle Valo 	il->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1887ac9a364SKalle Valo 	il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1897ac9a364SKalle Valo 	il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1907ac9a364SKalle Valo 	memcpy(&sta_cmd, &il->stations[sta_id].sta,
1917ac9a364SKalle Valo 	       sizeof(struct il_addsta_cmd));
1927ac9a364SKalle Valo 	spin_unlock_irqrestore(&il->sta_lock, flags);
1937ac9a364SKalle Valo 
1947ac9a364SKalle Valo 	D_INFO("hwcrypto: clear ucode station key info\n");
1957ac9a364SKalle Valo 	return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
1967ac9a364SKalle Valo }
1977ac9a364SKalle Valo 
1987ac9a364SKalle Valo static int
il3945_set_dynamic_key(struct il_priv * il,struct ieee80211_key_conf * keyconf,u8 sta_id)1997ac9a364SKalle Valo il3945_set_dynamic_key(struct il_priv *il, struct ieee80211_key_conf *keyconf,
2007ac9a364SKalle Valo 		       u8 sta_id)
2017ac9a364SKalle Valo {
2027ac9a364SKalle Valo 	int ret = 0;
2037ac9a364SKalle Valo 
2047ac9a364SKalle Valo 	keyconf->hw_key_idx = HW_KEY_DYNAMIC;
2057ac9a364SKalle Valo 
2067ac9a364SKalle Valo 	switch (keyconf->cipher) {
2077ac9a364SKalle Valo 	case WLAN_CIPHER_SUITE_CCMP:
2087ac9a364SKalle Valo 		ret = il3945_set_ccmp_dynamic_key_info(il, keyconf, sta_id);
2097ac9a364SKalle Valo 		break;
2107ac9a364SKalle Valo 	case WLAN_CIPHER_SUITE_TKIP:
2117ac9a364SKalle Valo 		ret = il3945_set_tkip_dynamic_key_info(il, keyconf, sta_id);
2127ac9a364SKalle Valo 		break;
2137ac9a364SKalle Valo 	case WLAN_CIPHER_SUITE_WEP40:
2147ac9a364SKalle Valo 	case WLAN_CIPHER_SUITE_WEP104:
2157ac9a364SKalle Valo 		ret = il3945_set_wep_dynamic_key_info(il, keyconf, sta_id);
2167ac9a364SKalle Valo 		break;
2177ac9a364SKalle Valo 	default:
2187ac9a364SKalle Valo 		IL_ERR("Unknown alg: %s alg=%x\n", __func__, keyconf->cipher);
2197ac9a364SKalle Valo 		ret = -EINVAL;
2207ac9a364SKalle Valo 	}
2217ac9a364SKalle Valo 
2227ac9a364SKalle Valo 	D_WEP("Set dynamic key: alg=%x len=%d idx=%d sta=%d ret=%d\n",
2237ac9a364SKalle Valo 	      keyconf->cipher, keyconf->keylen, keyconf->keyidx, sta_id, ret);
2247ac9a364SKalle Valo 
2257ac9a364SKalle Valo 	return ret;
2267ac9a364SKalle Valo }
2277ac9a364SKalle Valo 
2287ac9a364SKalle Valo static int
il3945_remove_static_key(struct il_priv * il)2297ac9a364SKalle Valo il3945_remove_static_key(struct il_priv *il)
2307ac9a364SKalle Valo {
23131044326SXu Wang 	return -EOPNOTSUPP;
2327ac9a364SKalle Valo }
2337ac9a364SKalle Valo 
2347ac9a364SKalle Valo static int
il3945_set_static_key(struct il_priv * il,struct ieee80211_key_conf * key)2357ac9a364SKalle Valo il3945_set_static_key(struct il_priv *il, struct ieee80211_key_conf *key)
2367ac9a364SKalle Valo {
2377ac9a364SKalle Valo 	if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
2387ac9a364SKalle Valo 	    key->cipher == WLAN_CIPHER_SUITE_WEP104)
2397ac9a364SKalle Valo 		return -EOPNOTSUPP;
2407ac9a364SKalle Valo 
2417ac9a364SKalle Valo 	IL_ERR("Static key invalid: cipher %x\n", key->cipher);
2427ac9a364SKalle Valo 	return -EINVAL;
2437ac9a364SKalle Valo }
2447ac9a364SKalle Valo 
2457ac9a364SKalle Valo static void
il3945_clear_free_frames(struct il_priv * il)2467ac9a364SKalle Valo il3945_clear_free_frames(struct il_priv *il)
2477ac9a364SKalle Valo {
2487ac9a364SKalle Valo 	struct list_head *element;
2497ac9a364SKalle Valo 
2507ac9a364SKalle Valo 	D_INFO("%d frames on pre-allocated heap on clear.\n", il->frames_count);
2517ac9a364SKalle Valo 
2527ac9a364SKalle Valo 	while (!list_empty(&il->free_frames)) {
2537ac9a364SKalle Valo 		element = il->free_frames.next;
2547ac9a364SKalle Valo 		list_del(element);
2557ac9a364SKalle Valo 		kfree(list_entry(element, struct il3945_frame, list));
2567ac9a364SKalle Valo 		il->frames_count--;
2577ac9a364SKalle Valo 	}
2587ac9a364SKalle Valo 
2597ac9a364SKalle Valo 	if (il->frames_count) {
2607ac9a364SKalle Valo 		IL_WARN("%d frames still in use.  Did we lose one?\n",
2617ac9a364SKalle Valo 			il->frames_count);
2627ac9a364SKalle Valo 		il->frames_count = 0;
2637ac9a364SKalle Valo 	}
2647ac9a364SKalle Valo }
2657ac9a364SKalle Valo 
2667ac9a364SKalle Valo static struct il3945_frame *
il3945_get_free_frame(struct il_priv * il)2677ac9a364SKalle Valo il3945_get_free_frame(struct il_priv *il)
2687ac9a364SKalle Valo {
2697ac9a364SKalle Valo 	struct il3945_frame *frame;
2707ac9a364SKalle Valo 	struct list_head *element;
2717ac9a364SKalle Valo 	if (list_empty(&il->free_frames)) {
2727ac9a364SKalle Valo 		frame = kzalloc(sizeof(*frame), GFP_KERNEL);
2737ac9a364SKalle Valo 		if (!frame) {
2747ac9a364SKalle Valo 			IL_ERR("Could not allocate frame!\n");
2757ac9a364SKalle Valo 			return NULL;
2767ac9a364SKalle Valo 		}
2777ac9a364SKalle Valo 
2787ac9a364SKalle Valo 		il->frames_count++;
2797ac9a364SKalle Valo 		return frame;
2807ac9a364SKalle Valo 	}
2817ac9a364SKalle Valo 
2827ac9a364SKalle Valo 	element = il->free_frames.next;
2837ac9a364SKalle Valo 	list_del(element);
2847ac9a364SKalle Valo 	return list_entry(element, struct il3945_frame, list);
2857ac9a364SKalle Valo }
2867ac9a364SKalle Valo 
2877ac9a364SKalle Valo static void
il3945_free_frame(struct il_priv * il,struct il3945_frame * frame)2887ac9a364SKalle Valo il3945_free_frame(struct il_priv *il, struct il3945_frame *frame)
2897ac9a364SKalle Valo {
2907ac9a364SKalle Valo 	memset(frame, 0, sizeof(*frame));
2917ac9a364SKalle Valo 	list_add(&frame->list, &il->free_frames);
2927ac9a364SKalle Valo }
2937ac9a364SKalle Valo 
2947ac9a364SKalle Valo unsigned int
il3945_fill_beacon_frame(struct il_priv * il,struct ieee80211_hdr * hdr,int left)2957ac9a364SKalle Valo il3945_fill_beacon_frame(struct il_priv *il, struct ieee80211_hdr *hdr,
2967ac9a364SKalle Valo 			 int left)
2977ac9a364SKalle Valo {
2987ac9a364SKalle Valo 
2997ac9a364SKalle Valo 	if (!il_is_associated(il) || !il->beacon_skb)
3007ac9a364SKalle Valo 		return 0;
3017ac9a364SKalle Valo 
3027ac9a364SKalle Valo 	if (il->beacon_skb->len > left)
3037ac9a364SKalle Valo 		return 0;
3047ac9a364SKalle Valo 
3057ac9a364SKalle Valo 	memcpy(hdr, il->beacon_skb->data, il->beacon_skb->len);
3067ac9a364SKalle Valo 
3077ac9a364SKalle Valo 	return il->beacon_skb->len;
3087ac9a364SKalle Valo }
3097ac9a364SKalle Valo 
3107ac9a364SKalle Valo static int
il3945_send_beacon_cmd(struct il_priv * il)3117ac9a364SKalle Valo il3945_send_beacon_cmd(struct il_priv *il)
3127ac9a364SKalle Valo {
3137ac9a364SKalle Valo 	struct il3945_frame *frame;
3147ac9a364SKalle Valo 	unsigned int frame_size;
3157ac9a364SKalle Valo 	int rc;
3167ac9a364SKalle Valo 	u8 rate;
3177ac9a364SKalle Valo 
3187ac9a364SKalle Valo 	frame = il3945_get_free_frame(il);
3197ac9a364SKalle Valo 
3207ac9a364SKalle Valo 	if (!frame) {
3217ac9a364SKalle Valo 		IL_ERR("Could not obtain free frame buffer for beacon "
3227ac9a364SKalle Valo 		       "command.\n");
3237ac9a364SKalle Valo 		return -ENOMEM;
3247ac9a364SKalle Valo 	}
3257ac9a364SKalle Valo 
3267ac9a364SKalle Valo 	rate = il_get_lowest_plcp(il);
3277ac9a364SKalle Valo 
3287ac9a364SKalle Valo 	frame_size = il3945_hw_get_beacon_cmd(il, frame, rate);
3297ac9a364SKalle Valo 
3307ac9a364SKalle Valo 	rc = il_send_cmd_pdu(il, C_TX_BEACON, frame_size, &frame->u.cmd[0]);
3317ac9a364SKalle Valo 
3327ac9a364SKalle Valo 	il3945_free_frame(il, frame);
3337ac9a364SKalle Valo 
3347ac9a364SKalle Valo 	return rc;
3357ac9a364SKalle Valo }
3367ac9a364SKalle Valo 
3377ac9a364SKalle Valo static void
il3945_unset_hw_params(struct il_priv * il)3387ac9a364SKalle Valo il3945_unset_hw_params(struct il_priv *il)
3397ac9a364SKalle Valo {
3407ac9a364SKalle Valo 	if (il->_3945.shared_virt)
3417ac9a364SKalle Valo 		dma_free_coherent(&il->pci_dev->dev,
3427ac9a364SKalle Valo 				  sizeof(struct il3945_shared),
3437ac9a364SKalle Valo 				  il->_3945.shared_virt, il->_3945.shared_phys);
3447ac9a364SKalle Valo }
3457ac9a364SKalle Valo 
3467ac9a364SKalle Valo static void
il3945_build_tx_cmd_hwcrypto(struct il_priv * il,struct ieee80211_tx_info * info,struct il_device_cmd * cmd,struct sk_buff * skb_frag,int sta_id)3477ac9a364SKalle Valo il3945_build_tx_cmd_hwcrypto(struct il_priv *il, struct ieee80211_tx_info *info,
3487ac9a364SKalle Valo 			     struct il_device_cmd *cmd,
3497ac9a364SKalle Valo 			     struct sk_buff *skb_frag, int sta_id)
3507ac9a364SKalle Valo {
3517ac9a364SKalle Valo 	struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
3527ac9a364SKalle Valo 	struct il_hw_key *keyinfo = &il->stations[sta_id].keyinfo;
3537ac9a364SKalle Valo 
3547ac9a364SKalle Valo 	tx_cmd->sec_ctl = 0;
3557ac9a364SKalle Valo 
3567ac9a364SKalle Valo 	switch (keyinfo->cipher) {
3577ac9a364SKalle Valo 	case WLAN_CIPHER_SUITE_CCMP:
3587ac9a364SKalle Valo 		tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
3597ac9a364SKalle Valo 		memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
3607ac9a364SKalle Valo 		D_TX("tx_cmd with AES hwcrypto\n");
3617ac9a364SKalle Valo 		break;
3627ac9a364SKalle Valo 
3637ac9a364SKalle Valo 	case WLAN_CIPHER_SUITE_TKIP:
3647ac9a364SKalle Valo 		break;
3657ac9a364SKalle Valo 
3667ac9a364SKalle Valo 	case WLAN_CIPHER_SUITE_WEP104:
3677ac9a364SKalle Valo 		tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
3683f95e92cSGustavo A. R. Silva 		fallthrough;
3697ac9a364SKalle Valo 	case WLAN_CIPHER_SUITE_WEP40:
3707ac9a364SKalle Valo 		tx_cmd->sec_ctl |=
3717ac9a364SKalle Valo 		    TX_CMD_SEC_WEP | (info->control.hw_key->
3727ac9a364SKalle Valo 				      hw_key_idx & TX_CMD_SEC_MSK) <<
3737ac9a364SKalle Valo 		    TX_CMD_SEC_SHIFT;
3747ac9a364SKalle Valo 
3757ac9a364SKalle Valo 		memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
3767ac9a364SKalle Valo 
3777ac9a364SKalle Valo 		D_TX("Configuring packet for WEP encryption " "with key %d\n",
3787ac9a364SKalle Valo 		     info->control.hw_key->hw_key_idx);
3797ac9a364SKalle Valo 		break;
3807ac9a364SKalle Valo 
3817ac9a364SKalle Valo 	default:
3827ac9a364SKalle Valo 		IL_ERR("Unknown encode cipher %x\n", keyinfo->cipher);
3837ac9a364SKalle Valo 		break;
3847ac9a364SKalle Valo 	}
3857ac9a364SKalle Valo }
3867ac9a364SKalle Valo 
3877ac9a364SKalle Valo /*
3887ac9a364SKalle Valo  * handle build C_TX command notification.
3897ac9a364SKalle Valo  */
3907ac9a364SKalle Valo static void
il3945_build_tx_cmd_basic(struct il_priv * il,struct il_device_cmd * cmd,struct ieee80211_tx_info * info,struct ieee80211_hdr * hdr,u8 std_id)3917ac9a364SKalle Valo il3945_build_tx_cmd_basic(struct il_priv *il, struct il_device_cmd *cmd,
3927ac9a364SKalle Valo 			  struct ieee80211_tx_info *info,
3937ac9a364SKalle Valo 			  struct ieee80211_hdr *hdr, u8 std_id)
3947ac9a364SKalle Valo {
3957ac9a364SKalle Valo 	struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
3967ac9a364SKalle Valo 	__le32 tx_flags = tx_cmd->tx_flags;
3977ac9a364SKalle Valo 	__le16 fc = hdr->frame_control;
3987ac9a364SKalle Valo 
3997ac9a364SKalle Valo 	tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
4007ac9a364SKalle Valo 	if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
4017ac9a364SKalle Valo 		tx_flags |= TX_CMD_FLG_ACK_MSK;
4027ac9a364SKalle Valo 		if (ieee80211_is_mgmt(fc))
4037ac9a364SKalle Valo 			tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
4047ac9a364SKalle Valo 		if (ieee80211_is_probe_resp(fc) &&
4057ac9a364SKalle Valo 		    !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
4067ac9a364SKalle Valo 			tx_flags |= TX_CMD_FLG_TSF_MSK;
4077ac9a364SKalle Valo 	} else {
4087ac9a364SKalle Valo 		tx_flags &= (~TX_CMD_FLG_ACK_MSK);
4097ac9a364SKalle Valo 		tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
4107ac9a364SKalle Valo 	}
4117ac9a364SKalle Valo 
4127ac9a364SKalle Valo 	tx_cmd->sta_id = std_id;
4137ac9a364SKalle Valo 	if (ieee80211_has_morefrags(fc))
4147ac9a364SKalle Valo 		tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
4157ac9a364SKalle Valo 
4167ac9a364SKalle Valo 	if (ieee80211_is_data_qos(fc)) {
4177ac9a364SKalle Valo 		u8 *qc = ieee80211_get_qos_ctl(hdr);
4187ac9a364SKalle Valo 		tx_cmd->tid_tspec = qc[0] & 0xf;
4197ac9a364SKalle Valo 		tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
4207ac9a364SKalle Valo 	} else {
4217ac9a364SKalle Valo 		tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
4227ac9a364SKalle Valo 	}
4237ac9a364SKalle Valo 
4247ac9a364SKalle Valo 	il_tx_cmd_protection(il, info, fc, &tx_flags);
4257ac9a364SKalle Valo 
4267ac9a364SKalle Valo 	tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
4277ac9a364SKalle Valo 	if (ieee80211_is_mgmt(fc)) {
4287ac9a364SKalle Valo 		if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
4297ac9a364SKalle Valo 			tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
4307ac9a364SKalle Valo 		else
4317ac9a364SKalle Valo 			tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
4327ac9a364SKalle Valo 	} else {
4337ac9a364SKalle Valo 		tx_cmd->timeout.pm_frame_timeout = 0;
4347ac9a364SKalle Valo 	}
4357ac9a364SKalle Valo 
4367ac9a364SKalle Valo 	tx_cmd->driver_txop = 0;
4377ac9a364SKalle Valo 	tx_cmd->tx_flags = tx_flags;
4387ac9a364SKalle Valo 	tx_cmd->next_frame_len = 0;
4397ac9a364SKalle Valo }
4407ac9a364SKalle Valo 
4417ac9a364SKalle Valo /*
4427ac9a364SKalle Valo  * start C_TX command process
4437ac9a364SKalle Valo  */
4447ac9a364SKalle Valo static int
il3945_tx_skb(struct il_priv * il,struct ieee80211_sta * sta,struct sk_buff * skb)4457ac9a364SKalle Valo il3945_tx_skb(struct il_priv *il,
4467ac9a364SKalle Valo 	      struct ieee80211_sta *sta,
4477ac9a364SKalle Valo 	      struct sk_buff *skb)
4487ac9a364SKalle Valo {
4497ac9a364SKalle Valo 	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
4507ac9a364SKalle Valo 	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
4517ac9a364SKalle Valo 	struct il3945_tx_cmd *tx_cmd;
4527ac9a364SKalle Valo 	struct il_tx_queue *txq = NULL;
4537ac9a364SKalle Valo 	struct il_queue *q = NULL;
4547ac9a364SKalle Valo 	struct il_device_cmd *out_cmd;
4557ac9a364SKalle Valo 	struct il_cmd_meta *out_meta;
4567ac9a364SKalle Valo 	dma_addr_t phys_addr;
4577ac9a364SKalle Valo 	dma_addr_t txcmd_phys;
4587ac9a364SKalle Valo 	int txq_id = skb_get_queue_mapping(skb);
4597ac9a364SKalle Valo 	u16 len, idx, hdr_len;
4607ac9a364SKalle Valo 	u16 firstlen, secondlen;
4617ac9a364SKalle Valo 	u8 sta_id;
4627ac9a364SKalle Valo 	u8 tid = 0;
4637ac9a364SKalle Valo 	__le16 fc;
4647ac9a364SKalle Valo 	u8 wait_write_ptr = 0;
4657ac9a364SKalle Valo 	unsigned long flags;
4667ac9a364SKalle Valo 
4677ac9a364SKalle Valo 	spin_lock_irqsave(&il->lock, flags);
4687ac9a364SKalle Valo 	if (il_is_rfkill(il)) {
4697ac9a364SKalle Valo 		D_DROP("Dropping - RF KILL\n");
4707ac9a364SKalle Valo 		goto drop_unlock;
4717ac9a364SKalle Valo 	}
4727ac9a364SKalle Valo 
4737ac9a364SKalle Valo 	if ((ieee80211_get_tx_rate(il->hw, info)->hw_value & 0xFF) ==
4747ac9a364SKalle Valo 	    IL_INVALID_RATE) {
4757ac9a364SKalle Valo 		IL_ERR("ERROR: No TX rate available.\n");
4767ac9a364SKalle Valo 		goto drop_unlock;
4777ac9a364SKalle Valo 	}
4787ac9a364SKalle Valo 
4797ac9a364SKalle Valo 	fc = hdr->frame_control;
4807ac9a364SKalle Valo 
4817ac9a364SKalle Valo #ifdef CONFIG_IWLEGACY_DEBUG
4827ac9a364SKalle Valo 	if (ieee80211_is_auth(fc))
4837ac9a364SKalle Valo 		D_TX("Sending AUTH frame\n");
4847ac9a364SKalle Valo 	else if (ieee80211_is_assoc_req(fc))
4857ac9a364SKalle Valo 		D_TX("Sending ASSOC frame\n");
4867ac9a364SKalle Valo 	else if (ieee80211_is_reassoc_req(fc))
4877ac9a364SKalle Valo 		D_TX("Sending REASSOC frame\n");
4887ac9a364SKalle Valo #endif
4897ac9a364SKalle Valo 
4907ac9a364SKalle Valo 	spin_unlock_irqrestore(&il->lock, flags);
4917ac9a364SKalle Valo 
4927ac9a364SKalle Valo 	hdr_len = ieee80211_hdrlen(fc);
4937ac9a364SKalle Valo 
4947ac9a364SKalle Valo 	/* Find idx into station table for destination station */
4957ac9a364SKalle Valo 	sta_id = il_sta_id_or_broadcast(il, sta);
4967ac9a364SKalle Valo 	if (sta_id == IL_INVALID_STATION) {
4977ac9a364SKalle Valo 		D_DROP("Dropping - INVALID STATION: %pM\n", hdr->addr1);
4987ac9a364SKalle Valo 		goto drop;
4997ac9a364SKalle Valo 	}
5007ac9a364SKalle Valo 
5017ac9a364SKalle Valo 	D_RATE("station Id %d\n", sta_id);
5027ac9a364SKalle Valo 
5037ac9a364SKalle Valo 	if (ieee80211_is_data_qos(fc)) {
5047ac9a364SKalle Valo 		u8 *qc = ieee80211_get_qos_ctl(hdr);
5057ac9a364SKalle Valo 		tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
5067ac9a364SKalle Valo 		if (unlikely(tid >= MAX_TID_COUNT))
5077ac9a364SKalle Valo 			goto drop;
5087ac9a364SKalle Valo 	}
5097ac9a364SKalle Valo 
5107ac9a364SKalle Valo 	/* Descriptor for chosen Tx queue */
5117ac9a364SKalle Valo 	txq = &il->txq[txq_id];
5127ac9a364SKalle Valo 	q = &txq->q;
5137ac9a364SKalle Valo 
5147ac9a364SKalle Valo 	if ((il_queue_space(q) < q->high_mark))
5157ac9a364SKalle Valo 		goto drop;
5167ac9a364SKalle Valo 
5177ac9a364SKalle Valo 	spin_lock_irqsave(&il->lock, flags);
5187ac9a364SKalle Valo 
5197ac9a364SKalle Valo 	idx = il_get_cmd_idx(q, q->write_ptr, 0);
5207ac9a364SKalle Valo 
5217ac9a364SKalle Valo 	txq->skbs[q->write_ptr] = skb;
5227ac9a364SKalle Valo 
5237ac9a364SKalle Valo 	/* Init first empty entry in queue's array of Tx/cmd buffers */
5247ac9a364SKalle Valo 	out_cmd = txq->cmd[idx];
5257ac9a364SKalle Valo 	out_meta = &txq->meta[idx];
5267ac9a364SKalle Valo 	tx_cmd = (struct il3945_tx_cmd *)out_cmd->cmd.payload;
5277ac9a364SKalle Valo 	memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
5287ac9a364SKalle Valo 	memset(tx_cmd, 0, sizeof(*tx_cmd));
5297ac9a364SKalle Valo 
5307ac9a364SKalle Valo 	/*
5317ac9a364SKalle Valo 	 * Set up the Tx-command (not MAC!) header.
5327ac9a364SKalle Valo 	 * Store the chosen Tx queue and TFD idx within the sequence field;
5337ac9a364SKalle Valo 	 * after Tx, uCode's Tx response will return this value so driver can
5347ac9a364SKalle Valo 	 * locate the frame within the tx queue and do post-tx processing.
5357ac9a364SKalle Valo 	 */
5367ac9a364SKalle Valo 	out_cmd->hdr.cmd = C_TX;
5377ac9a364SKalle Valo 	out_cmd->hdr.sequence =
5387ac9a364SKalle Valo 	    cpu_to_le16((u16)
5397ac9a364SKalle Valo 			(QUEUE_TO_SEQ(txq_id) | IDX_TO_SEQ(q->write_ptr)));
5407ac9a364SKalle Valo 
5417ac9a364SKalle Valo 	/* Copy MAC header from skb into command buffer */
5427ac9a364SKalle Valo 	memcpy(tx_cmd->hdr, hdr, hdr_len);
5437ac9a364SKalle Valo 
5447ac9a364SKalle Valo 	if (info->control.hw_key)
5457ac9a364SKalle Valo 		il3945_build_tx_cmd_hwcrypto(il, info, out_cmd, skb, sta_id);
5467ac9a364SKalle Valo 
5477ac9a364SKalle Valo 	/* TODO need this for burst mode later on */
5487ac9a364SKalle Valo 	il3945_build_tx_cmd_basic(il, out_cmd, info, hdr, sta_id);
5497ac9a364SKalle Valo 
5507ac9a364SKalle Valo 	il3945_hw_build_tx_cmd_rate(il, out_cmd, info, hdr, sta_id);
5517ac9a364SKalle Valo 
5527ac9a364SKalle Valo 	/* Total # bytes to be transmitted */
5537ac9a364SKalle Valo 	tx_cmd->len = cpu_to_le16((u16) skb->len);
5547ac9a364SKalle Valo 
5557ac9a364SKalle Valo 	tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
5567ac9a364SKalle Valo 	tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
5577ac9a364SKalle Valo 
5587ac9a364SKalle Valo 	/*
5597ac9a364SKalle Valo 	 * Use the first empty entry in this queue's command buffer array
5607ac9a364SKalle Valo 	 * to contain the Tx command and MAC header concatenated together
5617ac9a364SKalle Valo 	 * (payload data will be in another buffer).
5627ac9a364SKalle Valo 	 * Size of this varies, due to varying MAC header length.
5637ac9a364SKalle Valo 	 * If end is not dword aligned, we'll have 2 extra bytes at the end
5647ac9a364SKalle Valo 	 * of the MAC header (device reads on dword boundaries).
5657ac9a364SKalle Valo 	 * We'll tell device about this padding later.
5667ac9a364SKalle Valo 	 */
5677ac9a364SKalle Valo 	len =
5687ac9a364SKalle Valo 	    sizeof(struct il3945_tx_cmd) + sizeof(struct il_cmd_header) +
5697ac9a364SKalle Valo 	    hdr_len;
5707ac9a364SKalle Valo 	firstlen = (len + 3) & ~3;
5717ac9a364SKalle Valo 
5727ac9a364SKalle Valo 	/* Physical address of this Tx command's header (not MAC header!),
5737ac9a364SKalle Valo 	 * within command buffer array. */
574ebe9e651SChristophe JAILLET 	txcmd_phys = dma_map_single(&il->pci_dev->dev, &out_cmd->hdr, firstlen,
575ebe9e651SChristophe JAILLET 				    DMA_TO_DEVICE);
576ebe9e651SChristophe JAILLET 	if (unlikely(dma_mapping_error(&il->pci_dev->dev, txcmd_phys)))
5777ac9a364SKalle Valo 		goto drop_unlock;
5787ac9a364SKalle Valo 
5797ac9a364SKalle Valo 	/* Set up TFD's 2nd entry to point directly to remainder of skb,
5807ac9a364SKalle Valo 	 * if any (802.11 null frames have no payload). */
5817ac9a364SKalle Valo 	secondlen = skb->len - hdr_len;
5827ac9a364SKalle Valo 	if (secondlen > 0) {
583ebe9e651SChristophe JAILLET 		phys_addr = dma_map_single(&il->pci_dev->dev, skb->data + hdr_len,
584ebe9e651SChristophe JAILLET 					   secondlen, DMA_TO_DEVICE);
585ebe9e651SChristophe JAILLET 		if (unlikely(dma_mapping_error(&il->pci_dev->dev, phys_addr)))
5867ac9a364SKalle Valo 			goto drop_unlock;
5877ac9a364SKalle Valo 	}
5887ac9a364SKalle Valo 
5897ac9a364SKalle Valo 	/* Add buffer containing Tx command and MAC(!) header to TFD's
5907ac9a364SKalle Valo 	 * first entry */
5917ac9a364SKalle Valo 	il->ops->txq_attach_buf_to_tfd(il, txq, txcmd_phys, firstlen, 1, 0);
5927ac9a364SKalle Valo 	dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
5937ac9a364SKalle Valo 	dma_unmap_len_set(out_meta, len, firstlen);
5947ac9a364SKalle Valo 	if (secondlen > 0)
5957ac9a364SKalle Valo 		il->ops->txq_attach_buf_to_tfd(il, txq, phys_addr, secondlen, 0,
5967ac9a364SKalle Valo 					       U32_PAD(secondlen));
5977ac9a364SKalle Valo 
5987ac9a364SKalle Valo 	if (!ieee80211_has_morefrags(hdr->frame_control)) {
5997ac9a364SKalle Valo 		txq->need_update = 1;
6007ac9a364SKalle Valo 	} else {
6017ac9a364SKalle Valo 		wait_write_ptr = 1;
6027ac9a364SKalle Valo 		txq->need_update = 0;
6037ac9a364SKalle Valo 	}
6047ac9a364SKalle Valo 
6057ac9a364SKalle Valo 	il_update_stats(il, true, fc, skb->len);
6067ac9a364SKalle Valo 
6077ac9a364SKalle Valo 	D_TX("sequence nr = 0X%x\n", le16_to_cpu(out_cmd->hdr.sequence));
6087ac9a364SKalle Valo 	D_TX("tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
6097ac9a364SKalle Valo 	il_print_hex_dump(il, IL_DL_TX, tx_cmd, sizeof(*tx_cmd));
6107ac9a364SKalle Valo 	il_print_hex_dump(il, IL_DL_TX, (u8 *) tx_cmd->hdr,
6117ac9a364SKalle Valo 			  ieee80211_hdrlen(fc));
6127ac9a364SKalle Valo 
6137ac9a364SKalle Valo 	/* Tell device the write idx *just past* this latest filled TFD */
6147ac9a364SKalle Valo 	q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
6157ac9a364SKalle Valo 	il_txq_update_write_ptr(il, txq);
6167ac9a364SKalle Valo 	spin_unlock_irqrestore(&il->lock, flags);
6177ac9a364SKalle Valo 
6187ac9a364SKalle Valo 	if (il_queue_space(q) < q->high_mark && il->mac80211_registered) {
6197ac9a364SKalle Valo 		if (wait_write_ptr) {
6207ac9a364SKalle Valo 			spin_lock_irqsave(&il->lock, flags);
6217ac9a364SKalle Valo 			txq->need_update = 1;
6227ac9a364SKalle Valo 			il_txq_update_write_ptr(il, txq);
6237ac9a364SKalle Valo 			spin_unlock_irqrestore(&il->lock, flags);
6247ac9a364SKalle Valo 		}
6257ac9a364SKalle Valo 
6267ac9a364SKalle Valo 		il_stop_queue(il, txq);
6277ac9a364SKalle Valo 	}
6287ac9a364SKalle Valo 
6297ac9a364SKalle Valo 	return 0;
6307ac9a364SKalle Valo 
6317ac9a364SKalle Valo drop_unlock:
6327ac9a364SKalle Valo 	spin_unlock_irqrestore(&il->lock, flags);
6337ac9a364SKalle Valo drop:
6347ac9a364SKalle Valo 	return -1;
6357ac9a364SKalle Valo }
6367ac9a364SKalle Valo 
6377ac9a364SKalle Valo static int
il3945_get_measurement(struct il_priv * il,struct ieee80211_measurement_params * params,u8 type)6387ac9a364SKalle Valo il3945_get_measurement(struct il_priv *il,
6397ac9a364SKalle Valo 		       struct ieee80211_measurement_params *params, u8 type)
6407ac9a364SKalle Valo {
6417ac9a364SKalle Valo 	struct il_spectrum_cmd spectrum;
6427ac9a364SKalle Valo 	struct il_rx_pkt *pkt;
6437ac9a364SKalle Valo 	struct il_host_cmd cmd = {
6447ac9a364SKalle Valo 		.id = C_SPECTRUM_MEASUREMENT,
6457ac9a364SKalle Valo 		.data = (void *)&spectrum,
6467ac9a364SKalle Valo 		.flags = CMD_WANT_SKB,
6477ac9a364SKalle Valo 	};
6487ac9a364SKalle Valo 	u32 add_time = le64_to_cpu(params->start_time);
6497ac9a364SKalle Valo 	int rc;
6507ac9a364SKalle Valo 	int spectrum_resp_status;
6517ac9a364SKalle Valo 	int duration = le16_to_cpu(params->duration);
6527ac9a364SKalle Valo 
6537ac9a364SKalle Valo 	if (il_is_associated(il))
6547ac9a364SKalle Valo 		add_time =
6557ac9a364SKalle Valo 		    il_usecs_to_beacons(il,
6567ac9a364SKalle Valo 					le64_to_cpu(params->start_time) -
6577ac9a364SKalle Valo 					il->_3945.last_tsf,
6587ac9a364SKalle Valo 					le16_to_cpu(il->timing.beacon_interval));
6597ac9a364SKalle Valo 
6607ac9a364SKalle Valo 	memset(&spectrum, 0, sizeof(spectrum));
6617ac9a364SKalle Valo 
6627ac9a364SKalle Valo 	spectrum.channel_count = cpu_to_le16(1);
6637ac9a364SKalle Valo 	spectrum.flags =
6647ac9a364SKalle Valo 	    RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
6657ac9a364SKalle Valo 	spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
6667ac9a364SKalle Valo 	cmd.len = sizeof(spectrum);
6677ac9a364SKalle Valo 	spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
6687ac9a364SKalle Valo 
6697ac9a364SKalle Valo 	if (il_is_associated(il))
6707ac9a364SKalle Valo 		spectrum.start_time =
6717ac9a364SKalle Valo 		    il_add_beacon_time(il, il->_3945.last_beacon_time, add_time,
6727ac9a364SKalle Valo 				       le16_to_cpu(il->timing.beacon_interval));
6737ac9a364SKalle Valo 	else
6747ac9a364SKalle Valo 		spectrum.start_time = 0;
6757ac9a364SKalle Valo 
6767ac9a364SKalle Valo 	spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
6777ac9a364SKalle Valo 	spectrum.channels[0].channel = params->channel;
6787ac9a364SKalle Valo 	spectrum.channels[0].type = type;
6797ac9a364SKalle Valo 	if (il->active.flags & RXON_FLG_BAND_24G_MSK)
6807ac9a364SKalle Valo 		spectrum.flags |=
6817ac9a364SKalle Valo 		    RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK |
6827ac9a364SKalle Valo 		    RXON_FLG_TGG_PROTECT_MSK;
6837ac9a364SKalle Valo 
6847ac9a364SKalle Valo 	rc = il_send_cmd_sync(il, &cmd);
6857ac9a364SKalle Valo 	if (rc)
6867ac9a364SKalle Valo 		return rc;
6877ac9a364SKalle Valo 
6887ac9a364SKalle Valo 	pkt = (struct il_rx_pkt *)cmd.reply_page;
6897ac9a364SKalle Valo 	if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
6907ac9a364SKalle Valo 		IL_ERR("Bad return from N_RX_ON_ASSOC command\n");
6917ac9a364SKalle Valo 		rc = -EIO;
6927ac9a364SKalle Valo 	}
6937ac9a364SKalle Valo 
6947ac9a364SKalle Valo 	spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
6957ac9a364SKalle Valo 	switch (spectrum_resp_status) {
6967ac9a364SKalle Valo 	case 0:		/* Command will be handled */
6977ac9a364SKalle Valo 		if (pkt->u.spectrum.id != 0xff) {
6987ac9a364SKalle Valo 			D_INFO("Replaced existing measurement: %d\n",
6997ac9a364SKalle Valo 			       pkt->u.spectrum.id);
7007ac9a364SKalle Valo 			il->measurement_status &= ~MEASUREMENT_READY;
7017ac9a364SKalle Valo 		}
7027ac9a364SKalle Valo 		il->measurement_status |= MEASUREMENT_ACTIVE;
7037ac9a364SKalle Valo 		rc = 0;
7047ac9a364SKalle Valo 		break;
7057ac9a364SKalle Valo 
7067ac9a364SKalle Valo 	case 1:		/* Command will not be handled */
7077ac9a364SKalle Valo 		rc = -EAGAIN;
7087ac9a364SKalle Valo 		break;
7097ac9a364SKalle Valo 	}
7107ac9a364SKalle Valo 
7117ac9a364SKalle Valo 	il_free_pages(il, cmd.reply_page);
7127ac9a364SKalle Valo 
7137ac9a364SKalle Valo 	return rc;
7147ac9a364SKalle Valo }
7157ac9a364SKalle Valo 
7167ac9a364SKalle Valo static void
il3945_hdl_alive(struct il_priv * il,struct il_rx_buf * rxb)7177ac9a364SKalle Valo il3945_hdl_alive(struct il_priv *il, struct il_rx_buf *rxb)
7187ac9a364SKalle Valo {
7197ac9a364SKalle Valo 	struct il_rx_pkt *pkt = rxb_addr(rxb);
7207ac9a364SKalle Valo 	struct il_alive_resp *palive;
7217ac9a364SKalle Valo 	struct delayed_work *pwork;
7227ac9a364SKalle Valo 
7237ac9a364SKalle Valo 	palive = &pkt->u.alive_frame;
7247ac9a364SKalle Valo 
7257ac9a364SKalle Valo 	D_INFO("Alive ucode status 0x%08X revision " "0x%01X 0x%01X\n",
7267ac9a364SKalle Valo 	       palive->is_valid, palive->ver_type, palive->ver_subtype);
7277ac9a364SKalle Valo 
7287ac9a364SKalle Valo 	if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
7297ac9a364SKalle Valo 		D_INFO("Initialization Alive received.\n");
7307ac9a364SKalle Valo 		memcpy(&il->card_alive_init, &pkt->u.alive_frame,
7317ac9a364SKalle Valo 		       sizeof(struct il_alive_resp));
7327ac9a364SKalle Valo 		pwork = &il->init_alive_start;
7337ac9a364SKalle Valo 	} else {
7347ac9a364SKalle Valo 		D_INFO("Runtime Alive received.\n");
7357ac9a364SKalle Valo 		memcpy(&il->card_alive, &pkt->u.alive_frame,
7367ac9a364SKalle Valo 		       sizeof(struct il_alive_resp));
7377ac9a364SKalle Valo 		pwork = &il->alive_start;
7387ac9a364SKalle Valo 		il3945_disable_events(il);
7397ac9a364SKalle Valo 	}
7407ac9a364SKalle Valo 
7417ac9a364SKalle Valo 	/* We delay the ALIVE response by 5ms to
7427ac9a364SKalle Valo 	 * give the HW RF Kill time to activate... */
7437ac9a364SKalle Valo 	if (palive->is_valid == UCODE_VALID_OK)
7447ac9a364SKalle Valo 		queue_delayed_work(il->workqueue, pwork, msecs_to_jiffies(5));
7457ac9a364SKalle Valo 	else
7467ac9a364SKalle Valo 		IL_WARN("uCode did not respond OK.\n");
7477ac9a364SKalle Valo }
7487ac9a364SKalle Valo 
7497ac9a364SKalle Valo static void
il3945_hdl_add_sta(struct il_priv * il,struct il_rx_buf * rxb)7507ac9a364SKalle Valo il3945_hdl_add_sta(struct il_priv *il, struct il_rx_buf *rxb)
7517ac9a364SKalle Valo {
7527ac9a364SKalle Valo 	struct il_rx_pkt *pkt = rxb_addr(rxb);
7537ac9a364SKalle Valo 
7547ac9a364SKalle Valo 	D_RX("Received C_ADD_STA: 0x%02X\n", pkt->u.status);
7557ac9a364SKalle Valo }
7567ac9a364SKalle Valo 
7577ac9a364SKalle Valo static void
il3945_hdl_beacon(struct il_priv * il,struct il_rx_buf * rxb)7587ac9a364SKalle Valo il3945_hdl_beacon(struct il_priv *il, struct il_rx_buf *rxb)
7597ac9a364SKalle Valo {
7607ac9a364SKalle Valo 	struct il_rx_pkt *pkt = rxb_addr(rxb);
7617ac9a364SKalle Valo 	struct il3945_beacon_notif *beacon = &(pkt->u.beacon_status);
7627ac9a364SKalle Valo #ifdef CONFIG_IWLEGACY_DEBUG
7637ac9a364SKalle Valo 	u8 rate = beacon->beacon_notify_hdr.rate;
7647ac9a364SKalle Valo 
7657ac9a364SKalle Valo 	D_RX("beacon status %x retries %d iss %d " "tsf %d %d rate %d\n",
7667ac9a364SKalle Valo 	     le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
7677ac9a364SKalle Valo 	     beacon->beacon_notify_hdr.failure_frame,
7687ac9a364SKalle Valo 	     le32_to_cpu(beacon->ibss_mgr_status),
7697ac9a364SKalle Valo 	     le32_to_cpu(beacon->high_tsf), le32_to_cpu(beacon->low_tsf), rate);
7707ac9a364SKalle Valo #endif
7717ac9a364SKalle Valo 
7727ac9a364SKalle Valo 	il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
7737ac9a364SKalle Valo 
7747ac9a364SKalle Valo }
7757ac9a364SKalle Valo 
7767ac9a364SKalle Valo /* Handle notification from uCode that card's power state is changing
7777ac9a364SKalle Valo  * due to software, hardware, or critical temperature RFKILL */
7787ac9a364SKalle Valo static void
il3945_hdl_card_state(struct il_priv * il,struct il_rx_buf * rxb)7797ac9a364SKalle Valo il3945_hdl_card_state(struct il_priv *il, struct il_rx_buf *rxb)
7807ac9a364SKalle Valo {
7817ac9a364SKalle Valo 	struct il_rx_pkt *pkt = rxb_addr(rxb);
7827ac9a364SKalle Valo 	u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
7837ac9a364SKalle Valo 	unsigned long status = il->status;
7847ac9a364SKalle Valo 
7857ac9a364SKalle Valo 	IL_WARN("Card state received: HW:%s SW:%s\n",
7867ac9a364SKalle Valo 		(flags & HW_CARD_DISABLED) ? "Kill" : "On",
7877ac9a364SKalle Valo 		(flags & SW_CARD_DISABLED) ? "Kill" : "On");
7887ac9a364SKalle Valo 
7897ac9a364SKalle Valo 	_il_wr(il, CSR_UCODE_DRV_GP1_SET, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
7907ac9a364SKalle Valo 
7917ac9a364SKalle Valo 	if (flags & HW_CARD_DISABLED)
7927ac9a364SKalle Valo 		set_bit(S_RFKILL, &il->status);
7937ac9a364SKalle Valo 	else
7947ac9a364SKalle Valo 		clear_bit(S_RFKILL, &il->status);
7957ac9a364SKalle Valo 
7967ac9a364SKalle Valo 	il_scan_cancel(il);
7977ac9a364SKalle Valo 
7987ac9a364SKalle Valo 	if ((test_bit(S_RFKILL, &status) !=
7997ac9a364SKalle Valo 	     test_bit(S_RFKILL, &il->status)))
8007ac9a364SKalle Valo 		wiphy_rfkill_set_hw_state(il->hw->wiphy,
8017ac9a364SKalle Valo 					  test_bit(S_RFKILL, &il->status));
8027ac9a364SKalle Valo 	else
8037ac9a364SKalle Valo 		wake_up(&il->wait_command_queue);
8047ac9a364SKalle Valo }
8057ac9a364SKalle Valo 
806dd13d6dcSLee Jones /*
8077ac9a364SKalle Valo  * il3945_setup_handlers - Initialize Rx handler callbacks
8087ac9a364SKalle Valo  *
8097ac9a364SKalle Valo  * Setup the RX handlers for each of the reply types sent from the uCode
8107ac9a364SKalle Valo  * to the host.
8117ac9a364SKalle Valo  *
8127ac9a364SKalle Valo  * This function chains into the hardware specific files for them to setup
8137ac9a364SKalle Valo  * any hardware specific handlers as well.
8147ac9a364SKalle Valo  */
8157ac9a364SKalle Valo static void
il3945_setup_handlers(struct il_priv * il)8167ac9a364SKalle Valo il3945_setup_handlers(struct il_priv *il)
8177ac9a364SKalle Valo {
8187ac9a364SKalle Valo 	il->handlers[N_ALIVE] = il3945_hdl_alive;
8197ac9a364SKalle Valo 	il->handlers[C_ADD_STA] = il3945_hdl_add_sta;
8207ac9a364SKalle Valo 	il->handlers[N_ERROR] = il_hdl_error;
8217ac9a364SKalle Valo 	il->handlers[N_CHANNEL_SWITCH] = il_hdl_csa;
8227ac9a364SKalle Valo 	il->handlers[N_SPECTRUM_MEASUREMENT] = il_hdl_spectrum_measurement;
8237ac9a364SKalle Valo 	il->handlers[N_PM_SLEEP] = il_hdl_pm_sleep;
8247ac9a364SKalle Valo 	il->handlers[N_PM_DEBUG_STATS] = il_hdl_pm_debug_stats;
8257ac9a364SKalle Valo 	il->handlers[N_BEACON] = il3945_hdl_beacon;
8267ac9a364SKalle Valo 
8277ac9a364SKalle Valo 	/*
8287ac9a364SKalle Valo 	 * The same handler is used for both the REPLY to a discrete
8297ac9a364SKalle Valo 	 * stats request from the host as well as for the periodic
8307ac9a364SKalle Valo 	 * stats notifications (after received beacons) from the uCode.
8317ac9a364SKalle Valo 	 */
8327ac9a364SKalle Valo 	il->handlers[C_STATS] = il3945_hdl_c_stats;
8337ac9a364SKalle Valo 	il->handlers[N_STATS] = il3945_hdl_stats;
8347ac9a364SKalle Valo 
8357ac9a364SKalle Valo 	il_setup_rx_scan_handlers(il);
8367ac9a364SKalle Valo 	il->handlers[N_CARD_STATE] = il3945_hdl_card_state;
8377ac9a364SKalle Valo 
8387ac9a364SKalle Valo 	/* Set up hardware specific Rx handlers */
8397ac9a364SKalle Valo 	il3945_hw_handler_setup(il);
8407ac9a364SKalle Valo }
8417ac9a364SKalle Valo 
8427ac9a364SKalle Valo /************************** RX-FUNCTIONS ****************************/
8437ac9a364SKalle Valo /*
8447ac9a364SKalle Valo  * Rx theory of operation
8457ac9a364SKalle Valo  *
8467ac9a364SKalle Valo  * The host allocates 32 DMA target addresses and passes the host address
8477ac9a364SKalle Valo  * to the firmware at register IL_RFDS_TBL_LOWER + N * RFD_SIZE where N is
8487ac9a364SKalle Valo  * 0 to 31
8497ac9a364SKalle Valo  *
8507ac9a364SKalle Valo  * Rx Queue Indexes
8517ac9a364SKalle Valo  * The host/firmware share two idx registers for managing the Rx buffers.
8527ac9a364SKalle Valo  *
8537ac9a364SKalle Valo  * The READ idx maps to the first position that the firmware may be writing
8547ac9a364SKalle Valo  * to -- the driver can read up to (but not including) this position and get
8557ac9a364SKalle Valo  * good data.
8567ac9a364SKalle Valo  * The READ idx is managed by the firmware once the card is enabled.
8577ac9a364SKalle Valo  *
8587ac9a364SKalle Valo  * The WRITE idx maps to the last position the driver has read from -- the
8597ac9a364SKalle Valo  * position preceding WRITE is the last slot the firmware can place a packet.
8607ac9a364SKalle Valo  *
8617ac9a364SKalle Valo  * The queue is empty (no good data) if WRITE = READ - 1, and is full if
8627ac9a364SKalle Valo  * WRITE = READ.
8637ac9a364SKalle Valo  *
8647ac9a364SKalle Valo  * During initialization, the host sets up the READ queue position to the first
8657ac9a364SKalle Valo  * IDX position, and WRITE to the last (READ - 1 wrapped)
8667ac9a364SKalle Valo  *
8677ac9a364SKalle Valo  * When the firmware places a packet in a buffer, it will advance the READ idx
8687ac9a364SKalle Valo  * and fire the RX interrupt.  The driver can then query the READ idx and
8697ac9a364SKalle Valo  * process as many packets as possible, moving the WRITE idx forward as it
8707ac9a364SKalle Valo  * resets the Rx queue buffers with new memory.
8717ac9a364SKalle Valo  *
8727ac9a364SKalle Valo  * The management in the driver is as follows:
8737ac9a364SKalle Valo  * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free.  When
8747ac9a364SKalle Valo  *   iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
8757ac9a364SKalle Valo  *   to replenish the iwl->rxq->rx_free.
8767ac9a364SKalle Valo  * + In il3945_rx_replenish (scheduled) if 'processed' != 'read' then the
8777ac9a364SKalle Valo  *   iwl->rxq is replenished and the READ IDX is updated (updating the
8787ac9a364SKalle Valo  *   'processed' and 'read' driver idxes as well)
8797ac9a364SKalle Valo  * + A received packet is processed and handed to the kernel network stack,
8807ac9a364SKalle Valo  *   detached from the iwl->rxq.  The driver 'processed' idx is updated.
8817ac9a364SKalle Valo  * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
8827ac9a364SKalle Valo  *   list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
8837ac9a364SKalle Valo  *   IDX is not incremented and iwl->status(RX_STALLED) is set.  If there
8847ac9a364SKalle Valo  *   were enough free buffers and RX_STALLED is set it is cleared.
8857ac9a364SKalle Valo  *
8867ac9a364SKalle Valo  *
8877ac9a364SKalle Valo  * Driver sequence:
8887ac9a364SKalle Valo  *
8897ac9a364SKalle Valo  * il3945_rx_replenish()     Replenishes rx_free list from rx_used, and calls
8907ac9a364SKalle Valo  *                            il3945_rx_queue_restock
8917ac9a364SKalle Valo  * il3945_rx_queue_restock() Moves available buffers from rx_free into Rx
8927ac9a364SKalle Valo  *                            queue, updates firmware pointers, and updates
8937ac9a364SKalle Valo  *                            the WRITE idx.  If insufficient rx_free buffers
8947ac9a364SKalle Valo  *                            are available, schedules il3945_rx_replenish
8957ac9a364SKalle Valo  *
8967ac9a364SKalle Valo  * -- enable interrupts --
8977ac9a364SKalle Valo  * ISR - il3945_rx()         Detach il_rx_bufs from pool up to the
8987ac9a364SKalle Valo  *                            READ IDX, detaching the SKB from the pool.
8997ac9a364SKalle Valo  *                            Moves the packet buffer from queue to rx_used.
9007ac9a364SKalle Valo  *                            Calls il3945_rx_queue_restock to refill any empty
9017ac9a364SKalle Valo  *                            slots.
9027ac9a364SKalle Valo  * ...
9037ac9a364SKalle Valo  *
9047ac9a364SKalle Valo  */
9057ac9a364SKalle Valo 
906dd13d6dcSLee Jones /*
9077ac9a364SKalle Valo  * il3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
9087ac9a364SKalle Valo  */
9097ac9a364SKalle Valo static inline __le32
il3945_dma_addr2rbd_ptr(struct il_priv * il,dma_addr_t dma_addr)9107ac9a364SKalle Valo il3945_dma_addr2rbd_ptr(struct il_priv *il, dma_addr_t dma_addr)
9117ac9a364SKalle Valo {
9127ac9a364SKalle Valo 	return cpu_to_le32((u32) dma_addr);
9137ac9a364SKalle Valo }
9147ac9a364SKalle Valo 
915dd13d6dcSLee Jones /*
9167ac9a364SKalle Valo  * il3945_rx_queue_restock - refill RX queue from pre-allocated pool
9177ac9a364SKalle Valo  *
9187ac9a364SKalle Valo  * If there are slots in the RX queue that need to be restocked,
9197ac9a364SKalle Valo  * and we have free pre-allocated buffers, fill the ranks as much
9207ac9a364SKalle Valo  * as we can, pulling from rx_free.
9217ac9a364SKalle Valo  *
9227ac9a364SKalle Valo  * This moves the 'write' idx forward to catch up with 'processed', and
9237ac9a364SKalle Valo  * also updates the memory address in the firmware to reference the new
9247ac9a364SKalle Valo  * target buffer.
9257ac9a364SKalle Valo  */
9267ac9a364SKalle Valo static void
il3945_rx_queue_restock(struct il_priv * il)9277ac9a364SKalle Valo il3945_rx_queue_restock(struct il_priv *il)
9287ac9a364SKalle Valo {
9297ac9a364SKalle Valo 	struct il_rx_queue *rxq = &il->rxq;
9307ac9a364SKalle Valo 	struct list_head *element;
9317ac9a364SKalle Valo 	struct il_rx_buf *rxb;
9327ac9a364SKalle Valo 	unsigned long flags;
9337ac9a364SKalle Valo 
9347ac9a364SKalle Valo 	spin_lock_irqsave(&rxq->lock, flags);
9357ac9a364SKalle Valo 	while (il_rx_queue_space(rxq) > 0 && rxq->free_count) {
9367ac9a364SKalle Valo 		/* Get next free Rx buffer, remove from free list */
9377ac9a364SKalle Valo 		element = rxq->rx_free.next;
9387ac9a364SKalle Valo 		rxb = list_entry(element, struct il_rx_buf, list);
9397ac9a364SKalle Valo 		list_del(element);
9407ac9a364SKalle Valo 
9417ac9a364SKalle Valo 		/* Point to Rx buffer via next RBD in circular buffer */
9427ac9a364SKalle Valo 		rxq->bd[rxq->write] =
9437ac9a364SKalle Valo 		    il3945_dma_addr2rbd_ptr(il, rxb->page_dma);
9447ac9a364SKalle Valo 		rxq->queue[rxq->write] = rxb;
9457ac9a364SKalle Valo 		rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
9467ac9a364SKalle Valo 		rxq->free_count--;
9477ac9a364SKalle Valo 	}
9487ac9a364SKalle Valo 	spin_unlock_irqrestore(&rxq->lock, flags);
9497ac9a364SKalle Valo 	/* If the pre-allocated buffer pool is dropping low, schedule to
9507ac9a364SKalle Valo 	 * refill it */
9517ac9a364SKalle Valo 	if (rxq->free_count <= RX_LOW_WATERMARK)
9527ac9a364SKalle Valo 		queue_work(il->workqueue, &il->rx_replenish);
9537ac9a364SKalle Valo 
9547ac9a364SKalle Valo 	/* If we've added more space for the firmware to place data, tell it.
9557ac9a364SKalle Valo 	 * Increment device's write pointer in multiples of 8. */
9567ac9a364SKalle Valo 	if (rxq->write_actual != (rxq->write & ~0x7) ||
9577ac9a364SKalle Valo 	    abs(rxq->write - rxq->read) > 7) {
9587ac9a364SKalle Valo 		spin_lock_irqsave(&rxq->lock, flags);
9597ac9a364SKalle Valo 		rxq->need_update = 1;
9607ac9a364SKalle Valo 		spin_unlock_irqrestore(&rxq->lock, flags);
9617ac9a364SKalle Valo 		il_rx_queue_update_write_ptr(il, rxq);
9627ac9a364SKalle Valo 	}
9637ac9a364SKalle Valo }
9647ac9a364SKalle Valo 
965dd13d6dcSLee Jones /*
9667ac9a364SKalle Valo  * il3945_rx_replenish - Move all used packet from rx_used to rx_free
9677ac9a364SKalle Valo  *
9687ac9a364SKalle Valo  * When moving to rx_free an SKB is allocated for the slot.
9697ac9a364SKalle Valo  *
9707ac9a364SKalle Valo  * Also restock the Rx queue via il3945_rx_queue_restock.
9717ac9a364SKalle Valo  * This is called as a scheduled work item (except for during initialization)
9727ac9a364SKalle Valo  */
9737ac9a364SKalle Valo static void
il3945_rx_allocate(struct il_priv * il,gfp_t priority)9747ac9a364SKalle Valo il3945_rx_allocate(struct il_priv *il, gfp_t priority)
9757ac9a364SKalle Valo {
9767ac9a364SKalle Valo 	struct il_rx_queue *rxq = &il->rxq;
9777ac9a364SKalle Valo 	struct list_head *element;
9787ac9a364SKalle Valo 	struct il_rx_buf *rxb;
9797ac9a364SKalle Valo 	struct page *page;
9807ac9a364SKalle Valo 	dma_addr_t page_dma;
9817ac9a364SKalle Valo 	unsigned long flags;
9827ac9a364SKalle Valo 	gfp_t gfp_mask = priority;
9837ac9a364SKalle Valo 
9847ac9a364SKalle Valo 	while (1) {
9857ac9a364SKalle Valo 		spin_lock_irqsave(&rxq->lock, flags);
9867ac9a364SKalle Valo 		if (list_empty(&rxq->rx_used)) {
9877ac9a364SKalle Valo 			spin_unlock_irqrestore(&rxq->lock, flags);
9887ac9a364SKalle Valo 			return;
9897ac9a364SKalle Valo 		}
9907ac9a364SKalle Valo 		spin_unlock_irqrestore(&rxq->lock, flags);
9917ac9a364SKalle Valo 
9927ac9a364SKalle Valo 		if (rxq->free_count > RX_LOW_WATERMARK)
9937ac9a364SKalle Valo 			gfp_mask |= __GFP_NOWARN;
9947ac9a364SKalle Valo 
9957ac9a364SKalle Valo 		if (il->hw_params.rx_page_order > 0)
9967ac9a364SKalle Valo 			gfp_mask |= __GFP_COMP;
9977ac9a364SKalle Valo 
9987ac9a364SKalle Valo 		/* Alloc a new receive buffer */
9997ac9a364SKalle Valo 		page = alloc_pages(gfp_mask, il->hw_params.rx_page_order);
10007ac9a364SKalle Valo 		if (!page) {
10017ac9a364SKalle Valo 			if (net_ratelimit())
10027ac9a364SKalle Valo 				D_INFO("Failed to allocate SKB buffer.\n");
10037ac9a364SKalle Valo 			if (rxq->free_count <= RX_LOW_WATERMARK &&
10047ac9a364SKalle Valo 			    net_ratelimit())
10057ac9a364SKalle Valo 				IL_ERR("Failed to allocate SKB buffer with %0x."
10067ac9a364SKalle Valo 				       "Only %u free buffers remaining.\n",
10077ac9a364SKalle Valo 				       priority, rxq->free_count);
10087ac9a364SKalle Valo 			/* We don't reschedule replenish work here -- we will
10097ac9a364SKalle Valo 			 * call the restock method and if it still needs
10107ac9a364SKalle Valo 			 * more buffers it will schedule replenish */
10117ac9a364SKalle Valo 			break;
10127ac9a364SKalle Valo 		}
10137ac9a364SKalle Valo 
10147ac9a364SKalle Valo 		/* Get physical address of RB/SKB */
10157ac9a364SKalle Valo 		page_dma =
1016ebe9e651SChristophe JAILLET 		    dma_map_page(&il->pci_dev->dev, page, 0,
10177ac9a364SKalle Valo 				 PAGE_SIZE << il->hw_params.rx_page_order,
1018ebe9e651SChristophe JAILLET 				 DMA_FROM_DEVICE);
10197ac9a364SKalle Valo 
1020ebe9e651SChristophe JAILLET 		if (unlikely(dma_mapping_error(&il->pci_dev->dev, page_dma))) {
10217ac9a364SKalle Valo 			__free_pages(page, il->hw_params.rx_page_order);
10227ac9a364SKalle Valo 			break;
10237ac9a364SKalle Valo 		}
10247ac9a364SKalle Valo 
10257ac9a364SKalle Valo 		spin_lock_irqsave(&rxq->lock, flags);
10267ac9a364SKalle Valo 
10277ac9a364SKalle Valo 		if (list_empty(&rxq->rx_used)) {
10287ac9a364SKalle Valo 			spin_unlock_irqrestore(&rxq->lock, flags);
1029ebe9e651SChristophe JAILLET 			dma_unmap_page(&il->pci_dev->dev, page_dma,
10307ac9a364SKalle Valo 				       PAGE_SIZE << il->hw_params.rx_page_order,
1031ebe9e651SChristophe JAILLET 				       DMA_FROM_DEVICE);
10327ac9a364SKalle Valo 			__free_pages(page, il->hw_params.rx_page_order);
10337ac9a364SKalle Valo 			return;
10347ac9a364SKalle Valo 		}
10357ac9a364SKalle Valo 
10367ac9a364SKalle Valo 		element = rxq->rx_used.next;
10377ac9a364SKalle Valo 		rxb = list_entry(element, struct il_rx_buf, list);
10387ac9a364SKalle Valo 		list_del(element);
10397ac9a364SKalle Valo 
10407ac9a364SKalle Valo 		rxb->page = page;
10417ac9a364SKalle Valo 		rxb->page_dma = page_dma;
10427ac9a364SKalle Valo 		list_add_tail(&rxb->list, &rxq->rx_free);
10437ac9a364SKalle Valo 		rxq->free_count++;
10447ac9a364SKalle Valo 		il->alloc_rxb_page++;
10457ac9a364SKalle Valo 
10467ac9a364SKalle Valo 		spin_unlock_irqrestore(&rxq->lock, flags);
10477ac9a364SKalle Valo 	}
10487ac9a364SKalle Valo }
10497ac9a364SKalle Valo 
10507ac9a364SKalle Valo void
il3945_rx_queue_reset(struct il_priv * il,struct il_rx_queue * rxq)10517ac9a364SKalle Valo il3945_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq)
10527ac9a364SKalle Valo {
10537ac9a364SKalle Valo 	unsigned long flags;
10547ac9a364SKalle Valo 	int i;
10557ac9a364SKalle Valo 	spin_lock_irqsave(&rxq->lock, flags);
10567ac9a364SKalle Valo 	INIT_LIST_HEAD(&rxq->rx_free);
10577ac9a364SKalle Valo 	INIT_LIST_HEAD(&rxq->rx_used);
10587ac9a364SKalle Valo 	/* Fill the rx_used queue with _all_ of the Rx buffers */
10597ac9a364SKalle Valo 	for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
10607ac9a364SKalle Valo 		/* In the reset function, these buffers may have been allocated
10617ac9a364SKalle Valo 		 * to an SKB, so we need to unmap and free potential storage */
10627ac9a364SKalle Valo 		if (rxq->pool[i].page != NULL) {
1063ebe9e651SChristophe JAILLET 			dma_unmap_page(&il->pci_dev->dev,
1064ebe9e651SChristophe JAILLET 				       rxq->pool[i].page_dma,
10657ac9a364SKalle Valo 				       PAGE_SIZE << il->hw_params.rx_page_order,
1066ebe9e651SChristophe JAILLET 				       DMA_FROM_DEVICE);
10677ac9a364SKalle Valo 			__il_free_pages(il, rxq->pool[i].page);
10687ac9a364SKalle Valo 			rxq->pool[i].page = NULL;
10697ac9a364SKalle Valo 		}
10707ac9a364SKalle Valo 		list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
10717ac9a364SKalle Valo 	}
10727ac9a364SKalle Valo 
10737ac9a364SKalle Valo 	/* Set us so that we have processed and used all buffers, but have
10747ac9a364SKalle Valo 	 * not restocked the Rx queue with fresh buffers */
10757ac9a364SKalle Valo 	rxq->read = rxq->write = 0;
10767ac9a364SKalle Valo 	rxq->write_actual = 0;
10777ac9a364SKalle Valo 	rxq->free_count = 0;
10787ac9a364SKalle Valo 	spin_unlock_irqrestore(&rxq->lock, flags);
10797ac9a364SKalle Valo }
10807ac9a364SKalle Valo 
10817ac9a364SKalle Valo void
il3945_rx_replenish(void * data)10827ac9a364SKalle Valo il3945_rx_replenish(void *data)
10837ac9a364SKalle Valo {
10847ac9a364SKalle Valo 	struct il_priv *il = data;
10857ac9a364SKalle Valo 	unsigned long flags;
10867ac9a364SKalle Valo 
10877ac9a364SKalle Valo 	il3945_rx_allocate(il, GFP_KERNEL);
10887ac9a364SKalle Valo 
10897ac9a364SKalle Valo 	spin_lock_irqsave(&il->lock, flags);
10907ac9a364SKalle Valo 	il3945_rx_queue_restock(il);
10917ac9a364SKalle Valo 	spin_unlock_irqrestore(&il->lock, flags);
10927ac9a364SKalle Valo }
10937ac9a364SKalle Valo 
10947ac9a364SKalle Valo static void
il3945_rx_replenish_now(struct il_priv * il)10957ac9a364SKalle Valo il3945_rx_replenish_now(struct il_priv *il)
10967ac9a364SKalle Valo {
10977ac9a364SKalle Valo 	il3945_rx_allocate(il, GFP_ATOMIC);
10987ac9a364SKalle Valo 
10997ac9a364SKalle Valo 	il3945_rx_queue_restock(il);
11007ac9a364SKalle Valo }
11017ac9a364SKalle Valo 
11027ac9a364SKalle Valo /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
11037ac9a364SKalle Valo  * If an SKB has been detached, the POOL needs to have its SKB set to NULL
11047ac9a364SKalle Valo  * This free routine walks the list of POOL entries and if SKB is set to
11057ac9a364SKalle Valo  * non NULL it is unmapped and freed
11067ac9a364SKalle Valo  */
11077ac9a364SKalle Valo static void
il3945_rx_queue_free(struct il_priv * il,struct il_rx_queue * rxq)11087ac9a364SKalle Valo il3945_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq)
11097ac9a364SKalle Valo {
11107ac9a364SKalle Valo 	int i;
11117ac9a364SKalle Valo 	for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
11127ac9a364SKalle Valo 		if (rxq->pool[i].page != NULL) {
1113ebe9e651SChristophe JAILLET 			dma_unmap_page(&il->pci_dev->dev,
1114ebe9e651SChristophe JAILLET 				       rxq->pool[i].page_dma,
11157ac9a364SKalle Valo 				       PAGE_SIZE << il->hw_params.rx_page_order,
1116ebe9e651SChristophe JAILLET 				       DMA_FROM_DEVICE);
11177ac9a364SKalle Valo 			__il_free_pages(il, rxq->pool[i].page);
11187ac9a364SKalle Valo 			rxq->pool[i].page = NULL;
11197ac9a364SKalle Valo 		}
11207ac9a364SKalle Valo 	}
11217ac9a364SKalle Valo 
11227ac9a364SKalle Valo 	dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
11237ac9a364SKalle Valo 			  rxq->bd_dma);
11247ac9a364SKalle Valo 	dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status),
11257ac9a364SKalle Valo 			  rxq->rb_stts, rxq->rb_stts_dma);
11267ac9a364SKalle Valo 	rxq->bd = NULL;
11277ac9a364SKalle Valo 	rxq->rb_stts = NULL;
11287ac9a364SKalle Valo }
11297ac9a364SKalle Valo 
11307ac9a364SKalle Valo /* Convert linear signal-to-noise ratio into dB */
11317ac9a364SKalle Valo static u8 ratio2dB[100] = {
11327ac9a364SKalle Valo /*	 0   1   2   3   4   5   6   7   8   9 */
11337ac9a364SKalle Valo 	0, 0, 6, 10, 12, 14, 16, 17, 18, 19,	/* 00 - 09 */
11347ac9a364SKalle Valo 	20, 21, 22, 22, 23, 23, 24, 25, 26, 26,	/* 10 - 19 */
11357ac9a364SKalle Valo 	26, 26, 26, 27, 27, 28, 28, 28, 29, 29,	/* 20 - 29 */
11367ac9a364SKalle Valo 	29, 30, 30, 30, 31, 31, 31, 31, 32, 32,	/* 30 - 39 */
11377ac9a364SKalle Valo 	32, 32, 32, 33, 33, 33, 33, 33, 34, 34,	/* 40 - 49 */
11387ac9a364SKalle Valo 	34, 34, 34, 34, 35, 35, 35, 35, 35, 35,	/* 50 - 59 */
11397ac9a364SKalle Valo 	36, 36, 36, 36, 36, 36, 36, 37, 37, 37,	/* 60 - 69 */
11407ac9a364SKalle Valo 	37, 37, 37, 37, 37, 38, 38, 38, 38, 38,	/* 70 - 79 */
11417ac9a364SKalle Valo 	38, 38, 38, 38, 38, 39, 39, 39, 39, 39,	/* 80 - 89 */
11427ac9a364SKalle Valo 	39, 39, 39, 39, 39, 40, 40, 40, 40, 40	/* 90 - 99 */
11437ac9a364SKalle Valo };
11447ac9a364SKalle Valo 
11457ac9a364SKalle Valo /* Calculates a relative dB value from a ratio of linear
11467ac9a364SKalle Valo  *   (i.e. not dB) signal levels.
11477ac9a364SKalle Valo  * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
11487ac9a364SKalle Valo int
il3945_calc_db_from_ratio(int sig_ratio)11497ac9a364SKalle Valo il3945_calc_db_from_ratio(int sig_ratio)
11507ac9a364SKalle Valo {
11517ac9a364SKalle Valo 	/* 1000:1 or higher just report as 60 dB */
11527ac9a364SKalle Valo 	if (sig_ratio >= 1000)
11537ac9a364SKalle Valo 		return 60;
11547ac9a364SKalle Valo 
11557ac9a364SKalle Valo 	/* 100:1 or higher, divide by 10 and use table,
11567ac9a364SKalle Valo 	 *   add 20 dB to make up for divide by 10 */
11577ac9a364SKalle Valo 	if (sig_ratio >= 100)
11587ac9a364SKalle Valo 		return 20 + (int)ratio2dB[sig_ratio / 10];
11597ac9a364SKalle Valo 
11607ac9a364SKalle Valo 	/* We shouldn't see this */
11617ac9a364SKalle Valo 	if (sig_ratio < 1)
11627ac9a364SKalle Valo 		return 0;
11637ac9a364SKalle Valo 
11647ac9a364SKalle Valo 	/* Use table for ratios 1:1 - 99:1 */
11657ac9a364SKalle Valo 	return (int)ratio2dB[sig_ratio];
11667ac9a364SKalle Valo }
11677ac9a364SKalle Valo 
1168dd13d6dcSLee Jones /*
11697ac9a364SKalle Valo  * il3945_rx_handle - Main entry function for receiving responses from uCode
11707ac9a364SKalle Valo  *
11717ac9a364SKalle Valo  * Uses the il->handlers callback function array to invoke
11727ac9a364SKalle Valo  * the appropriate handlers, including command responses,
11737ac9a364SKalle Valo  * frame-received notifications, and other notifications.
11747ac9a364SKalle Valo  */
11757ac9a364SKalle Valo static void
il3945_rx_handle(struct il_priv * il)11767ac9a364SKalle Valo il3945_rx_handle(struct il_priv *il)
11777ac9a364SKalle Valo {
11787ac9a364SKalle Valo 	struct il_rx_buf *rxb;
11797ac9a364SKalle Valo 	struct il_rx_pkt *pkt;
11807ac9a364SKalle Valo 	struct il_rx_queue *rxq = &il->rxq;
11817ac9a364SKalle Valo 	u32 r, i;
11827ac9a364SKalle Valo 	int reclaim;
11837ac9a364SKalle Valo 	unsigned long flags;
11847ac9a364SKalle Valo 	u8 fill_rx = 0;
11857ac9a364SKalle Valo 	u32 count = 8;
11867ac9a364SKalle Valo 	int total_empty = 0;
11877ac9a364SKalle Valo 
11887ac9a364SKalle Valo 	/* uCode's read idx (stored in shared DRAM) indicates the last Rx
11897ac9a364SKalle Valo 	 * buffer that the driver may process (last buffer filled by ucode). */
11907ac9a364SKalle Valo 	r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
11917ac9a364SKalle Valo 	i = rxq->read;
11927ac9a364SKalle Valo 
11937ac9a364SKalle Valo 	/* calculate total frames need to be restock after handling RX */
11947ac9a364SKalle Valo 	total_empty = r - rxq->write_actual;
11957ac9a364SKalle Valo 	if (total_empty < 0)
11967ac9a364SKalle Valo 		total_empty += RX_QUEUE_SIZE;
11977ac9a364SKalle Valo 
11987ac9a364SKalle Valo 	if (total_empty > (RX_QUEUE_SIZE / 2))
11997ac9a364SKalle Valo 		fill_rx = 1;
12007ac9a364SKalle Valo 	/* Rx interrupt, but nothing sent from uCode */
12017ac9a364SKalle Valo 	if (i == r)
12027ac9a364SKalle Valo 		D_RX("r = %d, i = %d\n", r, i);
12037ac9a364SKalle Valo 
12047ac9a364SKalle Valo 	while (i != r) {
12057ac9a364SKalle Valo 		rxb = rxq->queue[i];
12067ac9a364SKalle Valo 
12077ac9a364SKalle Valo 		/* If an RXB doesn't have a Rx queue slot associated with it,
12087ac9a364SKalle Valo 		 * then a bug has been introduced in the queue refilling
12097ac9a364SKalle Valo 		 * routines -- catch it here */
12107ac9a364SKalle Valo 		BUG_ON(rxb == NULL);
12117ac9a364SKalle Valo 
12127ac9a364SKalle Valo 		rxq->queue[i] = NULL;
12137ac9a364SKalle Valo 
1214ebe9e651SChristophe JAILLET 		dma_unmap_page(&il->pci_dev->dev, rxb->page_dma,
12157ac9a364SKalle Valo 			       PAGE_SIZE << il->hw_params.rx_page_order,
1216ebe9e651SChristophe JAILLET 			       DMA_FROM_DEVICE);
12177ac9a364SKalle Valo 		pkt = rxb_addr(rxb);
12187ac9a364SKalle Valo 		reclaim = il_need_reclaim(il, pkt);
12197ac9a364SKalle Valo 
12207ac9a364SKalle Valo 		/* Based on type of command response or notification,
12217ac9a364SKalle Valo 		 *   handle those that need handling via function in
12227ac9a364SKalle Valo 		 *   handlers table.  See il3945_setup_handlers() */
12237ac9a364SKalle Valo 		if (il->handlers[pkt->hdr.cmd]) {
12247ac9a364SKalle Valo 			D_RX("r = %d, i = %d, %s, 0x%02x\n", r, i,
12257ac9a364SKalle Valo 			     il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
12267ac9a364SKalle Valo 			il->isr_stats.handlers[pkt->hdr.cmd]++;
12277ac9a364SKalle Valo 			il->handlers[pkt->hdr.cmd] (il, rxb);
12287ac9a364SKalle Valo 		} else {
12297ac9a364SKalle Valo 			/* No handling needed */
12307ac9a364SKalle Valo 			D_RX("r %d i %d No handler needed for %s, 0x%02x\n", r,
12317ac9a364SKalle Valo 			     i, il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
12327ac9a364SKalle Valo 		}
12337ac9a364SKalle Valo 
12347ac9a364SKalle Valo 		/*
12357ac9a364SKalle Valo 		 * XXX: After here, we should always check rxb->page
12367ac9a364SKalle Valo 		 * against NULL before touching it or its virtual
12377ac9a364SKalle Valo 		 * memory (pkt). Because some handler might have
12387ac9a364SKalle Valo 		 * already taken or freed the pages.
12397ac9a364SKalle Valo 		 */
12407ac9a364SKalle Valo 
12417ac9a364SKalle Valo 		if (reclaim) {
12427ac9a364SKalle Valo 			/* Invoke any callbacks, transfer the buffer to caller,
12437ac9a364SKalle Valo 			 * and fire off the (possibly) blocking il_send_cmd()
12447ac9a364SKalle Valo 			 * as we reclaim the driver command queue */
12457ac9a364SKalle Valo 			if (rxb->page)
12467ac9a364SKalle Valo 				il_tx_cmd_complete(il, rxb);
12477ac9a364SKalle Valo 			else
12487ac9a364SKalle Valo 				IL_WARN("Claim null rxb?\n");
12497ac9a364SKalle Valo 		}
12507ac9a364SKalle Valo 
12517ac9a364SKalle Valo 		/* Reuse the page if possible. For notification packets and
12527ac9a364SKalle Valo 		 * SKBs that fail to Rx correctly, add them back into the
12537ac9a364SKalle Valo 		 * rx_free list for reuse later. */
12547ac9a364SKalle Valo 		spin_lock_irqsave(&rxq->lock, flags);
12557ac9a364SKalle Valo 		if (rxb->page != NULL) {
12567ac9a364SKalle Valo 			rxb->page_dma =
1257ebe9e651SChristophe JAILLET 			    dma_map_page(&il->pci_dev->dev, rxb->page, 0,
1258ebe9e651SChristophe JAILLET 					 PAGE_SIZE << il->hw_params.rx_page_order,
1259ebe9e651SChristophe JAILLET 					 DMA_FROM_DEVICE);
1260ebe9e651SChristophe JAILLET 			if (unlikely(dma_mapping_error(&il->pci_dev->dev,
12617ac9a364SKalle Valo 						       rxb->page_dma))) {
12627ac9a364SKalle Valo 				__il_free_pages(il, rxb->page);
12637ac9a364SKalle Valo 				rxb->page = NULL;
12647ac9a364SKalle Valo 				list_add_tail(&rxb->list, &rxq->rx_used);
12657ac9a364SKalle Valo 			} else {
12667ac9a364SKalle Valo 				list_add_tail(&rxb->list, &rxq->rx_free);
12677ac9a364SKalle Valo 				rxq->free_count++;
12687ac9a364SKalle Valo 			}
12697ac9a364SKalle Valo 		} else
12707ac9a364SKalle Valo 			list_add_tail(&rxb->list, &rxq->rx_used);
12717ac9a364SKalle Valo 
12727ac9a364SKalle Valo 		spin_unlock_irqrestore(&rxq->lock, flags);
12737ac9a364SKalle Valo 
12747ac9a364SKalle Valo 		i = (i + 1) & RX_QUEUE_MASK;
12757ac9a364SKalle Valo 		/* If there are a lot of unused frames,
12767ac9a364SKalle Valo 		 * restock the Rx queue so ucode won't assert. */
12777ac9a364SKalle Valo 		if (fill_rx) {
12787ac9a364SKalle Valo 			count++;
12797ac9a364SKalle Valo 			if (count >= 8) {
12807ac9a364SKalle Valo 				rxq->read = i;
12817ac9a364SKalle Valo 				il3945_rx_replenish_now(il);
12827ac9a364SKalle Valo 				count = 0;
12837ac9a364SKalle Valo 			}
12847ac9a364SKalle Valo 		}
12857ac9a364SKalle Valo 	}
12867ac9a364SKalle Valo 
12877ac9a364SKalle Valo 	/* Backtrack one entry */
12887ac9a364SKalle Valo 	rxq->read = i;
12897ac9a364SKalle Valo 	if (fill_rx)
12907ac9a364SKalle Valo 		il3945_rx_replenish_now(il);
12917ac9a364SKalle Valo 	else
12927ac9a364SKalle Valo 		il3945_rx_queue_restock(il);
12937ac9a364SKalle Valo }
12947ac9a364SKalle Valo 
12957ac9a364SKalle Valo /* call this function to flush any scheduled tasklet */
12967ac9a364SKalle Valo static inline void
il3945_synchronize_irq(struct il_priv * il)12977ac9a364SKalle Valo il3945_synchronize_irq(struct il_priv *il)
12987ac9a364SKalle Valo {
12997ac9a364SKalle Valo 	/* wait to make sure we flush pending tasklet */
13007ac9a364SKalle Valo 	synchronize_irq(il->pci_dev->irq);
13017ac9a364SKalle Valo 	tasklet_kill(&il->irq_tasklet);
13027ac9a364SKalle Valo }
13037ac9a364SKalle Valo 
13047ac9a364SKalle Valo static const char *
il3945_desc_lookup(int i)13057ac9a364SKalle Valo il3945_desc_lookup(int i)
13067ac9a364SKalle Valo {
13077ac9a364SKalle Valo 	switch (i) {
13087ac9a364SKalle Valo 	case 1:
13097ac9a364SKalle Valo 		return "FAIL";
13107ac9a364SKalle Valo 	case 2:
13117ac9a364SKalle Valo 		return "BAD_PARAM";
13127ac9a364SKalle Valo 	case 3:
13137ac9a364SKalle Valo 		return "BAD_CHECKSUM";
13147ac9a364SKalle Valo 	case 4:
13157ac9a364SKalle Valo 		return "NMI_INTERRUPT";
13167ac9a364SKalle Valo 	case 5:
13177ac9a364SKalle Valo 		return "SYSASSERT";
13187ac9a364SKalle Valo 	case 6:
13197ac9a364SKalle Valo 		return "FATAL_ERROR";
13207ac9a364SKalle Valo 	}
13217ac9a364SKalle Valo 
13227ac9a364SKalle Valo 	return "UNKNOWN";
13237ac9a364SKalle Valo }
13247ac9a364SKalle Valo 
13257ac9a364SKalle Valo #define ERROR_START_OFFSET  (1 * sizeof(u32))
13267ac9a364SKalle Valo #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
13277ac9a364SKalle Valo 
13287ac9a364SKalle Valo void
il3945_dump_nic_error_log(struct il_priv * il)13297ac9a364SKalle Valo il3945_dump_nic_error_log(struct il_priv *il)
13307ac9a364SKalle Valo {
13317ac9a364SKalle Valo 	u32 i;
13327ac9a364SKalle Valo 	u32 desc, time, count, base, data1;
13337ac9a364SKalle Valo 	u32 blink1, blink2, ilink1, ilink2;
13347ac9a364SKalle Valo 
13357ac9a364SKalle Valo 	base = le32_to_cpu(il->card_alive.error_event_table_ptr);
13367ac9a364SKalle Valo 
13377ac9a364SKalle Valo 	if (!il3945_hw_valid_rtc_data_addr(base)) {
13387ac9a364SKalle Valo 		IL_ERR("Not valid error log pointer 0x%08X\n", base);
13397ac9a364SKalle Valo 		return;
13407ac9a364SKalle Valo 	}
13417ac9a364SKalle Valo 
13427ac9a364SKalle Valo 	count = il_read_targ_mem(il, base);
13437ac9a364SKalle Valo 
13447ac9a364SKalle Valo 	if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
13457ac9a364SKalle Valo 		IL_ERR("Start IWL Error Log Dump:\n");
13467ac9a364SKalle Valo 		IL_ERR("Status: 0x%08lX, count: %d\n", il->status, count);
13477ac9a364SKalle Valo 	}
13487ac9a364SKalle Valo 
13497ac9a364SKalle Valo 	IL_ERR("Desc       Time       asrtPC  blink2 "
13507ac9a364SKalle Valo 	       "ilink1  nmiPC   Line\n");
13517ac9a364SKalle Valo 	for (i = ERROR_START_OFFSET;
13527ac9a364SKalle Valo 	     i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
13537ac9a364SKalle Valo 	     i += ERROR_ELEM_SIZE) {
13547ac9a364SKalle Valo 		desc = il_read_targ_mem(il, base + i);
13557ac9a364SKalle Valo 		time = il_read_targ_mem(il, base + i + 1 * sizeof(u32));
13567ac9a364SKalle Valo 		blink1 = il_read_targ_mem(il, base + i + 2 * sizeof(u32));
13577ac9a364SKalle Valo 		blink2 = il_read_targ_mem(il, base + i + 3 * sizeof(u32));
13587ac9a364SKalle Valo 		ilink1 = il_read_targ_mem(il, base + i + 4 * sizeof(u32));
13597ac9a364SKalle Valo 		ilink2 = il_read_targ_mem(il, base + i + 5 * sizeof(u32));
13607ac9a364SKalle Valo 		data1 = il_read_targ_mem(il, base + i + 6 * sizeof(u32));
13617ac9a364SKalle Valo 
13627ac9a364SKalle Valo 		IL_ERR("%-13s (0x%X) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
13637ac9a364SKalle Valo 		       il3945_desc_lookup(desc), desc, time, blink1, blink2,
13647ac9a364SKalle Valo 		       ilink1, ilink2, data1);
13657ac9a364SKalle Valo 	}
13667ac9a364SKalle Valo }
13677ac9a364SKalle Valo 
13687ac9a364SKalle Valo static void
il3945_irq_tasklet(struct tasklet_struct * t)1369b81b9d37SAllen Pais il3945_irq_tasklet(struct tasklet_struct *t)
13707ac9a364SKalle Valo {
1371b81b9d37SAllen Pais 	struct il_priv *il = from_tasklet(il, t, irq_tasklet);
13727ac9a364SKalle Valo 	u32 inta, handled = 0;
13737ac9a364SKalle Valo 	u32 inta_fh;
13747ac9a364SKalle Valo 	unsigned long flags;
13757ac9a364SKalle Valo #ifdef CONFIG_IWLEGACY_DEBUG
13767ac9a364SKalle Valo 	u32 inta_mask;
13777ac9a364SKalle Valo #endif
13787ac9a364SKalle Valo 
13797ac9a364SKalle Valo 	spin_lock_irqsave(&il->lock, flags);
13807ac9a364SKalle Valo 
13817ac9a364SKalle Valo 	/* Ack/clear/reset pending uCode interrupts.
13827ac9a364SKalle Valo 	 * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
13837ac9a364SKalle Valo 	 *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
13847ac9a364SKalle Valo 	inta = _il_rd(il, CSR_INT);
13857ac9a364SKalle Valo 	_il_wr(il, CSR_INT, inta);
13867ac9a364SKalle Valo 
13877ac9a364SKalle Valo 	/* Ack/clear/reset pending flow-handler (DMA) interrupts.
13887ac9a364SKalle Valo 	 * Any new interrupts that happen after this, either while we're
13897ac9a364SKalle Valo 	 * in this tasklet, or later, will show up in next ISR/tasklet. */
13907ac9a364SKalle Valo 	inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
13917ac9a364SKalle Valo 	_il_wr(il, CSR_FH_INT_STATUS, inta_fh);
13927ac9a364SKalle Valo 
13937ac9a364SKalle Valo #ifdef CONFIG_IWLEGACY_DEBUG
13947ac9a364SKalle Valo 	if (il_get_debug_level(il) & IL_DL_ISR) {
13957ac9a364SKalle Valo 		/* just for debug */
13967ac9a364SKalle Valo 		inta_mask = _il_rd(il, CSR_INT_MASK);
13977ac9a364SKalle Valo 		D_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta,
13987ac9a364SKalle Valo 		      inta_mask, inta_fh);
13997ac9a364SKalle Valo 	}
14007ac9a364SKalle Valo #endif
14017ac9a364SKalle Valo 
14027ac9a364SKalle Valo 	spin_unlock_irqrestore(&il->lock, flags);
14037ac9a364SKalle Valo 
14047ac9a364SKalle Valo 	/* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
14057ac9a364SKalle Valo 	 * atomic, make sure that inta covers all the interrupts that
14067ac9a364SKalle Valo 	 * we've discovered, even if FH interrupt came in just after
14077ac9a364SKalle Valo 	 * reading CSR_INT. */
14087ac9a364SKalle Valo 	if (inta_fh & CSR39_FH_INT_RX_MASK)
14097ac9a364SKalle Valo 		inta |= CSR_INT_BIT_FH_RX;
14107ac9a364SKalle Valo 	if (inta_fh & CSR39_FH_INT_TX_MASK)
14117ac9a364SKalle Valo 		inta |= CSR_INT_BIT_FH_TX;
14127ac9a364SKalle Valo 
14137ac9a364SKalle Valo 	/* Now service all interrupt bits discovered above. */
14147ac9a364SKalle Valo 	if (inta & CSR_INT_BIT_HW_ERR) {
14157ac9a364SKalle Valo 		IL_ERR("Hardware error detected.  Restarting.\n");
14167ac9a364SKalle Valo 
14177ac9a364SKalle Valo 		/* Tell the device to stop sending interrupts */
14187ac9a364SKalle Valo 		il_disable_interrupts(il);
14197ac9a364SKalle Valo 
14207ac9a364SKalle Valo 		il->isr_stats.hw++;
14217ac9a364SKalle Valo 		il_irq_handle_error(il);
14227ac9a364SKalle Valo 
14237ac9a364SKalle Valo 		handled |= CSR_INT_BIT_HW_ERR;
14247ac9a364SKalle Valo 
14257ac9a364SKalle Valo 		return;
14267ac9a364SKalle Valo 	}
14277ac9a364SKalle Valo #ifdef CONFIG_IWLEGACY_DEBUG
14287ac9a364SKalle Valo 	if (il_get_debug_level(il) & (IL_DL_ISR)) {
14297ac9a364SKalle Valo 		/* NIC fires this, but we don't use it, redundant with WAKEUP */
14307ac9a364SKalle Valo 		if (inta & CSR_INT_BIT_SCD) {
14317ac9a364SKalle Valo 			D_ISR("Scheduler finished to transmit "
14327ac9a364SKalle Valo 			      "the frame/frames.\n");
14337ac9a364SKalle Valo 			il->isr_stats.sch++;
14347ac9a364SKalle Valo 		}
14357ac9a364SKalle Valo 
14367ac9a364SKalle Valo 		/* Alive notification via Rx interrupt will do the real work */
14377ac9a364SKalle Valo 		if (inta & CSR_INT_BIT_ALIVE) {
14387ac9a364SKalle Valo 			D_ISR("Alive interrupt\n");
14397ac9a364SKalle Valo 			il->isr_stats.alive++;
14407ac9a364SKalle Valo 		}
14417ac9a364SKalle Valo 	}
14427ac9a364SKalle Valo #endif
14437ac9a364SKalle Valo 	/* Safely ignore these bits for debug checks below */
14447ac9a364SKalle Valo 	inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
14457ac9a364SKalle Valo 
14467ac9a364SKalle Valo 	/* Error detected by uCode */
14477ac9a364SKalle Valo 	if (inta & CSR_INT_BIT_SW_ERR) {
14487ac9a364SKalle Valo 		IL_ERR("Microcode SW error detected. " "Restarting 0x%X.\n",
14497ac9a364SKalle Valo 		       inta);
14507ac9a364SKalle Valo 		il->isr_stats.sw++;
14517ac9a364SKalle Valo 		il_irq_handle_error(il);
14527ac9a364SKalle Valo 		handled |= CSR_INT_BIT_SW_ERR;
14537ac9a364SKalle Valo 	}
14547ac9a364SKalle Valo 
14557ac9a364SKalle Valo 	/* uCode wakes up after power-down sleep */
14567ac9a364SKalle Valo 	if (inta & CSR_INT_BIT_WAKEUP) {
14577ac9a364SKalle Valo 		D_ISR("Wakeup interrupt\n");
14587ac9a364SKalle Valo 		il_rx_queue_update_write_ptr(il, &il->rxq);
14597ac9a364SKalle Valo 
14607ac9a364SKalle Valo 		spin_lock_irqsave(&il->lock, flags);
14617ac9a364SKalle Valo 		il_txq_update_write_ptr(il, &il->txq[0]);
14627ac9a364SKalle Valo 		il_txq_update_write_ptr(il, &il->txq[1]);
14637ac9a364SKalle Valo 		il_txq_update_write_ptr(il, &il->txq[2]);
14647ac9a364SKalle Valo 		il_txq_update_write_ptr(il, &il->txq[3]);
14657ac9a364SKalle Valo 		il_txq_update_write_ptr(il, &il->txq[4]);
14667ac9a364SKalle Valo 		spin_unlock_irqrestore(&il->lock, flags);
14677ac9a364SKalle Valo 
14687ac9a364SKalle Valo 		il->isr_stats.wakeup++;
14697ac9a364SKalle Valo 		handled |= CSR_INT_BIT_WAKEUP;
14707ac9a364SKalle Valo 	}
14717ac9a364SKalle Valo 
14727ac9a364SKalle Valo 	/* All uCode command responses, including Tx command responses,
14737ac9a364SKalle Valo 	 * Rx "responses" (frame-received notification), and other
14747ac9a364SKalle Valo 	 * notifications from uCode come through here*/
14757ac9a364SKalle Valo 	if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
14767ac9a364SKalle Valo 		il3945_rx_handle(il);
14777ac9a364SKalle Valo 		il->isr_stats.rx++;
14787ac9a364SKalle Valo 		handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
14797ac9a364SKalle Valo 	}
14807ac9a364SKalle Valo 
14817ac9a364SKalle Valo 	if (inta & CSR_INT_BIT_FH_TX) {
14827ac9a364SKalle Valo 		D_ISR("Tx interrupt\n");
14837ac9a364SKalle Valo 		il->isr_stats.tx++;
14847ac9a364SKalle Valo 
14857ac9a364SKalle Valo 		_il_wr(il, CSR_FH_INT_STATUS, (1 << 6));
14867ac9a364SKalle Valo 		il_wr(il, FH39_TCSR_CREDIT(FH39_SRVC_CHNL), 0x0);
14877ac9a364SKalle Valo 		handled |= CSR_INT_BIT_FH_TX;
14887ac9a364SKalle Valo 	}
14897ac9a364SKalle Valo 
14907ac9a364SKalle Valo 	if (inta & ~handled) {
14917ac9a364SKalle Valo 		IL_ERR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
14927ac9a364SKalle Valo 		il->isr_stats.unhandled++;
14937ac9a364SKalle Valo 	}
14947ac9a364SKalle Valo 
14957ac9a364SKalle Valo 	if (inta & ~il->inta_mask) {
14967ac9a364SKalle Valo 		IL_WARN("Disabled INTA bits 0x%08x were pending\n",
14977ac9a364SKalle Valo 			inta & ~il->inta_mask);
14987ac9a364SKalle Valo 		IL_WARN("   with inta_fh = 0x%08x\n", inta_fh);
14997ac9a364SKalle Valo 	}
15007ac9a364SKalle Valo 
15017ac9a364SKalle Valo 	/* Re-enable all interrupts */
15027ac9a364SKalle Valo 	/* only Re-enable if disabled by irq */
15037ac9a364SKalle Valo 	if (test_bit(S_INT_ENABLED, &il->status))
15047ac9a364SKalle Valo 		il_enable_interrupts(il);
15057ac9a364SKalle Valo 
15067ac9a364SKalle Valo #ifdef CONFIG_IWLEGACY_DEBUG
15077ac9a364SKalle Valo 	if (il_get_debug_level(il) & (IL_DL_ISR)) {
15087ac9a364SKalle Valo 		inta = _il_rd(il, CSR_INT);
15097ac9a364SKalle Valo 		inta_mask = _il_rd(il, CSR_INT_MASK);
15107ac9a364SKalle Valo 		inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
15117ac9a364SKalle Valo 		D_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
15127ac9a364SKalle Valo 		      "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
15137ac9a364SKalle Valo 	}
15147ac9a364SKalle Valo #endif
15157ac9a364SKalle Valo }
15167ac9a364SKalle Valo 
15177ac9a364SKalle Valo static int
il3945_get_channels_for_scan(struct il_priv * il,enum nl80211_band band,u8 is_active,u8 n_probes,struct il3945_scan_channel * scan_ch,struct ieee80211_vif * vif)151857fbcce3SJohannes Berg il3945_get_channels_for_scan(struct il_priv *il, enum nl80211_band band,
15197ac9a364SKalle Valo 			     u8 is_active, u8 n_probes,
15207ac9a364SKalle Valo 			     struct il3945_scan_channel *scan_ch,
15217ac9a364SKalle Valo 			     struct ieee80211_vif *vif)
15227ac9a364SKalle Valo {
15237ac9a364SKalle Valo 	struct ieee80211_channel *chan;
15247ac9a364SKalle Valo 	const struct ieee80211_supported_band *sband;
15257ac9a364SKalle Valo 	const struct il_channel_info *ch_info;
15267ac9a364SKalle Valo 	u16 passive_dwell = 0;
15277ac9a364SKalle Valo 	u16 active_dwell = 0;
15287ac9a364SKalle Valo 	int added, i;
15297ac9a364SKalle Valo 
15307ac9a364SKalle Valo 	sband = il_get_hw_mode(il, band);
15317ac9a364SKalle Valo 	if (!sband)
15327ac9a364SKalle Valo 		return 0;
15337ac9a364SKalle Valo 
15347ac9a364SKalle Valo 	active_dwell = il_get_active_dwell_time(il, band, n_probes);
15357ac9a364SKalle Valo 	passive_dwell = il_get_passive_dwell_time(il, band, vif);
15367ac9a364SKalle Valo 
15377ac9a364SKalle Valo 	if (passive_dwell <= active_dwell)
15387ac9a364SKalle Valo 		passive_dwell = active_dwell + 1;
15397ac9a364SKalle Valo 
15407ac9a364SKalle Valo 	for (i = 0, added = 0; i < il->scan_request->n_channels; i++) {
15417ac9a364SKalle Valo 		chan = il->scan_request->channels[i];
15427ac9a364SKalle Valo 
15437ac9a364SKalle Valo 		if (chan->band != band)
15447ac9a364SKalle Valo 			continue;
15457ac9a364SKalle Valo 
15467ac9a364SKalle Valo 		scan_ch->channel = chan->hw_value;
15477ac9a364SKalle Valo 
15487ac9a364SKalle Valo 		ch_info = il_get_channel_info(il, band, scan_ch->channel);
15497ac9a364SKalle Valo 		if (!il_is_channel_valid(ch_info)) {
15507ac9a364SKalle Valo 			D_SCAN("Channel %d is INVALID for this band.\n",
15517ac9a364SKalle Valo 			       scan_ch->channel);
15527ac9a364SKalle Valo 			continue;
15537ac9a364SKalle Valo 		}
15547ac9a364SKalle Valo 
15557ac9a364SKalle Valo 		scan_ch->active_dwell = cpu_to_le16(active_dwell);
15567ac9a364SKalle Valo 		scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
15577ac9a364SKalle Valo 		/* If passive , set up for auto-switch
15587ac9a364SKalle Valo 		 *  and use long active_dwell time.
15597ac9a364SKalle Valo 		 */
15607ac9a364SKalle Valo 		if (!is_active || il_is_channel_passive(ch_info) ||
15617ac9a364SKalle Valo 		    (chan->flags & IEEE80211_CHAN_NO_IR)) {
15627ac9a364SKalle Valo 			scan_ch->type = 0;	/* passive */
15637ac9a364SKalle Valo 			if (IL_UCODE_API(il->ucode_ver) == 1)
15647ac9a364SKalle Valo 				scan_ch->active_dwell =
15657ac9a364SKalle Valo 				    cpu_to_le16(passive_dwell - 1);
15667ac9a364SKalle Valo 		} else {
15677ac9a364SKalle Valo 			scan_ch->type = 1;	/* active */
15687ac9a364SKalle Valo 		}
15697ac9a364SKalle Valo 
15707ac9a364SKalle Valo 		/* Set direct probe bits. These may be used both for active
15717ac9a364SKalle Valo 		 * scan channels (probes gets sent right away),
15727ac9a364SKalle Valo 		 * or for passive channels (probes get se sent only after
15737ac9a364SKalle Valo 		 * hearing clear Rx packet).*/
15747ac9a364SKalle Valo 		if (IL_UCODE_API(il->ucode_ver) >= 2) {
15757ac9a364SKalle Valo 			if (n_probes)
15767ac9a364SKalle Valo 				scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
15777ac9a364SKalle Valo 		} else {
15787ac9a364SKalle Valo 			/* uCode v1 does not allow setting direct probe bits on
15797ac9a364SKalle Valo 			 * passive channel. */
15807ac9a364SKalle Valo 			if ((scan_ch->type & 1) && n_probes)
15817ac9a364SKalle Valo 				scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
15827ac9a364SKalle Valo 		}
15837ac9a364SKalle Valo 
15847ac9a364SKalle Valo 		/* Set txpower levels to defaults */
15857ac9a364SKalle Valo 		scan_ch->tpc.dsp_atten = 110;
15867ac9a364SKalle Valo 		/* scan_pwr_info->tpc.dsp_atten; */
15877ac9a364SKalle Valo 
15887ac9a364SKalle Valo 		/*scan_pwr_info->tpc.tx_gain; */
158957fbcce3SJohannes Berg 		if (band == NL80211_BAND_5GHZ)
15907ac9a364SKalle Valo 			scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
15917ac9a364SKalle Valo 		else {
15927ac9a364SKalle Valo 			scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
15937ac9a364SKalle Valo 			/* NOTE: if we were doing 6Mb OFDM for scans we'd use
15947ac9a364SKalle Valo 			 * power level:
15957ac9a364SKalle Valo 			 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
15967ac9a364SKalle Valo 			 */
15977ac9a364SKalle Valo 		}
15987ac9a364SKalle Valo 
15997ac9a364SKalle Valo 		D_SCAN("Scanning %d [%s %d]\n", scan_ch->channel,
16007ac9a364SKalle Valo 		       (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
16017ac9a364SKalle Valo 		       (scan_ch->type & 1) ? active_dwell : passive_dwell);
16027ac9a364SKalle Valo 
16037ac9a364SKalle Valo 		scan_ch++;
16047ac9a364SKalle Valo 		added++;
16057ac9a364SKalle Valo 	}
16067ac9a364SKalle Valo 
16077ac9a364SKalle Valo 	D_SCAN("total channels to scan %d\n", added);
16087ac9a364SKalle Valo 	return added;
16097ac9a364SKalle Valo }
16107ac9a364SKalle Valo 
16117ac9a364SKalle Valo static void
il3945_init_hw_rates(struct il_priv * il,struct ieee80211_rate * rates)16127ac9a364SKalle Valo il3945_init_hw_rates(struct il_priv *il, struct ieee80211_rate *rates)
16137ac9a364SKalle Valo {
16147ac9a364SKalle Valo 	int i;
16157ac9a364SKalle Valo 
16167ac9a364SKalle Valo 	for (i = 0; i < RATE_COUNT_LEGACY; i++) {
16177ac9a364SKalle Valo 		rates[i].bitrate = il3945_rates[i].ieee * 5;
16187ac9a364SKalle Valo 		rates[i].hw_value = i;	/* Rate scaling will work on idxes */
16197ac9a364SKalle Valo 		rates[i].hw_value_short = i;
16207ac9a364SKalle Valo 		rates[i].flags = 0;
16217ac9a364SKalle Valo 		if (i > IL39_LAST_OFDM_RATE || i < IL_FIRST_OFDM_RATE) {
16227ac9a364SKalle Valo 			/*
16237ac9a364SKalle Valo 			 * If CCK != 1M then set short preamble rate flag.
16247ac9a364SKalle Valo 			 */
16257ac9a364SKalle Valo 			rates[i].flags |=
16267ac9a364SKalle Valo 			    (il3945_rates[i].plcp ==
16277ac9a364SKalle Valo 			     10) ? 0 : IEEE80211_RATE_SHORT_PREAMBLE;
16287ac9a364SKalle Valo 		}
16297ac9a364SKalle Valo 	}
16307ac9a364SKalle Valo }
16317ac9a364SKalle Valo 
16327ac9a364SKalle Valo /******************************************************************************
16337ac9a364SKalle Valo  *
16347ac9a364SKalle Valo  * uCode download functions
16357ac9a364SKalle Valo  *
16367ac9a364SKalle Valo  ******************************************************************************/
16377ac9a364SKalle Valo 
16387ac9a364SKalle Valo static void
il3945_dealloc_ucode_pci(struct il_priv * il)16397ac9a364SKalle Valo il3945_dealloc_ucode_pci(struct il_priv *il)
16407ac9a364SKalle Valo {
16417ac9a364SKalle Valo 	il_free_fw_desc(il->pci_dev, &il->ucode_code);
16427ac9a364SKalle Valo 	il_free_fw_desc(il->pci_dev, &il->ucode_data);
16437ac9a364SKalle Valo 	il_free_fw_desc(il->pci_dev, &il->ucode_data_backup);
16447ac9a364SKalle Valo 	il_free_fw_desc(il->pci_dev, &il->ucode_init);
16457ac9a364SKalle Valo 	il_free_fw_desc(il->pci_dev, &il->ucode_init_data);
16467ac9a364SKalle Valo 	il_free_fw_desc(il->pci_dev, &il->ucode_boot);
16477ac9a364SKalle Valo }
16487ac9a364SKalle Valo 
1649dd13d6dcSLee Jones /*
16507ac9a364SKalle Valo  * il3945_verify_inst_full - verify runtime uCode image in card vs. host,
16517ac9a364SKalle Valo  *     looking at all data.
16527ac9a364SKalle Valo  */
16537ac9a364SKalle Valo static int
il3945_verify_inst_full(struct il_priv * il,__le32 * image,u32 len)16547ac9a364SKalle Valo il3945_verify_inst_full(struct il_priv *il, __le32 * image, u32 len)
16557ac9a364SKalle Valo {
16567ac9a364SKalle Valo 	u32 val;
16577ac9a364SKalle Valo 	u32 save_len = len;
16587ac9a364SKalle Valo 	int rc = 0;
16597ac9a364SKalle Valo 	u32 errcnt;
16607ac9a364SKalle Valo 
16617ac9a364SKalle Valo 	D_INFO("ucode inst image size is %u\n", len);
16627ac9a364SKalle Valo 
16637ac9a364SKalle Valo 	il_wr(il, HBUS_TARG_MEM_RADDR, IL39_RTC_INST_LOWER_BOUND);
16647ac9a364SKalle Valo 
16657ac9a364SKalle Valo 	errcnt = 0;
16667ac9a364SKalle Valo 	for (; len > 0; len -= sizeof(u32), image++) {
16677ac9a364SKalle Valo 		/* read data comes through single port, auto-incr addr */
16687ac9a364SKalle Valo 		/* NOTE: Use the debugless read so we don't flood kernel log
16697ac9a364SKalle Valo 		 * if IL_DL_IO is set */
16707ac9a364SKalle Valo 		val = _il_rd(il, HBUS_TARG_MEM_RDAT);
16717ac9a364SKalle Valo 		if (val != le32_to_cpu(*image)) {
16727ac9a364SKalle Valo 			IL_ERR("uCode INST section is invalid at "
16737ac9a364SKalle Valo 			       "offset 0x%x, is 0x%x, s/b 0x%x\n",
16747ac9a364SKalle Valo 			       save_len - len, val, le32_to_cpu(*image));
16757ac9a364SKalle Valo 			rc = -EIO;
16767ac9a364SKalle Valo 			errcnt++;
16777ac9a364SKalle Valo 			if (errcnt >= 20)
16787ac9a364SKalle Valo 				break;
16797ac9a364SKalle Valo 		}
16807ac9a364SKalle Valo 	}
16817ac9a364SKalle Valo 
16827ac9a364SKalle Valo 	if (!errcnt)
16837ac9a364SKalle Valo 		D_INFO("ucode image in INSTRUCTION memory is good\n");
16847ac9a364SKalle Valo 
16857ac9a364SKalle Valo 	return rc;
16867ac9a364SKalle Valo }
16877ac9a364SKalle Valo 
1688dd13d6dcSLee Jones /*
16897ac9a364SKalle Valo  * il3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
16907ac9a364SKalle Valo  *   using sample data 100 bytes apart.  If these sample points are good,
16917ac9a364SKalle Valo  *   it's a pretty good bet that everything between them is good, too.
16927ac9a364SKalle Valo  */
16937ac9a364SKalle Valo static int
il3945_verify_inst_sparse(struct il_priv * il,__le32 * image,u32 len)16947ac9a364SKalle Valo il3945_verify_inst_sparse(struct il_priv *il, __le32 * image, u32 len)
16957ac9a364SKalle Valo {
16967ac9a364SKalle Valo 	u32 val;
16977ac9a364SKalle Valo 	int rc = 0;
16987ac9a364SKalle Valo 	u32 errcnt = 0;
16997ac9a364SKalle Valo 	u32 i;
17007ac9a364SKalle Valo 
17017ac9a364SKalle Valo 	D_INFO("ucode inst image size is %u\n", len);
17027ac9a364SKalle Valo 
17037ac9a364SKalle Valo 	for (i = 0; i < len; i += 100, image += 100 / sizeof(u32)) {
17047ac9a364SKalle Valo 		/* read data comes through single port, auto-incr addr */
17057ac9a364SKalle Valo 		/* NOTE: Use the debugless read so we don't flood kernel log
17067ac9a364SKalle Valo 		 * if IL_DL_IO is set */
17077ac9a364SKalle Valo 		il_wr(il, HBUS_TARG_MEM_RADDR, i + IL39_RTC_INST_LOWER_BOUND);
17087ac9a364SKalle Valo 		val = _il_rd(il, HBUS_TARG_MEM_RDAT);
17097ac9a364SKalle Valo 		if (val != le32_to_cpu(*image)) {
17107ac9a364SKalle Valo #if 0				/* Enable this if you want to see details */
17117ac9a364SKalle Valo 			IL_ERR("uCode INST section is invalid at "
17127ac9a364SKalle Valo 			       "offset 0x%x, is 0x%x, s/b 0x%x\n", i, val,
17137ac9a364SKalle Valo 			       *image);
17147ac9a364SKalle Valo #endif
17157ac9a364SKalle Valo 			rc = -EIO;
17167ac9a364SKalle Valo 			errcnt++;
17177ac9a364SKalle Valo 			if (errcnt >= 3)
17187ac9a364SKalle Valo 				break;
17197ac9a364SKalle Valo 		}
17207ac9a364SKalle Valo 	}
17217ac9a364SKalle Valo 
17227ac9a364SKalle Valo 	return rc;
17237ac9a364SKalle Valo }
17247ac9a364SKalle Valo 
1725dd13d6dcSLee Jones /*
17267ac9a364SKalle Valo  * il3945_verify_ucode - determine which instruction image is in SRAM,
17277ac9a364SKalle Valo  *    and verify its contents
17287ac9a364SKalle Valo  */
17297ac9a364SKalle Valo static int
il3945_verify_ucode(struct il_priv * il)17307ac9a364SKalle Valo il3945_verify_ucode(struct il_priv *il)
17317ac9a364SKalle Valo {
17327ac9a364SKalle Valo 	__le32 *image;
17337ac9a364SKalle Valo 	u32 len;
17347ac9a364SKalle Valo 	int rc = 0;
17357ac9a364SKalle Valo 
17367ac9a364SKalle Valo 	/* Try bootstrap */
17377ac9a364SKalle Valo 	image = (__le32 *) il->ucode_boot.v_addr;
17387ac9a364SKalle Valo 	len = il->ucode_boot.len;
17397ac9a364SKalle Valo 	rc = il3945_verify_inst_sparse(il, image, len);
17407ac9a364SKalle Valo 	if (rc == 0) {
17417ac9a364SKalle Valo 		D_INFO("Bootstrap uCode is good in inst SRAM\n");
17427ac9a364SKalle Valo 		return 0;
17437ac9a364SKalle Valo 	}
17447ac9a364SKalle Valo 
17457ac9a364SKalle Valo 	/* Try initialize */
17467ac9a364SKalle Valo 	image = (__le32 *) il->ucode_init.v_addr;
17477ac9a364SKalle Valo 	len = il->ucode_init.len;
17487ac9a364SKalle Valo 	rc = il3945_verify_inst_sparse(il, image, len);
17497ac9a364SKalle Valo 	if (rc == 0) {
17507ac9a364SKalle Valo 		D_INFO("Initialize uCode is good in inst SRAM\n");
17517ac9a364SKalle Valo 		return 0;
17527ac9a364SKalle Valo 	}
17537ac9a364SKalle Valo 
17547ac9a364SKalle Valo 	/* Try runtime/protocol */
17557ac9a364SKalle Valo 	image = (__le32 *) il->ucode_code.v_addr;
17567ac9a364SKalle Valo 	len = il->ucode_code.len;
17577ac9a364SKalle Valo 	rc = il3945_verify_inst_sparse(il, image, len);
17587ac9a364SKalle Valo 	if (rc == 0) {
17597ac9a364SKalle Valo 		D_INFO("Runtime uCode is good in inst SRAM\n");
17607ac9a364SKalle Valo 		return 0;
17617ac9a364SKalle Valo 	}
17627ac9a364SKalle Valo 
17637ac9a364SKalle Valo 	IL_ERR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
17647ac9a364SKalle Valo 
17657ac9a364SKalle Valo 	/* Since nothing seems to match, show first several data entries in
17667ac9a364SKalle Valo 	 * instruction SRAM, so maybe visual inspection will give a clue.
17677ac9a364SKalle Valo 	 * Selection of bootstrap image (vs. other images) is arbitrary. */
17687ac9a364SKalle Valo 	image = (__le32 *) il->ucode_boot.v_addr;
17697ac9a364SKalle Valo 	len = il->ucode_boot.len;
17707ac9a364SKalle Valo 	rc = il3945_verify_inst_full(il, image, len);
17717ac9a364SKalle Valo 
17727ac9a364SKalle Valo 	return rc;
17737ac9a364SKalle Valo }
17747ac9a364SKalle Valo 
17757ac9a364SKalle Valo static void
il3945_nic_start(struct il_priv * il)17767ac9a364SKalle Valo il3945_nic_start(struct il_priv *il)
17777ac9a364SKalle Valo {
17787ac9a364SKalle Valo 	/* Remove all resets to allow NIC to operate */
17797ac9a364SKalle Valo 	_il_wr(il, CSR_RESET, 0);
17807ac9a364SKalle Valo }
17817ac9a364SKalle Valo 
17827ac9a364SKalle Valo #define IL3945_UCODE_GET(item)						\
17837ac9a364SKalle Valo static u32 il3945_ucode_get_##item(const struct il_ucode_header *ucode)\
17847ac9a364SKalle Valo {									\
17857ac9a364SKalle Valo 	return le32_to_cpu(ucode->v1.item);				\
17867ac9a364SKalle Valo }
17877ac9a364SKalle Valo 
17887ac9a364SKalle Valo static u32
il3945_ucode_get_header_size(u32 api_ver)17897ac9a364SKalle Valo il3945_ucode_get_header_size(u32 api_ver)
17907ac9a364SKalle Valo {
17917ac9a364SKalle Valo 	return 24;
17927ac9a364SKalle Valo }
17937ac9a364SKalle Valo 
17947ac9a364SKalle Valo static u8 *
il3945_ucode_get_data(const struct il_ucode_header * ucode)17957ac9a364SKalle Valo il3945_ucode_get_data(const struct il_ucode_header *ucode)
17967ac9a364SKalle Valo {
17977ac9a364SKalle Valo 	return (u8 *) ucode->v1.data;
17987ac9a364SKalle Valo }
17997ac9a364SKalle Valo 
18007ac9a364SKalle Valo IL3945_UCODE_GET(inst_size);
18017ac9a364SKalle Valo IL3945_UCODE_GET(data_size);
18027ac9a364SKalle Valo IL3945_UCODE_GET(init_size);
18037ac9a364SKalle Valo IL3945_UCODE_GET(init_data_size);
18047ac9a364SKalle Valo IL3945_UCODE_GET(boot_size);
18057ac9a364SKalle Valo 
1806dd13d6dcSLee Jones /*
18077ac9a364SKalle Valo  * il3945_read_ucode - Read uCode images from disk file.
18087ac9a364SKalle Valo  *
18097ac9a364SKalle Valo  * Copy into buffers for card to fetch via bus-mastering
18107ac9a364SKalle Valo  */
18117ac9a364SKalle Valo static int
il3945_read_ucode(struct il_priv * il)18127ac9a364SKalle Valo il3945_read_ucode(struct il_priv *il)
18137ac9a364SKalle Valo {
18147ac9a364SKalle Valo 	const struct il_ucode_header *ucode;
18157ac9a364SKalle Valo 	int ret = -EINVAL, idx;
18167ac9a364SKalle Valo 	const struct firmware *ucode_raw;
18177ac9a364SKalle Valo 	/* firmware file name contains uCode/driver compatibility version */
18187ac9a364SKalle Valo 	const char *name_pre = il->cfg->fw_name_pre;
18197ac9a364SKalle Valo 	const unsigned int api_max = il->cfg->ucode_api_max;
18207ac9a364SKalle Valo 	const unsigned int api_min = il->cfg->ucode_api_min;
18217ac9a364SKalle Valo 	char buf[25];
18227ac9a364SKalle Valo 	u8 *src;
18237ac9a364SKalle Valo 	size_t len;
18247ac9a364SKalle Valo 	u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
18257ac9a364SKalle Valo 
18267ac9a364SKalle Valo 	/* Ask kernel firmware_class module to get the boot firmware off disk.
18277ac9a364SKalle Valo 	 * request_firmware() is synchronous, file is in memory on return. */
18287ac9a364SKalle Valo 	for (idx = api_max; idx >= api_min; idx--) {
18297ac9a364SKalle Valo 		sprintf(buf, "%s%u%s", name_pre, idx, ".ucode");
18307ac9a364SKalle Valo 		ret = request_firmware(&ucode_raw, buf, &il->pci_dev->dev);
18317ac9a364SKalle Valo 		if (ret < 0) {
18327ac9a364SKalle Valo 			IL_ERR("%s firmware file req failed: %d\n", buf, ret);
18337ac9a364SKalle Valo 			if (ret == -ENOENT)
18347ac9a364SKalle Valo 				continue;
18357ac9a364SKalle Valo 			else
18367ac9a364SKalle Valo 				goto error;
18377ac9a364SKalle Valo 		} else {
18387ac9a364SKalle Valo 			if (idx < api_max)
18397ac9a364SKalle Valo 				IL_ERR("Loaded firmware %s, "
18407ac9a364SKalle Valo 				       "which is deprecated. "
18417ac9a364SKalle Valo 				       " Please use API v%u instead.\n", buf,
18427ac9a364SKalle Valo 				       api_max);
18437ac9a364SKalle Valo 			D_INFO("Got firmware '%s' file "
18447ac9a364SKalle Valo 			       "(%zd bytes) from disk\n", buf, ucode_raw->size);
18457ac9a364SKalle Valo 			break;
18467ac9a364SKalle Valo 		}
18477ac9a364SKalle Valo 	}
18487ac9a364SKalle Valo 
18497ac9a364SKalle Valo 	if (ret < 0)
18507ac9a364SKalle Valo 		goto error;
18517ac9a364SKalle Valo 
18527ac9a364SKalle Valo 	/* Make sure that we got at least our header! */
18537ac9a364SKalle Valo 	if (ucode_raw->size < il3945_ucode_get_header_size(1)) {
18547ac9a364SKalle Valo 		IL_ERR("File size way too small!\n");
18557ac9a364SKalle Valo 		ret = -EINVAL;
18567ac9a364SKalle Valo 		goto err_release;
18577ac9a364SKalle Valo 	}
18587ac9a364SKalle Valo 
18597ac9a364SKalle Valo 	/* Data from ucode file:  header followed by uCode images */
18607ac9a364SKalle Valo 	ucode = (struct il_ucode_header *)ucode_raw->data;
18617ac9a364SKalle Valo 
18627ac9a364SKalle Valo 	il->ucode_ver = le32_to_cpu(ucode->ver);
18637ac9a364SKalle Valo 	api_ver = IL_UCODE_API(il->ucode_ver);
18647ac9a364SKalle Valo 	inst_size = il3945_ucode_get_inst_size(ucode);
18657ac9a364SKalle Valo 	data_size = il3945_ucode_get_data_size(ucode);
18667ac9a364SKalle Valo 	init_size = il3945_ucode_get_init_size(ucode);
18677ac9a364SKalle Valo 	init_data_size = il3945_ucode_get_init_data_size(ucode);
18687ac9a364SKalle Valo 	boot_size = il3945_ucode_get_boot_size(ucode);
18697ac9a364SKalle Valo 	src = il3945_ucode_get_data(ucode);
18707ac9a364SKalle Valo 
18717ac9a364SKalle Valo 	/* api_ver should match the api version forming part of the
18727ac9a364SKalle Valo 	 * firmware filename ... but we don't check for that and only rely
18737ac9a364SKalle Valo 	 * on the API version read from firmware header from here on forward */
18747ac9a364SKalle Valo 
18757ac9a364SKalle Valo 	if (api_ver < api_min || api_ver > api_max) {
18767ac9a364SKalle Valo 		IL_ERR("Driver unable to support your firmware API. "
18777ac9a364SKalle Valo 		       "Driver supports v%u, firmware is v%u.\n", api_max,
18787ac9a364SKalle Valo 		       api_ver);
18797ac9a364SKalle Valo 		il->ucode_ver = 0;
18807ac9a364SKalle Valo 		ret = -EINVAL;
18817ac9a364SKalle Valo 		goto err_release;
18827ac9a364SKalle Valo 	}
18837ac9a364SKalle Valo 	if (api_ver != api_max)
18847ac9a364SKalle Valo 		IL_ERR("Firmware has old API version. Expected %u, "
18857ac9a364SKalle Valo 		       "got %u. New firmware can be obtained "
18867ac9a364SKalle Valo 		       "from http://www.intellinuxwireless.org.\n", api_max,
18877ac9a364SKalle Valo 		       api_ver);
18887ac9a364SKalle Valo 
18897ac9a364SKalle Valo 	IL_INFO("loaded firmware version %u.%u.%u.%u\n",
18907ac9a364SKalle Valo 		IL_UCODE_MAJOR(il->ucode_ver), IL_UCODE_MINOR(il->ucode_ver),
18917ac9a364SKalle Valo 		IL_UCODE_API(il->ucode_ver), IL_UCODE_SERIAL(il->ucode_ver));
18927ac9a364SKalle Valo 
18937ac9a364SKalle Valo 	snprintf(il->hw->wiphy->fw_version, sizeof(il->hw->wiphy->fw_version),
18947ac9a364SKalle Valo 		 "%u.%u.%u.%u", IL_UCODE_MAJOR(il->ucode_ver),
18957ac9a364SKalle Valo 		 IL_UCODE_MINOR(il->ucode_ver), IL_UCODE_API(il->ucode_ver),
18967ac9a364SKalle Valo 		 IL_UCODE_SERIAL(il->ucode_ver));
18977ac9a364SKalle Valo 
18987ac9a364SKalle Valo 	D_INFO("f/w package hdr ucode version raw = 0x%x\n", il->ucode_ver);
18997ac9a364SKalle Valo 	D_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
19007ac9a364SKalle Valo 	D_INFO("f/w package hdr runtime data size = %u\n", data_size);
19017ac9a364SKalle Valo 	D_INFO("f/w package hdr init inst size = %u\n", init_size);
19027ac9a364SKalle Valo 	D_INFO("f/w package hdr init data size = %u\n", init_data_size);
19037ac9a364SKalle Valo 	D_INFO("f/w package hdr boot inst size = %u\n", boot_size);
19047ac9a364SKalle Valo 
19057ac9a364SKalle Valo 	/* Verify size of file vs. image size info in file's header */
19067ac9a364SKalle Valo 	if (ucode_raw->size !=
19077ac9a364SKalle Valo 	    il3945_ucode_get_header_size(api_ver) + inst_size + data_size +
19087ac9a364SKalle Valo 	    init_size + init_data_size + boot_size) {
19097ac9a364SKalle Valo 
19107ac9a364SKalle Valo 		D_INFO("uCode file size %zd does not match expected size\n",
19117ac9a364SKalle Valo 		       ucode_raw->size);
19127ac9a364SKalle Valo 		ret = -EINVAL;
19137ac9a364SKalle Valo 		goto err_release;
19147ac9a364SKalle Valo 	}
19157ac9a364SKalle Valo 
19167ac9a364SKalle Valo 	/* Verify that uCode images will fit in card's SRAM */
19177ac9a364SKalle Valo 	if (inst_size > IL39_MAX_INST_SIZE) {
19187ac9a364SKalle Valo 		D_INFO("uCode instr len %d too large to fit in\n", inst_size);
19197ac9a364SKalle Valo 		ret = -EINVAL;
19207ac9a364SKalle Valo 		goto err_release;
19217ac9a364SKalle Valo 	}
19227ac9a364SKalle Valo 
19237ac9a364SKalle Valo 	if (data_size > IL39_MAX_DATA_SIZE) {
19247ac9a364SKalle Valo 		D_INFO("uCode data len %d too large to fit in\n", data_size);
19257ac9a364SKalle Valo 		ret = -EINVAL;
19267ac9a364SKalle Valo 		goto err_release;
19277ac9a364SKalle Valo 	}
19287ac9a364SKalle Valo 	if (init_size > IL39_MAX_INST_SIZE) {
19297ac9a364SKalle Valo 		D_INFO("uCode init instr len %d too large to fit in\n",
19307ac9a364SKalle Valo 		       init_size);
19317ac9a364SKalle Valo 		ret = -EINVAL;
19327ac9a364SKalle Valo 		goto err_release;
19337ac9a364SKalle Valo 	}
19347ac9a364SKalle Valo 	if (init_data_size > IL39_MAX_DATA_SIZE) {
19357ac9a364SKalle Valo 		D_INFO("uCode init data len %d too large to fit in\n",
19367ac9a364SKalle Valo 		       init_data_size);
19377ac9a364SKalle Valo 		ret = -EINVAL;
19387ac9a364SKalle Valo 		goto err_release;
19397ac9a364SKalle Valo 	}
19407ac9a364SKalle Valo 	if (boot_size > IL39_MAX_BSM_SIZE) {
19417ac9a364SKalle Valo 		D_INFO("uCode boot instr len %d too large to fit in\n",
19427ac9a364SKalle Valo 		       boot_size);
19437ac9a364SKalle Valo 		ret = -EINVAL;
19447ac9a364SKalle Valo 		goto err_release;
19457ac9a364SKalle Valo 	}
19467ac9a364SKalle Valo 
19477ac9a364SKalle Valo 	/* Allocate ucode buffers for card's bus-master loading ... */
19487ac9a364SKalle Valo 
19497ac9a364SKalle Valo 	/* Runtime instructions and 2 copies of data:
19507ac9a364SKalle Valo 	 * 1) unmodified from disk
19517ac9a364SKalle Valo 	 * 2) backup cache for save/restore during power-downs */
19527ac9a364SKalle Valo 	il->ucode_code.len = inst_size;
19537ac9a364SKalle Valo 	il_alloc_fw_desc(il->pci_dev, &il->ucode_code);
19547ac9a364SKalle Valo 
19557ac9a364SKalle Valo 	il->ucode_data.len = data_size;
19567ac9a364SKalle Valo 	il_alloc_fw_desc(il->pci_dev, &il->ucode_data);
19577ac9a364SKalle Valo 
19587ac9a364SKalle Valo 	il->ucode_data_backup.len = data_size;
19597ac9a364SKalle Valo 	il_alloc_fw_desc(il->pci_dev, &il->ucode_data_backup);
19607ac9a364SKalle Valo 
19617ac9a364SKalle Valo 	if (!il->ucode_code.v_addr || !il->ucode_data.v_addr ||
19627ac9a364SKalle Valo 	    !il->ucode_data_backup.v_addr)
19637ac9a364SKalle Valo 		goto err_pci_alloc;
19647ac9a364SKalle Valo 
19657ac9a364SKalle Valo 	/* Initialization instructions and data */
19667ac9a364SKalle Valo 	if (init_size && init_data_size) {
19677ac9a364SKalle Valo 		il->ucode_init.len = init_size;
19687ac9a364SKalle Valo 		il_alloc_fw_desc(il->pci_dev, &il->ucode_init);
19697ac9a364SKalle Valo 
19707ac9a364SKalle Valo 		il->ucode_init_data.len = init_data_size;
19717ac9a364SKalle Valo 		il_alloc_fw_desc(il->pci_dev, &il->ucode_init_data);
19727ac9a364SKalle Valo 
19737ac9a364SKalle Valo 		if (!il->ucode_init.v_addr || !il->ucode_init_data.v_addr)
19747ac9a364SKalle Valo 			goto err_pci_alloc;
19757ac9a364SKalle Valo 	}
19767ac9a364SKalle Valo 
19777ac9a364SKalle Valo 	/* Bootstrap (instructions only, no data) */
19787ac9a364SKalle Valo 	if (boot_size) {
19797ac9a364SKalle Valo 		il->ucode_boot.len = boot_size;
19807ac9a364SKalle Valo 		il_alloc_fw_desc(il->pci_dev, &il->ucode_boot);
19817ac9a364SKalle Valo 
19827ac9a364SKalle Valo 		if (!il->ucode_boot.v_addr)
19837ac9a364SKalle Valo 			goto err_pci_alloc;
19847ac9a364SKalle Valo 	}
19857ac9a364SKalle Valo 
19867ac9a364SKalle Valo 	/* Copy images into buffers for card's bus-master reads ... */
19877ac9a364SKalle Valo 
19887ac9a364SKalle Valo 	/* Runtime instructions (first block of data in file) */
19897ac9a364SKalle Valo 	len = inst_size;
19907ac9a364SKalle Valo 	D_INFO("Copying (but not loading) uCode instr len %zd\n", len);
19917ac9a364SKalle Valo 	memcpy(il->ucode_code.v_addr, src, len);
19927ac9a364SKalle Valo 	src += len;
19937ac9a364SKalle Valo 
19947ac9a364SKalle Valo 	D_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
19957ac9a364SKalle Valo 	       il->ucode_code.v_addr, (u32) il->ucode_code.p_addr);
19967ac9a364SKalle Valo 
19977ac9a364SKalle Valo 	/* Runtime data (2nd block)
19987ac9a364SKalle Valo 	 * NOTE:  Copy into backup buffer will be done in il3945_up()  */
19997ac9a364SKalle Valo 	len = data_size;
20007ac9a364SKalle Valo 	D_INFO("Copying (but not loading) uCode data len %zd\n", len);
20017ac9a364SKalle Valo 	memcpy(il->ucode_data.v_addr, src, len);
20027ac9a364SKalle Valo 	memcpy(il->ucode_data_backup.v_addr, src, len);
20037ac9a364SKalle Valo 	src += len;
20047ac9a364SKalle Valo 
20057ac9a364SKalle Valo 	/* Initialization instructions (3rd block) */
20067ac9a364SKalle Valo 	if (init_size) {
20077ac9a364SKalle Valo 		len = init_size;
20087ac9a364SKalle Valo 		D_INFO("Copying (but not loading) init instr len %zd\n", len);
20097ac9a364SKalle Valo 		memcpy(il->ucode_init.v_addr, src, len);
20107ac9a364SKalle Valo 		src += len;
20117ac9a364SKalle Valo 	}
20127ac9a364SKalle Valo 
20137ac9a364SKalle Valo 	/* Initialization data (4th block) */
20147ac9a364SKalle Valo 	if (init_data_size) {
20157ac9a364SKalle Valo 		len = init_data_size;
20167ac9a364SKalle Valo 		D_INFO("Copying (but not loading) init data len %zd\n", len);
20177ac9a364SKalle Valo 		memcpy(il->ucode_init_data.v_addr, src, len);
20187ac9a364SKalle Valo 		src += len;
20197ac9a364SKalle Valo 	}
20207ac9a364SKalle Valo 
20217ac9a364SKalle Valo 	/* Bootstrap instructions (5th block) */
20227ac9a364SKalle Valo 	len = boot_size;
20237ac9a364SKalle Valo 	D_INFO("Copying (but not loading) boot instr len %zd\n", len);
20247ac9a364SKalle Valo 	memcpy(il->ucode_boot.v_addr, src, len);
20257ac9a364SKalle Valo 
20267ac9a364SKalle Valo 	/* We have our copies now, allow OS release its copies */
20277ac9a364SKalle Valo 	release_firmware(ucode_raw);
20287ac9a364SKalle Valo 	return 0;
20297ac9a364SKalle Valo 
20307ac9a364SKalle Valo err_pci_alloc:
20317ac9a364SKalle Valo 	IL_ERR("failed to allocate pci memory\n");
20327ac9a364SKalle Valo 	ret = -ENOMEM;
20337ac9a364SKalle Valo 	il3945_dealloc_ucode_pci(il);
20347ac9a364SKalle Valo 
20357ac9a364SKalle Valo err_release:
20367ac9a364SKalle Valo 	release_firmware(ucode_raw);
20377ac9a364SKalle Valo 
20387ac9a364SKalle Valo error:
20397ac9a364SKalle Valo 	return ret;
20407ac9a364SKalle Valo }
20417ac9a364SKalle Valo 
2042dd13d6dcSLee Jones /*
20437ac9a364SKalle Valo  * il3945_set_ucode_ptrs - Set uCode address location
20447ac9a364SKalle Valo  *
20457ac9a364SKalle Valo  * Tell initialization uCode where to find runtime uCode.
20467ac9a364SKalle Valo  *
20477ac9a364SKalle Valo  * BSM registers initially contain pointers to initialization uCode.
20487ac9a364SKalle Valo  * We need to replace them to load runtime uCode inst and data,
20497ac9a364SKalle Valo  * and to save runtime data when powering down.
20507ac9a364SKalle Valo  */
20517ac9a364SKalle Valo static int
il3945_set_ucode_ptrs(struct il_priv * il)20527ac9a364SKalle Valo il3945_set_ucode_ptrs(struct il_priv *il)
20537ac9a364SKalle Valo {
20547ac9a364SKalle Valo 	dma_addr_t pinst;
20557ac9a364SKalle Valo 	dma_addr_t pdata;
20567ac9a364SKalle Valo 
20577ac9a364SKalle Valo 	/* bits 31:0 for 3945 */
20587ac9a364SKalle Valo 	pinst = il->ucode_code.p_addr;
20597ac9a364SKalle Valo 	pdata = il->ucode_data_backup.p_addr;
20607ac9a364SKalle Valo 
20617ac9a364SKalle Valo 	/* Tell bootstrap uCode where to find image to load */
20627ac9a364SKalle Valo 	il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
20637ac9a364SKalle Valo 	il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
20647ac9a364SKalle Valo 	il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, il->ucode_data.len);
20657ac9a364SKalle Valo 
20667ac9a364SKalle Valo 	/* Inst byte count must be last to set up, bit 31 signals uCode
20677ac9a364SKalle Valo 	 *   that all new ptr/size info is in place */
20687ac9a364SKalle Valo 	il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG,
20697ac9a364SKalle Valo 		   il->ucode_code.len | BSM_DRAM_INST_LOAD);
20707ac9a364SKalle Valo 
20717ac9a364SKalle Valo 	D_INFO("Runtime uCode pointers are set.\n");
20727ac9a364SKalle Valo 
20737ac9a364SKalle Valo 	return 0;
20747ac9a364SKalle Valo }
20757ac9a364SKalle Valo 
2076dd13d6dcSLee Jones /*
20777ac9a364SKalle Valo  * il3945_init_alive_start - Called after N_ALIVE notification received
20787ac9a364SKalle Valo  *
20797ac9a364SKalle Valo  * Called after N_ALIVE notification received from "initialize" uCode.
20807ac9a364SKalle Valo  *
20817ac9a364SKalle Valo  * Tell "initialize" uCode to go ahead and load the runtime uCode.
20827ac9a364SKalle Valo  */
20837ac9a364SKalle Valo static void
il3945_init_alive_start(struct il_priv * il)20847ac9a364SKalle Valo il3945_init_alive_start(struct il_priv *il)
20857ac9a364SKalle Valo {
20867ac9a364SKalle Valo 	/* Check alive response for "valid" sign from uCode */
20877ac9a364SKalle Valo 	if (il->card_alive_init.is_valid != UCODE_VALID_OK) {
20887ac9a364SKalle Valo 		/* We had an error bringing up the hardware, so take it
20897ac9a364SKalle Valo 		 * all the way back down so we can try again */
20907ac9a364SKalle Valo 		D_INFO("Initialize Alive failed.\n");
20917ac9a364SKalle Valo 		goto restart;
20927ac9a364SKalle Valo 	}
20937ac9a364SKalle Valo 
20947ac9a364SKalle Valo 	/* Bootstrap uCode has loaded initialize uCode ... verify inst image.
20957ac9a364SKalle Valo 	 * This is a paranoid check, because we would not have gotten the
20967ac9a364SKalle Valo 	 * "initialize" alive if code weren't properly loaded.  */
20977ac9a364SKalle Valo 	if (il3945_verify_ucode(il)) {
20987ac9a364SKalle Valo 		/* Runtime instruction load was bad;
20997ac9a364SKalle Valo 		 * take it all the way back down so we can try again */
21007ac9a364SKalle Valo 		D_INFO("Bad \"initialize\" uCode load.\n");
21017ac9a364SKalle Valo 		goto restart;
21027ac9a364SKalle Valo 	}
21037ac9a364SKalle Valo 
21047ac9a364SKalle Valo 	/* Send pointers to protocol/runtime uCode image ... init code will
21057ac9a364SKalle Valo 	 * load and launch runtime uCode, which will send us another "Alive"
21067ac9a364SKalle Valo 	 * notification. */
21077ac9a364SKalle Valo 	D_INFO("Initialization Alive received.\n");
21087ac9a364SKalle Valo 	if (il3945_set_ucode_ptrs(il)) {
21097ac9a364SKalle Valo 		/* Runtime instruction load won't happen;
21107ac9a364SKalle Valo 		 * take it all the way back down so we can try again */
21117ac9a364SKalle Valo 		D_INFO("Couldn't set up uCode pointers.\n");
21127ac9a364SKalle Valo 		goto restart;
21137ac9a364SKalle Valo 	}
21147ac9a364SKalle Valo 	return;
21157ac9a364SKalle Valo 
21167ac9a364SKalle Valo restart:
21177ac9a364SKalle Valo 	queue_work(il->workqueue, &il->restart);
21187ac9a364SKalle Valo }
21197ac9a364SKalle Valo 
2120dd13d6dcSLee Jones /*
21217ac9a364SKalle Valo  * il3945_alive_start - called after N_ALIVE notification received
21227ac9a364SKalle Valo  *                   from protocol/runtime uCode (initialization uCode's
21237ac9a364SKalle Valo  *                   Alive gets handled by il3945_init_alive_start()).
21247ac9a364SKalle Valo  */
21257ac9a364SKalle Valo static void
il3945_alive_start(struct il_priv * il)21267ac9a364SKalle Valo il3945_alive_start(struct il_priv *il)
21277ac9a364SKalle Valo {
21287ac9a364SKalle Valo 	int thermal_spin = 0;
21297ac9a364SKalle Valo 	u32 rfkill;
21307ac9a364SKalle Valo 
21317ac9a364SKalle Valo 	D_INFO("Runtime Alive received.\n");
21327ac9a364SKalle Valo 
21337ac9a364SKalle Valo 	if (il->card_alive.is_valid != UCODE_VALID_OK) {
21347ac9a364SKalle Valo 		/* We had an error bringing up the hardware, so take it
21357ac9a364SKalle Valo 		 * all the way back down so we can try again */
21367ac9a364SKalle Valo 		D_INFO("Alive failed.\n");
21377ac9a364SKalle Valo 		goto restart;
21387ac9a364SKalle Valo 	}
21397ac9a364SKalle Valo 
21407ac9a364SKalle Valo 	/* Initialize uCode has loaded Runtime uCode ... verify inst image.
21417ac9a364SKalle Valo 	 * This is a paranoid check, because we would not have gotten the
21427ac9a364SKalle Valo 	 * "runtime" alive if code weren't properly loaded.  */
21437ac9a364SKalle Valo 	if (il3945_verify_ucode(il)) {
21447ac9a364SKalle Valo 		/* Runtime instruction load was bad;
21457ac9a364SKalle Valo 		 * take it all the way back down so we can try again */
21467ac9a364SKalle Valo 		D_INFO("Bad runtime uCode load.\n");
21477ac9a364SKalle Valo 		goto restart;
21487ac9a364SKalle Valo 	}
21497ac9a364SKalle Valo 
21507ac9a364SKalle Valo 	rfkill = il_rd_prph(il, APMG_RFKILL_REG);
21517ac9a364SKalle Valo 	D_INFO("RFKILL status: 0x%x\n", rfkill);
21527ac9a364SKalle Valo 
21537ac9a364SKalle Valo 	if (rfkill & 0x1) {
21547ac9a364SKalle Valo 		clear_bit(S_RFKILL, &il->status);
21557ac9a364SKalle Valo 		/* if RFKILL is not on, then wait for thermal
21567ac9a364SKalle Valo 		 * sensor in adapter to kick in */
21577ac9a364SKalle Valo 		while (il3945_hw_get_temperature(il) == 0) {
21587ac9a364SKalle Valo 			thermal_spin++;
21597ac9a364SKalle Valo 			udelay(10);
21607ac9a364SKalle Valo 		}
21617ac9a364SKalle Valo 
21627ac9a364SKalle Valo 		if (thermal_spin)
21637ac9a364SKalle Valo 			D_INFO("Thermal calibration took %dus\n",
21647ac9a364SKalle Valo 			       thermal_spin * 10);
21657ac9a364SKalle Valo 	} else
21667ac9a364SKalle Valo 		set_bit(S_RFKILL, &il->status);
21677ac9a364SKalle Valo 
21687ac9a364SKalle Valo 	/* After the ALIVE response, we can send commands to 3945 uCode */
21697ac9a364SKalle Valo 	set_bit(S_ALIVE, &il->status);
21707ac9a364SKalle Valo 
21717ac9a364SKalle Valo 	/* Enable watchdog to monitor the driver tx queues */
21727ac9a364SKalle Valo 	il_setup_watchdog(il);
21737ac9a364SKalle Valo 
21747ac9a364SKalle Valo 	if (il_is_rfkill(il))
21757ac9a364SKalle Valo 		return;
21767ac9a364SKalle Valo 
21777ac9a364SKalle Valo 	ieee80211_wake_queues(il->hw);
21787ac9a364SKalle Valo 
21797ac9a364SKalle Valo 	il->active_rate = RATES_MASK_3945;
21807ac9a364SKalle Valo 
21817ac9a364SKalle Valo 	il_power_update_mode(il, true);
21827ac9a364SKalle Valo 
21837ac9a364SKalle Valo 	if (il_is_associated(il)) {
21847ac9a364SKalle Valo 		struct il3945_rxon_cmd *active_rxon =
21857ac9a364SKalle Valo 		    (struct il3945_rxon_cmd *)(&il->active);
21867ac9a364SKalle Valo 
21877ac9a364SKalle Valo 		il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
21887ac9a364SKalle Valo 		active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
21897ac9a364SKalle Valo 	} else {
21907ac9a364SKalle Valo 		/* Initialize our rx_config data */
21917ac9a364SKalle Valo 		il_connection_init_rx_config(il);
21927ac9a364SKalle Valo 	}
21937ac9a364SKalle Valo 
21947ac9a364SKalle Valo 	/* Configure Bluetooth device coexistence support */
21957ac9a364SKalle Valo 	il_send_bt_config(il);
21967ac9a364SKalle Valo 
21977ac9a364SKalle Valo 	set_bit(S_READY, &il->status);
21987ac9a364SKalle Valo 
21997ac9a364SKalle Valo 	/* Configure the adapter for unassociated operation */
22007ac9a364SKalle Valo 	il3945_commit_rxon(il);
22017ac9a364SKalle Valo 
22027ac9a364SKalle Valo 	il3945_reg_txpower_periodic(il);
22037ac9a364SKalle Valo 
22047ac9a364SKalle Valo 	D_INFO("ALIVE processing complete.\n");
22057ac9a364SKalle Valo 	wake_up(&il->wait_command_queue);
22067ac9a364SKalle Valo 
22077ac9a364SKalle Valo 	return;
22087ac9a364SKalle Valo 
22097ac9a364SKalle Valo restart:
22107ac9a364SKalle Valo 	queue_work(il->workqueue, &il->restart);
22117ac9a364SKalle Valo }
22127ac9a364SKalle Valo 
22137ac9a364SKalle Valo static void il3945_cancel_deferred_work(struct il_priv *il);
22147ac9a364SKalle Valo 
22157ac9a364SKalle Valo static void
__il3945_down(struct il_priv * il)22167ac9a364SKalle Valo __il3945_down(struct il_priv *il)
22177ac9a364SKalle Valo {
22187ac9a364SKalle Valo 	unsigned long flags;
22197ac9a364SKalle Valo 	int exit_pending;
22207ac9a364SKalle Valo 
22217ac9a364SKalle Valo 	D_INFO(DRV_NAME " is going down\n");
22227ac9a364SKalle Valo 
22237ac9a364SKalle Valo 	il_scan_cancel_timeout(il, 200);
22247ac9a364SKalle Valo 
22257ac9a364SKalle Valo 	exit_pending = test_and_set_bit(S_EXIT_PENDING, &il->status);
22267ac9a364SKalle Valo 
22277ac9a364SKalle Valo 	/* Stop TX queues watchdog. We need to have S_EXIT_PENDING bit set
22287ac9a364SKalle Valo 	 * to prevent rearm timer */
22297ac9a364SKalle Valo 	del_timer_sync(&il->watchdog);
22307ac9a364SKalle Valo 
22317ac9a364SKalle Valo 	/* Station information will now be cleared in device */
22327ac9a364SKalle Valo 	il_clear_ucode_stations(il);
22337ac9a364SKalle Valo 	il_dealloc_bcast_stations(il);
22347ac9a364SKalle Valo 	il_clear_driver_stations(il);
22357ac9a364SKalle Valo 
22367ac9a364SKalle Valo 	/* Unblock any waiting calls */
22377ac9a364SKalle Valo 	wake_up_all(&il->wait_command_queue);
22387ac9a364SKalle Valo 
22397ac9a364SKalle Valo 	/* Wipe out the EXIT_PENDING status bit if we are not actually
22407ac9a364SKalle Valo 	 * exiting the module */
22417ac9a364SKalle Valo 	if (!exit_pending)
22427ac9a364SKalle Valo 		clear_bit(S_EXIT_PENDING, &il->status);
22437ac9a364SKalle Valo 
22447ac9a364SKalle Valo 	/* stop and reset the on-board processor */
22457ac9a364SKalle Valo 	_il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
22467ac9a364SKalle Valo 
22477ac9a364SKalle Valo 	/* tell the device to stop sending interrupts */
22487ac9a364SKalle Valo 	spin_lock_irqsave(&il->lock, flags);
22497ac9a364SKalle Valo 	il_disable_interrupts(il);
22507ac9a364SKalle Valo 	spin_unlock_irqrestore(&il->lock, flags);
22517ac9a364SKalle Valo 	il3945_synchronize_irq(il);
22527ac9a364SKalle Valo 
22537ac9a364SKalle Valo 	if (il->mac80211_registered)
22547ac9a364SKalle Valo 		ieee80211_stop_queues(il->hw);
22557ac9a364SKalle Valo 
22567ac9a364SKalle Valo 	/* If we have not previously called il3945_init() then
22577ac9a364SKalle Valo 	 * clear all bits but the RF Kill bits and return */
22587ac9a364SKalle Valo 	if (!il_is_init(il)) {
22597ac9a364SKalle Valo 		il->status =
22607ac9a364SKalle Valo 		    test_bit(S_RFKILL, &il->status) << S_RFKILL |
22617ac9a364SKalle Valo 		    test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED |
22627ac9a364SKalle Valo 		    test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
22637ac9a364SKalle Valo 		goto exit;
22647ac9a364SKalle Valo 	}
22657ac9a364SKalle Valo 
22667ac9a364SKalle Valo 	/* ...otherwise clear out all the status bits but the RF Kill
22677ac9a364SKalle Valo 	 * bit and continue taking the NIC down. */
22687ac9a364SKalle Valo 	il->status &=
22697ac9a364SKalle Valo 	    test_bit(S_RFKILL, &il->status) << S_RFKILL |
22707ac9a364SKalle Valo 	    test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED |
22717ac9a364SKalle Valo 	    test_bit(S_FW_ERROR, &il->status) << S_FW_ERROR |
22727ac9a364SKalle Valo 	    test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
22737ac9a364SKalle Valo 
22747ac9a364SKalle Valo 	/*
22757ac9a364SKalle Valo 	 * We disabled and synchronized interrupt, and priv->mutex is taken, so
22767ac9a364SKalle Valo 	 * here is the only thread which will program device registers, but
22777ac9a364SKalle Valo 	 * still have lockdep assertions, so we are taking reg_lock.
22787ac9a364SKalle Valo 	 */
22797ac9a364SKalle Valo 	spin_lock_irq(&il->reg_lock);
22807ac9a364SKalle Valo 	/* FIXME: il_grab_nic_access if rfkill is off ? */
22817ac9a364SKalle Valo 
22827ac9a364SKalle Valo 	il3945_hw_txq_ctx_stop(il);
22837ac9a364SKalle Valo 	il3945_hw_rxq_stop(il);
22847ac9a364SKalle Valo 	/* Power-down device's busmaster DMA clocks */
22857ac9a364SKalle Valo 	_il_wr_prph(il, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
22867ac9a364SKalle Valo 	udelay(5);
22877ac9a364SKalle Valo 	/* Stop the device, and put it in low power state */
22887ac9a364SKalle Valo 	_il_apm_stop(il);
22897ac9a364SKalle Valo 
22907ac9a364SKalle Valo 	spin_unlock_irq(&il->reg_lock);
22917ac9a364SKalle Valo 
22927ac9a364SKalle Valo 	il3945_hw_txq_ctx_free(il);
22937ac9a364SKalle Valo exit:
22947ac9a364SKalle Valo 	memset(&il->card_alive, 0, sizeof(struct il_alive_resp));
22957ac9a364SKalle Valo 	dev_kfree_skb(il->beacon_skb);
22967ac9a364SKalle Valo 	il->beacon_skb = NULL;
22977ac9a364SKalle Valo 
22987ac9a364SKalle Valo 	/* clear out any free frames */
22997ac9a364SKalle Valo 	il3945_clear_free_frames(il);
23007ac9a364SKalle Valo }
23017ac9a364SKalle Valo 
23027ac9a364SKalle Valo static void
il3945_down(struct il_priv * il)23037ac9a364SKalle Valo il3945_down(struct il_priv *il)
23047ac9a364SKalle Valo {
23057ac9a364SKalle Valo 	mutex_lock(&il->mutex);
23067ac9a364SKalle Valo 	__il3945_down(il);
23077ac9a364SKalle Valo 	mutex_unlock(&il->mutex);
23087ac9a364SKalle Valo 
23097ac9a364SKalle Valo 	il3945_cancel_deferred_work(il);
23107ac9a364SKalle Valo }
23117ac9a364SKalle Valo 
23127ac9a364SKalle Valo #define MAX_HW_RESTARTS 5
23137ac9a364SKalle Valo 
23147ac9a364SKalle Valo static int
il3945_alloc_bcast_station(struct il_priv * il)23157ac9a364SKalle Valo il3945_alloc_bcast_station(struct il_priv *il)
23167ac9a364SKalle Valo {
23177ac9a364SKalle Valo 	unsigned long flags;
23187ac9a364SKalle Valo 	u8 sta_id;
23197ac9a364SKalle Valo 
23207ac9a364SKalle Valo 	spin_lock_irqsave(&il->sta_lock, flags);
23217ac9a364SKalle Valo 	sta_id = il_prep_station(il, il_bcast_addr, false, NULL);
23227ac9a364SKalle Valo 	if (sta_id == IL_INVALID_STATION) {
23237ac9a364SKalle Valo 		IL_ERR("Unable to prepare broadcast station\n");
23247ac9a364SKalle Valo 		spin_unlock_irqrestore(&il->sta_lock, flags);
23257ac9a364SKalle Valo 
23267ac9a364SKalle Valo 		return -EINVAL;
23277ac9a364SKalle Valo 	}
23287ac9a364SKalle Valo 
23297ac9a364SKalle Valo 	il->stations[sta_id].used |= IL_STA_DRIVER_ACTIVE;
23307ac9a364SKalle Valo 	il->stations[sta_id].used |= IL_STA_BCAST;
23317ac9a364SKalle Valo 	spin_unlock_irqrestore(&il->sta_lock, flags);
23327ac9a364SKalle Valo 
23337ac9a364SKalle Valo 	return 0;
23347ac9a364SKalle Valo }
23357ac9a364SKalle Valo 
23367ac9a364SKalle Valo static int
__il3945_up(struct il_priv * il)23377ac9a364SKalle Valo __il3945_up(struct il_priv *il)
23387ac9a364SKalle Valo {
23397ac9a364SKalle Valo 	int rc, i;
23407ac9a364SKalle Valo 
23417ac9a364SKalle Valo 	rc = il3945_alloc_bcast_station(il);
23427ac9a364SKalle Valo 	if (rc)
23437ac9a364SKalle Valo 		return rc;
23447ac9a364SKalle Valo 
23457ac9a364SKalle Valo 	if (test_bit(S_EXIT_PENDING, &il->status)) {
23467ac9a364SKalle Valo 		IL_WARN("Exit pending; will not bring the NIC up\n");
23477ac9a364SKalle Valo 		return -EIO;
23487ac9a364SKalle Valo 	}
23497ac9a364SKalle Valo 
23507ac9a364SKalle Valo 	if (!il->ucode_data_backup.v_addr || !il->ucode_data.v_addr) {
23517ac9a364SKalle Valo 		IL_ERR("ucode not available for device bring up\n");
23527ac9a364SKalle Valo 		return -EIO;
23537ac9a364SKalle Valo 	}
23547ac9a364SKalle Valo 
23557ac9a364SKalle Valo 	/* If platform's RF_KILL switch is NOT set to KILL */
23567ac9a364SKalle Valo 	if (_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
23577ac9a364SKalle Valo 		clear_bit(S_RFKILL, &il->status);
23587ac9a364SKalle Valo 	else {
23597ac9a364SKalle Valo 		set_bit(S_RFKILL, &il->status);
23607ac9a364SKalle Valo 		return -ERFKILL;
23617ac9a364SKalle Valo 	}
23627ac9a364SKalle Valo 
23637ac9a364SKalle Valo 	_il_wr(il, CSR_INT, 0xFFFFFFFF);
23647ac9a364SKalle Valo 
23657ac9a364SKalle Valo 	rc = il3945_hw_nic_init(il);
23667ac9a364SKalle Valo 	if (rc) {
23677ac9a364SKalle Valo 		IL_ERR("Unable to int nic\n");
23687ac9a364SKalle Valo 		return rc;
23697ac9a364SKalle Valo 	}
23707ac9a364SKalle Valo 
23717ac9a364SKalle Valo 	/* make sure rfkill handshake bits are cleared */
23727ac9a364SKalle Valo 	_il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
23737ac9a364SKalle Valo 	_il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
23747ac9a364SKalle Valo 
23757ac9a364SKalle Valo 	/* clear (again), then enable host interrupts */
23767ac9a364SKalle Valo 	_il_wr(il, CSR_INT, 0xFFFFFFFF);
23777ac9a364SKalle Valo 	il_enable_interrupts(il);
23787ac9a364SKalle Valo 
23797ac9a364SKalle Valo 	/* really make sure rfkill handshake bits are cleared */
23807ac9a364SKalle Valo 	_il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
23817ac9a364SKalle Valo 	_il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
23827ac9a364SKalle Valo 
23837ac9a364SKalle Valo 	/* Copy original ucode data image from disk into backup cache.
23847ac9a364SKalle Valo 	 * This will be used to initialize the on-board processor's
23857ac9a364SKalle Valo 	 * data SRAM for a clean start when the runtime program first loads. */
23867ac9a364SKalle Valo 	memcpy(il->ucode_data_backup.v_addr, il->ucode_data.v_addr,
23877ac9a364SKalle Valo 	       il->ucode_data.len);
23887ac9a364SKalle Valo 
23897ac9a364SKalle Valo 	/* We return success when we resume from suspend and rf_kill is on. */
23907ac9a364SKalle Valo 	if (test_bit(S_RFKILL, &il->status))
23917ac9a364SKalle Valo 		return 0;
23927ac9a364SKalle Valo 
23937ac9a364SKalle Valo 	for (i = 0; i < MAX_HW_RESTARTS; i++) {
23947ac9a364SKalle Valo 
23957ac9a364SKalle Valo 		/* load bootstrap state machine,
23967ac9a364SKalle Valo 		 * load bootstrap program into processor's memory,
23977ac9a364SKalle Valo 		 * prepare to load the "initialize" uCode */
23987ac9a364SKalle Valo 		rc = il->ops->load_ucode(il);
23997ac9a364SKalle Valo 
24007ac9a364SKalle Valo 		if (rc) {
24017ac9a364SKalle Valo 			IL_ERR("Unable to set up bootstrap uCode: %d\n", rc);
24027ac9a364SKalle Valo 			continue;
24037ac9a364SKalle Valo 		}
24047ac9a364SKalle Valo 
24057ac9a364SKalle Valo 		/* start card; "initialize" will load runtime ucode */
24067ac9a364SKalle Valo 		il3945_nic_start(il);
24077ac9a364SKalle Valo 
24087ac9a364SKalle Valo 		D_INFO(DRV_NAME " is coming up\n");
24097ac9a364SKalle Valo 
24107ac9a364SKalle Valo 		return 0;
24117ac9a364SKalle Valo 	}
24127ac9a364SKalle Valo 
24137ac9a364SKalle Valo 	set_bit(S_EXIT_PENDING, &il->status);
24147ac9a364SKalle Valo 	__il3945_down(il);
24157ac9a364SKalle Valo 	clear_bit(S_EXIT_PENDING, &il->status);
24167ac9a364SKalle Valo 
24177ac9a364SKalle Valo 	/* tried to restart and config the device for as long as our
24187ac9a364SKalle Valo 	 * patience could withstand */
24197ac9a364SKalle Valo 	IL_ERR("Unable to initialize device after %d attempts.\n", i);
24207ac9a364SKalle Valo 	return -EIO;
24217ac9a364SKalle Valo }
24227ac9a364SKalle Valo 
24237ac9a364SKalle Valo /*****************************************************************************
24247ac9a364SKalle Valo  *
24257ac9a364SKalle Valo  * Workqueue callbacks
24267ac9a364SKalle Valo  *
24277ac9a364SKalle Valo  *****************************************************************************/
24287ac9a364SKalle Valo 
24297ac9a364SKalle Valo static void
il3945_bg_init_alive_start(struct work_struct * data)24307ac9a364SKalle Valo il3945_bg_init_alive_start(struct work_struct *data)
24317ac9a364SKalle Valo {
24327ac9a364SKalle Valo 	struct il_priv *il =
24337ac9a364SKalle Valo 	    container_of(data, struct il_priv, init_alive_start.work);
24347ac9a364SKalle Valo 
24357ac9a364SKalle Valo 	mutex_lock(&il->mutex);
24367ac9a364SKalle Valo 	if (test_bit(S_EXIT_PENDING, &il->status))
24377ac9a364SKalle Valo 		goto out;
24387ac9a364SKalle Valo 
24397ac9a364SKalle Valo 	il3945_init_alive_start(il);
24407ac9a364SKalle Valo out:
24417ac9a364SKalle Valo 	mutex_unlock(&il->mutex);
24427ac9a364SKalle Valo }
24437ac9a364SKalle Valo 
24447ac9a364SKalle Valo static void
il3945_bg_alive_start(struct work_struct * data)24457ac9a364SKalle Valo il3945_bg_alive_start(struct work_struct *data)
24467ac9a364SKalle Valo {
24477ac9a364SKalle Valo 	struct il_priv *il =
24487ac9a364SKalle Valo 	    container_of(data, struct il_priv, alive_start.work);
24497ac9a364SKalle Valo 
24507ac9a364SKalle Valo 	mutex_lock(&il->mutex);
24517ac9a364SKalle Valo 	if (test_bit(S_EXIT_PENDING, &il->status) || il->txq == NULL)
24527ac9a364SKalle Valo 		goto out;
24537ac9a364SKalle Valo 
24547ac9a364SKalle Valo 	il3945_alive_start(il);
24557ac9a364SKalle Valo out:
24567ac9a364SKalle Valo 	mutex_unlock(&il->mutex);
24577ac9a364SKalle Valo }
24587ac9a364SKalle Valo 
24597ac9a364SKalle Valo /*
24607ac9a364SKalle Valo  * 3945 cannot interrupt driver when hardware rf kill switch toggles;
24617ac9a364SKalle Valo  * driver must poll CSR_GP_CNTRL_REG register for change.  This register
24627ac9a364SKalle Valo  * *is* readable even when device has been SW_RESET into low power mode
24637ac9a364SKalle Valo  * (e.g. during RF KILL).
24647ac9a364SKalle Valo  */
24657ac9a364SKalle Valo static void
il3945_rfkill_poll(struct work_struct * data)24667ac9a364SKalle Valo il3945_rfkill_poll(struct work_struct *data)
24677ac9a364SKalle Valo {
24687ac9a364SKalle Valo 	struct il_priv *il =
24697ac9a364SKalle Valo 	    container_of(data, struct il_priv, _3945.rfkill_poll.work);
24707ac9a364SKalle Valo 	bool old_rfkill = test_bit(S_RFKILL, &il->status);
24717ac9a364SKalle Valo 	bool new_rfkill =
24727ac9a364SKalle Valo 	    !(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
24737ac9a364SKalle Valo 
24747ac9a364SKalle Valo 	if (new_rfkill != old_rfkill) {
24757ac9a364SKalle Valo 		if (new_rfkill)
24767ac9a364SKalle Valo 			set_bit(S_RFKILL, &il->status);
24777ac9a364SKalle Valo 		else
24787ac9a364SKalle Valo 			clear_bit(S_RFKILL, &il->status);
24797ac9a364SKalle Valo 
24807ac9a364SKalle Valo 		wiphy_rfkill_set_hw_state(il->hw->wiphy, new_rfkill);
24817ac9a364SKalle Valo 
24827ac9a364SKalle Valo 		D_RF_KILL("RF_KILL bit toggled to %s.\n",
24837ac9a364SKalle Valo 			  new_rfkill ? "disable radio" : "enable radio");
24847ac9a364SKalle Valo 	}
24857ac9a364SKalle Valo 
24867ac9a364SKalle Valo 	/* Keep this running, even if radio now enabled.  This will be
24877ac9a364SKalle Valo 	 * cancelled in mac_start() if system decides to start again */
24887ac9a364SKalle Valo 	queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
24897ac9a364SKalle Valo 			   round_jiffies_relative(2 * HZ));
24907ac9a364SKalle Valo 
24917ac9a364SKalle Valo }
24927ac9a364SKalle Valo 
24937ac9a364SKalle Valo int
il3945_request_scan(struct il_priv * il,struct ieee80211_vif * vif)24947ac9a364SKalle Valo il3945_request_scan(struct il_priv *il, struct ieee80211_vif *vif)
24957ac9a364SKalle Valo {
24967ac9a364SKalle Valo 	struct il_host_cmd cmd = {
24977ac9a364SKalle Valo 		.id = C_SCAN,
24987ac9a364SKalle Valo 		.len = sizeof(struct il3945_scan_cmd),
24997ac9a364SKalle Valo 		.flags = CMD_SIZE_HUGE,
25007ac9a364SKalle Valo 	};
25017ac9a364SKalle Valo 	struct il3945_scan_cmd *scan;
25027ac9a364SKalle Valo 	u8 n_probes = 0;
250357fbcce3SJohannes Berg 	enum nl80211_band band;
25047ac9a364SKalle Valo 	bool is_active = false;
25057ac9a364SKalle Valo 	int ret;
25067ac9a364SKalle Valo 	u16 len;
25077ac9a364SKalle Valo 
25087ac9a364SKalle Valo 	lockdep_assert_held(&il->mutex);
25097ac9a364SKalle Valo 
25107ac9a364SKalle Valo 	if (!il->scan_cmd) {
25117ac9a364SKalle Valo 		il->scan_cmd =
25127ac9a364SKalle Valo 		    kmalloc(sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE,
25137ac9a364SKalle Valo 			    GFP_KERNEL);
25147ac9a364SKalle Valo 		if (!il->scan_cmd) {
25157ac9a364SKalle Valo 			D_SCAN("Fail to allocate scan memory\n");
25167ac9a364SKalle Valo 			return -ENOMEM;
25177ac9a364SKalle Valo 		}
25187ac9a364SKalle Valo 	}
25197ac9a364SKalle Valo 	scan = il->scan_cmd;
25207ac9a364SKalle Valo 	memset(scan, 0, sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE);
25217ac9a364SKalle Valo 
25227ac9a364SKalle Valo 	scan->quiet_plcp_th = IL_PLCP_QUIET_THRESH;
25237ac9a364SKalle Valo 	scan->quiet_time = IL_ACTIVE_QUIET_TIME;
25247ac9a364SKalle Valo 
25257ac9a364SKalle Valo 	if (il_is_associated(il)) {
25267ac9a364SKalle Valo 		u16 interval;
25277ac9a364SKalle Valo 		u32 extra;
25287ac9a364SKalle Valo 		u32 suspend_time = 100;
25297ac9a364SKalle Valo 		u32 scan_suspend_time = 100;
25307ac9a364SKalle Valo 
25317ac9a364SKalle Valo 		D_INFO("Scanning while associated...\n");
25327ac9a364SKalle Valo 
25337ac9a364SKalle Valo 		interval = vif->bss_conf.beacon_int;
25347ac9a364SKalle Valo 
25357ac9a364SKalle Valo 		scan->suspend_time = 0;
25367ac9a364SKalle Valo 		scan->max_out_time = cpu_to_le32(200 * 1024);
25377ac9a364SKalle Valo 		if (!interval)
25387ac9a364SKalle Valo 			interval = suspend_time;
25397ac9a364SKalle Valo 		/*
25407ac9a364SKalle Valo 		 * suspend time format:
25417ac9a364SKalle Valo 		 *  0-19: beacon interval in usec (time before exec.)
25427ac9a364SKalle Valo 		 * 20-23: 0
25437ac9a364SKalle Valo 		 * 24-31: number of beacons (suspend between channels)
25447ac9a364SKalle Valo 		 */
25457ac9a364SKalle Valo 
25467ac9a364SKalle Valo 		extra = (suspend_time / interval) << 24;
25477ac9a364SKalle Valo 		scan_suspend_time =
25487ac9a364SKalle Valo 		    0xFF0FFFFF & (extra | ((suspend_time % interval) * 1024));
25497ac9a364SKalle Valo 
25507ac9a364SKalle Valo 		scan->suspend_time = cpu_to_le32(scan_suspend_time);
25517ac9a364SKalle Valo 		D_SCAN("suspend_time 0x%X beacon interval %d\n",
25527ac9a364SKalle Valo 		       scan_suspend_time, interval);
25537ac9a364SKalle Valo 	}
25547ac9a364SKalle Valo 
25557ac9a364SKalle Valo 	if (il->scan_request->n_ssids) {
25567ac9a364SKalle Valo 		int i, p = 0;
25577ac9a364SKalle Valo 		D_SCAN("Kicking off active scan\n");
25587ac9a364SKalle Valo 		for (i = 0; i < il->scan_request->n_ssids; i++) {
25597ac9a364SKalle Valo 			/* always does wildcard anyway */
25607ac9a364SKalle Valo 			if (!il->scan_request->ssids[i].ssid_len)
25617ac9a364SKalle Valo 				continue;
25627ac9a364SKalle Valo 			scan->direct_scan[p].id = WLAN_EID_SSID;
25637ac9a364SKalle Valo 			scan->direct_scan[p].len =
25647ac9a364SKalle Valo 			    il->scan_request->ssids[i].ssid_len;
25657ac9a364SKalle Valo 			memcpy(scan->direct_scan[p].ssid,
25667ac9a364SKalle Valo 			       il->scan_request->ssids[i].ssid,
25677ac9a364SKalle Valo 			       il->scan_request->ssids[i].ssid_len);
25687ac9a364SKalle Valo 			n_probes++;
25697ac9a364SKalle Valo 			p++;
25707ac9a364SKalle Valo 		}
25717ac9a364SKalle Valo 		is_active = true;
25727ac9a364SKalle Valo 	} else
25737ac9a364SKalle Valo 		D_SCAN("Kicking off passive scan.\n");
25747ac9a364SKalle Valo 
25757ac9a364SKalle Valo 	/* We don't build a direct scan probe request; the uCode will do
25767ac9a364SKalle Valo 	 * that based on the direct_mask added to each channel entry */
25777ac9a364SKalle Valo 	scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
25787ac9a364SKalle Valo 	scan->tx_cmd.sta_id = il->hw_params.bcast_id;
25797ac9a364SKalle Valo 	scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
25807ac9a364SKalle Valo 
25817ac9a364SKalle Valo 	/* flags + rate selection */
25827ac9a364SKalle Valo 
25837ac9a364SKalle Valo 	switch (il->scan_band) {
258457fbcce3SJohannes Berg 	case NL80211_BAND_2GHZ:
25857ac9a364SKalle Valo 		scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
25867ac9a364SKalle Valo 		scan->tx_cmd.rate = RATE_1M_PLCP;
258757fbcce3SJohannes Berg 		band = NL80211_BAND_2GHZ;
25887ac9a364SKalle Valo 		break;
258957fbcce3SJohannes Berg 	case NL80211_BAND_5GHZ:
25907ac9a364SKalle Valo 		scan->tx_cmd.rate = RATE_6M_PLCP;
259157fbcce3SJohannes Berg 		band = NL80211_BAND_5GHZ;
25927ac9a364SKalle Valo 		break;
25937ac9a364SKalle Valo 	default:
25947ac9a364SKalle Valo 		IL_WARN("Invalid scan band\n");
25957ac9a364SKalle Valo 		return -EIO;
25967ac9a364SKalle Valo 	}
25977ac9a364SKalle Valo 
25987ac9a364SKalle Valo 	/*
25997ac9a364SKalle Valo 	 * If active scaning is requested but a certain channel is marked
26007ac9a364SKalle Valo 	 * passive, we can do active scanning if we detect transmissions. For
26017ac9a364SKalle Valo 	 * passive only scanning disable switching to active on any channel.
26027ac9a364SKalle Valo 	 */
26037ac9a364SKalle Valo 	scan->good_CRC_th =
26047ac9a364SKalle Valo 	    is_active ? IL_GOOD_CRC_TH_DEFAULT : IL_GOOD_CRC_TH_NEVER;
26057ac9a364SKalle Valo 
26067ac9a364SKalle Valo 	len =
26077ac9a364SKalle Valo 	    il_fill_probe_req(il, (struct ieee80211_mgmt *)scan->data,
26087ac9a364SKalle Valo 			      vif->addr, il->scan_request->ie,
26097ac9a364SKalle Valo 			      il->scan_request->ie_len,
26107ac9a364SKalle Valo 			      IL_MAX_SCAN_SIZE - sizeof(*scan));
26117ac9a364SKalle Valo 	scan->tx_cmd.len = cpu_to_le16(len);
26127ac9a364SKalle Valo 
26137ac9a364SKalle Valo 	/* select Rx antennas */
26147ac9a364SKalle Valo 	scan->flags |= il3945_get_antenna_flags(il);
26157ac9a364SKalle Valo 
26167ac9a364SKalle Valo 	scan->channel_count =
26177ac9a364SKalle Valo 	    il3945_get_channels_for_scan(il, band, is_active, n_probes,
26187ac9a364SKalle Valo 					 (void *)&scan->data[len], vif);
26197ac9a364SKalle Valo 	if (scan->channel_count == 0) {
26207ac9a364SKalle Valo 		D_SCAN("channel count %d\n", scan->channel_count);
26217ac9a364SKalle Valo 		return -EIO;
26227ac9a364SKalle Valo 	}
26237ac9a364SKalle Valo 
26247ac9a364SKalle Valo 	cmd.len +=
26257ac9a364SKalle Valo 	    le16_to_cpu(scan->tx_cmd.len) +
26267ac9a364SKalle Valo 	    scan->channel_count * sizeof(struct il3945_scan_channel);
26277ac9a364SKalle Valo 	cmd.data = scan;
26287ac9a364SKalle Valo 	scan->len = cpu_to_le16(cmd.len);
26297ac9a364SKalle Valo 
26307ac9a364SKalle Valo 	set_bit(S_SCAN_HW, &il->status);
26317ac9a364SKalle Valo 	ret = il_send_cmd_sync(il, &cmd);
26327ac9a364SKalle Valo 	if (ret)
26337ac9a364SKalle Valo 		clear_bit(S_SCAN_HW, &il->status);
26347ac9a364SKalle Valo 	return ret;
26357ac9a364SKalle Valo }
26367ac9a364SKalle Valo 
26377ac9a364SKalle Valo void
il3945_post_scan(struct il_priv * il)26387ac9a364SKalle Valo il3945_post_scan(struct il_priv *il)
26397ac9a364SKalle Valo {
26407ac9a364SKalle Valo 	/*
26417ac9a364SKalle Valo 	 * Since setting the RXON may have been deferred while
26427ac9a364SKalle Valo 	 * performing the scan, fire one off if needed
26437ac9a364SKalle Valo 	 */
26447ac9a364SKalle Valo 	if (memcmp(&il->staging, &il->active, sizeof(il->staging)))
26457ac9a364SKalle Valo 		il3945_commit_rxon(il);
26467ac9a364SKalle Valo }
26477ac9a364SKalle Valo 
26487ac9a364SKalle Valo static void
il3945_bg_restart(struct work_struct * data)26497ac9a364SKalle Valo il3945_bg_restart(struct work_struct *data)
26507ac9a364SKalle Valo {
26517ac9a364SKalle Valo 	struct il_priv *il = container_of(data, struct il_priv, restart);
26527ac9a364SKalle Valo 
26537ac9a364SKalle Valo 	if (test_bit(S_EXIT_PENDING, &il->status))
26547ac9a364SKalle Valo 		return;
26557ac9a364SKalle Valo 
26567ac9a364SKalle Valo 	if (test_and_clear_bit(S_FW_ERROR, &il->status)) {
26577ac9a364SKalle Valo 		mutex_lock(&il->mutex);
26587ac9a364SKalle Valo 		il->is_open = 0;
26597ac9a364SKalle Valo 		mutex_unlock(&il->mutex);
26607ac9a364SKalle Valo 		il3945_down(il);
26617ac9a364SKalle Valo 		ieee80211_restart_hw(il->hw);
26627ac9a364SKalle Valo 	} else {
26637ac9a364SKalle Valo 		il3945_down(il);
26647ac9a364SKalle Valo 
26657ac9a364SKalle Valo 		mutex_lock(&il->mutex);
26667ac9a364SKalle Valo 		if (test_bit(S_EXIT_PENDING, &il->status)) {
26677ac9a364SKalle Valo 			mutex_unlock(&il->mutex);
26687ac9a364SKalle Valo 			return;
26697ac9a364SKalle Valo 		}
26707ac9a364SKalle Valo 
26717ac9a364SKalle Valo 		__il3945_up(il);
26727ac9a364SKalle Valo 		mutex_unlock(&il->mutex);
26737ac9a364SKalle Valo 	}
26747ac9a364SKalle Valo }
26757ac9a364SKalle Valo 
26767ac9a364SKalle Valo static void
il3945_bg_rx_replenish(struct work_struct * data)26777ac9a364SKalle Valo il3945_bg_rx_replenish(struct work_struct *data)
26787ac9a364SKalle Valo {
26797ac9a364SKalle Valo 	struct il_priv *il = container_of(data, struct il_priv, rx_replenish);
26807ac9a364SKalle Valo 
26817ac9a364SKalle Valo 	mutex_lock(&il->mutex);
26827ac9a364SKalle Valo 	if (test_bit(S_EXIT_PENDING, &il->status))
26837ac9a364SKalle Valo 		goto out;
26847ac9a364SKalle Valo 
26857ac9a364SKalle Valo 	il3945_rx_replenish(il);
26867ac9a364SKalle Valo out:
26877ac9a364SKalle Valo 	mutex_unlock(&il->mutex);
26887ac9a364SKalle Valo }
26897ac9a364SKalle Valo 
26907ac9a364SKalle Valo void
il3945_post_associate(struct il_priv * il)26917ac9a364SKalle Valo il3945_post_associate(struct il_priv *il)
26927ac9a364SKalle Valo {
26937ac9a364SKalle Valo 	int rc = 0;
26947ac9a364SKalle Valo 
26957ac9a364SKalle Valo 	if (!il->vif || !il->is_open)
26967ac9a364SKalle Valo 		return;
26977ac9a364SKalle Valo 
2698f276e20bSJohannes Berg 	D_ASSOC("Associated as %d to: %pM\n", il->vif->cfg.aid,
26997ac9a364SKalle Valo 		il->active.bssid_addr);
27007ac9a364SKalle Valo 
27017ac9a364SKalle Valo 	if (test_bit(S_EXIT_PENDING, &il->status))
27027ac9a364SKalle Valo 		return;
27037ac9a364SKalle Valo 
27047ac9a364SKalle Valo 	il_scan_cancel_timeout(il, 200);
27057ac9a364SKalle Valo 
27067ac9a364SKalle Valo 	il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
27077ac9a364SKalle Valo 	il3945_commit_rxon(il);
27087ac9a364SKalle Valo 
27097ac9a364SKalle Valo 	rc = il_send_rxon_timing(il);
27107ac9a364SKalle Valo 	if (rc)
27117ac9a364SKalle Valo 		IL_WARN("C_RXON_TIMING failed - " "Attempting to continue.\n");
27127ac9a364SKalle Valo 
27137ac9a364SKalle Valo 	il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
27147ac9a364SKalle Valo 
2715f276e20bSJohannes Berg 	il->staging.assoc_id = cpu_to_le16(il->vif->cfg.aid);
27167ac9a364SKalle Valo 
2717f276e20bSJohannes Berg 	D_ASSOC("assoc id %d beacon interval %d\n", il->vif->cfg.aid,
27187ac9a364SKalle Valo 		il->vif->bss_conf.beacon_int);
27197ac9a364SKalle Valo 
27207ac9a364SKalle Valo 	if (il->vif->bss_conf.use_short_preamble)
27217ac9a364SKalle Valo 		il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
27227ac9a364SKalle Valo 	else
27237ac9a364SKalle Valo 		il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
27247ac9a364SKalle Valo 
27257ac9a364SKalle Valo 	if (il->staging.flags & RXON_FLG_BAND_24G_MSK) {
27267ac9a364SKalle Valo 		if (il->vif->bss_conf.use_short_slot)
27277ac9a364SKalle Valo 			il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
27287ac9a364SKalle Valo 		else
27297ac9a364SKalle Valo 			il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
27307ac9a364SKalle Valo 	}
27317ac9a364SKalle Valo 
27327ac9a364SKalle Valo 	il3945_commit_rxon(il);
27337ac9a364SKalle Valo 
27347ac9a364SKalle Valo 	switch (il->vif->type) {
27357ac9a364SKalle Valo 	case NL80211_IFTYPE_STATION:
27367ac9a364SKalle Valo 		il3945_rate_scale_init(il->hw, IL_AP_ID);
27377ac9a364SKalle Valo 		break;
27387ac9a364SKalle Valo 	case NL80211_IFTYPE_ADHOC:
27397ac9a364SKalle Valo 		il3945_send_beacon_cmd(il);
27407ac9a364SKalle Valo 		break;
27417ac9a364SKalle Valo 	default:
27427ac9a364SKalle Valo 		IL_ERR("%s Should not be called in %d mode\n", __func__,
27437ac9a364SKalle Valo 		      il->vif->type);
27447ac9a364SKalle Valo 		break;
27457ac9a364SKalle Valo 	}
27467ac9a364SKalle Valo }
27477ac9a364SKalle Valo 
27487ac9a364SKalle Valo /*****************************************************************************
27497ac9a364SKalle Valo  *
27507ac9a364SKalle Valo  * mac80211 entry point functions
27517ac9a364SKalle Valo  *
27527ac9a364SKalle Valo  *****************************************************************************/
27537ac9a364SKalle Valo 
27547ac9a364SKalle Valo #define UCODE_READY_TIMEOUT	(2 * HZ)
27557ac9a364SKalle Valo 
27567ac9a364SKalle Valo static int
il3945_mac_start(struct ieee80211_hw * hw)27577ac9a364SKalle Valo il3945_mac_start(struct ieee80211_hw *hw)
27587ac9a364SKalle Valo {
27597ac9a364SKalle Valo 	struct il_priv *il = hw->priv;
27607ac9a364SKalle Valo 	int ret;
27617ac9a364SKalle Valo 
27627ac9a364SKalle Valo 	/* we should be verifying the device is ready to be opened */
27637ac9a364SKalle Valo 	mutex_lock(&il->mutex);
27647ac9a364SKalle Valo 	D_MAC80211("enter\n");
27657ac9a364SKalle Valo 
27667ac9a364SKalle Valo 	/* fetch ucode file from disk, alloc and copy to bus-master buffers ...
27677ac9a364SKalle Valo 	 * ucode filename and max sizes are card-specific. */
27687ac9a364SKalle Valo 
27697ac9a364SKalle Valo 	if (!il->ucode_code.len) {
27707ac9a364SKalle Valo 		ret = il3945_read_ucode(il);
27717ac9a364SKalle Valo 		if (ret) {
27727ac9a364SKalle Valo 			IL_ERR("Could not read microcode: %d\n", ret);
27737ac9a364SKalle Valo 			mutex_unlock(&il->mutex);
27747ac9a364SKalle Valo 			goto out_release_irq;
27757ac9a364SKalle Valo 		}
27767ac9a364SKalle Valo 	}
27777ac9a364SKalle Valo 
27787ac9a364SKalle Valo 	ret = __il3945_up(il);
27797ac9a364SKalle Valo 
27807ac9a364SKalle Valo 	mutex_unlock(&il->mutex);
27817ac9a364SKalle Valo 
27827ac9a364SKalle Valo 	if (ret)
27837ac9a364SKalle Valo 		goto out_release_irq;
27847ac9a364SKalle Valo 
27857ac9a364SKalle Valo 	D_INFO("Start UP work.\n");
27867ac9a364SKalle Valo 
27877ac9a364SKalle Valo 	/* Wait for START_ALIVE from ucode. Otherwise callbacks from
27887ac9a364SKalle Valo 	 * mac80211 will not be run successfully. */
27897ac9a364SKalle Valo 	ret = wait_event_timeout(il->wait_command_queue,
27907ac9a364SKalle Valo 				 test_bit(S_READY, &il->status),
27917ac9a364SKalle Valo 				 UCODE_READY_TIMEOUT);
27927ac9a364SKalle Valo 	if (!ret) {
27937ac9a364SKalle Valo 		if (!test_bit(S_READY, &il->status)) {
27947ac9a364SKalle Valo 			IL_ERR("Wait for START_ALIVE timeout after %dms.\n",
27957ac9a364SKalle Valo 			       jiffies_to_msecs(UCODE_READY_TIMEOUT));
27967ac9a364SKalle Valo 			ret = -ETIMEDOUT;
27977ac9a364SKalle Valo 			goto out_release_irq;
27987ac9a364SKalle Valo 		}
27997ac9a364SKalle Valo 	}
28007ac9a364SKalle Valo 
28017ac9a364SKalle Valo 	/* ucode is running and will send rfkill notifications,
28027ac9a364SKalle Valo 	 * no need to poll the killswitch state anymore */
28037ac9a364SKalle Valo 	cancel_delayed_work(&il->_3945.rfkill_poll);
28047ac9a364SKalle Valo 
28057ac9a364SKalle Valo 	il->is_open = 1;
28067ac9a364SKalle Valo 	D_MAC80211("leave\n");
28077ac9a364SKalle Valo 	return 0;
28087ac9a364SKalle Valo 
28097ac9a364SKalle Valo out_release_irq:
28107ac9a364SKalle Valo 	il->is_open = 0;
28117ac9a364SKalle Valo 	D_MAC80211("leave - failed\n");
28127ac9a364SKalle Valo 	return ret;
28137ac9a364SKalle Valo }
28147ac9a364SKalle Valo 
28157ac9a364SKalle Valo static void
il3945_mac_stop(struct ieee80211_hw * hw)28167ac9a364SKalle Valo il3945_mac_stop(struct ieee80211_hw *hw)
28177ac9a364SKalle Valo {
28187ac9a364SKalle Valo 	struct il_priv *il = hw->priv;
28197ac9a364SKalle Valo 
28207ac9a364SKalle Valo 	D_MAC80211("enter\n");
28217ac9a364SKalle Valo 
28227ac9a364SKalle Valo 	if (!il->is_open) {
28237ac9a364SKalle Valo 		D_MAC80211("leave - skip\n");
28247ac9a364SKalle Valo 		return;
28257ac9a364SKalle Valo 	}
28267ac9a364SKalle Valo 
28277ac9a364SKalle Valo 	il->is_open = 0;
28287ac9a364SKalle Valo 
28297ac9a364SKalle Valo 	il3945_down(il);
28307ac9a364SKalle Valo 
28317ac9a364SKalle Valo 	flush_workqueue(il->workqueue);
28327ac9a364SKalle Valo 
28337ac9a364SKalle Valo 	/* start polling the killswitch state again */
28347ac9a364SKalle Valo 	queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
28357ac9a364SKalle Valo 			   round_jiffies_relative(2 * HZ));
28367ac9a364SKalle Valo 
28377ac9a364SKalle Valo 	D_MAC80211("leave\n");
28387ac9a364SKalle Valo }
28397ac9a364SKalle Valo 
28407ac9a364SKalle Valo static void
il3945_mac_tx(struct ieee80211_hw * hw,struct ieee80211_tx_control * control,struct sk_buff * skb)28417ac9a364SKalle Valo il3945_mac_tx(struct ieee80211_hw *hw,
28427ac9a364SKalle Valo 	       struct ieee80211_tx_control *control,
28437ac9a364SKalle Valo 	       struct sk_buff *skb)
28447ac9a364SKalle Valo {
28457ac9a364SKalle Valo 	struct il_priv *il = hw->priv;
28467ac9a364SKalle Valo 
28477ac9a364SKalle Valo 	D_MAC80211("enter\n");
28487ac9a364SKalle Valo 
28497ac9a364SKalle Valo 	D_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
28507ac9a364SKalle Valo 	     ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
28517ac9a364SKalle Valo 
28527ac9a364SKalle Valo 	if (il3945_tx_skb(il, control->sta, skb))
28537ac9a364SKalle Valo 		dev_kfree_skb_any(skb);
28547ac9a364SKalle Valo 
28557ac9a364SKalle Valo 	D_MAC80211("leave\n");
28567ac9a364SKalle Valo }
28577ac9a364SKalle Valo 
28587ac9a364SKalle Valo void
il3945_config_ap(struct il_priv * il)28597ac9a364SKalle Valo il3945_config_ap(struct il_priv *il)
28607ac9a364SKalle Valo {
28617ac9a364SKalle Valo 	struct ieee80211_vif *vif = il->vif;
28627ac9a364SKalle Valo 	int rc = 0;
28637ac9a364SKalle Valo 
28647ac9a364SKalle Valo 	if (test_bit(S_EXIT_PENDING, &il->status))
28657ac9a364SKalle Valo 		return;
28667ac9a364SKalle Valo 
28677ac9a364SKalle Valo 	/* The following should be done only at AP bring up */
28687ac9a364SKalle Valo 	if (!(il_is_associated(il))) {
28697ac9a364SKalle Valo 
28707ac9a364SKalle Valo 		/* RXON - unassoc (to set timing command) */
28717ac9a364SKalle Valo 		il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
28727ac9a364SKalle Valo 		il3945_commit_rxon(il);
28737ac9a364SKalle Valo 
28747ac9a364SKalle Valo 		/* RXON Timing */
28757ac9a364SKalle Valo 		rc = il_send_rxon_timing(il);
28767ac9a364SKalle Valo 		if (rc)
28777ac9a364SKalle Valo 			IL_WARN("C_RXON_TIMING failed - "
28787ac9a364SKalle Valo 				"Attempting to continue.\n");
28797ac9a364SKalle Valo 
28807ac9a364SKalle Valo 		il->staging.assoc_id = 0;
28817ac9a364SKalle Valo 
28827ac9a364SKalle Valo 		if (vif->bss_conf.use_short_preamble)
28837ac9a364SKalle Valo 			il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
28847ac9a364SKalle Valo 		else
28857ac9a364SKalle Valo 			il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
28867ac9a364SKalle Valo 
28877ac9a364SKalle Valo 		if (il->staging.flags & RXON_FLG_BAND_24G_MSK) {
28887ac9a364SKalle Valo 			if (vif->bss_conf.use_short_slot)
28897ac9a364SKalle Valo 				il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
28907ac9a364SKalle Valo 			else
28917ac9a364SKalle Valo 				il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
28927ac9a364SKalle Valo 		}
28937ac9a364SKalle Valo 		/* restore RXON assoc */
28947ac9a364SKalle Valo 		il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
28957ac9a364SKalle Valo 		il3945_commit_rxon(il);
28967ac9a364SKalle Valo 	}
28977ac9a364SKalle Valo 	il3945_send_beacon_cmd(il);
28987ac9a364SKalle Valo }
28997ac9a364SKalle Valo 
29007ac9a364SKalle Valo static int
il3945_mac_set_key(struct ieee80211_hw * hw,enum set_key_cmd cmd,struct ieee80211_vif * vif,struct ieee80211_sta * sta,struct ieee80211_key_conf * key)29017ac9a364SKalle Valo il3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
29027ac9a364SKalle Valo 		   struct ieee80211_vif *vif, struct ieee80211_sta *sta,
29037ac9a364SKalle Valo 		   struct ieee80211_key_conf *key)
29047ac9a364SKalle Valo {
29057ac9a364SKalle Valo 	struct il_priv *il = hw->priv;
29067ac9a364SKalle Valo 	int ret = 0;
29077ac9a364SKalle Valo 	u8 sta_id = IL_INVALID_STATION;
29087ac9a364SKalle Valo 	u8 static_key;
29097ac9a364SKalle Valo 
29107ac9a364SKalle Valo 	D_MAC80211("enter\n");
29117ac9a364SKalle Valo 
29127ac9a364SKalle Valo 	if (il3945_mod_params.sw_crypto) {
29137ac9a364SKalle Valo 		D_MAC80211("leave - hwcrypto disabled\n");
29147ac9a364SKalle Valo 		return -EOPNOTSUPP;
29157ac9a364SKalle Valo 	}
29167ac9a364SKalle Valo 
29177ac9a364SKalle Valo 	/*
29187ac9a364SKalle Valo 	 * To support IBSS RSN, don't program group keys in IBSS, the
29197ac9a364SKalle Valo 	 * hardware will then not attempt to decrypt the frames.
29207ac9a364SKalle Valo 	 */
29217ac9a364SKalle Valo 	if (vif->type == NL80211_IFTYPE_ADHOC &&
29227ac9a364SKalle Valo 	    !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
29237ac9a364SKalle Valo 		D_MAC80211("leave - IBSS RSN\n");
29247ac9a364SKalle Valo 		return -EOPNOTSUPP;
29257ac9a364SKalle Valo 	}
29267ac9a364SKalle Valo 
29277ac9a364SKalle Valo 	static_key = !il_is_associated(il);
29287ac9a364SKalle Valo 
29297ac9a364SKalle Valo 	if (!static_key) {
29307ac9a364SKalle Valo 		sta_id = il_sta_id_or_broadcast(il, sta);
29317ac9a364SKalle Valo 		if (sta_id == IL_INVALID_STATION) {
29327ac9a364SKalle Valo 			D_MAC80211("leave - station not found\n");
29337ac9a364SKalle Valo 			return -EINVAL;
29347ac9a364SKalle Valo 		}
29357ac9a364SKalle Valo 	}
29367ac9a364SKalle Valo 
29377ac9a364SKalle Valo 	mutex_lock(&il->mutex);
29387ac9a364SKalle Valo 	il_scan_cancel_timeout(il, 100);
29397ac9a364SKalle Valo 
29407ac9a364SKalle Valo 	switch (cmd) {
29417ac9a364SKalle Valo 	case SET_KEY:
29427ac9a364SKalle Valo 		if (static_key)
29437ac9a364SKalle Valo 			ret = il3945_set_static_key(il, key);
29447ac9a364SKalle Valo 		else
29457ac9a364SKalle Valo 			ret = il3945_set_dynamic_key(il, key, sta_id);
29467ac9a364SKalle Valo 		D_MAC80211("enable hwcrypto key\n");
29477ac9a364SKalle Valo 		break;
29487ac9a364SKalle Valo 	case DISABLE_KEY:
29497ac9a364SKalle Valo 		if (static_key)
29507ac9a364SKalle Valo 			ret = il3945_remove_static_key(il);
29517ac9a364SKalle Valo 		else
29527ac9a364SKalle Valo 			ret = il3945_clear_sta_key_info(il, sta_id);
29537ac9a364SKalle Valo 		D_MAC80211("disable hwcrypto key\n");
29547ac9a364SKalle Valo 		break;
29557ac9a364SKalle Valo 	default:
29567ac9a364SKalle Valo 		ret = -EINVAL;
29577ac9a364SKalle Valo 	}
29587ac9a364SKalle Valo 
29597ac9a364SKalle Valo 	D_MAC80211("leave ret %d\n", ret);
29607ac9a364SKalle Valo 	mutex_unlock(&il->mutex);
29617ac9a364SKalle Valo 
29627ac9a364SKalle Valo 	return ret;
29637ac9a364SKalle Valo }
29647ac9a364SKalle Valo 
29657ac9a364SKalle Valo static int
il3945_mac_sta_add(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_sta * sta)29667ac9a364SKalle Valo il3945_mac_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
29677ac9a364SKalle Valo 		   struct ieee80211_sta *sta)
29687ac9a364SKalle Valo {
29697ac9a364SKalle Valo 	struct il_priv *il = hw->priv;
29707ac9a364SKalle Valo 	struct il3945_sta_priv *sta_priv = (void *)sta->drv_priv;
29717ac9a364SKalle Valo 	int ret;
29727ac9a364SKalle Valo 	bool is_ap = vif->type == NL80211_IFTYPE_STATION;
29737ac9a364SKalle Valo 	u8 sta_id;
29747ac9a364SKalle Valo 
29757ac9a364SKalle Valo 	mutex_lock(&il->mutex);
29767ac9a364SKalle Valo 	D_INFO("station %pM\n", sta->addr);
29777ac9a364SKalle Valo 	sta_priv->common.sta_id = IL_INVALID_STATION;
29787ac9a364SKalle Valo 
29797ac9a364SKalle Valo 	ret = il_add_station_common(il, sta->addr, is_ap, sta, &sta_id);
29807ac9a364SKalle Valo 	if (ret) {
29817ac9a364SKalle Valo 		IL_ERR("Unable to add station %pM (%d)\n", sta->addr, ret);
29827ac9a364SKalle Valo 		/* Should we return success if return code is EEXIST ? */
29837ac9a364SKalle Valo 		mutex_unlock(&il->mutex);
29847ac9a364SKalle Valo 		return ret;
29857ac9a364SKalle Valo 	}
29867ac9a364SKalle Valo 
29877ac9a364SKalle Valo 	sta_priv->common.sta_id = sta_id;
29887ac9a364SKalle Valo 
29897ac9a364SKalle Valo 	/* Initialize rate scaling */
29907ac9a364SKalle Valo 	D_INFO("Initializing rate scaling for station %pM\n", sta->addr);
29917ac9a364SKalle Valo 	il3945_rs_rate_init(il, sta, sta_id);
29927ac9a364SKalle Valo 	mutex_unlock(&il->mutex);
29937ac9a364SKalle Valo 
29947ac9a364SKalle Valo 	return 0;
29957ac9a364SKalle Valo }
29967ac9a364SKalle Valo 
29977ac9a364SKalle Valo static void
il3945_configure_filter(struct ieee80211_hw * hw,unsigned int changed_flags,unsigned int * total_flags,u64 multicast)29987ac9a364SKalle Valo il3945_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
29997ac9a364SKalle Valo 			unsigned int *total_flags, u64 multicast)
30007ac9a364SKalle Valo {
30017ac9a364SKalle Valo 	struct il_priv *il = hw->priv;
30027ac9a364SKalle Valo 	__le32 filter_or = 0, filter_nand = 0;
30037ac9a364SKalle Valo 
30047ac9a364SKalle Valo #define CHK(test, flag)	do { \
30057ac9a364SKalle Valo 	if (*total_flags & (test))		\
30067ac9a364SKalle Valo 		filter_or |= (flag);		\
30077ac9a364SKalle Valo 	else					\
30087ac9a364SKalle Valo 		filter_nand |= (flag);		\
30097ac9a364SKalle Valo 	} while (0)
30107ac9a364SKalle Valo 
30117ac9a364SKalle Valo 	D_MAC80211("Enter: changed: 0x%x, total: 0x%x\n", changed_flags,
30127ac9a364SKalle Valo 		   *total_flags);
30137ac9a364SKalle Valo 
30147ac9a364SKalle Valo 	CHK(FIF_OTHER_BSS, RXON_FILTER_PROMISC_MSK);
30157ac9a364SKalle Valo 	CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
30167ac9a364SKalle Valo 	CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
30177ac9a364SKalle Valo 
30187ac9a364SKalle Valo #undef CHK
30197ac9a364SKalle Valo 
30207ac9a364SKalle Valo 	mutex_lock(&il->mutex);
30217ac9a364SKalle Valo 
30227ac9a364SKalle Valo 	il->staging.filter_flags &= ~filter_nand;
30237ac9a364SKalle Valo 	il->staging.filter_flags |= filter_or;
30247ac9a364SKalle Valo 
30257ac9a364SKalle Valo 	/*
30267ac9a364SKalle Valo 	 * Not committing directly because hardware can perform a scan,
30277ac9a364SKalle Valo 	 * but even if hw is ready, committing here breaks for some reason,
30287ac9a364SKalle Valo 	 * we'll eventually commit the filter flags change anyway.
30297ac9a364SKalle Valo 	 */
30307ac9a364SKalle Valo 
30317ac9a364SKalle Valo 	mutex_unlock(&il->mutex);
30327ac9a364SKalle Valo 
30337ac9a364SKalle Valo 	/*
30347ac9a364SKalle Valo 	 * Receiving all multicast frames is always enabled by the
30357ac9a364SKalle Valo 	 * default flags setup in il_connection_init_rx_config()
30367ac9a364SKalle Valo 	 * since we currently do not support programming multicast
30377ac9a364SKalle Valo 	 * filters into the device.
30387ac9a364SKalle Valo 	 */
30397ac9a364SKalle Valo 	*total_flags &=
30407ac9a364SKalle Valo 	    FIF_OTHER_BSS | FIF_ALLMULTI |
30417ac9a364SKalle Valo 	    FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
30427ac9a364SKalle Valo }
30437ac9a364SKalle Valo 
30447ac9a364SKalle Valo /*****************************************************************************
30457ac9a364SKalle Valo  *
30467ac9a364SKalle Valo  * sysfs attributes
30477ac9a364SKalle Valo  *
30487ac9a364SKalle Valo  *****************************************************************************/
30497ac9a364SKalle Valo 
30507ac9a364SKalle Valo #ifdef CONFIG_IWLEGACY_DEBUG
30517ac9a364SKalle Valo 
30527ac9a364SKalle Valo /*
30537ac9a364SKalle Valo  * The following adds a new attribute to the sysfs representation
30547ac9a364SKalle Valo  * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
30557ac9a364SKalle Valo  * used for controlling the debug level.
30567ac9a364SKalle Valo  *
30577ac9a364SKalle Valo  * See the level definitions in iwl for details.
30587ac9a364SKalle Valo  *
30597ac9a364SKalle Valo  * The debug_level being managed using sysfs below is a per device debug
30607ac9a364SKalle Valo  * level that is used instead of the global debug level if it (the per
30617ac9a364SKalle Valo  * device debug level) is set.
30627ac9a364SKalle Valo  */
30637ac9a364SKalle Valo static ssize_t
il3945_show_debug_level(struct device * d,struct device_attribute * attr,char * buf)30647ac9a364SKalle Valo il3945_show_debug_level(struct device *d, struct device_attribute *attr,
30657ac9a364SKalle Valo 			char *buf)
30667ac9a364SKalle Valo {
30677ac9a364SKalle Valo 	struct il_priv *il = dev_get_drvdata(d);
30687ac9a364SKalle Valo 	return sprintf(buf, "0x%08X\n", il_get_debug_level(il));
30697ac9a364SKalle Valo }
30707ac9a364SKalle Valo 
30717ac9a364SKalle Valo static ssize_t
il3945_store_debug_level(struct device * d,struct device_attribute * attr,const char * buf,size_t count)30727ac9a364SKalle Valo il3945_store_debug_level(struct device *d, struct device_attribute *attr,
30737ac9a364SKalle Valo 			 const char *buf, size_t count)
30747ac9a364SKalle Valo {
30757ac9a364SKalle Valo 	struct il_priv *il = dev_get_drvdata(d);
30767ac9a364SKalle Valo 	unsigned long val;
30777ac9a364SKalle Valo 	int ret;
30787ac9a364SKalle Valo 
30797ac9a364SKalle Valo 	ret = kstrtoul(buf, 0, &val);
30807ac9a364SKalle Valo 	if (ret)
30817ac9a364SKalle Valo 		IL_INFO("%s is not in hex or decimal form.\n", buf);
30827ac9a364SKalle Valo 	else
30837ac9a364SKalle Valo 		il->debug_level = val;
30847ac9a364SKalle Valo 
30857ac9a364SKalle Valo 	return strnlen(buf, count);
30867ac9a364SKalle Valo }
30877ac9a364SKalle Valo 
30882ef00c53SJoe Perches static DEVICE_ATTR(debug_level, 0644, il3945_show_debug_level,
30897ac9a364SKalle Valo 		   il3945_store_debug_level);
30907ac9a364SKalle Valo 
30917ac9a364SKalle Valo #endif /* CONFIG_IWLEGACY_DEBUG */
30927ac9a364SKalle Valo 
30937ac9a364SKalle Valo static ssize_t
il3945_show_temperature(struct device * d,struct device_attribute * attr,char * buf)30947ac9a364SKalle Valo il3945_show_temperature(struct device *d, struct device_attribute *attr,
30957ac9a364SKalle Valo 			char *buf)
30967ac9a364SKalle Valo {
30977ac9a364SKalle Valo 	struct il_priv *il = dev_get_drvdata(d);
30987ac9a364SKalle Valo 
30997ac9a364SKalle Valo 	if (!il_is_alive(il))
31007ac9a364SKalle Valo 		return -EAGAIN;
31017ac9a364SKalle Valo 
31027ac9a364SKalle Valo 	return sprintf(buf, "%d\n", il3945_hw_get_temperature(il));
31037ac9a364SKalle Valo }
31047ac9a364SKalle Valo 
31052ef00c53SJoe Perches static DEVICE_ATTR(temperature, 0444, il3945_show_temperature, NULL);
31067ac9a364SKalle Valo 
31077ac9a364SKalle Valo static ssize_t
il3945_show_tx_power(struct device * d,struct device_attribute * attr,char * buf)31087ac9a364SKalle Valo il3945_show_tx_power(struct device *d, struct device_attribute *attr, char *buf)
31097ac9a364SKalle Valo {
31107ac9a364SKalle Valo 	struct il_priv *il = dev_get_drvdata(d);
31117ac9a364SKalle Valo 	return sprintf(buf, "%d\n", il->tx_power_user_lmt);
31127ac9a364SKalle Valo }
31137ac9a364SKalle Valo 
31147ac9a364SKalle Valo static ssize_t
il3945_store_tx_power(struct device * d,struct device_attribute * attr,const char * buf,size_t count)31157ac9a364SKalle Valo il3945_store_tx_power(struct device *d, struct device_attribute *attr,
31167ac9a364SKalle Valo 		      const char *buf, size_t count)
31177ac9a364SKalle Valo {
31187ac9a364SKalle Valo 	struct il_priv *il = dev_get_drvdata(d);
31197ac9a364SKalle Valo 	char *p = (char *)buf;
31207ac9a364SKalle Valo 	u32 val;
31217ac9a364SKalle Valo 
31227ac9a364SKalle Valo 	val = simple_strtoul(p, &p, 10);
31237ac9a364SKalle Valo 	if (p == buf)
31247ac9a364SKalle Valo 		IL_INFO(": %s is not in decimal form.\n", buf);
31257ac9a364SKalle Valo 	else
31267ac9a364SKalle Valo 		il3945_hw_reg_set_txpower(il, val);
31277ac9a364SKalle Valo 
31287ac9a364SKalle Valo 	return count;
31297ac9a364SKalle Valo }
31307ac9a364SKalle Valo 
31312ef00c53SJoe Perches static DEVICE_ATTR(tx_power, 0644, il3945_show_tx_power, il3945_store_tx_power);
31327ac9a364SKalle Valo 
31337ac9a364SKalle Valo static ssize_t
il3945_show_flags(struct device * d,struct device_attribute * attr,char * buf)31347ac9a364SKalle Valo il3945_show_flags(struct device *d, struct device_attribute *attr, char *buf)
31357ac9a364SKalle Valo {
31367ac9a364SKalle Valo 	struct il_priv *il = dev_get_drvdata(d);
31377ac9a364SKalle Valo 
31387ac9a364SKalle Valo 	return sprintf(buf, "0x%04X\n", il->active.flags);
31397ac9a364SKalle Valo }
31407ac9a364SKalle Valo 
31417ac9a364SKalle Valo static ssize_t
il3945_store_flags(struct device * d,struct device_attribute * attr,const char * buf,size_t count)31427ac9a364SKalle Valo il3945_store_flags(struct device *d, struct device_attribute *attr,
31437ac9a364SKalle Valo 		   const char *buf, size_t count)
31447ac9a364SKalle Valo {
31457ac9a364SKalle Valo 	struct il_priv *il = dev_get_drvdata(d);
31467ac9a364SKalle Valo 	u32 flags = simple_strtoul(buf, NULL, 0);
31477ac9a364SKalle Valo 
31487ac9a364SKalle Valo 	mutex_lock(&il->mutex);
31497ac9a364SKalle Valo 	if (le32_to_cpu(il->staging.flags) != flags) {
31507ac9a364SKalle Valo 		/* Cancel any currently running scans... */
31517ac9a364SKalle Valo 		if (il_scan_cancel_timeout(il, 100))
31527ac9a364SKalle Valo 			IL_WARN("Could not cancel scan.\n");
31537ac9a364SKalle Valo 		else {
31547ac9a364SKalle Valo 			D_INFO("Committing rxon.flags = 0x%04X\n", flags);
31557ac9a364SKalle Valo 			il->staging.flags = cpu_to_le32(flags);
31567ac9a364SKalle Valo 			il3945_commit_rxon(il);
31577ac9a364SKalle Valo 		}
31587ac9a364SKalle Valo 	}
31597ac9a364SKalle Valo 	mutex_unlock(&il->mutex);
31607ac9a364SKalle Valo 
31617ac9a364SKalle Valo 	return count;
31627ac9a364SKalle Valo }
31637ac9a364SKalle Valo 
31642ef00c53SJoe Perches static DEVICE_ATTR(flags, 0644, il3945_show_flags, il3945_store_flags);
31657ac9a364SKalle Valo 
31667ac9a364SKalle Valo static ssize_t
il3945_show_filter_flags(struct device * d,struct device_attribute * attr,char * buf)31677ac9a364SKalle Valo il3945_show_filter_flags(struct device *d, struct device_attribute *attr,
31687ac9a364SKalle Valo 			 char *buf)
31697ac9a364SKalle Valo {
31707ac9a364SKalle Valo 	struct il_priv *il = dev_get_drvdata(d);
31717ac9a364SKalle Valo 
31727ac9a364SKalle Valo 	return sprintf(buf, "0x%04X\n", le32_to_cpu(il->active.filter_flags));
31737ac9a364SKalle Valo }
31747ac9a364SKalle Valo 
31757ac9a364SKalle Valo static ssize_t
il3945_store_filter_flags(struct device * d,struct device_attribute * attr,const char * buf,size_t count)31767ac9a364SKalle Valo il3945_store_filter_flags(struct device *d, struct device_attribute *attr,
31777ac9a364SKalle Valo 			  const char *buf, size_t count)
31787ac9a364SKalle Valo {
31797ac9a364SKalle Valo 	struct il_priv *il = dev_get_drvdata(d);
31807ac9a364SKalle Valo 	u32 filter_flags = simple_strtoul(buf, NULL, 0);
31817ac9a364SKalle Valo 
31827ac9a364SKalle Valo 	mutex_lock(&il->mutex);
31837ac9a364SKalle Valo 	if (le32_to_cpu(il->staging.filter_flags) != filter_flags) {
31847ac9a364SKalle Valo 		/* Cancel any currently running scans... */
31857ac9a364SKalle Valo 		if (il_scan_cancel_timeout(il, 100))
31867ac9a364SKalle Valo 			IL_WARN("Could not cancel scan.\n");
31877ac9a364SKalle Valo 		else {
31887ac9a364SKalle Valo 			D_INFO("Committing rxon.filter_flags = " "0x%04X\n",
31897ac9a364SKalle Valo 			       filter_flags);
31907ac9a364SKalle Valo 			il->staging.filter_flags = cpu_to_le32(filter_flags);
31917ac9a364SKalle Valo 			il3945_commit_rxon(il);
31927ac9a364SKalle Valo 		}
31937ac9a364SKalle Valo 	}
31947ac9a364SKalle Valo 	mutex_unlock(&il->mutex);
31957ac9a364SKalle Valo 
31967ac9a364SKalle Valo 	return count;
31977ac9a364SKalle Valo }
31987ac9a364SKalle Valo 
31992ef00c53SJoe Perches static DEVICE_ATTR(filter_flags, 0644, il3945_show_filter_flags,
32007ac9a364SKalle Valo 		   il3945_store_filter_flags);
32017ac9a364SKalle Valo 
32027ac9a364SKalle Valo static ssize_t
il3945_show_measurement(struct device * d,struct device_attribute * attr,char * buf)32037ac9a364SKalle Valo il3945_show_measurement(struct device *d, struct device_attribute *attr,
32047ac9a364SKalle Valo 			char *buf)
32057ac9a364SKalle Valo {
32067ac9a364SKalle Valo 	struct il_priv *il = dev_get_drvdata(d);
32077ac9a364SKalle Valo 	struct il_spectrum_notification measure_report;
32087ac9a364SKalle Valo 	u32 size = sizeof(measure_report), len = 0, ofs = 0;
32097ac9a364SKalle Valo 	u8 *data = (u8 *) &measure_report;
32107ac9a364SKalle Valo 	unsigned long flags;
32117ac9a364SKalle Valo 
32127ac9a364SKalle Valo 	spin_lock_irqsave(&il->lock, flags);
32137ac9a364SKalle Valo 	if (!(il->measurement_status & MEASUREMENT_READY)) {
32147ac9a364SKalle Valo 		spin_unlock_irqrestore(&il->lock, flags);
32157ac9a364SKalle Valo 		return 0;
32167ac9a364SKalle Valo 	}
32177ac9a364SKalle Valo 	memcpy(&measure_report, &il->measure_report, size);
32187ac9a364SKalle Valo 	il->measurement_status = 0;
32197ac9a364SKalle Valo 	spin_unlock_irqrestore(&il->lock, flags);
32207ac9a364SKalle Valo 
32217ac9a364SKalle Valo 	while (size && PAGE_SIZE - len) {
32227ac9a364SKalle Valo 		hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
32237ac9a364SKalle Valo 				   PAGE_SIZE - len, true);
32247ac9a364SKalle Valo 		len = strlen(buf);
32257ac9a364SKalle Valo 		if (PAGE_SIZE - len)
32267ac9a364SKalle Valo 			buf[len++] = '\n';
32277ac9a364SKalle Valo 
32287ac9a364SKalle Valo 		ofs += 16;
32297ac9a364SKalle Valo 		size -= min(size, 16U);
32307ac9a364SKalle Valo 	}
32317ac9a364SKalle Valo 
32327ac9a364SKalle Valo 	return len;
32337ac9a364SKalle Valo }
32347ac9a364SKalle Valo 
32357ac9a364SKalle Valo static ssize_t
il3945_store_measurement(struct device * d,struct device_attribute * attr,const char * buf,size_t count)32367ac9a364SKalle Valo il3945_store_measurement(struct device *d, struct device_attribute *attr,
32377ac9a364SKalle Valo 			 const char *buf, size_t count)
32387ac9a364SKalle Valo {
32397ac9a364SKalle Valo 	struct il_priv *il = dev_get_drvdata(d);
32407ac9a364SKalle Valo 	struct ieee80211_measurement_params params = {
32417ac9a364SKalle Valo 		.channel = le16_to_cpu(il->active.channel),
32427ac9a364SKalle Valo 		.start_time = cpu_to_le64(il->_3945.last_tsf),
32437ac9a364SKalle Valo 		.duration = cpu_to_le16(1),
32447ac9a364SKalle Valo 	};
32457ac9a364SKalle Valo 	u8 type = IL_MEASURE_BASIC;
32467ac9a364SKalle Valo 	u8 buffer[32];
32477ac9a364SKalle Valo 	u8 channel;
32487ac9a364SKalle Valo 
32497ac9a364SKalle Valo 	if (count) {
32507ac9a364SKalle Valo 		char *p = buffer;
3251bf99f11dSWolfram Sang 		strscpy(buffer, buf, sizeof(buffer));
32527ac9a364SKalle Valo 		channel = simple_strtoul(p, NULL, 0);
32537ac9a364SKalle Valo 		if (channel)
32547ac9a364SKalle Valo 			params.channel = channel;
32557ac9a364SKalle Valo 
32567ac9a364SKalle Valo 		p = buffer;
32577ac9a364SKalle Valo 		while (*p && *p != ' ')
32587ac9a364SKalle Valo 			p++;
32597ac9a364SKalle Valo 		if (*p)
32607ac9a364SKalle Valo 			type = simple_strtoul(p + 1, NULL, 0);
32617ac9a364SKalle Valo 	}
32627ac9a364SKalle Valo 
32637ac9a364SKalle Valo 	D_INFO("Invoking measurement of type %d on " "channel %d (for '%s')\n",
32647ac9a364SKalle Valo 	       type, params.channel, buf);
32657ac9a364SKalle Valo 	il3945_get_measurement(il, &params, type);
32667ac9a364SKalle Valo 
32677ac9a364SKalle Valo 	return count;
32687ac9a364SKalle Valo }
32697ac9a364SKalle Valo 
32702ef00c53SJoe Perches static DEVICE_ATTR(measurement, 0600, il3945_show_measurement,
32717ac9a364SKalle Valo 		   il3945_store_measurement);
32727ac9a364SKalle Valo 
32737ac9a364SKalle Valo static ssize_t
il3945_store_retry_rate(struct device * d,struct device_attribute * attr,const char * buf,size_t count)32747ac9a364SKalle Valo il3945_store_retry_rate(struct device *d, struct device_attribute *attr,
32757ac9a364SKalle Valo 			const char *buf, size_t count)
32767ac9a364SKalle Valo {
32777ac9a364SKalle Valo 	struct il_priv *il = dev_get_drvdata(d);
32787ac9a364SKalle Valo 
32797ac9a364SKalle Valo 	il->retry_rate = simple_strtoul(buf, NULL, 0);
32807ac9a364SKalle Valo 	if (il->retry_rate <= 0)
32817ac9a364SKalle Valo 		il->retry_rate = 1;
32827ac9a364SKalle Valo 
32837ac9a364SKalle Valo 	return count;
32847ac9a364SKalle Valo }
32857ac9a364SKalle Valo 
32867ac9a364SKalle Valo static ssize_t
il3945_show_retry_rate(struct device * d,struct device_attribute * attr,char * buf)32877ac9a364SKalle Valo il3945_show_retry_rate(struct device *d, struct device_attribute *attr,
32887ac9a364SKalle Valo 		       char *buf)
32897ac9a364SKalle Valo {
32907ac9a364SKalle Valo 	struct il_priv *il = dev_get_drvdata(d);
32917ac9a364SKalle Valo 	return sprintf(buf, "%d", il->retry_rate);
32927ac9a364SKalle Valo }
32937ac9a364SKalle Valo 
32942ef00c53SJoe Perches static DEVICE_ATTR(retry_rate, 0600, il3945_show_retry_rate,
32957ac9a364SKalle Valo 		   il3945_store_retry_rate);
32967ac9a364SKalle Valo 
32977ac9a364SKalle Valo static ssize_t
il3945_show_channels(struct device * d,struct device_attribute * attr,char * buf)32987ac9a364SKalle Valo il3945_show_channels(struct device *d, struct device_attribute *attr, char *buf)
32997ac9a364SKalle Valo {
33007ac9a364SKalle Valo 	/* all this shit doesn't belong into sysfs anyway */
33017ac9a364SKalle Valo 	return 0;
33027ac9a364SKalle Valo }
33037ac9a364SKalle Valo 
33042ef00c53SJoe Perches static DEVICE_ATTR(channels, 0400, il3945_show_channels, NULL);
33057ac9a364SKalle Valo 
33067ac9a364SKalle Valo static ssize_t
il3945_show_antenna(struct device * d,struct device_attribute * attr,char * buf)33077ac9a364SKalle Valo il3945_show_antenna(struct device *d, struct device_attribute *attr, char *buf)
33087ac9a364SKalle Valo {
33097ac9a364SKalle Valo 	struct il_priv *il = dev_get_drvdata(d);
33107ac9a364SKalle Valo 
33117ac9a364SKalle Valo 	if (!il_is_alive(il))
33127ac9a364SKalle Valo 		return -EAGAIN;
33137ac9a364SKalle Valo 
33147ac9a364SKalle Valo 	return sprintf(buf, "%d\n", il3945_mod_params.antenna);
33157ac9a364SKalle Valo }
33167ac9a364SKalle Valo 
33177ac9a364SKalle Valo static ssize_t
il3945_store_antenna(struct device * d,struct device_attribute * attr,const char * buf,size_t count)33187ac9a364SKalle Valo il3945_store_antenna(struct device *d, struct device_attribute *attr,
33197ac9a364SKalle Valo 		     const char *buf, size_t count)
33207ac9a364SKalle Valo {
33217ac9a364SKalle Valo 	struct il_priv *il __maybe_unused = dev_get_drvdata(d);
33227ac9a364SKalle Valo 	int ant;
33237ac9a364SKalle Valo 
33247ac9a364SKalle Valo 	if (count == 0)
33257ac9a364SKalle Valo 		return 0;
33267ac9a364SKalle Valo 
33277ac9a364SKalle Valo 	if (sscanf(buf, "%1i", &ant) != 1) {
33287ac9a364SKalle Valo 		D_INFO("not in hex or decimal form.\n");
33297ac9a364SKalle Valo 		return count;
33307ac9a364SKalle Valo 	}
33317ac9a364SKalle Valo 
33327ac9a364SKalle Valo 	if (ant >= 0 && ant <= 2) {
33337ac9a364SKalle Valo 		D_INFO("Setting antenna select to %d.\n", ant);
33347ac9a364SKalle Valo 		il3945_mod_params.antenna = (enum il3945_antenna)ant;
33357ac9a364SKalle Valo 	} else
33367ac9a364SKalle Valo 		D_INFO("Bad antenna select value %d.\n", ant);
33377ac9a364SKalle Valo 
33387ac9a364SKalle Valo 	return count;
33397ac9a364SKalle Valo }
33407ac9a364SKalle Valo 
33412ef00c53SJoe Perches static DEVICE_ATTR(antenna, 0644, il3945_show_antenna, il3945_store_antenna);
33427ac9a364SKalle Valo 
33437ac9a364SKalle Valo static ssize_t
il3945_show_status(struct device * d,struct device_attribute * attr,char * buf)33447ac9a364SKalle Valo il3945_show_status(struct device *d, struct device_attribute *attr, char *buf)
33457ac9a364SKalle Valo {
33467ac9a364SKalle Valo 	struct il_priv *il = dev_get_drvdata(d);
33477ac9a364SKalle Valo 	if (!il_is_alive(il))
33487ac9a364SKalle Valo 		return -EAGAIN;
33497ac9a364SKalle Valo 	return sprintf(buf, "0x%08x\n", (int)il->status);
33507ac9a364SKalle Valo }
33517ac9a364SKalle Valo 
33522ef00c53SJoe Perches static DEVICE_ATTR(status, 0444, il3945_show_status, NULL);
33537ac9a364SKalle Valo 
33547ac9a364SKalle Valo static ssize_t
il3945_dump_error_log(struct device * d,struct device_attribute * attr,const char * buf,size_t count)33557ac9a364SKalle Valo il3945_dump_error_log(struct device *d, struct device_attribute *attr,
33567ac9a364SKalle Valo 		      const char *buf, size_t count)
33577ac9a364SKalle Valo {
33587ac9a364SKalle Valo 	struct il_priv *il = dev_get_drvdata(d);
33597ac9a364SKalle Valo 	char *p = (char *)buf;
33607ac9a364SKalle Valo 
33617ac9a364SKalle Valo 	if (p[0] == '1')
33627ac9a364SKalle Valo 		il3945_dump_nic_error_log(il);
33637ac9a364SKalle Valo 
33647ac9a364SKalle Valo 	return strnlen(buf, count);
33657ac9a364SKalle Valo }
33667ac9a364SKalle Valo 
33672ef00c53SJoe Perches static DEVICE_ATTR(dump_errors, 0200, NULL, il3945_dump_error_log);
33687ac9a364SKalle Valo 
33697ac9a364SKalle Valo /*****************************************************************************
33707ac9a364SKalle Valo  *
33717ac9a364SKalle Valo  * driver setup and tear down
33727ac9a364SKalle Valo  *
33737ac9a364SKalle Valo  *****************************************************************************/
33747ac9a364SKalle Valo 
3375*1fdeb8b9SJiasheng Jiang static int
il3945_setup_deferred_work(struct il_priv * il)33767ac9a364SKalle Valo il3945_setup_deferred_work(struct il_priv *il)
33777ac9a364SKalle Valo {
33787ac9a364SKalle Valo 	il->workqueue = create_singlethread_workqueue(DRV_NAME);
3379*1fdeb8b9SJiasheng Jiang 	if (!il->workqueue)
3380*1fdeb8b9SJiasheng Jiang 		return -ENOMEM;
33817ac9a364SKalle Valo 
33827ac9a364SKalle Valo 	init_waitqueue_head(&il->wait_command_queue);
33837ac9a364SKalle Valo 
33847ac9a364SKalle Valo 	INIT_WORK(&il->restart, il3945_bg_restart);
33857ac9a364SKalle Valo 	INIT_WORK(&il->rx_replenish, il3945_bg_rx_replenish);
33867ac9a364SKalle Valo 	INIT_DELAYED_WORK(&il->init_alive_start, il3945_bg_init_alive_start);
33877ac9a364SKalle Valo 	INIT_DELAYED_WORK(&il->alive_start, il3945_bg_alive_start);
33887ac9a364SKalle Valo 	INIT_DELAYED_WORK(&il->_3945.rfkill_poll, il3945_rfkill_poll);
33897ac9a364SKalle Valo 
33907ac9a364SKalle Valo 	il_setup_scan_deferred_work(il);
33917ac9a364SKalle Valo 
33927ac9a364SKalle Valo 	il3945_hw_setup_deferred_work(il);
33937ac9a364SKalle Valo 
33942b77839bSKees Cook 	timer_setup(&il->watchdog, il_bg_watchdog, 0);
33957ac9a364SKalle Valo 
3396b81b9d37SAllen Pais 	tasklet_setup(&il->irq_tasklet, il3945_irq_tasklet);
3397*1fdeb8b9SJiasheng Jiang 
3398*1fdeb8b9SJiasheng Jiang 	return 0;
33997ac9a364SKalle Valo }
34007ac9a364SKalle Valo 
34017ac9a364SKalle Valo static void
il3945_cancel_deferred_work(struct il_priv * il)34027ac9a364SKalle Valo il3945_cancel_deferred_work(struct il_priv *il)
34037ac9a364SKalle Valo {
34047ac9a364SKalle Valo 	il3945_hw_cancel_deferred_work(il);
34057ac9a364SKalle Valo 
34067ac9a364SKalle Valo 	cancel_delayed_work_sync(&il->init_alive_start);
34077ac9a364SKalle Valo 	cancel_delayed_work(&il->alive_start);
34087ac9a364SKalle Valo 
34097ac9a364SKalle Valo 	il_cancel_scan_deferred_work(il);
34107ac9a364SKalle Valo }
34117ac9a364SKalle Valo 
34127ac9a364SKalle Valo static struct attribute *il3945_sysfs_entries[] = {
34137ac9a364SKalle Valo 	&dev_attr_antenna.attr,
34147ac9a364SKalle Valo 	&dev_attr_channels.attr,
34157ac9a364SKalle Valo 	&dev_attr_dump_errors.attr,
34167ac9a364SKalle Valo 	&dev_attr_flags.attr,
34177ac9a364SKalle Valo 	&dev_attr_filter_flags.attr,
34187ac9a364SKalle Valo 	&dev_attr_measurement.attr,
34197ac9a364SKalle Valo 	&dev_attr_retry_rate.attr,
34207ac9a364SKalle Valo 	&dev_attr_status.attr,
34217ac9a364SKalle Valo 	&dev_attr_temperature.attr,
34227ac9a364SKalle Valo 	&dev_attr_tx_power.attr,
34237ac9a364SKalle Valo #ifdef CONFIG_IWLEGACY_DEBUG
34247ac9a364SKalle Valo 	&dev_attr_debug_level.attr,
34257ac9a364SKalle Valo #endif
34267ac9a364SKalle Valo 	NULL
34277ac9a364SKalle Valo };
34287ac9a364SKalle Valo 
342964571ca7SArvind Yadav static const struct attribute_group il3945_attribute_group = {
34307ac9a364SKalle Valo 	.name = NULL,		/* put in device directory */
34317ac9a364SKalle Valo 	.attrs = il3945_sysfs_entries,
34327ac9a364SKalle Valo };
34337ac9a364SKalle Valo 
3434ae3cf476SJohannes Berg static struct ieee80211_ops il3945_mac_ops __ro_after_init = {
34357ac9a364SKalle Valo 	.tx = il3945_mac_tx,
3436a790cc3aSAlexander Wetzel 	.wake_tx_queue = ieee80211_handle_wake_tx_queue,
34377ac9a364SKalle Valo 	.start = il3945_mac_start,
34387ac9a364SKalle Valo 	.stop = il3945_mac_stop,
34397ac9a364SKalle Valo 	.add_interface = il_mac_add_interface,
34407ac9a364SKalle Valo 	.remove_interface = il_mac_remove_interface,
34417ac9a364SKalle Valo 	.change_interface = il_mac_change_interface,
34427ac9a364SKalle Valo 	.config = il_mac_config,
34437ac9a364SKalle Valo 	.configure_filter = il3945_configure_filter,
34447ac9a364SKalle Valo 	.set_key = il3945_mac_set_key,
34457ac9a364SKalle Valo 	.conf_tx = il_mac_conf_tx,
34467ac9a364SKalle Valo 	.reset_tsf = il_mac_reset_tsf,
34477ac9a364SKalle Valo 	.bss_info_changed = il_mac_bss_info_changed,
34487ac9a364SKalle Valo 	.hw_scan = il_mac_hw_scan,
34497ac9a364SKalle Valo 	.sta_add = il3945_mac_sta_add,
34507ac9a364SKalle Valo 	.sta_remove = il_mac_sta_remove,
34517ac9a364SKalle Valo 	.tx_last_beacon = il_mac_tx_last_beacon,
34527ac9a364SKalle Valo 	.flush = il_mac_flush,
34537ac9a364SKalle Valo };
34547ac9a364SKalle Valo 
34557ac9a364SKalle Valo static int
il3945_init_drv(struct il_priv * il)34567ac9a364SKalle Valo il3945_init_drv(struct il_priv *il)
34577ac9a364SKalle Valo {
34587ac9a364SKalle Valo 	int ret;
34597ac9a364SKalle Valo 	struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
34607ac9a364SKalle Valo 
34617ac9a364SKalle Valo 	il->retry_rate = 1;
34627ac9a364SKalle Valo 	il->beacon_skb = NULL;
34637ac9a364SKalle Valo 
34647ac9a364SKalle Valo 	spin_lock_init(&il->sta_lock);
34657ac9a364SKalle Valo 	spin_lock_init(&il->hcmd_lock);
34667ac9a364SKalle Valo 
34677ac9a364SKalle Valo 	INIT_LIST_HEAD(&il->free_frames);
34687ac9a364SKalle Valo 
34697ac9a364SKalle Valo 	mutex_init(&il->mutex);
34707ac9a364SKalle Valo 
34717ac9a364SKalle Valo 	il->ieee_channels = NULL;
34727ac9a364SKalle Valo 	il->ieee_rates = NULL;
347357fbcce3SJohannes Berg 	il->band = NL80211_BAND_2GHZ;
34747ac9a364SKalle Valo 
34757ac9a364SKalle Valo 	il->iw_mode = NL80211_IFTYPE_STATION;
34767ac9a364SKalle Valo 	il->missed_beacon_threshold = IL_MISSED_BEACON_THRESHOLD_DEF;
34777ac9a364SKalle Valo 
34787ac9a364SKalle Valo 	/* initialize force reset */
34797ac9a364SKalle Valo 	il->force_reset.reset_duration = IL_DELAY_NEXT_FORCE_FW_RELOAD;
34807ac9a364SKalle Valo 
34817ac9a364SKalle Valo 	if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
34827ac9a364SKalle Valo 		IL_WARN("Unsupported EEPROM version: 0x%04X\n",
34837ac9a364SKalle Valo 			eeprom->version);
34847ac9a364SKalle Valo 		ret = -EINVAL;
34857ac9a364SKalle Valo 		goto err;
34867ac9a364SKalle Valo 	}
34877ac9a364SKalle Valo 	ret = il_init_channel_map(il);
34887ac9a364SKalle Valo 	if (ret) {
34897ac9a364SKalle Valo 		IL_ERR("initializing regulatory failed: %d\n", ret);
34907ac9a364SKalle Valo 		goto err;
34917ac9a364SKalle Valo 	}
34927ac9a364SKalle Valo 
34937ac9a364SKalle Valo 	/* Set up txpower settings in driver for all channels */
34947ac9a364SKalle Valo 	if (il3945_txpower_set_from_eeprom(il)) {
34957ac9a364SKalle Valo 		ret = -EIO;
34967ac9a364SKalle Valo 		goto err_free_channel_map;
34977ac9a364SKalle Valo 	}
34987ac9a364SKalle Valo 
34997ac9a364SKalle Valo 	ret = il_init_geos(il);
35007ac9a364SKalle Valo 	if (ret) {
35017ac9a364SKalle Valo 		IL_ERR("initializing geos failed: %d\n", ret);
35027ac9a364SKalle Valo 		goto err_free_channel_map;
35037ac9a364SKalle Valo 	}
35047ac9a364SKalle Valo 	il3945_init_hw_rates(il, il->ieee_rates);
35057ac9a364SKalle Valo 
35067ac9a364SKalle Valo 	return 0;
35077ac9a364SKalle Valo 
35087ac9a364SKalle Valo err_free_channel_map:
35097ac9a364SKalle Valo 	il_free_channel_map(il);
35107ac9a364SKalle Valo err:
35117ac9a364SKalle Valo 	return ret;
35127ac9a364SKalle Valo }
35137ac9a364SKalle Valo 
35147ac9a364SKalle Valo #define IL3945_MAX_PROBE_REQUEST	200
35157ac9a364SKalle Valo 
35167ac9a364SKalle Valo static int
il3945_setup_mac(struct il_priv * il)35177ac9a364SKalle Valo il3945_setup_mac(struct il_priv *il)
35187ac9a364SKalle Valo {
35197ac9a364SKalle Valo 	int ret;
35207ac9a364SKalle Valo 	struct ieee80211_hw *hw = il->hw;
35217ac9a364SKalle Valo 
35227ac9a364SKalle Valo 	hw->rate_control_algorithm = "iwl-3945-rs";
35237ac9a364SKalle Valo 	hw->sta_data_size = sizeof(struct il3945_sta_priv);
35247ac9a364SKalle Valo 	hw->vif_data_size = sizeof(struct il_vif_priv);
35257ac9a364SKalle Valo 
35267ac9a364SKalle Valo 	/* Tell mac80211 our characteristics */
35277ac9a364SKalle Valo 	ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
35287ac9a364SKalle Valo 	ieee80211_hw_set(hw, SUPPORTS_PS);
35297ac9a364SKalle Valo 	ieee80211_hw_set(hw, SIGNAL_DBM);
35307ac9a364SKalle Valo 	ieee80211_hw_set(hw, SPECTRUM_MGMT);
35317ac9a364SKalle Valo 
35327ac9a364SKalle Valo 	hw->wiphy->interface_modes =
35337ac9a364SKalle Valo 	    BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_ADHOC);
35347ac9a364SKalle Valo 
35357ac9a364SKalle Valo 	hw->wiphy->flags |= WIPHY_FLAG_IBSS_RSN;
35367ac9a364SKalle Valo 	hw->wiphy->regulatory_flags |= REGULATORY_CUSTOM_REG |
35377ac9a364SKalle Valo 				       REGULATORY_DISABLE_BEACON_HINTS;
35387ac9a364SKalle Valo 
35397ac9a364SKalle Valo 	hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
35407ac9a364SKalle Valo 
35417ac9a364SKalle Valo 	hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
35427ac9a364SKalle Valo 	/* we create the 802.11 header and a zero-length SSID element */
35437ac9a364SKalle Valo 	hw->wiphy->max_scan_ie_len = IL3945_MAX_PROBE_REQUEST - 24 - 2;
35447ac9a364SKalle Valo 
35457ac9a364SKalle Valo 	/* Default value; 4 EDCA QOS priorities */
35467ac9a364SKalle Valo 	hw->queues = 4;
35477ac9a364SKalle Valo 
354857fbcce3SJohannes Berg 	if (il->bands[NL80211_BAND_2GHZ].n_channels)
354957fbcce3SJohannes Berg 		il->hw->wiphy->bands[NL80211_BAND_2GHZ] =
355057fbcce3SJohannes Berg 		    &il->bands[NL80211_BAND_2GHZ];
35517ac9a364SKalle Valo 
355257fbcce3SJohannes Berg 	if (il->bands[NL80211_BAND_5GHZ].n_channels)
355357fbcce3SJohannes Berg 		il->hw->wiphy->bands[NL80211_BAND_5GHZ] =
355457fbcce3SJohannes Berg 		    &il->bands[NL80211_BAND_5GHZ];
35557ac9a364SKalle Valo 
35567ac9a364SKalle Valo 	il_leds_init(il);
35577ac9a364SKalle Valo 
3558ae44b502SAndrew Zaborowski 	wiphy_ext_feature_set(il->hw->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST);
3559ae44b502SAndrew Zaborowski 
35607ac9a364SKalle Valo 	ret = ieee80211_register_hw(il->hw);
35617ac9a364SKalle Valo 	if (ret) {
35627ac9a364SKalle Valo 		IL_ERR("Failed to register hw (error %d)\n", ret);
35637ac9a364SKalle Valo 		return ret;
35647ac9a364SKalle Valo 	}
35657ac9a364SKalle Valo 	il->mac80211_registered = 1;
35667ac9a364SKalle Valo 
35677ac9a364SKalle Valo 	return 0;
35687ac9a364SKalle Valo }
35697ac9a364SKalle Valo 
35707ac9a364SKalle Valo static int
il3945_pci_probe(struct pci_dev * pdev,const struct pci_device_id * ent)35717ac9a364SKalle Valo il3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
35727ac9a364SKalle Valo {
35737ac9a364SKalle Valo 	int err = 0;
35747ac9a364SKalle Valo 	struct il_priv *il;
35757ac9a364SKalle Valo 	struct ieee80211_hw *hw;
35767ac9a364SKalle Valo 	struct il_cfg *cfg = (struct il_cfg *)(ent->driver_data);
35777ac9a364SKalle Valo 	struct il3945_eeprom *eeprom;
35787ac9a364SKalle Valo 	unsigned long flags;
35797ac9a364SKalle Valo 
35807ac9a364SKalle Valo 	/***********************
35817ac9a364SKalle Valo 	 * 1. Allocating HW data
35827ac9a364SKalle Valo 	 * ********************/
35837ac9a364SKalle Valo 
35847ac9a364SKalle Valo 	hw = ieee80211_alloc_hw(sizeof(struct il_priv), &il3945_mac_ops);
35857ac9a364SKalle Valo 	if (!hw) {
35867ac9a364SKalle Valo 		err = -ENOMEM;
35877ac9a364SKalle Valo 		goto out;
35887ac9a364SKalle Valo 	}
35897ac9a364SKalle Valo 	il = hw->priv;
35907ac9a364SKalle Valo 	il->hw = hw;
35917ac9a364SKalle Valo 	SET_IEEE80211_DEV(hw, &pdev->dev);
35927ac9a364SKalle Valo 
35937ac9a364SKalle Valo 	il->cmd_queue = IL39_CMD_QUEUE_NUM;
35947ac9a364SKalle Valo 
35957ac9a364SKalle Valo 	D_INFO("*** LOAD DRIVER ***\n");
35967ac9a364SKalle Valo 	il->cfg = cfg;
35977ac9a364SKalle Valo 	il->ops = &il3945_ops;
35987ac9a364SKalle Valo #ifdef CONFIG_IWLEGACY_DEBUGFS
35997ac9a364SKalle Valo 	il->debugfs_ops = &il3945_debugfs_ops;
36007ac9a364SKalle Valo #endif
36017ac9a364SKalle Valo 	il->pci_dev = pdev;
36027ac9a364SKalle Valo 	il->inta_mask = CSR_INI_SET_MASK;
36037ac9a364SKalle Valo 
36047ac9a364SKalle Valo 	/***************************
36057ac9a364SKalle Valo 	 * 2. Initializing PCI bus
36067ac9a364SKalle Valo 	 * *************************/
36077ac9a364SKalle Valo 	pci_disable_link_state(pdev,
36087ac9a364SKalle Valo 			       PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
36097ac9a364SKalle Valo 			       PCIE_LINK_STATE_CLKPM);
36107ac9a364SKalle Valo 
36117ac9a364SKalle Valo 	if (pci_enable_device(pdev)) {
36127ac9a364SKalle Valo 		err = -ENODEV;
36137ac9a364SKalle Valo 		goto out_ieee80211_free_hw;
36147ac9a364SKalle Valo 	}
36157ac9a364SKalle Valo 
36167ac9a364SKalle Valo 	pci_set_master(pdev);
36177ac9a364SKalle Valo 
3618ebe9e651SChristophe JAILLET 	err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
36197ac9a364SKalle Valo 	if (err) {
36207ac9a364SKalle Valo 		IL_WARN("No suitable DMA available.\n");
36217ac9a364SKalle Valo 		goto out_pci_disable_device;
36227ac9a364SKalle Valo 	}
36237ac9a364SKalle Valo 
36247ac9a364SKalle Valo 	pci_set_drvdata(pdev, il);
36257ac9a364SKalle Valo 	err = pci_request_regions(pdev, DRV_NAME);
36267ac9a364SKalle Valo 	if (err)
36277ac9a364SKalle Valo 		goto out_pci_disable_device;
36287ac9a364SKalle Valo 
36297ac9a364SKalle Valo 	/***********************
36307ac9a364SKalle Valo 	 * 3. Read REV Register
36317ac9a364SKalle Valo 	 * ********************/
36327ac9a364SKalle Valo 	il->hw_base = pci_ioremap_bar(pdev, 0);
36337ac9a364SKalle Valo 	if (!il->hw_base) {
36347ac9a364SKalle Valo 		err = -ENODEV;
36357ac9a364SKalle Valo 		goto out_pci_release_regions;
36367ac9a364SKalle Valo 	}
36377ac9a364SKalle Valo 
36387ac9a364SKalle Valo 	D_INFO("pci_resource_len = 0x%08llx\n",
36397ac9a364SKalle Valo 	       (unsigned long long)pci_resource_len(pdev, 0));
36407ac9a364SKalle Valo 	D_INFO("pci_resource_base = %p\n", il->hw_base);
36417ac9a364SKalle Valo 
36427ac9a364SKalle Valo 	/* We disable the RETRY_TIMEOUT register (0x41) to keep
36437ac9a364SKalle Valo 	 * PCI Tx retries from interfering with C3 CPU state */
36447ac9a364SKalle Valo 	pci_write_config_byte(pdev, 0x41, 0x00);
36457ac9a364SKalle Valo 
36467ac9a364SKalle Valo 	/* these spin locks will be used in apm_init and EEPROM access
36477ac9a364SKalle Valo 	 * we should init now
36487ac9a364SKalle Valo 	 */
36497ac9a364SKalle Valo 	spin_lock_init(&il->reg_lock);
36507ac9a364SKalle Valo 	spin_lock_init(&il->lock);
36517ac9a364SKalle Valo 
36527ac9a364SKalle Valo 	/*
36537ac9a364SKalle Valo 	 * stop and reset the on-board processor just in case it is in a
36547ac9a364SKalle Valo 	 * strange state ... like being left stranded by a primary kernel
36557ac9a364SKalle Valo 	 * and this is now the kdump kernel trying to start up
36567ac9a364SKalle Valo 	 */
36577ac9a364SKalle Valo 	_il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
36587ac9a364SKalle Valo 
36597ac9a364SKalle Valo 	/***********************
36607ac9a364SKalle Valo 	 * 4. Read EEPROM
36617ac9a364SKalle Valo 	 * ********************/
36627ac9a364SKalle Valo 
36637ac9a364SKalle Valo 	/* Read the EEPROM */
36647ac9a364SKalle Valo 	err = il_eeprom_init(il);
36657ac9a364SKalle Valo 	if (err) {
36667ac9a364SKalle Valo 		IL_ERR("Unable to init EEPROM\n");
36677ac9a364SKalle Valo 		goto out_iounmap;
36687ac9a364SKalle Valo 	}
36697ac9a364SKalle Valo 	/* MAC Address location in EEPROM same for 3945/4965 */
36707ac9a364SKalle Valo 	eeprom = (struct il3945_eeprom *)il->eeprom;
36717ac9a364SKalle Valo 	D_INFO("MAC address: %pM\n", eeprom->mac_address);
36727ac9a364SKalle Valo 	SET_IEEE80211_PERM_ADDR(il->hw, eeprom->mac_address);
36737ac9a364SKalle Valo 
36747ac9a364SKalle Valo 	/***********************
36757ac9a364SKalle Valo 	 * 5. Setup HW Constants
36767ac9a364SKalle Valo 	 * ********************/
36777ac9a364SKalle Valo 	/* Device-specific setup */
36787ac9a364SKalle Valo 	err = il3945_hw_set_hw_params(il);
36797ac9a364SKalle Valo 	if (err) {
36807ac9a364SKalle Valo 		IL_ERR("failed to set hw settings\n");
36817ac9a364SKalle Valo 		goto out_eeprom_free;
36827ac9a364SKalle Valo 	}
36837ac9a364SKalle Valo 
36847ac9a364SKalle Valo 	/***********************
36857ac9a364SKalle Valo 	 * 6. Setup il
36867ac9a364SKalle Valo 	 * ********************/
36877ac9a364SKalle Valo 
36887ac9a364SKalle Valo 	err = il3945_init_drv(il);
36897ac9a364SKalle Valo 	if (err) {
36907ac9a364SKalle Valo 		IL_ERR("initializing driver failed\n");
36917ac9a364SKalle Valo 		goto out_unset_hw_params;
36927ac9a364SKalle Valo 	}
36937ac9a364SKalle Valo 
36947ac9a364SKalle Valo 	IL_INFO("Detected Intel Wireless WiFi Link %s\n", il->cfg->name);
36957ac9a364SKalle Valo 
36967ac9a364SKalle Valo 	/***********************
36977ac9a364SKalle Valo 	 * 7. Setup Services
36987ac9a364SKalle Valo 	 * ********************/
36997ac9a364SKalle Valo 
37007ac9a364SKalle Valo 	spin_lock_irqsave(&il->lock, flags);
37017ac9a364SKalle Valo 	il_disable_interrupts(il);
37027ac9a364SKalle Valo 	spin_unlock_irqrestore(&il->lock, flags);
37037ac9a364SKalle Valo 
37047ac9a364SKalle Valo 	pci_enable_msi(il->pci_dev);
37057ac9a364SKalle Valo 
37067ac9a364SKalle Valo 	err = request_irq(il->pci_dev->irq, il_isr, IRQF_SHARED, DRV_NAME, il);
37077ac9a364SKalle Valo 	if (err) {
37087ac9a364SKalle Valo 		IL_ERR("Error allocating IRQ %d\n", il->pci_dev->irq);
37097ac9a364SKalle Valo 		goto out_disable_msi;
37107ac9a364SKalle Valo 	}
37117ac9a364SKalle Valo 
37127ac9a364SKalle Valo 	err = sysfs_create_group(&pdev->dev.kobj, &il3945_attribute_group);
37137ac9a364SKalle Valo 	if (err) {
37147ac9a364SKalle Valo 		IL_ERR("failed to create sysfs device attributes\n");
37157ac9a364SKalle Valo 		goto out_release_irq;
37167ac9a364SKalle Valo 	}
37177ac9a364SKalle Valo 
371857fbcce3SJohannes Berg 	il_set_rxon_channel(il, &il->bands[NL80211_BAND_2GHZ].channels[5]);
3719*1fdeb8b9SJiasheng Jiang 	err = il3945_setup_deferred_work(il);
3720*1fdeb8b9SJiasheng Jiang 	if (err)
3721*1fdeb8b9SJiasheng Jiang 		goto out_remove_sysfs;
3722*1fdeb8b9SJiasheng Jiang 
37237ac9a364SKalle Valo 	il3945_setup_handlers(il);
37247ac9a364SKalle Valo 	il_power_initialize(il);
37257ac9a364SKalle Valo 
37267ac9a364SKalle Valo 	/*********************************
37277ac9a364SKalle Valo 	 * 8. Setup and Register mac80211
37287ac9a364SKalle Valo 	 * *******************************/
37297ac9a364SKalle Valo 
37307ac9a364SKalle Valo 	il_enable_interrupts(il);
37317ac9a364SKalle Valo 
37327ac9a364SKalle Valo 	err = il3945_setup_mac(il);
37337ac9a364SKalle Valo 	if (err)
3734*1fdeb8b9SJiasheng Jiang 		goto out_destroy_workqueue;
37357ac9a364SKalle Valo 
373671ee1284SGreg Kroah-Hartman 	il_dbgfs_register(il, DRV_NAME);
37377ac9a364SKalle Valo 
37387ac9a364SKalle Valo 	/* Start monitoring the killswitch */
37397ac9a364SKalle Valo 	queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll, 2 * HZ);
37407ac9a364SKalle Valo 
37417ac9a364SKalle Valo 	return 0;
37427ac9a364SKalle Valo 
3743*1fdeb8b9SJiasheng Jiang out_destroy_workqueue:
37447ac9a364SKalle Valo 	destroy_workqueue(il->workqueue);
37457ac9a364SKalle Valo 	il->workqueue = NULL;
3746*1fdeb8b9SJiasheng Jiang out_remove_sysfs:
37477ac9a364SKalle Valo 	sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
37487ac9a364SKalle Valo out_release_irq:
37497ac9a364SKalle Valo 	free_irq(il->pci_dev->irq, il);
37507ac9a364SKalle Valo out_disable_msi:
37517ac9a364SKalle Valo 	pci_disable_msi(il->pci_dev);
37527ac9a364SKalle Valo 	il_free_geos(il);
37537ac9a364SKalle Valo 	il_free_channel_map(il);
37547ac9a364SKalle Valo out_unset_hw_params:
37557ac9a364SKalle Valo 	il3945_unset_hw_params(il);
37567ac9a364SKalle Valo out_eeprom_free:
37577ac9a364SKalle Valo 	il_eeprom_free(il);
37587ac9a364SKalle Valo out_iounmap:
37597ac9a364SKalle Valo 	iounmap(il->hw_base);
37607ac9a364SKalle Valo out_pci_release_regions:
37617ac9a364SKalle Valo 	pci_release_regions(pdev);
37627ac9a364SKalle Valo out_pci_disable_device:
37637ac9a364SKalle Valo 	pci_disable_device(pdev);
37647ac9a364SKalle Valo out_ieee80211_free_hw:
37657ac9a364SKalle Valo 	ieee80211_free_hw(il->hw);
37667ac9a364SKalle Valo out:
37677ac9a364SKalle Valo 	return err;
37687ac9a364SKalle Valo }
37697ac9a364SKalle Valo 
37707ac9a364SKalle Valo static void
il3945_pci_remove(struct pci_dev * pdev)37717ac9a364SKalle Valo il3945_pci_remove(struct pci_dev *pdev)
37727ac9a364SKalle Valo {
37737ac9a364SKalle Valo 	struct il_priv *il = pci_get_drvdata(pdev);
37747ac9a364SKalle Valo 	unsigned long flags;
37757ac9a364SKalle Valo 
37767ac9a364SKalle Valo 	if (!il)
37777ac9a364SKalle Valo 		return;
37787ac9a364SKalle Valo 
37797ac9a364SKalle Valo 	D_INFO("*** UNLOAD DRIVER ***\n");
37807ac9a364SKalle Valo 
37817ac9a364SKalle Valo 	il_dbgfs_unregister(il);
37827ac9a364SKalle Valo 
37837ac9a364SKalle Valo 	set_bit(S_EXIT_PENDING, &il->status);
37847ac9a364SKalle Valo 
37857ac9a364SKalle Valo 	il_leds_exit(il);
37867ac9a364SKalle Valo 
37877ac9a364SKalle Valo 	if (il->mac80211_registered) {
37887ac9a364SKalle Valo 		ieee80211_unregister_hw(il->hw);
37897ac9a364SKalle Valo 		il->mac80211_registered = 0;
37907ac9a364SKalle Valo 	} else {
37917ac9a364SKalle Valo 		il3945_down(il);
37927ac9a364SKalle Valo 	}
37937ac9a364SKalle Valo 
37947ac9a364SKalle Valo 	/*
37957ac9a364SKalle Valo 	 * Make sure device is reset to low power before unloading driver.
37967ac9a364SKalle Valo 	 * This may be redundant with il_down(), but there are paths to
37977ac9a364SKalle Valo 	 * run il_down() without calling apm_ops.stop(), and there are
37987ac9a364SKalle Valo 	 * paths to avoid running il_down() at all before leaving driver.
37997ac9a364SKalle Valo 	 * This (inexpensive) call *makes sure* device is reset.
38007ac9a364SKalle Valo 	 */
38017ac9a364SKalle Valo 	il_apm_stop(il);
38027ac9a364SKalle Valo 
38037ac9a364SKalle Valo 	/* make sure we flush any pending irq or
38047ac9a364SKalle Valo 	 * tasklet for the driver
38057ac9a364SKalle Valo 	 */
38067ac9a364SKalle Valo 	spin_lock_irqsave(&il->lock, flags);
38077ac9a364SKalle Valo 	il_disable_interrupts(il);
38087ac9a364SKalle Valo 	spin_unlock_irqrestore(&il->lock, flags);
38097ac9a364SKalle Valo 
38107ac9a364SKalle Valo 	il3945_synchronize_irq(il);
38117ac9a364SKalle Valo 
38127ac9a364SKalle Valo 	sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
38137ac9a364SKalle Valo 
38147ac9a364SKalle Valo 	cancel_delayed_work_sync(&il->_3945.rfkill_poll);
38157ac9a364SKalle Valo 
38167ac9a364SKalle Valo 	il3945_dealloc_ucode_pci(il);
38177ac9a364SKalle Valo 
38187ac9a364SKalle Valo 	if (il->rxq.bd)
38197ac9a364SKalle Valo 		il3945_rx_queue_free(il, &il->rxq);
38207ac9a364SKalle Valo 	il3945_hw_txq_ctx_free(il);
38217ac9a364SKalle Valo 
38227ac9a364SKalle Valo 	il3945_unset_hw_params(il);
38237ac9a364SKalle Valo 
38247ac9a364SKalle Valo 	/*netif_stop_queue(dev); */
38257ac9a364SKalle Valo 
38267ac9a364SKalle Valo 	/* ieee80211_unregister_hw calls il3945_mac_stop, which flushes
38277ac9a364SKalle Valo 	 * il->workqueue... so we can't take down the workqueue
38287ac9a364SKalle Valo 	 * until now... */
38297ac9a364SKalle Valo 	destroy_workqueue(il->workqueue);
38307ac9a364SKalle Valo 	il->workqueue = NULL;
38317ac9a364SKalle Valo 
38327ac9a364SKalle Valo 	free_irq(pdev->irq, il);
38337ac9a364SKalle Valo 	pci_disable_msi(pdev);
38347ac9a364SKalle Valo 
38357ac9a364SKalle Valo 	iounmap(il->hw_base);
38367ac9a364SKalle Valo 	pci_release_regions(pdev);
38377ac9a364SKalle Valo 	pci_disable_device(pdev);
38387ac9a364SKalle Valo 
38397ac9a364SKalle Valo 	il_free_channel_map(il);
38407ac9a364SKalle Valo 	il_free_geos(il);
38417ac9a364SKalle Valo 	kfree(il->scan_cmd);
38427ac9a364SKalle Valo 	dev_kfree_skb(il->beacon_skb);
38437ac9a364SKalle Valo 	ieee80211_free_hw(il->hw);
38447ac9a364SKalle Valo }
38457ac9a364SKalle Valo 
38467ac9a364SKalle Valo /*****************************************************************************
38477ac9a364SKalle Valo  *
38487ac9a364SKalle Valo  * driver and module entry point
38497ac9a364SKalle Valo  *
38507ac9a364SKalle Valo  *****************************************************************************/
38517ac9a364SKalle Valo 
38527ac9a364SKalle Valo static struct pci_driver il3945_driver = {
38537ac9a364SKalle Valo 	.name = DRV_NAME,
38547ac9a364SKalle Valo 	.id_table = il3945_hw_card_ids,
38557ac9a364SKalle Valo 	.probe = il3945_pci_probe,
38567ac9a364SKalle Valo 	.remove = il3945_pci_remove,
38577ac9a364SKalle Valo 	.driver.pm = IL_LEGACY_PM_OPS,
38587ac9a364SKalle Valo };
38597ac9a364SKalle Valo 
38607ac9a364SKalle Valo static int __init
il3945_init(void)38617ac9a364SKalle Valo il3945_init(void)
38627ac9a364SKalle Valo {
38637ac9a364SKalle Valo 
38647ac9a364SKalle Valo 	int ret;
38657ac9a364SKalle Valo 	pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
38667ac9a364SKalle Valo 	pr_info(DRV_COPYRIGHT "\n");
38677ac9a364SKalle Valo 
3868ae3cf476SJohannes Berg 	/*
3869ae3cf476SJohannes Berg 	 * Disabling hardware scan means that mac80211 will perform scans
3870ae3cf476SJohannes Berg 	 * "the hard way", rather than using device's scan.
3871ae3cf476SJohannes Berg 	 */
3872ae3cf476SJohannes Berg 	if (il3945_mod_params.disable_hw_scan) {
3873ae3cf476SJohannes Berg 		pr_info("hw_scan is disabled\n");
3874ae3cf476SJohannes Berg 		il3945_mac_ops.hw_scan = NULL;
3875ae3cf476SJohannes Berg 	}
3876ae3cf476SJohannes Berg 
38777ac9a364SKalle Valo 	ret = il3945_rate_control_register();
38787ac9a364SKalle Valo 	if (ret) {
38797ac9a364SKalle Valo 		pr_err("Unable to register rate control algorithm: %d\n", ret);
38807ac9a364SKalle Valo 		return ret;
38817ac9a364SKalle Valo 	}
38827ac9a364SKalle Valo 
38837ac9a364SKalle Valo 	ret = pci_register_driver(&il3945_driver);
38847ac9a364SKalle Valo 	if (ret) {
38857ac9a364SKalle Valo 		pr_err("Unable to initialize PCI module\n");
38867ac9a364SKalle Valo 		goto error_register;
38877ac9a364SKalle Valo 	}
38887ac9a364SKalle Valo 
38897ac9a364SKalle Valo 	return ret;
38907ac9a364SKalle Valo 
38917ac9a364SKalle Valo error_register:
38927ac9a364SKalle Valo 	il3945_rate_control_unregister();
38937ac9a364SKalle Valo 	return ret;
38947ac9a364SKalle Valo }
38957ac9a364SKalle Valo 
38967ac9a364SKalle Valo static void __exit
il3945_exit(void)38977ac9a364SKalle Valo il3945_exit(void)
38987ac9a364SKalle Valo {
38997ac9a364SKalle Valo 	pci_unregister_driver(&il3945_driver);
39007ac9a364SKalle Valo 	il3945_rate_control_unregister();
39017ac9a364SKalle Valo }
39027ac9a364SKalle Valo 
39037ac9a364SKalle Valo MODULE_FIRMWARE(IL3945_MODULE_FIRMWARE(IL3945_UCODE_API_MAX));
39047ac9a364SKalle Valo 
39052ef00c53SJoe Perches module_param_named(antenna, il3945_mod_params.antenna, int, 0444);
39067ac9a364SKalle Valo MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
39072ef00c53SJoe Perches module_param_named(swcrypto, il3945_mod_params.sw_crypto, int, 0444);
39087ac9a364SKalle Valo MODULE_PARM_DESC(swcrypto, "using software crypto (default 1 [software])");
39097ac9a364SKalle Valo module_param_named(disable_hw_scan, il3945_mod_params.disable_hw_scan, int,
39102ef00c53SJoe Perches 		   0444);
39117ac9a364SKalle Valo MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 1)");
39127ac9a364SKalle Valo #ifdef CONFIG_IWLEGACY_DEBUG
39132ef00c53SJoe Perches module_param_named(debug, il_debug_level, uint, 0644);
39147ac9a364SKalle Valo MODULE_PARM_DESC(debug, "debug output mask");
39157ac9a364SKalle Valo #endif
39162ef00c53SJoe Perches module_param_named(fw_restart, il3945_mod_params.restart_fw, int, 0444);
39177ac9a364SKalle Valo MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
39187ac9a364SKalle Valo 
39197ac9a364SKalle Valo module_exit(il3945_exit);
39207ac9a364SKalle Valo module_init(il3945_init);
3921