1ca47d344SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
2423e3ce3SKalle Valo /*
3423e3ce3SKalle Valo *
4423e3ce3SKalle Valo * Broadcom B43legacy wireless driver
5423e3ce3SKalle Valo *
6423e3ce3SKalle Valo * Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
7423e3ce3SKalle Valo * Copyright (c) 2005-2008 Stefano Brivio <stefano.brivio@polimi.it>
8423e3ce3SKalle Valo * Copyright (c) 2005, 2006 Michael Buesch <m@bues.ch>
9423e3ce3SKalle Valo * Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
10423e3ce3SKalle Valo * Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
11423e3ce3SKalle Valo * Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
12423e3ce3SKalle Valo *
13423e3ce3SKalle Valo * Some parts of the code in this file are derived from the ipw2200
14423e3ce3SKalle Valo * driver Copyright(c) 2003 - 2004 Intel Corporation.
15423e3ce3SKalle Valo
16423e3ce3SKalle Valo */
17423e3ce3SKalle Valo
18423e3ce3SKalle Valo #include <linux/delay.h>
19423e3ce3SKalle Valo #include <linux/init.h>
20423e3ce3SKalle Valo #include <linux/module.h>
21423e3ce3SKalle Valo #include <linux/if_arp.h>
22423e3ce3SKalle Valo #include <linux/etherdevice.h>
23423e3ce3SKalle Valo #include <linux/firmware.h>
24423e3ce3SKalle Valo #include <linux/workqueue.h>
25174cd4b1SIngo Molnar #include <linux/sched/signal.h>
26423e3ce3SKalle Valo #include <linux/skbuff.h>
27423e3ce3SKalle Valo #include <linux/dma-mapping.h>
28423e3ce3SKalle Valo #include <linux/slab.h>
29423e3ce3SKalle Valo #include <net/dst.h>
30423e3ce3SKalle Valo #include <asm/unaligned.h>
31423e3ce3SKalle Valo
32423e3ce3SKalle Valo #include "b43legacy.h"
33423e3ce3SKalle Valo #include "main.h"
34423e3ce3SKalle Valo #include "debugfs.h"
35423e3ce3SKalle Valo #include "phy.h"
36423e3ce3SKalle Valo #include "dma.h"
37423e3ce3SKalle Valo #include "pio.h"
38423e3ce3SKalle Valo #include "sysfs.h"
39423e3ce3SKalle Valo #include "xmit.h"
40423e3ce3SKalle Valo #include "radio.h"
41423e3ce3SKalle Valo
42423e3ce3SKalle Valo
43423e3ce3SKalle Valo MODULE_DESCRIPTION("Broadcom B43legacy wireless driver");
44423e3ce3SKalle Valo MODULE_AUTHOR("Martin Langer");
45423e3ce3SKalle Valo MODULE_AUTHOR("Stefano Brivio");
46423e3ce3SKalle Valo MODULE_AUTHOR("Michael Buesch");
47423e3ce3SKalle Valo MODULE_LICENSE("GPL");
48423e3ce3SKalle Valo
49423e3ce3SKalle Valo MODULE_FIRMWARE("b43legacy/ucode2.fw");
50423e3ce3SKalle Valo MODULE_FIRMWARE("b43legacy/ucode4.fw");
51423e3ce3SKalle Valo
52423e3ce3SKalle Valo #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
53423e3ce3SKalle Valo static int modparam_pio;
54423e3ce3SKalle Valo module_param_named(pio, modparam_pio, int, 0444);
55423e3ce3SKalle Valo MODULE_PARM_DESC(pio, "enable(1) / disable(0) PIO mode");
56423e3ce3SKalle Valo #elif defined(CONFIG_B43LEGACY_DMA)
57423e3ce3SKalle Valo # define modparam_pio 0
58423e3ce3SKalle Valo #elif defined(CONFIG_B43LEGACY_PIO)
59423e3ce3SKalle Valo # define modparam_pio 1
60423e3ce3SKalle Valo #endif
61423e3ce3SKalle Valo
62423e3ce3SKalle Valo static int modparam_bad_frames_preempt;
63423e3ce3SKalle Valo module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
64423e3ce3SKalle Valo MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames"
65423e3ce3SKalle Valo " Preemption");
66423e3ce3SKalle Valo
67423e3ce3SKalle Valo static char modparam_fwpostfix[16];
68423e3ce3SKalle Valo module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444);
69423e3ce3SKalle Valo MODULE_PARM_DESC(fwpostfix, "Postfix for the firmware files to load.");
70423e3ce3SKalle Valo
71423e3ce3SKalle Valo /* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */
72423e3ce3SKalle Valo static const struct ssb_device_id b43legacy_ssb_tbl[] = {
73423e3ce3SKalle Valo SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 2),
74423e3ce3SKalle Valo SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 4),
75423e3ce3SKalle Valo {},
76423e3ce3SKalle Valo };
77423e3ce3SKalle Valo MODULE_DEVICE_TABLE(ssb, b43legacy_ssb_tbl);
78423e3ce3SKalle Valo
79423e3ce3SKalle Valo
80423e3ce3SKalle Valo /* Channel and ratetables are shared for all devices.
81423e3ce3SKalle Valo * They can't be const, because ieee80211 puts some precalculated
82423e3ce3SKalle Valo * data in there. This data is the same for all devices, so we don't
83423e3ce3SKalle Valo * get concurrency issues */
84423e3ce3SKalle Valo #define RATETAB_ENT(_rateid, _flags) \
85423e3ce3SKalle Valo { \
86423e3ce3SKalle Valo .bitrate = B43legacy_RATE_TO_100KBPS(_rateid), \
87423e3ce3SKalle Valo .hw_value = (_rateid), \
88423e3ce3SKalle Valo .flags = (_flags), \
89423e3ce3SKalle Valo }
90423e3ce3SKalle Valo /*
91423e3ce3SKalle Valo * NOTE: When changing this, sync with xmit.c's
92423e3ce3SKalle Valo * b43legacy_plcp_get_bitrate_idx_* functions!
93423e3ce3SKalle Valo */
94423e3ce3SKalle Valo static struct ieee80211_rate __b43legacy_ratetable[] = {
95423e3ce3SKalle Valo RATETAB_ENT(B43legacy_CCK_RATE_1MB, 0),
96423e3ce3SKalle Valo RATETAB_ENT(B43legacy_CCK_RATE_2MB, IEEE80211_RATE_SHORT_PREAMBLE),
97423e3ce3SKalle Valo RATETAB_ENT(B43legacy_CCK_RATE_5MB, IEEE80211_RATE_SHORT_PREAMBLE),
98423e3ce3SKalle Valo RATETAB_ENT(B43legacy_CCK_RATE_11MB, IEEE80211_RATE_SHORT_PREAMBLE),
99423e3ce3SKalle Valo RATETAB_ENT(B43legacy_OFDM_RATE_6MB, 0),
100423e3ce3SKalle Valo RATETAB_ENT(B43legacy_OFDM_RATE_9MB, 0),
101423e3ce3SKalle Valo RATETAB_ENT(B43legacy_OFDM_RATE_12MB, 0),
102423e3ce3SKalle Valo RATETAB_ENT(B43legacy_OFDM_RATE_18MB, 0),
103423e3ce3SKalle Valo RATETAB_ENT(B43legacy_OFDM_RATE_24MB, 0),
104423e3ce3SKalle Valo RATETAB_ENT(B43legacy_OFDM_RATE_36MB, 0),
105423e3ce3SKalle Valo RATETAB_ENT(B43legacy_OFDM_RATE_48MB, 0),
106423e3ce3SKalle Valo RATETAB_ENT(B43legacy_OFDM_RATE_54MB, 0),
107423e3ce3SKalle Valo };
108423e3ce3SKalle Valo #define b43legacy_b_ratetable (__b43legacy_ratetable + 0)
109423e3ce3SKalle Valo #define b43legacy_b_ratetable_size 4
110423e3ce3SKalle Valo #define b43legacy_g_ratetable (__b43legacy_ratetable + 0)
111423e3ce3SKalle Valo #define b43legacy_g_ratetable_size 12
112423e3ce3SKalle Valo
113423e3ce3SKalle Valo #define CHANTAB_ENT(_chanid, _freq) \
114423e3ce3SKalle Valo { \
115423e3ce3SKalle Valo .center_freq = (_freq), \
116423e3ce3SKalle Valo .hw_value = (_chanid), \
117423e3ce3SKalle Valo }
118423e3ce3SKalle Valo static struct ieee80211_channel b43legacy_bg_chantable[] = {
119423e3ce3SKalle Valo CHANTAB_ENT(1, 2412),
120423e3ce3SKalle Valo CHANTAB_ENT(2, 2417),
121423e3ce3SKalle Valo CHANTAB_ENT(3, 2422),
122423e3ce3SKalle Valo CHANTAB_ENT(4, 2427),
123423e3ce3SKalle Valo CHANTAB_ENT(5, 2432),
124423e3ce3SKalle Valo CHANTAB_ENT(6, 2437),
125423e3ce3SKalle Valo CHANTAB_ENT(7, 2442),
126423e3ce3SKalle Valo CHANTAB_ENT(8, 2447),
127423e3ce3SKalle Valo CHANTAB_ENT(9, 2452),
128423e3ce3SKalle Valo CHANTAB_ENT(10, 2457),
129423e3ce3SKalle Valo CHANTAB_ENT(11, 2462),
130423e3ce3SKalle Valo CHANTAB_ENT(12, 2467),
131423e3ce3SKalle Valo CHANTAB_ENT(13, 2472),
132423e3ce3SKalle Valo CHANTAB_ENT(14, 2484),
133423e3ce3SKalle Valo };
134423e3ce3SKalle Valo
135423e3ce3SKalle Valo static struct ieee80211_supported_band b43legacy_band_2GHz_BPHY = {
136423e3ce3SKalle Valo .channels = b43legacy_bg_chantable,
137423e3ce3SKalle Valo .n_channels = ARRAY_SIZE(b43legacy_bg_chantable),
138423e3ce3SKalle Valo .bitrates = b43legacy_b_ratetable,
139423e3ce3SKalle Valo .n_bitrates = b43legacy_b_ratetable_size,
140423e3ce3SKalle Valo };
141423e3ce3SKalle Valo
142423e3ce3SKalle Valo static struct ieee80211_supported_band b43legacy_band_2GHz_GPHY = {
143423e3ce3SKalle Valo .channels = b43legacy_bg_chantable,
144423e3ce3SKalle Valo .n_channels = ARRAY_SIZE(b43legacy_bg_chantable),
145423e3ce3SKalle Valo .bitrates = b43legacy_g_ratetable,
146423e3ce3SKalle Valo .n_bitrates = b43legacy_g_ratetable_size,
147423e3ce3SKalle Valo };
148423e3ce3SKalle Valo
149423e3ce3SKalle Valo static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev);
150423e3ce3SKalle Valo static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev);
151423e3ce3SKalle Valo static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev);
152423e3ce3SKalle Valo static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev);
153423e3ce3SKalle Valo
154423e3ce3SKalle Valo
b43legacy_ratelimit(struct b43legacy_wl * wl)155423e3ce3SKalle Valo static int b43legacy_ratelimit(struct b43legacy_wl *wl)
156423e3ce3SKalle Valo {
157423e3ce3SKalle Valo if (!wl || !wl->current_dev)
158423e3ce3SKalle Valo return 1;
159423e3ce3SKalle Valo if (b43legacy_status(wl->current_dev) < B43legacy_STAT_STARTED)
160423e3ce3SKalle Valo return 1;
161423e3ce3SKalle Valo /* We are up and running.
162423e3ce3SKalle Valo * Ratelimit the messages to avoid DoS over the net. */
163423e3ce3SKalle Valo return net_ratelimit();
164423e3ce3SKalle Valo }
165423e3ce3SKalle Valo
b43legacyinfo(struct b43legacy_wl * wl,const char * fmt,...)166423e3ce3SKalle Valo void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...)
167423e3ce3SKalle Valo {
168423e3ce3SKalle Valo struct va_format vaf;
169423e3ce3SKalle Valo va_list args;
170423e3ce3SKalle Valo
171423e3ce3SKalle Valo if (!b43legacy_ratelimit(wl))
172423e3ce3SKalle Valo return;
173423e3ce3SKalle Valo
174423e3ce3SKalle Valo va_start(args, fmt);
175423e3ce3SKalle Valo
176423e3ce3SKalle Valo vaf.fmt = fmt;
177423e3ce3SKalle Valo vaf.va = &args;
178423e3ce3SKalle Valo
179423e3ce3SKalle Valo printk(KERN_INFO "b43legacy-%s: %pV",
180423e3ce3SKalle Valo (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
181423e3ce3SKalle Valo
182423e3ce3SKalle Valo va_end(args);
183423e3ce3SKalle Valo }
184423e3ce3SKalle Valo
b43legacyerr(struct b43legacy_wl * wl,const char * fmt,...)185423e3ce3SKalle Valo void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...)
186423e3ce3SKalle Valo {
187423e3ce3SKalle Valo struct va_format vaf;
188423e3ce3SKalle Valo va_list args;
189423e3ce3SKalle Valo
190423e3ce3SKalle Valo if (!b43legacy_ratelimit(wl))
191423e3ce3SKalle Valo return;
192423e3ce3SKalle Valo
193423e3ce3SKalle Valo va_start(args, fmt);
194423e3ce3SKalle Valo
195423e3ce3SKalle Valo vaf.fmt = fmt;
196423e3ce3SKalle Valo vaf.va = &args;
197423e3ce3SKalle Valo
198423e3ce3SKalle Valo printk(KERN_ERR "b43legacy-%s ERROR: %pV",
199423e3ce3SKalle Valo (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
200423e3ce3SKalle Valo
201423e3ce3SKalle Valo va_end(args);
202423e3ce3SKalle Valo }
203423e3ce3SKalle Valo
b43legacywarn(struct b43legacy_wl * wl,const char * fmt,...)204423e3ce3SKalle Valo void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...)
205423e3ce3SKalle Valo {
206423e3ce3SKalle Valo struct va_format vaf;
207423e3ce3SKalle Valo va_list args;
208423e3ce3SKalle Valo
209423e3ce3SKalle Valo if (!b43legacy_ratelimit(wl))
210423e3ce3SKalle Valo return;
211423e3ce3SKalle Valo
212423e3ce3SKalle Valo va_start(args, fmt);
213423e3ce3SKalle Valo
214423e3ce3SKalle Valo vaf.fmt = fmt;
215423e3ce3SKalle Valo vaf.va = &args;
216423e3ce3SKalle Valo
217423e3ce3SKalle Valo printk(KERN_WARNING "b43legacy-%s warning: %pV",
218423e3ce3SKalle Valo (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
219423e3ce3SKalle Valo
220423e3ce3SKalle Valo va_end(args);
221423e3ce3SKalle Valo }
222423e3ce3SKalle Valo
223423e3ce3SKalle Valo #if B43legacy_DEBUG
b43legacydbg(struct b43legacy_wl * wl,const char * fmt,...)224423e3ce3SKalle Valo void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...)
225423e3ce3SKalle Valo {
226423e3ce3SKalle Valo struct va_format vaf;
227423e3ce3SKalle Valo va_list args;
228423e3ce3SKalle Valo
229423e3ce3SKalle Valo va_start(args, fmt);
230423e3ce3SKalle Valo
231423e3ce3SKalle Valo vaf.fmt = fmt;
232423e3ce3SKalle Valo vaf.va = &args;
233423e3ce3SKalle Valo
234423e3ce3SKalle Valo printk(KERN_DEBUG "b43legacy-%s debug: %pV",
235423e3ce3SKalle Valo (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
236423e3ce3SKalle Valo
237423e3ce3SKalle Valo va_end(args);
238423e3ce3SKalle Valo }
239423e3ce3SKalle Valo #endif /* DEBUG */
240423e3ce3SKalle Valo
b43legacy_ram_write(struct b43legacy_wldev * dev,u16 offset,u32 val)241423e3ce3SKalle Valo static void b43legacy_ram_write(struct b43legacy_wldev *dev, u16 offset,
242423e3ce3SKalle Valo u32 val)
243423e3ce3SKalle Valo {
244423e3ce3SKalle Valo u32 status;
245423e3ce3SKalle Valo
246423e3ce3SKalle Valo B43legacy_WARN_ON(offset % 4 != 0);
247423e3ce3SKalle Valo
248423e3ce3SKalle Valo status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
249423e3ce3SKalle Valo if (status & B43legacy_MACCTL_BE)
250423e3ce3SKalle Valo val = swab32(val);
251423e3ce3SKalle Valo
252423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset);
253423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_RAM_DATA, val);
254423e3ce3SKalle Valo }
255423e3ce3SKalle Valo
256423e3ce3SKalle Valo static inline
b43legacy_shm_control_word(struct b43legacy_wldev * dev,u16 routing,u16 offset)257423e3ce3SKalle Valo void b43legacy_shm_control_word(struct b43legacy_wldev *dev,
258423e3ce3SKalle Valo u16 routing, u16 offset)
259423e3ce3SKalle Valo {
260423e3ce3SKalle Valo u32 control;
261423e3ce3SKalle Valo
262423e3ce3SKalle Valo /* "offset" is the WORD offset. */
263423e3ce3SKalle Valo
264423e3ce3SKalle Valo control = routing;
265423e3ce3SKalle Valo control <<= 16;
266423e3ce3SKalle Valo control |= offset;
267423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_SHM_CONTROL, control);
268423e3ce3SKalle Valo }
269423e3ce3SKalle Valo
b43legacy_shm_read32(struct b43legacy_wldev * dev,u16 routing,u16 offset)270423e3ce3SKalle Valo u32 b43legacy_shm_read32(struct b43legacy_wldev *dev,
271423e3ce3SKalle Valo u16 routing, u16 offset)
272423e3ce3SKalle Valo {
273423e3ce3SKalle Valo u32 ret;
274423e3ce3SKalle Valo
275423e3ce3SKalle Valo if (routing == B43legacy_SHM_SHARED) {
276423e3ce3SKalle Valo B43legacy_WARN_ON((offset & 0x0001) != 0);
277423e3ce3SKalle Valo if (offset & 0x0003) {
278423e3ce3SKalle Valo /* Unaligned access */
279423e3ce3SKalle Valo b43legacy_shm_control_word(dev, routing, offset >> 2);
280423e3ce3SKalle Valo ret = b43legacy_read16(dev,
281423e3ce3SKalle Valo B43legacy_MMIO_SHM_DATA_UNALIGNED);
282423e3ce3SKalle Valo ret <<= 16;
283423e3ce3SKalle Valo b43legacy_shm_control_word(dev, routing,
284423e3ce3SKalle Valo (offset >> 2) + 1);
285423e3ce3SKalle Valo ret |= b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
286423e3ce3SKalle Valo
287423e3ce3SKalle Valo return ret;
288423e3ce3SKalle Valo }
289423e3ce3SKalle Valo offset >>= 2;
290423e3ce3SKalle Valo }
291423e3ce3SKalle Valo b43legacy_shm_control_word(dev, routing, offset);
292423e3ce3SKalle Valo ret = b43legacy_read32(dev, B43legacy_MMIO_SHM_DATA);
293423e3ce3SKalle Valo
294423e3ce3SKalle Valo return ret;
295423e3ce3SKalle Valo }
296423e3ce3SKalle Valo
b43legacy_shm_read16(struct b43legacy_wldev * dev,u16 routing,u16 offset)297423e3ce3SKalle Valo u16 b43legacy_shm_read16(struct b43legacy_wldev *dev,
298423e3ce3SKalle Valo u16 routing, u16 offset)
299423e3ce3SKalle Valo {
300423e3ce3SKalle Valo u16 ret;
301423e3ce3SKalle Valo
302423e3ce3SKalle Valo if (routing == B43legacy_SHM_SHARED) {
303423e3ce3SKalle Valo B43legacy_WARN_ON((offset & 0x0001) != 0);
304423e3ce3SKalle Valo if (offset & 0x0003) {
305423e3ce3SKalle Valo /* Unaligned access */
306423e3ce3SKalle Valo b43legacy_shm_control_word(dev, routing, offset >> 2);
307423e3ce3SKalle Valo ret = b43legacy_read16(dev,
308423e3ce3SKalle Valo B43legacy_MMIO_SHM_DATA_UNALIGNED);
309423e3ce3SKalle Valo
310423e3ce3SKalle Valo return ret;
311423e3ce3SKalle Valo }
312423e3ce3SKalle Valo offset >>= 2;
313423e3ce3SKalle Valo }
314423e3ce3SKalle Valo b43legacy_shm_control_word(dev, routing, offset);
315423e3ce3SKalle Valo ret = b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
316423e3ce3SKalle Valo
317423e3ce3SKalle Valo return ret;
318423e3ce3SKalle Valo }
319423e3ce3SKalle Valo
b43legacy_shm_write32(struct b43legacy_wldev * dev,u16 routing,u16 offset,u32 value)320423e3ce3SKalle Valo void b43legacy_shm_write32(struct b43legacy_wldev *dev,
321423e3ce3SKalle Valo u16 routing, u16 offset,
322423e3ce3SKalle Valo u32 value)
323423e3ce3SKalle Valo {
324423e3ce3SKalle Valo if (routing == B43legacy_SHM_SHARED) {
325423e3ce3SKalle Valo B43legacy_WARN_ON((offset & 0x0001) != 0);
326423e3ce3SKalle Valo if (offset & 0x0003) {
327423e3ce3SKalle Valo /* Unaligned access */
328423e3ce3SKalle Valo b43legacy_shm_control_word(dev, routing, offset >> 2);
329423e3ce3SKalle Valo b43legacy_write16(dev,
330423e3ce3SKalle Valo B43legacy_MMIO_SHM_DATA_UNALIGNED,
331423e3ce3SKalle Valo (value >> 16) & 0xffff);
332423e3ce3SKalle Valo b43legacy_shm_control_word(dev, routing,
333423e3ce3SKalle Valo (offset >> 2) + 1);
334423e3ce3SKalle Valo b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA,
335423e3ce3SKalle Valo value & 0xffff);
336423e3ce3SKalle Valo return;
337423e3ce3SKalle Valo }
338423e3ce3SKalle Valo offset >>= 2;
339423e3ce3SKalle Valo }
340423e3ce3SKalle Valo b43legacy_shm_control_word(dev, routing, offset);
341423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, value);
342423e3ce3SKalle Valo }
343423e3ce3SKalle Valo
b43legacy_shm_write16(struct b43legacy_wldev * dev,u16 routing,u16 offset,u16 value)344423e3ce3SKalle Valo void b43legacy_shm_write16(struct b43legacy_wldev *dev, u16 routing, u16 offset,
345423e3ce3SKalle Valo u16 value)
346423e3ce3SKalle Valo {
347423e3ce3SKalle Valo if (routing == B43legacy_SHM_SHARED) {
348423e3ce3SKalle Valo B43legacy_WARN_ON((offset & 0x0001) != 0);
349423e3ce3SKalle Valo if (offset & 0x0003) {
350423e3ce3SKalle Valo /* Unaligned access */
351423e3ce3SKalle Valo b43legacy_shm_control_word(dev, routing, offset >> 2);
352423e3ce3SKalle Valo b43legacy_write16(dev,
353423e3ce3SKalle Valo B43legacy_MMIO_SHM_DATA_UNALIGNED,
354423e3ce3SKalle Valo value);
355423e3ce3SKalle Valo return;
356423e3ce3SKalle Valo }
357423e3ce3SKalle Valo offset >>= 2;
358423e3ce3SKalle Valo }
359423e3ce3SKalle Valo b43legacy_shm_control_word(dev, routing, offset);
360423e3ce3SKalle Valo b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, value);
361423e3ce3SKalle Valo }
362423e3ce3SKalle Valo
363423e3ce3SKalle Valo /* Read HostFlags */
b43legacy_hf_read(struct b43legacy_wldev * dev)364423e3ce3SKalle Valo u32 b43legacy_hf_read(struct b43legacy_wldev *dev)
365423e3ce3SKalle Valo {
366423e3ce3SKalle Valo u32 ret;
367423e3ce3SKalle Valo
368423e3ce3SKalle Valo ret = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
369423e3ce3SKalle Valo B43legacy_SHM_SH_HOSTFHI);
370423e3ce3SKalle Valo ret <<= 16;
371423e3ce3SKalle Valo ret |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
372423e3ce3SKalle Valo B43legacy_SHM_SH_HOSTFLO);
373423e3ce3SKalle Valo
374423e3ce3SKalle Valo return ret;
375423e3ce3SKalle Valo }
376423e3ce3SKalle Valo
377423e3ce3SKalle Valo /* Write HostFlags */
b43legacy_hf_write(struct b43legacy_wldev * dev,u32 value)378423e3ce3SKalle Valo void b43legacy_hf_write(struct b43legacy_wldev *dev, u32 value)
379423e3ce3SKalle Valo {
380423e3ce3SKalle Valo b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
381423e3ce3SKalle Valo B43legacy_SHM_SH_HOSTFLO,
382423e3ce3SKalle Valo (value & 0x0000FFFF));
383423e3ce3SKalle Valo b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
384423e3ce3SKalle Valo B43legacy_SHM_SH_HOSTFHI,
385423e3ce3SKalle Valo ((value & 0xFFFF0000) >> 16));
386423e3ce3SKalle Valo }
387423e3ce3SKalle Valo
b43legacy_tsf_read(struct b43legacy_wldev * dev,u64 * tsf)388423e3ce3SKalle Valo void b43legacy_tsf_read(struct b43legacy_wldev *dev, u64 *tsf)
389423e3ce3SKalle Valo {
390423e3ce3SKalle Valo /* We need to be careful. As we read the TSF from multiple
391423e3ce3SKalle Valo * registers, we should take care of register overflows.
392423e3ce3SKalle Valo * In theory, the whole tsf read process should be atomic.
393423e3ce3SKalle Valo * We try to be atomic here, by restaring the read process,
394fef1cdbbSColin Ian King * if any of the high registers changed (overflowed).
395423e3ce3SKalle Valo */
396423e3ce3SKalle Valo if (dev->dev->id.revision >= 3) {
397423e3ce3SKalle Valo u32 low;
398423e3ce3SKalle Valo u32 high;
399423e3ce3SKalle Valo u32 high2;
400423e3ce3SKalle Valo
401423e3ce3SKalle Valo do {
402423e3ce3SKalle Valo high = b43legacy_read32(dev,
403423e3ce3SKalle Valo B43legacy_MMIO_REV3PLUS_TSF_HIGH);
404423e3ce3SKalle Valo low = b43legacy_read32(dev,
405423e3ce3SKalle Valo B43legacy_MMIO_REV3PLUS_TSF_LOW);
406423e3ce3SKalle Valo high2 = b43legacy_read32(dev,
407423e3ce3SKalle Valo B43legacy_MMIO_REV3PLUS_TSF_HIGH);
408423e3ce3SKalle Valo } while (unlikely(high != high2));
409423e3ce3SKalle Valo
410423e3ce3SKalle Valo *tsf = high;
411423e3ce3SKalle Valo *tsf <<= 32;
412423e3ce3SKalle Valo *tsf |= low;
413423e3ce3SKalle Valo } else {
414423e3ce3SKalle Valo u64 tmp;
415423e3ce3SKalle Valo u16 v0;
416423e3ce3SKalle Valo u16 v1;
417423e3ce3SKalle Valo u16 v2;
418423e3ce3SKalle Valo u16 v3;
419423e3ce3SKalle Valo u16 test1;
420423e3ce3SKalle Valo u16 test2;
421423e3ce3SKalle Valo u16 test3;
422423e3ce3SKalle Valo
423423e3ce3SKalle Valo do {
424423e3ce3SKalle Valo v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
425423e3ce3SKalle Valo v2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
426423e3ce3SKalle Valo v1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
427423e3ce3SKalle Valo v0 = b43legacy_read16(dev, B43legacy_MMIO_TSF_0);
428423e3ce3SKalle Valo
429423e3ce3SKalle Valo test3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
430423e3ce3SKalle Valo test2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
431423e3ce3SKalle Valo test1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
432423e3ce3SKalle Valo } while (v3 != test3 || v2 != test2 || v1 != test1);
433423e3ce3SKalle Valo
434423e3ce3SKalle Valo *tsf = v3;
435423e3ce3SKalle Valo *tsf <<= 48;
436423e3ce3SKalle Valo tmp = v2;
437423e3ce3SKalle Valo tmp <<= 32;
438423e3ce3SKalle Valo *tsf |= tmp;
439423e3ce3SKalle Valo tmp = v1;
440423e3ce3SKalle Valo tmp <<= 16;
441423e3ce3SKalle Valo *tsf |= tmp;
442423e3ce3SKalle Valo *tsf |= v0;
443423e3ce3SKalle Valo }
444423e3ce3SKalle Valo }
445423e3ce3SKalle Valo
b43legacy_time_lock(struct b43legacy_wldev * dev)446423e3ce3SKalle Valo static void b43legacy_time_lock(struct b43legacy_wldev *dev)
447423e3ce3SKalle Valo {
448423e3ce3SKalle Valo u32 status;
449423e3ce3SKalle Valo
450423e3ce3SKalle Valo status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
451423e3ce3SKalle Valo status |= B43legacy_MACCTL_TBTTHOLD;
452423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
453423e3ce3SKalle Valo }
454423e3ce3SKalle Valo
b43legacy_time_unlock(struct b43legacy_wldev * dev)455423e3ce3SKalle Valo static void b43legacy_time_unlock(struct b43legacy_wldev *dev)
456423e3ce3SKalle Valo {
457423e3ce3SKalle Valo u32 status;
458423e3ce3SKalle Valo
459423e3ce3SKalle Valo status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
460423e3ce3SKalle Valo status &= ~B43legacy_MACCTL_TBTTHOLD;
461423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
462423e3ce3SKalle Valo }
463423e3ce3SKalle Valo
b43legacy_tsf_write_locked(struct b43legacy_wldev * dev,u64 tsf)464423e3ce3SKalle Valo static void b43legacy_tsf_write_locked(struct b43legacy_wldev *dev, u64 tsf)
465423e3ce3SKalle Valo {
466423e3ce3SKalle Valo /* Be careful with the in-progress timer.
467423e3ce3SKalle Valo * First zero out the low register, so we have a full
468423e3ce3SKalle Valo * register-overflow duration to complete the operation.
469423e3ce3SKalle Valo */
470423e3ce3SKalle Valo if (dev->dev->id.revision >= 3) {
471423e3ce3SKalle Valo u32 lo = (tsf & 0x00000000FFFFFFFFULL);
472423e3ce3SKalle Valo u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32;
473423e3ce3SKalle Valo
474423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 0);
475423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_HIGH,
476423e3ce3SKalle Valo hi);
477423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW,
478423e3ce3SKalle Valo lo);
479423e3ce3SKalle Valo } else {
480423e3ce3SKalle Valo u16 v0 = (tsf & 0x000000000000FFFFULL);
481423e3ce3SKalle Valo u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16;
482423e3ce3SKalle Valo u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32;
483423e3ce3SKalle Valo u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48;
484423e3ce3SKalle Valo
485423e3ce3SKalle Valo b43legacy_write16(dev, B43legacy_MMIO_TSF_0, 0);
486423e3ce3SKalle Valo b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3);
487423e3ce3SKalle Valo b43legacy_write16(dev, B43legacy_MMIO_TSF_2, v2);
488423e3ce3SKalle Valo b43legacy_write16(dev, B43legacy_MMIO_TSF_1, v1);
489423e3ce3SKalle Valo b43legacy_write16(dev, B43legacy_MMIO_TSF_0, v0);
490423e3ce3SKalle Valo }
491423e3ce3SKalle Valo }
492423e3ce3SKalle Valo
b43legacy_tsf_write(struct b43legacy_wldev * dev,u64 tsf)493423e3ce3SKalle Valo void b43legacy_tsf_write(struct b43legacy_wldev *dev, u64 tsf)
494423e3ce3SKalle Valo {
495423e3ce3SKalle Valo b43legacy_time_lock(dev);
496423e3ce3SKalle Valo b43legacy_tsf_write_locked(dev, tsf);
497423e3ce3SKalle Valo b43legacy_time_unlock(dev);
498423e3ce3SKalle Valo }
499423e3ce3SKalle Valo
500423e3ce3SKalle Valo static
b43legacy_macfilter_set(struct b43legacy_wldev * dev,u16 offset,const u8 * mac)501423e3ce3SKalle Valo void b43legacy_macfilter_set(struct b43legacy_wldev *dev,
502423e3ce3SKalle Valo u16 offset, const u8 *mac)
503423e3ce3SKalle Valo {
504423e3ce3SKalle Valo static const u8 zero_addr[ETH_ALEN] = { 0 };
505423e3ce3SKalle Valo u16 data;
506423e3ce3SKalle Valo
507423e3ce3SKalle Valo if (!mac)
508423e3ce3SKalle Valo mac = zero_addr;
509423e3ce3SKalle Valo
510423e3ce3SKalle Valo offset |= 0x0020;
511423e3ce3SKalle Valo b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_CONTROL, offset);
512423e3ce3SKalle Valo
513423e3ce3SKalle Valo data = mac[0];
514423e3ce3SKalle Valo data |= mac[1] << 8;
515423e3ce3SKalle Valo b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
516423e3ce3SKalle Valo data = mac[2];
517423e3ce3SKalle Valo data |= mac[3] << 8;
518423e3ce3SKalle Valo b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
519423e3ce3SKalle Valo data = mac[4];
520423e3ce3SKalle Valo data |= mac[5] << 8;
521423e3ce3SKalle Valo b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
522423e3ce3SKalle Valo }
523423e3ce3SKalle Valo
b43legacy_write_mac_bssid_templates(struct b43legacy_wldev * dev)524423e3ce3SKalle Valo static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev *dev)
525423e3ce3SKalle Valo {
526423e3ce3SKalle Valo static const u8 zero_addr[ETH_ALEN] = { 0 };
527423e3ce3SKalle Valo const u8 *mac = dev->wl->mac_addr;
528423e3ce3SKalle Valo const u8 *bssid = dev->wl->bssid;
529423e3ce3SKalle Valo u8 mac_bssid[ETH_ALEN * 2];
530423e3ce3SKalle Valo int i;
531423e3ce3SKalle Valo u32 tmp;
532423e3ce3SKalle Valo
533423e3ce3SKalle Valo if (!bssid)
534423e3ce3SKalle Valo bssid = zero_addr;
535423e3ce3SKalle Valo if (!mac)
536423e3ce3SKalle Valo mac = zero_addr;
537423e3ce3SKalle Valo
538423e3ce3SKalle Valo b43legacy_macfilter_set(dev, B43legacy_MACFILTER_BSSID, bssid);
539423e3ce3SKalle Valo
540423e3ce3SKalle Valo memcpy(mac_bssid, mac, ETH_ALEN);
541423e3ce3SKalle Valo memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN);
542423e3ce3SKalle Valo
543423e3ce3SKalle Valo /* Write our MAC address and BSSID to template ram */
544423e3ce3SKalle Valo for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32)) {
545423e3ce3SKalle Valo tmp = (u32)(mac_bssid[i + 0]);
546423e3ce3SKalle Valo tmp |= (u32)(mac_bssid[i + 1]) << 8;
547423e3ce3SKalle Valo tmp |= (u32)(mac_bssid[i + 2]) << 16;
548423e3ce3SKalle Valo tmp |= (u32)(mac_bssid[i + 3]) << 24;
549423e3ce3SKalle Valo b43legacy_ram_write(dev, 0x20 + i, tmp);
550423e3ce3SKalle Valo b43legacy_ram_write(dev, 0x78 + i, tmp);
551423e3ce3SKalle Valo b43legacy_ram_write(dev, 0x478 + i, tmp);
552423e3ce3SKalle Valo }
553423e3ce3SKalle Valo }
554423e3ce3SKalle Valo
b43legacy_upload_card_macaddress(struct b43legacy_wldev * dev)555423e3ce3SKalle Valo static void b43legacy_upload_card_macaddress(struct b43legacy_wldev *dev)
556423e3ce3SKalle Valo {
557423e3ce3SKalle Valo b43legacy_write_mac_bssid_templates(dev);
558423e3ce3SKalle Valo b43legacy_macfilter_set(dev, B43legacy_MACFILTER_SELF,
559423e3ce3SKalle Valo dev->wl->mac_addr);
560423e3ce3SKalle Valo }
561423e3ce3SKalle Valo
b43legacy_set_slot_time(struct b43legacy_wldev * dev,u16 slot_time)562423e3ce3SKalle Valo static void b43legacy_set_slot_time(struct b43legacy_wldev *dev,
563423e3ce3SKalle Valo u16 slot_time)
564423e3ce3SKalle Valo {
565423e3ce3SKalle Valo /* slot_time is in usec. */
566423e3ce3SKalle Valo if (dev->phy.type != B43legacy_PHYTYPE_G)
567423e3ce3SKalle Valo return;
568423e3ce3SKalle Valo b43legacy_write16(dev, 0x684, 510 + slot_time);
569423e3ce3SKalle Valo b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0010,
570423e3ce3SKalle Valo slot_time);
571423e3ce3SKalle Valo }
572423e3ce3SKalle Valo
b43legacy_short_slot_timing_enable(struct b43legacy_wldev * dev)573423e3ce3SKalle Valo static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev *dev)
574423e3ce3SKalle Valo {
575423e3ce3SKalle Valo b43legacy_set_slot_time(dev, 9);
576423e3ce3SKalle Valo }
577423e3ce3SKalle Valo
b43legacy_short_slot_timing_disable(struct b43legacy_wldev * dev)578423e3ce3SKalle Valo static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev *dev)
579423e3ce3SKalle Valo {
580423e3ce3SKalle Valo b43legacy_set_slot_time(dev, 20);
581423e3ce3SKalle Valo }
582423e3ce3SKalle Valo
583423e3ce3SKalle Valo /* Synchronize IRQ top- and bottom-half.
584423e3ce3SKalle Valo * IRQs must be masked before calling this.
585423e3ce3SKalle Valo * This must not be called with the irq_lock held.
586423e3ce3SKalle Valo */
b43legacy_synchronize_irq(struct b43legacy_wldev * dev)587423e3ce3SKalle Valo static void b43legacy_synchronize_irq(struct b43legacy_wldev *dev)
588423e3ce3SKalle Valo {
589423e3ce3SKalle Valo synchronize_irq(dev->dev->irq);
590423e3ce3SKalle Valo tasklet_kill(&dev->isr_tasklet);
591423e3ce3SKalle Valo }
592423e3ce3SKalle Valo
593423e3ce3SKalle Valo /* DummyTransmission function, as documented on
594140c6026SAlexander A. Klimov * https://bcm-specs.sipsolutions.net/DummyTransmission
595423e3ce3SKalle Valo */
b43legacy_dummy_transmission(struct b43legacy_wldev * dev)596423e3ce3SKalle Valo void b43legacy_dummy_transmission(struct b43legacy_wldev *dev)
597423e3ce3SKalle Valo {
598423e3ce3SKalle Valo struct b43legacy_phy *phy = &dev->phy;
599423e3ce3SKalle Valo unsigned int i;
600423e3ce3SKalle Valo unsigned int max_loop;
601423e3ce3SKalle Valo u16 value;
602423e3ce3SKalle Valo u32 buffer[5] = {
603423e3ce3SKalle Valo 0x00000000,
604423e3ce3SKalle Valo 0x00D40000,
605423e3ce3SKalle Valo 0x00000000,
606423e3ce3SKalle Valo 0x01000000,
607423e3ce3SKalle Valo 0x00000000,
608423e3ce3SKalle Valo };
609423e3ce3SKalle Valo
610423e3ce3SKalle Valo switch (phy->type) {
611423e3ce3SKalle Valo case B43legacy_PHYTYPE_B:
612423e3ce3SKalle Valo case B43legacy_PHYTYPE_G:
613423e3ce3SKalle Valo max_loop = 0xFA;
614423e3ce3SKalle Valo buffer[0] = 0x000B846E;
615423e3ce3SKalle Valo break;
616423e3ce3SKalle Valo default:
617423e3ce3SKalle Valo B43legacy_BUG_ON(1);
618423e3ce3SKalle Valo return;
619423e3ce3SKalle Valo }
620423e3ce3SKalle Valo
621423e3ce3SKalle Valo for (i = 0; i < 5; i++)
622423e3ce3SKalle Valo b43legacy_ram_write(dev, i * 4, buffer[i]);
623423e3ce3SKalle Valo
624423e3ce3SKalle Valo /* dummy read follows */
625423e3ce3SKalle Valo b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
626423e3ce3SKalle Valo
627423e3ce3SKalle Valo b43legacy_write16(dev, 0x0568, 0x0000);
628423e3ce3SKalle Valo b43legacy_write16(dev, 0x07C0, 0x0000);
629423e3ce3SKalle Valo b43legacy_write16(dev, 0x050C, 0x0000);
630423e3ce3SKalle Valo b43legacy_write16(dev, 0x0508, 0x0000);
631423e3ce3SKalle Valo b43legacy_write16(dev, 0x050A, 0x0000);
632423e3ce3SKalle Valo b43legacy_write16(dev, 0x054C, 0x0000);
633423e3ce3SKalle Valo b43legacy_write16(dev, 0x056A, 0x0014);
634423e3ce3SKalle Valo b43legacy_write16(dev, 0x0568, 0x0826);
635423e3ce3SKalle Valo b43legacy_write16(dev, 0x0500, 0x0000);
636423e3ce3SKalle Valo b43legacy_write16(dev, 0x0502, 0x0030);
637423e3ce3SKalle Valo
638423e3ce3SKalle Valo if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
639423e3ce3SKalle Valo b43legacy_radio_write16(dev, 0x0051, 0x0017);
640423e3ce3SKalle Valo for (i = 0x00; i < max_loop; i++) {
641423e3ce3SKalle Valo value = b43legacy_read16(dev, 0x050E);
642423e3ce3SKalle Valo if (value & 0x0080)
643423e3ce3SKalle Valo break;
644423e3ce3SKalle Valo udelay(10);
645423e3ce3SKalle Valo }
646423e3ce3SKalle Valo for (i = 0x00; i < 0x0A; i++) {
647423e3ce3SKalle Valo value = b43legacy_read16(dev, 0x050E);
648423e3ce3SKalle Valo if (value & 0x0400)
649423e3ce3SKalle Valo break;
650423e3ce3SKalle Valo udelay(10);
651423e3ce3SKalle Valo }
652423e3ce3SKalle Valo for (i = 0x00; i < 0x0A; i++) {
653423e3ce3SKalle Valo value = b43legacy_read16(dev, 0x0690);
654423e3ce3SKalle Valo if (!(value & 0x0100))
655423e3ce3SKalle Valo break;
656423e3ce3SKalle Valo udelay(10);
657423e3ce3SKalle Valo }
658423e3ce3SKalle Valo if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
659423e3ce3SKalle Valo b43legacy_radio_write16(dev, 0x0051, 0x0037);
660423e3ce3SKalle Valo }
661423e3ce3SKalle Valo
662423e3ce3SKalle Valo /* Turn the Analog ON/OFF */
b43legacy_switch_analog(struct b43legacy_wldev * dev,int on)663423e3ce3SKalle Valo static void b43legacy_switch_analog(struct b43legacy_wldev *dev, int on)
664423e3ce3SKalle Valo {
665423e3ce3SKalle Valo b43legacy_write16(dev, B43legacy_MMIO_PHY0, on ? 0 : 0xF4);
666423e3ce3SKalle Valo }
667423e3ce3SKalle Valo
b43legacy_wireless_core_reset(struct b43legacy_wldev * dev,u32 flags)668423e3ce3SKalle Valo void b43legacy_wireless_core_reset(struct b43legacy_wldev *dev, u32 flags)
669423e3ce3SKalle Valo {
670423e3ce3SKalle Valo u32 tmslow;
671423e3ce3SKalle Valo u32 macctl;
672423e3ce3SKalle Valo
673423e3ce3SKalle Valo flags |= B43legacy_TMSLOW_PHYCLKEN;
674423e3ce3SKalle Valo flags |= B43legacy_TMSLOW_PHYRESET;
675423e3ce3SKalle Valo ssb_device_enable(dev->dev, flags);
676423e3ce3SKalle Valo msleep(2); /* Wait for the PLL to turn on. */
677423e3ce3SKalle Valo
678423e3ce3SKalle Valo /* Now take the PHY out of Reset again */
679423e3ce3SKalle Valo tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
680423e3ce3SKalle Valo tmslow |= SSB_TMSLOW_FGC;
681423e3ce3SKalle Valo tmslow &= ~B43legacy_TMSLOW_PHYRESET;
682423e3ce3SKalle Valo ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
683423e3ce3SKalle Valo ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
684423e3ce3SKalle Valo msleep(1);
685423e3ce3SKalle Valo tmslow &= ~SSB_TMSLOW_FGC;
686423e3ce3SKalle Valo ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
687423e3ce3SKalle Valo ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
688423e3ce3SKalle Valo msleep(1);
689423e3ce3SKalle Valo
690423e3ce3SKalle Valo /* Turn Analog ON */
691423e3ce3SKalle Valo b43legacy_switch_analog(dev, 1);
692423e3ce3SKalle Valo
693423e3ce3SKalle Valo macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
694423e3ce3SKalle Valo macctl &= ~B43legacy_MACCTL_GMODE;
695423e3ce3SKalle Valo if (flags & B43legacy_TMSLOW_GMODE) {
696423e3ce3SKalle Valo macctl |= B43legacy_MACCTL_GMODE;
697423e3ce3SKalle Valo dev->phy.gmode = true;
698423e3ce3SKalle Valo } else
699423e3ce3SKalle Valo dev->phy.gmode = false;
700423e3ce3SKalle Valo macctl |= B43legacy_MACCTL_IHR_ENABLED;
701423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
702423e3ce3SKalle Valo }
703423e3ce3SKalle Valo
handle_irq_transmit_status(struct b43legacy_wldev * dev)704423e3ce3SKalle Valo static void handle_irq_transmit_status(struct b43legacy_wldev *dev)
705423e3ce3SKalle Valo {
706423e3ce3SKalle Valo u32 v0;
707423e3ce3SKalle Valo u32 v1;
708423e3ce3SKalle Valo u16 tmp;
709423e3ce3SKalle Valo struct b43legacy_txstatus stat;
710423e3ce3SKalle Valo
711423e3ce3SKalle Valo while (1) {
712423e3ce3SKalle Valo v0 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
713423e3ce3SKalle Valo if (!(v0 & 0x00000001))
714423e3ce3SKalle Valo break;
715423e3ce3SKalle Valo v1 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
716423e3ce3SKalle Valo
717423e3ce3SKalle Valo stat.cookie = (v0 >> 16);
718423e3ce3SKalle Valo stat.seq = (v1 & 0x0000FFFF);
719423e3ce3SKalle Valo stat.phy_stat = ((v1 & 0x00FF0000) >> 16);
720423e3ce3SKalle Valo tmp = (v0 & 0x0000FFFF);
721423e3ce3SKalle Valo stat.frame_count = ((tmp & 0xF000) >> 12);
722423e3ce3SKalle Valo stat.rts_count = ((tmp & 0x0F00) >> 8);
723423e3ce3SKalle Valo stat.supp_reason = ((tmp & 0x001C) >> 2);
724423e3ce3SKalle Valo stat.pm_indicated = !!(tmp & 0x0080);
725423e3ce3SKalle Valo stat.intermediate = !!(tmp & 0x0040);
726423e3ce3SKalle Valo stat.for_ampdu = !!(tmp & 0x0020);
727423e3ce3SKalle Valo stat.acked = !!(tmp & 0x0002);
728423e3ce3SKalle Valo
729423e3ce3SKalle Valo b43legacy_handle_txstatus(dev, &stat);
730423e3ce3SKalle Valo }
731423e3ce3SKalle Valo }
732423e3ce3SKalle Valo
drain_txstatus_queue(struct b43legacy_wldev * dev)733423e3ce3SKalle Valo static void drain_txstatus_queue(struct b43legacy_wldev *dev)
734423e3ce3SKalle Valo {
735423e3ce3SKalle Valo u32 dummy;
736423e3ce3SKalle Valo
737423e3ce3SKalle Valo if (dev->dev->id.revision < 5)
738423e3ce3SKalle Valo return;
739423e3ce3SKalle Valo /* Read all entries from the microcode TXstatus FIFO
740423e3ce3SKalle Valo * and throw them away.
741423e3ce3SKalle Valo */
742423e3ce3SKalle Valo while (1) {
743423e3ce3SKalle Valo dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
744423e3ce3SKalle Valo if (!(dummy & 0x00000001))
745423e3ce3SKalle Valo break;
746423e3ce3SKalle Valo dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
747423e3ce3SKalle Valo }
748423e3ce3SKalle Valo }
749423e3ce3SKalle Valo
b43legacy_jssi_read(struct b43legacy_wldev * dev)750423e3ce3SKalle Valo static u32 b43legacy_jssi_read(struct b43legacy_wldev *dev)
751423e3ce3SKalle Valo {
752423e3ce3SKalle Valo u32 val = 0;
753423e3ce3SKalle Valo
754423e3ce3SKalle Valo val = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x40A);
755423e3ce3SKalle Valo val <<= 16;
756423e3ce3SKalle Valo val |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x408);
757423e3ce3SKalle Valo
758423e3ce3SKalle Valo return val;
759423e3ce3SKalle Valo }
760423e3ce3SKalle Valo
b43legacy_jssi_write(struct b43legacy_wldev * dev,u32 jssi)761423e3ce3SKalle Valo static void b43legacy_jssi_write(struct b43legacy_wldev *dev, u32 jssi)
762423e3ce3SKalle Valo {
763423e3ce3SKalle Valo b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x408,
764423e3ce3SKalle Valo (jssi & 0x0000FFFF));
765423e3ce3SKalle Valo b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x40A,
766423e3ce3SKalle Valo (jssi & 0xFFFF0000) >> 16);
767423e3ce3SKalle Valo }
768423e3ce3SKalle Valo
b43legacy_generate_noise_sample(struct b43legacy_wldev * dev)769423e3ce3SKalle Valo static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev)
770423e3ce3SKalle Valo {
771423e3ce3SKalle Valo b43legacy_jssi_write(dev, 0x7F7F7F7F);
772423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
773423e3ce3SKalle Valo b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
774423e3ce3SKalle Valo | B43legacy_MACCMD_BGNOISE);
775423e3ce3SKalle Valo B43legacy_WARN_ON(dev->noisecalc.channel_at_start !=
776423e3ce3SKalle Valo dev->phy.channel);
777423e3ce3SKalle Valo }
778423e3ce3SKalle Valo
b43legacy_calculate_link_quality(struct b43legacy_wldev * dev)779423e3ce3SKalle Valo static void b43legacy_calculate_link_quality(struct b43legacy_wldev *dev)
780423e3ce3SKalle Valo {
781423e3ce3SKalle Valo /* Top half of Link Quality calculation. */
782423e3ce3SKalle Valo
783423e3ce3SKalle Valo if (dev->noisecalc.calculation_running)
784423e3ce3SKalle Valo return;
785423e3ce3SKalle Valo dev->noisecalc.channel_at_start = dev->phy.channel;
786423e3ce3SKalle Valo dev->noisecalc.calculation_running = true;
787423e3ce3SKalle Valo dev->noisecalc.nr_samples = 0;
788423e3ce3SKalle Valo
789423e3ce3SKalle Valo b43legacy_generate_noise_sample(dev);
790423e3ce3SKalle Valo }
791423e3ce3SKalle Valo
handle_irq_noise(struct b43legacy_wldev * dev)792423e3ce3SKalle Valo static void handle_irq_noise(struct b43legacy_wldev *dev)
793423e3ce3SKalle Valo {
794423e3ce3SKalle Valo struct b43legacy_phy *phy = &dev->phy;
795423e3ce3SKalle Valo u16 tmp;
796423e3ce3SKalle Valo u8 noise[4];
797423e3ce3SKalle Valo u8 i;
798423e3ce3SKalle Valo u8 j;
799423e3ce3SKalle Valo s32 average;
800423e3ce3SKalle Valo
801423e3ce3SKalle Valo /* Bottom half of Link Quality calculation. */
802423e3ce3SKalle Valo
803423e3ce3SKalle Valo B43legacy_WARN_ON(!dev->noisecalc.calculation_running);
804423e3ce3SKalle Valo if (dev->noisecalc.channel_at_start != phy->channel)
805423e3ce3SKalle Valo goto drop_calculation;
806423e3ce3SKalle Valo *((__le32 *)noise) = cpu_to_le32(b43legacy_jssi_read(dev));
807423e3ce3SKalle Valo if (noise[0] == 0x7F || noise[1] == 0x7F ||
808423e3ce3SKalle Valo noise[2] == 0x7F || noise[3] == 0x7F)
809423e3ce3SKalle Valo goto generate_new;
810423e3ce3SKalle Valo
811423e3ce3SKalle Valo /* Get the noise samples. */
812423e3ce3SKalle Valo B43legacy_WARN_ON(dev->noisecalc.nr_samples >= 8);
813423e3ce3SKalle Valo i = dev->noisecalc.nr_samples;
814423e3ce3SKalle Valo noise[0] = clamp_val(noise[0], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
815423e3ce3SKalle Valo noise[1] = clamp_val(noise[1], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
816423e3ce3SKalle Valo noise[2] = clamp_val(noise[2], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
817423e3ce3SKalle Valo noise[3] = clamp_val(noise[3], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
818423e3ce3SKalle Valo dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]];
819423e3ce3SKalle Valo dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]];
820423e3ce3SKalle Valo dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]];
821423e3ce3SKalle Valo dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]];
822423e3ce3SKalle Valo dev->noisecalc.nr_samples++;
823423e3ce3SKalle Valo if (dev->noisecalc.nr_samples == 8) {
824423e3ce3SKalle Valo /* Calculate the Link Quality by the noise samples. */
825423e3ce3SKalle Valo average = 0;
826423e3ce3SKalle Valo for (i = 0; i < 8; i++) {
827423e3ce3SKalle Valo for (j = 0; j < 4; j++)
828423e3ce3SKalle Valo average += dev->noisecalc.samples[i][j];
829423e3ce3SKalle Valo }
830423e3ce3SKalle Valo average /= (8 * 4);
831423e3ce3SKalle Valo average *= 125;
832423e3ce3SKalle Valo average += 64;
833423e3ce3SKalle Valo average /= 128;
834423e3ce3SKalle Valo tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
835423e3ce3SKalle Valo 0x40C);
836423e3ce3SKalle Valo tmp = (tmp / 128) & 0x1F;
837423e3ce3SKalle Valo if (tmp >= 8)
838423e3ce3SKalle Valo average += 2;
839423e3ce3SKalle Valo else
840423e3ce3SKalle Valo average -= 25;
841423e3ce3SKalle Valo if (tmp == 8)
842423e3ce3SKalle Valo average -= 72;
843423e3ce3SKalle Valo else
844423e3ce3SKalle Valo average -= 48;
845423e3ce3SKalle Valo
846423e3ce3SKalle Valo dev->stats.link_noise = average;
847423e3ce3SKalle Valo drop_calculation:
848423e3ce3SKalle Valo dev->noisecalc.calculation_running = false;
849423e3ce3SKalle Valo return;
850423e3ce3SKalle Valo }
851423e3ce3SKalle Valo generate_new:
852423e3ce3SKalle Valo b43legacy_generate_noise_sample(dev);
853423e3ce3SKalle Valo }
854423e3ce3SKalle Valo
handle_irq_tbtt_indication(struct b43legacy_wldev * dev)855423e3ce3SKalle Valo static void handle_irq_tbtt_indication(struct b43legacy_wldev *dev)
856423e3ce3SKalle Valo {
857423e3ce3SKalle Valo if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_AP)) {
858423e3ce3SKalle Valo /* TODO: PS TBTT */
859423e3ce3SKalle Valo } else {
860423e3ce3SKalle Valo if (1/*FIXME: the last PSpoll frame was sent successfully */)
861423e3ce3SKalle Valo b43legacy_power_saving_ctl_bits(dev, -1, -1);
862423e3ce3SKalle Valo }
863423e3ce3SKalle Valo if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC))
864423e3ce3SKalle Valo dev->dfq_valid = true;
865423e3ce3SKalle Valo }
866423e3ce3SKalle Valo
handle_irq_atim_end(struct b43legacy_wldev * dev)867423e3ce3SKalle Valo static void handle_irq_atim_end(struct b43legacy_wldev *dev)
868423e3ce3SKalle Valo {
869423e3ce3SKalle Valo if (dev->dfq_valid) {
870423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
871423e3ce3SKalle Valo b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
872423e3ce3SKalle Valo | B43legacy_MACCMD_DFQ_VALID);
873423e3ce3SKalle Valo dev->dfq_valid = false;
874423e3ce3SKalle Valo }
875423e3ce3SKalle Valo }
876423e3ce3SKalle Valo
handle_irq_pmq(struct b43legacy_wldev * dev)877423e3ce3SKalle Valo static void handle_irq_pmq(struct b43legacy_wldev *dev)
878423e3ce3SKalle Valo {
879423e3ce3SKalle Valo u32 tmp;
880423e3ce3SKalle Valo
881423e3ce3SKalle Valo /* TODO: AP mode. */
882423e3ce3SKalle Valo
883423e3ce3SKalle Valo while (1) {
884423e3ce3SKalle Valo tmp = b43legacy_read32(dev, B43legacy_MMIO_PS_STATUS);
885423e3ce3SKalle Valo if (!(tmp & 0x00000008))
886423e3ce3SKalle Valo break;
887423e3ce3SKalle Valo }
888423e3ce3SKalle Valo /* 16bit write is odd, but correct. */
889423e3ce3SKalle Valo b43legacy_write16(dev, B43legacy_MMIO_PS_STATUS, 0x0002);
890423e3ce3SKalle Valo }
891423e3ce3SKalle Valo
b43legacy_write_template_common(struct b43legacy_wldev * dev,const u8 * data,u16 size,u16 ram_offset,u16 shm_size_offset,u8 rate)892423e3ce3SKalle Valo static void b43legacy_write_template_common(struct b43legacy_wldev *dev,
893423e3ce3SKalle Valo const u8 *data, u16 size,
894423e3ce3SKalle Valo u16 ram_offset,
895423e3ce3SKalle Valo u16 shm_size_offset, u8 rate)
896423e3ce3SKalle Valo {
897423e3ce3SKalle Valo u32 i;
898423e3ce3SKalle Valo u32 tmp;
899423e3ce3SKalle Valo struct b43legacy_plcp_hdr4 plcp;
900423e3ce3SKalle Valo
901423e3ce3SKalle Valo plcp.data = 0;
902423e3ce3SKalle Valo b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
903423e3ce3SKalle Valo b43legacy_ram_write(dev, ram_offset, le32_to_cpu(plcp.data));
904423e3ce3SKalle Valo ram_offset += sizeof(u32);
905423e3ce3SKalle Valo /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
906423e3ce3SKalle Valo * So leave the first two bytes of the next write blank.
907423e3ce3SKalle Valo */
908423e3ce3SKalle Valo tmp = (u32)(data[0]) << 16;
909423e3ce3SKalle Valo tmp |= (u32)(data[1]) << 24;
910423e3ce3SKalle Valo b43legacy_ram_write(dev, ram_offset, tmp);
911423e3ce3SKalle Valo ram_offset += sizeof(u32);
912423e3ce3SKalle Valo for (i = 2; i < size; i += sizeof(u32)) {
913423e3ce3SKalle Valo tmp = (u32)(data[i + 0]);
914423e3ce3SKalle Valo if (i + 1 < size)
915423e3ce3SKalle Valo tmp |= (u32)(data[i + 1]) << 8;
916423e3ce3SKalle Valo if (i + 2 < size)
917423e3ce3SKalle Valo tmp |= (u32)(data[i + 2]) << 16;
918423e3ce3SKalle Valo if (i + 3 < size)
919423e3ce3SKalle Valo tmp |= (u32)(data[i + 3]) << 24;
920423e3ce3SKalle Valo b43legacy_ram_write(dev, ram_offset + i - 2, tmp);
921423e3ce3SKalle Valo }
922423e3ce3SKalle Valo b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_size_offset,
923423e3ce3SKalle Valo size + sizeof(struct b43legacy_plcp_hdr6));
924423e3ce3SKalle Valo }
925423e3ce3SKalle Valo
926423e3ce3SKalle Valo /* Convert a b43legacy antenna number value to the PHY TX control value. */
b43legacy_antenna_to_phyctl(int antenna)927423e3ce3SKalle Valo static u16 b43legacy_antenna_to_phyctl(int antenna)
928423e3ce3SKalle Valo {
929423e3ce3SKalle Valo switch (antenna) {
930423e3ce3SKalle Valo case B43legacy_ANTENNA0:
931423e3ce3SKalle Valo return B43legacy_TX4_PHY_ANT0;
932423e3ce3SKalle Valo case B43legacy_ANTENNA1:
933423e3ce3SKalle Valo return B43legacy_TX4_PHY_ANT1;
934423e3ce3SKalle Valo }
935423e3ce3SKalle Valo return B43legacy_TX4_PHY_ANTLAST;
936423e3ce3SKalle Valo }
937423e3ce3SKalle Valo
b43legacy_write_beacon_template(struct b43legacy_wldev * dev,u16 ram_offset,u16 shm_size_offset)938423e3ce3SKalle Valo static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev,
939423e3ce3SKalle Valo u16 ram_offset,
940423e3ce3SKalle Valo u16 shm_size_offset)
941423e3ce3SKalle Valo {
942423e3ce3SKalle Valo
943423e3ce3SKalle Valo unsigned int i, len, variable_len;
944423e3ce3SKalle Valo const struct ieee80211_mgmt *bcn;
945423e3ce3SKalle Valo const u8 *ie;
946423e3ce3SKalle Valo bool tim_found = false;
947423e3ce3SKalle Valo unsigned int rate;
948423e3ce3SKalle Valo u16 ctl;
949423e3ce3SKalle Valo int antenna;
950423e3ce3SKalle Valo struct ieee80211_tx_info *info = IEEE80211_SKB_CB(dev->wl->current_beacon);
951423e3ce3SKalle Valo
952423e3ce3SKalle Valo bcn = (const struct ieee80211_mgmt *)(dev->wl->current_beacon->data);
953423e3ce3SKalle Valo len = min_t(size_t, dev->wl->current_beacon->len,
954423e3ce3SKalle Valo 0x200 - sizeof(struct b43legacy_plcp_hdr6));
955423e3ce3SKalle Valo rate = ieee80211_get_tx_rate(dev->wl->hw, info)->hw_value;
956423e3ce3SKalle Valo
957423e3ce3SKalle Valo b43legacy_write_template_common(dev, (const u8 *)bcn, len, ram_offset,
958423e3ce3SKalle Valo shm_size_offset, rate);
959423e3ce3SKalle Valo
960423e3ce3SKalle Valo /* Write the PHY TX control parameters. */
961423e3ce3SKalle Valo antenna = B43legacy_ANTENNA_DEFAULT;
962423e3ce3SKalle Valo antenna = b43legacy_antenna_to_phyctl(antenna);
963423e3ce3SKalle Valo ctl = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
964423e3ce3SKalle Valo B43legacy_SHM_SH_BEACPHYCTL);
965423e3ce3SKalle Valo /* We can't send beacons with short preamble. Would get PHY errors. */
966423e3ce3SKalle Valo ctl &= ~B43legacy_TX4_PHY_SHORTPRMBL;
967423e3ce3SKalle Valo ctl &= ~B43legacy_TX4_PHY_ANT;
968423e3ce3SKalle Valo ctl &= ~B43legacy_TX4_PHY_ENC;
969423e3ce3SKalle Valo ctl |= antenna;
970423e3ce3SKalle Valo ctl |= B43legacy_TX4_PHY_ENC_CCK;
971423e3ce3SKalle Valo b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
972423e3ce3SKalle Valo B43legacy_SHM_SH_BEACPHYCTL, ctl);
973423e3ce3SKalle Valo
974423e3ce3SKalle Valo /* Find the position of the TIM and the DTIM_period value
975423e3ce3SKalle Valo * and write them to SHM. */
976423e3ce3SKalle Valo ie = bcn->u.beacon.variable;
977423e3ce3SKalle Valo variable_len = len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
978423e3ce3SKalle Valo for (i = 0; i < variable_len - 2; ) {
979423e3ce3SKalle Valo uint8_t ie_id, ie_len;
980423e3ce3SKalle Valo
981423e3ce3SKalle Valo ie_id = ie[i];
982423e3ce3SKalle Valo ie_len = ie[i + 1];
983423e3ce3SKalle Valo if (ie_id == 5) {
984423e3ce3SKalle Valo u16 tim_position;
985423e3ce3SKalle Valo u16 dtim_period;
986423e3ce3SKalle Valo /* This is the TIM Information Element */
987423e3ce3SKalle Valo
988423e3ce3SKalle Valo /* Check whether the ie_len is in the beacon data range. */
989423e3ce3SKalle Valo if (variable_len < ie_len + 2 + i)
990423e3ce3SKalle Valo break;
991423e3ce3SKalle Valo /* A valid TIM is at least 4 bytes long. */
992423e3ce3SKalle Valo if (ie_len < 4)
993423e3ce3SKalle Valo break;
994423e3ce3SKalle Valo tim_found = true;
995423e3ce3SKalle Valo
996423e3ce3SKalle Valo tim_position = sizeof(struct b43legacy_plcp_hdr6);
997423e3ce3SKalle Valo tim_position += offsetof(struct ieee80211_mgmt,
998423e3ce3SKalle Valo u.beacon.variable);
999423e3ce3SKalle Valo tim_position += i;
1000423e3ce3SKalle Valo
1001423e3ce3SKalle Valo dtim_period = ie[i + 3];
1002423e3ce3SKalle Valo
1003423e3ce3SKalle Valo b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1004423e3ce3SKalle Valo B43legacy_SHM_SH_TIMPOS, tim_position);
1005423e3ce3SKalle Valo b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1006423e3ce3SKalle Valo B43legacy_SHM_SH_DTIMP, dtim_period);
1007423e3ce3SKalle Valo break;
1008423e3ce3SKalle Valo }
1009423e3ce3SKalle Valo i += ie_len + 2;
1010423e3ce3SKalle Valo }
1011423e3ce3SKalle Valo if (!tim_found) {
1012423e3ce3SKalle Valo b43legacywarn(dev->wl, "Did not find a valid TIM IE in the "
1013423e3ce3SKalle Valo "beacon template packet. AP or IBSS operation "
1014423e3ce3SKalle Valo "may be broken.\n");
1015423e3ce3SKalle Valo } else
1016423e3ce3SKalle Valo b43legacydbg(dev->wl, "Updated beacon template\n");
1017423e3ce3SKalle Valo }
1018423e3ce3SKalle Valo
b43legacy_write_probe_resp_plcp(struct b43legacy_wldev * dev,u16 shm_offset,u16 size,struct ieee80211_rate * rate)1019423e3ce3SKalle Valo static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev,
1020423e3ce3SKalle Valo u16 shm_offset, u16 size,
1021423e3ce3SKalle Valo struct ieee80211_rate *rate)
1022423e3ce3SKalle Valo {
1023423e3ce3SKalle Valo struct b43legacy_plcp_hdr4 plcp;
1024423e3ce3SKalle Valo u32 tmp;
1025423e3ce3SKalle Valo __le16 dur;
1026423e3ce3SKalle Valo
1027423e3ce3SKalle Valo plcp.data = 0;
1028423e3ce3SKalle Valo b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate->hw_value);
1029423e3ce3SKalle Valo dur = ieee80211_generic_frame_duration(dev->wl->hw,
1030423e3ce3SKalle Valo dev->wl->vif,
103157fbcce3SJohannes Berg NL80211_BAND_2GHZ,
1032423e3ce3SKalle Valo size,
1033423e3ce3SKalle Valo rate);
1034423e3ce3SKalle Valo /* Write PLCP in two parts and timing for packet transfer */
1035423e3ce3SKalle Valo tmp = le32_to_cpu(plcp.data);
1036423e3ce3SKalle Valo b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset,
1037423e3ce3SKalle Valo tmp & 0xFFFF);
1038423e3ce3SKalle Valo b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 2,
1039423e3ce3SKalle Valo tmp >> 16);
1040423e3ce3SKalle Valo b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 6,
1041423e3ce3SKalle Valo le16_to_cpu(dur));
1042423e3ce3SKalle Valo }
1043423e3ce3SKalle Valo
1044423e3ce3SKalle Valo /* Instead of using custom probe response template, this function
1045423e3ce3SKalle Valo * just patches custom beacon template by:
1046423e3ce3SKalle Valo * 1) Changing packet type
1047423e3ce3SKalle Valo * 2) Patching duration field
1048423e3ce3SKalle Valo * 3) Stripping TIM
1049423e3ce3SKalle Valo */
b43legacy_generate_probe_resp(struct b43legacy_wldev * dev,u16 * dest_size,struct ieee80211_rate * rate)1050423e3ce3SKalle Valo static const u8 *b43legacy_generate_probe_resp(struct b43legacy_wldev *dev,
1051423e3ce3SKalle Valo u16 *dest_size,
1052423e3ce3SKalle Valo struct ieee80211_rate *rate)
1053423e3ce3SKalle Valo {
1054423e3ce3SKalle Valo const u8 *src_data;
1055423e3ce3SKalle Valo u8 *dest_data;
1056423e3ce3SKalle Valo u16 src_size, elem_size, src_pos, dest_pos;
1057423e3ce3SKalle Valo __le16 dur;
1058423e3ce3SKalle Valo struct ieee80211_hdr *hdr;
1059423e3ce3SKalle Valo size_t ie_start;
1060423e3ce3SKalle Valo
1061423e3ce3SKalle Valo src_size = dev->wl->current_beacon->len;
1062423e3ce3SKalle Valo src_data = (const u8 *)dev->wl->current_beacon->data;
1063423e3ce3SKalle Valo
1064423e3ce3SKalle Valo /* Get the start offset of the variable IEs in the packet. */
1065423e3ce3SKalle Valo ie_start = offsetof(struct ieee80211_mgmt, u.probe_resp.variable);
1066423e3ce3SKalle Valo B43legacy_WARN_ON(ie_start != offsetof(struct ieee80211_mgmt,
1067423e3ce3SKalle Valo u.beacon.variable));
1068423e3ce3SKalle Valo
1069423e3ce3SKalle Valo if (B43legacy_WARN_ON(src_size < ie_start))
1070423e3ce3SKalle Valo return NULL;
1071423e3ce3SKalle Valo
1072423e3ce3SKalle Valo dest_data = kmalloc(src_size, GFP_ATOMIC);
1073423e3ce3SKalle Valo if (unlikely(!dest_data))
1074423e3ce3SKalle Valo return NULL;
1075423e3ce3SKalle Valo
1076423e3ce3SKalle Valo /* Copy the static data and all Information Elements, except the TIM. */
1077423e3ce3SKalle Valo memcpy(dest_data, src_data, ie_start);
1078423e3ce3SKalle Valo src_pos = ie_start;
1079423e3ce3SKalle Valo dest_pos = ie_start;
1080423e3ce3SKalle Valo for ( ; src_pos < src_size - 2; src_pos += elem_size) {
1081423e3ce3SKalle Valo elem_size = src_data[src_pos + 1] + 2;
1082423e3ce3SKalle Valo if (src_data[src_pos] == 5) {
1083423e3ce3SKalle Valo /* This is the TIM. */
1084423e3ce3SKalle Valo continue;
1085423e3ce3SKalle Valo }
1086423e3ce3SKalle Valo memcpy(dest_data + dest_pos, src_data + src_pos, elem_size);
1087423e3ce3SKalle Valo dest_pos += elem_size;
1088423e3ce3SKalle Valo }
1089423e3ce3SKalle Valo *dest_size = dest_pos;
1090423e3ce3SKalle Valo hdr = (struct ieee80211_hdr *)dest_data;
1091423e3ce3SKalle Valo
1092423e3ce3SKalle Valo /* Set the frame control. */
1093423e3ce3SKalle Valo hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
1094423e3ce3SKalle Valo IEEE80211_STYPE_PROBE_RESP);
1095423e3ce3SKalle Valo dur = ieee80211_generic_frame_duration(dev->wl->hw,
1096423e3ce3SKalle Valo dev->wl->vif,
109757fbcce3SJohannes Berg NL80211_BAND_2GHZ,
1098423e3ce3SKalle Valo *dest_size,
1099423e3ce3SKalle Valo rate);
1100423e3ce3SKalle Valo hdr->duration_id = dur;
1101423e3ce3SKalle Valo
1102423e3ce3SKalle Valo return dest_data;
1103423e3ce3SKalle Valo }
1104423e3ce3SKalle Valo
b43legacy_write_probe_resp_template(struct b43legacy_wldev * dev,u16 ram_offset,u16 shm_size_offset,struct ieee80211_rate * rate)1105423e3ce3SKalle Valo static void b43legacy_write_probe_resp_template(struct b43legacy_wldev *dev,
1106423e3ce3SKalle Valo u16 ram_offset,
1107423e3ce3SKalle Valo u16 shm_size_offset,
1108423e3ce3SKalle Valo struct ieee80211_rate *rate)
1109423e3ce3SKalle Valo {
1110423e3ce3SKalle Valo const u8 *probe_resp_data;
1111423e3ce3SKalle Valo u16 size;
1112423e3ce3SKalle Valo
1113423e3ce3SKalle Valo size = dev->wl->current_beacon->len;
1114423e3ce3SKalle Valo probe_resp_data = b43legacy_generate_probe_resp(dev, &size, rate);
1115423e3ce3SKalle Valo if (unlikely(!probe_resp_data))
1116423e3ce3SKalle Valo return;
1117423e3ce3SKalle Valo
1118423e3ce3SKalle Valo /* Looks like PLCP headers plus packet timings are stored for
1119423e3ce3SKalle Valo * all possible basic rates
1120423e3ce3SKalle Valo */
1121423e3ce3SKalle Valo b43legacy_write_probe_resp_plcp(dev, 0x31A, size,
1122423e3ce3SKalle Valo &b43legacy_b_ratetable[0]);
1123423e3ce3SKalle Valo b43legacy_write_probe_resp_plcp(dev, 0x32C, size,
1124423e3ce3SKalle Valo &b43legacy_b_ratetable[1]);
1125423e3ce3SKalle Valo b43legacy_write_probe_resp_plcp(dev, 0x33E, size,
1126423e3ce3SKalle Valo &b43legacy_b_ratetable[2]);
1127423e3ce3SKalle Valo b43legacy_write_probe_resp_plcp(dev, 0x350, size,
1128423e3ce3SKalle Valo &b43legacy_b_ratetable[3]);
1129423e3ce3SKalle Valo
1130423e3ce3SKalle Valo size = min_t(size_t, size,
1131423e3ce3SKalle Valo 0x200 - sizeof(struct b43legacy_plcp_hdr6));
1132423e3ce3SKalle Valo b43legacy_write_template_common(dev, probe_resp_data,
1133423e3ce3SKalle Valo size, ram_offset,
1134423e3ce3SKalle Valo shm_size_offset, rate->hw_value);
1135423e3ce3SKalle Valo kfree(probe_resp_data);
1136423e3ce3SKalle Valo }
1137423e3ce3SKalle Valo
b43legacy_upload_beacon0(struct b43legacy_wldev * dev)1138423e3ce3SKalle Valo static void b43legacy_upload_beacon0(struct b43legacy_wldev *dev)
1139423e3ce3SKalle Valo {
1140423e3ce3SKalle Valo struct b43legacy_wl *wl = dev->wl;
1141423e3ce3SKalle Valo
1142423e3ce3SKalle Valo if (wl->beacon0_uploaded)
1143423e3ce3SKalle Valo return;
1144423e3ce3SKalle Valo b43legacy_write_beacon_template(dev, 0x68, 0x18);
1145423e3ce3SKalle Valo /* FIXME: Probe resp upload doesn't really belong here,
1146423e3ce3SKalle Valo * but we don't use that feature anyway. */
1147423e3ce3SKalle Valo b43legacy_write_probe_resp_template(dev, 0x268, 0x4A,
1148423e3ce3SKalle Valo &__b43legacy_ratetable[3]);
1149423e3ce3SKalle Valo wl->beacon0_uploaded = true;
1150423e3ce3SKalle Valo }
1151423e3ce3SKalle Valo
b43legacy_upload_beacon1(struct b43legacy_wldev * dev)1152423e3ce3SKalle Valo static void b43legacy_upload_beacon1(struct b43legacy_wldev *dev)
1153423e3ce3SKalle Valo {
1154423e3ce3SKalle Valo struct b43legacy_wl *wl = dev->wl;
1155423e3ce3SKalle Valo
1156423e3ce3SKalle Valo if (wl->beacon1_uploaded)
1157423e3ce3SKalle Valo return;
1158423e3ce3SKalle Valo b43legacy_write_beacon_template(dev, 0x468, 0x1A);
1159423e3ce3SKalle Valo wl->beacon1_uploaded = true;
1160423e3ce3SKalle Valo }
1161423e3ce3SKalle Valo
handle_irq_beacon(struct b43legacy_wldev * dev)1162423e3ce3SKalle Valo static void handle_irq_beacon(struct b43legacy_wldev *dev)
1163423e3ce3SKalle Valo {
1164423e3ce3SKalle Valo struct b43legacy_wl *wl = dev->wl;
1165423e3ce3SKalle Valo u32 cmd, beacon0_valid, beacon1_valid;
1166423e3ce3SKalle Valo
1167423e3ce3SKalle Valo if (!b43legacy_is_mode(wl, NL80211_IFTYPE_AP))
1168423e3ce3SKalle Valo return;
1169423e3ce3SKalle Valo
1170423e3ce3SKalle Valo /* This is the bottom half of the asynchronous beacon update. */
1171423e3ce3SKalle Valo
1172423e3ce3SKalle Valo /* Ignore interrupt in the future. */
1173423e3ce3SKalle Valo dev->irq_mask &= ~B43legacy_IRQ_BEACON;
1174423e3ce3SKalle Valo
1175423e3ce3SKalle Valo cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1176423e3ce3SKalle Valo beacon0_valid = (cmd & B43legacy_MACCMD_BEACON0_VALID);
1177423e3ce3SKalle Valo beacon1_valid = (cmd & B43legacy_MACCMD_BEACON1_VALID);
1178423e3ce3SKalle Valo
1179423e3ce3SKalle Valo /* Schedule interrupt manually, if busy. */
1180423e3ce3SKalle Valo if (beacon0_valid && beacon1_valid) {
1181423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, B43legacy_IRQ_BEACON);
1182423e3ce3SKalle Valo dev->irq_mask |= B43legacy_IRQ_BEACON;
1183423e3ce3SKalle Valo return;
1184423e3ce3SKalle Valo }
1185423e3ce3SKalle Valo
1186423e3ce3SKalle Valo if (unlikely(wl->beacon_templates_virgin)) {
1187423e3ce3SKalle Valo /* We never uploaded a beacon before.
1188423e3ce3SKalle Valo * Upload both templates now, but only mark one valid. */
1189423e3ce3SKalle Valo wl->beacon_templates_virgin = false;
1190423e3ce3SKalle Valo b43legacy_upload_beacon0(dev);
1191423e3ce3SKalle Valo b43legacy_upload_beacon1(dev);
1192423e3ce3SKalle Valo cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1193423e3ce3SKalle Valo cmd |= B43legacy_MACCMD_BEACON0_VALID;
1194423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1195423e3ce3SKalle Valo } else {
1196423e3ce3SKalle Valo if (!beacon0_valid) {
1197423e3ce3SKalle Valo b43legacy_upload_beacon0(dev);
1198423e3ce3SKalle Valo cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1199423e3ce3SKalle Valo cmd |= B43legacy_MACCMD_BEACON0_VALID;
1200423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1201423e3ce3SKalle Valo } else if (!beacon1_valid) {
1202423e3ce3SKalle Valo b43legacy_upload_beacon1(dev);
1203423e3ce3SKalle Valo cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1204423e3ce3SKalle Valo cmd |= B43legacy_MACCMD_BEACON1_VALID;
1205423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1206423e3ce3SKalle Valo }
1207423e3ce3SKalle Valo }
1208423e3ce3SKalle Valo }
1209423e3ce3SKalle Valo
b43legacy_beacon_update_trigger_work(struct work_struct * work)1210423e3ce3SKalle Valo static void b43legacy_beacon_update_trigger_work(struct work_struct *work)
1211423e3ce3SKalle Valo {
1212423e3ce3SKalle Valo struct b43legacy_wl *wl = container_of(work, struct b43legacy_wl,
1213423e3ce3SKalle Valo beacon_update_trigger);
1214423e3ce3SKalle Valo struct b43legacy_wldev *dev;
1215423e3ce3SKalle Valo
1216423e3ce3SKalle Valo mutex_lock(&wl->mutex);
1217423e3ce3SKalle Valo dev = wl->current_dev;
1218423e3ce3SKalle Valo if (likely(dev && (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED))) {
1219423e3ce3SKalle Valo spin_lock_irq(&wl->irq_lock);
1220423e3ce3SKalle Valo /* Update beacon right away or defer to IRQ. */
1221423e3ce3SKalle Valo handle_irq_beacon(dev);
1222423e3ce3SKalle Valo /* The handler might have updated the IRQ mask. */
1223423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK,
1224423e3ce3SKalle Valo dev->irq_mask);
1225423e3ce3SKalle Valo spin_unlock_irq(&wl->irq_lock);
1226423e3ce3SKalle Valo }
1227423e3ce3SKalle Valo mutex_unlock(&wl->mutex);
1228423e3ce3SKalle Valo }
1229423e3ce3SKalle Valo
1230423e3ce3SKalle Valo /* Asynchronously update the packet templates in template RAM.
1231423e3ce3SKalle Valo * Locking: Requires wl->irq_lock to be locked. */
b43legacy_update_templates(struct b43legacy_wl * wl)1232423e3ce3SKalle Valo static void b43legacy_update_templates(struct b43legacy_wl *wl)
1233423e3ce3SKalle Valo {
1234423e3ce3SKalle Valo struct sk_buff *beacon;
1235423e3ce3SKalle Valo /* This is the top half of the ansynchronous beacon update. The bottom
1236423e3ce3SKalle Valo * half is the beacon IRQ. Beacon update must be asynchronous to avoid
1237423e3ce3SKalle Valo * sending an invalid beacon. This can happen for example, if the
1238423e3ce3SKalle Valo * firmware transmits a beacon while we are updating it. */
1239423e3ce3SKalle Valo
1240423e3ce3SKalle Valo /* We could modify the existing beacon and set the aid bit in the TIM
1241423e3ce3SKalle Valo * field, but that would probably require resizing and moving of data
1242423e3ce3SKalle Valo * within the beacon template. Simply request a new beacon and let
1243423e3ce3SKalle Valo * mac80211 do the hard work. */
12446e8912a5SShaul Triebitz beacon = ieee80211_beacon_get(wl->hw, wl->vif, 0);
1245423e3ce3SKalle Valo if (unlikely(!beacon))
1246423e3ce3SKalle Valo return;
1247423e3ce3SKalle Valo
1248423e3ce3SKalle Valo if (wl->current_beacon)
1249423e3ce3SKalle Valo dev_kfree_skb_any(wl->current_beacon);
1250423e3ce3SKalle Valo wl->current_beacon = beacon;
1251423e3ce3SKalle Valo wl->beacon0_uploaded = false;
1252423e3ce3SKalle Valo wl->beacon1_uploaded = false;
1253423e3ce3SKalle Valo ieee80211_queue_work(wl->hw, &wl->beacon_update_trigger);
1254423e3ce3SKalle Valo }
1255423e3ce3SKalle Valo
b43legacy_set_beacon_int(struct b43legacy_wldev * dev,u16 beacon_int)1256423e3ce3SKalle Valo static void b43legacy_set_beacon_int(struct b43legacy_wldev *dev,
1257423e3ce3SKalle Valo u16 beacon_int)
1258423e3ce3SKalle Valo {
1259423e3ce3SKalle Valo b43legacy_time_lock(dev);
1260423e3ce3SKalle Valo if (dev->dev->id.revision >= 3) {
1261423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_REP,
1262423e3ce3SKalle Valo (beacon_int << 16));
1263423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_START,
1264423e3ce3SKalle Valo (beacon_int << 10));
1265423e3ce3SKalle Valo } else {
1266423e3ce3SKalle Valo b43legacy_write16(dev, 0x606, (beacon_int >> 6));
1267423e3ce3SKalle Valo b43legacy_write16(dev, 0x610, beacon_int);
1268423e3ce3SKalle Valo }
1269423e3ce3SKalle Valo b43legacy_time_unlock(dev);
1270423e3ce3SKalle Valo b43legacydbg(dev->wl, "Set beacon interval to %u\n", beacon_int);
1271423e3ce3SKalle Valo }
1272423e3ce3SKalle Valo
handle_irq_ucode_debug(struct b43legacy_wldev * dev)1273423e3ce3SKalle Valo static void handle_irq_ucode_debug(struct b43legacy_wldev *dev)
1274423e3ce3SKalle Valo {
1275423e3ce3SKalle Valo }
1276423e3ce3SKalle Valo
1277423e3ce3SKalle Valo /* Interrupt handler bottom-half */
b43legacy_interrupt_tasklet(struct tasklet_struct * t)1278fc672230SAllen Pais static void b43legacy_interrupt_tasklet(struct tasklet_struct *t)
1279423e3ce3SKalle Valo {
1280fc672230SAllen Pais struct b43legacy_wldev *dev = from_tasklet(dev, t, isr_tasklet);
1281423e3ce3SKalle Valo u32 reason;
1282423e3ce3SKalle Valo u32 dma_reason[ARRAY_SIZE(dev->dma_reason)];
1283423e3ce3SKalle Valo u32 merged_dma_reason = 0;
1284423e3ce3SKalle Valo int i;
1285423e3ce3SKalle Valo unsigned long flags;
1286423e3ce3SKalle Valo
1287423e3ce3SKalle Valo spin_lock_irqsave(&dev->wl->irq_lock, flags);
1288423e3ce3SKalle Valo
1289423e3ce3SKalle Valo B43legacy_WARN_ON(b43legacy_status(dev) <
1290423e3ce3SKalle Valo B43legacy_STAT_INITIALIZED);
1291423e3ce3SKalle Valo
1292423e3ce3SKalle Valo reason = dev->irq_reason;
1293423e3ce3SKalle Valo for (i = 0; i < ARRAY_SIZE(dma_reason); i++) {
1294423e3ce3SKalle Valo dma_reason[i] = dev->dma_reason[i];
1295423e3ce3SKalle Valo merged_dma_reason |= dma_reason[i];
1296423e3ce3SKalle Valo }
1297423e3ce3SKalle Valo
1298423e3ce3SKalle Valo if (unlikely(reason & B43legacy_IRQ_MAC_TXERR))
1299423e3ce3SKalle Valo b43legacyerr(dev->wl, "MAC transmission error\n");
1300423e3ce3SKalle Valo
1301423e3ce3SKalle Valo if (unlikely(reason & B43legacy_IRQ_PHY_TXERR)) {
1302423e3ce3SKalle Valo b43legacyerr(dev->wl, "PHY transmission error\n");
1303423e3ce3SKalle Valo rmb();
1304423e3ce3SKalle Valo if (unlikely(atomic_dec_and_test(&dev->phy.txerr_cnt))) {
1305423e3ce3SKalle Valo b43legacyerr(dev->wl, "Too many PHY TX errors, "
1306423e3ce3SKalle Valo "restarting the controller\n");
1307423e3ce3SKalle Valo b43legacy_controller_restart(dev, "PHY TX errors");
1308423e3ce3SKalle Valo }
1309423e3ce3SKalle Valo }
1310423e3ce3SKalle Valo
1311423e3ce3SKalle Valo if (unlikely(merged_dma_reason & (B43legacy_DMAIRQ_FATALMASK |
1312423e3ce3SKalle Valo B43legacy_DMAIRQ_NONFATALMASK))) {
1313423e3ce3SKalle Valo if (merged_dma_reason & B43legacy_DMAIRQ_FATALMASK) {
1314423e3ce3SKalle Valo b43legacyerr(dev->wl, "Fatal DMA error: "
1315423e3ce3SKalle Valo "0x%08X, 0x%08X, 0x%08X, "
1316423e3ce3SKalle Valo "0x%08X, 0x%08X, 0x%08X\n",
1317423e3ce3SKalle Valo dma_reason[0], dma_reason[1],
1318423e3ce3SKalle Valo dma_reason[2], dma_reason[3],
1319423e3ce3SKalle Valo dma_reason[4], dma_reason[5]);
1320423e3ce3SKalle Valo b43legacy_controller_restart(dev, "DMA error");
1321423e3ce3SKalle Valo spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1322423e3ce3SKalle Valo return;
1323423e3ce3SKalle Valo }
1324423e3ce3SKalle Valo if (merged_dma_reason & B43legacy_DMAIRQ_NONFATALMASK)
1325423e3ce3SKalle Valo b43legacyerr(dev->wl, "DMA error: "
1326423e3ce3SKalle Valo "0x%08X, 0x%08X, 0x%08X, "
1327423e3ce3SKalle Valo "0x%08X, 0x%08X, 0x%08X\n",
1328423e3ce3SKalle Valo dma_reason[0], dma_reason[1],
1329423e3ce3SKalle Valo dma_reason[2], dma_reason[3],
1330423e3ce3SKalle Valo dma_reason[4], dma_reason[5]);
1331423e3ce3SKalle Valo }
1332423e3ce3SKalle Valo
1333423e3ce3SKalle Valo if (unlikely(reason & B43legacy_IRQ_UCODE_DEBUG))
1334423e3ce3SKalle Valo handle_irq_ucode_debug(dev);
1335423e3ce3SKalle Valo if (reason & B43legacy_IRQ_TBTT_INDI)
1336423e3ce3SKalle Valo handle_irq_tbtt_indication(dev);
1337423e3ce3SKalle Valo if (reason & B43legacy_IRQ_ATIM_END)
1338423e3ce3SKalle Valo handle_irq_atim_end(dev);
1339423e3ce3SKalle Valo if (reason & B43legacy_IRQ_BEACON)
1340423e3ce3SKalle Valo handle_irq_beacon(dev);
1341423e3ce3SKalle Valo if (reason & B43legacy_IRQ_PMQ)
1342423e3ce3SKalle Valo handle_irq_pmq(dev);
13436214ef8aSLee Jones if (reason & B43legacy_IRQ_TXFIFO_FLUSH_OK) {
1344423e3ce3SKalle Valo ;/*TODO*/
13456214ef8aSLee Jones }
1346423e3ce3SKalle Valo if (reason & B43legacy_IRQ_NOISESAMPLE_OK)
1347423e3ce3SKalle Valo handle_irq_noise(dev);
1348423e3ce3SKalle Valo
1349423e3ce3SKalle Valo /* Check the DMA reason registers for received data. */
1350423e3ce3SKalle Valo if (dma_reason[0] & B43legacy_DMAIRQ_RX_DONE) {
1351423e3ce3SKalle Valo if (b43legacy_using_pio(dev))
1352423e3ce3SKalle Valo b43legacy_pio_rx(dev->pio.queue0);
1353423e3ce3SKalle Valo else
1354423e3ce3SKalle Valo b43legacy_dma_rx(dev->dma.rx_ring0);
1355423e3ce3SKalle Valo }
1356423e3ce3SKalle Valo B43legacy_WARN_ON(dma_reason[1] & B43legacy_DMAIRQ_RX_DONE);
1357423e3ce3SKalle Valo B43legacy_WARN_ON(dma_reason[2] & B43legacy_DMAIRQ_RX_DONE);
1358423e3ce3SKalle Valo if (dma_reason[3] & B43legacy_DMAIRQ_RX_DONE) {
1359423e3ce3SKalle Valo if (b43legacy_using_pio(dev))
1360423e3ce3SKalle Valo b43legacy_pio_rx(dev->pio.queue3);
1361423e3ce3SKalle Valo else
1362423e3ce3SKalle Valo b43legacy_dma_rx(dev->dma.rx_ring3);
1363423e3ce3SKalle Valo }
1364423e3ce3SKalle Valo B43legacy_WARN_ON(dma_reason[4] & B43legacy_DMAIRQ_RX_DONE);
1365423e3ce3SKalle Valo B43legacy_WARN_ON(dma_reason[5] & B43legacy_DMAIRQ_RX_DONE);
1366423e3ce3SKalle Valo
1367423e3ce3SKalle Valo if (reason & B43legacy_IRQ_TX_OK)
1368423e3ce3SKalle Valo handle_irq_transmit_status(dev);
1369423e3ce3SKalle Valo
1370423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
1371423e3ce3SKalle Valo spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1372423e3ce3SKalle Valo }
1373423e3ce3SKalle Valo
pio_irq_workaround(struct b43legacy_wldev * dev,u16 base,int queueidx)1374423e3ce3SKalle Valo static void pio_irq_workaround(struct b43legacy_wldev *dev,
1375423e3ce3SKalle Valo u16 base, int queueidx)
1376423e3ce3SKalle Valo {
1377423e3ce3SKalle Valo u16 rxctl;
1378423e3ce3SKalle Valo
1379423e3ce3SKalle Valo rxctl = b43legacy_read16(dev, base + B43legacy_PIO_RXCTL);
1380423e3ce3SKalle Valo if (rxctl & B43legacy_PIO_RXCTL_DATAAVAILABLE)
1381423e3ce3SKalle Valo dev->dma_reason[queueidx] |= B43legacy_DMAIRQ_RX_DONE;
1382423e3ce3SKalle Valo else
1383423e3ce3SKalle Valo dev->dma_reason[queueidx] &= ~B43legacy_DMAIRQ_RX_DONE;
1384423e3ce3SKalle Valo }
1385423e3ce3SKalle Valo
b43legacy_interrupt_ack(struct b43legacy_wldev * dev,u32 reason)1386423e3ce3SKalle Valo static void b43legacy_interrupt_ack(struct b43legacy_wldev *dev, u32 reason)
1387423e3ce3SKalle Valo {
1388423e3ce3SKalle Valo if (b43legacy_using_pio(dev) &&
1389423e3ce3SKalle Valo (dev->dev->id.revision < 3) &&
1390423e3ce3SKalle Valo (!(reason & B43legacy_IRQ_PIO_WORKAROUND))) {
1391423e3ce3SKalle Valo /* Apply a PIO specific workaround to the dma_reasons */
1392423e3ce3SKalle Valo pio_irq_workaround(dev, B43legacy_MMIO_PIO1_BASE, 0);
1393423e3ce3SKalle Valo pio_irq_workaround(dev, B43legacy_MMIO_PIO2_BASE, 1);
1394423e3ce3SKalle Valo pio_irq_workaround(dev, B43legacy_MMIO_PIO3_BASE, 2);
1395423e3ce3SKalle Valo pio_irq_workaround(dev, B43legacy_MMIO_PIO4_BASE, 3);
1396423e3ce3SKalle Valo }
1397423e3ce3SKalle Valo
1398423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, reason);
1399423e3ce3SKalle Valo
1400423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_DMA0_REASON,
1401423e3ce3SKalle Valo dev->dma_reason[0]);
1402423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_DMA1_REASON,
1403423e3ce3SKalle Valo dev->dma_reason[1]);
1404423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_DMA2_REASON,
1405423e3ce3SKalle Valo dev->dma_reason[2]);
1406423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_DMA3_REASON,
1407423e3ce3SKalle Valo dev->dma_reason[3]);
1408423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_DMA4_REASON,
1409423e3ce3SKalle Valo dev->dma_reason[4]);
1410423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_DMA5_REASON,
1411423e3ce3SKalle Valo dev->dma_reason[5]);
1412423e3ce3SKalle Valo }
1413423e3ce3SKalle Valo
1414423e3ce3SKalle Valo /* Interrupt handler top-half */
b43legacy_interrupt_handler(int irq,void * dev_id)1415423e3ce3SKalle Valo static irqreturn_t b43legacy_interrupt_handler(int irq, void *dev_id)
1416423e3ce3SKalle Valo {
1417423e3ce3SKalle Valo irqreturn_t ret = IRQ_NONE;
1418423e3ce3SKalle Valo struct b43legacy_wldev *dev = dev_id;
1419423e3ce3SKalle Valo u32 reason;
1420423e3ce3SKalle Valo
1421423e3ce3SKalle Valo B43legacy_WARN_ON(!dev);
1422423e3ce3SKalle Valo
1423423e3ce3SKalle Valo spin_lock(&dev->wl->irq_lock);
1424423e3ce3SKalle Valo
1425423e3ce3SKalle Valo if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED))
1426423e3ce3SKalle Valo /* This can only happen on shared IRQ lines. */
1427423e3ce3SKalle Valo goto out;
1428423e3ce3SKalle Valo reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1429423e3ce3SKalle Valo if (reason == 0xffffffff) /* shared IRQ */
1430423e3ce3SKalle Valo goto out;
1431423e3ce3SKalle Valo ret = IRQ_HANDLED;
1432423e3ce3SKalle Valo reason &= dev->irq_mask;
1433423e3ce3SKalle Valo if (!reason)
1434423e3ce3SKalle Valo goto out;
1435423e3ce3SKalle Valo
1436423e3ce3SKalle Valo dev->dma_reason[0] = b43legacy_read32(dev,
1437423e3ce3SKalle Valo B43legacy_MMIO_DMA0_REASON)
1438423e3ce3SKalle Valo & 0x0001DC00;
1439423e3ce3SKalle Valo dev->dma_reason[1] = b43legacy_read32(dev,
1440423e3ce3SKalle Valo B43legacy_MMIO_DMA1_REASON)
1441423e3ce3SKalle Valo & 0x0000DC00;
1442423e3ce3SKalle Valo dev->dma_reason[2] = b43legacy_read32(dev,
1443423e3ce3SKalle Valo B43legacy_MMIO_DMA2_REASON)
1444423e3ce3SKalle Valo & 0x0000DC00;
1445423e3ce3SKalle Valo dev->dma_reason[3] = b43legacy_read32(dev,
1446423e3ce3SKalle Valo B43legacy_MMIO_DMA3_REASON)
1447423e3ce3SKalle Valo & 0x0001DC00;
1448423e3ce3SKalle Valo dev->dma_reason[4] = b43legacy_read32(dev,
1449423e3ce3SKalle Valo B43legacy_MMIO_DMA4_REASON)
1450423e3ce3SKalle Valo & 0x0000DC00;
1451423e3ce3SKalle Valo dev->dma_reason[5] = b43legacy_read32(dev,
1452423e3ce3SKalle Valo B43legacy_MMIO_DMA5_REASON)
1453423e3ce3SKalle Valo & 0x0000DC00;
1454423e3ce3SKalle Valo
1455423e3ce3SKalle Valo b43legacy_interrupt_ack(dev, reason);
1456423e3ce3SKalle Valo /* Disable all IRQs. They are enabled again in the bottom half. */
1457423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
1458423e3ce3SKalle Valo /* Save the reason code and call our bottom half. */
1459423e3ce3SKalle Valo dev->irq_reason = reason;
1460423e3ce3SKalle Valo tasklet_schedule(&dev->isr_tasklet);
1461423e3ce3SKalle Valo out:
1462423e3ce3SKalle Valo spin_unlock(&dev->wl->irq_lock);
1463423e3ce3SKalle Valo
1464423e3ce3SKalle Valo return ret;
1465423e3ce3SKalle Valo }
1466423e3ce3SKalle Valo
b43legacy_release_firmware(struct b43legacy_wldev * dev)1467423e3ce3SKalle Valo static void b43legacy_release_firmware(struct b43legacy_wldev *dev)
1468423e3ce3SKalle Valo {
1469423e3ce3SKalle Valo release_firmware(dev->fw.ucode);
1470423e3ce3SKalle Valo dev->fw.ucode = NULL;
1471423e3ce3SKalle Valo release_firmware(dev->fw.pcm);
1472423e3ce3SKalle Valo dev->fw.pcm = NULL;
1473423e3ce3SKalle Valo release_firmware(dev->fw.initvals);
1474423e3ce3SKalle Valo dev->fw.initvals = NULL;
1475423e3ce3SKalle Valo release_firmware(dev->fw.initvals_band);
1476423e3ce3SKalle Valo dev->fw.initvals_band = NULL;
1477423e3ce3SKalle Valo }
1478423e3ce3SKalle Valo
b43legacy_print_fw_helptext(struct b43legacy_wl * wl)1479423e3ce3SKalle Valo static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl)
1480423e3ce3SKalle Valo {
14818bd4147cSFlavio Suligoi b43legacyerr(wl, "You must go to https://wireless.wiki.kernel.org/en/"
14828bd4147cSFlavio Suligoi "users/Drivers/b43#devicefirmware "
1483423e3ce3SKalle Valo "and download the correct firmware (version 3).\n");
1484423e3ce3SKalle Valo }
1485423e3ce3SKalle Valo
b43legacy_fw_cb(const struct firmware * firmware,void * context)1486423e3ce3SKalle Valo static void b43legacy_fw_cb(const struct firmware *firmware, void *context)
1487423e3ce3SKalle Valo {
1488423e3ce3SKalle Valo struct b43legacy_wldev *dev = context;
1489423e3ce3SKalle Valo
1490423e3ce3SKalle Valo dev->fwp = firmware;
1491423e3ce3SKalle Valo complete(&dev->fw_load_complete);
1492423e3ce3SKalle Valo }
1493423e3ce3SKalle Valo
do_request_fw(struct b43legacy_wldev * dev,const char * name,const struct firmware ** fw,bool async)1494423e3ce3SKalle Valo static int do_request_fw(struct b43legacy_wldev *dev,
1495423e3ce3SKalle Valo const char *name,
1496423e3ce3SKalle Valo const struct firmware **fw, bool async)
1497423e3ce3SKalle Valo {
1498423e3ce3SKalle Valo char path[sizeof(modparam_fwpostfix) + 32];
1499423e3ce3SKalle Valo struct b43legacy_fw_header *hdr;
1500423e3ce3SKalle Valo u32 size;
1501423e3ce3SKalle Valo int err;
1502423e3ce3SKalle Valo
1503423e3ce3SKalle Valo if (!name)
1504423e3ce3SKalle Valo return 0;
1505423e3ce3SKalle Valo
1506423e3ce3SKalle Valo snprintf(path, ARRAY_SIZE(path),
1507423e3ce3SKalle Valo "b43legacy%s/%s.fw",
1508423e3ce3SKalle Valo modparam_fwpostfix, name);
1509423e3ce3SKalle Valo b43legacyinfo(dev->wl, "Loading firmware %s\n", path);
1510423e3ce3SKalle Valo if (async) {
1511423e3ce3SKalle Valo init_completion(&dev->fw_load_complete);
1512423e3ce3SKalle Valo err = request_firmware_nowait(THIS_MODULE, 1, path,
1513423e3ce3SKalle Valo dev->dev->dev, GFP_KERNEL,
1514423e3ce3SKalle Valo dev, b43legacy_fw_cb);
1515423e3ce3SKalle Valo if (err) {
1516423e3ce3SKalle Valo b43legacyerr(dev->wl, "Unable to load firmware\n");
1517423e3ce3SKalle Valo return err;
1518423e3ce3SKalle Valo }
1519423e3ce3SKalle Valo /* stall here until fw ready */
1520423e3ce3SKalle Valo wait_for_completion(&dev->fw_load_complete);
1521423e3ce3SKalle Valo if (!dev->fwp)
1522423e3ce3SKalle Valo err = -EINVAL;
1523423e3ce3SKalle Valo *fw = dev->fwp;
1524423e3ce3SKalle Valo } else {
1525423e3ce3SKalle Valo err = request_firmware(fw, path, dev->dev->dev);
1526423e3ce3SKalle Valo }
1527423e3ce3SKalle Valo if (err) {
1528423e3ce3SKalle Valo b43legacyerr(dev->wl, "Firmware file \"%s\" not found "
1529423e3ce3SKalle Valo "or load failed.\n", path);
1530423e3ce3SKalle Valo return err;
1531423e3ce3SKalle Valo }
1532423e3ce3SKalle Valo if ((*fw)->size < sizeof(struct b43legacy_fw_header))
1533423e3ce3SKalle Valo goto err_format;
1534423e3ce3SKalle Valo hdr = (struct b43legacy_fw_header *)((*fw)->data);
1535423e3ce3SKalle Valo switch (hdr->type) {
1536423e3ce3SKalle Valo case B43legacy_FW_TYPE_UCODE:
1537423e3ce3SKalle Valo case B43legacy_FW_TYPE_PCM:
1538423e3ce3SKalle Valo size = be32_to_cpu(hdr->size);
1539423e3ce3SKalle Valo if (size != (*fw)->size - sizeof(struct b43legacy_fw_header))
1540423e3ce3SKalle Valo goto err_format;
1541ce3b6845SGustavo A. R. Silva fallthrough;
1542423e3ce3SKalle Valo case B43legacy_FW_TYPE_IV:
1543423e3ce3SKalle Valo if (hdr->ver != 1)
1544423e3ce3SKalle Valo goto err_format;
1545423e3ce3SKalle Valo break;
1546423e3ce3SKalle Valo default:
1547423e3ce3SKalle Valo goto err_format;
1548423e3ce3SKalle Valo }
1549423e3ce3SKalle Valo
1550423e3ce3SKalle Valo return err;
1551423e3ce3SKalle Valo
1552423e3ce3SKalle Valo err_format:
1553423e3ce3SKalle Valo b43legacyerr(dev->wl, "Firmware file \"%s\" format error.\n", path);
1554423e3ce3SKalle Valo return -EPROTO;
1555423e3ce3SKalle Valo }
1556423e3ce3SKalle Valo
1557423e3ce3SKalle Valo static int b43legacy_one_core_attach(struct ssb_device *dev,
1558423e3ce3SKalle Valo struct b43legacy_wl *wl);
1559423e3ce3SKalle Valo static void b43legacy_one_core_detach(struct ssb_device *dev);
1560423e3ce3SKalle Valo
b43legacy_request_firmware(struct work_struct * work)1561423e3ce3SKalle Valo static void b43legacy_request_firmware(struct work_struct *work)
1562423e3ce3SKalle Valo {
1563423e3ce3SKalle Valo struct b43legacy_wl *wl = container_of(work,
1564423e3ce3SKalle Valo struct b43legacy_wl, firmware_load);
1565423e3ce3SKalle Valo struct b43legacy_wldev *dev = wl->current_dev;
1566423e3ce3SKalle Valo struct b43legacy_firmware *fw = &dev->fw;
1567423e3ce3SKalle Valo const u8 rev = dev->dev->id.revision;
1568423e3ce3SKalle Valo const char *filename;
1569423e3ce3SKalle Valo int err;
1570423e3ce3SKalle Valo
1571423e3ce3SKalle Valo if (!fw->ucode) {
1572423e3ce3SKalle Valo if (rev == 2)
1573423e3ce3SKalle Valo filename = "ucode2";
1574423e3ce3SKalle Valo else if (rev == 4)
1575423e3ce3SKalle Valo filename = "ucode4";
1576423e3ce3SKalle Valo else
1577423e3ce3SKalle Valo filename = "ucode5";
1578423e3ce3SKalle Valo err = do_request_fw(dev, filename, &fw->ucode, true);
1579423e3ce3SKalle Valo if (err)
1580423e3ce3SKalle Valo goto err_load;
1581423e3ce3SKalle Valo }
1582423e3ce3SKalle Valo if (!fw->pcm) {
1583423e3ce3SKalle Valo if (rev < 5)
1584423e3ce3SKalle Valo filename = "pcm4";
1585423e3ce3SKalle Valo else
1586423e3ce3SKalle Valo filename = "pcm5";
1587423e3ce3SKalle Valo err = do_request_fw(dev, filename, &fw->pcm, false);
1588423e3ce3SKalle Valo if (err)
1589423e3ce3SKalle Valo goto err_load;
1590423e3ce3SKalle Valo }
1591423e3ce3SKalle Valo if (!fw->initvals) {
1592423e3ce3SKalle Valo switch (dev->phy.type) {
1593423e3ce3SKalle Valo case B43legacy_PHYTYPE_B:
1594423e3ce3SKalle Valo case B43legacy_PHYTYPE_G:
1595423e3ce3SKalle Valo if ((rev >= 5) && (rev <= 10))
1596423e3ce3SKalle Valo filename = "b0g0initvals5";
1597423e3ce3SKalle Valo else if (rev == 2 || rev == 4)
1598423e3ce3SKalle Valo filename = "b0g0initvals2";
1599423e3ce3SKalle Valo else
1600423e3ce3SKalle Valo goto err_no_initvals;
1601423e3ce3SKalle Valo break;
1602423e3ce3SKalle Valo default:
1603423e3ce3SKalle Valo goto err_no_initvals;
1604423e3ce3SKalle Valo }
1605423e3ce3SKalle Valo err = do_request_fw(dev, filename, &fw->initvals, false);
1606423e3ce3SKalle Valo if (err)
1607423e3ce3SKalle Valo goto err_load;
1608423e3ce3SKalle Valo }
1609423e3ce3SKalle Valo if (!fw->initvals_band) {
1610423e3ce3SKalle Valo switch (dev->phy.type) {
1611423e3ce3SKalle Valo case B43legacy_PHYTYPE_B:
1612423e3ce3SKalle Valo case B43legacy_PHYTYPE_G:
1613423e3ce3SKalle Valo if ((rev >= 5) && (rev <= 10))
1614423e3ce3SKalle Valo filename = "b0g0bsinitvals5";
1615423e3ce3SKalle Valo else if (rev >= 11)
1616423e3ce3SKalle Valo filename = NULL;
1617423e3ce3SKalle Valo else if (rev == 2 || rev == 4)
1618423e3ce3SKalle Valo filename = NULL;
1619423e3ce3SKalle Valo else
1620423e3ce3SKalle Valo goto err_no_initvals;
1621423e3ce3SKalle Valo break;
1622423e3ce3SKalle Valo default:
1623423e3ce3SKalle Valo goto err_no_initvals;
1624423e3ce3SKalle Valo }
1625423e3ce3SKalle Valo err = do_request_fw(dev, filename, &fw->initvals_band, false);
1626423e3ce3SKalle Valo if (err)
1627423e3ce3SKalle Valo goto err_load;
1628423e3ce3SKalle Valo }
1629423e3ce3SKalle Valo err = ieee80211_register_hw(wl->hw);
1630423e3ce3SKalle Valo if (err)
1631423e3ce3SKalle Valo goto err_one_core_detach;
1632423e3ce3SKalle Valo return;
1633423e3ce3SKalle Valo
1634423e3ce3SKalle Valo err_one_core_detach:
1635423e3ce3SKalle Valo b43legacy_one_core_detach(dev->dev);
1636423e3ce3SKalle Valo goto error;
1637423e3ce3SKalle Valo
1638423e3ce3SKalle Valo err_load:
1639423e3ce3SKalle Valo b43legacy_print_fw_helptext(dev->wl);
1640423e3ce3SKalle Valo goto error;
1641423e3ce3SKalle Valo
1642423e3ce3SKalle Valo err_no_initvals:
1643423e3ce3SKalle Valo err = -ENODEV;
1644423e3ce3SKalle Valo b43legacyerr(dev->wl, "No Initial Values firmware file for PHY %u, "
1645423e3ce3SKalle Valo "core rev %u\n", dev->phy.type, rev);
1646423e3ce3SKalle Valo goto error;
1647423e3ce3SKalle Valo
1648423e3ce3SKalle Valo error:
1649423e3ce3SKalle Valo b43legacy_release_firmware(dev);
1650423e3ce3SKalle Valo return;
1651423e3ce3SKalle Valo }
1652423e3ce3SKalle Valo
b43legacy_upload_microcode(struct b43legacy_wldev * dev)1653423e3ce3SKalle Valo static int b43legacy_upload_microcode(struct b43legacy_wldev *dev)
1654423e3ce3SKalle Valo {
1655423e3ce3SKalle Valo struct wiphy *wiphy = dev->wl->hw->wiphy;
1656423e3ce3SKalle Valo const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1657423e3ce3SKalle Valo const __be32 *data;
1658423e3ce3SKalle Valo unsigned int i;
1659423e3ce3SKalle Valo unsigned int len;
1660423e3ce3SKalle Valo u16 fwrev;
1661423e3ce3SKalle Valo u16 fwpatch;
1662423e3ce3SKalle Valo u16 fwdate;
1663423e3ce3SKalle Valo u16 fwtime;
1664423e3ce3SKalle Valo u32 tmp, macctl;
1665423e3ce3SKalle Valo int err = 0;
1666423e3ce3SKalle Valo
1667423e3ce3SKalle Valo /* Jump the microcode PSM to offset 0 */
1668423e3ce3SKalle Valo macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1669423e3ce3SKalle Valo B43legacy_WARN_ON(macctl & B43legacy_MACCTL_PSM_RUN);
1670423e3ce3SKalle Valo macctl |= B43legacy_MACCTL_PSM_JMP0;
1671423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1672423e3ce3SKalle Valo /* Zero out all microcode PSM registers and shared memory. */
1673423e3ce3SKalle Valo for (i = 0; i < 64; i++)
1674423e3ce3SKalle Valo b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, i, 0);
1675423e3ce3SKalle Valo for (i = 0; i < 4096; i += 2)
1676423e3ce3SKalle Valo b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, i, 0);
1677423e3ce3SKalle Valo
1678423e3ce3SKalle Valo /* Upload Microcode. */
1679423e3ce3SKalle Valo data = (__be32 *) (dev->fw.ucode->data + hdr_len);
1680423e3ce3SKalle Valo len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32);
1681423e3ce3SKalle Valo b43legacy_shm_control_word(dev,
1682423e3ce3SKalle Valo B43legacy_SHM_UCODE |
1683423e3ce3SKalle Valo B43legacy_SHM_AUTOINC_W,
1684423e3ce3SKalle Valo 0x0000);
1685423e3ce3SKalle Valo for (i = 0; i < len; i++) {
1686423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1687423e3ce3SKalle Valo be32_to_cpu(data[i]));
1688423e3ce3SKalle Valo udelay(10);
1689423e3ce3SKalle Valo }
1690423e3ce3SKalle Valo
1691423e3ce3SKalle Valo if (dev->fw.pcm) {
1692423e3ce3SKalle Valo /* Upload PCM data. */
1693423e3ce3SKalle Valo data = (__be32 *) (dev->fw.pcm->data + hdr_len);
1694423e3ce3SKalle Valo len = (dev->fw.pcm->size - hdr_len) / sizeof(__be32);
1695423e3ce3SKalle Valo b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EA);
1696423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 0x00004000);
1697423e3ce3SKalle Valo /* No need for autoinc bit in SHM_HW */
1698423e3ce3SKalle Valo b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EB);
1699423e3ce3SKalle Valo for (i = 0; i < len; i++) {
1700423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1701423e3ce3SKalle Valo be32_to_cpu(data[i]));
1702423e3ce3SKalle Valo udelay(10);
1703423e3ce3SKalle Valo }
1704423e3ce3SKalle Valo }
1705423e3ce3SKalle Valo
1706423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1707423e3ce3SKalle Valo B43legacy_IRQ_ALL);
1708423e3ce3SKalle Valo
1709423e3ce3SKalle Valo /* Start the microcode PSM */
1710423e3ce3SKalle Valo macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1711423e3ce3SKalle Valo macctl &= ~B43legacy_MACCTL_PSM_JMP0;
1712423e3ce3SKalle Valo macctl |= B43legacy_MACCTL_PSM_RUN;
1713423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1714423e3ce3SKalle Valo
1715423e3ce3SKalle Valo /* Wait for the microcode to load and respond */
1716423e3ce3SKalle Valo i = 0;
1717423e3ce3SKalle Valo while (1) {
1718423e3ce3SKalle Valo tmp = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1719423e3ce3SKalle Valo if (tmp == B43legacy_IRQ_MAC_SUSPENDED)
1720423e3ce3SKalle Valo break;
1721423e3ce3SKalle Valo i++;
1722423e3ce3SKalle Valo if (i >= B43legacy_IRQWAIT_MAX_RETRIES) {
1723423e3ce3SKalle Valo b43legacyerr(dev->wl, "Microcode not responding\n");
1724423e3ce3SKalle Valo b43legacy_print_fw_helptext(dev->wl);
1725423e3ce3SKalle Valo err = -ENODEV;
1726423e3ce3SKalle Valo goto error;
1727423e3ce3SKalle Valo }
1728423e3ce3SKalle Valo msleep_interruptible(50);
1729423e3ce3SKalle Valo if (signal_pending(current)) {
1730423e3ce3SKalle Valo err = -EINTR;
1731423e3ce3SKalle Valo goto error;
1732423e3ce3SKalle Valo }
1733423e3ce3SKalle Valo }
1734423e3ce3SKalle Valo /* dummy read follows */
1735423e3ce3SKalle Valo b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1736423e3ce3SKalle Valo
1737423e3ce3SKalle Valo /* Get and check the revisions. */
1738423e3ce3SKalle Valo fwrev = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1739423e3ce3SKalle Valo B43legacy_SHM_SH_UCODEREV);
1740423e3ce3SKalle Valo fwpatch = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1741423e3ce3SKalle Valo B43legacy_SHM_SH_UCODEPATCH);
1742423e3ce3SKalle Valo fwdate = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1743423e3ce3SKalle Valo B43legacy_SHM_SH_UCODEDATE);
1744423e3ce3SKalle Valo fwtime = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1745423e3ce3SKalle Valo B43legacy_SHM_SH_UCODETIME);
1746423e3ce3SKalle Valo
1747423e3ce3SKalle Valo if (fwrev > 0x128) {
1748423e3ce3SKalle Valo b43legacyerr(dev->wl, "YOU ARE TRYING TO LOAD V4 FIRMWARE."
1749423e3ce3SKalle Valo " Only firmware from binary drivers version 3.x"
1750423e3ce3SKalle Valo " is supported. You must change your firmware"
1751423e3ce3SKalle Valo " files.\n");
1752423e3ce3SKalle Valo b43legacy_print_fw_helptext(dev->wl);
1753423e3ce3SKalle Valo err = -EOPNOTSUPP;
1754423e3ce3SKalle Valo goto error;
1755423e3ce3SKalle Valo }
1756423e3ce3SKalle Valo b43legacyinfo(dev->wl, "Loading firmware version 0x%X, patch level %u "
1757423e3ce3SKalle Valo "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch,
1758423e3ce3SKalle Valo (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF,
1759423e3ce3SKalle Valo (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F,
1760423e3ce3SKalle Valo fwtime & 0x1F);
1761423e3ce3SKalle Valo
1762423e3ce3SKalle Valo dev->fw.rev = fwrev;
1763423e3ce3SKalle Valo dev->fw.patch = fwpatch;
1764423e3ce3SKalle Valo
1765423e3ce3SKalle Valo snprintf(wiphy->fw_version, sizeof(wiphy->fw_version), "%u.%u",
1766423e3ce3SKalle Valo dev->fw.rev, dev->fw.patch);
1767423e3ce3SKalle Valo wiphy->hw_version = dev->dev->id.coreid;
1768423e3ce3SKalle Valo
1769423e3ce3SKalle Valo return 0;
1770423e3ce3SKalle Valo
1771423e3ce3SKalle Valo error:
1772423e3ce3SKalle Valo macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1773423e3ce3SKalle Valo macctl &= ~B43legacy_MACCTL_PSM_RUN;
1774423e3ce3SKalle Valo macctl |= B43legacy_MACCTL_PSM_JMP0;
1775423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1776423e3ce3SKalle Valo
1777423e3ce3SKalle Valo return err;
1778423e3ce3SKalle Valo }
1779423e3ce3SKalle Valo
b43legacy_write_initvals(struct b43legacy_wldev * dev,const struct b43legacy_iv * ivals,size_t count,size_t array_size)1780423e3ce3SKalle Valo static int b43legacy_write_initvals(struct b43legacy_wldev *dev,
1781423e3ce3SKalle Valo const struct b43legacy_iv *ivals,
1782423e3ce3SKalle Valo size_t count,
1783423e3ce3SKalle Valo size_t array_size)
1784423e3ce3SKalle Valo {
1785423e3ce3SKalle Valo const struct b43legacy_iv *iv;
1786423e3ce3SKalle Valo u16 offset;
1787423e3ce3SKalle Valo size_t i;
1788423e3ce3SKalle Valo bool bit32;
1789423e3ce3SKalle Valo
1790423e3ce3SKalle Valo BUILD_BUG_ON(sizeof(struct b43legacy_iv) != 6);
1791423e3ce3SKalle Valo iv = ivals;
1792423e3ce3SKalle Valo for (i = 0; i < count; i++) {
1793423e3ce3SKalle Valo if (array_size < sizeof(iv->offset_size))
1794423e3ce3SKalle Valo goto err_format;
1795423e3ce3SKalle Valo array_size -= sizeof(iv->offset_size);
1796423e3ce3SKalle Valo offset = be16_to_cpu(iv->offset_size);
1797423e3ce3SKalle Valo bit32 = !!(offset & B43legacy_IV_32BIT);
1798423e3ce3SKalle Valo offset &= B43legacy_IV_OFFSET_MASK;
1799423e3ce3SKalle Valo if (offset >= 0x1000)
1800423e3ce3SKalle Valo goto err_format;
1801423e3ce3SKalle Valo if (bit32) {
1802423e3ce3SKalle Valo u32 value;
1803423e3ce3SKalle Valo
1804423e3ce3SKalle Valo if (array_size < sizeof(iv->data.d32))
1805423e3ce3SKalle Valo goto err_format;
1806423e3ce3SKalle Valo array_size -= sizeof(iv->data.d32);
1807423e3ce3SKalle Valo
1808423e3ce3SKalle Valo value = get_unaligned_be32(&iv->data.d32);
1809423e3ce3SKalle Valo b43legacy_write32(dev, offset, value);
1810423e3ce3SKalle Valo
1811423e3ce3SKalle Valo iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1812423e3ce3SKalle Valo sizeof(__be16) +
1813423e3ce3SKalle Valo sizeof(__be32));
1814423e3ce3SKalle Valo } else {
1815423e3ce3SKalle Valo u16 value;
1816423e3ce3SKalle Valo
1817423e3ce3SKalle Valo if (array_size < sizeof(iv->data.d16))
1818423e3ce3SKalle Valo goto err_format;
1819423e3ce3SKalle Valo array_size -= sizeof(iv->data.d16);
1820423e3ce3SKalle Valo
1821423e3ce3SKalle Valo value = be16_to_cpu(iv->data.d16);
1822423e3ce3SKalle Valo b43legacy_write16(dev, offset, value);
1823423e3ce3SKalle Valo
1824423e3ce3SKalle Valo iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1825423e3ce3SKalle Valo sizeof(__be16) +
1826423e3ce3SKalle Valo sizeof(__be16));
1827423e3ce3SKalle Valo }
1828423e3ce3SKalle Valo }
1829423e3ce3SKalle Valo if (array_size)
1830423e3ce3SKalle Valo goto err_format;
1831423e3ce3SKalle Valo
1832423e3ce3SKalle Valo return 0;
1833423e3ce3SKalle Valo
1834423e3ce3SKalle Valo err_format:
1835423e3ce3SKalle Valo b43legacyerr(dev->wl, "Initial Values Firmware file-format error.\n");
1836423e3ce3SKalle Valo b43legacy_print_fw_helptext(dev->wl);
1837423e3ce3SKalle Valo
1838423e3ce3SKalle Valo return -EPROTO;
1839423e3ce3SKalle Valo }
1840423e3ce3SKalle Valo
b43legacy_upload_initvals(struct b43legacy_wldev * dev)1841423e3ce3SKalle Valo static int b43legacy_upload_initvals(struct b43legacy_wldev *dev)
1842423e3ce3SKalle Valo {
1843423e3ce3SKalle Valo const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1844423e3ce3SKalle Valo const struct b43legacy_fw_header *hdr;
1845423e3ce3SKalle Valo struct b43legacy_firmware *fw = &dev->fw;
1846423e3ce3SKalle Valo const struct b43legacy_iv *ivals;
1847423e3ce3SKalle Valo size_t count;
1848423e3ce3SKalle Valo int err;
1849423e3ce3SKalle Valo
1850423e3ce3SKalle Valo hdr = (const struct b43legacy_fw_header *)(fw->initvals->data);
1851423e3ce3SKalle Valo ivals = (const struct b43legacy_iv *)(fw->initvals->data + hdr_len);
1852423e3ce3SKalle Valo count = be32_to_cpu(hdr->size);
1853423e3ce3SKalle Valo err = b43legacy_write_initvals(dev, ivals, count,
1854423e3ce3SKalle Valo fw->initvals->size - hdr_len);
1855423e3ce3SKalle Valo if (err)
1856423e3ce3SKalle Valo goto out;
1857423e3ce3SKalle Valo if (fw->initvals_band) {
1858423e3ce3SKalle Valo hdr = (const struct b43legacy_fw_header *)
1859423e3ce3SKalle Valo (fw->initvals_band->data);
1860423e3ce3SKalle Valo ivals = (const struct b43legacy_iv *)(fw->initvals_band->data
1861423e3ce3SKalle Valo + hdr_len);
1862423e3ce3SKalle Valo count = be32_to_cpu(hdr->size);
1863423e3ce3SKalle Valo err = b43legacy_write_initvals(dev, ivals, count,
1864423e3ce3SKalle Valo fw->initvals_band->size - hdr_len);
1865423e3ce3SKalle Valo if (err)
1866423e3ce3SKalle Valo goto out;
1867423e3ce3SKalle Valo }
1868423e3ce3SKalle Valo out:
1869423e3ce3SKalle Valo
1870423e3ce3SKalle Valo return err;
1871423e3ce3SKalle Valo }
1872423e3ce3SKalle Valo
1873423e3ce3SKalle Valo /* Initialize the GPIOs
1874140c6026SAlexander A. Klimov * https://bcm-specs.sipsolutions.net/GPIO
1875423e3ce3SKalle Valo */
b43legacy_gpio_init(struct b43legacy_wldev * dev)1876423e3ce3SKalle Valo static int b43legacy_gpio_init(struct b43legacy_wldev *dev)
1877423e3ce3SKalle Valo {
1878423e3ce3SKalle Valo struct ssb_bus *bus = dev->dev->bus;
1879423e3ce3SKalle Valo struct ssb_device *gpiodev, *pcidev = NULL;
1880423e3ce3SKalle Valo u32 mask;
1881423e3ce3SKalle Valo u32 set;
1882423e3ce3SKalle Valo
1883423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1884423e3ce3SKalle Valo b43legacy_read32(dev,
1885423e3ce3SKalle Valo B43legacy_MMIO_MACCTL)
1886423e3ce3SKalle Valo & 0xFFFF3FFF);
1887423e3ce3SKalle Valo
1888423e3ce3SKalle Valo b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1889423e3ce3SKalle Valo b43legacy_read16(dev,
1890423e3ce3SKalle Valo B43legacy_MMIO_GPIO_MASK)
1891423e3ce3SKalle Valo | 0x000F);
1892423e3ce3SKalle Valo
1893423e3ce3SKalle Valo mask = 0x0000001F;
1894423e3ce3SKalle Valo set = 0x0000000F;
1895423e3ce3SKalle Valo if (dev->dev->bus->chip_id == 0x4301) {
1896423e3ce3SKalle Valo mask |= 0x0060;
1897423e3ce3SKalle Valo set |= 0x0060;
1898423e3ce3SKalle Valo }
1899423e3ce3SKalle Valo if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_PACTRL) {
1900423e3ce3SKalle Valo b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1901423e3ce3SKalle Valo b43legacy_read16(dev,
1902423e3ce3SKalle Valo B43legacy_MMIO_GPIO_MASK)
1903423e3ce3SKalle Valo | 0x0200);
1904423e3ce3SKalle Valo mask |= 0x0200;
1905423e3ce3SKalle Valo set |= 0x0200;
1906423e3ce3SKalle Valo }
1907423e3ce3SKalle Valo if (dev->dev->id.revision >= 2)
1908423e3ce3SKalle Valo mask |= 0x0010; /* FIXME: This is redundant. */
1909423e3ce3SKalle Valo
1910423e3ce3SKalle Valo #ifdef CONFIG_SSB_DRIVER_PCICORE
1911423e3ce3SKalle Valo pcidev = bus->pcicore.dev;
1912423e3ce3SKalle Valo #endif
1913423e3ce3SKalle Valo gpiodev = bus->chipco.dev ? : pcidev;
1914423e3ce3SKalle Valo if (!gpiodev)
1915423e3ce3SKalle Valo return 0;
1916423e3ce3SKalle Valo ssb_write32(gpiodev, B43legacy_GPIO_CONTROL,
1917423e3ce3SKalle Valo (ssb_read32(gpiodev, B43legacy_GPIO_CONTROL)
1918423e3ce3SKalle Valo & ~mask) | set);
1919423e3ce3SKalle Valo
1920423e3ce3SKalle Valo return 0;
1921423e3ce3SKalle Valo }
1922423e3ce3SKalle Valo
1923423e3ce3SKalle Valo /* Turn off all GPIO stuff. Call this on module unload, for example. */
b43legacy_gpio_cleanup(struct b43legacy_wldev * dev)1924423e3ce3SKalle Valo static void b43legacy_gpio_cleanup(struct b43legacy_wldev *dev)
1925423e3ce3SKalle Valo {
1926423e3ce3SKalle Valo struct ssb_bus *bus = dev->dev->bus;
1927423e3ce3SKalle Valo struct ssb_device *gpiodev, *pcidev = NULL;
1928423e3ce3SKalle Valo
1929423e3ce3SKalle Valo #ifdef CONFIG_SSB_DRIVER_PCICORE
1930423e3ce3SKalle Valo pcidev = bus->pcicore.dev;
1931423e3ce3SKalle Valo #endif
1932423e3ce3SKalle Valo gpiodev = bus->chipco.dev ? : pcidev;
1933423e3ce3SKalle Valo if (!gpiodev)
1934423e3ce3SKalle Valo return;
1935423e3ce3SKalle Valo ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 0);
1936423e3ce3SKalle Valo }
1937423e3ce3SKalle Valo
1938423e3ce3SKalle Valo /* http://bcm-specs.sipsolutions.net/EnableMac */
b43legacy_mac_enable(struct b43legacy_wldev * dev)1939423e3ce3SKalle Valo void b43legacy_mac_enable(struct b43legacy_wldev *dev)
1940423e3ce3SKalle Valo {
1941423e3ce3SKalle Valo dev->mac_suspended--;
1942423e3ce3SKalle Valo B43legacy_WARN_ON(dev->mac_suspended < 0);
1943423e3ce3SKalle Valo B43legacy_WARN_ON(irqs_disabled());
1944423e3ce3SKalle Valo if (dev->mac_suspended == 0) {
1945423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1946423e3ce3SKalle Valo b43legacy_read32(dev,
1947423e3ce3SKalle Valo B43legacy_MMIO_MACCTL)
1948423e3ce3SKalle Valo | B43legacy_MACCTL_ENABLED);
1949423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1950423e3ce3SKalle Valo B43legacy_IRQ_MAC_SUSPENDED);
1951423e3ce3SKalle Valo /* the next two are dummy reads */
1952423e3ce3SKalle Valo b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1953423e3ce3SKalle Valo b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1954423e3ce3SKalle Valo b43legacy_power_saving_ctl_bits(dev, -1, -1);
1955423e3ce3SKalle Valo
1956423e3ce3SKalle Valo /* Re-enable IRQs. */
1957423e3ce3SKalle Valo spin_lock_irq(&dev->wl->irq_lock);
1958423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK,
1959423e3ce3SKalle Valo dev->irq_mask);
1960423e3ce3SKalle Valo spin_unlock_irq(&dev->wl->irq_lock);
1961423e3ce3SKalle Valo }
1962423e3ce3SKalle Valo }
1963423e3ce3SKalle Valo
1964140c6026SAlexander A. Klimov /* https://bcm-specs.sipsolutions.net/SuspendMAC */
b43legacy_mac_suspend(struct b43legacy_wldev * dev)1965423e3ce3SKalle Valo void b43legacy_mac_suspend(struct b43legacy_wldev *dev)
1966423e3ce3SKalle Valo {
1967423e3ce3SKalle Valo int i;
1968423e3ce3SKalle Valo u32 tmp;
1969423e3ce3SKalle Valo
1970423e3ce3SKalle Valo might_sleep();
1971423e3ce3SKalle Valo B43legacy_WARN_ON(irqs_disabled());
1972423e3ce3SKalle Valo B43legacy_WARN_ON(dev->mac_suspended < 0);
1973423e3ce3SKalle Valo
1974423e3ce3SKalle Valo if (dev->mac_suspended == 0) {
1975423e3ce3SKalle Valo /* Mask IRQs before suspending MAC. Otherwise
1976423e3ce3SKalle Valo * the MAC stays busy and won't suspend. */
1977423e3ce3SKalle Valo spin_lock_irq(&dev->wl->irq_lock);
1978423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
1979423e3ce3SKalle Valo spin_unlock_irq(&dev->wl->irq_lock);
1980423e3ce3SKalle Valo b43legacy_synchronize_irq(dev);
1981423e3ce3SKalle Valo
1982423e3ce3SKalle Valo b43legacy_power_saving_ctl_bits(dev, -1, 1);
1983423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1984423e3ce3SKalle Valo b43legacy_read32(dev,
1985423e3ce3SKalle Valo B43legacy_MMIO_MACCTL)
1986423e3ce3SKalle Valo & ~B43legacy_MACCTL_ENABLED);
1987423e3ce3SKalle Valo b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1988423e3ce3SKalle Valo for (i = 40; i; i--) {
1989423e3ce3SKalle Valo tmp = b43legacy_read32(dev,
1990423e3ce3SKalle Valo B43legacy_MMIO_GEN_IRQ_REASON);
1991423e3ce3SKalle Valo if (tmp & B43legacy_IRQ_MAC_SUSPENDED)
1992423e3ce3SKalle Valo goto out;
1993423e3ce3SKalle Valo msleep(1);
1994423e3ce3SKalle Valo }
1995423e3ce3SKalle Valo b43legacyerr(dev->wl, "MAC suspend failed\n");
1996423e3ce3SKalle Valo }
1997423e3ce3SKalle Valo out:
1998423e3ce3SKalle Valo dev->mac_suspended++;
1999423e3ce3SKalle Valo }
2000423e3ce3SKalle Valo
b43legacy_adjust_opmode(struct b43legacy_wldev * dev)2001423e3ce3SKalle Valo static void b43legacy_adjust_opmode(struct b43legacy_wldev *dev)
2002423e3ce3SKalle Valo {
2003423e3ce3SKalle Valo struct b43legacy_wl *wl = dev->wl;
2004423e3ce3SKalle Valo u32 ctl;
2005423e3ce3SKalle Valo u16 cfp_pretbtt;
2006423e3ce3SKalle Valo
2007423e3ce3SKalle Valo ctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2008423e3ce3SKalle Valo /* Reset status to STA infrastructure mode. */
2009423e3ce3SKalle Valo ctl &= ~B43legacy_MACCTL_AP;
2010423e3ce3SKalle Valo ctl &= ~B43legacy_MACCTL_KEEP_CTL;
2011423e3ce3SKalle Valo ctl &= ~B43legacy_MACCTL_KEEP_BADPLCP;
2012423e3ce3SKalle Valo ctl &= ~B43legacy_MACCTL_KEEP_BAD;
2013423e3ce3SKalle Valo ctl &= ~B43legacy_MACCTL_PROMISC;
2014423e3ce3SKalle Valo ctl &= ~B43legacy_MACCTL_BEACPROMISC;
2015423e3ce3SKalle Valo ctl |= B43legacy_MACCTL_INFRA;
2016423e3ce3SKalle Valo
2017423e3ce3SKalle Valo if (b43legacy_is_mode(wl, NL80211_IFTYPE_AP))
2018423e3ce3SKalle Valo ctl |= B43legacy_MACCTL_AP;
2019423e3ce3SKalle Valo else if (b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC))
2020423e3ce3SKalle Valo ctl &= ~B43legacy_MACCTL_INFRA;
2021423e3ce3SKalle Valo
2022423e3ce3SKalle Valo if (wl->filter_flags & FIF_CONTROL)
2023423e3ce3SKalle Valo ctl |= B43legacy_MACCTL_KEEP_CTL;
2024423e3ce3SKalle Valo if (wl->filter_flags & FIF_FCSFAIL)
2025423e3ce3SKalle Valo ctl |= B43legacy_MACCTL_KEEP_BAD;
2026423e3ce3SKalle Valo if (wl->filter_flags & FIF_PLCPFAIL)
2027423e3ce3SKalle Valo ctl |= B43legacy_MACCTL_KEEP_BADPLCP;
2028423e3ce3SKalle Valo if (wl->filter_flags & FIF_BCN_PRBRESP_PROMISC)
2029423e3ce3SKalle Valo ctl |= B43legacy_MACCTL_BEACPROMISC;
2030423e3ce3SKalle Valo
2031423e3ce3SKalle Valo /* Workaround: On old hardware the HW-MAC-address-filter
2032423e3ce3SKalle Valo * doesn't work properly, so always run promisc in filter
2033423e3ce3SKalle Valo * it in software. */
2034423e3ce3SKalle Valo if (dev->dev->id.revision <= 4)
2035423e3ce3SKalle Valo ctl |= B43legacy_MACCTL_PROMISC;
2036423e3ce3SKalle Valo
2037423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_MACCTL, ctl);
2038423e3ce3SKalle Valo
2039423e3ce3SKalle Valo cfp_pretbtt = 2;
2040423e3ce3SKalle Valo if ((ctl & B43legacy_MACCTL_INFRA) &&
2041423e3ce3SKalle Valo !(ctl & B43legacy_MACCTL_AP)) {
2042423e3ce3SKalle Valo if (dev->dev->bus->chip_id == 0x4306 &&
2043423e3ce3SKalle Valo dev->dev->bus->chip_rev == 3)
2044423e3ce3SKalle Valo cfp_pretbtt = 100;
2045423e3ce3SKalle Valo else
2046423e3ce3SKalle Valo cfp_pretbtt = 50;
2047423e3ce3SKalle Valo }
2048423e3ce3SKalle Valo b43legacy_write16(dev, 0x612, cfp_pretbtt);
2049423e3ce3SKalle Valo }
2050423e3ce3SKalle Valo
b43legacy_rate_memory_write(struct b43legacy_wldev * dev,u16 rate,int is_ofdm)2051423e3ce3SKalle Valo static void b43legacy_rate_memory_write(struct b43legacy_wldev *dev,
2052423e3ce3SKalle Valo u16 rate,
2053423e3ce3SKalle Valo int is_ofdm)
2054423e3ce3SKalle Valo {
2055423e3ce3SKalle Valo u16 offset;
2056423e3ce3SKalle Valo
2057423e3ce3SKalle Valo if (is_ofdm) {
2058423e3ce3SKalle Valo offset = 0x480;
2059423e3ce3SKalle Valo offset += (b43legacy_plcp_get_ratecode_ofdm(rate) & 0x000F) * 2;
2060423e3ce3SKalle Valo } else {
2061423e3ce3SKalle Valo offset = 0x4C0;
2062423e3ce3SKalle Valo offset += (b43legacy_plcp_get_ratecode_cck(rate) & 0x000F) * 2;
2063423e3ce3SKalle Valo }
2064423e3ce3SKalle Valo b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, offset + 0x20,
2065423e3ce3SKalle Valo b43legacy_shm_read16(dev,
2066423e3ce3SKalle Valo B43legacy_SHM_SHARED, offset));
2067423e3ce3SKalle Valo }
2068423e3ce3SKalle Valo
b43legacy_rate_memory_init(struct b43legacy_wldev * dev)2069423e3ce3SKalle Valo static void b43legacy_rate_memory_init(struct b43legacy_wldev *dev)
2070423e3ce3SKalle Valo {
2071423e3ce3SKalle Valo switch (dev->phy.type) {
2072423e3ce3SKalle Valo case B43legacy_PHYTYPE_G:
2073423e3ce3SKalle Valo b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_6MB, 1);
2074423e3ce3SKalle Valo b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_12MB, 1);
2075423e3ce3SKalle Valo b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_18MB, 1);
2076423e3ce3SKalle Valo b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_24MB, 1);
2077423e3ce3SKalle Valo b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_36MB, 1);
2078423e3ce3SKalle Valo b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_48MB, 1);
2079423e3ce3SKalle Valo b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_54MB, 1);
2080ce3b6845SGustavo A. R. Silva fallthrough;
2081423e3ce3SKalle Valo case B43legacy_PHYTYPE_B:
2082423e3ce3SKalle Valo b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_1MB, 0);
2083423e3ce3SKalle Valo b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_2MB, 0);
2084423e3ce3SKalle Valo b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_5MB, 0);
2085423e3ce3SKalle Valo b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_11MB, 0);
2086423e3ce3SKalle Valo break;
2087423e3ce3SKalle Valo default:
2088423e3ce3SKalle Valo B43legacy_BUG_ON(1);
2089423e3ce3SKalle Valo }
2090423e3ce3SKalle Valo }
2091423e3ce3SKalle Valo
2092423e3ce3SKalle Valo /* Set the TX-Antenna for management frames sent by firmware. */
b43legacy_mgmtframe_txantenna(struct b43legacy_wldev * dev,int antenna)2093423e3ce3SKalle Valo static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev *dev,
2094423e3ce3SKalle Valo int antenna)
2095423e3ce3SKalle Valo {
2096423e3ce3SKalle Valo u16 ant = 0;
2097423e3ce3SKalle Valo u16 tmp;
2098423e3ce3SKalle Valo
2099423e3ce3SKalle Valo switch (antenna) {
2100423e3ce3SKalle Valo case B43legacy_ANTENNA0:
2101423e3ce3SKalle Valo ant |= B43legacy_TX4_PHY_ANT0;
2102423e3ce3SKalle Valo break;
2103423e3ce3SKalle Valo case B43legacy_ANTENNA1:
2104423e3ce3SKalle Valo ant |= B43legacy_TX4_PHY_ANT1;
2105423e3ce3SKalle Valo break;
2106423e3ce3SKalle Valo case B43legacy_ANTENNA_AUTO:
2107423e3ce3SKalle Valo ant |= B43legacy_TX4_PHY_ANTLAST;
2108423e3ce3SKalle Valo break;
2109423e3ce3SKalle Valo default:
2110423e3ce3SKalle Valo B43legacy_BUG_ON(1);
2111423e3ce3SKalle Valo }
2112423e3ce3SKalle Valo
2113423e3ce3SKalle Valo /* FIXME We also need to set the other flags of the PHY control
2114423e3ce3SKalle Valo * field somewhere. */
2115423e3ce3SKalle Valo
2116423e3ce3SKalle Valo /* For Beacons */
2117423e3ce3SKalle Valo tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2118423e3ce3SKalle Valo B43legacy_SHM_SH_BEACPHYCTL);
2119423e3ce3SKalle Valo tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2120423e3ce3SKalle Valo b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2121423e3ce3SKalle Valo B43legacy_SHM_SH_BEACPHYCTL, tmp);
2122423e3ce3SKalle Valo /* For ACK/CTS */
2123423e3ce3SKalle Valo tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2124423e3ce3SKalle Valo B43legacy_SHM_SH_ACKCTSPHYCTL);
2125423e3ce3SKalle Valo tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2126423e3ce3SKalle Valo b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2127423e3ce3SKalle Valo B43legacy_SHM_SH_ACKCTSPHYCTL, tmp);
2128423e3ce3SKalle Valo /* For Probe Resposes */
2129423e3ce3SKalle Valo tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2130423e3ce3SKalle Valo B43legacy_SHM_SH_PRPHYCTL);
2131423e3ce3SKalle Valo tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2132423e3ce3SKalle Valo b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2133423e3ce3SKalle Valo B43legacy_SHM_SH_PRPHYCTL, tmp);
2134423e3ce3SKalle Valo }
2135423e3ce3SKalle Valo
2136423e3ce3SKalle Valo /* This is the opposite of b43legacy_chip_init() */
b43legacy_chip_exit(struct b43legacy_wldev * dev)2137423e3ce3SKalle Valo static void b43legacy_chip_exit(struct b43legacy_wldev *dev)
2138423e3ce3SKalle Valo {
2139423e3ce3SKalle Valo b43legacy_radio_turn_off(dev, 1);
2140423e3ce3SKalle Valo b43legacy_gpio_cleanup(dev);
2141423e3ce3SKalle Valo /* firmware is released later */
2142423e3ce3SKalle Valo }
2143423e3ce3SKalle Valo
2144423e3ce3SKalle Valo /* Initialize the chip
2145140c6026SAlexander A. Klimov * https://bcm-specs.sipsolutions.net/ChipInit
2146423e3ce3SKalle Valo */
b43legacy_chip_init(struct b43legacy_wldev * dev)2147423e3ce3SKalle Valo static int b43legacy_chip_init(struct b43legacy_wldev *dev)
2148423e3ce3SKalle Valo {
2149423e3ce3SKalle Valo struct b43legacy_phy *phy = &dev->phy;
2150423e3ce3SKalle Valo int err;
2151423e3ce3SKalle Valo int tmp;
2152423e3ce3SKalle Valo u32 value32, macctl;
2153423e3ce3SKalle Valo u16 value16;
2154423e3ce3SKalle Valo
2155423e3ce3SKalle Valo /* Initialize the MAC control */
2156423e3ce3SKalle Valo macctl = B43legacy_MACCTL_IHR_ENABLED | B43legacy_MACCTL_SHM_ENABLED;
2157423e3ce3SKalle Valo if (dev->phy.gmode)
2158423e3ce3SKalle Valo macctl |= B43legacy_MACCTL_GMODE;
2159423e3ce3SKalle Valo macctl |= B43legacy_MACCTL_INFRA;
2160423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
2161423e3ce3SKalle Valo
2162423e3ce3SKalle Valo err = b43legacy_upload_microcode(dev);
2163423e3ce3SKalle Valo if (err)
2164423e3ce3SKalle Valo goto out; /* firmware is released later */
2165423e3ce3SKalle Valo
2166423e3ce3SKalle Valo err = b43legacy_gpio_init(dev);
2167423e3ce3SKalle Valo if (err)
2168423e3ce3SKalle Valo goto out; /* firmware is released later */
2169423e3ce3SKalle Valo
2170423e3ce3SKalle Valo err = b43legacy_upload_initvals(dev);
2171423e3ce3SKalle Valo if (err)
2172423e3ce3SKalle Valo goto err_gpio_clean;
2173423e3ce3SKalle Valo b43legacy_radio_turn_on(dev);
2174423e3ce3SKalle Valo
2175423e3ce3SKalle Valo b43legacy_write16(dev, 0x03E6, 0x0000);
2176423e3ce3SKalle Valo err = b43legacy_phy_init(dev);
2177423e3ce3SKalle Valo if (err)
2178423e3ce3SKalle Valo goto err_radio_off;
2179423e3ce3SKalle Valo
2180423e3ce3SKalle Valo /* Select initial Interference Mitigation. */
2181423e3ce3SKalle Valo tmp = phy->interfmode;
2182423e3ce3SKalle Valo phy->interfmode = B43legacy_INTERFMODE_NONE;
2183423e3ce3SKalle Valo b43legacy_radio_set_interference_mitigation(dev, tmp);
2184423e3ce3SKalle Valo
2185423e3ce3SKalle Valo b43legacy_phy_set_antenna_diversity(dev);
2186423e3ce3SKalle Valo b43legacy_mgmtframe_txantenna(dev, B43legacy_ANTENNA_DEFAULT);
2187423e3ce3SKalle Valo
2188423e3ce3SKalle Valo if (phy->type == B43legacy_PHYTYPE_B) {
2189423e3ce3SKalle Valo value16 = b43legacy_read16(dev, 0x005E);
2190423e3ce3SKalle Valo value16 |= 0x0004;
2191423e3ce3SKalle Valo b43legacy_write16(dev, 0x005E, value16);
2192423e3ce3SKalle Valo }
2193423e3ce3SKalle Valo b43legacy_write32(dev, 0x0100, 0x01000000);
2194423e3ce3SKalle Valo if (dev->dev->id.revision < 5)
2195423e3ce3SKalle Valo b43legacy_write32(dev, 0x010C, 0x01000000);
2196423e3ce3SKalle Valo
2197423e3ce3SKalle Valo value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2198423e3ce3SKalle Valo value32 &= ~B43legacy_MACCTL_INFRA;
2199423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2200423e3ce3SKalle Valo value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2201423e3ce3SKalle Valo value32 |= B43legacy_MACCTL_INFRA;
2202423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2203423e3ce3SKalle Valo
2204423e3ce3SKalle Valo if (b43legacy_using_pio(dev)) {
2205423e3ce3SKalle Valo b43legacy_write32(dev, 0x0210, 0x00000100);
2206423e3ce3SKalle Valo b43legacy_write32(dev, 0x0230, 0x00000100);
2207423e3ce3SKalle Valo b43legacy_write32(dev, 0x0250, 0x00000100);
2208423e3ce3SKalle Valo b43legacy_write32(dev, 0x0270, 0x00000100);
2209423e3ce3SKalle Valo b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0034,
2210423e3ce3SKalle Valo 0x0000);
2211423e3ce3SKalle Valo }
2212423e3ce3SKalle Valo
2213423e3ce3SKalle Valo /* Probe Response Timeout value */
2214423e3ce3SKalle Valo /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
2215423e3ce3SKalle Valo b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0074, 0x0000);
2216423e3ce3SKalle Valo
2217423e3ce3SKalle Valo /* Initially set the wireless operation mode. */
2218423e3ce3SKalle Valo b43legacy_adjust_opmode(dev);
2219423e3ce3SKalle Valo
2220423e3ce3SKalle Valo if (dev->dev->id.revision < 3) {
2221423e3ce3SKalle Valo b43legacy_write16(dev, 0x060E, 0x0000);
2222423e3ce3SKalle Valo b43legacy_write16(dev, 0x0610, 0x8000);
2223423e3ce3SKalle Valo b43legacy_write16(dev, 0x0604, 0x0000);
2224423e3ce3SKalle Valo b43legacy_write16(dev, 0x0606, 0x0200);
2225423e3ce3SKalle Valo } else {
2226423e3ce3SKalle Valo b43legacy_write32(dev, 0x0188, 0x80000000);
2227423e3ce3SKalle Valo b43legacy_write32(dev, 0x018C, 0x02000000);
2228423e3ce3SKalle Valo }
2229423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 0x00004000);
2230423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_DMA0_IRQ_MASK, 0x0001DC00);
2231423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_DMA1_IRQ_MASK, 0x0000DC00);
2232423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_DMA2_IRQ_MASK, 0x0000DC00);
2233423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_DMA3_IRQ_MASK, 0x0001DC00);
2234423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_DMA4_IRQ_MASK, 0x0000DC00);
2235423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_DMA5_IRQ_MASK, 0x0000DC00);
2236423e3ce3SKalle Valo
2237423e3ce3SKalle Valo value32 = ssb_read32(dev->dev, SSB_TMSLOW);
2238423e3ce3SKalle Valo value32 |= B43legacy_TMSLOW_MACPHYCLKEN;
2239423e3ce3SKalle Valo ssb_write32(dev->dev, SSB_TMSLOW, value32);
2240423e3ce3SKalle Valo
2241423e3ce3SKalle Valo b43legacy_write16(dev, B43legacy_MMIO_POWERUP_DELAY,
2242423e3ce3SKalle Valo dev->dev->bus->chipco.fast_pwrup_delay);
2243423e3ce3SKalle Valo
2244423e3ce3SKalle Valo /* PHY TX errors counter. */
2245423e3ce3SKalle Valo atomic_set(&phy->txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2246423e3ce3SKalle Valo
2247423e3ce3SKalle Valo B43legacy_WARN_ON(err != 0);
2248423e3ce3SKalle Valo b43legacydbg(dev->wl, "Chip initialized\n");
2249423e3ce3SKalle Valo out:
2250423e3ce3SKalle Valo return err;
2251423e3ce3SKalle Valo
2252423e3ce3SKalle Valo err_radio_off:
2253423e3ce3SKalle Valo b43legacy_radio_turn_off(dev, 1);
2254423e3ce3SKalle Valo err_gpio_clean:
2255423e3ce3SKalle Valo b43legacy_gpio_cleanup(dev);
2256423e3ce3SKalle Valo goto out;
2257423e3ce3SKalle Valo }
2258423e3ce3SKalle Valo
b43legacy_periodic_every120sec(struct b43legacy_wldev * dev)2259423e3ce3SKalle Valo static void b43legacy_periodic_every120sec(struct b43legacy_wldev *dev)
2260423e3ce3SKalle Valo {
2261423e3ce3SKalle Valo struct b43legacy_phy *phy = &dev->phy;
2262423e3ce3SKalle Valo
2263423e3ce3SKalle Valo if (phy->type != B43legacy_PHYTYPE_G || phy->rev < 2)
2264423e3ce3SKalle Valo return;
2265423e3ce3SKalle Valo
2266423e3ce3SKalle Valo b43legacy_mac_suspend(dev);
2267423e3ce3SKalle Valo b43legacy_phy_lo_g_measure(dev);
2268423e3ce3SKalle Valo b43legacy_mac_enable(dev);
2269423e3ce3SKalle Valo }
2270423e3ce3SKalle Valo
b43legacy_periodic_every60sec(struct b43legacy_wldev * dev)2271423e3ce3SKalle Valo static void b43legacy_periodic_every60sec(struct b43legacy_wldev *dev)
2272423e3ce3SKalle Valo {
2273423e3ce3SKalle Valo b43legacy_phy_lo_mark_all_unused(dev);
2274423e3ce3SKalle Valo if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI) {
2275423e3ce3SKalle Valo b43legacy_mac_suspend(dev);
2276423e3ce3SKalle Valo b43legacy_calc_nrssi_slope(dev);
2277423e3ce3SKalle Valo b43legacy_mac_enable(dev);
2278423e3ce3SKalle Valo }
2279423e3ce3SKalle Valo }
2280423e3ce3SKalle Valo
b43legacy_periodic_every30sec(struct b43legacy_wldev * dev)2281423e3ce3SKalle Valo static void b43legacy_periodic_every30sec(struct b43legacy_wldev *dev)
2282423e3ce3SKalle Valo {
2283423e3ce3SKalle Valo /* Update device statistics. */
2284423e3ce3SKalle Valo b43legacy_calculate_link_quality(dev);
2285423e3ce3SKalle Valo }
2286423e3ce3SKalle Valo
b43legacy_periodic_every15sec(struct b43legacy_wldev * dev)2287423e3ce3SKalle Valo static void b43legacy_periodic_every15sec(struct b43legacy_wldev *dev)
2288423e3ce3SKalle Valo {
2289423e3ce3SKalle Valo b43legacy_phy_xmitpower(dev); /* FIXME: unless scanning? */
2290423e3ce3SKalle Valo
2291423e3ce3SKalle Valo atomic_set(&dev->phy.txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2292423e3ce3SKalle Valo wmb();
2293423e3ce3SKalle Valo }
2294423e3ce3SKalle Valo
do_periodic_work(struct b43legacy_wldev * dev)2295423e3ce3SKalle Valo static void do_periodic_work(struct b43legacy_wldev *dev)
2296423e3ce3SKalle Valo {
2297423e3ce3SKalle Valo unsigned int state;
2298423e3ce3SKalle Valo
2299423e3ce3SKalle Valo state = dev->periodic_state;
2300423e3ce3SKalle Valo if (state % 8 == 0)
2301423e3ce3SKalle Valo b43legacy_periodic_every120sec(dev);
2302423e3ce3SKalle Valo if (state % 4 == 0)
2303423e3ce3SKalle Valo b43legacy_periodic_every60sec(dev);
2304423e3ce3SKalle Valo if (state % 2 == 0)
2305423e3ce3SKalle Valo b43legacy_periodic_every30sec(dev);
2306423e3ce3SKalle Valo b43legacy_periodic_every15sec(dev);
2307423e3ce3SKalle Valo }
2308423e3ce3SKalle Valo
2309423e3ce3SKalle Valo /* Periodic work locking policy:
2310423e3ce3SKalle Valo * The whole periodic work handler is protected by
2311423e3ce3SKalle Valo * wl->mutex. If another lock is needed somewhere in the
2312423e3ce3SKalle Valo * pwork callchain, it's acquired in-place, where it's needed.
2313423e3ce3SKalle Valo */
b43legacy_periodic_work_handler(struct work_struct * work)2314423e3ce3SKalle Valo static void b43legacy_periodic_work_handler(struct work_struct *work)
2315423e3ce3SKalle Valo {
2316423e3ce3SKalle Valo struct b43legacy_wldev *dev = container_of(work, struct b43legacy_wldev,
2317423e3ce3SKalle Valo periodic_work.work);
2318423e3ce3SKalle Valo struct b43legacy_wl *wl = dev->wl;
2319423e3ce3SKalle Valo unsigned long delay;
2320423e3ce3SKalle Valo
2321423e3ce3SKalle Valo mutex_lock(&wl->mutex);
2322423e3ce3SKalle Valo
2323423e3ce3SKalle Valo if (unlikely(b43legacy_status(dev) != B43legacy_STAT_STARTED))
2324423e3ce3SKalle Valo goto out;
2325423e3ce3SKalle Valo if (b43legacy_debug(dev, B43legacy_DBG_PWORK_STOP))
2326423e3ce3SKalle Valo goto out_requeue;
2327423e3ce3SKalle Valo
2328423e3ce3SKalle Valo do_periodic_work(dev);
2329423e3ce3SKalle Valo
2330423e3ce3SKalle Valo dev->periodic_state++;
2331423e3ce3SKalle Valo out_requeue:
2332423e3ce3SKalle Valo if (b43legacy_debug(dev, B43legacy_DBG_PWORK_FAST))
2333423e3ce3SKalle Valo delay = msecs_to_jiffies(50);
2334423e3ce3SKalle Valo else
2335423e3ce3SKalle Valo delay = round_jiffies_relative(HZ * 15);
2336423e3ce3SKalle Valo ieee80211_queue_delayed_work(wl->hw, &dev->periodic_work, delay);
2337423e3ce3SKalle Valo out:
2338423e3ce3SKalle Valo mutex_unlock(&wl->mutex);
2339423e3ce3SKalle Valo }
2340423e3ce3SKalle Valo
b43legacy_periodic_tasks_setup(struct b43legacy_wldev * dev)2341423e3ce3SKalle Valo static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev *dev)
2342423e3ce3SKalle Valo {
2343423e3ce3SKalle Valo struct delayed_work *work = &dev->periodic_work;
2344423e3ce3SKalle Valo
2345423e3ce3SKalle Valo dev->periodic_state = 0;
2346423e3ce3SKalle Valo INIT_DELAYED_WORK(work, b43legacy_periodic_work_handler);
2347423e3ce3SKalle Valo ieee80211_queue_delayed_work(dev->wl->hw, work, 0);
2348423e3ce3SKalle Valo }
2349423e3ce3SKalle Valo
2350423e3ce3SKalle Valo /* Validate access to the chip (SHM) */
b43legacy_validate_chipaccess(struct b43legacy_wldev * dev)2351423e3ce3SKalle Valo static int b43legacy_validate_chipaccess(struct b43legacy_wldev *dev)
2352423e3ce3SKalle Valo {
2353423e3ce3SKalle Valo u32 value;
2354423e3ce3SKalle Valo u32 shm_backup;
2355423e3ce3SKalle Valo
2356423e3ce3SKalle Valo shm_backup = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0);
2357423e3ce3SKalle Valo b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0xAA5555AA);
2358423e3ce3SKalle Valo if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2359423e3ce3SKalle Valo 0xAA5555AA)
2360423e3ce3SKalle Valo goto error;
2361423e3ce3SKalle Valo b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0x55AAAA55);
2362423e3ce3SKalle Valo if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2363423e3ce3SKalle Valo 0x55AAAA55)
2364423e3ce3SKalle Valo goto error;
2365423e3ce3SKalle Valo b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, shm_backup);
2366423e3ce3SKalle Valo
2367423e3ce3SKalle Valo value = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2368423e3ce3SKalle Valo if ((value | B43legacy_MACCTL_GMODE) !=
2369423e3ce3SKalle Valo (B43legacy_MACCTL_GMODE | B43legacy_MACCTL_IHR_ENABLED))
2370423e3ce3SKalle Valo goto error;
2371423e3ce3SKalle Valo
2372423e3ce3SKalle Valo value = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
2373423e3ce3SKalle Valo if (value)
2374423e3ce3SKalle Valo goto error;
2375423e3ce3SKalle Valo
2376423e3ce3SKalle Valo return 0;
2377423e3ce3SKalle Valo error:
2378423e3ce3SKalle Valo b43legacyerr(dev->wl, "Failed to validate the chipaccess\n");
2379423e3ce3SKalle Valo return -ENODEV;
2380423e3ce3SKalle Valo }
2381423e3ce3SKalle Valo
b43legacy_security_init(struct b43legacy_wldev * dev)2382423e3ce3SKalle Valo static void b43legacy_security_init(struct b43legacy_wldev *dev)
2383423e3ce3SKalle Valo {
2384423e3ce3SKalle Valo dev->max_nr_keys = (dev->dev->id.revision >= 5) ? 58 : 20;
2385423e3ce3SKalle Valo B43legacy_WARN_ON(dev->max_nr_keys > ARRAY_SIZE(dev->key));
2386423e3ce3SKalle Valo dev->ktp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2387423e3ce3SKalle Valo 0x0056);
2388423e3ce3SKalle Valo /* KTP is a word address, but we address SHM bytewise.
2389423e3ce3SKalle Valo * So multiply by two.
2390423e3ce3SKalle Valo */
2391423e3ce3SKalle Valo dev->ktp *= 2;
2392423e3ce3SKalle Valo if (dev->dev->id.revision >= 5)
2393423e3ce3SKalle Valo /* Number of RCMTA address slots */
2394423e3ce3SKalle Valo b43legacy_write16(dev, B43legacy_MMIO_RCMTA_COUNT,
2395423e3ce3SKalle Valo dev->max_nr_keys - 8);
2396423e3ce3SKalle Valo }
2397423e3ce3SKalle Valo
2398423e3ce3SKalle Valo #ifdef CONFIG_B43LEGACY_HWRNG
b43legacy_rng_read(struct hwrng * rng,u32 * data)2399423e3ce3SKalle Valo static int b43legacy_rng_read(struct hwrng *rng, u32 *data)
2400423e3ce3SKalle Valo {
2401423e3ce3SKalle Valo struct b43legacy_wl *wl = (struct b43legacy_wl *)rng->priv;
2402423e3ce3SKalle Valo unsigned long flags;
2403423e3ce3SKalle Valo
2404423e3ce3SKalle Valo /* Don't take wl->mutex here, as it could deadlock with
2405423e3ce3SKalle Valo * hwrng internal locking. It's not needed to take
2406423e3ce3SKalle Valo * wl->mutex here, anyway. */
2407423e3ce3SKalle Valo
2408423e3ce3SKalle Valo spin_lock_irqsave(&wl->irq_lock, flags);
2409423e3ce3SKalle Valo *data = b43legacy_read16(wl->current_dev, B43legacy_MMIO_RNG);
2410423e3ce3SKalle Valo spin_unlock_irqrestore(&wl->irq_lock, flags);
2411423e3ce3SKalle Valo
2412423e3ce3SKalle Valo return (sizeof(u16));
2413423e3ce3SKalle Valo }
2414423e3ce3SKalle Valo #endif
2415423e3ce3SKalle Valo
b43legacy_rng_exit(struct b43legacy_wl * wl)2416423e3ce3SKalle Valo static void b43legacy_rng_exit(struct b43legacy_wl *wl)
2417423e3ce3SKalle Valo {
2418423e3ce3SKalle Valo #ifdef CONFIG_B43LEGACY_HWRNG
2419423e3ce3SKalle Valo if (wl->rng_initialized)
2420423e3ce3SKalle Valo hwrng_unregister(&wl->rng);
2421423e3ce3SKalle Valo #endif
2422423e3ce3SKalle Valo }
2423423e3ce3SKalle Valo
b43legacy_rng_init(struct b43legacy_wl * wl)2424423e3ce3SKalle Valo static int b43legacy_rng_init(struct b43legacy_wl *wl)
2425423e3ce3SKalle Valo {
2426423e3ce3SKalle Valo int err = 0;
2427423e3ce3SKalle Valo
2428423e3ce3SKalle Valo #ifdef CONFIG_B43LEGACY_HWRNG
2429423e3ce3SKalle Valo snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name),
2430423e3ce3SKalle Valo "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy));
2431423e3ce3SKalle Valo wl->rng.name = wl->rng_name;
2432423e3ce3SKalle Valo wl->rng.data_read = b43legacy_rng_read;
2433423e3ce3SKalle Valo wl->rng.priv = (unsigned long)wl;
2434423e3ce3SKalle Valo wl->rng_initialized = 1;
2435423e3ce3SKalle Valo err = hwrng_register(&wl->rng);
2436423e3ce3SKalle Valo if (err) {
2437423e3ce3SKalle Valo wl->rng_initialized = 0;
2438423e3ce3SKalle Valo b43legacyerr(wl, "Failed to register the random "
2439423e3ce3SKalle Valo "number generator (%d)\n", err);
2440423e3ce3SKalle Valo }
2441423e3ce3SKalle Valo
2442423e3ce3SKalle Valo #endif
2443423e3ce3SKalle Valo return err;
2444423e3ce3SKalle Valo }
2445423e3ce3SKalle Valo
b43legacy_tx_work(struct work_struct * work)2446423e3ce3SKalle Valo static void b43legacy_tx_work(struct work_struct *work)
2447423e3ce3SKalle Valo {
2448423e3ce3SKalle Valo struct b43legacy_wl *wl = container_of(work, struct b43legacy_wl,
2449423e3ce3SKalle Valo tx_work);
2450423e3ce3SKalle Valo struct b43legacy_wldev *dev;
2451423e3ce3SKalle Valo struct sk_buff *skb;
2452423e3ce3SKalle Valo int queue_num;
2453423e3ce3SKalle Valo int err = 0;
2454423e3ce3SKalle Valo
2455423e3ce3SKalle Valo mutex_lock(&wl->mutex);
2456423e3ce3SKalle Valo dev = wl->current_dev;
2457423e3ce3SKalle Valo if (unlikely(!dev || b43legacy_status(dev) < B43legacy_STAT_STARTED)) {
2458423e3ce3SKalle Valo mutex_unlock(&wl->mutex);
2459423e3ce3SKalle Valo return;
2460423e3ce3SKalle Valo }
2461423e3ce3SKalle Valo
2462423e3ce3SKalle Valo for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
2463423e3ce3SKalle Valo while (skb_queue_len(&wl->tx_queue[queue_num])) {
2464423e3ce3SKalle Valo skb = skb_dequeue(&wl->tx_queue[queue_num]);
2465423e3ce3SKalle Valo if (b43legacy_using_pio(dev))
2466423e3ce3SKalle Valo err = b43legacy_pio_tx(dev, skb);
2467423e3ce3SKalle Valo else
2468423e3ce3SKalle Valo err = b43legacy_dma_tx(dev, skb);
2469423e3ce3SKalle Valo if (err == -ENOSPC) {
2470423e3ce3SKalle Valo wl->tx_queue_stopped[queue_num] = 1;
2471423e3ce3SKalle Valo ieee80211_stop_queue(wl->hw, queue_num);
2472423e3ce3SKalle Valo skb_queue_head(&wl->tx_queue[queue_num], skb);
2473423e3ce3SKalle Valo break;
2474423e3ce3SKalle Valo }
2475423e3ce3SKalle Valo if (unlikely(err))
2476423e3ce3SKalle Valo dev_kfree_skb(skb); /* Drop it */
2477423e3ce3SKalle Valo err = 0;
2478423e3ce3SKalle Valo }
2479423e3ce3SKalle Valo
2480423e3ce3SKalle Valo if (!err)
2481423e3ce3SKalle Valo wl->tx_queue_stopped[queue_num] = 0;
2482423e3ce3SKalle Valo }
2483423e3ce3SKalle Valo
2484423e3ce3SKalle Valo mutex_unlock(&wl->mutex);
2485423e3ce3SKalle Valo }
2486423e3ce3SKalle Valo
b43legacy_op_tx(struct ieee80211_hw * hw,struct ieee80211_tx_control * control,struct sk_buff * skb)2487423e3ce3SKalle Valo static void b43legacy_op_tx(struct ieee80211_hw *hw,
2488423e3ce3SKalle Valo struct ieee80211_tx_control *control,
2489423e3ce3SKalle Valo struct sk_buff *skb)
2490423e3ce3SKalle Valo {
2491423e3ce3SKalle Valo struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2492423e3ce3SKalle Valo
2493423e3ce3SKalle Valo if (unlikely(skb->len < 2 + 2 + 6)) {
2494423e3ce3SKalle Valo /* Too short, this can't be a valid frame. */
2495423e3ce3SKalle Valo dev_kfree_skb_any(skb);
2496423e3ce3SKalle Valo return;
2497423e3ce3SKalle Valo }
2498423e3ce3SKalle Valo B43legacy_WARN_ON(skb_shinfo(skb)->nr_frags);
2499423e3ce3SKalle Valo
2500423e3ce3SKalle Valo skb_queue_tail(&wl->tx_queue[skb->queue_mapping], skb);
2501423e3ce3SKalle Valo if (!wl->tx_queue_stopped[skb->queue_mapping])
2502423e3ce3SKalle Valo ieee80211_queue_work(wl->hw, &wl->tx_work);
2503423e3ce3SKalle Valo else
2504423e3ce3SKalle Valo ieee80211_stop_queue(wl->hw, skb->queue_mapping);
2505423e3ce3SKalle Valo }
2506423e3ce3SKalle Valo
b43legacy_op_conf_tx(struct ieee80211_hw * hw,struct ieee80211_vif * vif,unsigned int link_id,u16 queue,const struct ieee80211_tx_queue_params * params)2507423e3ce3SKalle Valo static int b43legacy_op_conf_tx(struct ieee80211_hw *hw,
2508b3e2130bSJohannes Berg struct ieee80211_vif *vif,
2509b3e2130bSJohannes Berg unsigned int link_id, u16 queue,
2510423e3ce3SKalle Valo const struct ieee80211_tx_queue_params *params)
2511423e3ce3SKalle Valo {
2512423e3ce3SKalle Valo return 0;
2513423e3ce3SKalle Valo }
2514423e3ce3SKalle Valo
b43legacy_op_get_stats(struct ieee80211_hw * hw,struct ieee80211_low_level_stats * stats)2515423e3ce3SKalle Valo static int b43legacy_op_get_stats(struct ieee80211_hw *hw,
2516423e3ce3SKalle Valo struct ieee80211_low_level_stats *stats)
2517423e3ce3SKalle Valo {
2518423e3ce3SKalle Valo struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2519423e3ce3SKalle Valo unsigned long flags;
2520423e3ce3SKalle Valo
2521423e3ce3SKalle Valo spin_lock_irqsave(&wl->irq_lock, flags);
2522423e3ce3SKalle Valo memcpy(stats, &wl->ieee_stats, sizeof(*stats));
2523423e3ce3SKalle Valo spin_unlock_irqrestore(&wl->irq_lock, flags);
2524423e3ce3SKalle Valo
2525423e3ce3SKalle Valo return 0;
2526423e3ce3SKalle Valo }
2527423e3ce3SKalle Valo
phymode_to_string(unsigned int phymode)2528423e3ce3SKalle Valo static const char *phymode_to_string(unsigned int phymode)
2529423e3ce3SKalle Valo {
2530423e3ce3SKalle Valo switch (phymode) {
2531423e3ce3SKalle Valo case B43legacy_PHYMODE_B:
2532423e3ce3SKalle Valo return "B";
2533423e3ce3SKalle Valo case B43legacy_PHYMODE_G:
2534423e3ce3SKalle Valo return "G";
2535423e3ce3SKalle Valo default:
2536423e3ce3SKalle Valo B43legacy_BUG_ON(1);
2537423e3ce3SKalle Valo }
2538423e3ce3SKalle Valo return "";
2539423e3ce3SKalle Valo }
2540423e3ce3SKalle Valo
find_wldev_for_phymode(struct b43legacy_wl * wl,unsigned int phymode,struct b43legacy_wldev ** dev,bool * gmode)2541423e3ce3SKalle Valo static int find_wldev_for_phymode(struct b43legacy_wl *wl,
2542423e3ce3SKalle Valo unsigned int phymode,
2543423e3ce3SKalle Valo struct b43legacy_wldev **dev,
2544423e3ce3SKalle Valo bool *gmode)
2545423e3ce3SKalle Valo {
2546423e3ce3SKalle Valo struct b43legacy_wldev *d;
2547423e3ce3SKalle Valo
2548423e3ce3SKalle Valo list_for_each_entry(d, &wl->devlist, list) {
2549423e3ce3SKalle Valo if (d->phy.possible_phymodes & phymode) {
2550423e3ce3SKalle Valo /* Ok, this device supports the PHY-mode.
2551423e3ce3SKalle Valo * Set the gmode bit. */
2552423e3ce3SKalle Valo *gmode = true;
2553423e3ce3SKalle Valo *dev = d;
2554423e3ce3SKalle Valo
2555423e3ce3SKalle Valo return 0;
2556423e3ce3SKalle Valo }
2557423e3ce3SKalle Valo }
2558423e3ce3SKalle Valo
2559423e3ce3SKalle Valo return -ESRCH;
2560423e3ce3SKalle Valo }
2561423e3ce3SKalle Valo
b43legacy_put_phy_into_reset(struct b43legacy_wldev * dev)2562423e3ce3SKalle Valo static void b43legacy_put_phy_into_reset(struct b43legacy_wldev *dev)
2563423e3ce3SKalle Valo {
2564423e3ce3SKalle Valo struct ssb_device *sdev = dev->dev;
2565423e3ce3SKalle Valo u32 tmslow;
2566423e3ce3SKalle Valo
2567423e3ce3SKalle Valo tmslow = ssb_read32(sdev, SSB_TMSLOW);
2568423e3ce3SKalle Valo tmslow &= ~B43legacy_TMSLOW_GMODE;
2569423e3ce3SKalle Valo tmslow |= B43legacy_TMSLOW_PHYRESET;
2570423e3ce3SKalle Valo tmslow |= SSB_TMSLOW_FGC;
2571423e3ce3SKalle Valo ssb_write32(sdev, SSB_TMSLOW, tmslow);
2572423e3ce3SKalle Valo msleep(1);
2573423e3ce3SKalle Valo
2574423e3ce3SKalle Valo tmslow = ssb_read32(sdev, SSB_TMSLOW);
2575423e3ce3SKalle Valo tmslow &= ~SSB_TMSLOW_FGC;
2576423e3ce3SKalle Valo tmslow |= B43legacy_TMSLOW_PHYRESET;
2577423e3ce3SKalle Valo ssb_write32(sdev, SSB_TMSLOW, tmslow);
2578423e3ce3SKalle Valo msleep(1);
2579423e3ce3SKalle Valo }
2580423e3ce3SKalle Valo
2581423e3ce3SKalle Valo /* Expects wl->mutex locked */
b43legacy_switch_phymode(struct b43legacy_wl * wl,unsigned int new_mode)2582423e3ce3SKalle Valo static int b43legacy_switch_phymode(struct b43legacy_wl *wl,
2583423e3ce3SKalle Valo unsigned int new_mode)
2584423e3ce3SKalle Valo {
25853f649ab7SKees Cook struct b43legacy_wldev *up_dev;
2586423e3ce3SKalle Valo struct b43legacy_wldev *down_dev;
2587423e3ce3SKalle Valo int err;
2588423e3ce3SKalle Valo bool gmode = false;
2589423e3ce3SKalle Valo int prev_status;
2590423e3ce3SKalle Valo
2591423e3ce3SKalle Valo err = find_wldev_for_phymode(wl, new_mode, &up_dev, &gmode);
2592423e3ce3SKalle Valo if (err) {
2593423e3ce3SKalle Valo b43legacyerr(wl, "Could not find a device for %s-PHY mode\n",
2594423e3ce3SKalle Valo phymode_to_string(new_mode));
2595423e3ce3SKalle Valo return err;
2596423e3ce3SKalle Valo }
2597423e3ce3SKalle Valo if ((up_dev == wl->current_dev) &&
2598423e3ce3SKalle Valo (!!wl->current_dev->phy.gmode == !!gmode))
2599423e3ce3SKalle Valo /* This device is already running. */
2600423e3ce3SKalle Valo return 0;
2601423e3ce3SKalle Valo b43legacydbg(wl, "Reconfiguring PHYmode to %s-PHY\n",
2602423e3ce3SKalle Valo phymode_to_string(new_mode));
2603423e3ce3SKalle Valo down_dev = wl->current_dev;
2604423e3ce3SKalle Valo
2605423e3ce3SKalle Valo prev_status = b43legacy_status(down_dev);
2606423e3ce3SKalle Valo /* Shutdown the currently running core. */
2607423e3ce3SKalle Valo if (prev_status >= B43legacy_STAT_STARTED)
2608423e3ce3SKalle Valo b43legacy_wireless_core_stop(down_dev);
2609423e3ce3SKalle Valo if (prev_status >= B43legacy_STAT_INITIALIZED)
2610423e3ce3SKalle Valo b43legacy_wireless_core_exit(down_dev);
2611423e3ce3SKalle Valo
2612423e3ce3SKalle Valo if (down_dev != up_dev)
2613423e3ce3SKalle Valo /* We switch to a different core, so we put PHY into
2614423e3ce3SKalle Valo * RESET on the old core. */
2615423e3ce3SKalle Valo b43legacy_put_phy_into_reset(down_dev);
2616423e3ce3SKalle Valo
2617423e3ce3SKalle Valo /* Now start the new core. */
2618423e3ce3SKalle Valo up_dev->phy.gmode = gmode;
2619423e3ce3SKalle Valo if (prev_status >= B43legacy_STAT_INITIALIZED) {
2620423e3ce3SKalle Valo err = b43legacy_wireless_core_init(up_dev);
2621423e3ce3SKalle Valo if (err) {
2622423e3ce3SKalle Valo b43legacyerr(wl, "Fatal: Could not initialize device"
2623423e3ce3SKalle Valo " for newly selected %s-PHY mode\n",
2624423e3ce3SKalle Valo phymode_to_string(new_mode));
2625423e3ce3SKalle Valo goto init_failure;
2626423e3ce3SKalle Valo }
2627423e3ce3SKalle Valo }
2628423e3ce3SKalle Valo if (prev_status >= B43legacy_STAT_STARTED) {
2629423e3ce3SKalle Valo err = b43legacy_wireless_core_start(up_dev);
2630423e3ce3SKalle Valo if (err) {
2631423e3ce3SKalle Valo b43legacyerr(wl, "Fatal: Could not start device for "
2632423e3ce3SKalle Valo "newly selected %s-PHY mode\n",
2633423e3ce3SKalle Valo phymode_to_string(new_mode));
2634423e3ce3SKalle Valo b43legacy_wireless_core_exit(up_dev);
2635423e3ce3SKalle Valo goto init_failure;
2636423e3ce3SKalle Valo }
2637423e3ce3SKalle Valo }
2638423e3ce3SKalle Valo B43legacy_WARN_ON(b43legacy_status(up_dev) != prev_status);
2639423e3ce3SKalle Valo
2640423e3ce3SKalle Valo b43legacy_shm_write32(up_dev, B43legacy_SHM_SHARED, 0x003E, 0);
2641423e3ce3SKalle Valo
2642423e3ce3SKalle Valo wl->current_dev = up_dev;
2643423e3ce3SKalle Valo
2644423e3ce3SKalle Valo return 0;
2645423e3ce3SKalle Valo init_failure:
2646423e3ce3SKalle Valo /* Whoops, failed to init the new core. No core is operating now. */
2647423e3ce3SKalle Valo wl->current_dev = NULL;
2648423e3ce3SKalle Valo return err;
2649423e3ce3SKalle Valo }
2650423e3ce3SKalle Valo
2651423e3ce3SKalle Valo /* Write the short and long frame retry limit values. */
b43legacy_set_retry_limits(struct b43legacy_wldev * dev,unsigned int short_retry,unsigned int long_retry)2652423e3ce3SKalle Valo static void b43legacy_set_retry_limits(struct b43legacy_wldev *dev,
2653423e3ce3SKalle Valo unsigned int short_retry,
2654423e3ce3SKalle Valo unsigned int long_retry)
2655423e3ce3SKalle Valo {
2656423e3ce3SKalle Valo /* The retry limit is a 4-bit counter. Enforce this to avoid overflowing
2657423e3ce3SKalle Valo * the chip-internal counter. */
2658423e3ce3SKalle Valo short_retry = min(short_retry, (unsigned int)0xF);
2659423e3ce3SKalle Valo long_retry = min(long_retry, (unsigned int)0xF);
2660423e3ce3SKalle Valo
2661423e3ce3SKalle Valo b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0006, short_retry);
2662423e3ce3SKalle Valo b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0007, long_retry);
2663423e3ce3SKalle Valo }
2664423e3ce3SKalle Valo
b43legacy_op_dev_config(struct ieee80211_hw * hw,u32 changed)2665423e3ce3SKalle Valo static int b43legacy_op_dev_config(struct ieee80211_hw *hw,
2666423e3ce3SKalle Valo u32 changed)
2667423e3ce3SKalle Valo {
2668423e3ce3SKalle Valo struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2669423e3ce3SKalle Valo struct b43legacy_wldev *dev;
2670423e3ce3SKalle Valo struct b43legacy_phy *phy;
2671423e3ce3SKalle Valo struct ieee80211_conf *conf = &hw->conf;
2672423e3ce3SKalle Valo unsigned long flags;
2673423e3ce3SKalle Valo unsigned int new_phymode = 0xFFFF;
2674423e3ce3SKalle Valo int antenna_tx;
2675423e3ce3SKalle Valo int err = 0;
2676423e3ce3SKalle Valo
2677423e3ce3SKalle Valo antenna_tx = B43legacy_ANTENNA_DEFAULT;
2678423e3ce3SKalle Valo
2679423e3ce3SKalle Valo mutex_lock(&wl->mutex);
2680423e3ce3SKalle Valo dev = wl->current_dev;
2681423e3ce3SKalle Valo phy = &dev->phy;
2682423e3ce3SKalle Valo
2683423e3ce3SKalle Valo if (changed & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
2684423e3ce3SKalle Valo b43legacy_set_retry_limits(dev,
2685423e3ce3SKalle Valo conf->short_frame_max_tx_count,
2686423e3ce3SKalle Valo conf->long_frame_max_tx_count);
2687423e3ce3SKalle Valo changed &= ~IEEE80211_CONF_CHANGE_RETRY_LIMITS;
2688423e3ce3SKalle Valo if (!changed)
2689423e3ce3SKalle Valo goto out_unlock_mutex;
2690423e3ce3SKalle Valo
2691423e3ce3SKalle Valo /* Switch the PHY mode (if necessary). */
2692423e3ce3SKalle Valo switch (conf->chandef.chan->band) {
269357fbcce3SJohannes Berg case NL80211_BAND_2GHZ:
2694423e3ce3SKalle Valo if (phy->type == B43legacy_PHYTYPE_B)
2695423e3ce3SKalle Valo new_phymode = B43legacy_PHYMODE_B;
2696423e3ce3SKalle Valo else
2697423e3ce3SKalle Valo new_phymode = B43legacy_PHYMODE_G;
2698423e3ce3SKalle Valo break;
2699423e3ce3SKalle Valo default:
2700423e3ce3SKalle Valo B43legacy_WARN_ON(1);
2701423e3ce3SKalle Valo }
2702423e3ce3SKalle Valo err = b43legacy_switch_phymode(wl, new_phymode);
2703423e3ce3SKalle Valo if (err)
2704423e3ce3SKalle Valo goto out_unlock_mutex;
2705423e3ce3SKalle Valo
2706423e3ce3SKalle Valo /* Disable IRQs while reconfiguring the device.
2707423e3ce3SKalle Valo * This makes it possible to drop the spinlock throughout
2708423e3ce3SKalle Valo * the reconfiguration process. */
2709423e3ce3SKalle Valo spin_lock_irqsave(&wl->irq_lock, flags);
2710423e3ce3SKalle Valo if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2711423e3ce3SKalle Valo spin_unlock_irqrestore(&wl->irq_lock, flags);
2712423e3ce3SKalle Valo goto out_unlock_mutex;
2713423e3ce3SKalle Valo }
2714423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2715423e3ce3SKalle Valo spin_unlock_irqrestore(&wl->irq_lock, flags);
2716423e3ce3SKalle Valo b43legacy_synchronize_irq(dev);
2717423e3ce3SKalle Valo
2718423e3ce3SKalle Valo /* Switch to the requested channel.
2719423e3ce3SKalle Valo * The firmware takes care of races with the TX handler. */
2720423e3ce3SKalle Valo if (conf->chandef.chan->hw_value != phy->channel)
2721423e3ce3SKalle Valo b43legacy_radio_selectchannel(dev, conf->chandef.chan->hw_value,
2722423e3ce3SKalle Valo 0);
2723423e3ce3SKalle Valo
2724423e3ce3SKalle Valo dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_MONITOR);
2725423e3ce3SKalle Valo
2726423e3ce3SKalle Valo /* Adjust the desired TX power level. */
2727423e3ce3SKalle Valo if (conf->power_level != 0) {
2728423e3ce3SKalle Valo if (conf->power_level != phy->power_level) {
2729423e3ce3SKalle Valo phy->power_level = conf->power_level;
2730423e3ce3SKalle Valo b43legacy_phy_xmitpower(dev);
2731423e3ce3SKalle Valo }
2732423e3ce3SKalle Valo }
2733423e3ce3SKalle Valo
2734423e3ce3SKalle Valo /* Antennas for RX and management frame TX. */
2735423e3ce3SKalle Valo b43legacy_mgmtframe_txantenna(dev, antenna_tx);
2736423e3ce3SKalle Valo
2737423e3ce3SKalle Valo if (wl->radio_enabled != phy->radio_on) {
2738423e3ce3SKalle Valo if (wl->radio_enabled) {
2739423e3ce3SKalle Valo b43legacy_radio_turn_on(dev);
2740423e3ce3SKalle Valo b43legacyinfo(dev->wl, "Radio turned on by software\n");
2741423e3ce3SKalle Valo if (!dev->radio_hw_enable)
2742423e3ce3SKalle Valo b43legacyinfo(dev->wl, "The hardware RF-kill"
2743423e3ce3SKalle Valo " button still turns the radio"
2744423e3ce3SKalle Valo " physically off. Press the"
2745423e3ce3SKalle Valo " button to turn it on.\n");
2746423e3ce3SKalle Valo } else {
2747423e3ce3SKalle Valo b43legacy_radio_turn_off(dev, 0);
2748423e3ce3SKalle Valo b43legacyinfo(dev->wl, "Radio turned off by"
2749423e3ce3SKalle Valo " software\n");
2750423e3ce3SKalle Valo }
2751423e3ce3SKalle Valo }
2752423e3ce3SKalle Valo
2753423e3ce3SKalle Valo spin_lock_irqsave(&wl->irq_lock, flags);
2754423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2755423e3ce3SKalle Valo spin_unlock_irqrestore(&wl->irq_lock, flags);
2756423e3ce3SKalle Valo out_unlock_mutex:
2757423e3ce3SKalle Valo mutex_unlock(&wl->mutex);
2758423e3ce3SKalle Valo
2759423e3ce3SKalle Valo return err;
2760423e3ce3SKalle Valo }
2761423e3ce3SKalle Valo
b43legacy_update_basic_rates(struct b43legacy_wldev * dev,u32 brates)2762423e3ce3SKalle Valo static void b43legacy_update_basic_rates(struct b43legacy_wldev *dev, u32 brates)
2763423e3ce3SKalle Valo {
2764423e3ce3SKalle Valo struct ieee80211_supported_band *sband =
276557fbcce3SJohannes Berg dev->wl->hw->wiphy->bands[NL80211_BAND_2GHZ];
2766623b988fSJoe Perches const struct ieee80211_rate *rate;
2767423e3ce3SKalle Valo int i;
2768423e3ce3SKalle Valo u16 basic, direct, offset, basic_offset, rateptr;
2769423e3ce3SKalle Valo
2770423e3ce3SKalle Valo for (i = 0; i < sband->n_bitrates; i++) {
2771423e3ce3SKalle Valo rate = &sband->bitrates[i];
2772423e3ce3SKalle Valo
2773423e3ce3SKalle Valo if (b43legacy_is_cck_rate(rate->hw_value)) {
2774423e3ce3SKalle Valo direct = B43legacy_SHM_SH_CCKDIRECT;
2775423e3ce3SKalle Valo basic = B43legacy_SHM_SH_CCKBASIC;
2776423e3ce3SKalle Valo offset = b43legacy_plcp_get_ratecode_cck(rate->hw_value);
2777423e3ce3SKalle Valo offset &= 0xF;
2778423e3ce3SKalle Valo } else {
2779423e3ce3SKalle Valo direct = B43legacy_SHM_SH_OFDMDIRECT;
2780423e3ce3SKalle Valo basic = B43legacy_SHM_SH_OFDMBASIC;
2781423e3ce3SKalle Valo offset = b43legacy_plcp_get_ratecode_ofdm(rate->hw_value);
2782423e3ce3SKalle Valo offset &= 0xF;
2783423e3ce3SKalle Valo }
2784423e3ce3SKalle Valo
2785423e3ce3SKalle Valo rate = ieee80211_get_response_rate(sband, brates, rate->bitrate);
2786423e3ce3SKalle Valo
2787423e3ce3SKalle Valo if (b43legacy_is_cck_rate(rate->hw_value)) {
2788423e3ce3SKalle Valo basic_offset = b43legacy_plcp_get_ratecode_cck(rate->hw_value);
2789423e3ce3SKalle Valo basic_offset &= 0xF;
2790423e3ce3SKalle Valo } else {
2791423e3ce3SKalle Valo basic_offset = b43legacy_plcp_get_ratecode_ofdm(rate->hw_value);
2792423e3ce3SKalle Valo basic_offset &= 0xF;
2793423e3ce3SKalle Valo }
2794423e3ce3SKalle Valo
2795423e3ce3SKalle Valo /*
2796423e3ce3SKalle Valo * Get the pointer that we need to point to
2797423e3ce3SKalle Valo * from the direct map
2798423e3ce3SKalle Valo */
2799423e3ce3SKalle Valo rateptr = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2800423e3ce3SKalle Valo direct + 2 * basic_offset);
2801423e3ce3SKalle Valo /* and write it to the basic map */
2802423e3ce3SKalle Valo b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2803423e3ce3SKalle Valo basic + 2 * offset, rateptr);
2804423e3ce3SKalle Valo }
2805423e3ce3SKalle Valo }
2806423e3ce3SKalle Valo
b43legacy_op_bss_info_changed(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_bss_conf * conf,u64 changed)2807423e3ce3SKalle Valo static void b43legacy_op_bss_info_changed(struct ieee80211_hw *hw,
2808423e3ce3SKalle Valo struct ieee80211_vif *vif,
2809423e3ce3SKalle Valo struct ieee80211_bss_conf *conf,
28107b7090b4SJohannes Berg u64 changed)
2811423e3ce3SKalle Valo {
2812423e3ce3SKalle Valo struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2813423e3ce3SKalle Valo struct b43legacy_wldev *dev;
2814423e3ce3SKalle Valo unsigned long flags;
2815423e3ce3SKalle Valo
2816423e3ce3SKalle Valo mutex_lock(&wl->mutex);
2817423e3ce3SKalle Valo B43legacy_WARN_ON(wl->vif != vif);
2818423e3ce3SKalle Valo
2819423e3ce3SKalle Valo dev = wl->current_dev;
2820423e3ce3SKalle Valo
2821423e3ce3SKalle Valo /* Disable IRQs while reconfiguring the device.
2822423e3ce3SKalle Valo * This makes it possible to drop the spinlock throughout
2823423e3ce3SKalle Valo * the reconfiguration process. */
2824423e3ce3SKalle Valo spin_lock_irqsave(&wl->irq_lock, flags);
2825423e3ce3SKalle Valo if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2826423e3ce3SKalle Valo spin_unlock_irqrestore(&wl->irq_lock, flags);
2827423e3ce3SKalle Valo goto out_unlock_mutex;
2828423e3ce3SKalle Valo }
2829423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2830423e3ce3SKalle Valo
2831423e3ce3SKalle Valo if (changed & BSS_CHANGED_BSSID) {
2832423e3ce3SKalle Valo b43legacy_synchronize_irq(dev);
2833423e3ce3SKalle Valo
2834423e3ce3SKalle Valo if (conf->bssid)
2835423e3ce3SKalle Valo memcpy(wl->bssid, conf->bssid, ETH_ALEN);
2836423e3ce3SKalle Valo else
2837423e3ce3SKalle Valo eth_zero_addr(wl->bssid);
2838423e3ce3SKalle Valo }
2839423e3ce3SKalle Valo
2840423e3ce3SKalle Valo if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) {
2841423e3ce3SKalle Valo if (changed & BSS_CHANGED_BEACON &&
2842423e3ce3SKalle Valo (b43legacy_is_mode(wl, NL80211_IFTYPE_AP) ||
2843423e3ce3SKalle Valo b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC)))
2844423e3ce3SKalle Valo b43legacy_update_templates(wl);
2845423e3ce3SKalle Valo
2846423e3ce3SKalle Valo if (changed & BSS_CHANGED_BSSID)
2847423e3ce3SKalle Valo b43legacy_write_mac_bssid_templates(dev);
2848423e3ce3SKalle Valo }
2849423e3ce3SKalle Valo spin_unlock_irqrestore(&wl->irq_lock, flags);
2850423e3ce3SKalle Valo
2851423e3ce3SKalle Valo b43legacy_mac_suspend(dev);
2852423e3ce3SKalle Valo
2853423e3ce3SKalle Valo if (changed & BSS_CHANGED_BEACON_INT &&
2854423e3ce3SKalle Valo (b43legacy_is_mode(wl, NL80211_IFTYPE_AP) ||
2855423e3ce3SKalle Valo b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC)))
2856423e3ce3SKalle Valo b43legacy_set_beacon_int(dev, conf->beacon_int);
2857423e3ce3SKalle Valo
2858423e3ce3SKalle Valo if (changed & BSS_CHANGED_BASIC_RATES)
2859423e3ce3SKalle Valo b43legacy_update_basic_rates(dev, conf->basic_rates);
2860423e3ce3SKalle Valo
2861423e3ce3SKalle Valo if (changed & BSS_CHANGED_ERP_SLOT) {
2862423e3ce3SKalle Valo if (conf->use_short_slot)
2863423e3ce3SKalle Valo b43legacy_short_slot_timing_enable(dev);
2864423e3ce3SKalle Valo else
2865423e3ce3SKalle Valo b43legacy_short_slot_timing_disable(dev);
2866423e3ce3SKalle Valo }
2867423e3ce3SKalle Valo
2868423e3ce3SKalle Valo b43legacy_mac_enable(dev);
2869423e3ce3SKalle Valo
2870423e3ce3SKalle Valo spin_lock_irqsave(&wl->irq_lock, flags);
2871423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2872423e3ce3SKalle Valo /* XXX: why? */
2873423e3ce3SKalle Valo spin_unlock_irqrestore(&wl->irq_lock, flags);
2874423e3ce3SKalle Valo out_unlock_mutex:
2875423e3ce3SKalle Valo mutex_unlock(&wl->mutex);
2876423e3ce3SKalle Valo }
2877423e3ce3SKalle Valo
b43legacy_op_configure_filter(struct ieee80211_hw * hw,unsigned int changed,unsigned int * fflags,u64 multicast)2878423e3ce3SKalle Valo static void b43legacy_op_configure_filter(struct ieee80211_hw *hw,
2879423e3ce3SKalle Valo unsigned int changed,
2880423e3ce3SKalle Valo unsigned int *fflags,u64 multicast)
2881423e3ce3SKalle Valo {
2882423e3ce3SKalle Valo struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2883423e3ce3SKalle Valo struct b43legacy_wldev *dev = wl->current_dev;
2884423e3ce3SKalle Valo unsigned long flags;
2885423e3ce3SKalle Valo
2886423e3ce3SKalle Valo if (!dev) {
2887423e3ce3SKalle Valo *fflags = 0;
2888423e3ce3SKalle Valo return;
2889423e3ce3SKalle Valo }
2890423e3ce3SKalle Valo
2891423e3ce3SKalle Valo spin_lock_irqsave(&wl->irq_lock, flags);
2892423e3ce3SKalle Valo *fflags &= FIF_ALLMULTI |
2893423e3ce3SKalle Valo FIF_FCSFAIL |
2894423e3ce3SKalle Valo FIF_PLCPFAIL |
2895423e3ce3SKalle Valo FIF_CONTROL |
2896423e3ce3SKalle Valo FIF_OTHER_BSS |
2897423e3ce3SKalle Valo FIF_BCN_PRBRESP_PROMISC;
2898423e3ce3SKalle Valo
2899423e3ce3SKalle Valo changed &= FIF_ALLMULTI |
2900423e3ce3SKalle Valo FIF_FCSFAIL |
2901423e3ce3SKalle Valo FIF_PLCPFAIL |
2902423e3ce3SKalle Valo FIF_CONTROL |
2903423e3ce3SKalle Valo FIF_OTHER_BSS |
2904423e3ce3SKalle Valo FIF_BCN_PRBRESP_PROMISC;
2905423e3ce3SKalle Valo
2906423e3ce3SKalle Valo wl->filter_flags = *fflags;
2907423e3ce3SKalle Valo
2908423e3ce3SKalle Valo if (changed && b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED)
2909423e3ce3SKalle Valo b43legacy_adjust_opmode(dev);
2910423e3ce3SKalle Valo spin_unlock_irqrestore(&wl->irq_lock, flags);
2911423e3ce3SKalle Valo }
2912423e3ce3SKalle Valo
2913423e3ce3SKalle Valo /* Locking: wl->mutex */
b43legacy_wireless_core_stop(struct b43legacy_wldev * dev)2914423e3ce3SKalle Valo static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev)
2915423e3ce3SKalle Valo {
2916423e3ce3SKalle Valo struct b43legacy_wl *wl = dev->wl;
2917423e3ce3SKalle Valo unsigned long flags;
2918423e3ce3SKalle Valo int queue_num;
2919423e3ce3SKalle Valo
2920423e3ce3SKalle Valo if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
2921423e3ce3SKalle Valo return;
2922423e3ce3SKalle Valo
2923423e3ce3SKalle Valo /* Disable and sync interrupts. We must do this before than
2924423e3ce3SKalle Valo * setting the status to INITIALIZED, as the interrupt handler
2925423e3ce3SKalle Valo * won't care about IRQs then. */
2926423e3ce3SKalle Valo spin_lock_irqsave(&wl->irq_lock, flags);
2927423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2928423e3ce3SKalle Valo b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); /* flush */
2929423e3ce3SKalle Valo spin_unlock_irqrestore(&wl->irq_lock, flags);
2930423e3ce3SKalle Valo b43legacy_synchronize_irq(dev);
2931423e3ce3SKalle Valo
2932423e3ce3SKalle Valo b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
2933423e3ce3SKalle Valo
2934423e3ce3SKalle Valo mutex_unlock(&wl->mutex);
2935423e3ce3SKalle Valo /* Must unlock as it would otherwise deadlock. No races here.
2936423e3ce3SKalle Valo * Cancel the possibly running self-rearming periodic work. */
2937423e3ce3SKalle Valo cancel_delayed_work_sync(&dev->periodic_work);
2938423e3ce3SKalle Valo cancel_work_sync(&wl->tx_work);
2939423e3ce3SKalle Valo mutex_lock(&wl->mutex);
2940423e3ce3SKalle Valo
2941423e3ce3SKalle Valo /* Drain all TX queues. */
2942423e3ce3SKalle Valo for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
2943423e3ce3SKalle Valo while (skb_queue_len(&wl->tx_queue[queue_num]))
2944423e3ce3SKalle Valo dev_kfree_skb(skb_dequeue(&wl->tx_queue[queue_num]));
2945423e3ce3SKalle Valo }
2946423e3ce3SKalle Valo
2947423e3ce3SKalle Valo b43legacy_mac_suspend(dev);
2948423e3ce3SKalle Valo free_irq(dev->dev->irq, dev);
2949423e3ce3SKalle Valo b43legacydbg(wl, "Wireless interface stopped\n");
2950423e3ce3SKalle Valo }
2951423e3ce3SKalle Valo
2952423e3ce3SKalle Valo /* Locking: wl->mutex */
b43legacy_wireless_core_start(struct b43legacy_wldev * dev)2953423e3ce3SKalle Valo static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev)
2954423e3ce3SKalle Valo {
2955423e3ce3SKalle Valo int err;
2956423e3ce3SKalle Valo
2957423e3ce3SKalle Valo B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_INITIALIZED);
2958423e3ce3SKalle Valo
2959423e3ce3SKalle Valo drain_txstatus_queue(dev);
2960423e3ce3SKalle Valo err = request_irq(dev->dev->irq, b43legacy_interrupt_handler,
2961423e3ce3SKalle Valo IRQF_SHARED, KBUILD_MODNAME, dev);
2962423e3ce3SKalle Valo if (err) {
2963423e3ce3SKalle Valo b43legacyerr(dev->wl, "Cannot request IRQ-%d\n",
2964423e3ce3SKalle Valo dev->dev->irq);
2965423e3ce3SKalle Valo goto out;
2966423e3ce3SKalle Valo }
2967423e3ce3SKalle Valo /* We are ready to run. */
2968423e3ce3SKalle Valo ieee80211_wake_queues(dev->wl->hw);
2969423e3ce3SKalle Valo b43legacy_set_status(dev, B43legacy_STAT_STARTED);
2970423e3ce3SKalle Valo
2971423e3ce3SKalle Valo /* Start data flow (TX/RX) */
2972423e3ce3SKalle Valo b43legacy_mac_enable(dev);
2973423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2974423e3ce3SKalle Valo
2975423e3ce3SKalle Valo /* Start maintenance work */
2976423e3ce3SKalle Valo b43legacy_periodic_tasks_setup(dev);
2977423e3ce3SKalle Valo
2978423e3ce3SKalle Valo b43legacydbg(dev->wl, "Wireless interface started\n");
2979423e3ce3SKalle Valo out:
2980423e3ce3SKalle Valo return err;
2981423e3ce3SKalle Valo }
2982423e3ce3SKalle Valo
2983423e3ce3SKalle Valo /* Get PHY and RADIO versioning numbers */
b43legacy_phy_versioning(struct b43legacy_wldev * dev)2984423e3ce3SKalle Valo static int b43legacy_phy_versioning(struct b43legacy_wldev *dev)
2985423e3ce3SKalle Valo {
2986423e3ce3SKalle Valo struct b43legacy_phy *phy = &dev->phy;
2987423e3ce3SKalle Valo u32 tmp;
2988423e3ce3SKalle Valo u8 analog_type;
2989423e3ce3SKalle Valo u8 phy_type;
2990423e3ce3SKalle Valo u8 phy_rev;
2991423e3ce3SKalle Valo u16 radio_manuf;
2992423e3ce3SKalle Valo u16 radio_ver;
2993423e3ce3SKalle Valo u16 radio_rev;
2994423e3ce3SKalle Valo int unsupported = 0;
2995423e3ce3SKalle Valo
2996423e3ce3SKalle Valo /* Get PHY versioning */
2997423e3ce3SKalle Valo tmp = b43legacy_read16(dev, B43legacy_MMIO_PHY_VER);
2998423e3ce3SKalle Valo analog_type = (tmp & B43legacy_PHYVER_ANALOG)
2999423e3ce3SKalle Valo >> B43legacy_PHYVER_ANALOG_SHIFT;
3000423e3ce3SKalle Valo phy_type = (tmp & B43legacy_PHYVER_TYPE) >> B43legacy_PHYVER_TYPE_SHIFT;
3001423e3ce3SKalle Valo phy_rev = (tmp & B43legacy_PHYVER_VERSION);
3002423e3ce3SKalle Valo switch (phy_type) {
3003423e3ce3SKalle Valo case B43legacy_PHYTYPE_B:
3004423e3ce3SKalle Valo if (phy_rev != 2 && phy_rev != 4
3005423e3ce3SKalle Valo && phy_rev != 6 && phy_rev != 7)
3006423e3ce3SKalle Valo unsupported = 1;
3007423e3ce3SKalle Valo break;
3008423e3ce3SKalle Valo case B43legacy_PHYTYPE_G:
3009423e3ce3SKalle Valo if (phy_rev > 8)
3010423e3ce3SKalle Valo unsupported = 1;
3011423e3ce3SKalle Valo break;
3012423e3ce3SKalle Valo default:
3013423e3ce3SKalle Valo unsupported = 1;
3014423e3ce3SKalle Valo }
3015423e3ce3SKalle Valo if (unsupported) {
3016423e3ce3SKalle Valo b43legacyerr(dev->wl, "FOUND UNSUPPORTED PHY "
3017423e3ce3SKalle Valo "(Analog %u, Type %u, Revision %u)\n",
3018423e3ce3SKalle Valo analog_type, phy_type, phy_rev);
3019423e3ce3SKalle Valo return -EOPNOTSUPP;
3020423e3ce3SKalle Valo }
3021423e3ce3SKalle Valo b43legacydbg(dev->wl, "Found PHY: Analog %u, Type %u, Revision %u\n",
3022423e3ce3SKalle Valo analog_type, phy_type, phy_rev);
3023423e3ce3SKalle Valo
3024423e3ce3SKalle Valo
3025423e3ce3SKalle Valo /* Get RADIO versioning */
3026423e3ce3SKalle Valo if (dev->dev->bus->chip_id == 0x4317) {
3027423e3ce3SKalle Valo if (dev->dev->bus->chip_rev == 0)
3028423e3ce3SKalle Valo tmp = 0x3205017F;
3029423e3ce3SKalle Valo else if (dev->dev->bus->chip_rev == 1)
3030423e3ce3SKalle Valo tmp = 0x4205017F;
3031423e3ce3SKalle Valo else
3032423e3ce3SKalle Valo tmp = 0x5205017F;
3033423e3ce3SKalle Valo } else {
3034423e3ce3SKalle Valo b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
3035423e3ce3SKalle Valo B43legacy_RADIOCTL_ID);
3036423e3ce3SKalle Valo tmp = b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_HIGH);
3037423e3ce3SKalle Valo tmp <<= 16;
3038423e3ce3SKalle Valo b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
3039423e3ce3SKalle Valo B43legacy_RADIOCTL_ID);
3040423e3ce3SKalle Valo tmp |= b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW);
3041423e3ce3SKalle Valo }
3042423e3ce3SKalle Valo radio_manuf = (tmp & 0x00000FFF);
3043423e3ce3SKalle Valo radio_ver = (tmp & 0x0FFFF000) >> 12;
3044423e3ce3SKalle Valo radio_rev = (tmp & 0xF0000000) >> 28;
3045423e3ce3SKalle Valo switch (phy_type) {
3046423e3ce3SKalle Valo case B43legacy_PHYTYPE_B:
3047423e3ce3SKalle Valo if ((radio_ver & 0xFFF0) != 0x2050)
3048423e3ce3SKalle Valo unsupported = 1;
3049423e3ce3SKalle Valo break;
3050423e3ce3SKalle Valo case B43legacy_PHYTYPE_G:
3051423e3ce3SKalle Valo if (radio_ver != 0x2050)
3052423e3ce3SKalle Valo unsupported = 1;
3053423e3ce3SKalle Valo break;
3054423e3ce3SKalle Valo default:
3055423e3ce3SKalle Valo B43legacy_BUG_ON(1);
3056423e3ce3SKalle Valo }
3057423e3ce3SKalle Valo if (unsupported) {
3058423e3ce3SKalle Valo b43legacyerr(dev->wl, "FOUND UNSUPPORTED RADIO "
3059423e3ce3SKalle Valo "(Manuf 0x%X, Version 0x%X, Revision %u)\n",
3060423e3ce3SKalle Valo radio_manuf, radio_ver, radio_rev);
3061423e3ce3SKalle Valo return -EOPNOTSUPP;
3062423e3ce3SKalle Valo }
3063423e3ce3SKalle Valo b43legacydbg(dev->wl, "Found Radio: Manuf 0x%X, Version 0x%X,"
3064423e3ce3SKalle Valo " Revision %u\n", radio_manuf, radio_ver, radio_rev);
3065423e3ce3SKalle Valo
3066423e3ce3SKalle Valo
3067423e3ce3SKalle Valo phy->radio_manuf = radio_manuf;
3068423e3ce3SKalle Valo phy->radio_ver = radio_ver;
3069423e3ce3SKalle Valo phy->radio_rev = radio_rev;
3070423e3ce3SKalle Valo
3071423e3ce3SKalle Valo phy->analog = analog_type;
3072423e3ce3SKalle Valo phy->type = phy_type;
3073423e3ce3SKalle Valo phy->rev = phy_rev;
3074423e3ce3SKalle Valo
3075423e3ce3SKalle Valo return 0;
3076423e3ce3SKalle Valo }
3077423e3ce3SKalle Valo
setup_struct_phy_for_init(struct b43legacy_wldev * dev,struct b43legacy_phy * phy)3078423e3ce3SKalle Valo static void setup_struct_phy_for_init(struct b43legacy_wldev *dev,
3079423e3ce3SKalle Valo struct b43legacy_phy *phy)
3080423e3ce3SKalle Valo {
3081423e3ce3SKalle Valo struct b43legacy_lopair *lo;
3082423e3ce3SKalle Valo int i;
3083423e3ce3SKalle Valo
3084423e3ce3SKalle Valo memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3085423e3ce3SKalle Valo memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3086423e3ce3SKalle Valo
3087423e3ce3SKalle Valo /* Assume the radio is enabled. If it's not enabled, the state will
3088423e3ce3SKalle Valo * immediately get fixed on the first periodic work run. */
3089423e3ce3SKalle Valo dev->radio_hw_enable = true;
3090423e3ce3SKalle Valo
3091423e3ce3SKalle Valo phy->savedpctlreg = 0xFFFF;
3092423e3ce3SKalle Valo phy->aci_enable = false;
3093423e3ce3SKalle Valo phy->aci_wlan_automatic = false;
3094423e3ce3SKalle Valo phy->aci_hw_rssi = false;
3095423e3ce3SKalle Valo
3096423e3ce3SKalle Valo lo = phy->_lo_pairs;
3097423e3ce3SKalle Valo if (lo)
3098423e3ce3SKalle Valo memset(lo, 0, sizeof(struct b43legacy_lopair) *
3099423e3ce3SKalle Valo B43legacy_LO_COUNT);
3100423e3ce3SKalle Valo phy->max_lb_gain = 0;
3101423e3ce3SKalle Valo phy->trsw_rx_gain = 0;
3102423e3ce3SKalle Valo
3103423e3ce3SKalle Valo /* Set default attenuation values. */
3104423e3ce3SKalle Valo phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3105423e3ce3SKalle Valo phy->rfatt = b43legacy_default_radio_attenuation(dev);
3106423e3ce3SKalle Valo phy->txctl1 = b43legacy_default_txctl1(dev);
3107423e3ce3SKalle Valo phy->txpwr_offset = 0;
3108423e3ce3SKalle Valo
3109423e3ce3SKalle Valo /* NRSSI */
3110423e3ce3SKalle Valo phy->nrssislope = 0;
3111423e3ce3SKalle Valo for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3112423e3ce3SKalle Valo phy->nrssi[i] = -1000;
3113423e3ce3SKalle Valo for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3114423e3ce3SKalle Valo phy->nrssi_lt[i] = i;
3115423e3ce3SKalle Valo
3116423e3ce3SKalle Valo phy->lofcal = 0xFFFF;
3117423e3ce3SKalle Valo phy->initval = 0xFFFF;
3118423e3ce3SKalle Valo
3119423e3ce3SKalle Valo phy->interfmode = B43legacy_INTERFMODE_NONE;
3120423e3ce3SKalle Valo phy->channel = 0xFF;
3121423e3ce3SKalle Valo }
3122423e3ce3SKalle Valo
setup_struct_wldev_for_init(struct b43legacy_wldev * dev)3123423e3ce3SKalle Valo static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev)
3124423e3ce3SKalle Valo {
3125423e3ce3SKalle Valo /* Flags */
3126423e3ce3SKalle Valo dev->dfq_valid = false;
3127423e3ce3SKalle Valo
3128423e3ce3SKalle Valo /* Stats */
3129423e3ce3SKalle Valo memset(&dev->stats, 0, sizeof(dev->stats));
3130423e3ce3SKalle Valo
3131423e3ce3SKalle Valo setup_struct_phy_for_init(dev, &dev->phy);
3132423e3ce3SKalle Valo
3133423e3ce3SKalle Valo /* IRQ related flags */
3134423e3ce3SKalle Valo dev->irq_reason = 0;
3135423e3ce3SKalle Valo memset(dev->dma_reason, 0, sizeof(dev->dma_reason));
3136423e3ce3SKalle Valo dev->irq_mask = B43legacy_IRQ_MASKTEMPLATE;
3137423e3ce3SKalle Valo
3138423e3ce3SKalle Valo dev->mac_suspended = 1;
3139423e3ce3SKalle Valo
3140423e3ce3SKalle Valo /* Noise calculation context */
3141423e3ce3SKalle Valo memset(&dev->noisecalc, 0, sizeof(dev->noisecalc));
3142423e3ce3SKalle Valo }
3143423e3ce3SKalle Valo
b43legacy_set_synth_pu_delay(struct b43legacy_wldev * dev,bool idle)3144423e3ce3SKalle Valo static void b43legacy_set_synth_pu_delay(struct b43legacy_wldev *dev,
3145423e3ce3SKalle Valo bool idle) {
3146423e3ce3SKalle Valo u16 pu_delay = 1050;
3147423e3ce3SKalle Valo
3148423e3ce3SKalle Valo if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC) || idle)
3149423e3ce3SKalle Valo pu_delay = 500;
3150423e3ce3SKalle Valo if ((dev->phy.radio_ver == 0x2050) && (dev->phy.radio_rev == 8))
3151423e3ce3SKalle Valo pu_delay = max(pu_delay, (u16)2400);
3152423e3ce3SKalle Valo
3153423e3ce3SKalle Valo b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3154423e3ce3SKalle Valo B43legacy_SHM_SH_SPUWKUP, pu_delay);
3155423e3ce3SKalle Valo }
3156423e3ce3SKalle Valo
3157423e3ce3SKalle Valo /* Set the TSF CFP pre-TargetBeaconTransmissionTime. */
b43legacy_set_pretbtt(struct b43legacy_wldev * dev)3158423e3ce3SKalle Valo static void b43legacy_set_pretbtt(struct b43legacy_wldev *dev)
3159423e3ce3SKalle Valo {
3160423e3ce3SKalle Valo u16 pretbtt;
3161423e3ce3SKalle Valo
3162423e3ce3SKalle Valo /* The time value is in microseconds. */
3163423e3ce3SKalle Valo if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC))
3164423e3ce3SKalle Valo pretbtt = 2;
3165423e3ce3SKalle Valo else
3166423e3ce3SKalle Valo pretbtt = 250;
3167423e3ce3SKalle Valo b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3168423e3ce3SKalle Valo B43legacy_SHM_SH_PRETBTT, pretbtt);
3169423e3ce3SKalle Valo b43legacy_write16(dev, B43legacy_MMIO_TSF_CFP_PRETBTT, pretbtt);
3170423e3ce3SKalle Valo }
3171423e3ce3SKalle Valo
3172423e3ce3SKalle Valo /* Shutdown a wireless core */
3173423e3ce3SKalle Valo /* Locking: wl->mutex */
b43legacy_wireless_core_exit(struct b43legacy_wldev * dev)3174423e3ce3SKalle Valo static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev)
3175423e3ce3SKalle Valo {
3176423e3ce3SKalle Valo struct b43legacy_phy *phy = &dev->phy;
3177423e3ce3SKalle Valo u32 macctl;
3178423e3ce3SKalle Valo
3179423e3ce3SKalle Valo B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED);
3180423e3ce3SKalle Valo if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED)
3181423e3ce3SKalle Valo return;
3182423e3ce3SKalle Valo b43legacy_set_status(dev, B43legacy_STAT_UNINIT);
3183423e3ce3SKalle Valo
3184423e3ce3SKalle Valo /* Stop the microcode PSM. */
3185423e3ce3SKalle Valo macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
3186423e3ce3SKalle Valo macctl &= ~B43legacy_MACCTL_PSM_RUN;
3187423e3ce3SKalle Valo macctl |= B43legacy_MACCTL_PSM_JMP0;
3188423e3ce3SKalle Valo b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
3189423e3ce3SKalle Valo
3190423e3ce3SKalle Valo b43legacy_leds_exit(dev);
3191423e3ce3SKalle Valo b43legacy_rng_exit(dev->wl);
3192423e3ce3SKalle Valo b43legacy_pio_free(dev);
3193423e3ce3SKalle Valo b43legacy_dma_free(dev);
3194423e3ce3SKalle Valo b43legacy_chip_exit(dev);
3195423e3ce3SKalle Valo b43legacy_radio_turn_off(dev, 1);
3196423e3ce3SKalle Valo b43legacy_switch_analog(dev, 0);
3197423e3ce3SKalle Valo if (phy->dyn_tssi_tbl)
3198423e3ce3SKalle Valo kfree(phy->tssi2dbm);
3199423e3ce3SKalle Valo kfree(phy->lo_control);
3200423e3ce3SKalle Valo phy->lo_control = NULL;
3201423e3ce3SKalle Valo if (dev->wl->current_beacon) {
3202423e3ce3SKalle Valo dev_kfree_skb_any(dev->wl->current_beacon);
3203423e3ce3SKalle Valo dev->wl->current_beacon = NULL;
3204423e3ce3SKalle Valo }
3205423e3ce3SKalle Valo
3206423e3ce3SKalle Valo ssb_device_disable(dev->dev, 0);
3207423e3ce3SKalle Valo ssb_bus_may_powerdown(dev->dev->bus);
3208423e3ce3SKalle Valo }
3209423e3ce3SKalle Valo
prepare_phy_data_for_init(struct b43legacy_wldev * dev)3210423e3ce3SKalle Valo static void prepare_phy_data_for_init(struct b43legacy_wldev *dev)
3211423e3ce3SKalle Valo {
3212423e3ce3SKalle Valo struct b43legacy_phy *phy = &dev->phy;
3213423e3ce3SKalle Valo int i;
3214423e3ce3SKalle Valo
3215423e3ce3SKalle Valo /* Set default attenuation values. */
3216423e3ce3SKalle Valo phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3217423e3ce3SKalle Valo phy->rfatt = b43legacy_default_radio_attenuation(dev);
3218423e3ce3SKalle Valo phy->txctl1 = b43legacy_default_txctl1(dev);
3219423e3ce3SKalle Valo phy->txctl2 = 0xFFFF;
3220423e3ce3SKalle Valo phy->txpwr_offset = 0;
3221423e3ce3SKalle Valo
3222423e3ce3SKalle Valo /* NRSSI */
3223423e3ce3SKalle Valo phy->nrssislope = 0;
3224423e3ce3SKalle Valo for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3225423e3ce3SKalle Valo phy->nrssi[i] = -1000;
3226423e3ce3SKalle Valo for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3227423e3ce3SKalle Valo phy->nrssi_lt[i] = i;
3228423e3ce3SKalle Valo
3229423e3ce3SKalle Valo phy->lofcal = 0xFFFF;
3230423e3ce3SKalle Valo phy->initval = 0xFFFF;
3231423e3ce3SKalle Valo
3232423e3ce3SKalle Valo phy->aci_enable = false;
3233423e3ce3SKalle Valo phy->aci_wlan_automatic = false;
3234423e3ce3SKalle Valo phy->aci_hw_rssi = false;
3235423e3ce3SKalle Valo
3236423e3ce3SKalle Valo phy->antenna_diversity = 0xFFFF;
3237423e3ce3SKalle Valo memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3238423e3ce3SKalle Valo memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3239423e3ce3SKalle Valo
3240423e3ce3SKalle Valo /* Flags */
3241423e3ce3SKalle Valo phy->calibrated = 0;
3242423e3ce3SKalle Valo
3243423e3ce3SKalle Valo if (phy->_lo_pairs)
3244423e3ce3SKalle Valo memset(phy->_lo_pairs, 0,
3245423e3ce3SKalle Valo sizeof(struct b43legacy_lopair) * B43legacy_LO_COUNT);
3246423e3ce3SKalle Valo memset(phy->loopback_gain, 0, sizeof(phy->loopback_gain));
3247423e3ce3SKalle Valo }
3248423e3ce3SKalle Valo
3249423e3ce3SKalle Valo /* Initialize a wireless core */
b43legacy_wireless_core_init(struct b43legacy_wldev * dev)3250423e3ce3SKalle Valo static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev)
3251423e3ce3SKalle Valo {
3252423e3ce3SKalle Valo struct b43legacy_wl *wl = dev->wl;
3253423e3ce3SKalle Valo struct ssb_bus *bus = dev->dev->bus;
3254423e3ce3SKalle Valo struct b43legacy_phy *phy = &dev->phy;
3255423e3ce3SKalle Valo struct ssb_sprom *sprom = &dev->dev->bus->sprom;
3256423e3ce3SKalle Valo int err;
3257423e3ce3SKalle Valo u32 hf;
3258423e3ce3SKalle Valo u32 tmp;
3259423e3ce3SKalle Valo
3260423e3ce3SKalle Valo B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3261423e3ce3SKalle Valo
3262423e3ce3SKalle Valo err = ssb_bus_powerup(bus, 0);
3263423e3ce3SKalle Valo if (err)
3264423e3ce3SKalle Valo goto out;
3265423e3ce3SKalle Valo if (!ssb_device_is_enabled(dev->dev)) {
3266423e3ce3SKalle Valo tmp = phy->gmode ? B43legacy_TMSLOW_GMODE : 0;
3267423e3ce3SKalle Valo b43legacy_wireless_core_reset(dev, tmp);
3268423e3ce3SKalle Valo }
3269423e3ce3SKalle Valo
3270423e3ce3SKalle Valo if ((phy->type == B43legacy_PHYTYPE_B) ||
3271423e3ce3SKalle Valo (phy->type == B43legacy_PHYTYPE_G)) {
32726396bb22SKees Cook phy->_lo_pairs = kcalloc(B43legacy_LO_COUNT,
32736396bb22SKees Cook sizeof(struct b43legacy_lopair),
3274423e3ce3SKalle Valo GFP_KERNEL);
3275423e3ce3SKalle Valo if (!phy->_lo_pairs)
3276423e3ce3SKalle Valo return -ENOMEM;
3277423e3ce3SKalle Valo }
3278423e3ce3SKalle Valo setup_struct_wldev_for_init(dev);
3279423e3ce3SKalle Valo
3280423e3ce3SKalle Valo err = b43legacy_phy_init_tssi2dbm_table(dev);
3281423e3ce3SKalle Valo if (err)
3282423e3ce3SKalle Valo goto err_kfree_lo_control;
3283423e3ce3SKalle Valo
3284423e3ce3SKalle Valo /* Enable IRQ routing to this device. */
3285423e3ce3SKalle Valo ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev);
3286423e3ce3SKalle Valo
3287423e3ce3SKalle Valo prepare_phy_data_for_init(dev);
3288423e3ce3SKalle Valo b43legacy_phy_calibrate(dev);
3289423e3ce3SKalle Valo err = b43legacy_chip_init(dev);
3290423e3ce3SKalle Valo if (err)
3291423e3ce3SKalle Valo goto err_kfree_tssitbl;
3292423e3ce3SKalle Valo b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3293423e3ce3SKalle Valo B43legacy_SHM_SH_WLCOREREV,
3294423e3ce3SKalle Valo dev->dev->id.revision);
3295423e3ce3SKalle Valo hf = b43legacy_hf_read(dev);
3296423e3ce3SKalle Valo if (phy->type == B43legacy_PHYTYPE_G) {
3297423e3ce3SKalle Valo hf |= B43legacy_HF_SYMW;
3298423e3ce3SKalle Valo if (phy->rev == 1)
3299423e3ce3SKalle Valo hf |= B43legacy_HF_GDCW;
3300423e3ce3SKalle Valo if (sprom->boardflags_lo & B43legacy_BFL_PACTRL)
3301423e3ce3SKalle Valo hf |= B43legacy_HF_OFDMPABOOST;
3302423e3ce3SKalle Valo } else if (phy->type == B43legacy_PHYTYPE_B) {
3303423e3ce3SKalle Valo hf |= B43legacy_HF_SYMW;
3304423e3ce3SKalle Valo if (phy->rev >= 2 && phy->radio_ver == 0x2050)
3305423e3ce3SKalle Valo hf &= ~B43legacy_HF_GDCW;
3306423e3ce3SKalle Valo }
3307423e3ce3SKalle Valo b43legacy_hf_write(dev, hf);
3308423e3ce3SKalle Valo
3309423e3ce3SKalle Valo b43legacy_set_retry_limits(dev,
3310423e3ce3SKalle Valo B43legacy_DEFAULT_SHORT_RETRY_LIMIT,
3311423e3ce3SKalle Valo B43legacy_DEFAULT_LONG_RETRY_LIMIT);
3312423e3ce3SKalle Valo
3313423e3ce3SKalle Valo b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3314423e3ce3SKalle Valo 0x0044, 3);
3315423e3ce3SKalle Valo b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3316423e3ce3SKalle Valo 0x0046, 2);
3317423e3ce3SKalle Valo
3318423e3ce3SKalle Valo /* Disable sending probe responses from firmware.
3319423e3ce3SKalle Valo * Setting the MaxTime to one usec will always trigger
3320423e3ce3SKalle Valo * a timeout, so we never send any probe resp.
3321423e3ce3SKalle Valo * A timeout of zero is infinite. */
3322423e3ce3SKalle Valo b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3323423e3ce3SKalle Valo B43legacy_SHM_SH_PRMAXTIME, 1);
3324423e3ce3SKalle Valo
3325423e3ce3SKalle Valo b43legacy_rate_memory_init(dev);
3326423e3ce3SKalle Valo
3327423e3ce3SKalle Valo /* Minimum Contention Window */
3328423e3ce3SKalle Valo if (phy->type == B43legacy_PHYTYPE_B)
3329423e3ce3SKalle Valo b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3330423e3ce3SKalle Valo 0x0003, 31);
3331423e3ce3SKalle Valo else
3332423e3ce3SKalle Valo b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3333423e3ce3SKalle Valo 0x0003, 15);
3334423e3ce3SKalle Valo /* Maximum Contention Window */
3335423e3ce3SKalle Valo b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3336423e3ce3SKalle Valo 0x0004, 1023);
3337423e3ce3SKalle Valo
3338423e3ce3SKalle Valo do {
3339423e3ce3SKalle Valo if (b43legacy_using_pio(dev))
3340423e3ce3SKalle Valo err = b43legacy_pio_init(dev);
3341423e3ce3SKalle Valo else {
3342423e3ce3SKalle Valo err = b43legacy_dma_init(dev);
3343423e3ce3SKalle Valo if (!err)
3344423e3ce3SKalle Valo b43legacy_qos_init(dev);
3345423e3ce3SKalle Valo }
3346423e3ce3SKalle Valo } while (err == -EAGAIN);
3347423e3ce3SKalle Valo if (err)
3348423e3ce3SKalle Valo goto err_chip_exit;
3349423e3ce3SKalle Valo
3350423e3ce3SKalle Valo b43legacy_set_synth_pu_delay(dev, 1);
3351423e3ce3SKalle Valo
3352423e3ce3SKalle Valo ssb_bus_powerup(bus, 1); /* Enable dynamic PCTL */
3353423e3ce3SKalle Valo b43legacy_upload_card_macaddress(dev);
3354423e3ce3SKalle Valo b43legacy_security_init(dev);
3355423e3ce3SKalle Valo b43legacy_rng_init(wl);
3356423e3ce3SKalle Valo
3357423e3ce3SKalle Valo ieee80211_wake_queues(dev->wl->hw);
3358423e3ce3SKalle Valo b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
3359423e3ce3SKalle Valo
3360423e3ce3SKalle Valo b43legacy_leds_init(dev);
3361423e3ce3SKalle Valo out:
3362423e3ce3SKalle Valo return err;
3363423e3ce3SKalle Valo
3364423e3ce3SKalle Valo err_chip_exit:
3365423e3ce3SKalle Valo b43legacy_chip_exit(dev);
3366423e3ce3SKalle Valo err_kfree_tssitbl:
3367423e3ce3SKalle Valo if (phy->dyn_tssi_tbl)
3368423e3ce3SKalle Valo kfree(phy->tssi2dbm);
3369423e3ce3SKalle Valo err_kfree_lo_control:
3370423e3ce3SKalle Valo kfree(phy->lo_control);
3371423e3ce3SKalle Valo phy->lo_control = NULL;
3372423e3ce3SKalle Valo ssb_bus_may_powerdown(bus);
3373423e3ce3SKalle Valo B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3374423e3ce3SKalle Valo return err;
3375423e3ce3SKalle Valo }
3376423e3ce3SKalle Valo
b43legacy_op_add_interface(struct ieee80211_hw * hw,struct ieee80211_vif * vif)3377423e3ce3SKalle Valo static int b43legacy_op_add_interface(struct ieee80211_hw *hw,
3378423e3ce3SKalle Valo struct ieee80211_vif *vif)
3379423e3ce3SKalle Valo {
3380423e3ce3SKalle Valo struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3381423e3ce3SKalle Valo struct b43legacy_wldev *dev;
3382423e3ce3SKalle Valo unsigned long flags;
3383423e3ce3SKalle Valo int err = -EOPNOTSUPP;
3384423e3ce3SKalle Valo
33858c21fc45SJohannes Berg /* TODO: allow AP devices to coexist */
3386423e3ce3SKalle Valo
3387423e3ce3SKalle Valo if (vif->type != NL80211_IFTYPE_AP &&
3388423e3ce3SKalle Valo vif->type != NL80211_IFTYPE_STATION &&
3389423e3ce3SKalle Valo vif->type != NL80211_IFTYPE_ADHOC)
3390423e3ce3SKalle Valo return -EOPNOTSUPP;
3391423e3ce3SKalle Valo
3392423e3ce3SKalle Valo mutex_lock(&wl->mutex);
3393423e3ce3SKalle Valo if (wl->operating)
3394423e3ce3SKalle Valo goto out_mutex_unlock;
3395423e3ce3SKalle Valo
3396423e3ce3SKalle Valo b43legacydbg(wl, "Adding Interface type %d\n", vif->type);
3397423e3ce3SKalle Valo
3398423e3ce3SKalle Valo dev = wl->current_dev;
3399423e3ce3SKalle Valo wl->operating = true;
3400423e3ce3SKalle Valo wl->vif = vif;
3401423e3ce3SKalle Valo wl->if_type = vif->type;
3402423e3ce3SKalle Valo memcpy(wl->mac_addr, vif->addr, ETH_ALEN);
3403423e3ce3SKalle Valo
3404423e3ce3SKalle Valo spin_lock_irqsave(&wl->irq_lock, flags);
3405423e3ce3SKalle Valo b43legacy_adjust_opmode(dev);
3406423e3ce3SKalle Valo b43legacy_set_pretbtt(dev);
3407423e3ce3SKalle Valo b43legacy_set_synth_pu_delay(dev, 0);
3408423e3ce3SKalle Valo b43legacy_upload_card_macaddress(dev);
3409423e3ce3SKalle Valo spin_unlock_irqrestore(&wl->irq_lock, flags);
3410423e3ce3SKalle Valo
3411423e3ce3SKalle Valo err = 0;
3412423e3ce3SKalle Valo out_mutex_unlock:
3413423e3ce3SKalle Valo mutex_unlock(&wl->mutex);
3414423e3ce3SKalle Valo
3415423e3ce3SKalle Valo return err;
3416423e3ce3SKalle Valo }
3417423e3ce3SKalle Valo
b43legacy_op_remove_interface(struct ieee80211_hw * hw,struct ieee80211_vif * vif)3418423e3ce3SKalle Valo static void b43legacy_op_remove_interface(struct ieee80211_hw *hw,
3419423e3ce3SKalle Valo struct ieee80211_vif *vif)
3420423e3ce3SKalle Valo {
3421423e3ce3SKalle Valo struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3422423e3ce3SKalle Valo struct b43legacy_wldev *dev = wl->current_dev;
3423423e3ce3SKalle Valo unsigned long flags;
3424423e3ce3SKalle Valo
3425423e3ce3SKalle Valo b43legacydbg(wl, "Removing Interface type %d\n", vif->type);
3426423e3ce3SKalle Valo
3427423e3ce3SKalle Valo mutex_lock(&wl->mutex);
3428423e3ce3SKalle Valo
3429423e3ce3SKalle Valo B43legacy_WARN_ON(!wl->operating);
3430423e3ce3SKalle Valo B43legacy_WARN_ON(wl->vif != vif);
3431423e3ce3SKalle Valo wl->vif = NULL;
3432423e3ce3SKalle Valo
3433423e3ce3SKalle Valo wl->operating = false;
3434423e3ce3SKalle Valo
3435423e3ce3SKalle Valo spin_lock_irqsave(&wl->irq_lock, flags);
3436423e3ce3SKalle Valo b43legacy_adjust_opmode(dev);
3437423e3ce3SKalle Valo eth_zero_addr(wl->mac_addr);
3438423e3ce3SKalle Valo b43legacy_upload_card_macaddress(dev);
3439423e3ce3SKalle Valo spin_unlock_irqrestore(&wl->irq_lock, flags);
3440423e3ce3SKalle Valo
3441423e3ce3SKalle Valo mutex_unlock(&wl->mutex);
3442423e3ce3SKalle Valo }
3443423e3ce3SKalle Valo
b43legacy_op_start(struct ieee80211_hw * hw)3444423e3ce3SKalle Valo static int b43legacy_op_start(struct ieee80211_hw *hw)
3445423e3ce3SKalle Valo {
3446423e3ce3SKalle Valo struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3447423e3ce3SKalle Valo struct b43legacy_wldev *dev = wl->current_dev;
3448423e3ce3SKalle Valo int did_init = 0;
3449423e3ce3SKalle Valo int err = 0;
3450423e3ce3SKalle Valo
3451423e3ce3SKalle Valo /* Kill all old instance specific information to make sure
3452423e3ce3SKalle Valo * the card won't use it in the short timeframe between start
3453423e3ce3SKalle Valo * and mac80211 reconfiguring it. */
3454423e3ce3SKalle Valo eth_zero_addr(wl->bssid);
3455423e3ce3SKalle Valo eth_zero_addr(wl->mac_addr);
3456423e3ce3SKalle Valo wl->filter_flags = 0;
3457423e3ce3SKalle Valo wl->beacon0_uploaded = false;
3458423e3ce3SKalle Valo wl->beacon1_uploaded = false;
3459423e3ce3SKalle Valo wl->beacon_templates_virgin = true;
3460423e3ce3SKalle Valo wl->radio_enabled = true;
3461423e3ce3SKalle Valo
3462423e3ce3SKalle Valo mutex_lock(&wl->mutex);
3463423e3ce3SKalle Valo
3464423e3ce3SKalle Valo if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
3465423e3ce3SKalle Valo err = b43legacy_wireless_core_init(dev);
3466423e3ce3SKalle Valo if (err)
3467423e3ce3SKalle Valo goto out_mutex_unlock;
3468423e3ce3SKalle Valo did_init = 1;
3469423e3ce3SKalle Valo }
3470423e3ce3SKalle Valo
3471423e3ce3SKalle Valo if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
3472423e3ce3SKalle Valo err = b43legacy_wireless_core_start(dev);
3473423e3ce3SKalle Valo if (err) {
3474423e3ce3SKalle Valo if (did_init)
3475423e3ce3SKalle Valo b43legacy_wireless_core_exit(dev);
3476423e3ce3SKalle Valo goto out_mutex_unlock;
3477423e3ce3SKalle Valo }
3478423e3ce3SKalle Valo }
3479423e3ce3SKalle Valo
3480423e3ce3SKalle Valo wiphy_rfkill_start_polling(hw->wiphy);
3481423e3ce3SKalle Valo
3482423e3ce3SKalle Valo out_mutex_unlock:
3483423e3ce3SKalle Valo mutex_unlock(&wl->mutex);
3484423e3ce3SKalle Valo
3485423e3ce3SKalle Valo return err;
3486423e3ce3SKalle Valo }
3487423e3ce3SKalle Valo
b43legacy_op_stop(struct ieee80211_hw * hw)3488423e3ce3SKalle Valo static void b43legacy_op_stop(struct ieee80211_hw *hw)
3489423e3ce3SKalle Valo {
3490423e3ce3SKalle Valo struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3491423e3ce3SKalle Valo struct b43legacy_wldev *dev = wl->current_dev;
3492423e3ce3SKalle Valo
3493423e3ce3SKalle Valo cancel_work_sync(&(wl->beacon_update_trigger));
3494423e3ce3SKalle Valo
3495423e3ce3SKalle Valo mutex_lock(&wl->mutex);
3496423e3ce3SKalle Valo if (b43legacy_status(dev) >= B43legacy_STAT_STARTED)
3497423e3ce3SKalle Valo b43legacy_wireless_core_stop(dev);
3498423e3ce3SKalle Valo b43legacy_wireless_core_exit(dev);
3499423e3ce3SKalle Valo wl->radio_enabled = false;
3500423e3ce3SKalle Valo mutex_unlock(&wl->mutex);
3501423e3ce3SKalle Valo }
3502423e3ce3SKalle Valo
b43legacy_op_beacon_set_tim(struct ieee80211_hw * hw,struct ieee80211_sta * sta,bool set)3503423e3ce3SKalle Valo static int b43legacy_op_beacon_set_tim(struct ieee80211_hw *hw,
3504423e3ce3SKalle Valo struct ieee80211_sta *sta, bool set)
3505423e3ce3SKalle Valo {
3506423e3ce3SKalle Valo struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3507423e3ce3SKalle Valo unsigned long flags;
3508423e3ce3SKalle Valo
3509423e3ce3SKalle Valo spin_lock_irqsave(&wl->irq_lock, flags);
3510423e3ce3SKalle Valo b43legacy_update_templates(wl);
3511423e3ce3SKalle Valo spin_unlock_irqrestore(&wl->irq_lock, flags);
3512423e3ce3SKalle Valo
3513423e3ce3SKalle Valo return 0;
3514423e3ce3SKalle Valo }
3515423e3ce3SKalle Valo
b43legacy_op_get_survey(struct ieee80211_hw * hw,int idx,struct survey_info * survey)3516423e3ce3SKalle Valo static int b43legacy_op_get_survey(struct ieee80211_hw *hw, int idx,
3517423e3ce3SKalle Valo struct survey_info *survey)
3518423e3ce3SKalle Valo {
3519423e3ce3SKalle Valo struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3520423e3ce3SKalle Valo struct b43legacy_wldev *dev = wl->current_dev;
3521423e3ce3SKalle Valo struct ieee80211_conf *conf = &hw->conf;
3522423e3ce3SKalle Valo
3523423e3ce3SKalle Valo if (idx != 0)
3524423e3ce3SKalle Valo return -ENOENT;
3525423e3ce3SKalle Valo
3526423e3ce3SKalle Valo survey->channel = conf->chandef.chan;
3527423e3ce3SKalle Valo survey->filled = SURVEY_INFO_NOISE_DBM;
3528423e3ce3SKalle Valo survey->noise = dev->stats.link_noise;
3529423e3ce3SKalle Valo
3530423e3ce3SKalle Valo return 0;
3531423e3ce3SKalle Valo }
3532423e3ce3SKalle Valo
3533423e3ce3SKalle Valo static const struct ieee80211_ops b43legacy_hw_ops = {
3534423e3ce3SKalle Valo .tx = b43legacy_op_tx,
3535*a790cc3aSAlexander Wetzel .wake_tx_queue = ieee80211_handle_wake_tx_queue,
3536423e3ce3SKalle Valo .conf_tx = b43legacy_op_conf_tx,
3537423e3ce3SKalle Valo .add_interface = b43legacy_op_add_interface,
3538423e3ce3SKalle Valo .remove_interface = b43legacy_op_remove_interface,
3539423e3ce3SKalle Valo .config = b43legacy_op_dev_config,
3540423e3ce3SKalle Valo .bss_info_changed = b43legacy_op_bss_info_changed,
3541423e3ce3SKalle Valo .configure_filter = b43legacy_op_configure_filter,
3542423e3ce3SKalle Valo .get_stats = b43legacy_op_get_stats,
3543423e3ce3SKalle Valo .start = b43legacy_op_start,
3544423e3ce3SKalle Valo .stop = b43legacy_op_stop,
3545423e3ce3SKalle Valo .set_tim = b43legacy_op_beacon_set_tim,
3546423e3ce3SKalle Valo .get_survey = b43legacy_op_get_survey,
3547423e3ce3SKalle Valo .rfkill_poll = b43legacy_rfkill_poll,
3548423e3ce3SKalle Valo };
3549423e3ce3SKalle Valo
3550423e3ce3SKalle Valo /* Hard-reset the chip. Do not call this directly.
3551423e3ce3SKalle Valo * Use b43legacy_controller_restart()
3552423e3ce3SKalle Valo */
b43legacy_chip_reset(struct work_struct * work)3553423e3ce3SKalle Valo static void b43legacy_chip_reset(struct work_struct *work)
3554423e3ce3SKalle Valo {
3555423e3ce3SKalle Valo struct b43legacy_wldev *dev =
3556423e3ce3SKalle Valo container_of(work, struct b43legacy_wldev, restart_work);
3557423e3ce3SKalle Valo struct b43legacy_wl *wl = dev->wl;
3558423e3ce3SKalle Valo int err = 0;
3559423e3ce3SKalle Valo int prev_status;
3560423e3ce3SKalle Valo
3561423e3ce3SKalle Valo mutex_lock(&wl->mutex);
3562423e3ce3SKalle Valo
3563423e3ce3SKalle Valo prev_status = b43legacy_status(dev);
3564423e3ce3SKalle Valo /* Bring the device down... */
3565423e3ce3SKalle Valo if (prev_status >= B43legacy_STAT_STARTED)
3566423e3ce3SKalle Valo b43legacy_wireless_core_stop(dev);
3567423e3ce3SKalle Valo if (prev_status >= B43legacy_STAT_INITIALIZED)
3568423e3ce3SKalle Valo b43legacy_wireless_core_exit(dev);
3569423e3ce3SKalle Valo
3570423e3ce3SKalle Valo /* ...and up again. */
3571423e3ce3SKalle Valo if (prev_status >= B43legacy_STAT_INITIALIZED) {
3572423e3ce3SKalle Valo err = b43legacy_wireless_core_init(dev);
3573423e3ce3SKalle Valo if (err)
3574423e3ce3SKalle Valo goto out;
3575423e3ce3SKalle Valo }
3576423e3ce3SKalle Valo if (prev_status >= B43legacy_STAT_STARTED) {
3577423e3ce3SKalle Valo err = b43legacy_wireless_core_start(dev);
3578423e3ce3SKalle Valo if (err) {
3579423e3ce3SKalle Valo b43legacy_wireless_core_exit(dev);
3580423e3ce3SKalle Valo goto out;
3581423e3ce3SKalle Valo }
3582423e3ce3SKalle Valo }
3583423e3ce3SKalle Valo out:
3584423e3ce3SKalle Valo if (err)
3585423e3ce3SKalle Valo wl->current_dev = NULL; /* Failed to init the dev. */
3586423e3ce3SKalle Valo mutex_unlock(&wl->mutex);
3587423e3ce3SKalle Valo if (err)
3588423e3ce3SKalle Valo b43legacyerr(wl, "Controller restart FAILED\n");
3589423e3ce3SKalle Valo else
3590423e3ce3SKalle Valo b43legacyinfo(wl, "Controller restarted\n");
3591423e3ce3SKalle Valo }
3592423e3ce3SKalle Valo
b43legacy_setup_modes(struct b43legacy_wldev * dev,int have_bphy,int have_gphy)3593423e3ce3SKalle Valo static int b43legacy_setup_modes(struct b43legacy_wldev *dev,
3594423e3ce3SKalle Valo int have_bphy,
3595423e3ce3SKalle Valo int have_gphy)
3596423e3ce3SKalle Valo {
3597423e3ce3SKalle Valo struct ieee80211_hw *hw = dev->wl->hw;
3598423e3ce3SKalle Valo struct b43legacy_phy *phy = &dev->phy;
3599423e3ce3SKalle Valo
3600423e3ce3SKalle Valo phy->possible_phymodes = 0;
3601423e3ce3SKalle Valo if (have_bphy) {
360257fbcce3SJohannes Berg hw->wiphy->bands[NL80211_BAND_2GHZ] =
3603423e3ce3SKalle Valo &b43legacy_band_2GHz_BPHY;
3604423e3ce3SKalle Valo phy->possible_phymodes |= B43legacy_PHYMODE_B;
3605423e3ce3SKalle Valo }
3606423e3ce3SKalle Valo
3607423e3ce3SKalle Valo if (have_gphy) {
360857fbcce3SJohannes Berg hw->wiphy->bands[NL80211_BAND_2GHZ] =
3609423e3ce3SKalle Valo &b43legacy_band_2GHz_GPHY;
3610423e3ce3SKalle Valo phy->possible_phymodes |= B43legacy_PHYMODE_G;
3611423e3ce3SKalle Valo }
3612423e3ce3SKalle Valo
3613423e3ce3SKalle Valo return 0;
3614423e3ce3SKalle Valo }
3615423e3ce3SKalle Valo
b43legacy_wireless_core_detach(struct b43legacy_wldev * dev)3616423e3ce3SKalle Valo static void b43legacy_wireless_core_detach(struct b43legacy_wldev *dev)
3617423e3ce3SKalle Valo {
3618423e3ce3SKalle Valo /* We release firmware that late to not be required to re-request
3619423e3ce3SKalle Valo * is all the time when we reinit the core. */
3620423e3ce3SKalle Valo b43legacy_release_firmware(dev);
3621423e3ce3SKalle Valo }
3622423e3ce3SKalle Valo
b43legacy_wireless_core_attach(struct b43legacy_wldev * dev)3623423e3ce3SKalle Valo static int b43legacy_wireless_core_attach(struct b43legacy_wldev *dev)
3624423e3ce3SKalle Valo {
3625423e3ce3SKalle Valo struct b43legacy_wl *wl = dev->wl;
3626423e3ce3SKalle Valo struct ssb_bus *bus = dev->dev->bus;
3627423e3ce3SKalle Valo struct pci_dev *pdev = (bus->bustype == SSB_BUSTYPE_PCI) ? bus->host_pci : NULL;
3628423e3ce3SKalle Valo int err;
3629423e3ce3SKalle Valo int have_bphy = 0;
3630423e3ce3SKalle Valo int have_gphy = 0;
3631423e3ce3SKalle Valo u32 tmp;
3632423e3ce3SKalle Valo
3633423e3ce3SKalle Valo /* Do NOT do any device initialization here.
3634423e3ce3SKalle Valo * Do it in wireless_core_init() instead.
3635423e3ce3SKalle Valo * This function is for gathering basic information about the HW, only.
3636423e3ce3SKalle Valo * Also some structs may be set up here. But most likely you want to
3637423e3ce3SKalle Valo * have that in core_init(), too.
3638423e3ce3SKalle Valo */
3639423e3ce3SKalle Valo
3640423e3ce3SKalle Valo err = ssb_bus_powerup(bus, 0);
3641423e3ce3SKalle Valo if (err) {
3642423e3ce3SKalle Valo b43legacyerr(wl, "Bus powerup failed\n");
3643423e3ce3SKalle Valo goto out;
3644423e3ce3SKalle Valo }
3645423e3ce3SKalle Valo /* Get the PHY type. */
3646423e3ce3SKalle Valo if (dev->dev->id.revision >= 5) {
3647423e3ce3SKalle Valo u32 tmshigh;
3648423e3ce3SKalle Valo
3649423e3ce3SKalle Valo tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
3650423e3ce3SKalle Valo have_gphy = !!(tmshigh & B43legacy_TMSHIGH_GPHY);
3651423e3ce3SKalle Valo if (!have_gphy)
3652423e3ce3SKalle Valo have_bphy = 1;
3653423e3ce3SKalle Valo } else if (dev->dev->id.revision == 4)
3654423e3ce3SKalle Valo have_gphy = 1;
3655423e3ce3SKalle Valo else
3656423e3ce3SKalle Valo have_bphy = 1;
3657423e3ce3SKalle Valo
3658423e3ce3SKalle Valo dev->phy.gmode = (have_gphy || have_bphy);
3659423e3ce3SKalle Valo dev->phy.radio_on = true;
3660423e3ce3SKalle Valo tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3661423e3ce3SKalle Valo b43legacy_wireless_core_reset(dev, tmp);
3662423e3ce3SKalle Valo
3663423e3ce3SKalle Valo err = b43legacy_phy_versioning(dev);
3664423e3ce3SKalle Valo if (err)
3665423e3ce3SKalle Valo goto err_powerdown;
3666423e3ce3SKalle Valo /* Check if this device supports multiband. */
3667423e3ce3SKalle Valo if (!pdev ||
3668423e3ce3SKalle Valo (pdev->device != 0x4312 &&
3669423e3ce3SKalle Valo pdev->device != 0x4319 &&
3670423e3ce3SKalle Valo pdev->device != 0x4324)) {
3671423e3ce3SKalle Valo /* No multiband support. */
3672423e3ce3SKalle Valo have_bphy = 0;
3673423e3ce3SKalle Valo have_gphy = 0;
3674423e3ce3SKalle Valo switch (dev->phy.type) {
3675423e3ce3SKalle Valo case B43legacy_PHYTYPE_B:
3676423e3ce3SKalle Valo have_bphy = 1;
3677423e3ce3SKalle Valo break;
3678423e3ce3SKalle Valo case B43legacy_PHYTYPE_G:
3679423e3ce3SKalle Valo have_gphy = 1;
3680423e3ce3SKalle Valo break;
3681423e3ce3SKalle Valo default:
3682423e3ce3SKalle Valo B43legacy_BUG_ON(1);
3683423e3ce3SKalle Valo }
3684423e3ce3SKalle Valo }
3685423e3ce3SKalle Valo dev->phy.gmode = (have_gphy || have_bphy);
3686423e3ce3SKalle Valo tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3687423e3ce3SKalle Valo b43legacy_wireless_core_reset(dev, tmp);
3688423e3ce3SKalle Valo
3689423e3ce3SKalle Valo err = b43legacy_validate_chipaccess(dev);
3690423e3ce3SKalle Valo if (err)
3691423e3ce3SKalle Valo goto err_powerdown;
3692423e3ce3SKalle Valo err = b43legacy_setup_modes(dev, have_bphy, have_gphy);
3693423e3ce3SKalle Valo if (err)
3694423e3ce3SKalle Valo goto err_powerdown;
3695423e3ce3SKalle Valo
3696423e3ce3SKalle Valo /* Now set some default "current_dev" */
3697423e3ce3SKalle Valo if (!wl->current_dev)
3698423e3ce3SKalle Valo wl->current_dev = dev;
3699423e3ce3SKalle Valo INIT_WORK(&dev->restart_work, b43legacy_chip_reset);
3700423e3ce3SKalle Valo
3701423e3ce3SKalle Valo b43legacy_radio_turn_off(dev, 1);
3702423e3ce3SKalle Valo b43legacy_switch_analog(dev, 0);
3703423e3ce3SKalle Valo ssb_device_disable(dev->dev, 0);
3704423e3ce3SKalle Valo ssb_bus_may_powerdown(bus);
3705423e3ce3SKalle Valo
3706423e3ce3SKalle Valo out:
3707423e3ce3SKalle Valo return err;
3708423e3ce3SKalle Valo
3709423e3ce3SKalle Valo err_powerdown:
3710423e3ce3SKalle Valo ssb_bus_may_powerdown(bus);
3711423e3ce3SKalle Valo return err;
3712423e3ce3SKalle Valo }
3713423e3ce3SKalle Valo
b43legacy_one_core_detach(struct ssb_device * dev)3714423e3ce3SKalle Valo static void b43legacy_one_core_detach(struct ssb_device *dev)
3715423e3ce3SKalle Valo {
3716423e3ce3SKalle Valo struct b43legacy_wldev *wldev;
3717423e3ce3SKalle Valo struct b43legacy_wl *wl;
3718423e3ce3SKalle Valo
3719423e3ce3SKalle Valo /* Do not cancel ieee80211-workqueue based work here.
3720423e3ce3SKalle Valo * See comment in b43legacy_remove(). */
3721423e3ce3SKalle Valo
3722423e3ce3SKalle Valo wldev = ssb_get_drvdata(dev);
3723423e3ce3SKalle Valo wl = wldev->wl;
3724423e3ce3SKalle Valo b43legacy_debugfs_remove_device(wldev);
3725423e3ce3SKalle Valo b43legacy_wireless_core_detach(wldev);
3726423e3ce3SKalle Valo list_del(&wldev->list);
3727423e3ce3SKalle Valo wl->nr_devs--;
3728423e3ce3SKalle Valo ssb_set_drvdata(dev, NULL);
3729423e3ce3SKalle Valo kfree(wldev);
3730423e3ce3SKalle Valo }
3731423e3ce3SKalle Valo
b43legacy_one_core_attach(struct ssb_device * dev,struct b43legacy_wl * wl)3732423e3ce3SKalle Valo static int b43legacy_one_core_attach(struct ssb_device *dev,
3733423e3ce3SKalle Valo struct b43legacy_wl *wl)
3734423e3ce3SKalle Valo {
3735423e3ce3SKalle Valo struct b43legacy_wldev *wldev;
3736423e3ce3SKalle Valo int err = -ENOMEM;
3737423e3ce3SKalle Valo
3738423e3ce3SKalle Valo wldev = kzalloc(sizeof(*wldev), GFP_KERNEL);
3739423e3ce3SKalle Valo if (!wldev)
3740423e3ce3SKalle Valo goto out;
3741423e3ce3SKalle Valo
3742423e3ce3SKalle Valo wldev->dev = dev;
3743423e3ce3SKalle Valo wldev->wl = wl;
3744423e3ce3SKalle Valo b43legacy_set_status(wldev, B43legacy_STAT_UNINIT);
3745423e3ce3SKalle Valo wldev->bad_frames_preempt = modparam_bad_frames_preempt;
3746fc672230SAllen Pais tasklet_setup(&wldev->isr_tasklet, b43legacy_interrupt_tasklet);
3747423e3ce3SKalle Valo if (modparam_pio)
3748423e3ce3SKalle Valo wldev->__using_pio = true;
3749423e3ce3SKalle Valo INIT_LIST_HEAD(&wldev->list);
3750423e3ce3SKalle Valo
3751423e3ce3SKalle Valo err = b43legacy_wireless_core_attach(wldev);
3752423e3ce3SKalle Valo if (err)
3753423e3ce3SKalle Valo goto err_kfree_wldev;
3754423e3ce3SKalle Valo
3755423e3ce3SKalle Valo list_add(&wldev->list, &wl->devlist);
3756423e3ce3SKalle Valo wl->nr_devs++;
3757423e3ce3SKalle Valo ssb_set_drvdata(dev, wldev);
3758423e3ce3SKalle Valo b43legacy_debugfs_add_device(wldev);
3759423e3ce3SKalle Valo out:
3760423e3ce3SKalle Valo return err;
3761423e3ce3SKalle Valo
3762423e3ce3SKalle Valo err_kfree_wldev:
3763423e3ce3SKalle Valo kfree(wldev);
3764423e3ce3SKalle Valo return err;
3765423e3ce3SKalle Valo }
3766423e3ce3SKalle Valo
b43legacy_sprom_fixup(struct ssb_bus * bus)3767423e3ce3SKalle Valo static void b43legacy_sprom_fixup(struct ssb_bus *bus)
3768423e3ce3SKalle Valo {
3769423e3ce3SKalle Valo /* boardflags workarounds */
3770423e3ce3SKalle Valo if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
3771423e3ce3SKalle Valo bus->boardinfo.type == 0x4E &&
3772423e3ce3SKalle Valo bus->sprom.board_rev > 0x40)
3773423e3ce3SKalle Valo bus->sprom.boardflags_lo |= B43legacy_BFL_PACTRL;
3774423e3ce3SKalle Valo }
3775423e3ce3SKalle Valo
b43legacy_wireless_exit(struct ssb_device * dev,struct b43legacy_wl * wl)3776423e3ce3SKalle Valo static void b43legacy_wireless_exit(struct ssb_device *dev,
3777423e3ce3SKalle Valo struct b43legacy_wl *wl)
3778423e3ce3SKalle Valo {
3779423e3ce3SKalle Valo struct ieee80211_hw *hw = wl->hw;
3780423e3ce3SKalle Valo
3781423e3ce3SKalle Valo ssb_set_devtypedata(dev, NULL);
3782423e3ce3SKalle Valo ieee80211_free_hw(hw);
3783423e3ce3SKalle Valo }
3784423e3ce3SKalle Valo
b43legacy_wireless_init(struct ssb_device * dev)3785423e3ce3SKalle Valo static int b43legacy_wireless_init(struct ssb_device *dev)
3786423e3ce3SKalle Valo {
3787423e3ce3SKalle Valo struct ssb_sprom *sprom = &dev->bus->sprom;
3788423e3ce3SKalle Valo struct ieee80211_hw *hw;
3789423e3ce3SKalle Valo struct b43legacy_wl *wl;
3790423e3ce3SKalle Valo int err = -ENOMEM;
3791423e3ce3SKalle Valo int queue_num;
3792423e3ce3SKalle Valo
3793423e3ce3SKalle Valo b43legacy_sprom_fixup(dev->bus);
3794423e3ce3SKalle Valo
3795423e3ce3SKalle Valo hw = ieee80211_alloc_hw(sizeof(*wl), &b43legacy_hw_ops);
3796423e3ce3SKalle Valo if (!hw) {
3797423e3ce3SKalle Valo b43legacyerr(NULL, "Could not allocate ieee80211 device\n");
3798423e3ce3SKalle Valo goto out;
3799423e3ce3SKalle Valo }
3800423e3ce3SKalle Valo
3801423e3ce3SKalle Valo /* fill hw info */
3802423e3ce3SKalle Valo ieee80211_hw_set(hw, RX_INCLUDES_FCS);
3803423e3ce3SKalle Valo ieee80211_hw_set(hw, SIGNAL_DBM);
38046a29d134SLarry Finger ieee80211_hw_set(hw, MFP_CAPABLE); /* Allow WPA3 in software */
3805423e3ce3SKalle Valo
3806423e3ce3SKalle Valo hw->wiphy->interface_modes =
3807423e3ce3SKalle Valo BIT(NL80211_IFTYPE_AP) |
3808423e3ce3SKalle Valo BIT(NL80211_IFTYPE_STATION) |
3809423e3ce3SKalle Valo BIT(NL80211_IFTYPE_ADHOC);
3810423e3ce3SKalle Valo hw->queues = 1; /* FIXME: hardware has more queues */
3811423e3ce3SKalle Valo hw->max_rates = 2;
3812423e3ce3SKalle Valo SET_IEEE80211_DEV(hw, dev->dev);
3813423e3ce3SKalle Valo if (is_valid_ether_addr(sprom->et1mac))
3814423e3ce3SKalle Valo SET_IEEE80211_PERM_ADDR(hw, sprom->et1mac);
3815423e3ce3SKalle Valo else
3816423e3ce3SKalle Valo SET_IEEE80211_PERM_ADDR(hw, sprom->il0mac);
3817423e3ce3SKalle Valo
3818ae44b502SAndrew Zaborowski wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST);
3819ae44b502SAndrew Zaborowski
3820423e3ce3SKalle Valo /* Get and initialize struct b43legacy_wl */
3821423e3ce3SKalle Valo wl = hw_to_b43legacy_wl(hw);
3822423e3ce3SKalle Valo memset(wl, 0, sizeof(*wl));
3823423e3ce3SKalle Valo wl->hw = hw;
3824423e3ce3SKalle Valo spin_lock_init(&wl->irq_lock);
3825423e3ce3SKalle Valo spin_lock_init(&wl->leds_lock);
3826423e3ce3SKalle Valo mutex_init(&wl->mutex);
3827423e3ce3SKalle Valo INIT_LIST_HEAD(&wl->devlist);
3828423e3ce3SKalle Valo INIT_WORK(&wl->beacon_update_trigger, b43legacy_beacon_update_trigger_work);
3829423e3ce3SKalle Valo INIT_WORK(&wl->tx_work, b43legacy_tx_work);
3830423e3ce3SKalle Valo
3831423e3ce3SKalle Valo /* Initialize queues and flags. */
3832423e3ce3SKalle Valo for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
3833423e3ce3SKalle Valo skb_queue_head_init(&wl->tx_queue[queue_num]);
3834423e3ce3SKalle Valo wl->tx_queue_stopped[queue_num] = 0;
3835423e3ce3SKalle Valo }
3836423e3ce3SKalle Valo
3837423e3ce3SKalle Valo ssb_set_devtypedata(dev, wl);
3838423e3ce3SKalle Valo b43legacyinfo(wl, "Broadcom %04X WLAN found (core revision %u)\n",
3839423e3ce3SKalle Valo dev->bus->chip_id, dev->id.revision);
3840423e3ce3SKalle Valo err = 0;
3841423e3ce3SKalle Valo out:
3842423e3ce3SKalle Valo return err;
3843423e3ce3SKalle Valo }
3844423e3ce3SKalle Valo
b43legacy_probe(struct ssb_device * dev,const struct ssb_device_id * id)3845423e3ce3SKalle Valo static int b43legacy_probe(struct ssb_device *dev,
3846423e3ce3SKalle Valo const struct ssb_device_id *id)
3847423e3ce3SKalle Valo {
3848423e3ce3SKalle Valo struct b43legacy_wl *wl;
3849423e3ce3SKalle Valo int err;
3850423e3ce3SKalle Valo int first = 0;
3851423e3ce3SKalle Valo
3852423e3ce3SKalle Valo wl = ssb_get_devtypedata(dev);
3853423e3ce3SKalle Valo if (!wl) {
3854423e3ce3SKalle Valo /* Probing the first core - setup common struct b43legacy_wl */
3855423e3ce3SKalle Valo first = 1;
3856423e3ce3SKalle Valo err = b43legacy_wireless_init(dev);
3857423e3ce3SKalle Valo if (err)
3858423e3ce3SKalle Valo goto out;
3859423e3ce3SKalle Valo wl = ssb_get_devtypedata(dev);
3860423e3ce3SKalle Valo B43legacy_WARN_ON(!wl);
3861423e3ce3SKalle Valo }
3862423e3ce3SKalle Valo err = b43legacy_one_core_attach(dev, wl);
3863423e3ce3SKalle Valo if (err)
3864423e3ce3SKalle Valo goto err_wireless_exit;
3865423e3ce3SKalle Valo
3866423e3ce3SKalle Valo /* setup and start work to load firmware */
3867423e3ce3SKalle Valo INIT_WORK(&wl->firmware_load, b43legacy_request_firmware);
3868423e3ce3SKalle Valo schedule_work(&wl->firmware_load);
3869423e3ce3SKalle Valo
3870423e3ce3SKalle Valo out:
3871423e3ce3SKalle Valo return err;
3872423e3ce3SKalle Valo
3873423e3ce3SKalle Valo err_wireless_exit:
3874423e3ce3SKalle Valo if (first)
3875423e3ce3SKalle Valo b43legacy_wireless_exit(dev, wl);
3876423e3ce3SKalle Valo return err;
3877423e3ce3SKalle Valo }
3878423e3ce3SKalle Valo
b43legacy_remove(struct ssb_device * dev)3879423e3ce3SKalle Valo static void b43legacy_remove(struct ssb_device *dev)
3880423e3ce3SKalle Valo {
3881423e3ce3SKalle Valo struct b43legacy_wl *wl = ssb_get_devtypedata(dev);
3882423e3ce3SKalle Valo struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3883423e3ce3SKalle Valo
3884423e3ce3SKalle Valo /* We must cancel any work here before unregistering from ieee80211,
3885423e3ce3SKalle Valo * as the ieee80211 unreg will destroy the workqueue. */
3886423e3ce3SKalle Valo cancel_work_sync(&wldev->restart_work);
3887423e3ce3SKalle Valo cancel_work_sync(&wl->firmware_load);
3888423e3ce3SKalle Valo complete(&wldev->fw_load_complete);
3889423e3ce3SKalle Valo
3890423e3ce3SKalle Valo B43legacy_WARN_ON(!wl);
3891423e3ce3SKalle Valo if (!wldev->fw.ucode)
3892423e3ce3SKalle Valo return; /* NULL if fw never loaded */
3893423e3ce3SKalle Valo if (wl->current_dev == wldev)
3894423e3ce3SKalle Valo ieee80211_unregister_hw(wl->hw);
3895423e3ce3SKalle Valo
3896423e3ce3SKalle Valo b43legacy_one_core_detach(dev);
3897423e3ce3SKalle Valo
3898423e3ce3SKalle Valo if (list_empty(&wl->devlist))
3899423e3ce3SKalle Valo /* Last core on the chip unregistered.
3900423e3ce3SKalle Valo * We can destroy common struct b43legacy_wl.
3901423e3ce3SKalle Valo */
3902423e3ce3SKalle Valo b43legacy_wireless_exit(dev, wl);
3903423e3ce3SKalle Valo }
3904423e3ce3SKalle Valo
3905423e3ce3SKalle Valo /* Perform a hardware reset. This can be called from any context. */
b43legacy_controller_restart(struct b43legacy_wldev * dev,const char * reason)3906423e3ce3SKalle Valo void b43legacy_controller_restart(struct b43legacy_wldev *dev,
3907423e3ce3SKalle Valo const char *reason)
3908423e3ce3SKalle Valo {
3909423e3ce3SKalle Valo /* Must avoid requeueing, if we are in shutdown. */
3910423e3ce3SKalle Valo if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED)
3911423e3ce3SKalle Valo return;
3912423e3ce3SKalle Valo b43legacyinfo(dev->wl, "Controller RESET (%s) ...\n", reason);
3913423e3ce3SKalle Valo ieee80211_queue_work(dev->wl->hw, &dev->restart_work);
3914423e3ce3SKalle Valo }
3915423e3ce3SKalle Valo
3916423e3ce3SKalle Valo #ifdef CONFIG_PM
3917423e3ce3SKalle Valo
b43legacy_suspend(struct ssb_device * dev,pm_message_t state)3918423e3ce3SKalle Valo static int b43legacy_suspend(struct ssb_device *dev, pm_message_t state)
3919423e3ce3SKalle Valo {
3920423e3ce3SKalle Valo struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3921423e3ce3SKalle Valo struct b43legacy_wl *wl = wldev->wl;
3922423e3ce3SKalle Valo
3923423e3ce3SKalle Valo b43legacydbg(wl, "Suspending...\n");
3924423e3ce3SKalle Valo
3925423e3ce3SKalle Valo mutex_lock(&wl->mutex);
3926423e3ce3SKalle Valo wldev->suspend_init_status = b43legacy_status(wldev);
3927423e3ce3SKalle Valo if (wldev->suspend_init_status >= B43legacy_STAT_STARTED)
3928423e3ce3SKalle Valo b43legacy_wireless_core_stop(wldev);
3929423e3ce3SKalle Valo if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED)
3930423e3ce3SKalle Valo b43legacy_wireless_core_exit(wldev);
3931423e3ce3SKalle Valo mutex_unlock(&wl->mutex);
3932423e3ce3SKalle Valo
3933423e3ce3SKalle Valo b43legacydbg(wl, "Device suspended.\n");
3934423e3ce3SKalle Valo
3935423e3ce3SKalle Valo return 0;
3936423e3ce3SKalle Valo }
3937423e3ce3SKalle Valo
b43legacy_resume(struct ssb_device * dev)3938423e3ce3SKalle Valo static int b43legacy_resume(struct ssb_device *dev)
3939423e3ce3SKalle Valo {
3940423e3ce3SKalle Valo struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3941423e3ce3SKalle Valo struct b43legacy_wl *wl = wldev->wl;
3942423e3ce3SKalle Valo int err = 0;
3943423e3ce3SKalle Valo
3944423e3ce3SKalle Valo b43legacydbg(wl, "Resuming...\n");
3945423e3ce3SKalle Valo
3946423e3ce3SKalle Valo mutex_lock(&wl->mutex);
3947423e3ce3SKalle Valo if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) {
3948423e3ce3SKalle Valo err = b43legacy_wireless_core_init(wldev);
3949423e3ce3SKalle Valo if (err) {
3950423e3ce3SKalle Valo b43legacyerr(wl, "Resume failed at core init\n");
3951423e3ce3SKalle Valo goto out;
3952423e3ce3SKalle Valo }
3953423e3ce3SKalle Valo }
3954423e3ce3SKalle Valo if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) {
3955423e3ce3SKalle Valo err = b43legacy_wireless_core_start(wldev);
3956423e3ce3SKalle Valo if (err) {
3957423e3ce3SKalle Valo b43legacy_wireless_core_exit(wldev);
3958423e3ce3SKalle Valo b43legacyerr(wl, "Resume failed at core start\n");
3959423e3ce3SKalle Valo goto out;
3960423e3ce3SKalle Valo }
3961423e3ce3SKalle Valo }
3962423e3ce3SKalle Valo
3963423e3ce3SKalle Valo b43legacydbg(wl, "Device resumed.\n");
3964423e3ce3SKalle Valo out:
3965423e3ce3SKalle Valo mutex_unlock(&wl->mutex);
3966423e3ce3SKalle Valo return err;
3967423e3ce3SKalle Valo }
3968423e3ce3SKalle Valo
3969423e3ce3SKalle Valo #else /* CONFIG_PM */
3970423e3ce3SKalle Valo # define b43legacy_suspend NULL
3971423e3ce3SKalle Valo # define b43legacy_resume NULL
3972423e3ce3SKalle Valo #endif /* CONFIG_PM */
3973423e3ce3SKalle Valo
3974423e3ce3SKalle Valo static struct ssb_driver b43legacy_ssb_driver = {
3975423e3ce3SKalle Valo .name = KBUILD_MODNAME,
3976423e3ce3SKalle Valo .id_table = b43legacy_ssb_tbl,
3977423e3ce3SKalle Valo .probe = b43legacy_probe,
3978423e3ce3SKalle Valo .remove = b43legacy_remove,
3979423e3ce3SKalle Valo .suspend = b43legacy_suspend,
3980423e3ce3SKalle Valo .resume = b43legacy_resume,
3981423e3ce3SKalle Valo };
3982423e3ce3SKalle Valo
b43legacy_print_driverinfo(void)3983423e3ce3SKalle Valo static void b43legacy_print_driverinfo(void)
3984423e3ce3SKalle Valo {
3985423e3ce3SKalle Valo const char *feat_pci = "", *feat_leds = "",
3986423e3ce3SKalle Valo *feat_pio = "", *feat_dma = "";
3987423e3ce3SKalle Valo
3988423e3ce3SKalle Valo #ifdef CONFIG_B43LEGACY_PCI_AUTOSELECT
3989423e3ce3SKalle Valo feat_pci = "P";
3990423e3ce3SKalle Valo #endif
3991423e3ce3SKalle Valo #ifdef CONFIG_B43LEGACY_LEDS
3992423e3ce3SKalle Valo feat_leds = "L";
3993423e3ce3SKalle Valo #endif
3994423e3ce3SKalle Valo #ifdef CONFIG_B43LEGACY_PIO
3995423e3ce3SKalle Valo feat_pio = "I";
3996423e3ce3SKalle Valo #endif
3997423e3ce3SKalle Valo #ifdef CONFIG_B43LEGACY_DMA
3998423e3ce3SKalle Valo feat_dma = "D";
3999423e3ce3SKalle Valo #endif
4000423e3ce3SKalle Valo printk(KERN_INFO "Broadcom 43xx-legacy driver loaded "
4001423e3ce3SKalle Valo "[ Features: %s%s%s%s ]\n",
4002423e3ce3SKalle Valo feat_pci, feat_leds, feat_pio, feat_dma);
4003423e3ce3SKalle Valo }
4004423e3ce3SKalle Valo
b43legacy_init(void)4005423e3ce3SKalle Valo static int __init b43legacy_init(void)
4006423e3ce3SKalle Valo {
4007423e3ce3SKalle Valo int err;
4008423e3ce3SKalle Valo
4009423e3ce3SKalle Valo b43legacy_debugfs_init();
4010423e3ce3SKalle Valo
4011423e3ce3SKalle Valo err = ssb_driver_register(&b43legacy_ssb_driver);
4012423e3ce3SKalle Valo if (err)
4013423e3ce3SKalle Valo goto err_dfs_exit;
4014423e3ce3SKalle Valo
4015423e3ce3SKalle Valo b43legacy_print_driverinfo();
4016423e3ce3SKalle Valo
4017423e3ce3SKalle Valo return err;
4018423e3ce3SKalle Valo
4019423e3ce3SKalle Valo err_dfs_exit:
4020423e3ce3SKalle Valo b43legacy_debugfs_exit();
4021423e3ce3SKalle Valo return err;
4022423e3ce3SKalle Valo }
4023423e3ce3SKalle Valo
b43legacy_exit(void)4024423e3ce3SKalle Valo static void __exit b43legacy_exit(void)
4025423e3ce3SKalle Valo {
4026423e3ce3SKalle Valo ssb_driver_unregister(&b43legacy_ssb_driver);
4027423e3ce3SKalle Valo b43legacy_debugfs_exit();
4028423e3ce3SKalle Valo }
4029423e3ce3SKalle Valo
4030423e3ce3SKalle Valo module_init(b43legacy_init)
4031423e3ce3SKalle Valo module_exit(b43legacy_exit)
4032