1*c942fddfSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
258619b14SKalle Valo /*
358619b14SKalle Valo * Broadcom B43 wireless driver
458619b14SKalle Valo * PPR (Power Per Rate) management
558619b14SKalle Valo *
658619b14SKalle Valo * Copyright (c) 2014 Rafał Miłecki <zajec5@gmail.com>
758619b14SKalle Valo */
858619b14SKalle Valo
958619b14SKalle Valo #include "ppr.h"
1058619b14SKalle Valo #include "b43.h"
1158619b14SKalle Valo
1258619b14SKalle Valo #define ppr_for_each_entry(ppr, i, entry) \
1358619b14SKalle Valo for (i = 0, entry = &(ppr)->__all_rates[i]; \
1458619b14SKalle Valo i < B43_PPR_RATES_NUM; \
1558619b14SKalle Valo i++, entry++)
1658619b14SKalle Valo
b43_ppr_clear(struct b43_wldev * dev,struct b43_ppr * ppr)1758619b14SKalle Valo void b43_ppr_clear(struct b43_wldev *dev, struct b43_ppr *ppr)
1858619b14SKalle Valo {
1958619b14SKalle Valo memset(ppr, 0, sizeof(*ppr));
2058619b14SKalle Valo
2158619b14SKalle Valo /* Compile-time PPR check */
2258619b14SKalle Valo BUILD_BUG_ON(sizeof(struct b43_ppr) != B43_PPR_RATES_NUM * sizeof(u8));
2358619b14SKalle Valo }
2458619b14SKalle Valo
b43_ppr_add(struct b43_wldev * dev,struct b43_ppr * ppr,int diff)2558619b14SKalle Valo void b43_ppr_add(struct b43_wldev *dev, struct b43_ppr *ppr, int diff)
2658619b14SKalle Valo {
2758619b14SKalle Valo int i;
2858619b14SKalle Valo u8 *rate;
2958619b14SKalle Valo
3058619b14SKalle Valo ppr_for_each_entry(ppr, i, rate) {
3158619b14SKalle Valo *rate = clamp_val(*rate + diff, 0, 127);
3258619b14SKalle Valo }
3358619b14SKalle Valo }
3458619b14SKalle Valo
b43_ppr_apply_max(struct b43_wldev * dev,struct b43_ppr * ppr,u8 max)3558619b14SKalle Valo void b43_ppr_apply_max(struct b43_wldev *dev, struct b43_ppr *ppr, u8 max)
3658619b14SKalle Valo {
3758619b14SKalle Valo int i;
3858619b14SKalle Valo u8 *rate;
3958619b14SKalle Valo
4058619b14SKalle Valo ppr_for_each_entry(ppr, i, rate) {
4158619b14SKalle Valo *rate = min(*rate, max);
4258619b14SKalle Valo }
4358619b14SKalle Valo }
4458619b14SKalle Valo
b43_ppr_apply_min(struct b43_wldev * dev,struct b43_ppr * ppr,u8 min)4558619b14SKalle Valo void b43_ppr_apply_min(struct b43_wldev *dev, struct b43_ppr *ppr, u8 min)
4658619b14SKalle Valo {
4758619b14SKalle Valo int i;
4858619b14SKalle Valo u8 *rate;
4958619b14SKalle Valo
5058619b14SKalle Valo ppr_for_each_entry(ppr, i, rate) {
5158619b14SKalle Valo *rate = max(*rate, min);
5258619b14SKalle Valo }
5358619b14SKalle Valo }
5458619b14SKalle Valo
b43_ppr_get_max(struct b43_wldev * dev,struct b43_ppr * ppr)5558619b14SKalle Valo u8 b43_ppr_get_max(struct b43_wldev *dev, struct b43_ppr *ppr)
5658619b14SKalle Valo {
5758619b14SKalle Valo u8 res = 0;
5858619b14SKalle Valo int i;
5958619b14SKalle Valo u8 *rate;
6058619b14SKalle Valo
6158619b14SKalle Valo ppr_for_each_entry(ppr, i, rate) {
6258619b14SKalle Valo res = max(*rate, res);
6358619b14SKalle Valo }
6458619b14SKalle Valo
6558619b14SKalle Valo return res;
6658619b14SKalle Valo }
6758619b14SKalle Valo
b43_ppr_load_max_from_sprom(struct b43_wldev * dev,struct b43_ppr * ppr,enum b43_band band)6858619b14SKalle Valo bool b43_ppr_load_max_from_sprom(struct b43_wldev *dev, struct b43_ppr *ppr,
6958619b14SKalle Valo enum b43_band band)
7058619b14SKalle Valo {
7158619b14SKalle Valo struct b43_ppr_rates *rates = &ppr->rates;
7258619b14SKalle Valo struct ssb_sprom *sprom = dev->dev->bus_sprom;
7358619b14SKalle Valo struct b43_phy *phy = &dev->phy;
7458619b14SKalle Valo u8 maxpwr, off;
7558619b14SKalle Valo u32 sprom_ofdm_po;
7658619b14SKalle Valo u16 *sprom_mcs_po;
7758619b14SKalle Valo u8 extra_cdd_po, extra_stbc_po;
7858619b14SKalle Valo int i;
7958619b14SKalle Valo
8058619b14SKalle Valo switch (band) {
8158619b14SKalle Valo case B43_BAND_2G:
8258619b14SKalle Valo maxpwr = min(sprom->core_pwr_info[0].maxpwr_2g,
8358619b14SKalle Valo sprom->core_pwr_info[1].maxpwr_2g);
8458619b14SKalle Valo sprom_ofdm_po = sprom->ofdm2gpo;
8558619b14SKalle Valo sprom_mcs_po = sprom->mcs2gpo;
8658619b14SKalle Valo extra_cdd_po = (sprom->cddpo >> 0) & 0xf;
8758619b14SKalle Valo extra_stbc_po = (sprom->stbcpo >> 0) & 0xf;
8858619b14SKalle Valo break;
8958619b14SKalle Valo case B43_BAND_5G_LO:
9058619b14SKalle Valo maxpwr = min(sprom->core_pwr_info[0].maxpwr_5gl,
9158619b14SKalle Valo sprom->core_pwr_info[1].maxpwr_5gl);
9258619b14SKalle Valo sprom_ofdm_po = sprom->ofdm5glpo;
9358619b14SKalle Valo sprom_mcs_po = sprom->mcs5glpo;
9458619b14SKalle Valo extra_cdd_po = (sprom->cddpo >> 8) & 0xf;
9558619b14SKalle Valo extra_stbc_po = (sprom->stbcpo >> 8) & 0xf;
9658619b14SKalle Valo break;
9758619b14SKalle Valo case B43_BAND_5G_MI:
9858619b14SKalle Valo maxpwr = min(sprom->core_pwr_info[0].maxpwr_5g,
9958619b14SKalle Valo sprom->core_pwr_info[1].maxpwr_5g);
10058619b14SKalle Valo sprom_ofdm_po = sprom->ofdm5gpo;
10158619b14SKalle Valo sprom_mcs_po = sprom->mcs5gpo;
10258619b14SKalle Valo extra_cdd_po = (sprom->cddpo >> 4) & 0xf;
10358619b14SKalle Valo extra_stbc_po = (sprom->stbcpo >> 4) & 0xf;
10458619b14SKalle Valo break;
10558619b14SKalle Valo case B43_BAND_5G_HI:
10658619b14SKalle Valo maxpwr = min(sprom->core_pwr_info[0].maxpwr_5gh,
10758619b14SKalle Valo sprom->core_pwr_info[1].maxpwr_5gh);
10858619b14SKalle Valo sprom_ofdm_po = sprom->ofdm5ghpo;
10958619b14SKalle Valo sprom_mcs_po = sprom->mcs5ghpo;
11058619b14SKalle Valo extra_cdd_po = (sprom->cddpo >> 12) & 0xf;
11158619b14SKalle Valo extra_stbc_po = (sprom->stbcpo >> 12) & 0xf;
11258619b14SKalle Valo break;
11358619b14SKalle Valo default:
11458619b14SKalle Valo WARN_ON_ONCE(1);
11558619b14SKalle Valo return false;
11658619b14SKalle Valo }
11758619b14SKalle Valo
11858619b14SKalle Valo if (band == B43_BAND_2G) {
11958619b14SKalle Valo for (i = 0; i < 4; i++) {
12058619b14SKalle Valo off = ((sprom->cck2gpo >> (i * 4)) & 0xf) * 2;
12158619b14SKalle Valo rates->cck[i] = maxpwr - off;
12258619b14SKalle Valo }
12358619b14SKalle Valo }
12458619b14SKalle Valo
12558619b14SKalle Valo /* OFDM */
12658619b14SKalle Valo for (i = 0; i < 8; i++) {
12758619b14SKalle Valo off = ((sprom_ofdm_po >> (i * 4)) & 0xf) * 2;
12858619b14SKalle Valo rates->ofdm[i] = maxpwr - off;
12958619b14SKalle Valo }
13058619b14SKalle Valo
13158619b14SKalle Valo /* MCS 20 SISO */
13258619b14SKalle Valo rates->mcs_20[0] = rates->ofdm[0];
13358619b14SKalle Valo rates->mcs_20[1] = rates->ofdm[2];
13458619b14SKalle Valo rates->mcs_20[2] = rates->ofdm[3];
13558619b14SKalle Valo rates->mcs_20[3] = rates->ofdm[4];
13658619b14SKalle Valo rates->mcs_20[4] = rates->ofdm[5];
13758619b14SKalle Valo rates->mcs_20[5] = rates->ofdm[6];
13858619b14SKalle Valo rates->mcs_20[6] = rates->ofdm[7];
13958619b14SKalle Valo rates->mcs_20[7] = rates->ofdm[7];
14058619b14SKalle Valo
14158619b14SKalle Valo /* MCS 20 CDD */
14258619b14SKalle Valo for (i = 0; i < 4; i++) {
14358619b14SKalle Valo off = ((sprom_mcs_po[0] >> (i * 4)) & 0xf) * 2;
14458619b14SKalle Valo rates->mcs_20_cdd[i] = maxpwr - off;
14558619b14SKalle Valo if (phy->type == B43_PHYTYPE_N && phy->rev >= 3)
14658619b14SKalle Valo rates->mcs_20_cdd[i] -= extra_cdd_po;
14758619b14SKalle Valo }
14858619b14SKalle Valo for (i = 0; i < 4; i++) {
14958619b14SKalle Valo off = ((sprom_mcs_po[1] >> (i * 4)) & 0xf) * 2;
15058619b14SKalle Valo rates->mcs_20_cdd[4 + i] = maxpwr - off;
15158619b14SKalle Valo if (phy->type == B43_PHYTYPE_N && phy->rev >= 3)
15258619b14SKalle Valo rates->mcs_20_cdd[4 + i] -= extra_cdd_po;
15358619b14SKalle Valo }
15458619b14SKalle Valo
15558619b14SKalle Valo /* OFDM 20 CDD */
15658619b14SKalle Valo rates->ofdm_20_cdd[0] = rates->mcs_20_cdd[0];
15758619b14SKalle Valo rates->ofdm_20_cdd[1] = rates->mcs_20_cdd[0];
15858619b14SKalle Valo rates->ofdm_20_cdd[2] = rates->mcs_20_cdd[1];
15958619b14SKalle Valo rates->ofdm_20_cdd[3] = rates->mcs_20_cdd[2];
16058619b14SKalle Valo rates->ofdm_20_cdd[4] = rates->mcs_20_cdd[3];
16158619b14SKalle Valo rates->ofdm_20_cdd[5] = rates->mcs_20_cdd[4];
16258619b14SKalle Valo rates->ofdm_20_cdd[6] = rates->mcs_20_cdd[5];
16358619b14SKalle Valo rates->ofdm_20_cdd[7] = rates->mcs_20_cdd[6];
16458619b14SKalle Valo
16558619b14SKalle Valo /* MCS 20 STBC */
16658619b14SKalle Valo for (i = 0; i < 4; i++) {
16758619b14SKalle Valo off = ((sprom_mcs_po[0] >> (i * 4)) & 0xf) * 2;
16858619b14SKalle Valo rates->mcs_20_stbc[i] = maxpwr - off;
16958619b14SKalle Valo if (phy->type == B43_PHYTYPE_N && phy->rev >= 3)
17058619b14SKalle Valo rates->mcs_20_stbc[i] -= extra_stbc_po;
17158619b14SKalle Valo }
17258619b14SKalle Valo for (i = 0; i < 4; i++) {
17358619b14SKalle Valo off = ((sprom_mcs_po[1] >> (i * 4)) & 0xf) * 2;
17458619b14SKalle Valo rates->mcs_20_stbc[4 + i] = maxpwr - off;
17558619b14SKalle Valo if (phy->type == B43_PHYTYPE_N && phy->rev >= 3)
17658619b14SKalle Valo rates->mcs_20_stbc[4 + i] -= extra_stbc_po;
17758619b14SKalle Valo }
17858619b14SKalle Valo
17958619b14SKalle Valo /* MCS 20 SDM */
18058619b14SKalle Valo for (i = 0; i < 4; i++) {
18158619b14SKalle Valo off = ((sprom_mcs_po[2] >> (i * 4)) & 0xf) * 2;
18258619b14SKalle Valo rates->mcs_20_sdm[i] = maxpwr - off;
18358619b14SKalle Valo }
18458619b14SKalle Valo for (i = 0; i < 4; i++) {
18558619b14SKalle Valo off = ((sprom_mcs_po[3] >> (i * 4)) & 0xf) * 2;
18658619b14SKalle Valo rates->mcs_20_sdm[4 + i] = maxpwr - off;
18758619b14SKalle Valo }
18858619b14SKalle Valo
18958619b14SKalle Valo return true;
19058619b14SKalle Valo }
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