xref: /openbmc/linux/drivers/net/wireless/ath/ath9k/recv.c (revision cc861f7468724e66567baf087b4e413e91b18150)
1 /*
2  * Copyright (c) 2008-2009 Atheros Communications Inc.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 #include "ath9k.h"
18 
19 static struct ieee80211_hw * ath_get_virt_hw(struct ath_softc *sc,
20 					     struct ieee80211_hdr *hdr)
21 {
22 	struct ieee80211_hw *hw = sc->pri_wiphy->hw;
23 	int i;
24 
25 	spin_lock_bh(&sc->wiphy_lock);
26 	for (i = 0; i < sc->num_sec_wiphy; i++) {
27 		struct ath_wiphy *aphy = sc->sec_wiphy[i];
28 		if (aphy == NULL)
29 			continue;
30 		if (compare_ether_addr(hdr->addr1, aphy->hw->wiphy->perm_addr)
31 		    == 0) {
32 			hw = aphy->hw;
33 			break;
34 		}
35 	}
36 	spin_unlock_bh(&sc->wiphy_lock);
37 	return hw;
38 }
39 
40 /*
41  * Setup and link descriptors.
42  *
43  * 11N: we can no longer afford to self link the last descriptor.
44  * MAC acknowledges BA status as long as it copies frames to host
45  * buffer (or rx fifo). This can incorrectly acknowledge packets
46  * to a sender if last desc is self-linked.
47  */
48 static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf)
49 {
50 	struct ath_hw *ah = sc->sc_ah;
51 	struct ath_common *common = ath9k_hw_common(ah);
52 	struct ath_desc *ds;
53 	struct sk_buff *skb;
54 
55 	ATH_RXBUF_RESET(bf);
56 
57 	ds = bf->bf_desc;
58 	ds->ds_link = 0; /* link to null */
59 	ds->ds_data = bf->bf_buf_addr;
60 
61 	/* virtual addr of the beginning of the buffer. */
62 	skb = bf->bf_mpdu;
63 	BUG_ON(skb == NULL);
64 	ds->ds_vdata = skb->data;
65 
66 	/*
67 	 * setup rx descriptors. The rx_bufsize here tells the hardware
68 	 * how much data it can DMA to us and that we are prepared
69 	 * to process
70 	 */
71 	ath9k_hw_setuprxdesc(ah, ds,
72 			     common->rx_bufsize,
73 			     0);
74 
75 	if (sc->rx.rxlink == NULL)
76 		ath9k_hw_putrxbuf(ah, bf->bf_daddr);
77 	else
78 		*sc->rx.rxlink = bf->bf_daddr;
79 
80 	sc->rx.rxlink = &ds->ds_link;
81 	ath9k_hw_rxena(ah);
82 }
83 
84 static void ath_setdefantenna(struct ath_softc *sc, u32 antenna)
85 {
86 	/* XXX block beacon interrupts */
87 	ath9k_hw_setantenna(sc->sc_ah, antenna);
88 	sc->rx.defant = antenna;
89 	sc->rx.rxotherant = 0;
90 }
91 
92 /* Assumes you've already done the endian to CPU conversion */
93 static bool ath9k_rx_accept(struct ath_common *common,
94 			    struct sk_buff *skb,
95 			    struct ieee80211_rx_status *rxs,
96 			    struct ath_rx_status *rx_stats,
97 			    bool *decrypt_error)
98 {
99 	struct ath_hw *ah = common->ah;
100 	struct ieee80211_hdr *hdr;
101 	__le16 fc;
102 
103 	hdr = (struct ieee80211_hdr *) skb->data;
104 	fc = hdr->frame_control;
105 
106 	if (!rx_stats->rs_datalen)
107 		return false;
108 
109 	if (rx_stats->rs_more) {
110 		/*
111 		 * Frame spans multiple descriptors; this cannot happen yet
112 		 * as we don't support jumbograms. If not in monitor mode,
113 		 * discard the frame. Enable this if you want to see
114 		 * error frames in Monitor mode.
115 		 */
116 		if (ah->opmode != NL80211_IFTYPE_MONITOR)
117 			return false;
118 	} else if (rx_stats->rs_status != 0) {
119 		if (rx_stats->rs_status & ATH9K_RXERR_CRC)
120 			rxs->flag |= RX_FLAG_FAILED_FCS_CRC;
121 		if (rx_stats->rs_status & ATH9K_RXERR_PHY)
122 			return false;
123 
124 		if (rx_stats->rs_status & ATH9K_RXERR_DECRYPT) {
125 			*decrypt_error = true;
126 		} else if (rx_stats->rs_status & ATH9K_RXERR_MIC) {
127 			if (ieee80211_is_ctl(fc))
128 				/*
129 				 * Sometimes, we get invalid
130 				 * MIC failures on valid control frames.
131 				 * Remove these mic errors.
132 				 */
133 				rx_stats->rs_status &= ~ATH9K_RXERR_MIC;
134 			else
135 				rxs->flag |= RX_FLAG_MMIC_ERROR;
136 		}
137 		/*
138 		 * Reject error frames with the exception of
139 		 * decryption and MIC failures. For monitor mode,
140 		 * we also ignore the CRC error.
141 		 */
142 		if (ah->opmode == NL80211_IFTYPE_MONITOR) {
143 			if (rx_stats->rs_status &
144 			    ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
145 			      ATH9K_RXERR_CRC))
146 				return false;
147 		} else {
148 			if (rx_stats->rs_status &
149 			    ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) {
150 				return false;
151 			}
152 		}
153 	}
154 	return true;
155 }
156 
157 static u8 ath9k_process_rate(struct ath_common *common,
158 			     struct ieee80211_hw *hw,
159 			     struct ath_rx_status *rx_stats,
160 			     struct ieee80211_rx_status *rxs,
161 			     struct sk_buff *skb)
162 {
163 	struct ieee80211_supported_band *sband;
164 	enum ieee80211_band band;
165 	unsigned int i = 0;
166 
167 	band = hw->conf.channel->band;
168 	sband = hw->wiphy->bands[band];
169 
170 	if (rx_stats->rs_rate & 0x80) {
171 		/* HT rate */
172 		rxs->flag |= RX_FLAG_HT;
173 		if (rx_stats->rs_flags & ATH9K_RX_2040)
174 			rxs->flag |= RX_FLAG_40MHZ;
175 		if (rx_stats->rs_flags & ATH9K_RX_GI)
176 			rxs->flag |= RX_FLAG_SHORT_GI;
177 		return rx_stats->rs_rate & 0x7f;
178 	}
179 
180 	for (i = 0; i < sband->n_bitrates; i++) {
181 		if (sband->bitrates[i].hw_value == rx_stats->rs_rate)
182 			return i;
183 		if (sband->bitrates[i].hw_value_short == rx_stats->rs_rate) {
184 			rxs->flag |= RX_FLAG_SHORTPRE;
185 			return i;
186 		}
187 	}
188 
189 	/* No valid hardware bitrate found -- we should not get here */
190 	ath_print(common, ATH_DBG_XMIT, "unsupported hw bitrate detected "
191 		  "0x%02x using 1 Mbit\n", rx_stats->rs_rate);
192 	if ((common->debug_mask & ATH_DBG_XMIT))
193 		print_hex_dump_bytes("", DUMP_PREFIX_NONE, skb->data, skb->len);
194 
195         return 0;
196 }
197 
198 /*
199  * Theory for reporting quality:
200  *
201  * At a hardware RSSI of 45 you will be able to use MCS 7  reliably.
202  * At a hardware RSSI of 45 you will be able to use MCS 15 reliably.
203  * At a hardware RSSI of 35 you should be able use 54 Mbps reliably.
204  *
205  * MCS 7  is the highets MCS index usable by a 1-stream device.
206  * MCS 15 is the highest MCS index usable by a 2-stream device.
207  *
208  * All ath9k devices are either 1-stream or 2-stream.
209  *
210  * How many bars you see is derived from the qual reporting.
211  *
212  * A more elaborate scheme can be used here but it requires tables
213  * of SNR/throughput for each possible mode used. For the MCS table
214  * you can refer to the wireless wiki:
215  *
216  * http://wireless.kernel.org/en/developers/Documentation/ieee80211/802.11n
217  *
218  */
219 static int ath9k_compute_qual(struct ieee80211_hw *hw,
220 			      struct ath_rx_status *rx_stats)
221 {
222 	int qual;
223 
224 	if (conf_is_ht(&hw->conf))
225 		qual =  rx_stats->rs_rssi * 100 / 45;
226 	else
227 		qual =  rx_stats->rs_rssi * 100 / 35;
228 
229 	/*
230 	 * rssi can be more than 45 though, anything above that
231 	 * should be considered at 100%
232 	 */
233 	if (qual > 100)
234 		qual = 100;
235 
236 	return qual;
237 }
238 
239 static void ath9k_process_rssi(struct ath_common *common,
240 			       struct ieee80211_hw *hw,
241 			       struct sk_buff *skb,
242 			       struct ath_rx_status *rx_stats)
243 {
244 	struct ath_hw *ah = common->ah;
245 	struct ieee80211_sta *sta;
246 	struct ieee80211_hdr *hdr;
247 	struct ath_node *an;
248 	int last_rssi = ATH_RSSI_DUMMY_MARKER;
249 	__le16 fc;
250 
251 	hdr = (struct ieee80211_hdr *)skb->data;
252 	fc = hdr->frame_control;
253 
254 	rcu_read_lock();
255 	/* XXX: use ieee80211_find_sta! */
256 	sta = ieee80211_find_sta_by_hw(hw, hdr->addr2);
257 	if (sta) {
258 		an = (struct ath_node *) sta->drv_priv;
259 		if (rx_stats->rs_rssi != ATH9K_RSSI_BAD &&
260 		   !rx_stats->rs_moreaggr)
261 			ATH_RSSI_LPF(an->last_rssi, rx_stats->rs_rssi);
262 		last_rssi = an->last_rssi;
263 	}
264 	rcu_read_unlock();
265 
266 	if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER))
267 		rx_stats->rs_rssi = ATH_EP_RND(last_rssi,
268 					      ATH_RSSI_EP_MULTIPLIER);
269 	if (rx_stats->rs_rssi < 0)
270 		rx_stats->rs_rssi = 0;
271 	else if (rx_stats->rs_rssi > 127)
272 		rx_stats->rs_rssi = 127;
273 
274 	/* Update Beacon RSSI, this is used by ANI. */
275 	if (ieee80211_is_beacon(fc))
276 		ah->stats.avgbrssi = rx_stats->rs_rssi;
277 }
278 
279 /*
280  * For Decrypt or Demic errors, we only mark packet status here and always push
281  * up the frame up to let mac80211 handle the actual error case, be it no
282  * decryption key or real decryption error. This let us keep statistics there.
283  */
284 static int ath_rx_prepare(struct ath_common *common,
285 			  struct ieee80211_hw *hw,
286 			  struct sk_buff *skb, struct ath_rx_status *rx_stats,
287 			  struct ieee80211_rx_status *rx_status,
288 			  bool *decrypt_error)
289 {
290 	struct ath_hw *ah = common->ah;
291 
292 	if (!ath9k_rx_accept(common, skb, rx_status, rx_stats, decrypt_error))
293 		goto rx_next;
294 
295 	ath9k_process_rssi(common, hw, skb, rx_stats);
296 
297 	rx_status->rate_idx = ath9k_process_rate(common, hw,
298 						 rx_stats, rx_status, skb);
299 	rx_status->mactime = ath9k_hw_extend_tsf(ah, rx_stats->rs_tstamp);
300 	rx_status->band = hw->conf.channel->band;
301 	rx_status->freq = hw->conf.channel->center_freq;
302 	rx_status->noise = common->ani.noise_floor;
303 	rx_status->signal = ATH_DEFAULT_NOISE_FLOOR + rx_stats->rs_rssi;
304 	rx_status->antenna = rx_stats->rs_antenna;
305 	rx_status->qual = ath9k_compute_qual(hw, rx_stats);
306 	rx_status->flag |= RX_FLAG_TSFT;
307 
308 	return 1;
309 rx_next:
310 	return 0;
311 }
312 
313 static void ath_opmode_init(struct ath_softc *sc)
314 {
315 	struct ath_hw *ah = sc->sc_ah;
316 	struct ath_common *common = ath9k_hw_common(ah);
317 
318 	u32 rfilt, mfilt[2];
319 
320 	/* configure rx filter */
321 	rfilt = ath_calcrxfilter(sc);
322 	ath9k_hw_setrxfilter(ah, rfilt);
323 
324 	/* configure bssid mask */
325 	if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
326 		ath_hw_setbssidmask(common);
327 
328 	/* configure operational mode */
329 	ath9k_hw_setopmode(ah);
330 
331 	/* Handle any link-level address change. */
332 	ath9k_hw_setmac(ah, common->macaddr);
333 
334 	/* calculate and install multicast filter */
335 	mfilt[0] = mfilt[1] = ~0;
336 	ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]);
337 }
338 
339 int ath_rx_init(struct ath_softc *sc, int nbufs)
340 {
341 	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
342 	struct sk_buff *skb;
343 	struct ath_buf *bf;
344 	int error = 0;
345 
346 	spin_lock_init(&sc->rx.rxflushlock);
347 	sc->sc_flags &= ~SC_OP_RXFLUSH;
348 	spin_lock_init(&sc->rx.rxbuflock);
349 
350 	common->rx_bufsize = roundup(IEEE80211_MAX_MPDU_LEN,
351 				     min(common->cachelsz, (u16)64));
352 
353 	ath_print(common, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n",
354 		  common->cachelsz, common->rx_bufsize);
355 
356 	/* Initialize rx descriptors */
357 
358 	error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf,
359 				  "rx", nbufs, 1);
360 	if (error != 0) {
361 		ath_print(common, ATH_DBG_FATAL,
362 			  "failed to allocate rx descriptors: %d\n", error);
363 		goto err;
364 	}
365 
366 	list_for_each_entry(bf, &sc->rx.rxbuf, list) {
367 		skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_KERNEL);
368 		if (skb == NULL) {
369 			error = -ENOMEM;
370 			goto err;
371 		}
372 
373 		bf->bf_mpdu = skb;
374 		bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
375 						 common->rx_bufsize,
376 						 DMA_FROM_DEVICE);
377 		if (unlikely(dma_mapping_error(sc->dev,
378 					       bf->bf_buf_addr))) {
379 			dev_kfree_skb_any(skb);
380 			bf->bf_mpdu = NULL;
381 			ath_print(common, ATH_DBG_FATAL,
382 				  "dma_mapping_error() on RX init\n");
383 			error = -ENOMEM;
384 			goto err;
385 		}
386 		bf->bf_dmacontext = bf->bf_buf_addr;
387 	}
388 	sc->rx.rxlink = NULL;
389 
390 err:
391 	if (error)
392 		ath_rx_cleanup(sc);
393 
394 	return error;
395 }
396 
397 void ath_rx_cleanup(struct ath_softc *sc)
398 {
399 	struct ath_hw *ah = sc->sc_ah;
400 	struct ath_common *common = ath9k_hw_common(ah);
401 	struct sk_buff *skb;
402 	struct ath_buf *bf;
403 
404 	list_for_each_entry(bf, &sc->rx.rxbuf, list) {
405 		skb = bf->bf_mpdu;
406 		if (skb) {
407 			dma_unmap_single(sc->dev, bf->bf_buf_addr,
408 					 common->rx_bufsize, DMA_FROM_DEVICE);
409 			dev_kfree_skb(skb);
410 		}
411 	}
412 
413 	if (sc->rx.rxdma.dd_desc_len != 0)
414 		ath_descdma_cleanup(sc, &sc->rx.rxdma, &sc->rx.rxbuf);
415 }
416 
417 /*
418  * Calculate the receive filter according to the
419  * operating mode and state:
420  *
421  * o always accept unicast, broadcast, and multicast traffic
422  * o maintain current state of phy error reception (the hal
423  *   may enable phy error frames for noise immunity work)
424  * o probe request frames are accepted only when operating in
425  *   hostap, adhoc, or monitor modes
426  * o enable promiscuous mode according to the interface state
427  * o accept beacons:
428  *   - when operating in adhoc mode so the 802.11 layer creates
429  *     node table entries for peers,
430  *   - when operating in station mode for collecting rssi data when
431  *     the station is otherwise quiet, or
432  *   - when operating as a repeater so we see repeater-sta beacons
433  *   - when scanning
434  */
435 
436 u32 ath_calcrxfilter(struct ath_softc *sc)
437 {
438 #define	RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR)
439 
440 	u32 rfilt;
441 
442 	rfilt = (ath9k_hw_getrxfilter(sc->sc_ah) & RX_FILTER_PRESERVE)
443 		| ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
444 		| ATH9K_RX_FILTER_MCAST;
445 
446 	/* If not a STA, enable processing of Probe Requests */
447 	if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
448 		rfilt |= ATH9K_RX_FILTER_PROBEREQ;
449 
450 	/*
451 	 * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station
452 	 * mode interface or when in monitor mode. AP mode does not need this
453 	 * since it receives all in-BSS frames anyway.
454 	 */
455 	if (((sc->sc_ah->opmode != NL80211_IFTYPE_AP) &&
456 	     (sc->rx.rxfilter & FIF_PROMISC_IN_BSS)) ||
457 	    (sc->sc_ah->opmode == NL80211_IFTYPE_MONITOR))
458 		rfilt |= ATH9K_RX_FILTER_PROM;
459 
460 	if (sc->rx.rxfilter & FIF_CONTROL)
461 		rfilt |= ATH9K_RX_FILTER_CONTROL;
462 
463 	if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
464 	    !(sc->rx.rxfilter & FIF_BCN_PRBRESP_PROMISC))
465 		rfilt |= ATH9K_RX_FILTER_MYBEACON;
466 	else
467 		rfilt |= ATH9K_RX_FILTER_BEACON;
468 
469 	if ((AR_SREV_9280_10_OR_LATER(sc->sc_ah) ||
470 	    AR_SREV_9285_10_OR_LATER(sc->sc_ah)) &&
471 	    (sc->sc_ah->opmode == NL80211_IFTYPE_AP) &&
472 	    (sc->rx.rxfilter & FIF_PSPOLL))
473 		rfilt |= ATH9K_RX_FILTER_PSPOLL;
474 
475 	if (conf_is_ht(&sc->hw->conf))
476 		rfilt |= ATH9K_RX_FILTER_COMP_BAR;
477 
478 	if (sc->sec_wiphy || (sc->rx.rxfilter & FIF_OTHER_BSS)) {
479 		/* TODO: only needed if more than one BSSID is in use in
480 		 * station/adhoc mode */
481 		/* The following may also be needed for other older chips */
482 		if (sc->sc_ah->hw_version.macVersion == AR_SREV_VERSION_9160)
483 			rfilt |= ATH9K_RX_FILTER_PROM;
484 		rfilt |= ATH9K_RX_FILTER_MCAST_BCAST_ALL;
485 	}
486 
487 	return rfilt;
488 
489 #undef RX_FILTER_PRESERVE
490 }
491 
492 int ath_startrecv(struct ath_softc *sc)
493 {
494 	struct ath_hw *ah = sc->sc_ah;
495 	struct ath_buf *bf, *tbf;
496 
497 	spin_lock_bh(&sc->rx.rxbuflock);
498 	if (list_empty(&sc->rx.rxbuf))
499 		goto start_recv;
500 
501 	sc->rx.rxlink = NULL;
502 	list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) {
503 		ath_rx_buf_link(sc, bf);
504 	}
505 
506 	/* We could have deleted elements so the list may be empty now */
507 	if (list_empty(&sc->rx.rxbuf))
508 		goto start_recv;
509 
510 	bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
511 	ath9k_hw_putrxbuf(ah, bf->bf_daddr);
512 	ath9k_hw_rxena(ah);
513 
514 start_recv:
515 	spin_unlock_bh(&sc->rx.rxbuflock);
516 	ath_opmode_init(sc);
517 	ath9k_hw_startpcureceive(ah);
518 
519 	return 0;
520 }
521 
522 bool ath_stoprecv(struct ath_softc *sc)
523 {
524 	struct ath_hw *ah = sc->sc_ah;
525 	bool stopped;
526 
527 	ath9k_hw_stoppcurecv(ah);
528 	ath9k_hw_setrxfilter(ah, 0);
529 	stopped = ath9k_hw_stopdmarecv(ah);
530 	sc->rx.rxlink = NULL;
531 
532 	return stopped;
533 }
534 
535 void ath_flushrecv(struct ath_softc *sc)
536 {
537 	spin_lock_bh(&sc->rx.rxflushlock);
538 	sc->sc_flags |= SC_OP_RXFLUSH;
539 	ath_rx_tasklet(sc, 1);
540 	sc->sc_flags &= ~SC_OP_RXFLUSH;
541 	spin_unlock_bh(&sc->rx.rxflushlock);
542 }
543 
544 static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
545 {
546 	/* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
547 	struct ieee80211_mgmt *mgmt;
548 	u8 *pos, *end, id, elen;
549 	struct ieee80211_tim_ie *tim;
550 
551 	mgmt = (struct ieee80211_mgmt *)skb->data;
552 	pos = mgmt->u.beacon.variable;
553 	end = skb->data + skb->len;
554 
555 	while (pos + 2 < end) {
556 		id = *pos++;
557 		elen = *pos++;
558 		if (pos + elen > end)
559 			break;
560 
561 		if (id == WLAN_EID_TIM) {
562 			if (elen < sizeof(*tim))
563 				break;
564 			tim = (struct ieee80211_tim_ie *) pos;
565 			if (tim->dtim_count != 0)
566 				break;
567 			return tim->bitmap_ctrl & 0x01;
568 		}
569 
570 		pos += elen;
571 	}
572 
573 	return false;
574 }
575 
576 static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
577 {
578 	struct ieee80211_mgmt *mgmt;
579 	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
580 
581 	if (skb->len < 24 + 8 + 2 + 2)
582 		return;
583 
584 	mgmt = (struct ieee80211_mgmt *)skb->data;
585 	if (memcmp(common->curbssid, mgmt->bssid, ETH_ALEN) != 0)
586 		return; /* not from our current AP */
587 
588 	sc->sc_flags &= ~SC_OP_WAIT_FOR_BEACON;
589 
590 	if (sc->sc_flags & SC_OP_BEACON_SYNC) {
591 		sc->sc_flags &= ~SC_OP_BEACON_SYNC;
592 		ath_print(common, ATH_DBG_PS,
593 			  "Reconfigure Beacon timers based on "
594 			  "timestamp from the AP\n");
595 		ath_beacon_config(sc, NULL);
596 	}
597 
598 	if (ath_beacon_dtim_pending_cab(skb)) {
599 		/*
600 		 * Remain awake waiting for buffered broadcast/multicast
601 		 * frames. If the last broadcast/multicast frame is not
602 		 * received properly, the next beacon frame will work as
603 		 * a backup trigger for returning into NETWORK SLEEP state,
604 		 * so we are waiting for it as well.
605 		 */
606 		ath_print(common, ATH_DBG_PS, "Received DTIM beacon indicating "
607 			  "buffered broadcast/multicast frame(s)\n");
608 		sc->sc_flags |= SC_OP_WAIT_FOR_CAB | SC_OP_WAIT_FOR_BEACON;
609 		return;
610 	}
611 
612 	if (sc->sc_flags & SC_OP_WAIT_FOR_CAB) {
613 		/*
614 		 * This can happen if a broadcast frame is dropped or the AP
615 		 * fails to send a frame indicating that all CAB frames have
616 		 * been delivered.
617 		 */
618 		sc->sc_flags &= ~SC_OP_WAIT_FOR_CAB;
619 		ath_print(common, ATH_DBG_PS,
620 			  "PS wait for CAB frames timed out\n");
621 	}
622 }
623 
624 static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb)
625 {
626 	struct ieee80211_hdr *hdr;
627 	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
628 
629 	hdr = (struct ieee80211_hdr *)skb->data;
630 
631 	/* Process Beacon and CAB receive in PS state */
632 	if ((sc->sc_flags & SC_OP_WAIT_FOR_BEACON) &&
633 	    ieee80211_is_beacon(hdr->frame_control))
634 		ath_rx_ps_beacon(sc, skb);
635 	else if ((sc->sc_flags & SC_OP_WAIT_FOR_CAB) &&
636 		 (ieee80211_is_data(hdr->frame_control) ||
637 		  ieee80211_is_action(hdr->frame_control)) &&
638 		 is_multicast_ether_addr(hdr->addr1) &&
639 		 !ieee80211_has_moredata(hdr->frame_control)) {
640 		/*
641 		 * No more broadcast/multicast frames to be received at this
642 		 * point.
643 		 */
644 		sc->sc_flags &= ~SC_OP_WAIT_FOR_CAB;
645 		ath_print(common, ATH_DBG_PS,
646 			  "All PS CAB frames received, back to sleep\n");
647 	} else if ((sc->sc_flags & SC_OP_WAIT_FOR_PSPOLL_DATA) &&
648 		   !is_multicast_ether_addr(hdr->addr1) &&
649 		   !ieee80211_has_morefrags(hdr->frame_control)) {
650 		sc->sc_flags &= ~SC_OP_WAIT_FOR_PSPOLL_DATA;
651 		ath_print(common, ATH_DBG_PS,
652 			  "Going back to sleep after having received "
653 			  "PS-Poll data (0x%x)\n",
654 			sc->sc_flags & (SC_OP_WAIT_FOR_BEACON |
655 					SC_OP_WAIT_FOR_CAB |
656 					SC_OP_WAIT_FOR_PSPOLL_DATA |
657 					SC_OP_WAIT_FOR_TX_ACK));
658 	}
659 }
660 
661 static void ath_rx_send_to_mac80211(struct ieee80211_hw *hw,
662 				    struct ath_softc *sc, struct sk_buff *skb,
663 				    struct ieee80211_rx_status *rxs)
664 {
665 	struct ieee80211_hdr *hdr;
666 
667 	hdr = (struct ieee80211_hdr *)skb->data;
668 
669 	/* Send the frame to mac80211 */
670 	if (is_multicast_ether_addr(hdr->addr1)) {
671 		int i;
672 		/*
673 		 * Deliver broadcast/multicast frames to all suitable
674 		 * virtual wiphys.
675 		 */
676 		/* TODO: filter based on channel configuration */
677 		for (i = 0; i < sc->num_sec_wiphy; i++) {
678 			struct ath_wiphy *aphy = sc->sec_wiphy[i];
679 			struct sk_buff *nskb;
680 			if (aphy == NULL)
681 				continue;
682 			nskb = skb_copy(skb, GFP_ATOMIC);
683 			if (!nskb)
684 				continue;
685 			ieee80211_rx(aphy->hw, nskb);
686 		}
687 		ieee80211_rx(sc->hw, skb);
688 	} else
689 		/* Deliver unicast frames based on receiver address */
690 		ieee80211_rx(hw, skb);
691 }
692 
693 int ath_rx_tasklet(struct ath_softc *sc, int flush)
694 {
695 #define PA2DESC(_sc, _pa)                                               \
696 	((struct ath_desc *)((caddr_t)(_sc)->rx.rxdma.dd_desc +		\
697 			     ((_pa) - (_sc)->rx.rxdma.dd_desc_paddr)))
698 
699 	struct ath_buf *bf;
700 	struct ath_desc *ds;
701 	struct ath_rx_status *rx_stats;
702 	struct sk_buff *skb = NULL, *requeue_skb;
703 	struct ieee80211_rx_status *rxs;
704 	struct ath_hw *ah = sc->sc_ah;
705 	struct ath_common *common = ath9k_hw_common(ah);
706 	/*
707 	 * The hw can techncically differ from common->hw when using ath9k
708 	 * virtual wiphy so to account for that we iterate over the active
709 	 * wiphys and find the appropriate wiphy and therefore hw.
710 	 */
711 	struct ieee80211_hw *hw = NULL;
712 	struct ieee80211_hdr *hdr;
713 	int hdrlen, padsize, retval;
714 	bool decrypt_error = false;
715 	u8 keyix;
716 	__le16 fc;
717 
718 	spin_lock_bh(&sc->rx.rxbuflock);
719 
720 	do {
721 		/* If handling rx interrupt and flush is in progress => exit */
722 		if ((sc->sc_flags & SC_OP_RXFLUSH) && (flush == 0))
723 			break;
724 
725 		if (list_empty(&sc->rx.rxbuf)) {
726 			sc->rx.rxlink = NULL;
727 			break;
728 		}
729 
730 		bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
731 		ds = bf->bf_desc;
732 
733 		/*
734 		 * Must provide the virtual address of the current
735 		 * descriptor, the physical address, and the virtual
736 		 * address of the next descriptor in the h/w chain.
737 		 * This allows the HAL to look ahead to see if the
738 		 * hardware is done with a descriptor by checking the
739 		 * done bit in the following descriptor and the address
740 		 * of the current descriptor the DMA engine is working
741 		 * on.  All this is necessary because of our use of
742 		 * a self-linked list to avoid rx overruns.
743 		 */
744 		retval = ath9k_hw_rxprocdesc(ah, ds,
745 					     bf->bf_daddr,
746 					     PA2DESC(sc, ds->ds_link),
747 					     0);
748 		if (retval == -EINPROGRESS) {
749 			struct ath_buf *tbf;
750 			struct ath_desc *tds;
751 
752 			if (list_is_last(&bf->list, &sc->rx.rxbuf)) {
753 				sc->rx.rxlink = NULL;
754 				break;
755 			}
756 
757 			tbf = list_entry(bf->list.next, struct ath_buf, list);
758 
759 			/*
760 			 * On some hardware the descriptor status words could
761 			 * get corrupted, including the done bit. Because of
762 			 * this, check if the next descriptor's done bit is
763 			 * set or not.
764 			 *
765 			 * If the next descriptor's done bit is set, the current
766 			 * descriptor has been corrupted. Force s/w to discard
767 			 * this descriptor and continue...
768 			 */
769 
770 			tds = tbf->bf_desc;
771 			retval = ath9k_hw_rxprocdesc(ah, tds, tbf->bf_daddr,
772 					     PA2DESC(sc, tds->ds_link), 0);
773 			if (retval == -EINPROGRESS) {
774 				break;
775 			}
776 		}
777 
778 		skb = bf->bf_mpdu;
779 		if (!skb)
780 			continue;
781 
782 		/*
783 		 * Synchronize the DMA transfer with CPU before
784 		 * 1. accessing the frame
785 		 * 2. requeueing the same buffer to h/w
786 		 */
787 		dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
788 				common->rx_bufsize,
789 				DMA_FROM_DEVICE);
790 
791 		hdr = (struct ieee80211_hdr *) skb->data;
792 		rxs =  IEEE80211_SKB_RXCB(skb);
793 
794 		hw = ath_get_virt_hw(sc, hdr);
795 		rx_stats = &ds->ds_rxstat;
796 
797 		/*
798 		 * If we're asked to flush receive queue, directly
799 		 * chain it back at the queue without processing it.
800 		 */
801 		if (flush)
802 			goto requeue;
803 
804 		/* The status portion of the descriptor could get corrupted. */
805 		if (common->rx_bufsize < rx_stats->rs_datalen)
806 			goto requeue;
807 
808 		if (!ath_rx_prepare(common, hw, skb, rx_stats,
809 				    rxs, &decrypt_error))
810 			goto requeue;
811 
812 		/* Ensure we always have an skb to requeue once we are done
813 		 * processing the current buffer's skb */
814 		requeue_skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_ATOMIC);
815 
816 		/* If there is no memory we ignore the current RX'd frame,
817 		 * tell hardware it can give us a new frame using the old
818 		 * skb and put it at the tail of the sc->rx.rxbuf list for
819 		 * processing. */
820 		if (!requeue_skb)
821 			goto requeue;
822 
823 		/* Unmap the frame */
824 		dma_unmap_single(sc->dev, bf->bf_buf_addr,
825 				 common->rx_bufsize,
826 				 DMA_FROM_DEVICE);
827 
828 		skb_put(skb, rx_stats->rs_datalen);
829 
830 		/* see if any padding is done by the hw and remove it */
831 		hdrlen = ieee80211_get_hdrlen_from_skb(skb);
832 		fc = hdr->frame_control;
833 
834 		/* The MAC header is padded to have 32-bit boundary if the
835 		 * packet payload is non-zero. The general calculation for
836 		 * padsize would take into account odd header lengths:
837 		 * padsize = (4 - hdrlen % 4) % 4; However, since only
838 		 * even-length headers are used, padding can only be 0 or 2
839 		 * bytes and we can optimize this a bit. In addition, we must
840 		 * not try to remove padding from short control frames that do
841 		 * not have payload. */
842 		padsize = hdrlen & 3;
843 		if (padsize && hdrlen >= 24) {
844 			memmove(skb->data + padsize, skb->data, hdrlen);
845 			skb_pull(skb, padsize);
846 		}
847 
848 		keyix = rx_stats->rs_keyix;
849 
850 		if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error) {
851 			rxs->flag |= RX_FLAG_DECRYPTED;
852 		} else if (ieee80211_has_protected(fc)
853 			   && !decrypt_error && skb->len >= hdrlen + 4) {
854 			keyix = skb->data[hdrlen + 3] >> 6;
855 
856 			if (test_bit(keyix, sc->keymap))
857 				rxs->flag |= RX_FLAG_DECRYPTED;
858 		}
859 		if (ah->sw_mgmt_crypto &&
860 		    (rxs->flag & RX_FLAG_DECRYPTED) &&
861 		    ieee80211_is_mgmt(fc))
862 			/* Use software decrypt for management frames. */
863 			rxs->flag &= ~RX_FLAG_DECRYPTED;
864 
865 		/* We will now give hardware our shiny new allocated skb */
866 		bf->bf_mpdu = requeue_skb;
867 		bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data,
868 						 common->rx_bufsize,
869 						 DMA_FROM_DEVICE);
870 		if (unlikely(dma_mapping_error(sc->dev,
871 			  bf->bf_buf_addr))) {
872 			dev_kfree_skb_any(requeue_skb);
873 			bf->bf_mpdu = NULL;
874 			ath_print(common, ATH_DBG_FATAL,
875 				  "dma_mapping_error() on RX\n");
876 			ath_rx_send_to_mac80211(hw, sc, skb, rxs);
877 			break;
878 		}
879 		bf->bf_dmacontext = bf->bf_buf_addr;
880 
881 		/*
882 		 * change the default rx antenna if rx diversity chooses the
883 		 * other antenna 3 times in a row.
884 		 */
885 		if (sc->rx.defant != ds->ds_rxstat.rs_antenna) {
886 			if (++sc->rx.rxotherant >= 3)
887 				ath_setdefantenna(sc, rx_stats->rs_antenna);
888 		} else {
889 			sc->rx.rxotherant = 0;
890 		}
891 
892 		if (unlikely(sc->sc_flags & (SC_OP_WAIT_FOR_BEACON |
893 					     SC_OP_WAIT_FOR_CAB |
894 					     SC_OP_WAIT_FOR_PSPOLL_DATA)))
895 			ath_rx_ps(sc, skb);
896 
897 		ath_rx_send_to_mac80211(hw, sc, skb, rxs);
898 
899 requeue:
900 		list_move_tail(&bf->list, &sc->rx.rxbuf);
901 		ath_rx_buf_link(sc, bf);
902 	} while (1);
903 
904 	spin_unlock_bh(&sc->rx.rxbuflock);
905 
906 	return 0;
907 #undef PA2DESC
908 }
909