xref: /openbmc/linux/drivers/net/wireless/ath/ath9k/recv.c (revision 0a45da765e4bf5e8a7705266fa36e0f44787b0a1)
1 /*
2  * Copyright (c) 2008-2009 Atheros Communications Inc.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 #include "ath9k.h"
18 
19 static struct ieee80211_hw * ath_get_virt_hw(struct ath_softc *sc,
20 					     struct ieee80211_hdr *hdr)
21 {
22 	struct ieee80211_hw *hw = sc->pri_wiphy->hw;
23 	int i;
24 
25 	spin_lock_bh(&sc->wiphy_lock);
26 	for (i = 0; i < sc->num_sec_wiphy; i++) {
27 		struct ath_wiphy *aphy = sc->sec_wiphy[i];
28 		if (aphy == NULL)
29 			continue;
30 		if (compare_ether_addr(hdr->addr1, aphy->hw->wiphy->perm_addr)
31 		    == 0) {
32 			hw = aphy->hw;
33 			break;
34 		}
35 	}
36 	spin_unlock_bh(&sc->wiphy_lock);
37 	return hw;
38 }
39 
40 /*
41  * Setup and link descriptors.
42  *
43  * 11N: we can no longer afford to self link the last descriptor.
44  * MAC acknowledges BA status as long as it copies frames to host
45  * buffer (or rx fifo). This can incorrectly acknowledge packets
46  * to a sender if last desc is self-linked.
47  */
48 static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf)
49 {
50 	struct ath_hw *ah = sc->sc_ah;
51 	struct ath_desc *ds;
52 	struct sk_buff *skb;
53 
54 	ATH_RXBUF_RESET(bf);
55 
56 	ds = bf->bf_desc;
57 	ds->ds_link = 0; /* link to null */
58 	ds->ds_data = bf->bf_buf_addr;
59 
60 	/* virtual addr of the beginning of the buffer. */
61 	skb = bf->bf_mpdu;
62 	BUG_ON(skb == NULL);
63 	ds->ds_vdata = skb->data;
64 
65 	/* setup rx descriptors. The rx.bufsize here tells the harware
66 	 * how much data it can DMA to us and that we are prepared
67 	 * to process */
68 	ath9k_hw_setuprxdesc(ah, ds,
69 			     sc->rx.bufsize,
70 			     0);
71 
72 	if (sc->rx.rxlink == NULL)
73 		ath9k_hw_putrxbuf(ah, bf->bf_daddr);
74 	else
75 		*sc->rx.rxlink = bf->bf_daddr;
76 
77 	sc->rx.rxlink = &ds->ds_link;
78 	ath9k_hw_rxena(ah);
79 }
80 
81 static void ath_setdefantenna(struct ath_softc *sc, u32 antenna)
82 {
83 	/* XXX block beacon interrupts */
84 	ath9k_hw_setantenna(sc->sc_ah, antenna);
85 	sc->rx.defant = antenna;
86 	sc->rx.rxotherant = 0;
87 }
88 
89 /* Assumes you've already done the endian to CPU conversion */
90 static bool ath9k_rx_accept(struct ath_common *common,
91 			    struct sk_buff *skb,
92 			    struct ieee80211_rx_status *rxs,
93 			    struct ath_rx_status *rx_stats,
94 			    bool *decrypt_error)
95 {
96 	struct ath_hw *ah = common->ah;
97 	struct ieee80211_hdr *hdr;
98 	__le16 fc;
99 
100 	hdr = (struct ieee80211_hdr *) skb->data;
101 	fc = hdr->frame_control;
102 
103 	if (!rx_stats->rs_datalen)
104 		return false;
105 
106 	if (rx_stats->rs_more) {
107 		/*
108 		 * Frame spans multiple descriptors; this cannot happen yet
109 		 * as we don't support jumbograms. If not in monitor mode,
110 		 * discard the frame. Enable this if you want to see
111 		 * error frames in Monitor mode.
112 		 */
113 		if (ah->opmode != NL80211_IFTYPE_MONITOR)
114 			return false;
115 	} else if (rx_stats->rs_status != 0) {
116 		if (rx_stats->rs_status & ATH9K_RXERR_CRC)
117 			rxs->flag |= RX_FLAG_FAILED_FCS_CRC;
118 		if (rx_stats->rs_status & ATH9K_RXERR_PHY)
119 			return false;
120 
121 		if (rx_stats->rs_status & ATH9K_RXERR_DECRYPT) {
122 			*decrypt_error = true;
123 		} else if (rx_stats->rs_status & ATH9K_RXERR_MIC) {
124 			if (ieee80211_is_ctl(fc))
125 				/*
126 				 * Sometimes, we get invalid
127 				 * MIC failures on valid control frames.
128 				 * Remove these mic errors.
129 				 */
130 				rx_stats->rs_status &= ~ATH9K_RXERR_MIC;
131 			else
132 				rxs->flag |= RX_FLAG_MMIC_ERROR;
133 		}
134 		/*
135 		 * Reject error frames with the exception of
136 		 * decryption and MIC failures. For monitor mode,
137 		 * we also ignore the CRC error.
138 		 */
139 		if (ah->opmode == NL80211_IFTYPE_MONITOR) {
140 			if (rx_stats->rs_status &
141 			    ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
142 			      ATH9K_RXERR_CRC))
143 				return false;
144 		} else {
145 			if (rx_stats->rs_status &
146 			    ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) {
147 				return false;
148 			}
149 		}
150 	}
151 	return true;
152 }
153 
154 static u8 ath9k_process_rate(struct ath_common *common,
155 			     struct ieee80211_hw *hw,
156 			     struct ath_rx_status *rx_stats,
157 			     struct ieee80211_rx_status *rxs,
158 			     struct sk_buff *skb)
159 {
160 	struct ieee80211_supported_band *sband;
161 	enum ieee80211_band band;
162 	unsigned int i = 0;
163 
164 	band = hw->conf.channel->band;
165 	sband = hw->wiphy->bands[band];
166 
167 	if (rx_stats->rs_rate & 0x80) {
168 		/* HT rate */
169 		rxs->flag |= RX_FLAG_HT;
170 		if (rx_stats->rs_flags & ATH9K_RX_2040)
171 			rxs->flag |= RX_FLAG_40MHZ;
172 		if (rx_stats->rs_flags & ATH9K_RX_GI)
173 			rxs->flag |= RX_FLAG_SHORT_GI;
174 		return rx_stats->rs_rate & 0x7f;
175 	}
176 
177 	for (i = 0; i < sband->n_bitrates; i++) {
178 		if (sband->bitrates[i].hw_value == rx_stats->rs_rate)
179 			return i;
180 		if (sband->bitrates[i].hw_value_short == rx_stats->rs_rate) {
181 			rxs->flag |= RX_FLAG_SHORTPRE;
182 			return i;
183 		}
184 	}
185 
186 	/* No valid hardware bitrate found -- we should not get here */
187 	ath_print(common, ATH_DBG_XMIT, "unsupported hw bitrate detected "
188 		  "0x%02x using 1 Mbit\n", rx_stats->rs_rate);
189 	if ((common->debug_mask & ATH_DBG_XMIT))
190 		print_hex_dump_bytes("", DUMP_PREFIX_NONE, skb->data, skb->len);
191 
192         return 0;
193 }
194 
195 /*
196  * Theory for reporting quality:
197  *
198  * At a hardware RSSI of 45 you will be able to use MCS 7  reliably.
199  * At a hardware RSSI of 45 you will be able to use MCS 15 reliably.
200  * At a hardware RSSI of 35 you should be able use 54 Mbps reliably.
201  *
202  * MCS 7  is the highets MCS index usable by a 1-stream device.
203  * MCS 15 is the highest MCS index usable by a 2-stream device.
204  *
205  * All ath9k devices are either 1-stream or 2-stream.
206  *
207  * How many bars you see is derived from the qual reporting.
208  *
209  * A more elaborate scheme can be used here but it requires tables
210  * of SNR/throughput for each possible mode used. For the MCS table
211  * you can refer to the wireless wiki:
212  *
213  * http://wireless.kernel.org/en/developers/Documentation/ieee80211/802.11n
214  *
215  */
216 static int ath9k_compute_qual(struct ieee80211_hw *hw,
217 			      struct ath_rx_status *rx_stats)
218 {
219 	int qual;
220 
221 	if (conf_is_ht(&hw->conf))
222 		qual =  rx_stats->rs_rssi * 100 / 45;
223 	else
224 		qual =  rx_stats->rs_rssi * 100 / 35;
225 
226 	/*
227 	 * rssi can be more than 45 though, anything above that
228 	 * should be considered at 100%
229 	 */
230 	if (qual > 100)
231 		qual = 100;
232 
233 	return qual;
234 }
235 
236 static void ath9k_process_rssi(struct ath_common *common,
237 			       struct ieee80211_hw *hw,
238 			       struct sk_buff *skb,
239 			       struct ath_rx_status *rx_stats)
240 {
241 	struct ath_hw *ah = common->ah;
242 	struct ieee80211_sta *sta;
243 	struct ieee80211_hdr *hdr;
244 	struct ath_node *an;
245 	int last_rssi = ATH_RSSI_DUMMY_MARKER;
246 	__le16 fc;
247 
248 	hdr = (struct ieee80211_hdr *)skb->data;
249 	fc = hdr->frame_control;
250 
251 	rcu_read_lock();
252 	/* XXX: use ieee80211_find_sta! */
253 	sta = ieee80211_find_sta_by_hw(hw, hdr->addr2);
254 	if (sta) {
255 		an = (struct ath_node *) sta->drv_priv;
256 		if (rx_stats->rs_rssi != ATH9K_RSSI_BAD &&
257 		   !rx_stats->rs_moreaggr)
258 			ATH_RSSI_LPF(an->last_rssi, rx_stats->rs_rssi);
259 		last_rssi = an->last_rssi;
260 	}
261 	rcu_read_unlock();
262 
263 	if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER))
264 		rx_stats->rs_rssi = ATH_EP_RND(last_rssi,
265 					      ATH_RSSI_EP_MULTIPLIER);
266 	if (rx_stats->rs_rssi < 0)
267 		rx_stats->rs_rssi = 0;
268 	else if (rx_stats->rs_rssi > 127)
269 		rx_stats->rs_rssi = 127;
270 
271 	/* Update Beacon RSSI, this is used by ANI. */
272 	if (ieee80211_is_beacon(fc))
273 		ah->stats.avgbrssi = rx_stats->rs_rssi;
274 }
275 
276 /*
277  * For Decrypt or Demic errors, we only mark packet status here and always push
278  * up the frame up to let mac80211 handle the actual error case, be it no
279  * decryption key or real decryption error. This let us keep statistics there.
280  */
281 static int ath_rx_prepare(struct ath_common *common,
282 			  struct ieee80211_hw *hw,
283 			  struct sk_buff *skb, struct ath_rx_status *rx_stats,
284 			  struct ieee80211_rx_status *rx_status,
285 			  bool *decrypt_error)
286 {
287 	struct ath_hw *ah = common->ah;
288 
289 	if (!ath9k_rx_accept(common, skb, rx_status, rx_stats, decrypt_error))
290 		goto rx_next;
291 
292 	ath9k_process_rssi(common, hw, skb, rx_stats);
293 
294 	rx_status->rate_idx = ath9k_process_rate(common, hw,
295 						 rx_stats, rx_status, skb);
296 	rx_status->mactime = ath9k_hw_extend_tsf(ah, rx_stats->rs_tstamp);
297 	rx_status->band = hw->conf.channel->band;
298 	rx_status->freq = hw->conf.channel->center_freq;
299 	rx_status->noise = common->ani.noise_floor;
300 	rx_status->signal = ATH_DEFAULT_NOISE_FLOOR + rx_stats->rs_rssi;
301 	rx_status->antenna = rx_stats->rs_antenna;
302 	rx_status->qual = ath9k_compute_qual(hw, rx_stats);
303 	rx_status->flag |= RX_FLAG_TSFT;
304 
305 	return 1;
306 rx_next:
307 	return 0;
308 }
309 
310 static void ath_opmode_init(struct ath_softc *sc)
311 {
312 	struct ath_hw *ah = sc->sc_ah;
313 	struct ath_common *common = ath9k_hw_common(ah);
314 
315 	u32 rfilt, mfilt[2];
316 
317 	/* configure rx filter */
318 	rfilt = ath_calcrxfilter(sc);
319 	ath9k_hw_setrxfilter(ah, rfilt);
320 
321 	/* configure bssid mask */
322 	if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
323 		ath_hw_setbssidmask(common);
324 
325 	/* configure operational mode */
326 	ath9k_hw_setopmode(ah);
327 
328 	/* Handle any link-level address change. */
329 	ath9k_hw_setmac(ah, common->macaddr);
330 
331 	/* calculate and install multicast filter */
332 	mfilt[0] = mfilt[1] = ~0;
333 	ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]);
334 }
335 
336 int ath_rx_init(struct ath_softc *sc, int nbufs)
337 {
338 	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
339 	struct sk_buff *skb;
340 	struct ath_buf *bf;
341 	int error = 0;
342 
343 	spin_lock_init(&sc->rx.rxflushlock);
344 	sc->sc_flags &= ~SC_OP_RXFLUSH;
345 	spin_lock_init(&sc->rx.rxbuflock);
346 
347 	sc->rx.bufsize = roundup(IEEE80211_MAX_MPDU_LEN,
348 				 min(common->cachelsz, (u16)64));
349 
350 	ath_print(common, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n",
351 		  common->cachelsz, sc->rx.bufsize);
352 
353 	/* Initialize rx descriptors */
354 
355 	error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf,
356 				  "rx", nbufs, 1);
357 	if (error != 0) {
358 		ath_print(common, ATH_DBG_FATAL,
359 			  "failed to allocate rx descriptors: %d\n", error);
360 		goto err;
361 	}
362 
363 	list_for_each_entry(bf, &sc->rx.rxbuf, list) {
364 		skb = ath_rxbuf_alloc(common, sc->rx.bufsize, GFP_KERNEL);
365 		if (skb == NULL) {
366 			error = -ENOMEM;
367 			goto err;
368 		}
369 
370 		bf->bf_mpdu = skb;
371 		bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
372 						 sc->rx.bufsize,
373 						 DMA_FROM_DEVICE);
374 		if (unlikely(dma_mapping_error(sc->dev,
375 					       bf->bf_buf_addr))) {
376 			dev_kfree_skb_any(skb);
377 			bf->bf_mpdu = NULL;
378 			ath_print(common, ATH_DBG_FATAL,
379 				  "dma_mapping_error() on RX init\n");
380 			error = -ENOMEM;
381 			goto err;
382 		}
383 		bf->bf_dmacontext = bf->bf_buf_addr;
384 	}
385 	sc->rx.rxlink = NULL;
386 
387 err:
388 	if (error)
389 		ath_rx_cleanup(sc);
390 
391 	return error;
392 }
393 
394 void ath_rx_cleanup(struct ath_softc *sc)
395 {
396 	struct sk_buff *skb;
397 	struct ath_buf *bf;
398 
399 	list_for_each_entry(bf, &sc->rx.rxbuf, list) {
400 		skb = bf->bf_mpdu;
401 		if (skb) {
402 			dma_unmap_single(sc->dev, bf->bf_buf_addr,
403 					 sc->rx.bufsize, DMA_FROM_DEVICE);
404 			dev_kfree_skb(skb);
405 		}
406 	}
407 
408 	if (sc->rx.rxdma.dd_desc_len != 0)
409 		ath_descdma_cleanup(sc, &sc->rx.rxdma, &sc->rx.rxbuf);
410 }
411 
412 /*
413  * Calculate the receive filter according to the
414  * operating mode and state:
415  *
416  * o always accept unicast, broadcast, and multicast traffic
417  * o maintain current state of phy error reception (the hal
418  *   may enable phy error frames for noise immunity work)
419  * o probe request frames are accepted only when operating in
420  *   hostap, adhoc, or monitor modes
421  * o enable promiscuous mode according to the interface state
422  * o accept beacons:
423  *   - when operating in adhoc mode so the 802.11 layer creates
424  *     node table entries for peers,
425  *   - when operating in station mode for collecting rssi data when
426  *     the station is otherwise quiet, or
427  *   - when operating as a repeater so we see repeater-sta beacons
428  *   - when scanning
429  */
430 
431 u32 ath_calcrxfilter(struct ath_softc *sc)
432 {
433 #define	RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR)
434 
435 	u32 rfilt;
436 
437 	rfilt = (ath9k_hw_getrxfilter(sc->sc_ah) & RX_FILTER_PRESERVE)
438 		| ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
439 		| ATH9K_RX_FILTER_MCAST;
440 
441 	/* If not a STA, enable processing of Probe Requests */
442 	if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
443 		rfilt |= ATH9K_RX_FILTER_PROBEREQ;
444 
445 	/*
446 	 * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station
447 	 * mode interface or when in monitor mode. AP mode does not need this
448 	 * since it receives all in-BSS frames anyway.
449 	 */
450 	if (((sc->sc_ah->opmode != NL80211_IFTYPE_AP) &&
451 	     (sc->rx.rxfilter & FIF_PROMISC_IN_BSS)) ||
452 	    (sc->sc_ah->opmode == NL80211_IFTYPE_MONITOR))
453 		rfilt |= ATH9K_RX_FILTER_PROM;
454 
455 	if (sc->rx.rxfilter & FIF_CONTROL)
456 		rfilt |= ATH9K_RX_FILTER_CONTROL;
457 
458 	if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
459 	    !(sc->rx.rxfilter & FIF_BCN_PRBRESP_PROMISC))
460 		rfilt |= ATH9K_RX_FILTER_MYBEACON;
461 	else
462 		rfilt |= ATH9K_RX_FILTER_BEACON;
463 
464 	if ((AR_SREV_9280_10_OR_LATER(sc->sc_ah) ||
465 	    AR_SREV_9285_10_OR_LATER(sc->sc_ah)) &&
466 	    (sc->sc_ah->opmode == NL80211_IFTYPE_AP) &&
467 	    (sc->rx.rxfilter & FIF_PSPOLL))
468 		rfilt |= ATH9K_RX_FILTER_PSPOLL;
469 
470 	if (conf_is_ht(&sc->hw->conf))
471 		rfilt |= ATH9K_RX_FILTER_COMP_BAR;
472 
473 	if (sc->sec_wiphy || (sc->rx.rxfilter & FIF_OTHER_BSS)) {
474 		/* TODO: only needed if more than one BSSID is in use in
475 		 * station/adhoc mode */
476 		/* The following may also be needed for other older chips */
477 		if (sc->sc_ah->hw_version.macVersion == AR_SREV_VERSION_9160)
478 			rfilt |= ATH9K_RX_FILTER_PROM;
479 		rfilt |= ATH9K_RX_FILTER_MCAST_BCAST_ALL;
480 	}
481 
482 	return rfilt;
483 
484 #undef RX_FILTER_PRESERVE
485 }
486 
487 int ath_startrecv(struct ath_softc *sc)
488 {
489 	struct ath_hw *ah = sc->sc_ah;
490 	struct ath_buf *bf, *tbf;
491 
492 	spin_lock_bh(&sc->rx.rxbuflock);
493 	if (list_empty(&sc->rx.rxbuf))
494 		goto start_recv;
495 
496 	sc->rx.rxlink = NULL;
497 	list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) {
498 		ath_rx_buf_link(sc, bf);
499 	}
500 
501 	/* We could have deleted elements so the list may be empty now */
502 	if (list_empty(&sc->rx.rxbuf))
503 		goto start_recv;
504 
505 	bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
506 	ath9k_hw_putrxbuf(ah, bf->bf_daddr);
507 	ath9k_hw_rxena(ah);
508 
509 start_recv:
510 	spin_unlock_bh(&sc->rx.rxbuflock);
511 	ath_opmode_init(sc);
512 	ath9k_hw_startpcureceive(ah);
513 
514 	return 0;
515 }
516 
517 bool ath_stoprecv(struct ath_softc *sc)
518 {
519 	struct ath_hw *ah = sc->sc_ah;
520 	bool stopped;
521 
522 	ath9k_hw_stoppcurecv(ah);
523 	ath9k_hw_setrxfilter(ah, 0);
524 	stopped = ath9k_hw_stopdmarecv(ah);
525 	sc->rx.rxlink = NULL;
526 
527 	return stopped;
528 }
529 
530 void ath_flushrecv(struct ath_softc *sc)
531 {
532 	spin_lock_bh(&sc->rx.rxflushlock);
533 	sc->sc_flags |= SC_OP_RXFLUSH;
534 	ath_rx_tasklet(sc, 1);
535 	sc->sc_flags &= ~SC_OP_RXFLUSH;
536 	spin_unlock_bh(&sc->rx.rxflushlock);
537 }
538 
539 static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
540 {
541 	/* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
542 	struct ieee80211_mgmt *mgmt;
543 	u8 *pos, *end, id, elen;
544 	struct ieee80211_tim_ie *tim;
545 
546 	mgmt = (struct ieee80211_mgmt *)skb->data;
547 	pos = mgmt->u.beacon.variable;
548 	end = skb->data + skb->len;
549 
550 	while (pos + 2 < end) {
551 		id = *pos++;
552 		elen = *pos++;
553 		if (pos + elen > end)
554 			break;
555 
556 		if (id == WLAN_EID_TIM) {
557 			if (elen < sizeof(*tim))
558 				break;
559 			tim = (struct ieee80211_tim_ie *) pos;
560 			if (tim->dtim_count != 0)
561 				break;
562 			return tim->bitmap_ctrl & 0x01;
563 		}
564 
565 		pos += elen;
566 	}
567 
568 	return false;
569 }
570 
571 static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
572 {
573 	struct ieee80211_mgmt *mgmt;
574 	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
575 
576 	if (skb->len < 24 + 8 + 2 + 2)
577 		return;
578 
579 	mgmt = (struct ieee80211_mgmt *)skb->data;
580 	if (memcmp(common->curbssid, mgmt->bssid, ETH_ALEN) != 0)
581 		return; /* not from our current AP */
582 
583 	sc->sc_flags &= ~SC_OP_WAIT_FOR_BEACON;
584 
585 	if (sc->sc_flags & SC_OP_BEACON_SYNC) {
586 		sc->sc_flags &= ~SC_OP_BEACON_SYNC;
587 		ath_print(common, ATH_DBG_PS,
588 			  "Reconfigure Beacon timers based on "
589 			  "timestamp from the AP\n");
590 		ath_beacon_config(sc, NULL);
591 	}
592 
593 	if (ath_beacon_dtim_pending_cab(skb)) {
594 		/*
595 		 * Remain awake waiting for buffered broadcast/multicast
596 		 * frames. If the last broadcast/multicast frame is not
597 		 * received properly, the next beacon frame will work as
598 		 * a backup trigger for returning into NETWORK SLEEP state,
599 		 * so we are waiting for it as well.
600 		 */
601 		ath_print(common, ATH_DBG_PS, "Received DTIM beacon indicating "
602 			  "buffered broadcast/multicast frame(s)\n");
603 		sc->sc_flags |= SC_OP_WAIT_FOR_CAB | SC_OP_WAIT_FOR_BEACON;
604 		return;
605 	}
606 
607 	if (sc->sc_flags & SC_OP_WAIT_FOR_CAB) {
608 		/*
609 		 * This can happen if a broadcast frame is dropped or the AP
610 		 * fails to send a frame indicating that all CAB frames have
611 		 * been delivered.
612 		 */
613 		sc->sc_flags &= ~SC_OP_WAIT_FOR_CAB;
614 		ath_print(common, ATH_DBG_PS,
615 			  "PS wait for CAB frames timed out\n");
616 	}
617 }
618 
619 static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb)
620 {
621 	struct ieee80211_hdr *hdr;
622 	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
623 
624 	hdr = (struct ieee80211_hdr *)skb->data;
625 
626 	/* Process Beacon and CAB receive in PS state */
627 	if ((sc->sc_flags & SC_OP_WAIT_FOR_BEACON) &&
628 	    ieee80211_is_beacon(hdr->frame_control))
629 		ath_rx_ps_beacon(sc, skb);
630 	else if ((sc->sc_flags & SC_OP_WAIT_FOR_CAB) &&
631 		 (ieee80211_is_data(hdr->frame_control) ||
632 		  ieee80211_is_action(hdr->frame_control)) &&
633 		 is_multicast_ether_addr(hdr->addr1) &&
634 		 !ieee80211_has_moredata(hdr->frame_control)) {
635 		/*
636 		 * No more broadcast/multicast frames to be received at this
637 		 * point.
638 		 */
639 		sc->sc_flags &= ~SC_OP_WAIT_FOR_CAB;
640 		ath_print(common, ATH_DBG_PS,
641 			  "All PS CAB frames received, back to sleep\n");
642 	} else if ((sc->sc_flags & SC_OP_WAIT_FOR_PSPOLL_DATA) &&
643 		   !is_multicast_ether_addr(hdr->addr1) &&
644 		   !ieee80211_has_morefrags(hdr->frame_control)) {
645 		sc->sc_flags &= ~SC_OP_WAIT_FOR_PSPOLL_DATA;
646 		ath_print(common, ATH_DBG_PS,
647 			  "Going back to sleep after having received "
648 			  "PS-Poll data (0x%x)\n",
649 			sc->sc_flags & (SC_OP_WAIT_FOR_BEACON |
650 					SC_OP_WAIT_FOR_CAB |
651 					SC_OP_WAIT_FOR_PSPOLL_DATA |
652 					SC_OP_WAIT_FOR_TX_ACK));
653 	}
654 }
655 
656 static void ath_rx_send_to_mac80211(struct ieee80211_hw *hw,
657 				    struct ath_softc *sc, struct sk_buff *skb,
658 				    struct ieee80211_rx_status *rxs)
659 {
660 	struct ieee80211_hdr *hdr;
661 
662 	hdr = (struct ieee80211_hdr *)skb->data;
663 
664 	/* Send the frame to mac80211 */
665 	if (is_multicast_ether_addr(hdr->addr1)) {
666 		int i;
667 		/*
668 		 * Deliver broadcast/multicast frames to all suitable
669 		 * virtual wiphys.
670 		 */
671 		/* TODO: filter based on channel configuration */
672 		for (i = 0; i < sc->num_sec_wiphy; i++) {
673 			struct ath_wiphy *aphy = sc->sec_wiphy[i];
674 			struct sk_buff *nskb;
675 			if (aphy == NULL)
676 				continue;
677 			nskb = skb_copy(skb, GFP_ATOMIC);
678 			if (!nskb)
679 				continue;
680 			ieee80211_rx(aphy->hw, nskb);
681 		}
682 		ieee80211_rx(sc->hw, skb);
683 	} else
684 		/* Deliver unicast frames based on receiver address */
685 		ieee80211_rx(hw, skb);
686 }
687 
688 int ath_rx_tasklet(struct ath_softc *sc, int flush)
689 {
690 #define PA2DESC(_sc, _pa)                                               \
691 	((struct ath_desc *)((caddr_t)(_sc)->rx.rxdma.dd_desc +		\
692 			     ((_pa) - (_sc)->rx.rxdma.dd_desc_paddr)))
693 
694 	struct ath_buf *bf;
695 	struct ath_desc *ds;
696 	struct ath_rx_status *rx_stats;
697 	struct sk_buff *skb = NULL, *requeue_skb;
698 	struct ieee80211_rx_status *rxs;
699 	struct ath_hw *ah = sc->sc_ah;
700 	struct ath_common *common = ath9k_hw_common(ah);
701 	/*
702 	 * The hw can techncically differ from common->hw when using ath9k
703 	 * virtual wiphy so to account for that we iterate over the active
704 	 * wiphys and find the appropriate wiphy and therefore hw.
705 	 */
706 	struct ieee80211_hw *hw = NULL;
707 	struct ieee80211_hdr *hdr;
708 	int hdrlen, padsize, retval;
709 	bool decrypt_error = false;
710 	u8 keyix;
711 	__le16 fc;
712 
713 	spin_lock_bh(&sc->rx.rxbuflock);
714 
715 	do {
716 		/* If handling rx interrupt and flush is in progress => exit */
717 		if ((sc->sc_flags & SC_OP_RXFLUSH) && (flush == 0))
718 			break;
719 
720 		if (list_empty(&sc->rx.rxbuf)) {
721 			sc->rx.rxlink = NULL;
722 			break;
723 		}
724 
725 		bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
726 		ds = bf->bf_desc;
727 
728 		/*
729 		 * Must provide the virtual address of the current
730 		 * descriptor, the physical address, and the virtual
731 		 * address of the next descriptor in the h/w chain.
732 		 * This allows the HAL to look ahead to see if the
733 		 * hardware is done with a descriptor by checking the
734 		 * done bit in the following descriptor and the address
735 		 * of the current descriptor the DMA engine is working
736 		 * on.  All this is necessary because of our use of
737 		 * a self-linked list to avoid rx overruns.
738 		 */
739 		retval = ath9k_hw_rxprocdesc(ah, ds,
740 					     bf->bf_daddr,
741 					     PA2DESC(sc, ds->ds_link),
742 					     0);
743 		if (retval == -EINPROGRESS) {
744 			struct ath_buf *tbf;
745 			struct ath_desc *tds;
746 
747 			if (list_is_last(&bf->list, &sc->rx.rxbuf)) {
748 				sc->rx.rxlink = NULL;
749 				break;
750 			}
751 
752 			tbf = list_entry(bf->list.next, struct ath_buf, list);
753 
754 			/*
755 			 * On some hardware the descriptor status words could
756 			 * get corrupted, including the done bit. Because of
757 			 * this, check if the next descriptor's done bit is
758 			 * set or not.
759 			 *
760 			 * If the next descriptor's done bit is set, the current
761 			 * descriptor has been corrupted. Force s/w to discard
762 			 * this descriptor and continue...
763 			 */
764 
765 			tds = tbf->bf_desc;
766 			retval = ath9k_hw_rxprocdesc(ah, tds, tbf->bf_daddr,
767 					     PA2DESC(sc, tds->ds_link), 0);
768 			if (retval == -EINPROGRESS) {
769 				break;
770 			}
771 		}
772 
773 		skb = bf->bf_mpdu;
774 		if (!skb)
775 			continue;
776 
777 		/*
778 		 * Synchronize the DMA transfer with CPU before
779 		 * 1. accessing the frame
780 		 * 2. requeueing the same buffer to h/w
781 		 */
782 		dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
783 				sc->rx.bufsize,
784 				DMA_FROM_DEVICE);
785 
786 		hdr = (struct ieee80211_hdr *) skb->data;
787 		rxs =  IEEE80211_SKB_RXCB(skb);
788 
789 		hw = ath_get_virt_hw(sc, hdr);
790 		rx_stats = &ds->ds_rxstat;
791 
792 		/*
793 		 * If we're asked to flush receive queue, directly
794 		 * chain it back at the queue without processing it.
795 		 */
796 		if (flush)
797 			goto requeue;
798 
799 		/* The status portion of the descriptor could get corrupted. */
800 		if (sc->rx.bufsize < rx_stats->rs_datalen)
801 			goto requeue;
802 
803 		if (!ath_rx_prepare(common, hw, skb, rx_stats,
804 				    rxs, &decrypt_error))
805 			goto requeue;
806 
807 		/* Ensure we always have an skb to requeue once we are done
808 		 * processing the current buffer's skb */
809 		requeue_skb = ath_rxbuf_alloc(common, sc->rx.bufsize, GFP_ATOMIC);
810 
811 		/* If there is no memory we ignore the current RX'd frame,
812 		 * tell hardware it can give us a new frame using the old
813 		 * skb and put it at the tail of the sc->rx.rxbuf list for
814 		 * processing. */
815 		if (!requeue_skb)
816 			goto requeue;
817 
818 		/* Unmap the frame */
819 		dma_unmap_single(sc->dev, bf->bf_buf_addr,
820 				 sc->rx.bufsize,
821 				 DMA_FROM_DEVICE);
822 
823 		skb_put(skb, rx_stats->rs_datalen);
824 
825 		/* see if any padding is done by the hw and remove it */
826 		hdrlen = ieee80211_get_hdrlen_from_skb(skb);
827 		fc = hdr->frame_control;
828 
829 		/* The MAC header is padded to have 32-bit boundary if the
830 		 * packet payload is non-zero. The general calculation for
831 		 * padsize would take into account odd header lengths:
832 		 * padsize = (4 - hdrlen % 4) % 4; However, since only
833 		 * even-length headers are used, padding can only be 0 or 2
834 		 * bytes and we can optimize this a bit. In addition, we must
835 		 * not try to remove padding from short control frames that do
836 		 * not have payload. */
837 		padsize = hdrlen & 3;
838 		if (padsize && hdrlen >= 24) {
839 			memmove(skb->data + padsize, skb->data, hdrlen);
840 			skb_pull(skb, padsize);
841 		}
842 
843 		keyix = rx_stats->rs_keyix;
844 
845 		if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error) {
846 			rxs->flag |= RX_FLAG_DECRYPTED;
847 		} else if (ieee80211_has_protected(fc)
848 			   && !decrypt_error && skb->len >= hdrlen + 4) {
849 			keyix = skb->data[hdrlen + 3] >> 6;
850 
851 			if (test_bit(keyix, sc->keymap))
852 				rxs->flag |= RX_FLAG_DECRYPTED;
853 		}
854 		if (ah->sw_mgmt_crypto &&
855 		    (rxs->flag & RX_FLAG_DECRYPTED) &&
856 		    ieee80211_is_mgmt(fc))
857 			/* Use software decrypt for management frames. */
858 			rxs->flag &= ~RX_FLAG_DECRYPTED;
859 
860 		/* We will now give hardware our shiny new allocated skb */
861 		bf->bf_mpdu = requeue_skb;
862 		bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data,
863 					 sc->rx.bufsize,
864 					 DMA_FROM_DEVICE);
865 		if (unlikely(dma_mapping_error(sc->dev,
866 			  bf->bf_buf_addr))) {
867 			dev_kfree_skb_any(requeue_skb);
868 			bf->bf_mpdu = NULL;
869 			ath_print(common, ATH_DBG_FATAL,
870 				  "dma_mapping_error() on RX\n");
871 			ath_rx_send_to_mac80211(hw, sc, skb, rxs);
872 			break;
873 		}
874 		bf->bf_dmacontext = bf->bf_buf_addr;
875 
876 		/*
877 		 * change the default rx antenna if rx diversity chooses the
878 		 * other antenna 3 times in a row.
879 		 */
880 		if (sc->rx.defant != ds->ds_rxstat.rs_antenna) {
881 			if (++sc->rx.rxotherant >= 3)
882 				ath_setdefantenna(sc, rx_stats->rs_antenna);
883 		} else {
884 			sc->rx.rxotherant = 0;
885 		}
886 
887 		if (unlikely(sc->sc_flags & (SC_OP_WAIT_FOR_BEACON |
888 					     SC_OP_WAIT_FOR_CAB |
889 					     SC_OP_WAIT_FOR_PSPOLL_DATA)))
890 			ath_rx_ps(sc, skb);
891 
892 		ath_rx_send_to_mac80211(hw, sc, skb, rxs);
893 
894 requeue:
895 		list_move_tail(&bf->list, &sc->rx.rxbuf);
896 		ath_rx_buf_link(sc, bf);
897 	} while (1);
898 
899 	spin_unlock_bh(&sc->rx.rxbuflock);
900 
901 	return 0;
902 #undef PA2DESC
903 }
904