1203c4805SLuis R. Rodriguez /* 25b68138eSSujith Manoharan * Copyright (c) 2008-2011 Atheros Communications Inc. 3203c4805SLuis R. Rodriguez * 4203c4805SLuis R. Rodriguez * Permission to use, copy, modify, and/or distribute this software for any 5203c4805SLuis R. Rodriguez * purpose with or without fee is hereby granted, provided that the above 6203c4805SLuis R. Rodriguez * copyright notice and this permission notice appear in all copies. 7203c4805SLuis R. Rodriguez * 8203c4805SLuis R. Rodriguez * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9203c4805SLuis R. Rodriguez * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10203c4805SLuis R. Rodriguez * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11203c4805SLuis R. Rodriguez * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12203c4805SLuis R. Rodriguez * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13203c4805SLuis R. Rodriguez * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14203c4805SLuis R. Rodriguez * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15203c4805SLuis R. Rodriguez */ 16203c4805SLuis R. Rodriguez 17203c4805SLuis R. Rodriguez #include "ath9k.h" 18b622a720SLuis R. Rodriguez #include "ar9003_mac.h" 19203c4805SLuis R. Rodriguez 20b5c80475SFelix Fietkau #define SKB_CB_ATHBUF(__skb) (*((struct ath_buf **)__skb->cb)) 21b5c80475SFelix Fietkau 22102885a5SVasanthakumar Thiagarajan static inline bool ath_is_alt_ant_ratio_better(int alt_ratio, int maxdelta, 23102885a5SVasanthakumar Thiagarajan int mindelta, int main_rssi_avg, 24102885a5SVasanthakumar Thiagarajan int alt_rssi_avg, int pkt_count) 25102885a5SVasanthakumar Thiagarajan { 26102885a5SVasanthakumar Thiagarajan return (((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) && 27102885a5SVasanthakumar Thiagarajan (alt_rssi_avg > main_rssi_avg + maxdelta)) || 28102885a5SVasanthakumar Thiagarajan (alt_rssi_avg > main_rssi_avg + mindelta)) && (pkt_count > 50); 29102885a5SVasanthakumar Thiagarajan } 30102885a5SVasanthakumar Thiagarajan 31b85c5734SMohammed Shafi Shajakhan static inline bool ath_ant_div_comb_alt_check(u8 div_group, int alt_ratio, 32b85c5734SMohammed Shafi Shajakhan int curr_main_set, int curr_alt_set, 33b85c5734SMohammed Shafi Shajakhan int alt_rssi_avg, int main_rssi_avg) 34b85c5734SMohammed Shafi Shajakhan { 35b85c5734SMohammed Shafi Shajakhan bool result = false; 36b85c5734SMohammed Shafi Shajakhan switch (div_group) { 37b85c5734SMohammed Shafi Shajakhan case 0: 38b85c5734SMohammed Shafi Shajakhan if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO) 39b85c5734SMohammed Shafi Shajakhan result = true; 40b85c5734SMohammed Shafi Shajakhan break; 41b85c5734SMohammed Shafi Shajakhan case 1: 4266ce235aSGabor Juhos case 2: 43b85c5734SMohammed Shafi Shajakhan if ((((curr_main_set == ATH_ANT_DIV_COMB_LNA2) && 44b85c5734SMohammed Shafi Shajakhan (curr_alt_set == ATH_ANT_DIV_COMB_LNA1) && 45b85c5734SMohammed Shafi Shajakhan (alt_rssi_avg >= (main_rssi_avg - 5))) || 46b85c5734SMohammed Shafi Shajakhan ((curr_main_set == ATH_ANT_DIV_COMB_LNA1) && 47b85c5734SMohammed Shafi Shajakhan (curr_alt_set == ATH_ANT_DIV_COMB_LNA2) && 48b85c5734SMohammed Shafi Shajakhan (alt_rssi_avg >= (main_rssi_avg - 2)))) && 49b85c5734SMohammed Shafi Shajakhan (alt_rssi_avg >= 4)) 50b85c5734SMohammed Shafi Shajakhan result = true; 51b85c5734SMohammed Shafi Shajakhan else 52b85c5734SMohammed Shafi Shajakhan result = false; 53b85c5734SMohammed Shafi Shajakhan break; 54b85c5734SMohammed Shafi Shajakhan } 55b85c5734SMohammed Shafi Shajakhan 56b85c5734SMohammed Shafi Shajakhan return result; 57b85c5734SMohammed Shafi Shajakhan } 58b85c5734SMohammed Shafi Shajakhan 59ededf1f8SVasanthakumar Thiagarajan static inline bool ath9k_check_auto_sleep(struct ath_softc *sc) 60ededf1f8SVasanthakumar Thiagarajan { 61ededf1f8SVasanthakumar Thiagarajan return sc->ps_enabled && 62ededf1f8SVasanthakumar Thiagarajan (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP); 63ededf1f8SVasanthakumar Thiagarajan } 64ededf1f8SVasanthakumar Thiagarajan 65203c4805SLuis R. Rodriguez /* 66203c4805SLuis R. Rodriguez * Setup and link descriptors. 67203c4805SLuis R. Rodriguez * 68203c4805SLuis R. Rodriguez * 11N: we can no longer afford to self link the last descriptor. 69203c4805SLuis R. Rodriguez * MAC acknowledges BA status as long as it copies frames to host 70203c4805SLuis R. Rodriguez * buffer (or rx fifo). This can incorrectly acknowledge packets 71203c4805SLuis R. Rodriguez * to a sender if last desc is self-linked. 72203c4805SLuis R. Rodriguez */ 73203c4805SLuis R. Rodriguez static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf) 74203c4805SLuis R. Rodriguez { 75203c4805SLuis R. Rodriguez struct ath_hw *ah = sc->sc_ah; 76cc861f74SLuis R. Rodriguez struct ath_common *common = ath9k_hw_common(ah); 77203c4805SLuis R. Rodriguez struct ath_desc *ds; 78203c4805SLuis R. Rodriguez struct sk_buff *skb; 79203c4805SLuis R. Rodriguez 80203c4805SLuis R. Rodriguez ATH_RXBUF_RESET(bf); 81203c4805SLuis R. Rodriguez 82203c4805SLuis R. Rodriguez ds = bf->bf_desc; 83203c4805SLuis R. Rodriguez ds->ds_link = 0; /* link to null */ 84203c4805SLuis R. Rodriguez ds->ds_data = bf->bf_buf_addr; 85203c4805SLuis R. Rodriguez 86203c4805SLuis R. Rodriguez /* virtual addr of the beginning of the buffer. */ 87203c4805SLuis R. Rodriguez skb = bf->bf_mpdu; 889680e8a3SLuis R. Rodriguez BUG_ON(skb == NULL); 89203c4805SLuis R. Rodriguez ds->ds_vdata = skb->data; 90203c4805SLuis R. Rodriguez 91cc861f74SLuis R. Rodriguez /* 92cc861f74SLuis R. Rodriguez * setup rx descriptors. The rx_bufsize here tells the hardware 93203c4805SLuis R. Rodriguez * how much data it can DMA to us and that we are prepared 94cc861f74SLuis R. Rodriguez * to process 95cc861f74SLuis R. Rodriguez */ 96203c4805SLuis R. Rodriguez ath9k_hw_setuprxdesc(ah, ds, 97cc861f74SLuis R. Rodriguez common->rx_bufsize, 98203c4805SLuis R. Rodriguez 0); 99203c4805SLuis R. Rodriguez 100203c4805SLuis R. Rodriguez if (sc->rx.rxlink == NULL) 101203c4805SLuis R. Rodriguez ath9k_hw_putrxbuf(ah, bf->bf_daddr); 102203c4805SLuis R. Rodriguez else 103203c4805SLuis R. Rodriguez *sc->rx.rxlink = bf->bf_daddr; 104203c4805SLuis R. Rodriguez 105203c4805SLuis R. Rodriguez sc->rx.rxlink = &ds->ds_link; 106203c4805SLuis R. Rodriguez } 107203c4805SLuis R. Rodriguez 108203c4805SLuis R. Rodriguez static void ath_setdefantenna(struct ath_softc *sc, u32 antenna) 109203c4805SLuis R. Rodriguez { 110203c4805SLuis R. Rodriguez /* XXX block beacon interrupts */ 111203c4805SLuis R. Rodriguez ath9k_hw_setantenna(sc->sc_ah, antenna); 112203c4805SLuis R. Rodriguez sc->rx.defant = antenna; 113203c4805SLuis R. Rodriguez sc->rx.rxotherant = 0; 114203c4805SLuis R. Rodriguez } 115203c4805SLuis R. Rodriguez 116203c4805SLuis R. Rodriguez static void ath_opmode_init(struct ath_softc *sc) 117203c4805SLuis R. Rodriguez { 118203c4805SLuis R. Rodriguez struct ath_hw *ah = sc->sc_ah; 1191510718dSLuis R. Rodriguez struct ath_common *common = ath9k_hw_common(ah); 1201510718dSLuis R. Rodriguez 121203c4805SLuis R. Rodriguez u32 rfilt, mfilt[2]; 122203c4805SLuis R. Rodriguez 123203c4805SLuis R. Rodriguez /* configure rx filter */ 124203c4805SLuis R. Rodriguez rfilt = ath_calcrxfilter(sc); 125203c4805SLuis R. Rodriguez ath9k_hw_setrxfilter(ah, rfilt); 126203c4805SLuis R. Rodriguez 127203c4805SLuis R. Rodriguez /* configure bssid mask */ 12813b81559SLuis R. Rodriguez ath_hw_setbssidmask(common); 129203c4805SLuis R. Rodriguez 130203c4805SLuis R. Rodriguez /* configure operational mode */ 131203c4805SLuis R. Rodriguez ath9k_hw_setopmode(ah); 132203c4805SLuis R. Rodriguez 133203c4805SLuis R. Rodriguez /* calculate and install multicast filter */ 134203c4805SLuis R. Rodriguez mfilt[0] = mfilt[1] = ~0; 135203c4805SLuis R. Rodriguez ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]); 136203c4805SLuis R. Rodriguez } 137203c4805SLuis R. Rodriguez 138b5c80475SFelix Fietkau static bool ath_rx_edma_buf_link(struct ath_softc *sc, 139b5c80475SFelix Fietkau enum ath9k_rx_qtype qtype) 140b5c80475SFelix Fietkau { 141b5c80475SFelix Fietkau struct ath_hw *ah = sc->sc_ah; 142b5c80475SFelix Fietkau struct ath_rx_edma *rx_edma; 143b5c80475SFelix Fietkau struct sk_buff *skb; 144b5c80475SFelix Fietkau struct ath_buf *bf; 145b5c80475SFelix Fietkau 146b5c80475SFelix Fietkau rx_edma = &sc->rx.rx_edma[qtype]; 147b5c80475SFelix Fietkau if (skb_queue_len(&rx_edma->rx_fifo) >= rx_edma->rx_fifo_hwsize) 148b5c80475SFelix Fietkau return false; 149b5c80475SFelix Fietkau 150b5c80475SFelix Fietkau bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list); 151b5c80475SFelix Fietkau list_del_init(&bf->list); 152b5c80475SFelix Fietkau 153b5c80475SFelix Fietkau skb = bf->bf_mpdu; 154b5c80475SFelix Fietkau 155b5c80475SFelix Fietkau ATH_RXBUF_RESET(bf); 156b5c80475SFelix Fietkau memset(skb->data, 0, ah->caps.rx_status_len); 157b5c80475SFelix Fietkau dma_sync_single_for_device(sc->dev, bf->bf_buf_addr, 158b5c80475SFelix Fietkau ah->caps.rx_status_len, DMA_TO_DEVICE); 159b5c80475SFelix Fietkau 160b5c80475SFelix Fietkau SKB_CB_ATHBUF(skb) = bf; 161b5c80475SFelix Fietkau ath9k_hw_addrxbuf_edma(ah, bf->bf_buf_addr, qtype); 162b5c80475SFelix Fietkau skb_queue_tail(&rx_edma->rx_fifo, skb); 163b5c80475SFelix Fietkau 164b5c80475SFelix Fietkau return true; 165b5c80475SFelix Fietkau } 166b5c80475SFelix Fietkau 167b5c80475SFelix Fietkau static void ath_rx_addbuffer_edma(struct ath_softc *sc, 168b5c80475SFelix Fietkau enum ath9k_rx_qtype qtype, int size) 169b5c80475SFelix Fietkau { 170b5c80475SFelix Fietkau struct ath_common *common = ath9k_hw_common(sc->sc_ah); 171b5c80475SFelix Fietkau u32 nbuf = 0; 172b5c80475SFelix Fietkau 173b5c80475SFelix Fietkau if (list_empty(&sc->rx.rxbuf)) { 174226afe68SJoe Perches ath_dbg(common, ATH_DBG_QUEUE, "No free rx buf available\n"); 175b5c80475SFelix Fietkau return; 176b5c80475SFelix Fietkau } 177b5c80475SFelix Fietkau 178b5c80475SFelix Fietkau while (!list_empty(&sc->rx.rxbuf)) { 179b5c80475SFelix Fietkau nbuf++; 180b5c80475SFelix Fietkau 181b5c80475SFelix Fietkau if (!ath_rx_edma_buf_link(sc, qtype)) 182b5c80475SFelix Fietkau break; 183b5c80475SFelix Fietkau 184b5c80475SFelix Fietkau if (nbuf >= size) 185b5c80475SFelix Fietkau break; 186b5c80475SFelix Fietkau } 187b5c80475SFelix Fietkau } 188b5c80475SFelix Fietkau 189b5c80475SFelix Fietkau static void ath_rx_remove_buffer(struct ath_softc *sc, 190b5c80475SFelix Fietkau enum ath9k_rx_qtype qtype) 191b5c80475SFelix Fietkau { 192b5c80475SFelix Fietkau struct ath_buf *bf; 193b5c80475SFelix Fietkau struct ath_rx_edma *rx_edma; 194b5c80475SFelix Fietkau struct sk_buff *skb; 195b5c80475SFelix Fietkau 196b5c80475SFelix Fietkau rx_edma = &sc->rx.rx_edma[qtype]; 197b5c80475SFelix Fietkau 198b5c80475SFelix Fietkau while ((skb = skb_dequeue(&rx_edma->rx_fifo)) != NULL) { 199b5c80475SFelix Fietkau bf = SKB_CB_ATHBUF(skb); 200b5c80475SFelix Fietkau BUG_ON(!bf); 201b5c80475SFelix Fietkau list_add_tail(&bf->list, &sc->rx.rxbuf); 202b5c80475SFelix Fietkau } 203b5c80475SFelix Fietkau } 204b5c80475SFelix Fietkau 205b5c80475SFelix Fietkau static void ath_rx_edma_cleanup(struct ath_softc *sc) 206b5c80475SFelix Fietkau { 207b5c80475SFelix Fietkau struct ath_buf *bf; 208b5c80475SFelix Fietkau 209b5c80475SFelix Fietkau ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP); 210b5c80475SFelix Fietkau ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP); 211b5c80475SFelix Fietkau 212b5c80475SFelix Fietkau list_for_each_entry(bf, &sc->rx.rxbuf, list) { 213b5c80475SFelix Fietkau if (bf->bf_mpdu) 214b5c80475SFelix Fietkau dev_kfree_skb_any(bf->bf_mpdu); 215b5c80475SFelix Fietkau } 216b5c80475SFelix Fietkau 217b5c80475SFelix Fietkau INIT_LIST_HEAD(&sc->rx.rxbuf); 218b5c80475SFelix Fietkau 219b5c80475SFelix Fietkau kfree(sc->rx.rx_bufptr); 220b5c80475SFelix Fietkau sc->rx.rx_bufptr = NULL; 221b5c80475SFelix Fietkau } 222b5c80475SFelix Fietkau 223b5c80475SFelix Fietkau static void ath_rx_edma_init_queue(struct ath_rx_edma *rx_edma, int size) 224b5c80475SFelix Fietkau { 225b5c80475SFelix Fietkau skb_queue_head_init(&rx_edma->rx_fifo); 226b5c80475SFelix Fietkau skb_queue_head_init(&rx_edma->rx_buffers); 227b5c80475SFelix Fietkau rx_edma->rx_fifo_hwsize = size; 228b5c80475SFelix Fietkau } 229b5c80475SFelix Fietkau 230b5c80475SFelix Fietkau static int ath_rx_edma_init(struct ath_softc *sc, int nbufs) 231b5c80475SFelix Fietkau { 232b5c80475SFelix Fietkau struct ath_common *common = ath9k_hw_common(sc->sc_ah); 233b5c80475SFelix Fietkau struct ath_hw *ah = sc->sc_ah; 234b5c80475SFelix Fietkau struct sk_buff *skb; 235b5c80475SFelix Fietkau struct ath_buf *bf; 236b5c80475SFelix Fietkau int error = 0, i; 237b5c80475SFelix Fietkau u32 size; 238b5c80475SFelix Fietkau 239b5c80475SFelix Fietkau ath9k_hw_set_rx_bufsize(ah, common->rx_bufsize - 240b5c80475SFelix Fietkau ah->caps.rx_status_len); 241b5c80475SFelix Fietkau 242b5c80475SFelix Fietkau ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_LP], 243b5c80475SFelix Fietkau ah->caps.rx_lp_qdepth); 244b5c80475SFelix Fietkau ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_HP], 245b5c80475SFelix Fietkau ah->caps.rx_hp_qdepth); 246b5c80475SFelix Fietkau 247b5c80475SFelix Fietkau size = sizeof(struct ath_buf) * nbufs; 248b5c80475SFelix Fietkau bf = kzalloc(size, GFP_KERNEL); 249b5c80475SFelix Fietkau if (!bf) 250b5c80475SFelix Fietkau return -ENOMEM; 251b5c80475SFelix Fietkau 252b5c80475SFelix Fietkau INIT_LIST_HEAD(&sc->rx.rxbuf); 253b5c80475SFelix Fietkau sc->rx.rx_bufptr = bf; 254b5c80475SFelix Fietkau 255b5c80475SFelix Fietkau for (i = 0; i < nbufs; i++, bf++) { 256b5c80475SFelix Fietkau skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_KERNEL); 257b5c80475SFelix Fietkau if (!skb) { 258b5c80475SFelix Fietkau error = -ENOMEM; 259b5c80475SFelix Fietkau goto rx_init_fail; 260b5c80475SFelix Fietkau } 261b5c80475SFelix Fietkau 262b5c80475SFelix Fietkau memset(skb->data, 0, common->rx_bufsize); 263b5c80475SFelix Fietkau bf->bf_mpdu = skb; 264b5c80475SFelix Fietkau 265b5c80475SFelix Fietkau bf->bf_buf_addr = dma_map_single(sc->dev, skb->data, 266b5c80475SFelix Fietkau common->rx_bufsize, 267b5c80475SFelix Fietkau DMA_BIDIRECTIONAL); 268b5c80475SFelix Fietkau if (unlikely(dma_mapping_error(sc->dev, 269b5c80475SFelix Fietkau bf->bf_buf_addr))) { 270b5c80475SFelix Fietkau dev_kfree_skb_any(skb); 271b5c80475SFelix Fietkau bf->bf_mpdu = NULL; 2726cf9e995SBen Greear bf->bf_buf_addr = 0; 2733800276aSJoe Perches ath_err(common, 274b5c80475SFelix Fietkau "dma_mapping_error() on RX init\n"); 275b5c80475SFelix Fietkau error = -ENOMEM; 276b5c80475SFelix Fietkau goto rx_init_fail; 277b5c80475SFelix Fietkau } 278b5c80475SFelix Fietkau 279b5c80475SFelix Fietkau list_add_tail(&bf->list, &sc->rx.rxbuf); 280b5c80475SFelix Fietkau } 281b5c80475SFelix Fietkau 282b5c80475SFelix Fietkau return 0; 283b5c80475SFelix Fietkau 284b5c80475SFelix Fietkau rx_init_fail: 285b5c80475SFelix Fietkau ath_rx_edma_cleanup(sc); 286b5c80475SFelix Fietkau return error; 287b5c80475SFelix Fietkau } 288b5c80475SFelix Fietkau 289b5c80475SFelix Fietkau static void ath_edma_start_recv(struct ath_softc *sc) 290b5c80475SFelix Fietkau { 291b5c80475SFelix Fietkau spin_lock_bh(&sc->rx.rxbuflock); 292b5c80475SFelix Fietkau 293b5c80475SFelix Fietkau ath9k_hw_rxena(sc->sc_ah); 294b5c80475SFelix Fietkau 295b5c80475SFelix Fietkau ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_HP, 296b5c80475SFelix Fietkau sc->rx.rx_edma[ATH9K_RX_QUEUE_HP].rx_fifo_hwsize); 297b5c80475SFelix Fietkau 298b5c80475SFelix Fietkau ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_LP, 299b5c80475SFelix Fietkau sc->rx.rx_edma[ATH9K_RX_QUEUE_LP].rx_fifo_hwsize); 300b5c80475SFelix Fietkau 301b5c80475SFelix Fietkau ath_opmode_init(sc); 302b5c80475SFelix Fietkau 30348a6a468SLuis R. Rodriguez ath9k_hw_startpcureceive(sc->sc_ah, (sc->sc_flags & SC_OP_OFFCHANNEL)); 3047583c550SLuis R. Rodriguez 3057583c550SLuis R. Rodriguez spin_unlock_bh(&sc->rx.rxbuflock); 306b5c80475SFelix Fietkau } 307b5c80475SFelix Fietkau 308b5c80475SFelix Fietkau static void ath_edma_stop_recv(struct ath_softc *sc) 309b5c80475SFelix Fietkau { 310b5c80475SFelix Fietkau ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP); 311b5c80475SFelix Fietkau ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP); 312b5c80475SFelix Fietkau } 313b5c80475SFelix Fietkau 314203c4805SLuis R. Rodriguez int ath_rx_init(struct ath_softc *sc, int nbufs) 315203c4805SLuis R. Rodriguez { 31627c51f1aSLuis R. Rodriguez struct ath_common *common = ath9k_hw_common(sc->sc_ah); 317203c4805SLuis R. Rodriguez struct sk_buff *skb; 318203c4805SLuis R. Rodriguez struct ath_buf *bf; 319203c4805SLuis R. Rodriguez int error = 0; 320203c4805SLuis R. Rodriguez 3214bdd1e97SLuis R. Rodriguez spin_lock_init(&sc->sc_pcu_lock); 322203c4805SLuis R. Rodriguez sc->sc_flags &= ~SC_OP_RXFLUSH; 323203c4805SLuis R. Rodriguez spin_lock_init(&sc->rx.rxbuflock); 324203c4805SLuis R. Rodriguez 3250d95521eSFelix Fietkau common->rx_bufsize = IEEE80211_MAX_MPDU_LEN / 2 + 3260d95521eSFelix Fietkau sc->sc_ah->caps.rx_status_len; 3270d95521eSFelix Fietkau 328b5c80475SFelix Fietkau if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) { 329b5c80475SFelix Fietkau return ath_rx_edma_init(sc, nbufs); 330b5c80475SFelix Fietkau } else { 331226afe68SJoe Perches ath_dbg(common, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n", 332cc861f74SLuis R. Rodriguez common->cachelsz, common->rx_bufsize); 333203c4805SLuis R. Rodriguez 334203c4805SLuis R. Rodriguez /* Initialize rx descriptors */ 335203c4805SLuis R. Rodriguez 336203c4805SLuis R. Rodriguez error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf, 3374adfcdedSVasanthakumar Thiagarajan "rx", nbufs, 1, 0); 338203c4805SLuis R. Rodriguez if (error != 0) { 3393800276aSJoe Perches ath_err(common, 340b5c80475SFelix Fietkau "failed to allocate rx descriptors: %d\n", 341b5c80475SFelix Fietkau error); 342203c4805SLuis R. Rodriguez goto err; 343203c4805SLuis R. Rodriguez } 344203c4805SLuis R. Rodriguez 345203c4805SLuis R. Rodriguez list_for_each_entry(bf, &sc->rx.rxbuf, list) { 346b5c80475SFelix Fietkau skb = ath_rxbuf_alloc(common, common->rx_bufsize, 347b5c80475SFelix Fietkau GFP_KERNEL); 348203c4805SLuis R. Rodriguez if (skb == NULL) { 349203c4805SLuis R. Rodriguez error = -ENOMEM; 350203c4805SLuis R. Rodriguez goto err; 351203c4805SLuis R. Rodriguez } 352203c4805SLuis R. Rodriguez 353203c4805SLuis R. Rodriguez bf->bf_mpdu = skb; 354203c4805SLuis R. Rodriguez bf->bf_buf_addr = dma_map_single(sc->dev, skb->data, 355cc861f74SLuis R. Rodriguez common->rx_bufsize, 356203c4805SLuis R. Rodriguez DMA_FROM_DEVICE); 357203c4805SLuis R. Rodriguez if (unlikely(dma_mapping_error(sc->dev, 358203c4805SLuis R. Rodriguez bf->bf_buf_addr))) { 359203c4805SLuis R. Rodriguez dev_kfree_skb_any(skb); 360203c4805SLuis R. Rodriguez bf->bf_mpdu = NULL; 3616cf9e995SBen Greear bf->bf_buf_addr = 0; 3623800276aSJoe Perches ath_err(common, 363203c4805SLuis R. Rodriguez "dma_mapping_error() on RX init\n"); 364203c4805SLuis R. Rodriguez error = -ENOMEM; 365203c4805SLuis R. Rodriguez goto err; 366203c4805SLuis R. Rodriguez } 367203c4805SLuis R. Rodriguez } 368203c4805SLuis R. Rodriguez sc->rx.rxlink = NULL; 369b5c80475SFelix Fietkau } 370203c4805SLuis R. Rodriguez 371203c4805SLuis R. Rodriguez err: 372203c4805SLuis R. Rodriguez if (error) 373203c4805SLuis R. Rodriguez ath_rx_cleanup(sc); 374203c4805SLuis R. Rodriguez 375203c4805SLuis R. Rodriguez return error; 376203c4805SLuis R. Rodriguez } 377203c4805SLuis R. Rodriguez 378203c4805SLuis R. Rodriguez void ath_rx_cleanup(struct ath_softc *sc) 379203c4805SLuis R. Rodriguez { 380cc861f74SLuis R. Rodriguez struct ath_hw *ah = sc->sc_ah; 381cc861f74SLuis R. Rodriguez struct ath_common *common = ath9k_hw_common(ah); 382203c4805SLuis R. Rodriguez struct sk_buff *skb; 383203c4805SLuis R. Rodriguez struct ath_buf *bf; 384203c4805SLuis R. Rodriguez 385b5c80475SFelix Fietkau if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) { 386b5c80475SFelix Fietkau ath_rx_edma_cleanup(sc); 387b5c80475SFelix Fietkau return; 388b5c80475SFelix Fietkau } else { 389203c4805SLuis R. Rodriguez list_for_each_entry(bf, &sc->rx.rxbuf, list) { 390203c4805SLuis R. Rodriguez skb = bf->bf_mpdu; 391203c4805SLuis R. Rodriguez if (skb) { 392203c4805SLuis R. Rodriguez dma_unmap_single(sc->dev, bf->bf_buf_addr, 393b5c80475SFelix Fietkau common->rx_bufsize, 394b5c80475SFelix Fietkau DMA_FROM_DEVICE); 395203c4805SLuis R. Rodriguez dev_kfree_skb(skb); 3966cf9e995SBen Greear bf->bf_buf_addr = 0; 3976cf9e995SBen Greear bf->bf_mpdu = NULL; 398203c4805SLuis R. Rodriguez } 399203c4805SLuis R. Rodriguez } 400203c4805SLuis R. Rodriguez 401203c4805SLuis R. Rodriguez if (sc->rx.rxdma.dd_desc_len != 0) 402203c4805SLuis R. Rodriguez ath_descdma_cleanup(sc, &sc->rx.rxdma, &sc->rx.rxbuf); 403203c4805SLuis R. Rodriguez } 404b5c80475SFelix Fietkau } 405203c4805SLuis R. Rodriguez 406203c4805SLuis R. Rodriguez /* 407203c4805SLuis R. Rodriguez * Calculate the receive filter according to the 408203c4805SLuis R. Rodriguez * operating mode and state: 409203c4805SLuis R. Rodriguez * 410203c4805SLuis R. Rodriguez * o always accept unicast, broadcast, and multicast traffic 411203c4805SLuis R. Rodriguez * o maintain current state of phy error reception (the hal 412203c4805SLuis R. Rodriguez * may enable phy error frames for noise immunity work) 413203c4805SLuis R. Rodriguez * o probe request frames are accepted only when operating in 414203c4805SLuis R. Rodriguez * hostap, adhoc, or monitor modes 415203c4805SLuis R. Rodriguez * o enable promiscuous mode according to the interface state 416203c4805SLuis R. Rodriguez * o accept beacons: 417203c4805SLuis R. Rodriguez * - when operating in adhoc mode so the 802.11 layer creates 418203c4805SLuis R. Rodriguez * node table entries for peers, 419203c4805SLuis R. Rodriguez * - when operating in station mode for collecting rssi data when 420203c4805SLuis R. Rodriguez * the station is otherwise quiet, or 421203c4805SLuis R. Rodriguez * - when operating as a repeater so we see repeater-sta beacons 422203c4805SLuis R. Rodriguez * - when scanning 423203c4805SLuis R. Rodriguez */ 424203c4805SLuis R. Rodriguez 425203c4805SLuis R. Rodriguez u32 ath_calcrxfilter(struct ath_softc *sc) 426203c4805SLuis R. Rodriguez { 427203c4805SLuis R. Rodriguez #define RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR) 428203c4805SLuis R. Rodriguez 429203c4805SLuis R. Rodriguez u32 rfilt; 430203c4805SLuis R. Rodriguez 431203c4805SLuis R. Rodriguez rfilt = (ath9k_hw_getrxfilter(sc->sc_ah) & RX_FILTER_PRESERVE) 432203c4805SLuis R. Rodriguez | ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST 433203c4805SLuis R. Rodriguez | ATH9K_RX_FILTER_MCAST; 434203c4805SLuis R. Rodriguez 4359c1d8e4aSJouni Malinen if (sc->rx.rxfilter & FIF_PROBE_REQ) 436203c4805SLuis R. Rodriguez rfilt |= ATH9K_RX_FILTER_PROBEREQ; 437203c4805SLuis R. Rodriguez 438203c4805SLuis R. Rodriguez /* 439203c4805SLuis R. Rodriguez * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station 440203c4805SLuis R. Rodriguez * mode interface or when in monitor mode. AP mode does not need this 441203c4805SLuis R. Rodriguez * since it receives all in-BSS frames anyway. 442203c4805SLuis R. Rodriguez */ 4432e286947SFelix Fietkau if (sc->sc_ah->is_monitoring) 444203c4805SLuis R. Rodriguez rfilt |= ATH9K_RX_FILTER_PROM; 445203c4805SLuis R. Rodriguez 446203c4805SLuis R. Rodriguez if (sc->rx.rxfilter & FIF_CONTROL) 447203c4805SLuis R. Rodriguez rfilt |= ATH9K_RX_FILTER_CONTROL; 448203c4805SLuis R. Rodriguez 449203c4805SLuis R. Rodriguez if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) && 450cfda6695SBen Greear (sc->nvifs <= 1) && 451203c4805SLuis R. Rodriguez !(sc->rx.rxfilter & FIF_BCN_PRBRESP_PROMISC)) 452203c4805SLuis R. Rodriguez rfilt |= ATH9K_RX_FILTER_MYBEACON; 453203c4805SLuis R. Rodriguez else 454203c4805SLuis R. Rodriguez rfilt |= ATH9K_RX_FILTER_BEACON; 455203c4805SLuis R. Rodriguez 456264bbec8SFelix Fietkau if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) || 45766afad01SSenthil Balasubramanian (sc->rx.rxfilter & FIF_PSPOLL)) 458203c4805SLuis R. Rodriguez rfilt |= ATH9K_RX_FILTER_PSPOLL; 459203c4805SLuis R. Rodriguez 4607ea310beSSujith if (conf_is_ht(&sc->hw->conf)) 4617ea310beSSujith rfilt |= ATH9K_RX_FILTER_COMP_BAR; 4627ea310beSSujith 4637545daf4SFelix Fietkau if (sc->nvifs > 1 || (sc->rx.rxfilter & FIF_OTHER_BSS)) { 4645eb6ba83SJavier Cardona /* The following may also be needed for other older chips */ 4655eb6ba83SJavier Cardona if (sc->sc_ah->hw_version.macVersion == AR_SREV_VERSION_9160) 4665eb6ba83SJavier Cardona rfilt |= ATH9K_RX_FILTER_PROM; 467203c4805SLuis R. Rodriguez rfilt |= ATH9K_RX_FILTER_MCAST_BCAST_ALL; 468203c4805SLuis R. Rodriguez } 469203c4805SLuis R. Rodriguez 470203c4805SLuis R. Rodriguez return rfilt; 471203c4805SLuis R. Rodriguez 472203c4805SLuis R. Rodriguez #undef RX_FILTER_PRESERVE 473203c4805SLuis R. Rodriguez } 474203c4805SLuis R. Rodriguez 475203c4805SLuis R. Rodriguez int ath_startrecv(struct ath_softc *sc) 476203c4805SLuis R. Rodriguez { 477203c4805SLuis R. Rodriguez struct ath_hw *ah = sc->sc_ah; 478203c4805SLuis R. Rodriguez struct ath_buf *bf, *tbf; 479203c4805SLuis R. Rodriguez 480b5c80475SFelix Fietkau if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) { 481b5c80475SFelix Fietkau ath_edma_start_recv(sc); 482b5c80475SFelix Fietkau return 0; 483b5c80475SFelix Fietkau } 484b5c80475SFelix Fietkau 485203c4805SLuis R. Rodriguez spin_lock_bh(&sc->rx.rxbuflock); 486203c4805SLuis R. Rodriguez if (list_empty(&sc->rx.rxbuf)) 487203c4805SLuis R. Rodriguez goto start_recv; 488203c4805SLuis R. Rodriguez 489203c4805SLuis R. Rodriguez sc->rx.rxlink = NULL; 490203c4805SLuis R. Rodriguez list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) { 491203c4805SLuis R. Rodriguez ath_rx_buf_link(sc, bf); 492203c4805SLuis R. Rodriguez } 493203c4805SLuis R. Rodriguez 494203c4805SLuis R. Rodriguez /* We could have deleted elements so the list may be empty now */ 495203c4805SLuis R. Rodriguez if (list_empty(&sc->rx.rxbuf)) 496203c4805SLuis R. Rodriguez goto start_recv; 497203c4805SLuis R. Rodriguez 498203c4805SLuis R. Rodriguez bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list); 499203c4805SLuis R. Rodriguez ath9k_hw_putrxbuf(ah, bf->bf_daddr); 500203c4805SLuis R. Rodriguez ath9k_hw_rxena(ah); 501203c4805SLuis R. Rodriguez 502203c4805SLuis R. Rodriguez start_recv: 503203c4805SLuis R. Rodriguez ath_opmode_init(sc); 50448a6a468SLuis R. Rodriguez ath9k_hw_startpcureceive(ah, (sc->sc_flags & SC_OP_OFFCHANNEL)); 505203c4805SLuis R. Rodriguez 5067583c550SLuis R. Rodriguez spin_unlock_bh(&sc->rx.rxbuflock); 5077583c550SLuis R. Rodriguez 508203c4805SLuis R. Rodriguez return 0; 509203c4805SLuis R. Rodriguez } 510203c4805SLuis R. Rodriguez 511203c4805SLuis R. Rodriguez bool ath_stoprecv(struct ath_softc *sc) 512203c4805SLuis R. Rodriguez { 513203c4805SLuis R. Rodriguez struct ath_hw *ah = sc->sc_ah; 5145882da02SFelix Fietkau bool stopped, reset = false; 515203c4805SLuis R. Rodriguez 5161e450285SLuis R. Rodriguez spin_lock_bh(&sc->rx.rxbuflock); 517d47844a0SFelix Fietkau ath9k_hw_abortpcurecv(ah); 518203c4805SLuis R. Rodriguez ath9k_hw_setrxfilter(ah, 0); 5195882da02SFelix Fietkau stopped = ath9k_hw_stopdmarecv(ah, &reset); 520b5c80475SFelix Fietkau 521b5c80475SFelix Fietkau if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) 522b5c80475SFelix Fietkau ath_edma_stop_recv(sc); 523b5c80475SFelix Fietkau else 524203c4805SLuis R. Rodriguez sc->rx.rxlink = NULL; 5251e450285SLuis R. Rodriguez spin_unlock_bh(&sc->rx.rxbuflock); 526203c4805SLuis R. Rodriguez 527d584747bSRajkumar Manoharan if (!(ah->ah_flags & AH_UNPLUGGED) && 528d584747bSRajkumar Manoharan unlikely(!stopped)) { 529d7fd1b50SBen Greear ath_err(ath9k_hw_common(sc->sc_ah), 530d7fd1b50SBen Greear "Could not stop RX, we could be " 53178a7685eSLuis R. Rodriguez "confusing the DMA engine when we start RX up\n"); 532d7fd1b50SBen Greear ATH_DBG_WARN_ON_ONCE(!stopped); 533d7fd1b50SBen Greear } 5342232d31bSFelix Fietkau return stopped && !reset; 535203c4805SLuis R. Rodriguez } 536203c4805SLuis R. Rodriguez 537203c4805SLuis R. Rodriguez void ath_flushrecv(struct ath_softc *sc) 538203c4805SLuis R. Rodriguez { 539203c4805SLuis R. Rodriguez sc->sc_flags |= SC_OP_RXFLUSH; 540b5c80475SFelix Fietkau if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) 541b5c80475SFelix Fietkau ath_rx_tasklet(sc, 1, true); 542b5c80475SFelix Fietkau ath_rx_tasklet(sc, 1, false); 543203c4805SLuis R. Rodriguez sc->sc_flags &= ~SC_OP_RXFLUSH; 544203c4805SLuis R. Rodriguez } 545203c4805SLuis R. Rodriguez 546cc65965cSJouni Malinen static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb) 547cc65965cSJouni Malinen { 548cc65965cSJouni Malinen /* Check whether the Beacon frame has DTIM indicating buffered bc/mc */ 549cc65965cSJouni Malinen struct ieee80211_mgmt *mgmt; 550cc65965cSJouni Malinen u8 *pos, *end, id, elen; 551cc65965cSJouni Malinen struct ieee80211_tim_ie *tim; 552cc65965cSJouni Malinen 553cc65965cSJouni Malinen mgmt = (struct ieee80211_mgmt *)skb->data; 554cc65965cSJouni Malinen pos = mgmt->u.beacon.variable; 555cc65965cSJouni Malinen end = skb->data + skb->len; 556cc65965cSJouni Malinen 557cc65965cSJouni Malinen while (pos + 2 < end) { 558cc65965cSJouni Malinen id = *pos++; 559cc65965cSJouni Malinen elen = *pos++; 560cc65965cSJouni Malinen if (pos + elen > end) 561cc65965cSJouni Malinen break; 562cc65965cSJouni Malinen 563cc65965cSJouni Malinen if (id == WLAN_EID_TIM) { 564cc65965cSJouni Malinen if (elen < sizeof(*tim)) 565cc65965cSJouni Malinen break; 566cc65965cSJouni Malinen tim = (struct ieee80211_tim_ie *) pos; 567cc65965cSJouni Malinen if (tim->dtim_count != 0) 568cc65965cSJouni Malinen break; 569cc65965cSJouni Malinen return tim->bitmap_ctrl & 0x01; 570cc65965cSJouni Malinen } 571cc65965cSJouni Malinen 572cc65965cSJouni Malinen pos += elen; 573cc65965cSJouni Malinen } 574cc65965cSJouni Malinen 575cc65965cSJouni Malinen return false; 576cc65965cSJouni Malinen } 577cc65965cSJouni Malinen 578cc65965cSJouni Malinen static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb) 579cc65965cSJouni Malinen { 580cc65965cSJouni Malinen struct ieee80211_mgmt *mgmt; 5811510718dSLuis R. Rodriguez struct ath_common *common = ath9k_hw_common(sc->sc_ah); 582cc65965cSJouni Malinen 583cc65965cSJouni Malinen if (skb->len < 24 + 8 + 2 + 2) 584cc65965cSJouni Malinen return; 585cc65965cSJouni Malinen 586cc65965cSJouni Malinen mgmt = (struct ieee80211_mgmt *)skb->data; 5874801416cSBen Greear if (memcmp(common->curbssid, mgmt->bssid, ETH_ALEN) != 0) { 5884801416cSBen Greear /* TODO: This doesn't work well if you have stations 5894801416cSBen Greear * associated to two different APs because curbssid 5904801416cSBen Greear * is just the last AP that any of the stations associated 5914801416cSBen Greear * with. 5924801416cSBen Greear */ 593cc65965cSJouni Malinen return; /* not from our current AP */ 5944801416cSBen Greear } 595cc65965cSJouni Malinen 5961b04b930SSujith sc->ps_flags &= ~PS_WAIT_FOR_BEACON; 597293dc5dfSGabor Juhos 5981b04b930SSujith if (sc->ps_flags & PS_BEACON_SYNC) { 5991b04b930SSujith sc->ps_flags &= ~PS_BEACON_SYNC; 600226afe68SJoe Perches ath_dbg(common, ATH_DBG_PS, 601226afe68SJoe Perches "Reconfigure Beacon timers based on timestamp from the AP\n"); 60299e4d43aSRajkumar Manoharan ath_set_beacon(sc); 603deb75188SRajkumar Manoharan sc->ps_flags &= ~PS_TSFOOR_SYNC; 604ccdfeab6SJouni Malinen } 605ccdfeab6SJouni Malinen 606cc65965cSJouni Malinen if (ath_beacon_dtim_pending_cab(skb)) { 607cc65965cSJouni Malinen /* 608cc65965cSJouni Malinen * Remain awake waiting for buffered broadcast/multicast 60958f5fffdSGabor Juhos * frames. If the last broadcast/multicast frame is not 61058f5fffdSGabor Juhos * received properly, the next beacon frame will work as 61158f5fffdSGabor Juhos * a backup trigger for returning into NETWORK SLEEP state, 61258f5fffdSGabor Juhos * so we are waiting for it as well. 613cc65965cSJouni Malinen */ 614226afe68SJoe Perches ath_dbg(common, ATH_DBG_PS, 615226afe68SJoe Perches "Received DTIM beacon indicating buffered broadcast/multicast frame(s)\n"); 6161b04b930SSujith sc->ps_flags |= PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON; 617cc65965cSJouni Malinen return; 618cc65965cSJouni Malinen } 619cc65965cSJouni Malinen 6201b04b930SSujith if (sc->ps_flags & PS_WAIT_FOR_CAB) { 621cc65965cSJouni Malinen /* 622cc65965cSJouni Malinen * This can happen if a broadcast frame is dropped or the AP 623cc65965cSJouni Malinen * fails to send a frame indicating that all CAB frames have 624cc65965cSJouni Malinen * been delivered. 625cc65965cSJouni Malinen */ 6261b04b930SSujith sc->ps_flags &= ~PS_WAIT_FOR_CAB; 627226afe68SJoe Perches ath_dbg(common, ATH_DBG_PS, 628c46917bbSLuis R. Rodriguez "PS wait for CAB frames timed out\n"); 629cc65965cSJouni Malinen } 630cc65965cSJouni Malinen } 631cc65965cSJouni Malinen 632cc65965cSJouni Malinen static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb) 633cc65965cSJouni Malinen { 634cc65965cSJouni Malinen struct ieee80211_hdr *hdr; 635c46917bbSLuis R. Rodriguez struct ath_common *common = ath9k_hw_common(sc->sc_ah); 636cc65965cSJouni Malinen 637cc65965cSJouni Malinen hdr = (struct ieee80211_hdr *)skb->data; 638cc65965cSJouni Malinen 639cc65965cSJouni Malinen /* Process Beacon and CAB receive in PS state */ 640ededf1f8SVasanthakumar Thiagarajan if (((sc->ps_flags & PS_WAIT_FOR_BEACON) || ath9k_check_auto_sleep(sc)) 641ededf1f8SVasanthakumar Thiagarajan && ieee80211_is_beacon(hdr->frame_control)) 642cc65965cSJouni Malinen ath_rx_ps_beacon(sc, skb); 6431b04b930SSujith else if ((sc->ps_flags & PS_WAIT_FOR_CAB) && 644cc65965cSJouni Malinen (ieee80211_is_data(hdr->frame_control) || 645cc65965cSJouni Malinen ieee80211_is_action(hdr->frame_control)) && 646cc65965cSJouni Malinen is_multicast_ether_addr(hdr->addr1) && 647cc65965cSJouni Malinen !ieee80211_has_moredata(hdr->frame_control)) { 648cc65965cSJouni Malinen /* 649cc65965cSJouni Malinen * No more broadcast/multicast frames to be received at this 650cc65965cSJouni Malinen * point. 651cc65965cSJouni Malinen */ 6523fac6dfdSSenthil Balasubramanian sc->ps_flags &= ~(PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON); 653226afe68SJoe Perches ath_dbg(common, ATH_DBG_PS, 654c46917bbSLuis R. Rodriguez "All PS CAB frames received, back to sleep\n"); 6551b04b930SSujith } else if ((sc->ps_flags & PS_WAIT_FOR_PSPOLL_DATA) && 6569a23f9caSJouni Malinen !is_multicast_ether_addr(hdr->addr1) && 6579a23f9caSJouni Malinen !ieee80211_has_morefrags(hdr->frame_control)) { 6581b04b930SSujith sc->ps_flags &= ~PS_WAIT_FOR_PSPOLL_DATA; 659226afe68SJoe Perches ath_dbg(common, ATH_DBG_PS, 660226afe68SJoe Perches "Going back to sleep after having received PS-Poll data (0x%lx)\n", 6611b04b930SSujith sc->ps_flags & (PS_WAIT_FOR_BEACON | 6621b04b930SSujith PS_WAIT_FOR_CAB | 6631b04b930SSujith PS_WAIT_FOR_PSPOLL_DATA | 6641b04b930SSujith PS_WAIT_FOR_TX_ACK)); 665cc65965cSJouni Malinen } 666cc65965cSJouni Malinen } 667cc65965cSJouni Malinen 668b5c80475SFelix Fietkau static bool ath_edma_get_buffers(struct ath_softc *sc, 669b5c80475SFelix Fietkau enum ath9k_rx_qtype qtype) 670203c4805SLuis R. Rodriguez { 671b5c80475SFelix Fietkau struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype]; 672203c4805SLuis R. Rodriguez struct ath_hw *ah = sc->sc_ah; 67327c51f1aSLuis R. Rodriguez struct ath_common *common = ath9k_hw_common(ah); 674b5c80475SFelix Fietkau struct sk_buff *skb; 675b5c80475SFelix Fietkau struct ath_buf *bf; 676b5c80475SFelix Fietkau int ret; 677203c4805SLuis R. Rodriguez 678b5c80475SFelix Fietkau skb = skb_peek(&rx_edma->rx_fifo); 679b5c80475SFelix Fietkau if (!skb) 680b5c80475SFelix Fietkau return false; 681203c4805SLuis R. Rodriguez 682b5c80475SFelix Fietkau bf = SKB_CB_ATHBUF(skb); 683b5c80475SFelix Fietkau BUG_ON(!bf); 684b5c80475SFelix Fietkau 685ce9426d1SMing Lei dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr, 686b5c80475SFelix Fietkau common->rx_bufsize, DMA_FROM_DEVICE); 687b5c80475SFelix Fietkau 688b5c80475SFelix Fietkau ret = ath9k_hw_process_rxdesc_edma(ah, NULL, skb->data); 689ce9426d1SMing Lei if (ret == -EINPROGRESS) { 690ce9426d1SMing Lei /*let device gain the buffer again*/ 691ce9426d1SMing Lei dma_sync_single_for_device(sc->dev, bf->bf_buf_addr, 692ce9426d1SMing Lei common->rx_bufsize, DMA_FROM_DEVICE); 693b5c80475SFelix Fietkau return false; 694ce9426d1SMing Lei } 695b5c80475SFelix Fietkau 696b5c80475SFelix Fietkau __skb_unlink(skb, &rx_edma->rx_fifo); 697b5c80475SFelix Fietkau if (ret == -EINVAL) { 698b5c80475SFelix Fietkau /* corrupt descriptor, skip this one and the following one */ 699b5c80475SFelix Fietkau list_add_tail(&bf->list, &sc->rx.rxbuf); 700b5c80475SFelix Fietkau ath_rx_edma_buf_link(sc, qtype); 701b5c80475SFelix Fietkau skb = skb_peek(&rx_edma->rx_fifo); 702b5c80475SFelix Fietkau if (!skb) 703b5c80475SFelix Fietkau return true; 704b5c80475SFelix Fietkau 705b5c80475SFelix Fietkau bf = SKB_CB_ATHBUF(skb); 706b5c80475SFelix Fietkau BUG_ON(!bf); 707b5c80475SFelix Fietkau 708b5c80475SFelix Fietkau __skb_unlink(skb, &rx_edma->rx_fifo); 709b5c80475SFelix Fietkau list_add_tail(&bf->list, &sc->rx.rxbuf); 710b5c80475SFelix Fietkau ath_rx_edma_buf_link(sc, qtype); 711083e3e8dSVasanthakumar Thiagarajan return true; 712b5c80475SFelix Fietkau } 713b5c80475SFelix Fietkau skb_queue_tail(&rx_edma->rx_buffers, skb); 714b5c80475SFelix Fietkau 715b5c80475SFelix Fietkau return true; 716b5c80475SFelix Fietkau } 717b5c80475SFelix Fietkau 718b5c80475SFelix Fietkau static struct ath_buf *ath_edma_get_next_rx_buf(struct ath_softc *sc, 719b5c80475SFelix Fietkau struct ath_rx_status *rs, 720b5c80475SFelix Fietkau enum ath9k_rx_qtype qtype) 721b5c80475SFelix Fietkau { 722b5c80475SFelix Fietkau struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype]; 723b5c80475SFelix Fietkau struct sk_buff *skb; 724b5c80475SFelix Fietkau struct ath_buf *bf; 725b5c80475SFelix Fietkau 726b5c80475SFelix Fietkau while (ath_edma_get_buffers(sc, qtype)); 727b5c80475SFelix Fietkau skb = __skb_dequeue(&rx_edma->rx_buffers); 728b5c80475SFelix Fietkau if (!skb) 729b5c80475SFelix Fietkau return NULL; 730b5c80475SFelix Fietkau 731b5c80475SFelix Fietkau bf = SKB_CB_ATHBUF(skb); 732b5c80475SFelix Fietkau ath9k_hw_process_rxdesc_edma(sc->sc_ah, rs, skb->data); 733b5c80475SFelix Fietkau return bf; 734b5c80475SFelix Fietkau } 735b5c80475SFelix Fietkau 736b5c80475SFelix Fietkau static struct ath_buf *ath_get_next_rx_buf(struct ath_softc *sc, 737b5c80475SFelix Fietkau struct ath_rx_status *rs) 738b5c80475SFelix Fietkau { 739b5c80475SFelix Fietkau struct ath_hw *ah = sc->sc_ah; 740b5c80475SFelix Fietkau struct ath_common *common = ath9k_hw_common(ah); 741b5c80475SFelix Fietkau struct ath_desc *ds; 742b5c80475SFelix Fietkau struct ath_buf *bf; 743b5c80475SFelix Fietkau int ret; 744203c4805SLuis R. Rodriguez 745203c4805SLuis R. Rodriguez if (list_empty(&sc->rx.rxbuf)) { 746203c4805SLuis R. Rodriguez sc->rx.rxlink = NULL; 747b5c80475SFelix Fietkau return NULL; 748203c4805SLuis R. Rodriguez } 749203c4805SLuis R. Rodriguez 750203c4805SLuis R. Rodriguez bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list); 751203c4805SLuis R. Rodriguez ds = bf->bf_desc; 752203c4805SLuis R. Rodriguez 753203c4805SLuis R. Rodriguez /* 754203c4805SLuis R. Rodriguez * Must provide the virtual address of the current 755203c4805SLuis R. Rodriguez * descriptor, the physical address, and the virtual 756203c4805SLuis R. Rodriguez * address of the next descriptor in the h/w chain. 757203c4805SLuis R. Rodriguez * This allows the HAL to look ahead to see if the 758203c4805SLuis R. Rodriguez * hardware is done with a descriptor by checking the 759203c4805SLuis R. Rodriguez * done bit in the following descriptor and the address 760203c4805SLuis R. Rodriguez * of the current descriptor the DMA engine is working 761203c4805SLuis R. Rodriguez * on. All this is necessary because of our use of 762203c4805SLuis R. Rodriguez * a self-linked list to avoid rx overruns. 763203c4805SLuis R. Rodriguez */ 764b5c80475SFelix Fietkau ret = ath9k_hw_rxprocdesc(ah, ds, rs, 0); 765b5c80475SFelix Fietkau if (ret == -EINPROGRESS) { 76629bffa96SFelix Fietkau struct ath_rx_status trs; 767203c4805SLuis R. Rodriguez struct ath_buf *tbf; 768203c4805SLuis R. Rodriguez struct ath_desc *tds; 769203c4805SLuis R. Rodriguez 77029bffa96SFelix Fietkau memset(&trs, 0, sizeof(trs)); 771203c4805SLuis R. Rodriguez if (list_is_last(&bf->list, &sc->rx.rxbuf)) { 772203c4805SLuis R. Rodriguez sc->rx.rxlink = NULL; 773b5c80475SFelix Fietkau return NULL; 774203c4805SLuis R. Rodriguez } 775203c4805SLuis R. Rodriguez 776203c4805SLuis R. Rodriguez tbf = list_entry(bf->list.next, struct ath_buf, list); 777203c4805SLuis R. Rodriguez 778203c4805SLuis R. Rodriguez /* 779203c4805SLuis R. Rodriguez * On some hardware the descriptor status words could 780203c4805SLuis R. Rodriguez * get corrupted, including the done bit. Because of 781203c4805SLuis R. Rodriguez * this, check if the next descriptor's done bit is 782203c4805SLuis R. Rodriguez * set or not. 783203c4805SLuis R. Rodriguez * 784203c4805SLuis R. Rodriguez * If the next descriptor's done bit is set, the current 785203c4805SLuis R. Rodriguez * descriptor has been corrupted. Force s/w to discard 786203c4805SLuis R. Rodriguez * this descriptor and continue... 787203c4805SLuis R. Rodriguez */ 788203c4805SLuis R. Rodriguez 789203c4805SLuis R. Rodriguez tds = tbf->bf_desc; 790b5c80475SFelix Fietkau ret = ath9k_hw_rxprocdesc(ah, tds, &trs, 0); 791b5c80475SFelix Fietkau if (ret == -EINPROGRESS) 792b5c80475SFelix Fietkau return NULL; 793203c4805SLuis R. Rodriguez } 794203c4805SLuis R. Rodriguez 795b5c80475SFelix Fietkau if (!bf->bf_mpdu) 796b5c80475SFelix Fietkau return bf; 797203c4805SLuis R. Rodriguez 798203c4805SLuis R. Rodriguez /* 799203c4805SLuis R. Rodriguez * Synchronize the DMA transfer with CPU before 800203c4805SLuis R. Rodriguez * 1. accessing the frame 801203c4805SLuis R. Rodriguez * 2. requeueing the same buffer to h/w 802203c4805SLuis R. Rodriguez */ 803ce9426d1SMing Lei dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr, 804cc861f74SLuis R. Rodriguez common->rx_bufsize, 805203c4805SLuis R. Rodriguez DMA_FROM_DEVICE); 806203c4805SLuis R. Rodriguez 807b5c80475SFelix Fietkau return bf; 808b5c80475SFelix Fietkau } 809b5c80475SFelix Fietkau 810d435700fSSujith /* Assumes you've already done the endian to CPU conversion */ 811d435700fSSujith static bool ath9k_rx_accept(struct ath_common *common, 8129f167f64SVasanthakumar Thiagarajan struct ieee80211_hdr *hdr, 813d435700fSSujith struct ieee80211_rx_status *rxs, 814d435700fSSujith struct ath_rx_status *rx_stats, 815d435700fSSujith bool *decrypt_error) 816d435700fSSujith { 817*66760eacSFelix Fietkau bool is_mc, is_valid_tkip, strip_mic, mic_error; 818d435700fSSujith struct ath_hw *ah = common->ah; 819d435700fSSujith __le16 fc; 820b7b1b512SVasanthakumar Thiagarajan u8 rx_status_len = ah->caps.rx_status_len; 821d435700fSSujith 822d435700fSSujith fc = hdr->frame_control; 823d435700fSSujith 824*66760eacSFelix Fietkau is_mc = !!is_multicast_ether_addr(hdr->addr1); 825*66760eacSFelix Fietkau is_valid_tkip = rx_stats->rs_keyix != ATH9K_RXKEYIX_INVALID && 826*66760eacSFelix Fietkau test_bit(rx_stats->rs_keyix, common->tkip_keymap); 827*66760eacSFelix Fietkau strip_mic = is_valid_tkip && !(rx_stats->rs_status & 828*66760eacSFelix Fietkau (ATH9K_RXERR_DECRYPT | ATH9K_RXERR_CRC | ATH9K_RXERR_MIC)); 829*66760eacSFelix Fietkau 830d435700fSSujith if (!rx_stats->rs_datalen) 831d435700fSSujith return false; 832d435700fSSujith /* 833d435700fSSujith * rs_status follows rs_datalen so if rs_datalen is too large 834d435700fSSujith * we can take a hint that hardware corrupted it, so ignore 835d435700fSSujith * those frames. 836d435700fSSujith */ 837b7b1b512SVasanthakumar Thiagarajan if (rx_stats->rs_datalen > (common->rx_bufsize - rx_status_len)) 838d435700fSSujith return false; 839d435700fSSujith 8400d95521eSFelix Fietkau /* Only use error bits from the last fragment */ 841d435700fSSujith if (rx_stats->rs_more) 8420d95521eSFelix Fietkau return true; 843d435700fSSujith 844*66760eacSFelix Fietkau mic_error = is_valid_tkip && !ieee80211_is_ctl(fc) && 845*66760eacSFelix Fietkau !ieee80211_has_morefrags(fc) && 846*66760eacSFelix Fietkau !(le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG) && 847*66760eacSFelix Fietkau (rx_stats->rs_status & ATH9K_RXERR_MIC); 848*66760eacSFelix Fietkau 849d435700fSSujith /* 850d435700fSSujith * The rx_stats->rs_status will not be set until the end of the 851d435700fSSujith * chained descriptors so it can be ignored if rs_more is set. The 852d435700fSSujith * rs_more will be false at the last element of the chained 853d435700fSSujith * descriptors. 854d435700fSSujith */ 855d435700fSSujith if (rx_stats->rs_status != 0) { 856*66760eacSFelix Fietkau if (rx_stats->rs_status & ATH9K_RXERR_CRC) { 857d435700fSSujith rxs->flag |= RX_FLAG_FAILED_FCS_CRC; 858*66760eacSFelix Fietkau mic_error = false; 859*66760eacSFelix Fietkau } 860d435700fSSujith if (rx_stats->rs_status & ATH9K_RXERR_PHY) 861d435700fSSujith return false; 862d435700fSSujith 863d435700fSSujith if (rx_stats->rs_status & ATH9K_RXERR_DECRYPT) { 864d435700fSSujith *decrypt_error = true; 865*66760eacSFelix Fietkau mic_error = false; 866d435700fSSujith } 867*66760eacSFelix Fietkau 868d435700fSSujith /* 869d435700fSSujith * Reject error frames with the exception of 870d435700fSSujith * decryption and MIC failures. For monitor mode, 871d435700fSSujith * we also ignore the CRC error. 872d435700fSSujith */ 8735f841b41SRajkumar Manoharan if (ah->is_monitoring) { 874d435700fSSujith if (rx_stats->rs_status & 875d435700fSSujith ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC | 876d435700fSSujith ATH9K_RXERR_CRC)) 877d435700fSSujith return false; 878d435700fSSujith } else { 879d435700fSSujith if (rx_stats->rs_status & 880d435700fSSujith ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) { 881d435700fSSujith return false; 882d435700fSSujith } 883d435700fSSujith } 884d435700fSSujith } 885*66760eacSFelix Fietkau 886*66760eacSFelix Fietkau /* 887*66760eacSFelix Fietkau * For unicast frames the MIC error bit can have false positives, 888*66760eacSFelix Fietkau * so all MIC error reports need to be validated in software. 889*66760eacSFelix Fietkau * False negatives are not common, so skip software verification 890*66760eacSFelix Fietkau * if the hardware considers the MIC valid. 891*66760eacSFelix Fietkau */ 892*66760eacSFelix Fietkau if (strip_mic) 893*66760eacSFelix Fietkau rxs->flag |= RX_FLAG_MMIC_STRIPPED; 894*66760eacSFelix Fietkau else if (is_mc && mic_error) 895*66760eacSFelix Fietkau rxs->flag |= RX_FLAG_MMIC_ERROR; 896*66760eacSFelix Fietkau 897d435700fSSujith return true; 898d435700fSSujith } 899d435700fSSujith 900d435700fSSujith static int ath9k_process_rate(struct ath_common *common, 901d435700fSSujith struct ieee80211_hw *hw, 902d435700fSSujith struct ath_rx_status *rx_stats, 9039f167f64SVasanthakumar Thiagarajan struct ieee80211_rx_status *rxs) 904d435700fSSujith { 905d435700fSSujith struct ieee80211_supported_band *sband; 906d435700fSSujith enum ieee80211_band band; 907d435700fSSujith unsigned int i = 0; 908d435700fSSujith 909d435700fSSujith band = hw->conf.channel->band; 910d435700fSSujith sband = hw->wiphy->bands[band]; 911d435700fSSujith 912d435700fSSujith if (rx_stats->rs_rate & 0x80) { 913d435700fSSujith /* HT rate */ 914d435700fSSujith rxs->flag |= RX_FLAG_HT; 915d435700fSSujith if (rx_stats->rs_flags & ATH9K_RX_2040) 916d435700fSSujith rxs->flag |= RX_FLAG_40MHZ; 917d435700fSSujith if (rx_stats->rs_flags & ATH9K_RX_GI) 918d435700fSSujith rxs->flag |= RX_FLAG_SHORT_GI; 919d435700fSSujith rxs->rate_idx = rx_stats->rs_rate & 0x7f; 920d435700fSSujith return 0; 921d435700fSSujith } 922d435700fSSujith 923d435700fSSujith for (i = 0; i < sband->n_bitrates; i++) { 924d435700fSSujith if (sband->bitrates[i].hw_value == rx_stats->rs_rate) { 925d435700fSSujith rxs->rate_idx = i; 926d435700fSSujith return 0; 927d435700fSSujith } 928d435700fSSujith if (sband->bitrates[i].hw_value_short == rx_stats->rs_rate) { 929d435700fSSujith rxs->flag |= RX_FLAG_SHORTPRE; 930d435700fSSujith rxs->rate_idx = i; 931d435700fSSujith return 0; 932d435700fSSujith } 933d435700fSSujith } 934d435700fSSujith 935d435700fSSujith /* 936d435700fSSujith * No valid hardware bitrate found -- we should not get here 937d435700fSSujith * because hardware has already validated this frame as OK. 938d435700fSSujith */ 939226afe68SJoe Perches ath_dbg(common, ATH_DBG_XMIT, 940226afe68SJoe Perches "unsupported hw bitrate detected 0x%02x using 1 Mbit\n", 941226afe68SJoe Perches rx_stats->rs_rate); 942d435700fSSujith 943d435700fSSujith return -EINVAL; 944d435700fSSujith } 945d435700fSSujith 946d435700fSSujith static void ath9k_process_rssi(struct ath_common *common, 947d435700fSSujith struct ieee80211_hw *hw, 9489f167f64SVasanthakumar Thiagarajan struct ieee80211_hdr *hdr, 949d435700fSSujith struct ath_rx_status *rx_stats) 950d435700fSSujith { 9519ac58615SFelix Fietkau struct ath_softc *sc = hw->priv; 952d435700fSSujith struct ath_hw *ah = common->ah; 9539fa23e17SFelix Fietkau int last_rssi; 954d435700fSSujith __le16 fc; 955d435700fSSujith 9562b892a98SRajkumar Manoharan if ((ah->opmode != NL80211_IFTYPE_STATION) && 9572b892a98SRajkumar Manoharan (ah->opmode != NL80211_IFTYPE_ADHOC)) 9589fa23e17SFelix Fietkau return; 9599fa23e17SFelix Fietkau 960d435700fSSujith fc = hdr->frame_control; 9619fa23e17SFelix Fietkau if (!ieee80211_is_beacon(fc) || 9624801416cSBen Greear compare_ether_addr(hdr->addr3, common->curbssid)) { 9634801416cSBen Greear /* TODO: This doesn't work well if you have stations 9644801416cSBen Greear * associated to two different APs because curbssid 9654801416cSBen Greear * is just the last AP that any of the stations associated 9664801416cSBen Greear * with. 9674801416cSBen Greear */ 9689fa23e17SFelix Fietkau return; 9694801416cSBen Greear } 970d435700fSSujith 9719fa23e17SFelix Fietkau if (rx_stats->rs_rssi != ATH9K_RSSI_BAD && !rx_stats->rs_moreaggr) 9729ac58615SFelix Fietkau ATH_RSSI_LPF(sc->last_rssi, rx_stats->rs_rssi); 973686b9cb9SBen Greear 9749ac58615SFelix Fietkau last_rssi = sc->last_rssi; 975d435700fSSujith if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER)) 976d435700fSSujith rx_stats->rs_rssi = ATH_EP_RND(last_rssi, 977d435700fSSujith ATH_RSSI_EP_MULTIPLIER); 978d435700fSSujith if (rx_stats->rs_rssi < 0) 979d435700fSSujith rx_stats->rs_rssi = 0; 980d435700fSSujith 981d435700fSSujith /* Update Beacon RSSI, this is used by ANI. */ 982d435700fSSujith ah->stats.avgbrssi = rx_stats->rs_rssi; 983d435700fSSujith } 984d435700fSSujith 985d435700fSSujith /* 986d435700fSSujith * For Decrypt or Demic errors, we only mark packet status here and always push 987d435700fSSujith * up the frame up to let mac80211 handle the actual error case, be it no 988d435700fSSujith * decryption key or real decryption error. This let us keep statistics there. 989d435700fSSujith */ 990d435700fSSujith static int ath9k_rx_skb_preprocess(struct ath_common *common, 991d435700fSSujith struct ieee80211_hw *hw, 9929f167f64SVasanthakumar Thiagarajan struct ieee80211_hdr *hdr, 993d435700fSSujith struct ath_rx_status *rx_stats, 994d435700fSSujith struct ieee80211_rx_status *rx_status, 995d435700fSSujith bool *decrypt_error) 996d435700fSSujith { 997d435700fSSujith memset(rx_status, 0, sizeof(struct ieee80211_rx_status)); 998d435700fSSujith 999d435700fSSujith /* 1000d435700fSSujith * everything but the rate is checked here, the rate check is done 1001d435700fSSujith * separately to avoid doing two lookups for a rate for each frame. 1002d435700fSSujith */ 10039f167f64SVasanthakumar Thiagarajan if (!ath9k_rx_accept(common, hdr, rx_status, rx_stats, decrypt_error)) 1004d435700fSSujith return -EINVAL; 1005d435700fSSujith 10060d95521eSFelix Fietkau /* Only use status info from the last fragment */ 10070d95521eSFelix Fietkau if (rx_stats->rs_more) 10080d95521eSFelix Fietkau return 0; 10090d95521eSFelix Fietkau 10109f167f64SVasanthakumar Thiagarajan ath9k_process_rssi(common, hw, hdr, rx_stats); 1011d435700fSSujith 10129f167f64SVasanthakumar Thiagarajan if (ath9k_process_rate(common, hw, rx_stats, rx_status)) 1013d435700fSSujith return -EINVAL; 1014d435700fSSujith 1015d435700fSSujith rx_status->band = hw->conf.channel->band; 1016d435700fSSujith rx_status->freq = hw->conf.channel->center_freq; 1017d435700fSSujith rx_status->signal = ATH_DEFAULT_NOISE_FLOOR + rx_stats->rs_rssi; 1018d435700fSSujith rx_status->antenna = rx_stats->rs_antenna; 10196ebacbb7SJohannes Berg rx_status->flag |= RX_FLAG_MACTIME_MPDU; 1020d435700fSSujith 1021d435700fSSujith return 0; 1022d435700fSSujith } 1023d435700fSSujith 1024d435700fSSujith static void ath9k_rx_skb_postprocess(struct ath_common *common, 1025d435700fSSujith struct sk_buff *skb, 1026d435700fSSujith struct ath_rx_status *rx_stats, 1027d435700fSSujith struct ieee80211_rx_status *rxs, 1028d435700fSSujith bool decrypt_error) 1029d435700fSSujith { 1030d435700fSSujith struct ath_hw *ah = common->ah; 1031d435700fSSujith struct ieee80211_hdr *hdr; 1032d435700fSSujith int hdrlen, padpos, padsize; 1033d435700fSSujith u8 keyix; 1034d435700fSSujith __le16 fc; 1035d435700fSSujith 1036d435700fSSujith /* see if any padding is done by the hw and remove it */ 1037d435700fSSujith hdr = (struct ieee80211_hdr *) skb->data; 1038d435700fSSujith hdrlen = ieee80211_get_hdrlen_from_skb(skb); 1039d435700fSSujith fc = hdr->frame_control; 1040d435700fSSujith padpos = ath9k_cmn_padpos(hdr->frame_control); 1041d435700fSSujith 1042d435700fSSujith /* The MAC header is padded to have 32-bit boundary if the 1043d435700fSSujith * packet payload is non-zero. The general calculation for 1044d435700fSSujith * padsize would take into account odd header lengths: 1045d435700fSSujith * padsize = (4 - padpos % 4) % 4; However, since only 1046d435700fSSujith * even-length headers are used, padding can only be 0 or 2 1047d435700fSSujith * bytes and we can optimize this a bit. In addition, we must 1048d435700fSSujith * not try to remove padding from short control frames that do 1049d435700fSSujith * not have payload. */ 1050d435700fSSujith padsize = padpos & 3; 1051d435700fSSujith if (padsize && skb->len>=padpos+padsize+FCS_LEN) { 1052d435700fSSujith memmove(skb->data + padsize, skb->data, padpos); 1053d435700fSSujith skb_pull(skb, padsize); 1054d435700fSSujith } 1055d435700fSSujith 1056d435700fSSujith keyix = rx_stats->rs_keyix; 1057d435700fSSujith 1058d435700fSSujith if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error && 1059d435700fSSujith ieee80211_has_protected(fc)) { 1060d435700fSSujith rxs->flag |= RX_FLAG_DECRYPTED; 1061d435700fSSujith } else if (ieee80211_has_protected(fc) 1062d435700fSSujith && !decrypt_error && skb->len >= hdrlen + 4) { 1063d435700fSSujith keyix = skb->data[hdrlen + 3] >> 6; 1064d435700fSSujith 1065d435700fSSujith if (test_bit(keyix, common->keymap)) 1066d435700fSSujith rxs->flag |= RX_FLAG_DECRYPTED; 1067d435700fSSujith } 1068d435700fSSujith if (ah->sw_mgmt_crypto && 1069d435700fSSujith (rxs->flag & RX_FLAG_DECRYPTED) && 1070d435700fSSujith ieee80211_is_mgmt(fc)) 1071d435700fSSujith /* Use software decrypt for management frames. */ 1072d435700fSSujith rxs->flag &= ~RX_FLAG_DECRYPTED; 1073d435700fSSujith } 1074b5c80475SFelix Fietkau 1075102885a5SVasanthakumar Thiagarajan static void ath_lnaconf_alt_good_scan(struct ath_ant_comb *antcomb, 1076102885a5SVasanthakumar Thiagarajan struct ath_hw_antcomb_conf ant_conf, 1077102885a5SVasanthakumar Thiagarajan int main_rssi_avg) 1078102885a5SVasanthakumar Thiagarajan { 1079102885a5SVasanthakumar Thiagarajan antcomb->quick_scan_cnt = 0; 1080102885a5SVasanthakumar Thiagarajan 1081102885a5SVasanthakumar Thiagarajan if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA2) 1082102885a5SVasanthakumar Thiagarajan antcomb->rssi_lna2 = main_rssi_avg; 1083102885a5SVasanthakumar Thiagarajan else if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA1) 1084102885a5SVasanthakumar Thiagarajan antcomb->rssi_lna1 = main_rssi_avg; 1085102885a5SVasanthakumar Thiagarajan 1086102885a5SVasanthakumar Thiagarajan switch ((ant_conf.main_lna_conf << 4) | ant_conf.alt_lna_conf) { 1087223c5a87SGabor Juhos case 0x10: /* LNA2 A-B */ 1088102885a5SVasanthakumar Thiagarajan antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2; 1089102885a5SVasanthakumar Thiagarajan antcomb->first_quick_scan_conf = 1090102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2; 1091102885a5SVasanthakumar Thiagarajan antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1; 1092102885a5SVasanthakumar Thiagarajan break; 1093223c5a87SGabor Juhos case 0x20: /* LNA1 A-B */ 1094102885a5SVasanthakumar Thiagarajan antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2; 1095102885a5SVasanthakumar Thiagarajan antcomb->first_quick_scan_conf = 1096102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2; 1097102885a5SVasanthakumar Thiagarajan antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2; 1098102885a5SVasanthakumar Thiagarajan break; 1099223c5a87SGabor Juhos case 0x21: /* LNA1 LNA2 */ 1100102885a5SVasanthakumar Thiagarajan antcomb->main_conf = ATH_ANT_DIV_COMB_LNA2; 1101102885a5SVasanthakumar Thiagarajan antcomb->first_quick_scan_conf = 1102102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2; 1103102885a5SVasanthakumar Thiagarajan antcomb->second_quick_scan_conf = 1104102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2; 1105102885a5SVasanthakumar Thiagarajan break; 1106223c5a87SGabor Juhos case 0x12: /* LNA2 LNA1 */ 1107102885a5SVasanthakumar Thiagarajan antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1; 1108102885a5SVasanthakumar Thiagarajan antcomb->first_quick_scan_conf = 1109102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2; 1110102885a5SVasanthakumar Thiagarajan antcomb->second_quick_scan_conf = 1111102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2; 1112102885a5SVasanthakumar Thiagarajan break; 1113223c5a87SGabor Juhos case 0x13: /* LNA2 A+B */ 1114102885a5SVasanthakumar Thiagarajan antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2; 1115102885a5SVasanthakumar Thiagarajan antcomb->first_quick_scan_conf = 1116102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2; 1117102885a5SVasanthakumar Thiagarajan antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1; 1118102885a5SVasanthakumar Thiagarajan break; 1119223c5a87SGabor Juhos case 0x23: /* LNA1 A+B */ 1120102885a5SVasanthakumar Thiagarajan antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2; 1121102885a5SVasanthakumar Thiagarajan antcomb->first_quick_scan_conf = 1122102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2; 1123102885a5SVasanthakumar Thiagarajan antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2; 1124102885a5SVasanthakumar Thiagarajan break; 1125102885a5SVasanthakumar Thiagarajan default: 1126102885a5SVasanthakumar Thiagarajan break; 1127102885a5SVasanthakumar Thiagarajan } 1128102885a5SVasanthakumar Thiagarajan } 1129102885a5SVasanthakumar Thiagarajan 1130102885a5SVasanthakumar Thiagarajan static void ath_select_ant_div_from_quick_scan(struct ath_ant_comb *antcomb, 1131102885a5SVasanthakumar Thiagarajan struct ath_hw_antcomb_conf *div_ant_conf, 1132102885a5SVasanthakumar Thiagarajan int main_rssi_avg, int alt_rssi_avg, 1133102885a5SVasanthakumar Thiagarajan int alt_ratio) 1134102885a5SVasanthakumar Thiagarajan { 1135102885a5SVasanthakumar Thiagarajan /* alt_good */ 1136102885a5SVasanthakumar Thiagarajan switch (antcomb->quick_scan_cnt) { 1137102885a5SVasanthakumar Thiagarajan case 0: 1138102885a5SVasanthakumar Thiagarajan /* set alt to main, and alt to first conf */ 1139102885a5SVasanthakumar Thiagarajan div_ant_conf->main_lna_conf = antcomb->main_conf; 1140102885a5SVasanthakumar Thiagarajan div_ant_conf->alt_lna_conf = antcomb->first_quick_scan_conf; 1141102885a5SVasanthakumar Thiagarajan break; 1142102885a5SVasanthakumar Thiagarajan case 1: 1143102885a5SVasanthakumar Thiagarajan /* set alt to main, and alt to first conf */ 1144102885a5SVasanthakumar Thiagarajan div_ant_conf->main_lna_conf = antcomb->main_conf; 1145102885a5SVasanthakumar Thiagarajan div_ant_conf->alt_lna_conf = antcomb->second_quick_scan_conf; 1146102885a5SVasanthakumar Thiagarajan antcomb->rssi_first = main_rssi_avg; 1147102885a5SVasanthakumar Thiagarajan antcomb->rssi_second = alt_rssi_avg; 1148102885a5SVasanthakumar Thiagarajan 1149102885a5SVasanthakumar Thiagarajan if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) { 1150102885a5SVasanthakumar Thiagarajan /* main is LNA1 */ 1151102885a5SVasanthakumar Thiagarajan if (ath_is_alt_ant_ratio_better(alt_ratio, 1152102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_DELTA_HI, 1153102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_DELTA_LOW, 1154102885a5SVasanthakumar Thiagarajan main_rssi_avg, alt_rssi_avg, 1155102885a5SVasanthakumar Thiagarajan antcomb->total_pkt_count)) 1156102885a5SVasanthakumar Thiagarajan antcomb->first_ratio = true; 1157102885a5SVasanthakumar Thiagarajan else 1158102885a5SVasanthakumar Thiagarajan antcomb->first_ratio = false; 1159102885a5SVasanthakumar Thiagarajan } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) { 1160102885a5SVasanthakumar Thiagarajan if (ath_is_alt_ant_ratio_better(alt_ratio, 1161102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_DELTA_MID, 1162102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_DELTA_LOW, 1163102885a5SVasanthakumar Thiagarajan main_rssi_avg, alt_rssi_avg, 1164102885a5SVasanthakumar Thiagarajan antcomb->total_pkt_count)) 1165102885a5SVasanthakumar Thiagarajan antcomb->first_ratio = true; 1166102885a5SVasanthakumar Thiagarajan else 1167102885a5SVasanthakumar Thiagarajan antcomb->first_ratio = false; 1168102885a5SVasanthakumar Thiagarajan } else { 1169102885a5SVasanthakumar Thiagarajan if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) && 1170102885a5SVasanthakumar Thiagarajan (alt_rssi_avg > main_rssi_avg + 1171102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) || 1172102885a5SVasanthakumar Thiagarajan (alt_rssi_avg > main_rssi_avg)) && 1173102885a5SVasanthakumar Thiagarajan (antcomb->total_pkt_count > 50)) 1174102885a5SVasanthakumar Thiagarajan antcomb->first_ratio = true; 1175102885a5SVasanthakumar Thiagarajan else 1176102885a5SVasanthakumar Thiagarajan antcomb->first_ratio = false; 1177102885a5SVasanthakumar Thiagarajan } 1178102885a5SVasanthakumar Thiagarajan break; 1179102885a5SVasanthakumar Thiagarajan case 2: 1180102885a5SVasanthakumar Thiagarajan antcomb->alt_good = false; 1181102885a5SVasanthakumar Thiagarajan antcomb->scan_not_start = false; 1182102885a5SVasanthakumar Thiagarajan antcomb->scan = false; 1183102885a5SVasanthakumar Thiagarajan antcomb->rssi_first = main_rssi_avg; 1184102885a5SVasanthakumar Thiagarajan antcomb->rssi_third = alt_rssi_avg; 1185102885a5SVasanthakumar Thiagarajan 1186102885a5SVasanthakumar Thiagarajan if (antcomb->second_quick_scan_conf == ATH_ANT_DIV_COMB_LNA1) 1187102885a5SVasanthakumar Thiagarajan antcomb->rssi_lna1 = alt_rssi_avg; 1188102885a5SVasanthakumar Thiagarajan else if (antcomb->second_quick_scan_conf == 1189102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2) 1190102885a5SVasanthakumar Thiagarajan antcomb->rssi_lna2 = alt_rssi_avg; 1191102885a5SVasanthakumar Thiagarajan else if (antcomb->second_quick_scan_conf == 1192102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2) { 1193102885a5SVasanthakumar Thiagarajan if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) 1194102885a5SVasanthakumar Thiagarajan antcomb->rssi_lna2 = main_rssi_avg; 1195102885a5SVasanthakumar Thiagarajan else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) 1196102885a5SVasanthakumar Thiagarajan antcomb->rssi_lna1 = main_rssi_avg; 1197102885a5SVasanthakumar Thiagarajan } 1198102885a5SVasanthakumar Thiagarajan 1199102885a5SVasanthakumar Thiagarajan if (antcomb->rssi_lna2 > antcomb->rssi_lna1 + 1200102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA) 1201102885a5SVasanthakumar Thiagarajan div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA2; 1202102885a5SVasanthakumar Thiagarajan else 1203102885a5SVasanthakumar Thiagarajan div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA1; 1204102885a5SVasanthakumar Thiagarajan 1205102885a5SVasanthakumar Thiagarajan if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) { 1206102885a5SVasanthakumar Thiagarajan if (ath_is_alt_ant_ratio_better(alt_ratio, 1207102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_DELTA_HI, 1208102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_DELTA_LOW, 1209102885a5SVasanthakumar Thiagarajan main_rssi_avg, alt_rssi_avg, 1210102885a5SVasanthakumar Thiagarajan antcomb->total_pkt_count)) 1211102885a5SVasanthakumar Thiagarajan antcomb->second_ratio = true; 1212102885a5SVasanthakumar Thiagarajan else 1213102885a5SVasanthakumar Thiagarajan antcomb->second_ratio = false; 1214102885a5SVasanthakumar Thiagarajan } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) { 1215102885a5SVasanthakumar Thiagarajan if (ath_is_alt_ant_ratio_better(alt_ratio, 1216102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_DELTA_MID, 1217102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_DELTA_LOW, 1218102885a5SVasanthakumar Thiagarajan main_rssi_avg, alt_rssi_avg, 1219102885a5SVasanthakumar Thiagarajan antcomb->total_pkt_count)) 1220102885a5SVasanthakumar Thiagarajan antcomb->second_ratio = true; 1221102885a5SVasanthakumar Thiagarajan else 1222102885a5SVasanthakumar Thiagarajan antcomb->second_ratio = false; 1223102885a5SVasanthakumar Thiagarajan } else { 1224102885a5SVasanthakumar Thiagarajan if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) && 1225102885a5SVasanthakumar Thiagarajan (alt_rssi_avg > main_rssi_avg + 1226102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) || 1227102885a5SVasanthakumar Thiagarajan (alt_rssi_avg > main_rssi_avg)) && 1228102885a5SVasanthakumar Thiagarajan (antcomb->total_pkt_count > 50)) 1229102885a5SVasanthakumar Thiagarajan antcomb->second_ratio = true; 1230102885a5SVasanthakumar Thiagarajan else 1231102885a5SVasanthakumar Thiagarajan antcomb->second_ratio = false; 1232102885a5SVasanthakumar Thiagarajan } 1233102885a5SVasanthakumar Thiagarajan 1234102885a5SVasanthakumar Thiagarajan /* set alt to the conf with maximun ratio */ 1235102885a5SVasanthakumar Thiagarajan if (antcomb->first_ratio && antcomb->second_ratio) { 1236102885a5SVasanthakumar Thiagarajan if (antcomb->rssi_second > antcomb->rssi_third) { 1237102885a5SVasanthakumar Thiagarajan /* first alt*/ 1238102885a5SVasanthakumar Thiagarajan if ((antcomb->first_quick_scan_conf == 1239102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1) || 1240102885a5SVasanthakumar Thiagarajan (antcomb->first_quick_scan_conf == 1241102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2)) 1242102885a5SVasanthakumar Thiagarajan /* Set alt LNA1 or LNA2*/ 1243102885a5SVasanthakumar Thiagarajan if (div_ant_conf->main_lna_conf == 1244102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2) 1245102885a5SVasanthakumar Thiagarajan div_ant_conf->alt_lna_conf = 1246102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1; 1247102885a5SVasanthakumar Thiagarajan else 1248102885a5SVasanthakumar Thiagarajan div_ant_conf->alt_lna_conf = 1249102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2; 1250102885a5SVasanthakumar Thiagarajan else 1251102885a5SVasanthakumar Thiagarajan /* Set alt to A+B or A-B */ 1252102885a5SVasanthakumar Thiagarajan div_ant_conf->alt_lna_conf = 1253102885a5SVasanthakumar Thiagarajan antcomb->first_quick_scan_conf; 1254102885a5SVasanthakumar Thiagarajan } else if ((antcomb->second_quick_scan_conf == 1255102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1) || 1256102885a5SVasanthakumar Thiagarajan (antcomb->second_quick_scan_conf == 1257102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2)) { 1258102885a5SVasanthakumar Thiagarajan /* Set alt LNA1 or LNA2 */ 1259102885a5SVasanthakumar Thiagarajan if (div_ant_conf->main_lna_conf == 1260102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2) 1261102885a5SVasanthakumar Thiagarajan div_ant_conf->alt_lna_conf = 1262102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1; 1263102885a5SVasanthakumar Thiagarajan else 1264102885a5SVasanthakumar Thiagarajan div_ant_conf->alt_lna_conf = 1265102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2; 1266102885a5SVasanthakumar Thiagarajan } else { 1267102885a5SVasanthakumar Thiagarajan /* Set alt to A+B or A-B */ 1268102885a5SVasanthakumar Thiagarajan div_ant_conf->alt_lna_conf = 1269102885a5SVasanthakumar Thiagarajan antcomb->second_quick_scan_conf; 1270102885a5SVasanthakumar Thiagarajan } 1271102885a5SVasanthakumar Thiagarajan } else if (antcomb->first_ratio) { 1272102885a5SVasanthakumar Thiagarajan /* first alt */ 1273102885a5SVasanthakumar Thiagarajan if ((antcomb->first_quick_scan_conf == 1274102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1) || 1275102885a5SVasanthakumar Thiagarajan (antcomb->first_quick_scan_conf == 1276102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2)) 1277102885a5SVasanthakumar Thiagarajan /* Set alt LNA1 or LNA2 */ 1278102885a5SVasanthakumar Thiagarajan if (div_ant_conf->main_lna_conf == 1279102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2) 1280102885a5SVasanthakumar Thiagarajan div_ant_conf->alt_lna_conf = 1281102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1; 1282102885a5SVasanthakumar Thiagarajan else 1283102885a5SVasanthakumar Thiagarajan div_ant_conf->alt_lna_conf = 1284102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2; 1285102885a5SVasanthakumar Thiagarajan else 1286102885a5SVasanthakumar Thiagarajan /* Set alt to A+B or A-B */ 1287102885a5SVasanthakumar Thiagarajan div_ant_conf->alt_lna_conf = 1288102885a5SVasanthakumar Thiagarajan antcomb->first_quick_scan_conf; 1289102885a5SVasanthakumar Thiagarajan } else if (antcomb->second_ratio) { 1290102885a5SVasanthakumar Thiagarajan /* second alt */ 1291102885a5SVasanthakumar Thiagarajan if ((antcomb->second_quick_scan_conf == 1292102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1) || 1293102885a5SVasanthakumar Thiagarajan (antcomb->second_quick_scan_conf == 1294102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2)) 1295102885a5SVasanthakumar Thiagarajan /* Set alt LNA1 or LNA2 */ 1296102885a5SVasanthakumar Thiagarajan if (div_ant_conf->main_lna_conf == 1297102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2) 1298102885a5SVasanthakumar Thiagarajan div_ant_conf->alt_lna_conf = 1299102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1; 1300102885a5SVasanthakumar Thiagarajan else 1301102885a5SVasanthakumar Thiagarajan div_ant_conf->alt_lna_conf = 1302102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2; 1303102885a5SVasanthakumar Thiagarajan else 1304102885a5SVasanthakumar Thiagarajan /* Set alt to A+B or A-B */ 1305102885a5SVasanthakumar Thiagarajan div_ant_conf->alt_lna_conf = 1306102885a5SVasanthakumar Thiagarajan antcomb->second_quick_scan_conf; 1307102885a5SVasanthakumar Thiagarajan } else { 1308102885a5SVasanthakumar Thiagarajan /* main is largest */ 1309102885a5SVasanthakumar Thiagarajan if ((antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) || 1310102885a5SVasanthakumar Thiagarajan (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2)) 1311102885a5SVasanthakumar Thiagarajan /* Set alt LNA1 or LNA2 */ 1312102885a5SVasanthakumar Thiagarajan if (div_ant_conf->main_lna_conf == 1313102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2) 1314102885a5SVasanthakumar Thiagarajan div_ant_conf->alt_lna_conf = 1315102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1; 1316102885a5SVasanthakumar Thiagarajan else 1317102885a5SVasanthakumar Thiagarajan div_ant_conf->alt_lna_conf = 1318102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2; 1319102885a5SVasanthakumar Thiagarajan else 1320102885a5SVasanthakumar Thiagarajan /* Set alt to A+B or A-B */ 1321102885a5SVasanthakumar Thiagarajan div_ant_conf->alt_lna_conf = antcomb->main_conf; 1322102885a5SVasanthakumar Thiagarajan } 1323102885a5SVasanthakumar Thiagarajan break; 1324102885a5SVasanthakumar Thiagarajan default: 1325102885a5SVasanthakumar Thiagarajan break; 1326102885a5SVasanthakumar Thiagarajan } 1327102885a5SVasanthakumar Thiagarajan } 1328102885a5SVasanthakumar Thiagarajan 13293e9a212aSMohammed Shafi Shajakhan static void ath_ant_div_conf_fast_divbias(struct ath_hw_antcomb_conf *ant_conf, 13303e9a212aSMohammed Shafi Shajakhan struct ath_ant_comb *antcomb, int alt_ratio) 1331102885a5SVasanthakumar Thiagarajan { 13323e9a212aSMohammed Shafi Shajakhan if (ant_conf->div_group == 0) { 1333102885a5SVasanthakumar Thiagarajan /* Adjust the fast_div_bias based on main and alt lna conf */ 13343e9a212aSMohammed Shafi Shajakhan switch ((ant_conf->main_lna_conf << 4) | 13353e9a212aSMohammed Shafi Shajakhan ant_conf->alt_lna_conf) { 1336223c5a87SGabor Juhos case 0x01: /* A-B LNA2 */ 1337102885a5SVasanthakumar Thiagarajan ant_conf->fast_div_bias = 0x3b; 1338102885a5SVasanthakumar Thiagarajan break; 1339223c5a87SGabor Juhos case 0x02: /* A-B LNA1 */ 1340102885a5SVasanthakumar Thiagarajan ant_conf->fast_div_bias = 0x3d; 1341102885a5SVasanthakumar Thiagarajan break; 1342223c5a87SGabor Juhos case 0x03: /* A-B A+B */ 1343102885a5SVasanthakumar Thiagarajan ant_conf->fast_div_bias = 0x1; 1344102885a5SVasanthakumar Thiagarajan break; 1345223c5a87SGabor Juhos case 0x10: /* LNA2 A-B */ 1346102885a5SVasanthakumar Thiagarajan ant_conf->fast_div_bias = 0x7; 1347102885a5SVasanthakumar Thiagarajan break; 1348223c5a87SGabor Juhos case 0x12: /* LNA2 LNA1 */ 1349102885a5SVasanthakumar Thiagarajan ant_conf->fast_div_bias = 0x2; 1350102885a5SVasanthakumar Thiagarajan break; 1351223c5a87SGabor Juhos case 0x13: /* LNA2 A+B */ 1352102885a5SVasanthakumar Thiagarajan ant_conf->fast_div_bias = 0x7; 1353102885a5SVasanthakumar Thiagarajan break; 1354223c5a87SGabor Juhos case 0x20: /* LNA1 A-B */ 1355102885a5SVasanthakumar Thiagarajan ant_conf->fast_div_bias = 0x6; 1356102885a5SVasanthakumar Thiagarajan break; 1357223c5a87SGabor Juhos case 0x21: /* LNA1 LNA2 */ 1358102885a5SVasanthakumar Thiagarajan ant_conf->fast_div_bias = 0x0; 1359102885a5SVasanthakumar Thiagarajan break; 1360223c5a87SGabor Juhos case 0x23: /* LNA1 A+B */ 1361102885a5SVasanthakumar Thiagarajan ant_conf->fast_div_bias = 0x6; 1362102885a5SVasanthakumar Thiagarajan break; 1363223c5a87SGabor Juhos case 0x30: /* A+B A-B */ 1364102885a5SVasanthakumar Thiagarajan ant_conf->fast_div_bias = 0x1; 1365102885a5SVasanthakumar Thiagarajan break; 1366223c5a87SGabor Juhos case 0x31: /* A+B LNA2 */ 1367102885a5SVasanthakumar Thiagarajan ant_conf->fast_div_bias = 0x3b; 1368102885a5SVasanthakumar Thiagarajan break; 1369223c5a87SGabor Juhos case 0x32: /* A+B LNA1 */ 1370102885a5SVasanthakumar Thiagarajan ant_conf->fast_div_bias = 0x3d; 1371102885a5SVasanthakumar Thiagarajan break; 1372102885a5SVasanthakumar Thiagarajan default: 1373102885a5SVasanthakumar Thiagarajan break; 1374102885a5SVasanthakumar Thiagarajan } 1375e7ef5bc0SGabor Juhos } else if (ant_conf->div_group == 1) { 1376e7ef5bc0SGabor Juhos /* Adjust the fast_div_bias based on main and alt_lna_conf */ 1377e7ef5bc0SGabor Juhos switch ((ant_conf->main_lna_conf << 4) | 1378e7ef5bc0SGabor Juhos ant_conf->alt_lna_conf) { 1379e7ef5bc0SGabor Juhos case 0x01: /* A-B LNA2 */ 1380e7ef5bc0SGabor Juhos ant_conf->fast_div_bias = 0x1; 1381e7ef5bc0SGabor Juhos ant_conf->main_gaintb = 0; 1382e7ef5bc0SGabor Juhos ant_conf->alt_gaintb = 0; 1383e7ef5bc0SGabor Juhos break; 1384e7ef5bc0SGabor Juhos case 0x02: /* A-B LNA1 */ 1385e7ef5bc0SGabor Juhos ant_conf->fast_div_bias = 0x1; 1386e7ef5bc0SGabor Juhos ant_conf->main_gaintb = 0; 1387e7ef5bc0SGabor Juhos ant_conf->alt_gaintb = 0; 1388e7ef5bc0SGabor Juhos break; 1389e7ef5bc0SGabor Juhos case 0x03: /* A-B A+B */ 1390e7ef5bc0SGabor Juhos ant_conf->fast_div_bias = 0x1; 1391e7ef5bc0SGabor Juhos ant_conf->main_gaintb = 0; 1392e7ef5bc0SGabor Juhos ant_conf->alt_gaintb = 0; 1393e7ef5bc0SGabor Juhos break; 1394e7ef5bc0SGabor Juhos case 0x10: /* LNA2 A-B */ 1395e7ef5bc0SGabor Juhos if (!(antcomb->scan) && 1396e7ef5bc0SGabor Juhos (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO)) 1397e7ef5bc0SGabor Juhos ant_conf->fast_div_bias = 0x3f; 1398e7ef5bc0SGabor Juhos else 1399e7ef5bc0SGabor Juhos ant_conf->fast_div_bias = 0x1; 1400e7ef5bc0SGabor Juhos ant_conf->main_gaintb = 0; 1401e7ef5bc0SGabor Juhos ant_conf->alt_gaintb = 0; 1402e7ef5bc0SGabor Juhos break; 1403e7ef5bc0SGabor Juhos case 0x12: /* LNA2 LNA1 */ 1404e7ef5bc0SGabor Juhos ant_conf->fast_div_bias = 0x1; 1405e7ef5bc0SGabor Juhos ant_conf->main_gaintb = 0; 1406e7ef5bc0SGabor Juhos ant_conf->alt_gaintb = 0; 1407e7ef5bc0SGabor Juhos break; 1408e7ef5bc0SGabor Juhos case 0x13: /* LNA2 A+B */ 1409e7ef5bc0SGabor Juhos if (!(antcomb->scan) && 1410e7ef5bc0SGabor Juhos (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO)) 1411e7ef5bc0SGabor Juhos ant_conf->fast_div_bias = 0x3f; 1412e7ef5bc0SGabor Juhos else 1413e7ef5bc0SGabor Juhos ant_conf->fast_div_bias = 0x1; 1414e7ef5bc0SGabor Juhos ant_conf->main_gaintb = 0; 1415e7ef5bc0SGabor Juhos ant_conf->alt_gaintb = 0; 1416e7ef5bc0SGabor Juhos break; 1417e7ef5bc0SGabor Juhos case 0x20: /* LNA1 A-B */ 1418e7ef5bc0SGabor Juhos if (!(antcomb->scan) && 1419e7ef5bc0SGabor Juhos (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO)) 1420e7ef5bc0SGabor Juhos ant_conf->fast_div_bias = 0x3f; 1421e7ef5bc0SGabor Juhos else 1422e7ef5bc0SGabor Juhos ant_conf->fast_div_bias = 0x1; 1423e7ef5bc0SGabor Juhos ant_conf->main_gaintb = 0; 1424e7ef5bc0SGabor Juhos ant_conf->alt_gaintb = 0; 1425e7ef5bc0SGabor Juhos break; 1426e7ef5bc0SGabor Juhos case 0x21: /* LNA1 LNA2 */ 1427e7ef5bc0SGabor Juhos ant_conf->fast_div_bias = 0x1; 1428e7ef5bc0SGabor Juhos ant_conf->main_gaintb = 0; 1429e7ef5bc0SGabor Juhos ant_conf->alt_gaintb = 0; 1430e7ef5bc0SGabor Juhos break; 1431e7ef5bc0SGabor Juhos case 0x23: /* LNA1 A+B */ 1432e7ef5bc0SGabor Juhos if (!(antcomb->scan) && 1433e7ef5bc0SGabor Juhos (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO)) 1434e7ef5bc0SGabor Juhos ant_conf->fast_div_bias = 0x3f; 1435e7ef5bc0SGabor Juhos else 1436e7ef5bc0SGabor Juhos ant_conf->fast_div_bias = 0x1; 1437e7ef5bc0SGabor Juhos ant_conf->main_gaintb = 0; 1438e7ef5bc0SGabor Juhos ant_conf->alt_gaintb = 0; 1439e7ef5bc0SGabor Juhos break; 1440e7ef5bc0SGabor Juhos case 0x30: /* A+B A-B */ 1441e7ef5bc0SGabor Juhos ant_conf->fast_div_bias = 0x1; 1442e7ef5bc0SGabor Juhos ant_conf->main_gaintb = 0; 1443e7ef5bc0SGabor Juhos ant_conf->alt_gaintb = 0; 1444e7ef5bc0SGabor Juhos break; 1445e7ef5bc0SGabor Juhos case 0x31: /* A+B LNA2 */ 1446e7ef5bc0SGabor Juhos ant_conf->fast_div_bias = 0x1; 1447e7ef5bc0SGabor Juhos ant_conf->main_gaintb = 0; 1448e7ef5bc0SGabor Juhos ant_conf->alt_gaintb = 0; 1449e7ef5bc0SGabor Juhos break; 1450e7ef5bc0SGabor Juhos case 0x32: /* A+B LNA1 */ 1451e7ef5bc0SGabor Juhos ant_conf->fast_div_bias = 0x1; 1452e7ef5bc0SGabor Juhos ant_conf->main_gaintb = 0; 1453e7ef5bc0SGabor Juhos ant_conf->alt_gaintb = 0; 1454e7ef5bc0SGabor Juhos break; 1455e7ef5bc0SGabor Juhos default: 1456e7ef5bc0SGabor Juhos break; 1457e7ef5bc0SGabor Juhos } 14583e9a212aSMohammed Shafi Shajakhan } else if (ant_conf->div_group == 2) { 14593e9a212aSMohammed Shafi Shajakhan /* Adjust the fast_div_bias based on main and alt_lna_conf */ 14603e9a212aSMohammed Shafi Shajakhan switch ((ant_conf->main_lna_conf << 4) | 14613e9a212aSMohammed Shafi Shajakhan ant_conf->alt_lna_conf) { 1462223c5a87SGabor Juhos case 0x01: /* A-B LNA2 */ 14633e9a212aSMohammed Shafi Shajakhan ant_conf->fast_div_bias = 0x1; 14643e9a212aSMohammed Shafi Shajakhan ant_conf->main_gaintb = 0; 14653e9a212aSMohammed Shafi Shajakhan ant_conf->alt_gaintb = 0; 14663e9a212aSMohammed Shafi Shajakhan break; 1467223c5a87SGabor Juhos case 0x02: /* A-B LNA1 */ 14683e9a212aSMohammed Shafi Shajakhan ant_conf->fast_div_bias = 0x1; 14693e9a212aSMohammed Shafi Shajakhan ant_conf->main_gaintb = 0; 14703e9a212aSMohammed Shafi Shajakhan ant_conf->alt_gaintb = 0; 14713e9a212aSMohammed Shafi Shajakhan break; 1472223c5a87SGabor Juhos case 0x03: /* A-B A+B */ 14733e9a212aSMohammed Shafi Shajakhan ant_conf->fast_div_bias = 0x1; 14743e9a212aSMohammed Shafi Shajakhan ant_conf->main_gaintb = 0; 14753e9a212aSMohammed Shafi Shajakhan ant_conf->alt_gaintb = 0; 14763e9a212aSMohammed Shafi Shajakhan break; 1477223c5a87SGabor Juhos case 0x10: /* LNA2 A-B */ 14783e9a212aSMohammed Shafi Shajakhan if (!(antcomb->scan) && 14793e9a212aSMohammed Shafi Shajakhan (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO)) 14803e9a212aSMohammed Shafi Shajakhan ant_conf->fast_div_bias = 0x1; 14813e9a212aSMohammed Shafi Shajakhan else 14823e9a212aSMohammed Shafi Shajakhan ant_conf->fast_div_bias = 0x2; 14833e9a212aSMohammed Shafi Shajakhan ant_conf->main_gaintb = 0; 14843e9a212aSMohammed Shafi Shajakhan ant_conf->alt_gaintb = 0; 14853e9a212aSMohammed Shafi Shajakhan break; 1486223c5a87SGabor Juhos case 0x12: /* LNA2 LNA1 */ 14873e9a212aSMohammed Shafi Shajakhan ant_conf->fast_div_bias = 0x1; 14883e9a212aSMohammed Shafi Shajakhan ant_conf->main_gaintb = 0; 14893e9a212aSMohammed Shafi Shajakhan ant_conf->alt_gaintb = 0; 14903e9a212aSMohammed Shafi Shajakhan break; 1491223c5a87SGabor Juhos case 0x13: /* LNA2 A+B */ 14923e9a212aSMohammed Shafi Shajakhan if (!(antcomb->scan) && 14933e9a212aSMohammed Shafi Shajakhan (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO)) 14943e9a212aSMohammed Shafi Shajakhan ant_conf->fast_div_bias = 0x1; 14953e9a212aSMohammed Shafi Shajakhan else 14963e9a212aSMohammed Shafi Shajakhan ant_conf->fast_div_bias = 0x2; 14973e9a212aSMohammed Shafi Shajakhan ant_conf->main_gaintb = 0; 14983e9a212aSMohammed Shafi Shajakhan ant_conf->alt_gaintb = 0; 14993e9a212aSMohammed Shafi Shajakhan break; 1500223c5a87SGabor Juhos case 0x20: /* LNA1 A-B */ 15013e9a212aSMohammed Shafi Shajakhan if (!(antcomb->scan) && 15023e9a212aSMohammed Shafi Shajakhan (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO)) 15033e9a212aSMohammed Shafi Shajakhan ant_conf->fast_div_bias = 0x1; 15043e9a212aSMohammed Shafi Shajakhan else 15053e9a212aSMohammed Shafi Shajakhan ant_conf->fast_div_bias = 0x2; 15063e9a212aSMohammed Shafi Shajakhan ant_conf->main_gaintb = 0; 15073e9a212aSMohammed Shafi Shajakhan ant_conf->alt_gaintb = 0; 15083e9a212aSMohammed Shafi Shajakhan break; 1509223c5a87SGabor Juhos case 0x21: /* LNA1 LNA2 */ 15103e9a212aSMohammed Shafi Shajakhan ant_conf->fast_div_bias = 0x1; 15113e9a212aSMohammed Shafi Shajakhan ant_conf->main_gaintb = 0; 15123e9a212aSMohammed Shafi Shajakhan ant_conf->alt_gaintb = 0; 15133e9a212aSMohammed Shafi Shajakhan break; 1514223c5a87SGabor Juhos case 0x23: /* LNA1 A+B */ 15153e9a212aSMohammed Shafi Shajakhan if (!(antcomb->scan) && 15163e9a212aSMohammed Shafi Shajakhan (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO)) 15173e9a212aSMohammed Shafi Shajakhan ant_conf->fast_div_bias = 0x1; 15183e9a212aSMohammed Shafi Shajakhan else 15193e9a212aSMohammed Shafi Shajakhan ant_conf->fast_div_bias = 0x2; 15203e9a212aSMohammed Shafi Shajakhan ant_conf->main_gaintb = 0; 15213e9a212aSMohammed Shafi Shajakhan ant_conf->alt_gaintb = 0; 15223e9a212aSMohammed Shafi Shajakhan break; 1523223c5a87SGabor Juhos case 0x30: /* A+B A-B */ 15243e9a212aSMohammed Shafi Shajakhan ant_conf->fast_div_bias = 0x1; 15253e9a212aSMohammed Shafi Shajakhan ant_conf->main_gaintb = 0; 15263e9a212aSMohammed Shafi Shajakhan ant_conf->alt_gaintb = 0; 15273e9a212aSMohammed Shafi Shajakhan break; 1528223c5a87SGabor Juhos case 0x31: /* A+B LNA2 */ 15293e9a212aSMohammed Shafi Shajakhan ant_conf->fast_div_bias = 0x1; 15303e9a212aSMohammed Shafi Shajakhan ant_conf->main_gaintb = 0; 15313e9a212aSMohammed Shafi Shajakhan ant_conf->alt_gaintb = 0; 15323e9a212aSMohammed Shafi Shajakhan break; 1533223c5a87SGabor Juhos case 0x32: /* A+B LNA1 */ 15343e9a212aSMohammed Shafi Shajakhan ant_conf->fast_div_bias = 0x1; 15353e9a212aSMohammed Shafi Shajakhan ant_conf->main_gaintb = 0; 15363e9a212aSMohammed Shafi Shajakhan ant_conf->alt_gaintb = 0; 15373e9a212aSMohammed Shafi Shajakhan break; 15383e9a212aSMohammed Shafi Shajakhan default: 15393e9a212aSMohammed Shafi Shajakhan break; 15403e9a212aSMohammed Shafi Shajakhan } 15413e9a212aSMohammed Shafi Shajakhan } 1542102885a5SVasanthakumar Thiagarajan } 1543102885a5SVasanthakumar Thiagarajan 1544102885a5SVasanthakumar Thiagarajan /* Antenna diversity and combining */ 1545102885a5SVasanthakumar Thiagarajan static void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs) 1546102885a5SVasanthakumar Thiagarajan { 1547102885a5SVasanthakumar Thiagarajan struct ath_hw_antcomb_conf div_ant_conf; 1548102885a5SVasanthakumar Thiagarajan struct ath_ant_comb *antcomb = &sc->ant_comb; 1549102885a5SVasanthakumar Thiagarajan int alt_ratio = 0, alt_rssi_avg = 0, main_rssi_avg = 0, curr_alt_set; 15500ff2b5c0SSujith Manoharan int curr_main_set; 1551102885a5SVasanthakumar Thiagarajan int main_rssi = rs->rs_rssi_ctl0; 1552102885a5SVasanthakumar Thiagarajan int alt_rssi = rs->rs_rssi_ctl1; 1553102885a5SVasanthakumar Thiagarajan int rx_ant_conf, main_ant_conf; 1554102885a5SVasanthakumar Thiagarajan bool short_scan = false; 1555102885a5SVasanthakumar Thiagarajan 1556102885a5SVasanthakumar Thiagarajan rx_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_CURRENT_SHIFT) & 1557102885a5SVasanthakumar Thiagarajan ATH_ANT_RX_MASK; 1558102885a5SVasanthakumar Thiagarajan main_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_MAIN_SHIFT) & 1559102885a5SVasanthakumar Thiagarajan ATH_ANT_RX_MASK; 1560102885a5SVasanthakumar Thiagarajan 156121e8ee6dSMohammed Shafi Shajakhan /* Record packet only when both main_rssi and alt_rssi is positive */ 156221e8ee6dSMohammed Shafi Shajakhan if (main_rssi > 0 && alt_rssi > 0) { 1563102885a5SVasanthakumar Thiagarajan antcomb->total_pkt_count++; 1564102885a5SVasanthakumar Thiagarajan antcomb->main_total_rssi += main_rssi; 1565102885a5SVasanthakumar Thiagarajan antcomb->alt_total_rssi += alt_rssi; 1566102885a5SVasanthakumar Thiagarajan if (main_ant_conf == rx_ant_conf) 1567102885a5SVasanthakumar Thiagarajan antcomb->main_recv_cnt++; 1568102885a5SVasanthakumar Thiagarajan else 1569102885a5SVasanthakumar Thiagarajan antcomb->alt_recv_cnt++; 1570102885a5SVasanthakumar Thiagarajan } 1571102885a5SVasanthakumar Thiagarajan 1572102885a5SVasanthakumar Thiagarajan /* Short scan check */ 1573102885a5SVasanthakumar Thiagarajan if (antcomb->scan && antcomb->alt_good) { 1574102885a5SVasanthakumar Thiagarajan if (time_after(jiffies, antcomb->scan_start_time + 1575102885a5SVasanthakumar Thiagarajan msecs_to_jiffies(ATH_ANT_DIV_COMB_SHORT_SCAN_INTR))) 1576102885a5SVasanthakumar Thiagarajan short_scan = true; 1577102885a5SVasanthakumar Thiagarajan else 1578102885a5SVasanthakumar Thiagarajan if (antcomb->total_pkt_count == 1579102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT) { 1580102885a5SVasanthakumar Thiagarajan alt_ratio = ((antcomb->alt_recv_cnt * 100) / 1581102885a5SVasanthakumar Thiagarajan antcomb->total_pkt_count); 1582102885a5SVasanthakumar Thiagarajan if (alt_ratio < ATH_ANT_DIV_COMB_ALT_ANT_RATIO) 1583102885a5SVasanthakumar Thiagarajan short_scan = true; 1584102885a5SVasanthakumar Thiagarajan } 1585102885a5SVasanthakumar Thiagarajan } 1586102885a5SVasanthakumar Thiagarajan 1587102885a5SVasanthakumar Thiagarajan if (((antcomb->total_pkt_count < ATH_ANT_DIV_COMB_MAX_PKTCOUNT) || 1588102885a5SVasanthakumar Thiagarajan rs->rs_moreaggr) && !short_scan) 1589102885a5SVasanthakumar Thiagarajan return; 1590102885a5SVasanthakumar Thiagarajan 1591102885a5SVasanthakumar Thiagarajan if (antcomb->total_pkt_count) { 1592102885a5SVasanthakumar Thiagarajan alt_ratio = ((antcomb->alt_recv_cnt * 100) / 1593102885a5SVasanthakumar Thiagarajan antcomb->total_pkt_count); 1594102885a5SVasanthakumar Thiagarajan main_rssi_avg = (antcomb->main_total_rssi / 1595102885a5SVasanthakumar Thiagarajan antcomb->total_pkt_count); 1596102885a5SVasanthakumar Thiagarajan alt_rssi_avg = (antcomb->alt_total_rssi / 1597102885a5SVasanthakumar Thiagarajan antcomb->total_pkt_count); 1598102885a5SVasanthakumar Thiagarajan } 1599102885a5SVasanthakumar Thiagarajan 1600102885a5SVasanthakumar Thiagarajan 1601102885a5SVasanthakumar Thiagarajan ath9k_hw_antdiv_comb_conf_get(sc->sc_ah, &div_ant_conf); 1602102885a5SVasanthakumar Thiagarajan curr_alt_set = div_ant_conf.alt_lna_conf; 1603102885a5SVasanthakumar Thiagarajan curr_main_set = div_ant_conf.main_lna_conf; 1604102885a5SVasanthakumar Thiagarajan 1605102885a5SVasanthakumar Thiagarajan antcomb->count++; 1606102885a5SVasanthakumar Thiagarajan 1607102885a5SVasanthakumar Thiagarajan if (antcomb->count == ATH_ANT_DIV_COMB_MAX_COUNT) { 1608102885a5SVasanthakumar Thiagarajan if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO) { 1609102885a5SVasanthakumar Thiagarajan ath_lnaconf_alt_good_scan(antcomb, div_ant_conf, 1610102885a5SVasanthakumar Thiagarajan main_rssi_avg); 1611102885a5SVasanthakumar Thiagarajan antcomb->alt_good = true; 1612102885a5SVasanthakumar Thiagarajan } else { 1613102885a5SVasanthakumar Thiagarajan antcomb->alt_good = false; 1614102885a5SVasanthakumar Thiagarajan } 1615102885a5SVasanthakumar Thiagarajan 1616102885a5SVasanthakumar Thiagarajan antcomb->count = 0; 1617102885a5SVasanthakumar Thiagarajan antcomb->scan = true; 1618102885a5SVasanthakumar Thiagarajan antcomb->scan_not_start = true; 1619102885a5SVasanthakumar Thiagarajan } 1620102885a5SVasanthakumar Thiagarajan 1621102885a5SVasanthakumar Thiagarajan if (!antcomb->scan) { 1622b85c5734SMohammed Shafi Shajakhan if (ath_ant_div_comb_alt_check(div_ant_conf.div_group, 1623b85c5734SMohammed Shafi Shajakhan alt_ratio, curr_main_set, curr_alt_set, 1624b85c5734SMohammed Shafi Shajakhan alt_rssi_avg, main_rssi_avg)) { 1625102885a5SVasanthakumar Thiagarajan if (curr_alt_set == ATH_ANT_DIV_COMB_LNA2) { 1626102885a5SVasanthakumar Thiagarajan /* Switch main and alt LNA */ 1627102885a5SVasanthakumar Thiagarajan div_ant_conf.main_lna_conf = 1628102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2; 1629102885a5SVasanthakumar Thiagarajan div_ant_conf.alt_lna_conf = 1630102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1; 1631102885a5SVasanthakumar Thiagarajan } else if (curr_alt_set == ATH_ANT_DIV_COMB_LNA1) { 1632102885a5SVasanthakumar Thiagarajan div_ant_conf.main_lna_conf = 1633102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1; 1634102885a5SVasanthakumar Thiagarajan div_ant_conf.alt_lna_conf = 1635102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2; 1636102885a5SVasanthakumar Thiagarajan } 1637102885a5SVasanthakumar Thiagarajan 1638102885a5SVasanthakumar Thiagarajan goto div_comb_done; 1639102885a5SVasanthakumar Thiagarajan } else if ((curr_alt_set != ATH_ANT_DIV_COMB_LNA1) && 1640102885a5SVasanthakumar Thiagarajan (curr_alt_set != ATH_ANT_DIV_COMB_LNA2)) { 1641102885a5SVasanthakumar Thiagarajan /* Set alt to another LNA */ 1642102885a5SVasanthakumar Thiagarajan if (curr_main_set == ATH_ANT_DIV_COMB_LNA2) 1643102885a5SVasanthakumar Thiagarajan div_ant_conf.alt_lna_conf = 1644102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1; 1645102885a5SVasanthakumar Thiagarajan else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1) 1646102885a5SVasanthakumar Thiagarajan div_ant_conf.alt_lna_conf = 1647102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2; 1648102885a5SVasanthakumar Thiagarajan 1649102885a5SVasanthakumar Thiagarajan goto div_comb_done; 1650102885a5SVasanthakumar Thiagarajan } 1651102885a5SVasanthakumar Thiagarajan 1652102885a5SVasanthakumar Thiagarajan if ((alt_rssi_avg < (main_rssi_avg + 16538afbcc8bSMohammed Shafi Shajakhan div_ant_conf.lna1_lna2_delta))) 1654102885a5SVasanthakumar Thiagarajan goto div_comb_done; 1655102885a5SVasanthakumar Thiagarajan } 1656102885a5SVasanthakumar Thiagarajan 1657102885a5SVasanthakumar Thiagarajan if (!antcomb->scan_not_start) { 1658102885a5SVasanthakumar Thiagarajan switch (curr_alt_set) { 1659102885a5SVasanthakumar Thiagarajan case ATH_ANT_DIV_COMB_LNA2: 1660102885a5SVasanthakumar Thiagarajan antcomb->rssi_lna2 = alt_rssi_avg; 1661102885a5SVasanthakumar Thiagarajan antcomb->rssi_lna1 = main_rssi_avg; 1662102885a5SVasanthakumar Thiagarajan antcomb->scan = true; 1663102885a5SVasanthakumar Thiagarajan /* set to A+B */ 1664102885a5SVasanthakumar Thiagarajan div_ant_conf.main_lna_conf = 1665102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1; 1666102885a5SVasanthakumar Thiagarajan div_ant_conf.alt_lna_conf = 1667102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2; 1668102885a5SVasanthakumar Thiagarajan break; 1669102885a5SVasanthakumar Thiagarajan case ATH_ANT_DIV_COMB_LNA1: 1670102885a5SVasanthakumar Thiagarajan antcomb->rssi_lna1 = alt_rssi_avg; 1671102885a5SVasanthakumar Thiagarajan antcomb->rssi_lna2 = main_rssi_avg; 1672102885a5SVasanthakumar Thiagarajan antcomb->scan = true; 1673102885a5SVasanthakumar Thiagarajan /* set to A+B */ 1674102885a5SVasanthakumar Thiagarajan div_ant_conf.main_lna_conf = ATH_ANT_DIV_COMB_LNA2; 1675102885a5SVasanthakumar Thiagarajan div_ant_conf.alt_lna_conf = 1676102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2; 1677102885a5SVasanthakumar Thiagarajan break; 1678102885a5SVasanthakumar Thiagarajan case ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2: 1679102885a5SVasanthakumar Thiagarajan antcomb->rssi_add = alt_rssi_avg; 1680102885a5SVasanthakumar Thiagarajan antcomb->scan = true; 1681102885a5SVasanthakumar Thiagarajan /* set to A-B */ 1682102885a5SVasanthakumar Thiagarajan div_ant_conf.alt_lna_conf = 1683102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2; 1684102885a5SVasanthakumar Thiagarajan break; 1685102885a5SVasanthakumar Thiagarajan case ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2: 1686102885a5SVasanthakumar Thiagarajan antcomb->rssi_sub = alt_rssi_avg; 1687102885a5SVasanthakumar Thiagarajan antcomb->scan = false; 1688102885a5SVasanthakumar Thiagarajan if (antcomb->rssi_lna2 > 1689102885a5SVasanthakumar Thiagarajan (antcomb->rssi_lna1 + 1690102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)) { 1691102885a5SVasanthakumar Thiagarajan /* use LNA2 as main LNA */ 1692102885a5SVasanthakumar Thiagarajan if ((antcomb->rssi_add > antcomb->rssi_lna1) && 1693102885a5SVasanthakumar Thiagarajan (antcomb->rssi_add > antcomb->rssi_sub)) { 1694102885a5SVasanthakumar Thiagarajan /* set to A+B */ 1695102885a5SVasanthakumar Thiagarajan div_ant_conf.main_lna_conf = 1696102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2; 1697102885a5SVasanthakumar Thiagarajan div_ant_conf.alt_lna_conf = 1698102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2; 1699102885a5SVasanthakumar Thiagarajan } else if (antcomb->rssi_sub > 1700102885a5SVasanthakumar Thiagarajan antcomb->rssi_lna1) { 1701102885a5SVasanthakumar Thiagarajan /* set to A-B */ 1702102885a5SVasanthakumar Thiagarajan div_ant_conf.main_lna_conf = 1703102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2; 1704102885a5SVasanthakumar Thiagarajan div_ant_conf.alt_lna_conf = 1705102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2; 1706102885a5SVasanthakumar Thiagarajan } else { 1707102885a5SVasanthakumar Thiagarajan /* set to LNA1 */ 1708102885a5SVasanthakumar Thiagarajan div_ant_conf.main_lna_conf = 1709102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2; 1710102885a5SVasanthakumar Thiagarajan div_ant_conf.alt_lna_conf = 1711102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1; 1712102885a5SVasanthakumar Thiagarajan } 1713102885a5SVasanthakumar Thiagarajan } else { 1714102885a5SVasanthakumar Thiagarajan /* use LNA1 as main LNA */ 1715102885a5SVasanthakumar Thiagarajan if ((antcomb->rssi_add > antcomb->rssi_lna2) && 1716102885a5SVasanthakumar Thiagarajan (antcomb->rssi_add > antcomb->rssi_sub)) { 1717102885a5SVasanthakumar Thiagarajan /* set to A+B */ 1718102885a5SVasanthakumar Thiagarajan div_ant_conf.main_lna_conf = 1719102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1; 1720102885a5SVasanthakumar Thiagarajan div_ant_conf.alt_lna_conf = 1721102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2; 1722102885a5SVasanthakumar Thiagarajan } else if (antcomb->rssi_sub > 1723102885a5SVasanthakumar Thiagarajan antcomb->rssi_lna1) { 1724102885a5SVasanthakumar Thiagarajan /* set to A-B */ 1725102885a5SVasanthakumar Thiagarajan div_ant_conf.main_lna_conf = 1726102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1; 1727102885a5SVasanthakumar Thiagarajan div_ant_conf.alt_lna_conf = 1728102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2; 1729102885a5SVasanthakumar Thiagarajan } else { 1730102885a5SVasanthakumar Thiagarajan /* set to LNA2 */ 1731102885a5SVasanthakumar Thiagarajan div_ant_conf.main_lna_conf = 1732102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1; 1733102885a5SVasanthakumar Thiagarajan div_ant_conf.alt_lna_conf = 1734102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2; 1735102885a5SVasanthakumar Thiagarajan } 1736102885a5SVasanthakumar Thiagarajan } 1737102885a5SVasanthakumar Thiagarajan break; 1738102885a5SVasanthakumar Thiagarajan default: 1739102885a5SVasanthakumar Thiagarajan break; 1740102885a5SVasanthakumar Thiagarajan } 1741102885a5SVasanthakumar Thiagarajan } else { 1742102885a5SVasanthakumar Thiagarajan if (!antcomb->alt_good) { 1743102885a5SVasanthakumar Thiagarajan antcomb->scan_not_start = false; 1744102885a5SVasanthakumar Thiagarajan /* Set alt to another LNA */ 1745102885a5SVasanthakumar Thiagarajan if (curr_main_set == ATH_ANT_DIV_COMB_LNA2) { 1746102885a5SVasanthakumar Thiagarajan div_ant_conf.main_lna_conf = 1747102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2; 1748102885a5SVasanthakumar Thiagarajan div_ant_conf.alt_lna_conf = 1749102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1; 1750102885a5SVasanthakumar Thiagarajan } else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1) { 1751102885a5SVasanthakumar Thiagarajan div_ant_conf.main_lna_conf = 1752102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1; 1753102885a5SVasanthakumar Thiagarajan div_ant_conf.alt_lna_conf = 1754102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2; 1755102885a5SVasanthakumar Thiagarajan } 1756102885a5SVasanthakumar Thiagarajan goto div_comb_done; 1757102885a5SVasanthakumar Thiagarajan } 1758102885a5SVasanthakumar Thiagarajan } 1759102885a5SVasanthakumar Thiagarajan 1760102885a5SVasanthakumar Thiagarajan ath_select_ant_div_from_quick_scan(antcomb, &div_ant_conf, 1761102885a5SVasanthakumar Thiagarajan main_rssi_avg, alt_rssi_avg, 1762102885a5SVasanthakumar Thiagarajan alt_ratio); 1763102885a5SVasanthakumar Thiagarajan 1764102885a5SVasanthakumar Thiagarajan antcomb->quick_scan_cnt++; 1765102885a5SVasanthakumar Thiagarajan 1766102885a5SVasanthakumar Thiagarajan div_comb_done: 17673e9a212aSMohammed Shafi Shajakhan ath_ant_div_conf_fast_divbias(&div_ant_conf, antcomb, alt_ratio); 1768102885a5SVasanthakumar Thiagarajan ath9k_hw_antdiv_comb_conf_set(sc->sc_ah, &div_ant_conf); 1769102885a5SVasanthakumar Thiagarajan 1770102885a5SVasanthakumar Thiagarajan antcomb->scan_start_time = jiffies; 1771102885a5SVasanthakumar Thiagarajan antcomb->total_pkt_count = 0; 1772102885a5SVasanthakumar Thiagarajan antcomb->main_total_rssi = 0; 1773102885a5SVasanthakumar Thiagarajan antcomb->alt_total_rssi = 0; 1774102885a5SVasanthakumar Thiagarajan antcomb->main_recv_cnt = 0; 1775102885a5SVasanthakumar Thiagarajan antcomb->alt_recv_cnt = 0; 1776102885a5SVasanthakumar Thiagarajan } 1777102885a5SVasanthakumar Thiagarajan 1778b5c80475SFelix Fietkau int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp) 1779b5c80475SFelix Fietkau { 1780b5c80475SFelix Fietkau struct ath_buf *bf; 17810d95521eSFelix Fietkau struct sk_buff *skb = NULL, *requeue_skb, *hdr_skb; 1782b5c80475SFelix Fietkau struct ieee80211_rx_status *rxs; 1783b5c80475SFelix Fietkau struct ath_hw *ah = sc->sc_ah; 1784b5c80475SFelix Fietkau struct ath_common *common = ath9k_hw_common(ah); 1785b5c80475SFelix Fietkau /* 1786cae6b74dSMohammed Shafi Shajakhan * The hw can technically differ from common->hw when using ath9k 1787b5c80475SFelix Fietkau * virtual wiphy so to account for that we iterate over the active 1788b5c80475SFelix Fietkau * wiphys and find the appropriate wiphy and therefore hw. 1789b5c80475SFelix Fietkau */ 17907545daf4SFelix Fietkau struct ieee80211_hw *hw = sc->hw; 1791b5c80475SFelix Fietkau struct ieee80211_hdr *hdr; 1792b5c80475SFelix Fietkau int retval; 1793b5c80475SFelix Fietkau bool decrypt_error = false; 1794b5c80475SFelix Fietkau struct ath_rx_status rs; 1795b5c80475SFelix Fietkau enum ath9k_rx_qtype qtype; 1796b5c80475SFelix Fietkau bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA); 1797b5c80475SFelix Fietkau int dma_type; 17985c6dd921SVasanthakumar Thiagarajan u8 rx_status_len = ah->caps.rx_status_len; 1799a6d2055bSFelix Fietkau u64 tsf = 0; 1800a6d2055bSFelix Fietkau u32 tsf_lower = 0; 18018ab2cd09SLuis R. Rodriguez unsigned long flags; 1802b5c80475SFelix Fietkau 1803b5c80475SFelix Fietkau if (edma) 1804b5c80475SFelix Fietkau dma_type = DMA_BIDIRECTIONAL; 180556824223SMing Lei else 180656824223SMing Lei dma_type = DMA_FROM_DEVICE; 1807b5c80475SFelix Fietkau 1808b5c80475SFelix Fietkau qtype = hp ? ATH9K_RX_QUEUE_HP : ATH9K_RX_QUEUE_LP; 1809b5c80475SFelix Fietkau spin_lock_bh(&sc->rx.rxbuflock); 1810b5c80475SFelix Fietkau 1811a6d2055bSFelix Fietkau tsf = ath9k_hw_gettsf64(ah); 1812a6d2055bSFelix Fietkau tsf_lower = tsf & 0xffffffff; 1813a6d2055bSFelix Fietkau 1814b5c80475SFelix Fietkau do { 1815b5c80475SFelix Fietkau /* If handling rx interrupt and flush is in progress => exit */ 1816b5c80475SFelix Fietkau if ((sc->sc_flags & SC_OP_RXFLUSH) && (flush == 0)) 1817b5c80475SFelix Fietkau break; 1818b5c80475SFelix Fietkau 1819b5c80475SFelix Fietkau memset(&rs, 0, sizeof(rs)); 1820b5c80475SFelix Fietkau if (edma) 1821b5c80475SFelix Fietkau bf = ath_edma_get_next_rx_buf(sc, &rs, qtype); 1822b5c80475SFelix Fietkau else 1823b5c80475SFelix Fietkau bf = ath_get_next_rx_buf(sc, &rs); 1824b5c80475SFelix Fietkau 1825b5c80475SFelix Fietkau if (!bf) 1826b5c80475SFelix Fietkau break; 1827b5c80475SFelix Fietkau 1828b5c80475SFelix Fietkau skb = bf->bf_mpdu; 1829b5c80475SFelix Fietkau if (!skb) 1830b5c80475SFelix Fietkau continue; 1831b5c80475SFelix Fietkau 18320d95521eSFelix Fietkau /* 18330d95521eSFelix Fietkau * Take frame header from the first fragment and RX status from 18340d95521eSFelix Fietkau * the last one. 18350d95521eSFelix Fietkau */ 18360d95521eSFelix Fietkau if (sc->rx.frag) 18370d95521eSFelix Fietkau hdr_skb = sc->rx.frag; 18380d95521eSFelix Fietkau else 18390d95521eSFelix Fietkau hdr_skb = skb; 18400d95521eSFelix Fietkau 18410d95521eSFelix Fietkau hdr = (struct ieee80211_hdr *) (hdr_skb->data + rx_status_len); 18420d95521eSFelix Fietkau rxs = IEEE80211_SKB_RXCB(hdr_skb); 18435ca42627SLuis R. Rodriguez 184429bffa96SFelix Fietkau ath_debug_stat_rx(sc, &rs); 18451395d3f0SSujith 1846203c4805SLuis R. Rodriguez /* 1847203c4805SLuis R. Rodriguez * If we're asked to flush receive queue, directly 1848203c4805SLuis R. Rodriguez * chain it back at the queue without processing it. 1849203c4805SLuis R. Rodriguez */ 1850203c4805SLuis R. Rodriguez if (flush) 18510d95521eSFelix Fietkau goto requeue_drop_frag; 1852203c4805SLuis R. Rodriguez 1853c8f3b721SJan Friedrich retval = ath9k_rx_skb_preprocess(common, hw, hdr, &rs, 1854c8f3b721SJan Friedrich rxs, &decrypt_error); 1855c8f3b721SJan Friedrich if (retval) 18560d95521eSFelix Fietkau goto requeue_drop_frag; 1857c8f3b721SJan Friedrich 1858a6d2055bSFelix Fietkau rxs->mactime = (tsf & ~0xffffffffULL) | rs.rs_tstamp; 1859a6d2055bSFelix Fietkau if (rs.rs_tstamp > tsf_lower && 1860a6d2055bSFelix Fietkau unlikely(rs.rs_tstamp - tsf_lower > 0x10000000)) 1861a6d2055bSFelix Fietkau rxs->mactime -= 0x100000000ULL; 1862a6d2055bSFelix Fietkau 1863a6d2055bSFelix Fietkau if (rs.rs_tstamp < tsf_lower && 1864a6d2055bSFelix Fietkau unlikely(tsf_lower - rs.rs_tstamp > 0x10000000)) 1865a6d2055bSFelix Fietkau rxs->mactime += 0x100000000ULL; 1866a6d2055bSFelix Fietkau 1867203c4805SLuis R. Rodriguez /* Ensure we always have an skb to requeue once we are done 1868203c4805SLuis R. Rodriguez * processing the current buffer's skb */ 1869cc861f74SLuis R. Rodriguez requeue_skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_ATOMIC); 1870203c4805SLuis R. Rodriguez 1871203c4805SLuis R. Rodriguez /* If there is no memory we ignore the current RX'd frame, 1872203c4805SLuis R. Rodriguez * tell hardware it can give us a new frame using the old 1873203c4805SLuis R. Rodriguez * skb and put it at the tail of the sc->rx.rxbuf list for 1874203c4805SLuis R. Rodriguez * processing. */ 1875203c4805SLuis R. Rodriguez if (!requeue_skb) 18760d95521eSFelix Fietkau goto requeue_drop_frag; 1877203c4805SLuis R. Rodriguez 1878203c4805SLuis R. Rodriguez /* Unmap the frame */ 1879203c4805SLuis R. Rodriguez dma_unmap_single(sc->dev, bf->bf_buf_addr, 1880cc861f74SLuis R. Rodriguez common->rx_bufsize, 1881b5c80475SFelix Fietkau dma_type); 1882203c4805SLuis R. Rodriguez 1883b5c80475SFelix Fietkau skb_put(skb, rs.rs_datalen + ah->caps.rx_status_len); 1884b5c80475SFelix Fietkau if (ah->caps.rx_status_len) 1885b5c80475SFelix Fietkau skb_pull(skb, ah->caps.rx_status_len); 1886203c4805SLuis R. Rodriguez 18870d95521eSFelix Fietkau if (!rs.rs_more) 18880d95521eSFelix Fietkau ath9k_rx_skb_postprocess(common, hdr_skb, &rs, 1889c9b14170SLuis R. Rodriguez rxs, decrypt_error); 1890203c4805SLuis R. Rodriguez 1891203c4805SLuis R. Rodriguez /* We will now give hardware our shiny new allocated skb */ 1892203c4805SLuis R. Rodriguez bf->bf_mpdu = requeue_skb; 1893203c4805SLuis R. Rodriguez bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data, 1894cc861f74SLuis R. Rodriguez common->rx_bufsize, 1895b5c80475SFelix Fietkau dma_type); 1896203c4805SLuis R. Rodriguez if (unlikely(dma_mapping_error(sc->dev, 1897203c4805SLuis R. Rodriguez bf->bf_buf_addr))) { 1898203c4805SLuis R. Rodriguez dev_kfree_skb_any(requeue_skb); 1899203c4805SLuis R. Rodriguez bf->bf_mpdu = NULL; 19006cf9e995SBen Greear bf->bf_buf_addr = 0; 19013800276aSJoe Perches ath_err(common, "dma_mapping_error() on RX\n"); 19027545daf4SFelix Fietkau ieee80211_rx(hw, skb); 1903203c4805SLuis R. Rodriguez break; 1904203c4805SLuis R. Rodriguez } 1905203c4805SLuis R. Rodriguez 19060d95521eSFelix Fietkau if (rs.rs_more) { 19070d95521eSFelix Fietkau /* 19080d95521eSFelix Fietkau * rs_more indicates chained descriptors which can be 19090d95521eSFelix Fietkau * used to link buffers together for a sort of 19100d95521eSFelix Fietkau * scatter-gather operation. 19110d95521eSFelix Fietkau */ 19120d95521eSFelix Fietkau if (sc->rx.frag) { 19130d95521eSFelix Fietkau /* too many fragments - cannot handle frame */ 19140d95521eSFelix Fietkau dev_kfree_skb_any(sc->rx.frag); 19150d95521eSFelix Fietkau dev_kfree_skb_any(skb); 19160d95521eSFelix Fietkau skb = NULL; 19170d95521eSFelix Fietkau } 19180d95521eSFelix Fietkau sc->rx.frag = skb; 19190d95521eSFelix Fietkau goto requeue; 19200d95521eSFelix Fietkau } 19210d95521eSFelix Fietkau 19220d95521eSFelix Fietkau if (sc->rx.frag) { 19230d95521eSFelix Fietkau int space = skb->len - skb_tailroom(hdr_skb); 19240d95521eSFelix Fietkau 19250d95521eSFelix Fietkau sc->rx.frag = NULL; 19260d95521eSFelix Fietkau 19270d95521eSFelix Fietkau if (pskb_expand_head(hdr_skb, 0, space, GFP_ATOMIC) < 0) { 19280d95521eSFelix Fietkau dev_kfree_skb(skb); 19290d95521eSFelix Fietkau goto requeue_drop_frag; 19300d95521eSFelix Fietkau } 19310d95521eSFelix Fietkau 19320d95521eSFelix Fietkau skb_copy_from_linear_data(skb, skb_put(hdr_skb, skb->len), 19330d95521eSFelix Fietkau skb->len); 19340d95521eSFelix Fietkau dev_kfree_skb_any(skb); 19350d95521eSFelix Fietkau skb = hdr_skb; 19360d95521eSFelix Fietkau } 19370d95521eSFelix Fietkau 1938203c4805SLuis R. Rodriguez /* 1939203c4805SLuis R. Rodriguez * change the default rx antenna if rx diversity chooses the 1940203c4805SLuis R. Rodriguez * other antenna 3 times in a row. 1941203c4805SLuis R. Rodriguez */ 194229bffa96SFelix Fietkau if (sc->rx.defant != rs.rs_antenna) { 1943203c4805SLuis R. Rodriguez if (++sc->rx.rxotherant >= 3) 194429bffa96SFelix Fietkau ath_setdefantenna(sc, rs.rs_antenna); 1945203c4805SLuis R. Rodriguez } else { 1946203c4805SLuis R. Rodriguez sc->rx.rxotherant = 0; 1947203c4805SLuis R. Rodriguez } 1948203c4805SLuis R. Rodriguez 1949*66760eacSFelix Fietkau if (rxs->flag & RX_FLAG_MMIC_STRIPPED) 1950*66760eacSFelix Fietkau skb_trim(skb, skb->len - 8); 1951*66760eacSFelix Fietkau 19528ab2cd09SLuis R. Rodriguez spin_lock_irqsave(&sc->sc_pm_lock, flags); 1953aaef24b4SMohammed Shafi Shajakhan 1954aaef24b4SMohammed Shafi Shajakhan if ((sc->ps_flags & (PS_WAIT_FOR_BEACON | 19551b04b930SSujith PS_WAIT_FOR_CAB | 1956aaef24b4SMohammed Shafi Shajakhan PS_WAIT_FOR_PSPOLL_DATA)) || 1957cedc7e3dSMohammed Shafi Shajakhan ath9k_check_auto_sleep(sc)) 1958cc65965cSJouni Malinen ath_rx_ps(sc, skb); 19598ab2cd09SLuis R. Rodriguez spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 1960cc65965cSJouni Malinen 1961102885a5SVasanthakumar Thiagarajan if (ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) 1962102885a5SVasanthakumar Thiagarajan ath_ant_comb_scan(sc, &rs); 1963102885a5SVasanthakumar Thiagarajan 19647545daf4SFelix Fietkau ieee80211_rx(hw, skb); 1965cc65965cSJouni Malinen 19660d95521eSFelix Fietkau requeue_drop_frag: 19670d95521eSFelix Fietkau if (sc->rx.frag) { 19680d95521eSFelix Fietkau dev_kfree_skb_any(sc->rx.frag); 19690d95521eSFelix Fietkau sc->rx.frag = NULL; 19700d95521eSFelix Fietkau } 1971203c4805SLuis R. Rodriguez requeue: 1972b5c80475SFelix Fietkau if (edma) { 1973b5c80475SFelix Fietkau list_add_tail(&bf->list, &sc->rx.rxbuf); 1974b5c80475SFelix Fietkau ath_rx_edma_buf_link(sc, qtype); 1975b5c80475SFelix Fietkau } else { 1976203c4805SLuis R. Rodriguez list_move_tail(&bf->list, &sc->rx.rxbuf); 1977203c4805SLuis R. Rodriguez ath_rx_buf_link(sc, bf); 197895294973SFelix Fietkau ath9k_hw_rxena(ah); 1979b5c80475SFelix Fietkau } 1980203c4805SLuis R. Rodriguez } while (1); 1981203c4805SLuis R. Rodriguez 1982203c4805SLuis R. Rodriguez spin_unlock_bh(&sc->rx.rxbuflock); 1983203c4805SLuis R. Rodriguez 1984203c4805SLuis R. Rodriguez return 0; 1985203c4805SLuis R. Rodriguez } 1986