1203c4805SLuis R. Rodriguez /* 2203c4805SLuis R. Rodriguez * Copyright (c) 2008-2009 Atheros Communications Inc. 3203c4805SLuis R. Rodriguez * 4203c4805SLuis R. Rodriguez * Permission to use, copy, modify, and/or distribute this software for any 5203c4805SLuis R. Rodriguez * purpose with or without fee is hereby granted, provided that the above 6203c4805SLuis R. Rodriguez * copyright notice and this permission notice appear in all copies. 7203c4805SLuis R. Rodriguez * 8203c4805SLuis R. Rodriguez * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9203c4805SLuis R. Rodriguez * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10203c4805SLuis R. Rodriguez * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11203c4805SLuis R. Rodriguez * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12203c4805SLuis R. Rodriguez * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13203c4805SLuis R. Rodriguez * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14203c4805SLuis R. Rodriguez * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15203c4805SLuis R. Rodriguez */ 16203c4805SLuis R. Rodriguez 17203c4805SLuis R. Rodriguez #include "ath9k.h" 18203c4805SLuis R. Rodriguez 19203c4805SLuis R. Rodriguez static struct ieee80211_hw * ath_get_virt_hw(struct ath_softc *sc, 20203c4805SLuis R. Rodriguez struct ieee80211_hdr *hdr) 21203c4805SLuis R. Rodriguez { 22203c4805SLuis R. Rodriguez struct ieee80211_hw *hw = sc->pri_wiphy->hw; 23203c4805SLuis R. Rodriguez int i; 24203c4805SLuis R. Rodriguez 25203c4805SLuis R. Rodriguez spin_lock_bh(&sc->wiphy_lock); 26203c4805SLuis R. Rodriguez for (i = 0; i < sc->num_sec_wiphy; i++) { 27203c4805SLuis R. Rodriguez struct ath_wiphy *aphy = sc->sec_wiphy[i]; 28203c4805SLuis R. Rodriguez if (aphy == NULL) 29203c4805SLuis R. Rodriguez continue; 30203c4805SLuis R. Rodriguez if (compare_ether_addr(hdr->addr1, aphy->hw->wiphy->perm_addr) 31203c4805SLuis R. Rodriguez == 0) { 32203c4805SLuis R. Rodriguez hw = aphy->hw; 33203c4805SLuis R. Rodriguez break; 34203c4805SLuis R. Rodriguez } 35203c4805SLuis R. Rodriguez } 36203c4805SLuis R. Rodriguez spin_unlock_bh(&sc->wiphy_lock); 37203c4805SLuis R. Rodriguez return hw; 38203c4805SLuis R. Rodriguez } 39203c4805SLuis R. Rodriguez 40203c4805SLuis R. Rodriguez /* 41203c4805SLuis R. Rodriguez * Setup and link descriptors. 42203c4805SLuis R. Rodriguez * 43203c4805SLuis R. Rodriguez * 11N: we can no longer afford to self link the last descriptor. 44203c4805SLuis R. Rodriguez * MAC acknowledges BA status as long as it copies frames to host 45203c4805SLuis R. Rodriguez * buffer (or rx fifo). This can incorrectly acknowledge packets 46203c4805SLuis R. Rodriguez * to a sender if last desc is self-linked. 47203c4805SLuis R. Rodriguez */ 48203c4805SLuis R. Rodriguez static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf) 49203c4805SLuis R. Rodriguez { 50203c4805SLuis R. Rodriguez struct ath_hw *ah = sc->sc_ah; 51203c4805SLuis R. Rodriguez struct ath_desc *ds; 52203c4805SLuis R. Rodriguez struct sk_buff *skb; 53203c4805SLuis R. Rodriguez 54203c4805SLuis R. Rodriguez ATH_RXBUF_RESET(bf); 55203c4805SLuis R. Rodriguez 56203c4805SLuis R. Rodriguez ds = bf->bf_desc; 57203c4805SLuis R. Rodriguez ds->ds_link = 0; /* link to null */ 58203c4805SLuis R. Rodriguez ds->ds_data = bf->bf_buf_addr; 59203c4805SLuis R. Rodriguez 60203c4805SLuis R. Rodriguez /* virtual addr of the beginning of the buffer. */ 61203c4805SLuis R. Rodriguez skb = bf->bf_mpdu; 629680e8a3SLuis R. Rodriguez BUG_ON(skb == NULL); 63203c4805SLuis R. Rodriguez ds->ds_vdata = skb->data; 64203c4805SLuis R. Rodriguez 65203c4805SLuis R. Rodriguez /* setup rx descriptors. The rx.bufsize here tells the harware 66203c4805SLuis R. Rodriguez * how much data it can DMA to us and that we are prepared 67203c4805SLuis R. Rodriguez * to process */ 68203c4805SLuis R. Rodriguez ath9k_hw_setuprxdesc(ah, ds, 69203c4805SLuis R. Rodriguez sc->rx.bufsize, 70203c4805SLuis R. Rodriguez 0); 71203c4805SLuis R. Rodriguez 72203c4805SLuis R. Rodriguez if (sc->rx.rxlink == NULL) 73203c4805SLuis R. Rodriguez ath9k_hw_putrxbuf(ah, bf->bf_daddr); 74203c4805SLuis R. Rodriguez else 75203c4805SLuis R. Rodriguez *sc->rx.rxlink = bf->bf_daddr; 76203c4805SLuis R. Rodriguez 77203c4805SLuis R. Rodriguez sc->rx.rxlink = &ds->ds_link; 78203c4805SLuis R. Rodriguez ath9k_hw_rxena(ah); 79203c4805SLuis R. Rodriguez } 80203c4805SLuis R. Rodriguez 81203c4805SLuis R. Rodriguez static void ath_setdefantenna(struct ath_softc *sc, u32 antenna) 82203c4805SLuis R. Rodriguez { 83203c4805SLuis R. Rodriguez /* XXX block beacon interrupts */ 84203c4805SLuis R. Rodriguez ath9k_hw_setantenna(sc->sc_ah, antenna); 85203c4805SLuis R. Rodriguez sc->rx.defant = antenna; 86203c4805SLuis R. Rodriguez sc->rx.rxotherant = 0; 87203c4805SLuis R. Rodriguez } 88203c4805SLuis R. Rodriguez 89207e9685SLuis R. Rodriguez /* Assumes you've already done the endian to CPU conversion */ 90207e9685SLuis R. Rodriguez static bool ath9k_rx_accept(struct ath_common *common, 91207e9685SLuis R. Rodriguez struct sk_buff *skb, 92207e9685SLuis R. Rodriguez struct ieee80211_rx_status *rxs, 93207e9685SLuis R. Rodriguez struct ath_rx_status *rx_stats, 94207e9685SLuis R. Rodriguez bool *decrypt_error) 95207e9685SLuis R. Rodriguez { 96207e9685SLuis R. Rodriguez struct ath_hw *ah = common->ah; 97207e9685SLuis R. Rodriguez struct ieee80211_hdr *hdr; 98207e9685SLuis R. Rodriguez __le16 fc; 99207e9685SLuis R. Rodriguez 100207e9685SLuis R. Rodriguez hdr = (struct ieee80211_hdr *) skb->data; 101207e9685SLuis R. Rodriguez fc = hdr->frame_control; 102207e9685SLuis R. Rodriguez 103207e9685SLuis R. Rodriguez if (rx_stats->rs_more) { 104207e9685SLuis R. Rodriguez /* 105207e9685SLuis R. Rodriguez * Frame spans multiple descriptors; this cannot happen yet 106207e9685SLuis R. Rodriguez * as we don't support jumbograms. If not in monitor mode, 107207e9685SLuis R. Rodriguez * discard the frame. Enable this if you want to see 108207e9685SLuis R. Rodriguez * error frames in Monitor mode. 109207e9685SLuis R. Rodriguez */ 110207e9685SLuis R. Rodriguez if (ah->opmode != NL80211_IFTYPE_MONITOR) 111207e9685SLuis R. Rodriguez return false; 112207e9685SLuis R. Rodriguez } else if (rx_stats->rs_status != 0) { 113207e9685SLuis R. Rodriguez if (rx_stats->rs_status & ATH9K_RXERR_CRC) 114207e9685SLuis R. Rodriguez rxs->flag |= RX_FLAG_FAILED_FCS_CRC; 115207e9685SLuis R. Rodriguez if (rx_stats->rs_status & ATH9K_RXERR_PHY) 116207e9685SLuis R. Rodriguez return false; 117207e9685SLuis R. Rodriguez 118207e9685SLuis R. Rodriguez if (rx_stats->rs_status & ATH9K_RXERR_DECRYPT) { 119207e9685SLuis R. Rodriguez *decrypt_error = true; 120207e9685SLuis R. Rodriguez } else if (rx_stats->rs_status & ATH9K_RXERR_MIC) { 121207e9685SLuis R. Rodriguez if (ieee80211_is_ctl(fc)) 122207e9685SLuis R. Rodriguez /* 123207e9685SLuis R. Rodriguez * Sometimes, we get invalid 124207e9685SLuis R. Rodriguez * MIC failures on valid control frames. 125207e9685SLuis R. Rodriguez * Remove these mic errors. 126207e9685SLuis R. Rodriguez */ 127207e9685SLuis R. Rodriguez rx_stats->rs_status &= ~ATH9K_RXERR_MIC; 128207e9685SLuis R. Rodriguez else 129207e9685SLuis R. Rodriguez rxs->flag |= RX_FLAG_MMIC_ERROR; 130207e9685SLuis R. Rodriguez } 131207e9685SLuis R. Rodriguez /* 132207e9685SLuis R. Rodriguez * Reject error frames with the exception of 133207e9685SLuis R. Rodriguez * decryption and MIC failures. For monitor mode, 134207e9685SLuis R. Rodriguez * we also ignore the CRC error. 135207e9685SLuis R. Rodriguez */ 136207e9685SLuis R. Rodriguez if (ah->opmode == NL80211_IFTYPE_MONITOR) { 137207e9685SLuis R. Rodriguez if (rx_stats->rs_status & 138207e9685SLuis R. Rodriguez ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC | 139207e9685SLuis R. Rodriguez ATH9K_RXERR_CRC)) 140207e9685SLuis R. Rodriguez return false; 141207e9685SLuis R. Rodriguez } else { 142207e9685SLuis R. Rodriguez if (rx_stats->rs_status & 143207e9685SLuis R. Rodriguez ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) { 144207e9685SLuis R. Rodriguez return false; 145207e9685SLuis R. Rodriguez } 146207e9685SLuis R. Rodriguez } 147207e9685SLuis R. Rodriguez } 148207e9685SLuis R. Rodriguez return true; 149207e9685SLuis R. Rodriguez } 150207e9685SLuis R. Rodriguez 1519878841eSLuis R. Rodriguez static u8 ath9k_process_rate(struct ath_common *common, 1529878841eSLuis R. Rodriguez struct ieee80211_hw *hw, 1539878841eSLuis R. Rodriguez struct ath_rx_status *rx_stats, 1549878841eSLuis R. Rodriguez struct ieee80211_rx_status *rxs, 1559878841eSLuis R. Rodriguez struct sk_buff *skb) 1569878841eSLuis R. Rodriguez { 1579878841eSLuis R. Rodriguez struct ieee80211_supported_band *sband; 1589878841eSLuis R. Rodriguez enum ieee80211_band band; 1599878841eSLuis R. Rodriguez unsigned int i = 0; 1609878841eSLuis R. Rodriguez 1619878841eSLuis R. Rodriguez band = hw->conf.channel->band; 1629878841eSLuis R. Rodriguez sband = hw->wiphy->bands[band]; 1639878841eSLuis R. Rodriguez 1649878841eSLuis R. Rodriguez if (rx_stats->rs_rate & 0x80) { 1659878841eSLuis R. Rodriguez /* HT rate */ 1669878841eSLuis R. Rodriguez rxs->flag |= RX_FLAG_HT; 1679878841eSLuis R. Rodriguez if (rx_stats->rs_flags & ATH9K_RX_2040) 1689878841eSLuis R. Rodriguez rxs->flag |= RX_FLAG_40MHZ; 1699878841eSLuis R. Rodriguez if (rx_stats->rs_flags & ATH9K_RX_GI) 1709878841eSLuis R. Rodriguez rxs->flag |= RX_FLAG_SHORT_GI; 1719878841eSLuis R. Rodriguez return rx_stats->rs_rate & 0x7f; 1729878841eSLuis R. Rodriguez } 1739878841eSLuis R. Rodriguez 1749878841eSLuis R. Rodriguez for (i = 0; i < sband->n_bitrates; i++) { 1759878841eSLuis R. Rodriguez if (sband->bitrates[i].hw_value == rx_stats->rs_rate) 1769878841eSLuis R. Rodriguez return i; 1779878841eSLuis R. Rodriguez if (sband->bitrates[i].hw_value_short == rx_stats->rs_rate) { 1789878841eSLuis R. Rodriguez rxs->flag |= RX_FLAG_SHORTPRE; 1799878841eSLuis R. Rodriguez return i; 1809878841eSLuis R. Rodriguez } 1819878841eSLuis R. Rodriguez } 1829878841eSLuis R. Rodriguez 1839878841eSLuis R. Rodriguez /* No valid hardware bitrate found -- we should not get here */ 1849878841eSLuis R. Rodriguez ath_print(common, ATH_DBG_XMIT, "unsupported hw bitrate detected " 1859878841eSLuis R. Rodriguez "0x%02x using 1 Mbit\n", rx_stats->rs_rate); 1869878841eSLuis R. Rodriguez if ((common->debug_mask & ATH_DBG_XMIT)) 1879878841eSLuis R. Rodriguez print_hex_dump_bytes("", DUMP_PREFIX_NONE, skb->data, skb->len); 1889878841eSLuis R. Rodriguez 1899878841eSLuis R. Rodriguez return 0; 1909878841eSLuis R. Rodriguez } 1919878841eSLuis R. Rodriguez 192203c4805SLuis R. Rodriguez /* 19321b22738SLuis R. Rodriguez * Theory for reporting quality: 19421b22738SLuis R. Rodriguez * 19521b22738SLuis R. Rodriguez * At a hardware RSSI of 45 you will be able to use MCS 7 reliably. 19621b22738SLuis R. Rodriguez * At a hardware RSSI of 45 you will be able to use MCS 15 reliably. 19721b22738SLuis R. Rodriguez * At a hardware RSSI of 35 you should be able use 54 Mbps reliably. 19821b22738SLuis R. Rodriguez * 19921b22738SLuis R. Rodriguez * MCS 7 is the highets MCS index usable by a 1-stream device. 20021b22738SLuis R. Rodriguez * MCS 15 is the highest MCS index usable by a 2-stream device. 20121b22738SLuis R. Rodriguez * 20221b22738SLuis R. Rodriguez * All ath9k devices are either 1-stream or 2-stream. 20321b22738SLuis R. Rodriguez * 20421b22738SLuis R. Rodriguez * How many bars you see is derived from the qual reporting. 20521b22738SLuis R. Rodriguez * 20621b22738SLuis R. Rodriguez * A more elaborate scheme can be used here but it requires tables 20721b22738SLuis R. Rodriguez * of SNR/throughput for each possible mode used. For the MCS table 20821b22738SLuis R. Rodriguez * you can refer to the wireless wiki: 20921b22738SLuis R. Rodriguez * 21021b22738SLuis R. Rodriguez * http://wireless.kernel.org/en/developers/Documentation/ieee80211/802.11n 21121b22738SLuis R. Rodriguez * 21221b22738SLuis R. Rodriguez */ 21321b22738SLuis R. Rodriguez static int ath9k_compute_qual(struct ieee80211_hw *hw, 21421b22738SLuis R. Rodriguez struct ath_rx_status *rx_stats) 21521b22738SLuis R. Rodriguez { 21621b22738SLuis R. Rodriguez int qual; 21721b22738SLuis R. Rodriguez 21821b22738SLuis R. Rodriguez if (conf_is_ht(&hw->conf)) 21921b22738SLuis R. Rodriguez qual = rx_stats->rs_rssi * 100 / 45; 22021b22738SLuis R. Rodriguez else 22121b22738SLuis R. Rodriguez qual = rx_stats->rs_rssi * 100 / 35; 22221b22738SLuis R. Rodriguez 22321b22738SLuis R. Rodriguez /* 22421b22738SLuis R. Rodriguez * rssi can be more than 45 though, anything above that 22521b22738SLuis R. Rodriguez * should be considered at 100% 22621b22738SLuis R. Rodriguez */ 22721b22738SLuis R. Rodriguez if (qual > 100) 22821b22738SLuis R. Rodriguez qual = 100; 22921b22738SLuis R. Rodriguez 23021b22738SLuis R. Rodriguez return qual; 23121b22738SLuis R. Rodriguez } 23221b22738SLuis R. Rodriguez 233dbfc22dfSLuis R. Rodriguez static void ath9k_process_rssi(struct ath_common *common, 234712c13a8SLuis R. Rodriguez struct ieee80211_hw *hw, 235dbfc22dfSLuis R. Rodriguez struct sk_buff *skb, 236dbfc22dfSLuis R. Rodriguez struct ath_rx_status *rx_stats) 237203c4805SLuis R. Rodriguez { 238712c13a8SLuis R. Rodriguez struct ath_hw *ah = common->ah; 239a59b5a5eSSenthil Balasubramanian struct ieee80211_sta *sta; 240dbfc22dfSLuis R. Rodriguez struct ieee80211_hdr *hdr; 241a59b5a5eSSenthil Balasubramanian struct ath_node *an; 242a59b5a5eSSenthil Balasubramanian int last_rssi = ATH_RSSI_DUMMY_MARKER; 243dbfc22dfSLuis R. Rodriguez __le16 fc; 244a59b5a5eSSenthil Balasubramanian 245203c4805SLuis R. Rodriguez hdr = (struct ieee80211_hdr *)skb->data; 246203c4805SLuis R. Rodriguez fc = hdr->frame_control; 247203c4805SLuis R. Rodriguez 248a59b5a5eSSenthil Balasubramanian rcu_read_lock(); 2495ed176e1SJohannes Berg /* XXX: use ieee80211_find_sta! */ 250cee71d6cSLuis R. Rodriguez sta = ieee80211_find_sta_by_hw(hw, hdr->addr2); 251a59b5a5eSSenthil Balasubramanian if (sta) { 252a59b5a5eSSenthil Balasubramanian an = (struct ath_node *) sta->drv_priv; 25326ab2645SLuis R. Rodriguez if (rx_stats->rs_rssi != ATH9K_RSSI_BAD && 25426ab2645SLuis R. Rodriguez !rx_stats->rs_moreaggr) 25526ab2645SLuis R. Rodriguez ATH_RSSI_LPF(an->last_rssi, rx_stats->rs_rssi); 256a59b5a5eSSenthil Balasubramanian last_rssi = an->last_rssi; 257a59b5a5eSSenthil Balasubramanian } 258a59b5a5eSSenthil Balasubramanian rcu_read_unlock(); 259a59b5a5eSSenthil Balasubramanian 260a59b5a5eSSenthil Balasubramanian if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER)) 26126ab2645SLuis R. Rodriguez rx_stats->rs_rssi = ATH_EP_RND(last_rssi, 262a59b5a5eSSenthil Balasubramanian ATH_RSSI_EP_MULTIPLIER); 26326ab2645SLuis R. Rodriguez if (rx_stats->rs_rssi < 0) 26426ab2645SLuis R. Rodriguez rx_stats->rs_rssi = 0; 26526ab2645SLuis R. Rodriguez else if (rx_stats->rs_rssi > 127) 26626ab2645SLuis R. Rodriguez rx_stats->rs_rssi = 127; 267a59b5a5eSSenthil Balasubramanian 2685e32b1edSSujith /* Update Beacon RSSI, this is used by ANI. */ 2695e32b1edSSujith if (ieee80211_is_beacon(fc)) 270712c13a8SLuis R. Rodriguez ah->stats.avgbrssi = rx_stats->rs_rssi; 271dbfc22dfSLuis R. Rodriguez } 272dbfc22dfSLuis R. Rodriguez 273dbfc22dfSLuis R. Rodriguez /* 274dbfc22dfSLuis R. Rodriguez * For Decrypt or Demic errors, we only mark packet status here and always push 275dbfc22dfSLuis R. Rodriguez * up the frame up to let mac80211 handle the actual error case, be it no 276dbfc22dfSLuis R. Rodriguez * decryption key or real decryption error. This let us keep statistics there. 277dbfc22dfSLuis R. Rodriguez */ 278dbfc22dfSLuis R. Rodriguez static int ath_rx_prepare(struct ath_common *common, 279dbfc22dfSLuis R. Rodriguez struct ieee80211_hw *hw, 280dbfc22dfSLuis R. Rodriguez struct sk_buff *skb, struct ath_rx_status *rx_stats, 281dbfc22dfSLuis R. Rodriguez struct ieee80211_rx_status *rx_status, 282dbfc22dfSLuis R. Rodriguez bool *decrypt_error) 283dbfc22dfSLuis R. Rodriguez { 284dbfc22dfSLuis R. Rodriguez struct ath_hw *ah = common->ah; 285dbfc22dfSLuis R. Rodriguez 286dbfc22dfSLuis R. Rodriguez if (!ath9k_rx_accept(common, skb, rx_status, rx_stats, decrypt_error)) 287dbfc22dfSLuis R. Rodriguez goto rx_next; 288dbfc22dfSLuis R. Rodriguez 289dbfc22dfSLuis R. Rodriguez ath9k_process_rssi(common, hw, skb, rx_stats); 2905e32b1edSSujith 2919878841eSLuis R. Rodriguez rx_status->rate_idx = ath9k_process_rate(common, hw, 2929878841eSLuis R. Rodriguez rx_stats, rx_status, skb); 293712c13a8SLuis R. Rodriguez rx_status->mactime = ath9k_hw_extend_tsf(ah, rx_stats->rs_tstamp); 294203c4805SLuis R. Rodriguez rx_status->band = hw->conf.channel->band; 295203c4805SLuis R. Rodriguez rx_status->freq = hw->conf.channel->center_freq; 2963d536acfSLuis R. Rodriguez rx_status->noise = common->ani.noise_floor; 29726ab2645SLuis R. Rodriguez rx_status->signal = ATH_DEFAULT_NOISE_FLOOR + rx_stats->rs_rssi; 29826ab2645SLuis R. Rodriguez rx_status->antenna = rx_stats->rs_antenna; 29921b22738SLuis R. Rodriguez rx_status->qual = ath9k_compute_qual(hw, rx_stats); 300203c4805SLuis R. Rodriguez rx_status->flag |= RX_FLAG_TSFT; 301203c4805SLuis R. Rodriguez 302203c4805SLuis R. Rodriguez return 1; 303203c4805SLuis R. Rodriguez rx_next: 304203c4805SLuis R. Rodriguez return 0; 305203c4805SLuis R. Rodriguez } 306203c4805SLuis R. Rodriguez 307203c4805SLuis R. Rodriguez static void ath_opmode_init(struct ath_softc *sc) 308203c4805SLuis R. Rodriguez { 309203c4805SLuis R. Rodriguez struct ath_hw *ah = sc->sc_ah; 3101510718dSLuis R. Rodriguez struct ath_common *common = ath9k_hw_common(ah); 3111510718dSLuis R. Rodriguez 312203c4805SLuis R. Rodriguez u32 rfilt, mfilt[2]; 313203c4805SLuis R. Rodriguez 314203c4805SLuis R. Rodriguez /* configure rx filter */ 315203c4805SLuis R. Rodriguez rfilt = ath_calcrxfilter(sc); 316203c4805SLuis R. Rodriguez ath9k_hw_setrxfilter(ah, rfilt); 317203c4805SLuis R. Rodriguez 318203c4805SLuis R. Rodriguez /* configure bssid mask */ 319203c4805SLuis R. Rodriguez if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK) 32013b81559SLuis R. Rodriguez ath_hw_setbssidmask(common); 321203c4805SLuis R. Rodriguez 322203c4805SLuis R. Rodriguez /* configure operational mode */ 323203c4805SLuis R. Rodriguez ath9k_hw_setopmode(ah); 324203c4805SLuis R. Rodriguez 325203c4805SLuis R. Rodriguez /* Handle any link-level address change. */ 3261510718dSLuis R. Rodriguez ath9k_hw_setmac(ah, common->macaddr); 327203c4805SLuis R. Rodriguez 328203c4805SLuis R. Rodriguez /* calculate and install multicast filter */ 329203c4805SLuis R. Rodriguez mfilt[0] = mfilt[1] = ~0; 330203c4805SLuis R. Rodriguez ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]); 331203c4805SLuis R. Rodriguez } 332203c4805SLuis R. Rodriguez 333203c4805SLuis R. Rodriguez int ath_rx_init(struct ath_softc *sc, int nbufs) 334203c4805SLuis R. Rodriguez { 33527c51f1aSLuis R. Rodriguez struct ath_common *common = ath9k_hw_common(sc->sc_ah); 336203c4805SLuis R. Rodriguez struct sk_buff *skb; 337203c4805SLuis R. Rodriguez struct ath_buf *bf; 338203c4805SLuis R. Rodriguez int error = 0; 339203c4805SLuis R. Rodriguez 340203c4805SLuis R. Rodriguez spin_lock_init(&sc->rx.rxflushlock); 341203c4805SLuis R. Rodriguez sc->sc_flags &= ~SC_OP_RXFLUSH; 342203c4805SLuis R. Rodriguez spin_lock_init(&sc->rx.rxbuflock); 343203c4805SLuis R. Rodriguez 344203c4805SLuis R. Rodriguez sc->rx.bufsize = roundup(IEEE80211_MAX_MPDU_LEN, 34527c51f1aSLuis R. Rodriguez min(common->cachelsz, (u16)64)); 346203c4805SLuis R. Rodriguez 347c46917bbSLuis R. Rodriguez ath_print(common, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n", 34827c51f1aSLuis R. Rodriguez common->cachelsz, sc->rx.bufsize); 349203c4805SLuis R. Rodriguez 350203c4805SLuis R. Rodriguez /* Initialize rx descriptors */ 351203c4805SLuis R. Rodriguez 352203c4805SLuis R. Rodriguez error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf, 353203c4805SLuis R. Rodriguez "rx", nbufs, 1); 354203c4805SLuis R. Rodriguez if (error != 0) { 355c46917bbSLuis R. Rodriguez ath_print(common, ATH_DBG_FATAL, 356203c4805SLuis R. Rodriguez "failed to allocate rx descriptors: %d\n", error); 357203c4805SLuis R. Rodriguez goto err; 358203c4805SLuis R. Rodriguez } 359203c4805SLuis R. Rodriguez 360203c4805SLuis R. Rodriguez list_for_each_entry(bf, &sc->rx.rxbuf, list) { 36127c51f1aSLuis R. Rodriguez skb = ath_rxbuf_alloc(common, sc->rx.bufsize, GFP_KERNEL); 362203c4805SLuis R. Rodriguez if (skb == NULL) { 363203c4805SLuis R. Rodriguez error = -ENOMEM; 364203c4805SLuis R. Rodriguez goto err; 365203c4805SLuis R. Rodriguez } 366203c4805SLuis R. Rodriguez 367203c4805SLuis R. Rodriguez bf->bf_mpdu = skb; 368203c4805SLuis R. Rodriguez bf->bf_buf_addr = dma_map_single(sc->dev, skb->data, 369203c4805SLuis R. Rodriguez sc->rx.bufsize, 370203c4805SLuis R. Rodriguez DMA_FROM_DEVICE); 371203c4805SLuis R. Rodriguez if (unlikely(dma_mapping_error(sc->dev, 372203c4805SLuis R. Rodriguez bf->bf_buf_addr))) { 373203c4805SLuis R. Rodriguez dev_kfree_skb_any(skb); 374203c4805SLuis R. Rodriguez bf->bf_mpdu = NULL; 375c46917bbSLuis R. Rodriguez ath_print(common, ATH_DBG_FATAL, 376203c4805SLuis R. Rodriguez "dma_mapping_error() on RX init\n"); 377203c4805SLuis R. Rodriguez error = -ENOMEM; 378203c4805SLuis R. Rodriguez goto err; 379203c4805SLuis R. Rodriguez } 380203c4805SLuis R. Rodriguez bf->bf_dmacontext = bf->bf_buf_addr; 381203c4805SLuis R. Rodriguez } 382203c4805SLuis R. Rodriguez sc->rx.rxlink = NULL; 383203c4805SLuis R. Rodriguez 384203c4805SLuis R. Rodriguez err: 385203c4805SLuis R. Rodriguez if (error) 386203c4805SLuis R. Rodriguez ath_rx_cleanup(sc); 387203c4805SLuis R. Rodriguez 388203c4805SLuis R. Rodriguez return error; 389203c4805SLuis R. Rodriguez } 390203c4805SLuis R. Rodriguez 391203c4805SLuis R. Rodriguez void ath_rx_cleanup(struct ath_softc *sc) 392203c4805SLuis R. Rodriguez { 393203c4805SLuis R. Rodriguez struct sk_buff *skb; 394203c4805SLuis R. Rodriguez struct ath_buf *bf; 395203c4805SLuis R. Rodriguez 396203c4805SLuis R. Rodriguez list_for_each_entry(bf, &sc->rx.rxbuf, list) { 397203c4805SLuis R. Rodriguez skb = bf->bf_mpdu; 398203c4805SLuis R. Rodriguez if (skb) { 399203c4805SLuis R. Rodriguez dma_unmap_single(sc->dev, bf->bf_buf_addr, 400203c4805SLuis R. Rodriguez sc->rx.bufsize, DMA_FROM_DEVICE); 401203c4805SLuis R. Rodriguez dev_kfree_skb(skb); 402203c4805SLuis R. Rodriguez } 403203c4805SLuis R. Rodriguez } 404203c4805SLuis R. Rodriguez 405203c4805SLuis R. Rodriguez if (sc->rx.rxdma.dd_desc_len != 0) 406203c4805SLuis R. Rodriguez ath_descdma_cleanup(sc, &sc->rx.rxdma, &sc->rx.rxbuf); 407203c4805SLuis R. Rodriguez } 408203c4805SLuis R. Rodriguez 409203c4805SLuis R. Rodriguez /* 410203c4805SLuis R. Rodriguez * Calculate the receive filter according to the 411203c4805SLuis R. Rodriguez * operating mode and state: 412203c4805SLuis R. Rodriguez * 413203c4805SLuis R. Rodriguez * o always accept unicast, broadcast, and multicast traffic 414203c4805SLuis R. Rodriguez * o maintain current state of phy error reception (the hal 415203c4805SLuis R. Rodriguez * may enable phy error frames for noise immunity work) 416203c4805SLuis R. Rodriguez * o probe request frames are accepted only when operating in 417203c4805SLuis R. Rodriguez * hostap, adhoc, or monitor modes 418203c4805SLuis R. Rodriguez * o enable promiscuous mode according to the interface state 419203c4805SLuis R. Rodriguez * o accept beacons: 420203c4805SLuis R. Rodriguez * - when operating in adhoc mode so the 802.11 layer creates 421203c4805SLuis R. Rodriguez * node table entries for peers, 422203c4805SLuis R. Rodriguez * - when operating in station mode for collecting rssi data when 423203c4805SLuis R. Rodriguez * the station is otherwise quiet, or 424203c4805SLuis R. Rodriguez * - when operating as a repeater so we see repeater-sta beacons 425203c4805SLuis R. Rodriguez * - when scanning 426203c4805SLuis R. Rodriguez */ 427203c4805SLuis R. Rodriguez 428203c4805SLuis R. Rodriguez u32 ath_calcrxfilter(struct ath_softc *sc) 429203c4805SLuis R. Rodriguez { 430203c4805SLuis R. Rodriguez #define RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR) 431203c4805SLuis R. Rodriguez 432203c4805SLuis R. Rodriguez u32 rfilt; 433203c4805SLuis R. Rodriguez 434203c4805SLuis R. Rodriguez rfilt = (ath9k_hw_getrxfilter(sc->sc_ah) & RX_FILTER_PRESERVE) 435203c4805SLuis R. Rodriguez | ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST 436203c4805SLuis R. Rodriguez | ATH9K_RX_FILTER_MCAST; 437203c4805SLuis R. Rodriguez 438203c4805SLuis R. Rodriguez /* If not a STA, enable processing of Probe Requests */ 439203c4805SLuis R. Rodriguez if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION) 440203c4805SLuis R. Rodriguez rfilt |= ATH9K_RX_FILTER_PROBEREQ; 441203c4805SLuis R. Rodriguez 442203c4805SLuis R. Rodriguez /* 443203c4805SLuis R. Rodriguez * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station 444203c4805SLuis R. Rodriguez * mode interface or when in monitor mode. AP mode does not need this 445203c4805SLuis R. Rodriguez * since it receives all in-BSS frames anyway. 446203c4805SLuis R. Rodriguez */ 447203c4805SLuis R. Rodriguez if (((sc->sc_ah->opmode != NL80211_IFTYPE_AP) && 448203c4805SLuis R. Rodriguez (sc->rx.rxfilter & FIF_PROMISC_IN_BSS)) || 449203c4805SLuis R. Rodriguez (sc->sc_ah->opmode == NL80211_IFTYPE_MONITOR)) 450203c4805SLuis R. Rodriguez rfilt |= ATH9K_RX_FILTER_PROM; 451203c4805SLuis R. Rodriguez 452203c4805SLuis R. Rodriguez if (sc->rx.rxfilter & FIF_CONTROL) 453203c4805SLuis R. Rodriguez rfilt |= ATH9K_RX_FILTER_CONTROL; 454203c4805SLuis R. Rodriguez 455203c4805SLuis R. Rodriguez if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) && 456203c4805SLuis R. Rodriguez !(sc->rx.rxfilter & FIF_BCN_PRBRESP_PROMISC)) 457203c4805SLuis R. Rodriguez rfilt |= ATH9K_RX_FILTER_MYBEACON; 458203c4805SLuis R. Rodriguez else 459203c4805SLuis R. Rodriguez rfilt |= ATH9K_RX_FILTER_BEACON; 460203c4805SLuis R. Rodriguez 46166afad01SSenthil Balasubramanian if ((AR_SREV_9280_10_OR_LATER(sc->sc_ah) || 46266afad01SSenthil Balasubramanian AR_SREV_9285_10_OR_LATER(sc->sc_ah)) && 46366afad01SSenthil Balasubramanian (sc->sc_ah->opmode == NL80211_IFTYPE_AP) && 46466afad01SSenthil Balasubramanian (sc->rx.rxfilter & FIF_PSPOLL)) 465203c4805SLuis R. Rodriguez rfilt |= ATH9K_RX_FILTER_PSPOLL; 466203c4805SLuis R. Rodriguez 4677ea310beSSujith if (conf_is_ht(&sc->hw->conf)) 4687ea310beSSujith rfilt |= ATH9K_RX_FILTER_COMP_BAR; 4697ea310beSSujith 4705eb6ba83SJavier Cardona if (sc->sec_wiphy || (sc->rx.rxfilter & FIF_OTHER_BSS)) { 471203c4805SLuis R. Rodriguez /* TODO: only needed if more than one BSSID is in use in 472203c4805SLuis R. Rodriguez * station/adhoc mode */ 4735eb6ba83SJavier Cardona /* The following may also be needed for other older chips */ 4745eb6ba83SJavier Cardona if (sc->sc_ah->hw_version.macVersion == AR_SREV_VERSION_9160) 4755eb6ba83SJavier Cardona rfilt |= ATH9K_RX_FILTER_PROM; 476203c4805SLuis R. Rodriguez rfilt |= ATH9K_RX_FILTER_MCAST_BCAST_ALL; 477203c4805SLuis R. Rodriguez } 478203c4805SLuis R. Rodriguez 479203c4805SLuis R. Rodriguez return rfilt; 480203c4805SLuis R. Rodriguez 481203c4805SLuis R. Rodriguez #undef RX_FILTER_PRESERVE 482203c4805SLuis R. Rodriguez } 483203c4805SLuis R. Rodriguez 484203c4805SLuis R. Rodriguez int ath_startrecv(struct ath_softc *sc) 485203c4805SLuis R. Rodriguez { 486203c4805SLuis R. Rodriguez struct ath_hw *ah = sc->sc_ah; 487203c4805SLuis R. Rodriguez struct ath_buf *bf, *tbf; 488203c4805SLuis R. Rodriguez 489203c4805SLuis R. Rodriguez spin_lock_bh(&sc->rx.rxbuflock); 490203c4805SLuis R. Rodriguez if (list_empty(&sc->rx.rxbuf)) 491203c4805SLuis R. Rodriguez goto start_recv; 492203c4805SLuis R. Rodriguez 493203c4805SLuis R. Rodriguez sc->rx.rxlink = NULL; 494203c4805SLuis R. Rodriguez list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) { 495203c4805SLuis R. Rodriguez ath_rx_buf_link(sc, bf); 496203c4805SLuis R. Rodriguez } 497203c4805SLuis R. Rodriguez 498203c4805SLuis R. Rodriguez /* We could have deleted elements so the list may be empty now */ 499203c4805SLuis R. Rodriguez if (list_empty(&sc->rx.rxbuf)) 500203c4805SLuis R. Rodriguez goto start_recv; 501203c4805SLuis R. Rodriguez 502203c4805SLuis R. Rodriguez bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list); 503203c4805SLuis R. Rodriguez ath9k_hw_putrxbuf(ah, bf->bf_daddr); 504203c4805SLuis R. Rodriguez ath9k_hw_rxena(ah); 505203c4805SLuis R. Rodriguez 506203c4805SLuis R. Rodriguez start_recv: 507203c4805SLuis R. Rodriguez spin_unlock_bh(&sc->rx.rxbuflock); 508203c4805SLuis R. Rodriguez ath_opmode_init(sc); 509203c4805SLuis R. Rodriguez ath9k_hw_startpcureceive(ah); 510203c4805SLuis R. Rodriguez 511203c4805SLuis R. Rodriguez return 0; 512203c4805SLuis R. Rodriguez } 513203c4805SLuis R. Rodriguez 514203c4805SLuis R. Rodriguez bool ath_stoprecv(struct ath_softc *sc) 515203c4805SLuis R. Rodriguez { 516203c4805SLuis R. Rodriguez struct ath_hw *ah = sc->sc_ah; 517203c4805SLuis R. Rodriguez bool stopped; 518203c4805SLuis R. Rodriguez 519203c4805SLuis R. Rodriguez ath9k_hw_stoppcurecv(ah); 520203c4805SLuis R. Rodriguez ath9k_hw_setrxfilter(ah, 0); 521203c4805SLuis R. Rodriguez stopped = ath9k_hw_stopdmarecv(ah); 522203c4805SLuis R. Rodriguez sc->rx.rxlink = NULL; 523203c4805SLuis R. Rodriguez 524203c4805SLuis R. Rodriguez return stopped; 525203c4805SLuis R. Rodriguez } 526203c4805SLuis R. Rodriguez 527203c4805SLuis R. Rodriguez void ath_flushrecv(struct ath_softc *sc) 528203c4805SLuis R. Rodriguez { 529203c4805SLuis R. Rodriguez spin_lock_bh(&sc->rx.rxflushlock); 530203c4805SLuis R. Rodriguez sc->sc_flags |= SC_OP_RXFLUSH; 531203c4805SLuis R. Rodriguez ath_rx_tasklet(sc, 1); 532203c4805SLuis R. Rodriguez sc->sc_flags &= ~SC_OP_RXFLUSH; 533203c4805SLuis R. Rodriguez spin_unlock_bh(&sc->rx.rxflushlock); 534203c4805SLuis R. Rodriguez } 535203c4805SLuis R. Rodriguez 536cc65965cSJouni Malinen static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb) 537cc65965cSJouni Malinen { 538cc65965cSJouni Malinen /* Check whether the Beacon frame has DTIM indicating buffered bc/mc */ 539cc65965cSJouni Malinen struct ieee80211_mgmt *mgmt; 540cc65965cSJouni Malinen u8 *pos, *end, id, elen; 541cc65965cSJouni Malinen struct ieee80211_tim_ie *tim; 542cc65965cSJouni Malinen 543cc65965cSJouni Malinen mgmt = (struct ieee80211_mgmt *)skb->data; 544cc65965cSJouni Malinen pos = mgmt->u.beacon.variable; 545cc65965cSJouni Malinen end = skb->data + skb->len; 546cc65965cSJouni Malinen 547cc65965cSJouni Malinen while (pos + 2 < end) { 548cc65965cSJouni Malinen id = *pos++; 549cc65965cSJouni Malinen elen = *pos++; 550cc65965cSJouni Malinen if (pos + elen > end) 551cc65965cSJouni Malinen break; 552cc65965cSJouni Malinen 553cc65965cSJouni Malinen if (id == WLAN_EID_TIM) { 554cc65965cSJouni Malinen if (elen < sizeof(*tim)) 555cc65965cSJouni Malinen break; 556cc65965cSJouni Malinen tim = (struct ieee80211_tim_ie *) pos; 557cc65965cSJouni Malinen if (tim->dtim_count != 0) 558cc65965cSJouni Malinen break; 559cc65965cSJouni Malinen return tim->bitmap_ctrl & 0x01; 560cc65965cSJouni Malinen } 561cc65965cSJouni Malinen 562cc65965cSJouni Malinen pos += elen; 563cc65965cSJouni Malinen } 564cc65965cSJouni Malinen 565cc65965cSJouni Malinen return false; 566cc65965cSJouni Malinen } 567cc65965cSJouni Malinen 568cc65965cSJouni Malinen static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb) 569cc65965cSJouni Malinen { 570cc65965cSJouni Malinen struct ieee80211_mgmt *mgmt; 5711510718dSLuis R. Rodriguez struct ath_common *common = ath9k_hw_common(sc->sc_ah); 572cc65965cSJouni Malinen 573cc65965cSJouni Malinen if (skb->len < 24 + 8 + 2 + 2) 574cc65965cSJouni Malinen return; 575cc65965cSJouni Malinen 576cc65965cSJouni Malinen mgmt = (struct ieee80211_mgmt *)skb->data; 5771510718dSLuis R. Rodriguez if (memcmp(common->curbssid, mgmt->bssid, ETH_ALEN) != 0) 578cc65965cSJouni Malinen return; /* not from our current AP */ 579cc65965cSJouni Malinen 580293dc5dfSGabor Juhos sc->sc_flags &= ~SC_OP_WAIT_FOR_BEACON; 581293dc5dfSGabor Juhos 582ccdfeab6SJouni Malinen if (sc->sc_flags & SC_OP_BEACON_SYNC) { 583ccdfeab6SJouni Malinen sc->sc_flags &= ~SC_OP_BEACON_SYNC; 584c46917bbSLuis R. Rodriguez ath_print(common, ATH_DBG_PS, 585c46917bbSLuis R. Rodriguez "Reconfigure Beacon timers based on " 586ccdfeab6SJouni Malinen "timestamp from the AP\n"); 587ccdfeab6SJouni Malinen ath_beacon_config(sc, NULL); 588ccdfeab6SJouni Malinen } 589ccdfeab6SJouni Malinen 590cc65965cSJouni Malinen if (ath_beacon_dtim_pending_cab(skb)) { 591cc65965cSJouni Malinen /* 592cc65965cSJouni Malinen * Remain awake waiting for buffered broadcast/multicast 59358f5fffdSGabor Juhos * frames. If the last broadcast/multicast frame is not 59458f5fffdSGabor Juhos * received properly, the next beacon frame will work as 59558f5fffdSGabor Juhos * a backup trigger for returning into NETWORK SLEEP state, 59658f5fffdSGabor Juhos * so we are waiting for it as well. 597cc65965cSJouni Malinen */ 598c46917bbSLuis R. Rodriguez ath_print(common, ATH_DBG_PS, "Received DTIM beacon indicating " 599cc65965cSJouni Malinen "buffered broadcast/multicast frame(s)\n"); 60058f5fffdSGabor Juhos sc->sc_flags |= SC_OP_WAIT_FOR_CAB | SC_OP_WAIT_FOR_BEACON; 601cc65965cSJouni Malinen return; 602cc65965cSJouni Malinen } 603cc65965cSJouni Malinen 604cc65965cSJouni Malinen if (sc->sc_flags & SC_OP_WAIT_FOR_CAB) { 605cc65965cSJouni Malinen /* 606cc65965cSJouni Malinen * This can happen if a broadcast frame is dropped or the AP 607cc65965cSJouni Malinen * fails to send a frame indicating that all CAB frames have 608cc65965cSJouni Malinen * been delivered. 609cc65965cSJouni Malinen */ 610293dc5dfSGabor Juhos sc->sc_flags &= ~SC_OP_WAIT_FOR_CAB; 611c46917bbSLuis R. Rodriguez ath_print(common, ATH_DBG_PS, 612c46917bbSLuis R. Rodriguez "PS wait for CAB frames timed out\n"); 613cc65965cSJouni Malinen } 614cc65965cSJouni Malinen } 615cc65965cSJouni Malinen 616cc65965cSJouni Malinen static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb) 617cc65965cSJouni Malinen { 618cc65965cSJouni Malinen struct ieee80211_hdr *hdr; 619c46917bbSLuis R. Rodriguez struct ath_common *common = ath9k_hw_common(sc->sc_ah); 620cc65965cSJouni Malinen 621cc65965cSJouni Malinen hdr = (struct ieee80211_hdr *)skb->data; 622cc65965cSJouni Malinen 623cc65965cSJouni Malinen /* Process Beacon and CAB receive in PS state */ 6249a23f9caSJouni Malinen if ((sc->sc_flags & SC_OP_WAIT_FOR_BEACON) && 6259a23f9caSJouni Malinen ieee80211_is_beacon(hdr->frame_control)) 626cc65965cSJouni Malinen ath_rx_ps_beacon(sc, skb); 627cc65965cSJouni Malinen else if ((sc->sc_flags & SC_OP_WAIT_FOR_CAB) && 628cc65965cSJouni Malinen (ieee80211_is_data(hdr->frame_control) || 629cc65965cSJouni Malinen ieee80211_is_action(hdr->frame_control)) && 630cc65965cSJouni Malinen is_multicast_ether_addr(hdr->addr1) && 631cc65965cSJouni Malinen !ieee80211_has_moredata(hdr->frame_control)) { 632cc65965cSJouni Malinen /* 633cc65965cSJouni Malinen * No more broadcast/multicast frames to be received at this 634cc65965cSJouni Malinen * point. 635cc65965cSJouni Malinen */ 636293dc5dfSGabor Juhos sc->sc_flags &= ~SC_OP_WAIT_FOR_CAB; 637c46917bbSLuis R. Rodriguez ath_print(common, ATH_DBG_PS, 638c46917bbSLuis R. Rodriguez "All PS CAB frames received, back to sleep\n"); 6399a23f9caSJouni Malinen } else if ((sc->sc_flags & SC_OP_WAIT_FOR_PSPOLL_DATA) && 6409a23f9caSJouni Malinen !is_multicast_ether_addr(hdr->addr1) && 6419a23f9caSJouni Malinen !ieee80211_has_morefrags(hdr->frame_control)) { 6429a23f9caSJouni Malinen sc->sc_flags &= ~SC_OP_WAIT_FOR_PSPOLL_DATA; 643c46917bbSLuis R. Rodriguez ath_print(common, ATH_DBG_PS, 644c46917bbSLuis R. Rodriguez "Going back to sleep after having received " 645c46917bbSLuis R. Rodriguez "PS-Poll data (0x%x)\n", 6469a23f9caSJouni Malinen sc->sc_flags & (SC_OP_WAIT_FOR_BEACON | 6479a23f9caSJouni Malinen SC_OP_WAIT_FOR_CAB | 6489a23f9caSJouni Malinen SC_OP_WAIT_FOR_PSPOLL_DATA | 6499a23f9caSJouni Malinen SC_OP_WAIT_FOR_TX_ACK)); 650cc65965cSJouni Malinen } 651cc65965cSJouni Malinen } 652cc65965cSJouni Malinen 653b4afffc0SLuis R. Rodriguez static void ath_rx_send_to_mac80211(struct ieee80211_hw *hw, 654b4afffc0SLuis R. Rodriguez struct ath_softc *sc, struct sk_buff *skb, 655*5ca42627SLuis R. Rodriguez struct ieee80211_rx_status *rxs) 6569d64a3cfSJouni Malinen { 6579d64a3cfSJouni Malinen struct ieee80211_hdr *hdr; 6589d64a3cfSJouni Malinen 6599d64a3cfSJouni Malinen hdr = (struct ieee80211_hdr *)skb->data; 6609d64a3cfSJouni Malinen 6619d64a3cfSJouni Malinen /* Send the frame to mac80211 */ 6629d64a3cfSJouni Malinen if (is_multicast_ether_addr(hdr->addr1)) { 6639d64a3cfSJouni Malinen int i; 6649d64a3cfSJouni Malinen /* 6659d64a3cfSJouni Malinen * Deliver broadcast/multicast frames to all suitable 6669d64a3cfSJouni Malinen * virtual wiphys. 6679d64a3cfSJouni Malinen */ 6689d64a3cfSJouni Malinen /* TODO: filter based on channel configuration */ 6699d64a3cfSJouni Malinen for (i = 0; i < sc->num_sec_wiphy; i++) { 6709d64a3cfSJouni Malinen struct ath_wiphy *aphy = sc->sec_wiphy[i]; 6719d64a3cfSJouni Malinen struct sk_buff *nskb; 6729d64a3cfSJouni Malinen if (aphy == NULL) 6739d64a3cfSJouni Malinen continue; 6749d64a3cfSJouni Malinen nskb = skb_copy(skb, GFP_ATOMIC); 675*5ca42627SLuis R. Rodriguez if (!nskb) 676*5ca42627SLuis R. Rodriguez continue; 677f1d58c25SJohannes Berg ieee80211_rx(aphy->hw, nskb); 6789d64a3cfSJouni Malinen } 679f1d58c25SJohannes Berg ieee80211_rx(sc->hw, skb); 680*5ca42627SLuis R. Rodriguez } else 6819d64a3cfSJouni Malinen /* Deliver unicast frames based on receiver address */ 682b4afffc0SLuis R. Rodriguez ieee80211_rx(hw, skb); 6839d64a3cfSJouni Malinen } 6849d64a3cfSJouni Malinen 685203c4805SLuis R. Rodriguez int ath_rx_tasklet(struct ath_softc *sc, int flush) 686203c4805SLuis R. Rodriguez { 687203c4805SLuis R. Rodriguez #define PA2DESC(_sc, _pa) \ 688203c4805SLuis R. Rodriguez ((struct ath_desc *)((caddr_t)(_sc)->rx.rxdma.dd_desc + \ 689203c4805SLuis R. Rodriguez ((_pa) - (_sc)->rx.rxdma.dd_desc_paddr))) 690203c4805SLuis R. Rodriguez 691203c4805SLuis R. Rodriguez struct ath_buf *bf; 692203c4805SLuis R. Rodriguez struct ath_desc *ds; 69326ab2645SLuis R. Rodriguez struct ath_rx_status *rx_stats; 694203c4805SLuis R. Rodriguez struct sk_buff *skb = NULL, *requeue_skb; 695*5ca42627SLuis R. Rodriguez struct ieee80211_rx_status *rxs; 696203c4805SLuis R. Rodriguez struct ath_hw *ah = sc->sc_ah; 69727c51f1aSLuis R. Rodriguez struct ath_common *common = ath9k_hw_common(ah); 698b4afffc0SLuis R. Rodriguez /* 699b4afffc0SLuis R. Rodriguez * The hw can techncically differ from common->hw when using ath9k 700b4afffc0SLuis R. Rodriguez * virtual wiphy so to account for that we iterate over the active 701b4afffc0SLuis R. Rodriguez * wiphys and find the appropriate wiphy and therefore hw. 702b4afffc0SLuis R. Rodriguez */ 703b4afffc0SLuis R. Rodriguez struct ieee80211_hw *hw = NULL; 704203c4805SLuis R. Rodriguez struct ieee80211_hdr *hdr; 705203c4805SLuis R. Rodriguez int hdrlen, padsize, retval; 706203c4805SLuis R. Rodriguez bool decrypt_error = false; 707203c4805SLuis R. Rodriguez u8 keyix; 708203c4805SLuis R. Rodriguez __le16 fc; 709203c4805SLuis R. Rodriguez 710203c4805SLuis R. Rodriguez spin_lock_bh(&sc->rx.rxbuflock); 711203c4805SLuis R. Rodriguez 712203c4805SLuis R. Rodriguez do { 713203c4805SLuis R. Rodriguez /* If handling rx interrupt and flush is in progress => exit */ 714203c4805SLuis R. Rodriguez if ((sc->sc_flags & SC_OP_RXFLUSH) && (flush == 0)) 715203c4805SLuis R. Rodriguez break; 716203c4805SLuis R. Rodriguez 717203c4805SLuis R. Rodriguez if (list_empty(&sc->rx.rxbuf)) { 718203c4805SLuis R. Rodriguez sc->rx.rxlink = NULL; 719203c4805SLuis R. Rodriguez break; 720203c4805SLuis R. Rodriguez } 721203c4805SLuis R. Rodriguez 722203c4805SLuis R. Rodriguez bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list); 723203c4805SLuis R. Rodriguez ds = bf->bf_desc; 724203c4805SLuis R. Rodriguez 725203c4805SLuis R. Rodriguez /* 726203c4805SLuis R. Rodriguez * Must provide the virtual address of the current 727203c4805SLuis R. Rodriguez * descriptor, the physical address, and the virtual 728203c4805SLuis R. Rodriguez * address of the next descriptor in the h/w chain. 729203c4805SLuis R. Rodriguez * This allows the HAL to look ahead to see if the 730203c4805SLuis R. Rodriguez * hardware is done with a descriptor by checking the 731203c4805SLuis R. Rodriguez * done bit in the following descriptor and the address 732203c4805SLuis R. Rodriguez * of the current descriptor the DMA engine is working 733203c4805SLuis R. Rodriguez * on. All this is necessary because of our use of 734203c4805SLuis R. Rodriguez * a self-linked list to avoid rx overruns. 735203c4805SLuis R. Rodriguez */ 736203c4805SLuis R. Rodriguez retval = ath9k_hw_rxprocdesc(ah, ds, 737203c4805SLuis R. Rodriguez bf->bf_daddr, 738203c4805SLuis R. Rodriguez PA2DESC(sc, ds->ds_link), 739203c4805SLuis R. Rodriguez 0); 740203c4805SLuis R. Rodriguez if (retval == -EINPROGRESS) { 741203c4805SLuis R. Rodriguez struct ath_buf *tbf; 742203c4805SLuis R. Rodriguez struct ath_desc *tds; 743203c4805SLuis R. Rodriguez 744203c4805SLuis R. Rodriguez if (list_is_last(&bf->list, &sc->rx.rxbuf)) { 745203c4805SLuis R. Rodriguez sc->rx.rxlink = NULL; 746203c4805SLuis R. Rodriguez break; 747203c4805SLuis R. Rodriguez } 748203c4805SLuis R. Rodriguez 749203c4805SLuis R. Rodriguez tbf = list_entry(bf->list.next, struct ath_buf, list); 750203c4805SLuis R. Rodriguez 751203c4805SLuis R. Rodriguez /* 752203c4805SLuis R. Rodriguez * On some hardware the descriptor status words could 753203c4805SLuis R. Rodriguez * get corrupted, including the done bit. Because of 754203c4805SLuis R. Rodriguez * this, check if the next descriptor's done bit is 755203c4805SLuis R. Rodriguez * set or not. 756203c4805SLuis R. Rodriguez * 757203c4805SLuis R. Rodriguez * If the next descriptor's done bit is set, the current 758203c4805SLuis R. Rodriguez * descriptor has been corrupted. Force s/w to discard 759203c4805SLuis R. Rodriguez * this descriptor and continue... 760203c4805SLuis R. Rodriguez */ 761203c4805SLuis R. Rodriguez 762203c4805SLuis R. Rodriguez tds = tbf->bf_desc; 763203c4805SLuis R. Rodriguez retval = ath9k_hw_rxprocdesc(ah, tds, tbf->bf_daddr, 764203c4805SLuis R. Rodriguez PA2DESC(sc, tds->ds_link), 0); 765203c4805SLuis R. Rodriguez if (retval == -EINPROGRESS) { 766203c4805SLuis R. Rodriguez break; 767203c4805SLuis R. Rodriguez } 768203c4805SLuis R. Rodriguez } 769203c4805SLuis R. Rodriguez 770203c4805SLuis R. Rodriguez skb = bf->bf_mpdu; 771203c4805SLuis R. Rodriguez if (!skb) 772203c4805SLuis R. Rodriguez continue; 773203c4805SLuis R. Rodriguez 774203c4805SLuis R. Rodriguez /* 775203c4805SLuis R. Rodriguez * Synchronize the DMA transfer with CPU before 776203c4805SLuis R. Rodriguez * 1. accessing the frame 777203c4805SLuis R. Rodriguez * 2. requeueing the same buffer to h/w 778203c4805SLuis R. Rodriguez */ 779203c4805SLuis R. Rodriguez dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr, 780203c4805SLuis R. Rodriguez sc->rx.bufsize, 781203c4805SLuis R. Rodriguez DMA_FROM_DEVICE); 782203c4805SLuis R. Rodriguez 783b4afffc0SLuis R. Rodriguez hdr = (struct ieee80211_hdr *) skb->data; 784*5ca42627SLuis R. Rodriguez rxs = IEEE80211_SKB_RXCB(skb); 785*5ca42627SLuis R. Rodriguez 786b4afffc0SLuis R. Rodriguez hw = ath_get_virt_hw(sc, hdr); 78726ab2645SLuis R. Rodriguez rx_stats = &ds->ds_rxstat; 788b4afffc0SLuis R. Rodriguez 789203c4805SLuis R. Rodriguez /* 790203c4805SLuis R. Rodriguez * If we're asked to flush receive queue, directly 791203c4805SLuis R. Rodriguez * chain it back at the queue without processing it. 792203c4805SLuis R. Rodriguez */ 793203c4805SLuis R. Rodriguez if (flush) 794203c4805SLuis R. Rodriguez goto requeue; 795203c4805SLuis R. Rodriguez 79626ab2645SLuis R. Rodriguez if (!rx_stats->rs_datalen) 797203c4805SLuis R. Rodriguez goto requeue; 798203c4805SLuis R. Rodriguez 799203c4805SLuis R. Rodriguez /* The status portion of the descriptor could get corrupted. */ 80026ab2645SLuis R. Rodriguez if (sc->rx.bufsize < rx_stats->rs_datalen) 801203c4805SLuis R. Rodriguez goto requeue; 802203c4805SLuis R. Rodriguez 803712c13a8SLuis R. Rodriguez if (!ath_rx_prepare(common, hw, skb, rx_stats, 804*5ca42627SLuis R. Rodriguez rxs, &decrypt_error)) 805203c4805SLuis R. Rodriguez goto requeue; 806203c4805SLuis R. Rodriguez 807203c4805SLuis R. Rodriguez /* Ensure we always have an skb to requeue once we are done 808203c4805SLuis R. Rodriguez * processing the current buffer's skb */ 80927c51f1aSLuis R. Rodriguez requeue_skb = ath_rxbuf_alloc(common, sc->rx.bufsize, GFP_ATOMIC); 810203c4805SLuis R. Rodriguez 811203c4805SLuis R. Rodriguez /* If there is no memory we ignore the current RX'd frame, 812203c4805SLuis R. Rodriguez * tell hardware it can give us a new frame using the old 813203c4805SLuis R. Rodriguez * skb and put it at the tail of the sc->rx.rxbuf list for 814203c4805SLuis R. Rodriguez * processing. */ 815203c4805SLuis R. Rodriguez if (!requeue_skb) 816203c4805SLuis R. Rodriguez goto requeue; 817203c4805SLuis R. Rodriguez 818203c4805SLuis R. Rodriguez /* Unmap the frame */ 819203c4805SLuis R. Rodriguez dma_unmap_single(sc->dev, bf->bf_buf_addr, 820203c4805SLuis R. Rodriguez sc->rx.bufsize, 821203c4805SLuis R. Rodriguez DMA_FROM_DEVICE); 822203c4805SLuis R. Rodriguez 82326ab2645SLuis R. Rodriguez skb_put(skb, rx_stats->rs_datalen); 824203c4805SLuis R. Rodriguez 825203c4805SLuis R. Rodriguez /* see if any padding is done by the hw and remove it */ 826203c4805SLuis R. Rodriguez hdrlen = ieee80211_get_hdrlen_from_skb(skb); 827203c4805SLuis R. Rodriguez fc = hdr->frame_control; 828203c4805SLuis R. Rodriguez 829203c4805SLuis R. Rodriguez /* The MAC header is padded to have 32-bit boundary if the 830203c4805SLuis R. Rodriguez * packet payload is non-zero. The general calculation for 831203c4805SLuis R. Rodriguez * padsize would take into account odd header lengths: 832203c4805SLuis R. Rodriguez * padsize = (4 - hdrlen % 4) % 4; However, since only 833203c4805SLuis R. Rodriguez * even-length headers are used, padding can only be 0 or 2 834203c4805SLuis R. Rodriguez * bytes and we can optimize this a bit. In addition, we must 835203c4805SLuis R. Rodriguez * not try to remove padding from short control frames that do 836203c4805SLuis R. Rodriguez * not have payload. */ 837203c4805SLuis R. Rodriguez padsize = hdrlen & 3; 838203c4805SLuis R. Rodriguez if (padsize && hdrlen >= 24) { 839203c4805SLuis R. Rodriguez memmove(skb->data + padsize, skb->data, hdrlen); 840203c4805SLuis R. Rodriguez skb_pull(skb, padsize); 841203c4805SLuis R. Rodriguez } 842203c4805SLuis R. Rodriguez 84326ab2645SLuis R. Rodriguez keyix = rx_stats->rs_keyix; 844203c4805SLuis R. Rodriguez 845203c4805SLuis R. Rodriguez if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error) { 846*5ca42627SLuis R. Rodriguez rxs->flag |= RX_FLAG_DECRYPTED; 8479d64a3cfSJouni Malinen } else if (ieee80211_has_protected(fc) 848203c4805SLuis R. Rodriguez && !decrypt_error && skb->len >= hdrlen + 4) { 849203c4805SLuis R. Rodriguez keyix = skb->data[hdrlen + 3] >> 6; 850203c4805SLuis R. Rodriguez 851203c4805SLuis R. Rodriguez if (test_bit(keyix, sc->keymap)) 852*5ca42627SLuis R. Rodriguez rxs->flag |= RX_FLAG_DECRYPTED; 853203c4805SLuis R. Rodriguez } 854203c4805SLuis R. Rodriguez if (ah->sw_mgmt_crypto && 855*5ca42627SLuis R. Rodriguez (rxs->flag & RX_FLAG_DECRYPTED) && 856*5ca42627SLuis R. Rodriguez ieee80211_is_mgmt(fc)) 857203c4805SLuis R. Rodriguez /* Use software decrypt for management frames. */ 858*5ca42627SLuis R. Rodriguez rxs->flag &= ~RX_FLAG_DECRYPTED; 859203c4805SLuis R. Rodriguez 860203c4805SLuis R. Rodriguez /* We will now give hardware our shiny new allocated skb */ 861203c4805SLuis R. Rodriguez bf->bf_mpdu = requeue_skb; 862203c4805SLuis R. Rodriguez bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data, 863203c4805SLuis R. Rodriguez sc->rx.bufsize, 864203c4805SLuis R. Rodriguez DMA_FROM_DEVICE); 865203c4805SLuis R. Rodriguez if (unlikely(dma_mapping_error(sc->dev, 866203c4805SLuis R. Rodriguez bf->bf_buf_addr))) { 867203c4805SLuis R. Rodriguez dev_kfree_skb_any(requeue_skb); 868203c4805SLuis R. Rodriguez bf->bf_mpdu = NULL; 869c46917bbSLuis R. Rodriguez ath_print(common, ATH_DBG_FATAL, 870203c4805SLuis R. Rodriguez "dma_mapping_error() on RX\n"); 871*5ca42627SLuis R. Rodriguez ath_rx_send_to_mac80211(hw, sc, skb, rxs); 872203c4805SLuis R. Rodriguez break; 873203c4805SLuis R. Rodriguez } 874203c4805SLuis R. Rodriguez bf->bf_dmacontext = bf->bf_buf_addr; 875203c4805SLuis R. Rodriguez 876203c4805SLuis R. Rodriguez /* 877203c4805SLuis R. Rodriguez * change the default rx antenna if rx diversity chooses the 878203c4805SLuis R. Rodriguez * other antenna 3 times in a row. 879203c4805SLuis R. Rodriguez */ 880203c4805SLuis R. Rodriguez if (sc->rx.defant != ds->ds_rxstat.rs_antenna) { 881203c4805SLuis R. Rodriguez if (++sc->rx.rxotherant >= 3) 88226ab2645SLuis R. Rodriguez ath_setdefantenna(sc, rx_stats->rs_antenna); 883203c4805SLuis R. Rodriguez } else { 884203c4805SLuis R. Rodriguez sc->rx.rxotherant = 0; 885203c4805SLuis R. Rodriguez } 886203c4805SLuis R. Rodriguez 8879a23f9caSJouni Malinen if (unlikely(sc->sc_flags & (SC_OP_WAIT_FOR_BEACON | 888f0e9a860SGabor Juhos SC_OP_WAIT_FOR_CAB | 8899a23f9caSJouni Malinen SC_OP_WAIT_FOR_PSPOLL_DATA))) 890cc65965cSJouni Malinen ath_rx_ps(sc, skb); 891cc65965cSJouni Malinen 892*5ca42627SLuis R. Rodriguez ath_rx_send_to_mac80211(hw, sc, skb, rxs); 893cc65965cSJouni Malinen 894203c4805SLuis R. Rodriguez requeue: 895203c4805SLuis R. Rodriguez list_move_tail(&bf->list, &sc->rx.rxbuf); 896203c4805SLuis R. Rodriguez ath_rx_buf_link(sc, bf); 897203c4805SLuis R. Rodriguez } while (1); 898203c4805SLuis R. Rodriguez 899203c4805SLuis R. Rodriguez spin_unlock_bh(&sc->rx.rxbuflock); 900203c4805SLuis R. Rodriguez 901203c4805SLuis R. Rodriguez return 0; 902203c4805SLuis R. Rodriguez #undef PA2DESC 903203c4805SLuis R. Rodriguez } 904