1203c4805SLuis R. Rodriguez /* 25b68138eSSujith Manoharan * Copyright (c) 2008-2011 Atheros Communications Inc. 3203c4805SLuis R. Rodriguez * 4203c4805SLuis R. Rodriguez * Permission to use, copy, modify, and/or distribute this software for any 5203c4805SLuis R. Rodriguez * purpose with or without fee is hereby granted, provided that the above 6203c4805SLuis R. Rodriguez * copyright notice and this permission notice appear in all copies. 7203c4805SLuis R. Rodriguez * 8203c4805SLuis R. Rodriguez * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9203c4805SLuis R. Rodriguez * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10203c4805SLuis R. Rodriguez * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11203c4805SLuis R. Rodriguez * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12203c4805SLuis R. Rodriguez * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13203c4805SLuis R. Rodriguez * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14203c4805SLuis R. Rodriguez * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15203c4805SLuis R. Rodriguez */ 16203c4805SLuis R. Rodriguez 17b7f080cfSAlexey Dobriyan #include <linux/dma-mapping.h> 18203c4805SLuis R. Rodriguez #include "ath9k.h" 19b622a720SLuis R. Rodriguez #include "ar9003_mac.h" 20203c4805SLuis R. Rodriguez 21b5c80475SFelix Fietkau #define SKB_CB_ATHBUF(__skb) (*((struct ath_buf **)__skb->cb)) 22b5c80475SFelix Fietkau 23102885a5SVasanthakumar Thiagarajan static inline bool ath_is_alt_ant_ratio_better(int alt_ratio, int maxdelta, 24102885a5SVasanthakumar Thiagarajan int mindelta, int main_rssi_avg, 25102885a5SVasanthakumar Thiagarajan int alt_rssi_avg, int pkt_count) 26102885a5SVasanthakumar Thiagarajan { 27102885a5SVasanthakumar Thiagarajan return (((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) && 28102885a5SVasanthakumar Thiagarajan (alt_rssi_avg > main_rssi_avg + maxdelta)) || 29102885a5SVasanthakumar Thiagarajan (alt_rssi_avg > main_rssi_avg + mindelta)) && (pkt_count > 50); 30102885a5SVasanthakumar Thiagarajan } 31102885a5SVasanthakumar Thiagarajan 32b85c5734SMohammed Shafi Shajakhan static inline bool ath_ant_div_comb_alt_check(u8 div_group, int alt_ratio, 33b85c5734SMohammed Shafi Shajakhan int curr_main_set, int curr_alt_set, 34b85c5734SMohammed Shafi Shajakhan int alt_rssi_avg, int main_rssi_avg) 35b85c5734SMohammed Shafi Shajakhan { 36b85c5734SMohammed Shafi Shajakhan bool result = false; 37b85c5734SMohammed Shafi Shajakhan switch (div_group) { 38b85c5734SMohammed Shafi Shajakhan case 0: 39b85c5734SMohammed Shafi Shajakhan if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO) 40b85c5734SMohammed Shafi Shajakhan result = true; 41b85c5734SMohammed Shafi Shajakhan break; 42b85c5734SMohammed Shafi Shajakhan case 1: 4366ce235aSGabor Juhos case 2: 44b85c5734SMohammed Shafi Shajakhan if ((((curr_main_set == ATH_ANT_DIV_COMB_LNA2) && 45b85c5734SMohammed Shafi Shajakhan (curr_alt_set == ATH_ANT_DIV_COMB_LNA1) && 46b85c5734SMohammed Shafi Shajakhan (alt_rssi_avg >= (main_rssi_avg - 5))) || 47b85c5734SMohammed Shafi Shajakhan ((curr_main_set == ATH_ANT_DIV_COMB_LNA1) && 48b85c5734SMohammed Shafi Shajakhan (curr_alt_set == ATH_ANT_DIV_COMB_LNA2) && 49b85c5734SMohammed Shafi Shajakhan (alt_rssi_avg >= (main_rssi_avg - 2)))) && 50b85c5734SMohammed Shafi Shajakhan (alt_rssi_avg >= 4)) 51b85c5734SMohammed Shafi Shajakhan result = true; 52b85c5734SMohammed Shafi Shajakhan else 53b85c5734SMohammed Shafi Shajakhan result = false; 54b85c5734SMohammed Shafi Shajakhan break; 55b85c5734SMohammed Shafi Shajakhan } 56b85c5734SMohammed Shafi Shajakhan 57b85c5734SMohammed Shafi Shajakhan return result; 58b85c5734SMohammed Shafi Shajakhan } 59b85c5734SMohammed Shafi Shajakhan 60ededf1f8SVasanthakumar Thiagarajan static inline bool ath9k_check_auto_sleep(struct ath_softc *sc) 61ededf1f8SVasanthakumar Thiagarajan { 62ededf1f8SVasanthakumar Thiagarajan return sc->ps_enabled && 63ededf1f8SVasanthakumar Thiagarajan (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP); 64ededf1f8SVasanthakumar Thiagarajan } 65ededf1f8SVasanthakumar Thiagarajan 66203c4805SLuis R. Rodriguez /* 67203c4805SLuis R. Rodriguez * Setup and link descriptors. 68203c4805SLuis R. Rodriguez * 69203c4805SLuis R. Rodriguez * 11N: we can no longer afford to self link the last descriptor. 70203c4805SLuis R. Rodriguez * MAC acknowledges BA status as long as it copies frames to host 71203c4805SLuis R. Rodriguez * buffer (or rx fifo). This can incorrectly acknowledge packets 72203c4805SLuis R. Rodriguez * to a sender if last desc is self-linked. 73203c4805SLuis R. Rodriguez */ 74203c4805SLuis R. Rodriguez static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf) 75203c4805SLuis R. Rodriguez { 76203c4805SLuis R. Rodriguez struct ath_hw *ah = sc->sc_ah; 77cc861f74SLuis R. Rodriguez struct ath_common *common = ath9k_hw_common(ah); 78203c4805SLuis R. Rodriguez struct ath_desc *ds; 79203c4805SLuis R. Rodriguez struct sk_buff *skb; 80203c4805SLuis R. Rodriguez 81203c4805SLuis R. Rodriguez ATH_RXBUF_RESET(bf); 82203c4805SLuis R. Rodriguez 83203c4805SLuis R. Rodriguez ds = bf->bf_desc; 84203c4805SLuis R. Rodriguez ds->ds_link = 0; /* link to null */ 85203c4805SLuis R. Rodriguez ds->ds_data = bf->bf_buf_addr; 86203c4805SLuis R. Rodriguez 87203c4805SLuis R. Rodriguez /* virtual addr of the beginning of the buffer. */ 88203c4805SLuis R. Rodriguez skb = bf->bf_mpdu; 899680e8a3SLuis R. Rodriguez BUG_ON(skb == NULL); 90203c4805SLuis R. Rodriguez ds->ds_vdata = skb->data; 91203c4805SLuis R. Rodriguez 92cc861f74SLuis R. Rodriguez /* 93cc861f74SLuis R. Rodriguez * setup rx descriptors. The rx_bufsize here tells the hardware 94203c4805SLuis R. Rodriguez * how much data it can DMA to us and that we are prepared 95cc861f74SLuis R. Rodriguez * to process 96cc861f74SLuis R. Rodriguez */ 97203c4805SLuis R. Rodriguez ath9k_hw_setuprxdesc(ah, ds, 98cc861f74SLuis R. Rodriguez common->rx_bufsize, 99203c4805SLuis R. Rodriguez 0); 100203c4805SLuis R. Rodriguez 101203c4805SLuis R. Rodriguez if (sc->rx.rxlink == NULL) 102203c4805SLuis R. Rodriguez ath9k_hw_putrxbuf(ah, bf->bf_daddr); 103203c4805SLuis R. Rodriguez else 104203c4805SLuis R. Rodriguez *sc->rx.rxlink = bf->bf_daddr; 105203c4805SLuis R. Rodriguez 106203c4805SLuis R. Rodriguez sc->rx.rxlink = &ds->ds_link; 107203c4805SLuis R. Rodriguez } 108203c4805SLuis R. Rodriguez 109203c4805SLuis R. Rodriguez static void ath_setdefantenna(struct ath_softc *sc, u32 antenna) 110203c4805SLuis R. Rodriguez { 111203c4805SLuis R. Rodriguez /* XXX block beacon interrupts */ 112203c4805SLuis R. Rodriguez ath9k_hw_setantenna(sc->sc_ah, antenna); 113203c4805SLuis R. Rodriguez sc->rx.defant = antenna; 114203c4805SLuis R. Rodriguez sc->rx.rxotherant = 0; 115203c4805SLuis R. Rodriguez } 116203c4805SLuis R. Rodriguez 117203c4805SLuis R. Rodriguez static void ath_opmode_init(struct ath_softc *sc) 118203c4805SLuis R. Rodriguez { 119203c4805SLuis R. Rodriguez struct ath_hw *ah = sc->sc_ah; 1201510718dSLuis R. Rodriguez struct ath_common *common = ath9k_hw_common(ah); 1211510718dSLuis R. Rodriguez 122203c4805SLuis R. Rodriguez u32 rfilt, mfilt[2]; 123203c4805SLuis R. Rodriguez 124203c4805SLuis R. Rodriguez /* configure rx filter */ 125203c4805SLuis R. Rodriguez rfilt = ath_calcrxfilter(sc); 126203c4805SLuis R. Rodriguez ath9k_hw_setrxfilter(ah, rfilt); 127203c4805SLuis R. Rodriguez 128203c4805SLuis R. Rodriguez /* configure bssid mask */ 12913b81559SLuis R. Rodriguez ath_hw_setbssidmask(common); 130203c4805SLuis R. Rodriguez 131203c4805SLuis R. Rodriguez /* configure operational mode */ 132203c4805SLuis R. Rodriguez ath9k_hw_setopmode(ah); 133203c4805SLuis R. Rodriguez 134203c4805SLuis R. Rodriguez /* calculate and install multicast filter */ 135203c4805SLuis R. Rodriguez mfilt[0] = mfilt[1] = ~0; 136203c4805SLuis R. Rodriguez ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]); 137203c4805SLuis R. Rodriguez } 138203c4805SLuis R. Rodriguez 139b5c80475SFelix Fietkau static bool ath_rx_edma_buf_link(struct ath_softc *sc, 140b5c80475SFelix Fietkau enum ath9k_rx_qtype qtype) 141b5c80475SFelix Fietkau { 142b5c80475SFelix Fietkau struct ath_hw *ah = sc->sc_ah; 143b5c80475SFelix Fietkau struct ath_rx_edma *rx_edma; 144b5c80475SFelix Fietkau struct sk_buff *skb; 145b5c80475SFelix Fietkau struct ath_buf *bf; 146b5c80475SFelix Fietkau 147b5c80475SFelix Fietkau rx_edma = &sc->rx.rx_edma[qtype]; 148b5c80475SFelix Fietkau if (skb_queue_len(&rx_edma->rx_fifo) >= rx_edma->rx_fifo_hwsize) 149b5c80475SFelix Fietkau return false; 150b5c80475SFelix Fietkau 151b5c80475SFelix Fietkau bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list); 152b5c80475SFelix Fietkau list_del_init(&bf->list); 153b5c80475SFelix Fietkau 154b5c80475SFelix Fietkau skb = bf->bf_mpdu; 155b5c80475SFelix Fietkau 156b5c80475SFelix Fietkau ATH_RXBUF_RESET(bf); 157b5c80475SFelix Fietkau memset(skb->data, 0, ah->caps.rx_status_len); 158b5c80475SFelix Fietkau dma_sync_single_for_device(sc->dev, bf->bf_buf_addr, 159b5c80475SFelix Fietkau ah->caps.rx_status_len, DMA_TO_DEVICE); 160b5c80475SFelix Fietkau 161b5c80475SFelix Fietkau SKB_CB_ATHBUF(skb) = bf; 162b5c80475SFelix Fietkau ath9k_hw_addrxbuf_edma(ah, bf->bf_buf_addr, qtype); 163b5c80475SFelix Fietkau skb_queue_tail(&rx_edma->rx_fifo, skb); 164b5c80475SFelix Fietkau 165b5c80475SFelix Fietkau return true; 166b5c80475SFelix Fietkau } 167b5c80475SFelix Fietkau 168b5c80475SFelix Fietkau static void ath_rx_addbuffer_edma(struct ath_softc *sc, 169b5c80475SFelix Fietkau enum ath9k_rx_qtype qtype, int size) 170b5c80475SFelix Fietkau { 171b5c80475SFelix Fietkau struct ath_common *common = ath9k_hw_common(sc->sc_ah); 172b5c80475SFelix Fietkau u32 nbuf = 0; 173b5c80475SFelix Fietkau 174b5c80475SFelix Fietkau if (list_empty(&sc->rx.rxbuf)) { 175226afe68SJoe Perches ath_dbg(common, ATH_DBG_QUEUE, "No free rx buf available\n"); 176b5c80475SFelix Fietkau return; 177b5c80475SFelix Fietkau } 178b5c80475SFelix Fietkau 179b5c80475SFelix Fietkau while (!list_empty(&sc->rx.rxbuf)) { 180b5c80475SFelix Fietkau nbuf++; 181b5c80475SFelix Fietkau 182b5c80475SFelix Fietkau if (!ath_rx_edma_buf_link(sc, qtype)) 183b5c80475SFelix Fietkau break; 184b5c80475SFelix Fietkau 185b5c80475SFelix Fietkau if (nbuf >= size) 186b5c80475SFelix Fietkau break; 187b5c80475SFelix Fietkau } 188b5c80475SFelix Fietkau } 189b5c80475SFelix Fietkau 190b5c80475SFelix Fietkau static void ath_rx_remove_buffer(struct ath_softc *sc, 191b5c80475SFelix Fietkau enum ath9k_rx_qtype qtype) 192b5c80475SFelix Fietkau { 193b5c80475SFelix Fietkau struct ath_buf *bf; 194b5c80475SFelix Fietkau struct ath_rx_edma *rx_edma; 195b5c80475SFelix Fietkau struct sk_buff *skb; 196b5c80475SFelix Fietkau 197b5c80475SFelix Fietkau rx_edma = &sc->rx.rx_edma[qtype]; 198b5c80475SFelix Fietkau 199b5c80475SFelix Fietkau while ((skb = skb_dequeue(&rx_edma->rx_fifo)) != NULL) { 200b5c80475SFelix Fietkau bf = SKB_CB_ATHBUF(skb); 201b5c80475SFelix Fietkau BUG_ON(!bf); 202b5c80475SFelix Fietkau list_add_tail(&bf->list, &sc->rx.rxbuf); 203b5c80475SFelix Fietkau } 204b5c80475SFelix Fietkau } 205b5c80475SFelix Fietkau 206b5c80475SFelix Fietkau static void ath_rx_edma_cleanup(struct ath_softc *sc) 207b5c80475SFelix Fietkau { 208b5c80475SFelix Fietkau struct ath_buf *bf; 209b5c80475SFelix Fietkau 210b5c80475SFelix Fietkau ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP); 211b5c80475SFelix Fietkau ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP); 212b5c80475SFelix Fietkau 213b5c80475SFelix Fietkau list_for_each_entry(bf, &sc->rx.rxbuf, list) { 214b5c80475SFelix Fietkau if (bf->bf_mpdu) 215b5c80475SFelix Fietkau dev_kfree_skb_any(bf->bf_mpdu); 216b5c80475SFelix Fietkau } 217b5c80475SFelix Fietkau 218b5c80475SFelix Fietkau INIT_LIST_HEAD(&sc->rx.rxbuf); 219b5c80475SFelix Fietkau 220b5c80475SFelix Fietkau kfree(sc->rx.rx_bufptr); 221b5c80475SFelix Fietkau sc->rx.rx_bufptr = NULL; 222b5c80475SFelix Fietkau } 223b5c80475SFelix Fietkau 224b5c80475SFelix Fietkau static void ath_rx_edma_init_queue(struct ath_rx_edma *rx_edma, int size) 225b5c80475SFelix Fietkau { 226b5c80475SFelix Fietkau skb_queue_head_init(&rx_edma->rx_fifo); 227b5c80475SFelix Fietkau skb_queue_head_init(&rx_edma->rx_buffers); 228b5c80475SFelix Fietkau rx_edma->rx_fifo_hwsize = size; 229b5c80475SFelix Fietkau } 230b5c80475SFelix Fietkau 231b5c80475SFelix Fietkau static int ath_rx_edma_init(struct ath_softc *sc, int nbufs) 232b5c80475SFelix Fietkau { 233b5c80475SFelix Fietkau struct ath_common *common = ath9k_hw_common(sc->sc_ah); 234b5c80475SFelix Fietkau struct ath_hw *ah = sc->sc_ah; 235b5c80475SFelix Fietkau struct sk_buff *skb; 236b5c80475SFelix Fietkau struct ath_buf *bf; 237b5c80475SFelix Fietkau int error = 0, i; 238b5c80475SFelix Fietkau u32 size; 239b5c80475SFelix Fietkau 240b5c80475SFelix Fietkau ath9k_hw_set_rx_bufsize(ah, common->rx_bufsize - 241b5c80475SFelix Fietkau ah->caps.rx_status_len); 242b5c80475SFelix Fietkau 243b5c80475SFelix Fietkau ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_LP], 244b5c80475SFelix Fietkau ah->caps.rx_lp_qdepth); 245b5c80475SFelix Fietkau ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_HP], 246b5c80475SFelix Fietkau ah->caps.rx_hp_qdepth); 247b5c80475SFelix Fietkau 248b5c80475SFelix Fietkau size = sizeof(struct ath_buf) * nbufs; 249b5c80475SFelix Fietkau bf = kzalloc(size, GFP_KERNEL); 250b5c80475SFelix Fietkau if (!bf) 251b5c80475SFelix Fietkau return -ENOMEM; 252b5c80475SFelix Fietkau 253b5c80475SFelix Fietkau INIT_LIST_HEAD(&sc->rx.rxbuf); 254b5c80475SFelix Fietkau sc->rx.rx_bufptr = bf; 255b5c80475SFelix Fietkau 256b5c80475SFelix Fietkau for (i = 0; i < nbufs; i++, bf++) { 257b5c80475SFelix Fietkau skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_KERNEL); 258b5c80475SFelix Fietkau if (!skb) { 259b5c80475SFelix Fietkau error = -ENOMEM; 260b5c80475SFelix Fietkau goto rx_init_fail; 261b5c80475SFelix Fietkau } 262b5c80475SFelix Fietkau 263b5c80475SFelix Fietkau memset(skb->data, 0, common->rx_bufsize); 264b5c80475SFelix Fietkau bf->bf_mpdu = skb; 265b5c80475SFelix Fietkau 266b5c80475SFelix Fietkau bf->bf_buf_addr = dma_map_single(sc->dev, skb->data, 267b5c80475SFelix Fietkau common->rx_bufsize, 268b5c80475SFelix Fietkau DMA_BIDIRECTIONAL); 269b5c80475SFelix Fietkau if (unlikely(dma_mapping_error(sc->dev, 270b5c80475SFelix Fietkau bf->bf_buf_addr))) { 271b5c80475SFelix Fietkau dev_kfree_skb_any(skb); 272b5c80475SFelix Fietkau bf->bf_mpdu = NULL; 2736cf9e995SBen Greear bf->bf_buf_addr = 0; 2743800276aSJoe Perches ath_err(common, 275b5c80475SFelix Fietkau "dma_mapping_error() on RX init\n"); 276b5c80475SFelix Fietkau error = -ENOMEM; 277b5c80475SFelix Fietkau goto rx_init_fail; 278b5c80475SFelix Fietkau } 279b5c80475SFelix Fietkau 280b5c80475SFelix Fietkau list_add_tail(&bf->list, &sc->rx.rxbuf); 281b5c80475SFelix Fietkau } 282b5c80475SFelix Fietkau 283b5c80475SFelix Fietkau return 0; 284b5c80475SFelix Fietkau 285b5c80475SFelix Fietkau rx_init_fail: 286b5c80475SFelix Fietkau ath_rx_edma_cleanup(sc); 287b5c80475SFelix Fietkau return error; 288b5c80475SFelix Fietkau } 289b5c80475SFelix Fietkau 290b5c80475SFelix Fietkau static void ath_edma_start_recv(struct ath_softc *sc) 291b5c80475SFelix Fietkau { 292b5c80475SFelix Fietkau spin_lock_bh(&sc->rx.rxbuflock); 293b5c80475SFelix Fietkau 294b5c80475SFelix Fietkau ath9k_hw_rxena(sc->sc_ah); 295b5c80475SFelix Fietkau 296b5c80475SFelix Fietkau ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_HP, 297b5c80475SFelix Fietkau sc->rx.rx_edma[ATH9K_RX_QUEUE_HP].rx_fifo_hwsize); 298b5c80475SFelix Fietkau 299b5c80475SFelix Fietkau ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_LP, 300b5c80475SFelix Fietkau sc->rx.rx_edma[ATH9K_RX_QUEUE_LP].rx_fifo_hwsize); 301b5c80475SFelix Fietkau 302b5c80475SFelix Fietkau ath_opmode_init(sc); 303b5c80475SFelix Fietkau 30448a6a468SLuis R. Rodriguez ath9k_hw_startpcureceive(sc->sc_ah, (sc->sc_flags & SC_OP_OFFCHANNEL)); 3057583c550SLuis R. Rodriguez 3067583c550SLuis R. Rodriguez spin_unlock_bh(&sc->rx.rxbuflock); 307b5c80475SFelix Fietkau } 308b5c80475SFelix Fietkau 309b5c80475SFelix Fietkau static void ath_edma_stop_recv(struct ath_softc *sc) 310b5c80475SFelix Fietkau { 311b5c80475SFelix Fietkau ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP); 312b5c80475SFelix Fietkau ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP); 313b5c80475SFelix Fietkau } 314b5c80475SFelix Fietkau 315203c4805SLuis R. Rodriguez int ath_rx_init(struct ath_softc *sc, int nbufs) 316203c4805SLuis R. Rodriguez { 31727c51f1aSLuis R. Rodriguez struct ath_common *common = ath9k_hw_common(sc->sc_ah); 318203c4805SLuis R. Rodriguez struct sk_buff *skb; 319203c4805SLuis R. Rodriguez struct ath_buf *bf; 320203c4805SLuis R. Rodriguez int error = 0; 321203c4805SLuis R. Rodriguez 3224bdd1e97SLuis R. Rodriguez spin_lock_init(&sc->sc_pcu_lock); 323203c4805SLuis R. Rodriguez sc->sc_flags &= ~SC_OP_RXFLUSH; 324203c4805SLuis R. Rodriguez spin_lock_init(&sc->rx.rxbuflock); 325203c4805SLuis R. Rodriguez 3260d95521eSFelix Fietkau common->rx_bufsize = IEEE80211_MAX_MPDU_LEN / 2 + 3270d95521eSFelix Fietkau sc->sc_ah->caps.rx_status_len; 3280d95521eSFelix Fietkau 329b5c80475SFelix Fietkau if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) { 330b5c80475SFelix Fietkau return ath_rx_edma_init(sc, nbufs); 331b5c80475SFelix Fietkau } else { 332226afe68SJoe Perches ath_dbg(common, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n", 333cc861f74SLuis R. Rodriguez common->cachelsz, common->rx_bufsize); 334203c4805SLuis R. Rodriguez 335203c4805SLuis R. Rodriguez /* Initialize rx descriptors */ 336203c4805SLuis R. Rodriguez 337203c4805SLuis R. Rodriguez error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf, 3384adfcdedSVasanthakumar Thiagarajan "rx", nbufs, 1, 0); 339203c4805SLuis R. Rodriguez if (error != 0) { 3403800276aSJoe Perches ath_err(common, 341b5c80475SFelix Fietkau "failed to allocate rx descriptors: %d\n", 342b5c80475SFelix Fietkau error); 343203c4805SLuis R. Rodriguez goto err; 344203c4805SLuis R. Rodriguez } 345203c4805SLuis R. Rodriguez 346203c4805SLuis R. Rodriguez list_for_each_entry(bf, &sc->rx.rxbuf, list) { 347b5c80475SFelix Fietkau skb = ath_rxbuf_alloc(common, common->rx_bufsize, 348b5c80475SFelix Fietkau GFP_KERNEL); 349203c4805SLuis R. Rodriguez if (skb == NULL) { 350203c4805SLuis R. Rodriguez error = -ENOMEM; 351203c4805SLuis R. Rodriguez goto err; 352203c4805SLuis R. Rodriguez } 353203c4805SLuis R. Rodriguez 354203c4805SLuis R. Rodriguez bf->bf_mpdu = skb; 355203c4805SLuis R. Rodriguez bf->bf_buf_addr = dma_map_single(sc->dev, skb->data, 356cc861f74SLuis R. Rodriguez common->rx_bufsize, 357203c4805SLuis R. Rodriguez DMA_FROM_DEVICE); 358203c4805SLuis R. Rodriguez if (unlikely(dma_mapping_error(sc->dev, 359203c4805SLuis R. Rodriguez bf->bf_buf_addr))) { 360203c4805SLuis R. Rodriguez dev_kfree_skb_any(skb); 361203c4805SLuis R. Rodriguez bf->bf_mpdu = NULL; 3626cf9e995SBen Greear bf->bf_buf_addr = 0; 3633800276aSJoe Perches ath_err(common, 364203c4805SLuis R. Rodriguez "dma_mapping_error() on RX init\n"); 365203c4805SLuis R. Rodriguez error = -ENOMEM; 366203c4805SLuis R. Rodriguez goto err; 367203c4805SLuis R. Rodriguez } 368203c4805SLuis R. Rodriguez } 369203c4805SLuis R. Rodriguez sc->rx.rxlink = NULL; 370b5c80475SFelix Fietkau } 371203c4805SLuis R. Rodriguez 372203c4805SLuis R. Rodriguez err: 373203c4805SLuis R. Rodriguez if (error) 374203c4805SLuis R. Rodriguez ath_rx_cleanup(sc); 375203c4805SLuis R. Rodriguez 376203c4805SLuis R. Rodriguez return error; 377203c4805SLuis R. Rodriguez } 378203c4805SLuis R. Rodriguez 379203c4805SLuis R. Rodriguez void ath_rx_cleanup(struct ath_softc *sc) 380203c4805SLuis R. Rodriguez { 381cc861f74SLuis R. Rodriguez struct ath_hw *ah = sc->sc_ah; 382cc861f74SLuis R. Rodriguez struct ath_common *common = ath9k_hw_common(ah); 383203c4805SLuis R. Rodriguez struct sk_buff *skb; 384203c4805SLuis R. Rodriguez struct ath_buf *bf; 385203c4805SLuis R. Rodriguez 386b5c80475SFelix Fietkau if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) { 387b5c80475SFelix Fietkau ath_rx_edma_cleanup(sc); 388b5c80475SFelix Fietkau return; 389b5c80475SFelix Fietkau } else { 390203c4805SLuis R. Rodriguez list_for_each_entry(bf, &sc->rx.rxbuf, list) { 391203c4805SLuis R. Rodriguez skb = bf->bf_mpdu; 392203c4805SLuis R. Rodriguez if (skb) { 393203c4805SLuis R. Rodriguez dma_unmap_single(sc->dev, bf->bf_buf_addr, 394b5c80475SFelix Fietkau common->rx_bufsize, 395b5c80475SFelix Fietkau DMA_FROM_DEVICE); 396203c4805SLuis R. Rodriguez dev_kfree_skb(skb); 3976cf9e995SBen Greear bf->bf_buf_addr = 0; 3986cf9e995SBen Greear bf->bf_mpdu = NULL; 399203c4805SLuis R. Rodriguez } 400203c4805SLuis R. Rodriguez } 401203c4805SLuis R. Rodriguez 402203c4805SLuis R. Rodriguez if (sc->rx.rxdma.dd_desc_len != 0) 403203c4805SLuis R. Rodriguez ath_descdma_cleanup(sc, &sc->rx.rxdma, &sc->rx.rxbuf); 404203c4805SLuis R. Rodriguez } 405b5c80475SFelix Fietkau } 406203c4805SLuis R. Rodriguez 407203c4805SLuis R. Rodriguez /* 408203c4805SLuis R. Rodriguez * Calculate the receive filter according to the 409203c4805SLuis R. Rodriguez * operating mode and state: 410203c4805SLuis R. Rodriguez * 411203c4805SLuis R. Rodriguez * o always accept unicast, broadcast, and multicast traffic 412203c4805SLuis R. Rodriguez * o maintain current state of phy error reception (the hal 413203c4805SLuis R. Rodriguez * may enable phy error frames for noise immunity work) 414203c4805SLuis R. Rodriguez * o probe request frames are accepted only when operating in 415203c4805SLuis R. Rodriguez * hostap, adhoc, or monitor modes 416203c4805SLuis R. Rodriguez * o enable promiscuous mode according to the interface state 417203c4805SLuis R. Rodriguez * o accept beacons: 418203c4805SLuis R. Rodriguez * - when operating in adhoc mode so the 802.11 layer creates 419203c4805SLuis R. Rodriguez * node table entries for peers, 420203c4805SLuis R. Rodriguez * - when operating in station mode for collecting rssi data when 421203c4805SLuis R. Rodriguez * the station is otherwise quiet, or 422203c4805SLuis R. Rodriguez * - when operating as a repeater so we see repeater-sta beacons 423203c4805SLuis R. Rodriguez * - when scanning 424203c4805SLuis R. Rodriguez */ 425203c4805SLuis R. Rodriguez 426203c4805SLuis R. Rodriguez u32 ath_calcrxfilter(struct ath_softc *sc) 427203c4805SLuis R. Rodriguez { 428203c4805SLuis R. Rodriguez #define RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR) 429203c4805SLuis R. Rodriguez 430203c4805SLuis R. Rodriguez u32 rfilt; 431203c4805SLuis R. Rodriguez 432203c4805SLuis R. Rodriguez rfilt = (ath9k_hw_getrxfilter(sc->sc_ah) & RX_FILTER_PRESERVE) 433203c4805SLuis R. Rodriguez | ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST 434203c4805SLuis R. Rodriguez | ATH9K_RX_FILTER_MCAST; 435203c4805SLuis R. Rodriguez 4369c1d8e4aSJouni Malinen if (sc->rx.rxfilter & FIF_PROBE_REQ) 437203c4805SLuis R. Rodriguez rfilt |= ATH9K_RX_FILTER_PROBEREQ; 438203c4805SLuis R. Rodriguez 439203c4805SLuis R. Rodriguez /* 440203c4805SLuis R. Rodriguez * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station 441203c4805SLuis R. Rodriguez * mode interface or when in monitor mode. AP mode does not need this 442203c4805SLuis R. Rodriguez * since it receives all in-BSS frames anyway. 443203c4805SLuis R. Rodriguez */ 4442e286947SFelix Fietkau if (sc->sc_ah->is_monitoring) 445203c4805SLuis R. Rodriguez rfilt |= ATH9K_RX_FILTER_PROM; 446203c4805SLuis R. Rodriguez 447203c4805SLuis R. Rodriguez if (sc->rx.rxfilter & FIF_CONTROL) 448203c4805SLuis R. Rodriguez rfilt |= ATH9K_RX_FILTER_CONTROL; 449203c4805SLuis R. Rodriguez 450203c4805SLuis R. Rodriguez if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) && 451cfda6695SBen Greear (sc->nvifs <= 1) && 452203c4805SLuis R. Rodriguez !(sc->rx.rxfilter & FIF_BCN_PRBRESP_PROMISC)) 453203c4805SLuis R. Rodriguez rfilt |= ATH9K_RX_FILTER_MYBEACON; 454203c4805SLuis R. Rodriguez else 455203c4805SLuis R. Rodriguez rfilt |= ATH9K_RX_FILTER_BEACON; 456203c4805SLuis R. Rodriguez 457264bbec8SFelix Fietkau if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) || 45866afad01SSenthil Balasubramanian (sc->rx.rxfilter & FIF_PSPOLL)) 459203c4805SLuis R. Rodriguez rfilt |= ATH9K_RX_FILTER_PSPOLL; 460203c4805SLuis R. Rodriguez 4617ea310beSSujith if (conf_is_ht(&sc->hw->conf)) 4627ea310beSSujith rfilt |= ATH9K_RX_FILTER_COMP_BAR; 4637ea310beSSujith 4647545daf4SFelix Fietkau if (sc->nvifs > 1 || (sc->rx.rxfilter & FIF_OTHER_BSS)) { 4655eb6ba83SJavier Cardona /* The following may also be needed for other older chips */ 4665eb6ba83SJavier Cardona if (sc->sc_ah->hw_version.macVersion == AR_SREV_VERSION_9160) 4675eb6ba83SJavier Cardona rfilt |= ATH9K_RX_FILTER_PROM; 468203c4805SLuis R. Rodriguez rfilt |= ATH9K_RX_FILTER_MCAST_BCAST_ALL; 469203c4805SLuis R. Rodriguez } 470203c4805SLuis R. Rodriguez 471203c4805SLuis R. Rodriguez return rfilt; 472203c4805SLuis R. Rodriguez 473203c4805SLuis R. Rodriguez #undef RX_FILTER_PRESERVE 474203c4805SLuis R. Rodriguez } 475203c4805SLuis R. Rodriguez 476203c4805SLuis R. Rodriguez int ath_startrecv(struct ath_softc *sc) 477203c4805SLuis R. Rodriguez { 478203c4805SLuis R. Rodriguez struct ath_hw *ah = sc->sc_ah; 479203c4805SLuis R. Rodriguez struct ath_buf *bf, *tbf; 480203c4805SLuis R. Rodriguez 481b5c80475SFelix Fietkau if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) { 482b5c80475SFelix Fietkau ath_edma_start_recv(sc); 483b5c80475SFelix Fietkau return 0; 484b5c80475SFelix Fietkau } 485b5c80475SFelix Fietkau 486203c4805SLuis R. Rodriguez spin_lock_bh(&sc->rx.rxbuflock); 487203c4805SLuis R. Rodriguez if (list_empty(&sc->rx.rxbuf)) 488203c4805SLuis R. Rodriguez goto start_recv; 489203c4805SLuis R. Rodriguez 490203c4805SLuis R. Rodriguez sc->rx.rxlink = NULL; 491203c4805SLuis R. Rodriguez list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) { 492203c4805SLuis R. Rodriguez ath_rx_buf_link(sc, bf); 493203c4805SLuis R. Rodriguez } 494203c4805SLuis R. Rodriguez 495203c4805SLuis R. Rodriguez /* We could have deleted elements so the list may be empty now */ 496203c4805SLuis R. Rodriguez if (list_empty(&sc->rx.rxbuf)) 497203c4805SLuis R. Rodriguez goto start_recv; 498203c4805SLuis R. Rodriguez 499203c4805SLuis R. Rodriguez bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list); 500203c4805SLuis R. Rodriguez ath9k_hw_putrxbuf(ah, bf->bf_daddr); 501203c4805SLuis R. Rodriguez ath9k_hw_rxena(ah); 502203c4805SLuis R. Rodriguez 503203c4805SLuis R. Rodriguez start_recv: 504203c4805SLuis R. Rodriguez ath_opmode_init(sc); 50548a6a468SLuis R. Rodriguez ath9k_hw_startpcureceive(ah, (sc->sc_flags & SC_OP_OFFCHANNEL)); 506203c4805SLuis R. Rodriguez 5077583c550SLuis R. Rodriguez spin_unlock_bh(&sc->rx.rxbuflock); 5087583c550SLuis R. Rodriguez 509203c4805SLuis R. Rodriguez return 0; 510203c4805SLuis R. Rodriguez } 511203c4805SLuis R. Rodriguez 512203c4805SLuis R. Rodriguez bool ath_stoprecv(struct ath_softc *sc) 513203c4805SLuis R. Rodriguez { 514203c4805SLuis R. Rodriguez struct ath_hw *ah = sc->sc_ah; 5155882da02SFelix Fietkau bool stopped, reset = false; 516203c4805SLuis R. Rodriguez 5171e450285SLuis R. Rodriguez spin_lock_bh(&sc->rx.rxbuflock); 518d47844a0SFelix Fietkau ath9k_hw_abortpcurecv(ah); 519203c4805SLuis R. Rodriguez ath9k_hw_setrxfilter(ah, 0); 5205882da02SFelix Fietkau stopped = ath9k_hw_stopdmarecv(ah, &reset); 521b5c80475SFelix Fietkau 522b5c80475SFelix Fietkau if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) 523b5c80475SFelix Fietkau ath_edma_stop_recv(sc); 524b5c80475SFelix Fietkau else 525203c4805SLuis R. Rodriguez sc->rx.rxlink = NULL; 5261e450285SLuis R. Rodriguez spin_unlock_bh(&sc->rx.rxbuflock); 527203c4805SLuis R. Rodriguez 528d584747bSRajkumar Manoharan if (!(ah->ah_flags & AH_UNPLUGGED) && 529d584747bSRajkumar Manoharan unlikely(!stopped)) { 530d7fd1b50SBen Greear ath_err(ath9k_hw_common(sc->sc_ah), 531d7fd1b50SBen Greear "Could not stop RX, we could be " 53278a7685eSLuis R. Rodriguez "confusing the DMA engine when we start RX up\n"); 533d7fd1b50SBen Greear ATH_DBG_WARN_ON_ONCE(!stopped); 534d7fd1b50SBen Greear } 5352232d31bSFelix Fietkau return stopped && !reset; 536203c4805SLuis R. Rodriguez } 537203c4805SLuis R. Rodriguez 538203c4805SLuis R. Rodriguez void ath_flushrecv(struct ath_softc *sc) 539203c4805SLuis R. Rodriguez { 540203c4805SLuis R. Rodriguez sc->sc_flags |= SC_OP_RXFLUSH; 541b5c80475SFelix Fietkau if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) 542b5c80475SFelix Fietkau ath_rx_tasklet(sc, 1, true); 543b5c80475SFelix Fietkau ath_rx_tasklet(sc, 1, false); 544203c4805SLuis R. Rodriguez sc->sc_flags &= ~SC_OP_RXFLUSH; 545203c4805SLuis R. Rodriguez } 546203c4805SLuis R. Rodriguez 547cc65965cSJouni Malinen static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb) 548cc65965cSJouni Malinen { 549cc65965cSJouni Malinen /* Check whether the Beacon frame has DTIM indicating buffered bc/mc */ 550cc65965cSJouni Malinen struct ieee80211_mgmt *mgmt; 551cc65965cSJouni Malinen u8 *pos, *end, id, elen; 552cc65965cSJouni Malinen struct ieee80211_tim_ie *tim; 553cc65965cSJouni Malinen 554cc65965cSJouni Malinen mgmt = (struct ieee80211_mgmt *)skb->data; 555cc65965cSJouni Malinen pos = mgmt->u.beacon.variable; 556cc65965cSJouni Malinen end = skb->data + skb->len; 557cc65965cSJouni Malinen 558cc65965cSJouni Malinen while (pos + 2 < end) { 559cc65965cSJouni Malinen id = *pos++; 560cc65965cSJouni Malinen elen = *pos++; 561cc65965cSJouni Malinen if (pos + elen > end) 562cc65965cSJouni Malinen break; 563cc65965cSJouni Malinen 564cc65965cSJouni Malinen if (id == WLAN_EID_TIM) { 565cc65965cSJouni Malinen if (elen < sizeof(*tim)) 566cc65965cSJouni Malinen break; 567cc65965cSJouni Malinen tim = (struct ieee80211_tim_ie *) pos; 568cc65965cSJouni Malinen if (tim->dtim_count != 0) 569cc65965cSJouni Malinen break; 570cc65965cSJouni Malinen return tim->bitmap_ctrl & 0x01; 571cc65965cSJouni Malinen } 572cc65965cSJouni Malinen 573cc65965cSJouni Malinen pos += elen; 574cc65965cSJouni Malinen } 575cc65965cSJouni Malinen 576cc65965cSJouni Malinen return false; 577cc65965cSJouni Malinen } 578cc65965cSJouni Malinen 579cc65965cSJouni Malinen static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb) 580cc65965cSJouni Malinen { 581cc65965cSJouni Malinen struct ieee80211_mgmt *mgmt; 5821510718dSLuis R. Rodriguez struct ath_common *common = ath9k_hw_common(sc->sc_ah); 583cc65965cSJouni Malinen 584cc65965cSJouni Malinen if (skb->len < 24 + 8 + 2 + 2) 585cc65965cSJouni Malinen return; 586cc65965cSJouni Malinen 587cc65965cSJouni Malinen mgmt = (struct ieee80211_mgmt *)skb->data; 5884801416cSBen Greear if (memcmp(common->curbssid, mgmt->bssid, ETH_ALEN) != 0) { 5894801416cSBen Greear /* TODO: This doesn't work well if you have stations 5904801416cSBen Greear * associated to two different APs because curbssid 5914801416cSBen Greear * is just the last AP that any of the stations associated 5924801416cSBen Greear * with. 5934801416cSBen Greear */ 594cc65965cSJouni Malinen return; /* not from our current AP */ 5954801416cSBen Greear } 596cc65965cSJouni Malinen 5971b04b930SSujith sc->ps_flags &= ~PS_WAIT_FOR_BEACON; 598293dc5dfSGabor Juhos 5991b04b930SSujith if (sc->ps_flags & PS_BEACON_SYNC) { 6001b04b930SSujith sc->ps_flags &= ~PS_BEACON_SYNC; 601226afe68SJoe Perches ath_dbg(common, ATH_DBG_PS, 602226afe68SJoe Perches "Reconfigure Beacon timers based on timestamp from the AP\n"); 60399e4d43aSRajkumar Manoharan ath_set_beacon(sc); 604ccdfeab6SJouni Malinen } 605ccdfeab6SJouni Malinen 606cc65965cSJouni Malinen if (ath_beacon_dtim_pending_cab(skb)) { 607cc65965cSJouni Malinen /* 608cc65965cSJouni Malinen * Remain awake waiting for buffered broadcast/multicast 60958f5fffdSGabor Juhos * frames. If the last broadcast/multicast frame is not 61058f5fffdSGabor Juhos * received properly, the next beacon frame will work as 61158f5fffdSGabor Juhos * a backup trigger for returning into NETWORK SLEEP state, 61258f5fffdSGabor Juhos * so we are waiting for it as well. 613cc65965cSJouni Malinen */ 614226afe68SJoe Perches ath_dbg(common, ATH_DBG_PS, 615226afe68SJoe Perches "Received DTIM beacon indicating buffered broadcast/multicast frame(s)\n"); 6161b04b930SSujith sc->ps_flags |= PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON; 617cc65965cSJouni Malinen return; 618cc65965cSJouni Malinen } 619cc65965cSJouni Malinen 6201b04b930SSujith if (sc->ps_flags & PS_WAIT_FOR_CAB) { 621cc65965cSJouni Malinen /* 622cc65965cSJouni Malinen * This can happen if a broadcast frame is dropped or the AP 623cc65965cSJouni Malinen * fails to send a frame indicating that all CAB frames have 624cc65965cSJouni Malinen * been delivered. 625cc65965cSJouni Malinen */ 6261b04b930SSujith sc->ps_flags &= ~PS_WAIT_FOR_CAB; 627226afe68SJoe Perches ath_dbg(common, ATH_DBG_PS, 628c46917bbSLuis R. Rodriguez "PS wait for CAB frames timed out\n"); 629cc65965cSJouni Malinen } 630cc65965cSJouni Malinen } 631cc65965cSJouni Malinen 632cc65965cSJouni Malinen static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb) 633cc65965cSJouni Malinen { 634cc65965cSJouni Malinen struct ieee80211_hdr *hdr; 635c46917bbSLuis R. Rodriguez struct ath_common *common = ath9k_hw_common(sc->sc_ah); 636cc65965cSJouni Malinen 637cc65965cSJouni Malinen hdr = (struct ieee80211_hdr *)skb->data; 638cc65965cSJouni Malinen 639cc65965cSJouni Malinen /* Process Beacon and CAB receive in PS state */ 640ededf1f8SVasanthakumar Thiagarajan if (((sc->ps_flags & PS_WAIT_FOR_BEACON) || ath9k_check_auto_sleep(sc)) 641ededf1f8SVasanthakumar Thiagarajan && ieee80211_is_beacon(hdr->frame_control)) 642cc65965cSJouni Malinen ath_rx_ps_beacon(sc, skb); 6431b04b930SSujith else if ((sc->ps_flags & PS_WAIT_FOR_CAB) && 644cc65965cSJouni Malinen (ieee80211_is_data(hdr->frame_control) || 645cc65965cSJouni Malinen ieee80211_is_action(hdr->frame_control)) && 646cc65965cSJouni Malinen is_multicast_ether_addr(hdr->addr1) && 647cc65965cSJouni Malinen !ieee80211_has_moredata(hdr->frame_control)) { 648cc65965cSJouni Malinen /* 649cc65965cSJouni Malinen * No more broadcast/multicast frames to be received at this 650cc65965cSJouni Malinen * point. 651cc65965cSJouni Malinen */ 6523fac6dfdSSenthil Balasubramanian sc->ps_flags &= ~(PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON); 653226afe68SJoe Perches ath_dbg(common, ATH_DBG_PS, 654c46917bbSLuis R. Rodriguez "All PS CAB frames received, back to sleep\n"); 6551b04b930SSujith } else if ((sc->ps_flags & PS_WAIT_FOR_PSPOLL_DATA) && 6569a23f9caSJouni Malinen !is_multicast_ether_addr(hdr->addr1) && 6579a23f9caSJouni Malinen !ieee80211_has_morefrags(hdr->frame_control)) { 6581b04b930SSujith sc->ps_flags &= ~PS_WAIT_FOR_PSPOLL_DATA; 659226afe68SJoe Perches ath_dbg(common, ATH_DBG_PS, 660226afe68SJoe Perches "Going back to sleep after having received PS-Poll data (0x%lx)\n", 6611b04b930SSujith sc->ps_flags & (PS_WAIT_FOR_BEACON | 6621b04b930SSujith PS_WAIT_FOR_CAB | 6631b04b930SSujith PS_WAIT_FOR_PSPOLL_DATA | 6641b04b930SSujith PS_WAIT_FOR_TX_ACK)); 665cc65965cSJouni Malinen } 666cc65965cSJouni Malinen } 667cc65965cSJouni Malinen 668b5c80475SFelix Fietkau static bool ath_edma_get_buffers(struct ath_softc *sc, 669b5c80475SFelix Fietkau enum ath9k_rx_qtype qtype) 670203c4805SLuis R. Rodriguez { 671b5c80475SFelix Fietkau struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype]; 672203c4805SLuis R. Rodriguez struct ath_hw *ah = sc->sc_ah; 67327c51f1aSLuis R. Rodriguez struct ath_common *common = ath9k_hw_common(ah); 674b5c80475SFelix Fietkau struct sk_buff *skb; 675b5c80475SFelix Fietkau struct ath_buf *bf; 676b5c80475SFelix Fietkau int ret; 677203c4805SLuis R. Rodriguez 678b5c80475SFelix Fietkau skb = skb_peek(&rx_edma->rx_fifo); 679b5c80475SFelix Fietkau if (!skb) 680b5c80475SFelix Fietkau return false; 681203c4805SLuis R. Rodriguez 682b5c80475SFelix Fietkau bf = SKB_CB_ATHBUF(skb); 683b5c80475SFelix Fietkau BUG_ON(!bf); 684b5c80475SFelix Fietkau 685ce9426d1SMing Lei dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr, 686b5c80475SFelix Fietkau common->rx_bufsize, DMA_FROM_DEVICE); 687b5c80475SFelix Fietkau 688b5c80475SFelix Fietkau ret = ath9k_hw_process_rxdesc_edma(ah, NULL, skb->data); 689ce9426d1SMing Lei if (ret == -EINPROGRESS) { 690ce9426d1SMing Lei /*let device gain the buffer again*/ 691ce9426d1SMing Lei dma_sync_single_for_device(sc->dev, bf->bf_buf_addr, 692ce9426d1SMing Lei common->rx_bufsize, DMA_FROM_DEVICE); 693b5c80475SFelix Fietkau return false; 694ce9426d1SMing Lei } 695b5c80475SFelix Fietkau 696b5c80475SFelix Fietkau __skb_unlink(skb, &rx_edma->rx_fifo); 697b5c80475SFelix Fietkau if (ret == -EINVAL) { 698b5c80475SFelix Fietkau /* corrupt descriptor, skip this one and the following one */ 699b5c80475SFelix Fietkau list_add_tail(&bf->list, &sc->rx.rxbuf); 700b5c80475SFelix Fietkau ath_rx_edma_buf_link(sc, qtype); 701b5c80475SFelix Fietkau skb = skb_peek(&rx_edma->rx_fifo); 702b5c80475SFelix Fietkau if (!skb) 703b5c80475SFelix Fietkau return true; 704b5c80475SFelix Fietkau 705b5c80475SFelix Fietkau bf = SKB_CB_ATHBUF(skb); 706b5c80475SFelix Fietkau BUG_ON(!bf); 707b5c80475SFelix Fietkau 708b5c80475SFelix Fietkau __skb_unlink(skb, &rx_edma->rx_fifo); 709b5c80475SFelix Fietkau list_add_tail(&bf->list, &sc->rx.rxbuf); 710b5c80475SFelix Fietkau ath_rx_edma_buf_link(sc, qtype); 711083e3e8dSVasanthakumar Thiagarajan return true; 712b5c80475SFelix Fietkau } 713b5c80475SFelix Fietkau skb_queue_tail(&rx_edma->rx_buffers, skb); 714b5c80475SFelix Fietkau 715b5c80475SFelix Fietkau return true; 716b5c80475SFelix Fietkau } 717b5c80475SFelix Fietkau 718b5c80475SFelix Fietkau static struct ath_buf *ath_edma_get_next_rx_buf(struct ath_softc *sc, 719b5c80475SFelix Fietkau struct ath_rx_status *rs, 720b5c80475SFelix Fietkau enum ath9k_rx_qtype qtype) 721b5c80475SFelix Fietkau { 722b5c80475SFelix Fietkau struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype]; 723b5c80475SFelix Fietkau struct sk_buff *skb; 724b5c80475SFelix Fietkau struct ath_buf *bf; 725b5c80475SFelix Fietkau 726b5c80475SFelix Fietkau while (ath_edma_get_buffers(sc, qtype)); 727b5c80475SFelix Fietkau skb = __skb_dequeue(&rx_edma->rx_buffers); 728b5c80475SFelix Fietkau if (!skb) 729b5c80475SFelix Fietkau return NULL; 730b5c80475SFelix Fietkau 731b5c80475SFelix Fietkau bf = SKB_CB_ATHBUF(skb); 732b5c80475SFelix Fietkau ath9k_hw_process_rxdesc_edma(sc->sc_ah, rs, skb->data); 733b5c80475SFelix Fietkau return bf; 734b5c80475SFelix Fietkau } 735b5c80475SFelix Fietkau 736b5c80475SFelix Fietkau static struct ath_buf *ath_get_next_rx_buf(struct ath_softc *sc, 737b5c80475SFelix Fietkau struct ath_rx_status *rs) 738b5c80475SFelix Fietkau { 739b5c80475SFelix Fietkau struct ath_hw *ah = sc->sc_ah; 740b5c80475SFelix Fietkau struct ath_common *common = ath9k_hw_common(ah); 741b5c80475SFelix Fietkau struct ath_desc *ds; 742b5c80475SFelix Fietkau struct ath_buf *bf; 743b5c80475SFelix Fietkau int ret; 744203c4805SLuis R. Rodriguez 745203c4805SLuis R. Rodriguez if (list_empty(&sc->rx.rxbuf)) { 746203c4805SLuis R. Rodriguez sc->rx.rxlink = NULL; 747b5c80475SFelix Fietkau return NULL; 748203c4805SLuis R. Rodriguez } 749203c4805SLuis R. Rodriguez 750203c4805SLuis R. Rodriguez bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list); 751203c4805SLuis R. Rodriguez ds = bf->bf_desc; 752203c4805SLuis R. Rodriguez 753203c4805SLuis R. Rodriguez /* 754203c4805SLuis R. Rodriguez * Must provide the virtual address of the current 755203c4805SLuis R. Rodriguez * descriptor, the physical address, and the virtual 756203c4805SLuis R. Rodriguez * address of the next descriptor in the h/w chain. 757203c4805SLuis R. Rodriguez * This allows the HAL to look ahead to see if the 758203c4805SLuis R. Rodriguez * hardware is done with a descriptor by checking the 759203c4805SLuis R. Rodriguez * done bit in the following descriptor and the address 760203c4805SLuis R. Rodriguez * of the current descriptor the DMA engine is working 761203c4805SLuis R. Rodriguez * on. All this is necessary because of our use of 762203c4805SLuis R. Rodriguez * a self-linked list to avoid rx overruns. 763203c4805SLuis R. Rodriguez */ 7643de21116SRajkumar Manoharan ret = ath9k_hw_rxprocdesc(ah, ds, rs); 765b5c80475SFelix Fietkau if (ret == -EINPROGRESS) { 76629bffa96SFelix Fietkau struct ath_rx_status trs; 767203c4805SLuis R. Rodriguez struct ath_buf *tbf; 768203c4805SLuis R. Rodriguez struct ath_desc *tds; 769203c4805SLuis R. Rodriguez 77029bffa96SFelix Fietkau memset(&trs, 0, sizeof(trs)); 771203c4805SLuis R. Rodriguez if (list_is_last(&bf->list, &sc->rx.rxbuf)) { 772203c4805SLuis R. Rodriguez sc->rx.rxlink = NULL; 773b5c80475SFelix Fietkau return NULL; 774203c4805SLuis R. Rodriguez } 775203c4805SLuis R. Rodriguez 776203c4805SLuis R. Rodriguez tbf = list_entry(bf->list.next, struct ath_buf, list); 777203c4805SLuis R. Rodriguez 778203c4805SLuis R. Rodriguez /* 779203c4805SLuis R. Rodriguez * On some hardware the descriptor status words could 780203c4805SLuis R. Rodriguez * get corrupted, including the done bit. Because of 781203c4805SLuis R. Rodriguez * this, check if the next descriptor's done bit is 782203c4805SLuis R. Rodriguez * set or not. 783203c4805SLuis R. Rodriguez * 784203c4805SLuis R. Rodriguez * If the next descriptor's done bit is set, the current 785203c4805SLuis R. Rodriguez * descriptor has been corrupted. Force s/w to discard 786203c4805SLuis R. Rodriguez * this descriptor and continue... 787203c4805SLuis R. Rodriguez */ 788203c4805SLuis R. Rodriguez 789203c4805SLuis R. Rodriguez tds = tbf->bf_desc; 7903de21116SRajkumar Manoharan ret = ath9k_hw_rxprocdesc(ah, tds, &trs); 791b5c80475SFelix Fietkau if (ret == -EINPROGRESS) 792b5c80475SFelix Fietkau return NULL; 793203c4805SLuis R. Rodriguez } 794203c4805SLuis R. Rodriguez 795b5c80475SFelix Fietkau if (!bf->bf_mpdu) 796b5c80475SFelix Fietkau return bf; 797203c4805SLuis R. Rodriguez 798203c4805SLuis R. Rodriguez /* 799203c4805SLuis R. Rodriguez * Synchronize the DMA transfer with CPU before 800203c4805SLuis R. Rodriguez * 1. accessing the frame 801203c4805SLuis R. Rodriguez * 2. requeueing the same buffer to h/w 802203c4805SLuis R. Rodriguez */ 803ce9426d1SMing Lei dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr, 804cc861f74SLuis R. Rodriguez common->rx_bufsize, 805203c4805SLuis R. Rodriguez DMA_FROM_DEVICE); 806203c4805SLuis R. Rodriguez 807b5c80475SFelix Fietkau return bf; 808b5c80475SFelix Fietkau } 809b5c80475SFelix Fietkau 810d435700fSSujith /* Assumes you've already done the endian to CPU conversion */ 811d435700fSSujith static bool ath9k_rx_accept(struct ath_common *common, 8129f167f64SVasanthakumar Thiagarajan struct ieee80211_hdr *hdr, 813d435700fSSujith struct ieee80211_rx_status *rxs, 814d435700fSSujith struct ath_rx_status *rx_stats, 815d435700fSSujith bool *decrypt_error) 816d435700fSSujith { 81766760eacSFelix Fietkau bool is_mc, is_valid_tkip, strip_mic, mic_error; 818d435700fSSujith struct ath_hw *ah = common->ah; 819d435700fSSujith __le16 fc; 820b7b1b512SVasanthakumar Thiagarajan u8 rx_status_len = ah->caps.rx_status_len; 821d435700fSSujith 822d435700fSSujith fc = hdr->frame_control; 823d435700fSSujith 82466760eacSFelix Fietkau is_mc = !!is_multicast_ether_addr(hdr->addr1); 82566760eacSFelix Fietkau is_valid_tkip = rx_stats->rs_keyix != ATH9K_RXKEYIX_INVALID && 82666760eacSFelix Fietkau test_bit(rx_stats->rs_keyix, common->tkip_keymap); 827152e585dSBill Jordan strip_mic = is_valid_tkip && ieee80211_is_data(fc) && 828152e585dSBill Jordan !(rx_stats->rs_status & 82966760eacSFelix Fietkau (ATH9K_RXERR_DECRYPT | ATH9K_RXERR_CRC | ATH9K_RXERR_MIC)); 83066760eacSFelix Fietkau 831d435700fSSujith if (!rx_stats->rs_datalen) 832d435700fSSujith return false; 833d435700fSSujith /* 834d435700fSSujith * rs_status follows rs_datalen so if rs_datalen is too large 835d435700fSSujith * we can take a hint that hardware corrupted it, so ignore 836d435700fSSujith * those frames. 837d435700fSSujith */ 838b7b1b512SVasanthakumar Thiagarajan if (rx_stats->rs_datalen > (common->rx_bufsize - rx_status_len)) 839d435700fSSujith return false; 840d435700fSSujith 8410d95521eSFelix Fietkau /* Only use error bits from the last fragment */ 842d435700fSSujith if (rx_stats->rs_more) 8430d95521eSFelix Fietkau return true; 844d435700fSSujith 84566760eacSFelix Fietkau mic_error = is_valid_tkip && !ieee80211_is_ctl(fc) && 84666760eacSFelix Fietkau !ieee80211_has_morefrags(fc) && 84766760eacSFelix Fietkau !(le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG) && 84866760eacSFelix Fietkau (rx_stats->rs_status & ATH9K_RXERR_MIC); 84966760eacSFelix Fietkau 850d435700fSSujith /* 851d435700fSSujith * The rx_stats->rs_status will not be set until the end of the 852d435700fSSujith * chained descriptors so it can be ignored if rs_more is set. The 853d435700fSSujith * rs_more will be false at the last element of the chained 854d435700fSSujith * descriptors. 855d435700fSSujith */ 856d435700fSSujith if (rx_stats->rs_status != 0) { 85766760eacSFelix Fietkau if (rx_stats->rs_status & ATH9K_RXERR_CRC) { 858d435700fSSujith rxs->flag |= RX_FLAG_FAILED_FCS_CRC; 85966760eacSFelix Fietkau mic_error = false; 86066760eacSFelix Fietkau } 861d435700fSSujith if (rx_stats->rs_status & ATH9K_RXERR_PHY) 862d435700fSSujith return false; 863d435700fSSujith 864d435700fSSujith if (rx_stats->rs_status & ATH9K_RXERR_DECRYPT) { 865d435700fSSujith *decrypt_error = true; 86666760eacSFelix Fietkau mic_error = false; 867d435700fSSujith } 86866760eacSFelix Fietkau 869d435700fSSujith /* 870d435700fSSujith * Reject error frames with the exception of 871d435700fSSujith * decryption and MIC failures. For monitor mode, 872d435700fSSujith * we also ignore the CRC error. 873d435700fSSujith */ 8745f841b41SRajkumar Manoharan if (ah->is_monitoring) { 875d435700fSSujith if (rx_stats->rs_status & 876d435700fSSujith ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC | 877d435700fSSujith ATH9K_RXERR_CRC)) 878d435700fSSujith return false; 879d435700fSSujith } else { 880d435700fSSujith if (rx_stats->rs_status & 881d435700fSSujith ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) { 882d435700fSSujith return false; 883d435700fSSujith } 884d435700fSSujith } 885d435700fSSujith } 88666760eacSFelix Fietkau 88766760eacSFelix Fietkau /* 88866760eacSFelix Fietkau * For unicast frames the MIC error bit can have false positives, 88966760eacSFelix Fietkau * so all MIC error reports need to be validated in software. 89066760eacSFelix Fietkau * False negatives are not common, so skip software verification 89166760eacSFelix Fietkau * if the hardware considers the MIC valid. 89266760eacSFelix Fietkau */ 89366760eacSFelix Fietkau if (strip_mic) 89466760eacSFelix Fietkau rxs->flag |= RX_FLAG_MMIC_STRIPPED; 89566760eacSFelix Fietkau else if (is_mc && mic_error) 89666760eacSFelix Fietkau rxs->flag |= RX_FLAG_MMIC_ERROR; 89766760eacSFelix Fietkau 898d435700fSSujith return true; 899d435700fSSujith } 900d435700fSSujith 901d435700fSSujith static int ath9k_process_rate(struct ath_common *common, 902d435700fSSujith struct ieee80211_hw *hw, 903d435700fSSujith struct ath_rx_status *rx_stats, 9049f167f64SVasanthakumar Thiagarajan struct ieee80211_rx_status *rxs) 905d435700fSSujith { 906d435700fSSujith struct ieee80211_supported_band *sband; 907d435700fSSujith enum ieee80211_band band; 908d435700fSSujith unsigned int i = 0; 909d435700fSSujith 910d435700fSSujith band = hw->conf.channel->band; 911d435700fSSujith sband = hw->wiphy->bands[band]; 912d435700fSSujith 913d435700fSSujith if (rx_stats->rs_rate & 0x80) { 914d435700fSSujith /* HT rate */ 915d435700fSSujith rxs->flag |= RX_FLAG_HT; 916d435700fSSujith if (rx_stats->rs_flags & ATH9K_RX_2040) 917d435700fSSujith rxs->flag |= RX_FLAG_40MHZ; 918d435700fSSujith if (rx_stats->rs_flags & ATH9K_RX_GI) 919d435700fSSujith rxs->flag |= RX_FLAG_SHORT_GI; 920d435700fSSujith rxs->rate_idx = rx_stats->rs_rate & 0x7f; 921d435700fSSujith return 0; 922d435700fSSujith } 923d435700fSSujith 924d435700fSSujith for (i = 0; i < sband->n_bitrates; i++) { 925d435700fSSujith if (sband->bitrates[i].hw_value == rx_stats->rs_rate) { 926d435700fSSujith rxs->rate_idx = i; 927d435700fSSujith return 0; 928d435700fSSujith } 929d435700fSSujith if (sband->bitrates[i].hw_value_short == rx_stats->rs_rate) { 930d435700fSSujith rxs->flag |= RX_FLAG_SHORTPRE; 931d435700fSSujith rxs->rate_idx = i; 932d435700fSSujith return 0; 933d435700fSSujith } 934d435700fSSujith } 935d435700fSSujith 936d435700fSSujith /* 937d435700fSSujith * No valid hardware bitrate found -- we should not get here 938d435700fSSujith * because hardware has already validated this frame as OK. 939d435700fSSujith */ 9409976f62eSMohammed Shafi Shajakhan ath_dbg(common, ATH_DBG_ANY, 941226afe68SJoe Perches "unsupported hw bitrate detected 0x%02x using 1 Mbit\n", 942226afe68SJoe Perches rx_stats->rs_rate); 943d435700fSSujith 944d435700fSSujith return -EINVAL; 945d435700fSSujith } 946d435700fSSujith 947d435700fSSujith static void ath9k_process_rssi(struct ath_common *common, 948d435700fSSujith struct ieee80211_hw *hw, 9499f167f64SVasanthakumar Thiagarajan struct ieee80211_hdr *hdr, 950d435700fSSujith struct ath_rx_status *rx_stats) 951d435700fSSujith { 9529ac58615SFelix Fietkau struct ath_softc *sc = hw->priv; 953d435700fSSujith struct ath_hw *ah = common->ah; 9549fa23e17SFelix Fietkau int last_rssi; 955d435700fSSujith 956cf3af748SRajkumar Manoharan if (!rx_stats->is_mybeacon || 957cf3af748SRajkumar Manoharan ((ah->opmode != NL80211_IFTYPE_STATION) && 958cf3af748SRajkumar Manoharan (ah->opmode != NL80211_IFTYPE_ADHOC))) 9599fa23e17SFelix Fietkau return; 9609fa23e17SFelix Fietkau 9619fa23e17SFelix Fietkau if (rx_stats->rs_rssi != ATH9K_RSSI_BAD && !rx_stats->rs_moreaggr) 9629ac58615SFelix Fietkau ATH_RSSI_LPF(sc->last_rssi, rx_stats->rs_rssi); 963686b9cb9SBen Greear 9649ac58615SFelix Fietkau last_rssi = sc->last_rssi; 965d435700fSSujith if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER)) 966d435700fSSujith rx_stats->rs_rssi = ATH_EP_RND(last_rssi, 967d435700fSSujith ATH_RSSI_EP_MULTIPLIER); 968d435700fSSujith if (rx_stats->rs_rssi < 0) 969d435700fSSujith rx_stats->rs_rssi = 0; 970d435700fSSujith 971d435700fSSujith /* Update Beacon RSSI, this is used by ANI. */ 972d435700fSSujith ah->stats.avgbrssi = rx_stats->rs_rssi; 973d435700fSSujith } 974d435700fSSujith 975d435700fSSujith /* 976d435700fSSujith * For Decrypt or Demic errors, we only mark packet status here and always push 977d435700fSSujith * up the frame up to let mac80211 handle the actual error case, be it no 978d435700fSSujith * decryption key or real decryption error. This let us keep statistics there. 979d435700fSSujith */ 980d435700fSSujith static int ath9k_rx_skb_preprocess(struct ath_common *common, 981d435700fSSujith struct ieee80211_hw *hw, 9829f167f64SVasanthakumar Thiagarajan struct ieee80211_hdr *hdr, 983d435700fSSujith struct ath_rx_status *rx_stats, 984d435700fSSujith struct ieee80211_rx_status *rx_status, 985d435700fSSujith bool *decrypt_error) 986d435700fSSujith { 987f749b946SFelix Fietkau struct ath_hw *ah = common->ah; 988f749b946SFelix Fietkau 989d435700fSSujith memset(rx_status, 0, sizeof(struct ieee80211_rx_status)); 990d435700fSSujith 991d435700fSSujith /* 992d435700fSSujith * everything but the rate is checked here, the rate check is done 993d435700fSSujith * separately to avoid doing two lookups for a rate for each frame. 994d435700fSSujith */ 9959f167f64SVasanthakumar Thiagarajan if (!ath9k_rx_accept(common, hdr, rx_status, rx_stats, decrypt_error)) 996d435700fSSujith return -EINVAL; 997d435700fSSujith 9980d95521eSFelix Fietkau /* Only use status info from the last fragment */ 9990d95521eSFelix Fietkau if (rx_stats->rs_more) 10000d95521eSFelix Fietkau return 0; 10010d95521eSFelix Fietkau 10029f167f64SVasanthakumar Thiagarajan ath9k_process_rssi(common, hw, hdr, rx_stats); 1003d435700fSSujith 10049f167f64SVasanthakumar Thiagarajan if (ath9k_process_rate(common, hw, rx_stats, rx_status)) 1005d435700fSSujith return -EINVAL; 1006d435700fSSujith 1007d435700fSSujith rx_status->band = hw->conf.channel->band; 1008d435700fSSujith rx_status->freq = hw->conf.channel->center_freq; 1009f749b946SFelix Fietkau rx_status->signal = ah->noise + rx_stats->rs_rssi; 1010d435700fSSujith rx_status->antenna = rx_stats->rs_antenna; 10116ebacbb7SJohannes Berg rx_status->flag |= RX_FLAG_MACTIME_MPDU; 1012d435700fSSujith 1013d435700fSSujith return 0; 1014d435700fSSujith } 1015d435700fSSujith 1016d435700fSSujith static void ath9k_rx_skb_postprocess(struct ath_common *common, 1017d435700fSSujith struct sk_buff *skb, 1018d435700fSSujith struct ath_rx_status *rx_stats, 1019d435700fSSujith struct ieee80211_rx_status *rxs, 1020d435700fSSujith bool decrypt_error) 1021d435700fSSujith { 1022d435700fSSujith struct ath_hw *ah = common->ah; 1023d435700fSSujith struct ieee80211_hdr *hdr; 1024d435700fSSujith int hdrlen, padpos, padsize; 1025d435700fSSujith u8 keyix; 1026d435700fSSujith __le16 fc; 1027d435700fSSujith 1028d435700fSSujith /* see if any padding is done by the hw and remove it */ 1029d435700fSSujith hdr = (struct ieee80211_hdr *) skb->data; 1030d435700fSSujith hdrlen = ieee80211_get_hdrlen_from_skb(skb); 1031d435700fSSujith fc = hdr->frame_control; 1032d435700fSSujith padpos = ath9k_cmn_padpos(hdr->frame_control); 1033d435700fSSujith 1034d435700fSSujith /* The MAC header is padded to have 32-bit boundary if the 1035d435700fSSujith * packet payload is non-zero. The general calculation for 1036d435700fSSujith * padsize would take into account odd header lengths: 1037d435700fSSujith * padsize = (4 - padpos % 4) % 4; However, since only 1038d435700fSSujith * even-length headers are used, padding can only be 0 or 2 1039d435700fSSujith * bytes and we can optimize this a bit. In addition, we must 1040d435700fSSujith * not try to remove padding from short control frames that do 1041d435700fSSujith * not have payload. */ 1042d435700fSSujith padsize = padpos & 3; 1043d435700fSSujith if (padsize && skb->len>=padpos+padsize+FCS_LEN) { 1044d435700fSSujith memmove(skb->data + padsize, skb->data, padpos); 1045d435700fSSujith skb_pull(skb, padsize); 1046d435700fSSujith } 1047d435700fSSujith 1048d435700fSSujith keyix = rx_stats->rs_keyix; 1049d435700fSSujith 1050d435700fSSujith if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error && 1051d435700fSSujith ieee80211_has_protected(fc)) { 1052d435700fSSujith rxs->flag |= RX_FLAG_DECRYPTED; 1053d435700fSSujith } else if (ieee80211_has_protected(fc) 1054d435700fSSujith && !decrypt_error && skb->len >= hdrlen + 4) { 1055d435700fSSujith keyix = skb->data[hdrlen + 3] >> 6; 1056d435700fSSujith 1057d435700fSSujith if (test_bit(keyix, common->keymap)) 1058d435700fSSujith rxs->flag |= RX_FLAG_DECRYPTED; 1059d435700fSSujith } 1060d435700fSSujith if (ah->sw_mgmt_crypto && 1061d435700fSSujith (rxs->flag & RX_FLAG_DECRYPTED) && 1062d435700fSSujith ieee80211_is_mgmt(fc)) 1063d435700fSSujith /* Use software decrypt for management frames. */ 1064d435700fSSujith rxs->flag &= ~RX_FLAG_DECRYPTED; 1065d435700fSSujith } 1066b5c80475SFelix Fietkau 1067102885a5SVasanthakumar Thiagarajan static void ath_lnaconf_alt_good_scan(struct ath_ant_comb *antcomb, 1068102885a5SVasanthakumar Thiagarajan struct ath_hw_antcomb_conf ant_conf, 1069102885a5SVasanthakumar Thiagarajan int main_rssi_avg) 1070102885a5SVasanthakumar Thiagarajan { 1071102885a5SVasanthakumar Thiagarajan antcomb->quick_scan_cnt = 0; 1072102885a5SVasanthakumar Thiagarajan 1073102885a5SVasanthakumar Thiagarajan if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA2) 1074102885a5SVasanthakumar Thiagarajan antcomb->rssi_lna2 = main_rssi_avg; 1075102885a5SVasanthakumar Thiagarajan else if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA1) 1076102885a5SVasanthakumar Thiagarajan antcomb->rssi_lna1 = main_rssi_avg; 1077102885a5SVasanthakumar Thiagarajan 1078102885a5SVasanthakumar Thiagarajan switch ((ant_conf.main_lna_conf << 4) | ant_conf.alt_lna_conf) { 1079223c5a87SGabor Juhos case 0x10: /* LNA2 A-B */ 1080102885a5SVasanthakumar Thiagarajan antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2; 1081102885a5SVasanthakumar Thiagarajan antcomb->first_quick_scan_conf = 1082102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2; 1083102885a5SVasanthakumar Thiagarajan antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1; 1084102885a5SVasanthakumar Thiagarajan break; 1085223c5a87SGabor Juhos case 0x20: /* LNA1 A-B */ 1086102885a5SVasanthakumar Thiagarajan antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2; 1087102885a5SVasanthakumar Thiagarajan antcomb->first_quick_scan_conf = 1088102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2; 1089102885a5SVasanthakumar Thiagarajan antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2; 1090102885a5SVasanthakumar Thiagarajan break; 1091223c5a87SGabor Juhos case 0x21: /* LNA1 LNA2 */ 1092102885a5SVasanthakumar Thiagarajan antcomb->main_conf = ATH_ANT_DIV_COMB_LNA2; 1093102885a5SVasanthakumar Thiagarajan antcomb->first_quick_scan_conf = 1094102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2; 1095102885a5SVasanthakumar Thiagarajan antcomb->second_quick_scan_conf = 1096102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2; 1097102885a5SVasanthakumar Thiagarajan break; 1098223c5a87SGabor Juhos case 0x12: /* LNA2 LNA1 */ 1099102885a5SVasanthakumar Thiagarajan antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1; 1100102885a5SVasanthakumar Thiagarajan antcomb->first_quick_scan_conf = 1101102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2; 1102102885a5SVasanthakumar Thiagarajan antcomb->second_quick_scan_conf = 1103102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2; 1104102885a5SVasanthakumar Thiagarajan break; 1105223c5a87SGabor Juhos case 0x13: /* LNA2 A+B */ 1106102885a5SVasanthakumar Thiagarajan antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2; 1107102885a5SVasanthakumar Thiagarajan antcomb->first_quick_scan_conf = 1108102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2; 1109102885a5SVasanthakumar Thiagarajan antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1; 1110102885a5SVasanthakumar Thiagarajan break; 1111223c5a87SGabor Juhos case 0x23: /* LNA1 A+B */ 1112102885a5SVasanthakumar Thiagarajan antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2; 1113102885a5SVasanthakumar Thiagarajan antcomb->first_quick_scan_conf = 1114102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2; 1115102885a5SVasanthakumar Thiagarajan antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2; 1116102885a5SVasanthakumar Thiagarajan break; 1117102885a5SVasanthakumar Thiagarajan default: 1118102885a5SVasanthakumar Thiagarajan break; 1119102885a5SVasanthakumar Thiagarajan } 1120102885a5SVasanthakumar Thiagarajan } 1121102885a5SVasanthakumar Thiagarajan 1122102885a5SVasanthakumar Thiagarajan static void ath_select_ant_div_from_quick_scan(struct ath_ant_comb *antcomb, 1123102885a5SVasanthakumar Thiagarajan struct ath_hw_antcomb_conf *div_ant_conf, 1124102885a5SVasanthakumar Thiagarajan int main_rssi_avg, int alt_rssi_avg, 1125102885a5SVasanthakumar Thiagarajan int alt_ratio) 1126102885a5SVasanthakumar Thiagarajan { 1127102885a5SVasanthakumar Thiagarajan /* alt_good */ 1128102885a5SVasanthakumar Thiagarajan switch (antcomb->quick_scan_cnt) { 1129102885a5SVasanthakumar Thiagarajan case 0: 1130102885a5SVasanthakumar Thiagarajan /* set alt to main, and alt to first conf */ 1131102885a5SVasanthakumar Thiagarajan div_ant_conf->main_lna_conf = antcomb->main_conf; 1132102885a5SVasanthakumar Thiagarajan div_ant_conf->alt_lna_conf = antcomb->first_quick_scan_conf; 1133102885a5SVasanthakumar Thiagarajan break; 1134102885a5SVasanthakumar Thiagarajan case 1: 1135102885a5SVasanthakumar Thiagarajan /* set alt to main, and alt to first conf */ 1136102885a5SVasanthakumar Thiagarajan div_ant_conf->main_lna_conf = antcomb->main_conf; 1137102885a5SVasanthakumar Thiagarajan div_ant_conf->alt_lna_conf = antcomb->second_quick_scan_conf; 1138102885a5SVasanthakumar Thiagarajan antcomb->rssi_first = main_rssi_avg; 1139102885a5SVasanthakumar Thiagarajan antcomb->rssi_second = alt_rssi_avg; 1140102885a5SVasanthakumar Thiagarajan 1141102885a5SVasanthakumar Thiagarajan if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) { 1142102885a5SVasanthakumar Thiagarajan /* main is LNA1 */ 1143102885a5SVasanthakumar Thiagarajan if (ath_is_alt_ant_ratio_better(alt_ratio, 1144102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_DELTA_HI, 1145102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_DELTA_LOW, 1146102885a5SVasanthakumar Thiagarajan main_rssi_avg, alt_rssi_avg, 1147102885a5SVasanthakumar Thiagarajan antcomb->total_pkt_count)) 1148102885a5SVasanthakumar Thiagarajan antcomb->first_ratio = true; 1149102885a5SVasanthakumar Thiagarajan else 1150102885a5SVasanthakumar Thiagarajan antcomb->first_ratio = false; 1151102885a5SVasanthakumar Thiagarajan } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) { 1152102885a5SVasanthakumar Thiagarajan if (ath_is_alt_ant_ratio_better(alt_ratio, 1153102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_DELTA_MID, 1154102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_DELTA_LOW, 1155102885a5SVasanthakumar Thiagarajan main_rssi_avg, alt_rssi_avg, 1156102885a5SVasanthakumar Thiagarajan antcomb->total_pkt_count)) 1157102885a5SVasanthakumar Thiagarajan antcomb->first_ratio = true; 1158102885a5SVasanthakumar Thiagarajan else 1159102885a5SVasanthakumar Thiagarajan antcomb->first_ratio = false; 1160102885a5SVasanthakumar Thiagarajan } else { 1161102885a5SVasanthakumar Thiagarajan if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) && 1162102885a5SVasanthakumar Thiagarajan (alt_rssi_avg > main_rssi_avg + 1163102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) || 1164102885a5SVasanthakumar Thiagarajan (alt_rssi_avg > main_rssi_avg)) && 1165102885a5SVasanthakumar Thiagarajan (antcomb->total_pkt_count > 50)) 1166102885a5SVasanthakumar Thiagarajan antcomb->first_ratio = true; 1167102885a5SVasanthakumar Thiagarajan else 1168102885a5SVasanthakumar Thiagarajan antcomb->first_ratio = false; 1169102885a5SVasanthakumar Thiagarajan } 1170102885a5SVasanthakumar Thiagarajan break; 1171102885a5SVasanthakumar Thiagarajan case 2: 1172102885a5SVasanthakumar Thiagarajan antcomb->alt_good = false; 1173102885a5SVasanthakumar Thiagarajan antcomb->scan_not_start = false; 1174102885a5SVasanthakumar Thiagarajan antcomb->scan = false; 1175102885a5SVasanthakumar Thiagarajan antcomb->rssi_first = main_rssi_avg; 1176102885a5SVasanthakumar Thiagarajan antcomb->rssi_third = alt_rssi_avg; 1177102885a5SVasanthakumar Thiagarajan 1178102885a5SVasanthakumar Thiagarajan if (antcomb->second_quick_scan_conf == ATH_ANT_DIV_COMB_LNA1) 1179102885a5SVasanthakumar Thiagarajan antcomb->rssi_lna1 = alt_rssi_avg; 1180102885a5SVasanthakumar Thiagarajan else if (antcomb->second_quick_scan_conf == 1181102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2) 1182102885a5SVasanthakumar Thiagarajan antcomb->rssi_lna2 = alt_rssi_avg; 1183102885a5SVasanthakumar Thiagarajan else if (antcomb->second_quick_scan_conf == 1184102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2) { 1185102885a5SVasanthakumar Thiagarajan if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) 1186102885a5SVasanthakumar Thiagarajan antcomb->rssi_lna2 = main_rssi_avg; 1187102885a5SVasanthakumar Thiagarajan else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) 1188102885a5SVasanthakumar Thiagarajan antcomb->rssi_lna1 = main_rssi_avg; 1189102885a5SVasanthakumar Thiagarajan } 1190102885a5SVasanthakumar Thiagarajan 1191102885a5SVasanthakumar Thiagarajan if (antcomb->rssi_lna2 > antcomb->rssi_lna1 + 1192102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA) 1193102885a5SVasanthakumar Thiagarajan div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA2; 1194102885a5SVasanthakumar Thiagarajan else 1195102885a5SVasanthakumar Thiagarajan div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA1; 1196102885a5SVasanthakumar Thiagarajan 1197102885a5SVasanthakumar Thiagarajan if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) { 1198102885a5SVasanthakumar Thiagarajan if (ath_is_alt_ant_ratio_better(alt_ratio, 1199102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_DELTA_HI, 1200102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_DELTA_LOW, 1201102885a5SVasanthakumar Thiagarajan main_rssi_avg, alt_rssi_avg, 1202102885a5SVasanthakumar Thiagarajan antcomb->total_pkt_count)) 1203102885a5SVasanthakumar Thiagarajan antcomb->second_ratio = true; 1204102885a5SVasanthakumar Thiagarajan else 1205102885a5SVasanthakumar Thiagarajan antcomb->second_ratio = false; 1206102885a5SVasanthakumar Thiagarajan } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) { 1207102885a5SVasanthakumar Thiagarajan if (ath_is_alt_ant_ratio_better(alt_ratio, 1208102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_DELTA_MID, 1209102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_DELTA_LOW, 1210102885a5SVasanthakumar Thiagarajan main_rssi_avg, alt_rssi_avg, 1211102885a5SVasanthakumar Thiagarajan antcomb->total_pkt_count)) 1212102885a5SVasanthakumar Thiagarajan antcomb->second_ratio = true; 1213102885a5SVasanthakumar Thiagarajan else 1214102885a5SVasanthakumar Thiagarajan antcomb->second_ratio = false; 1215102885a5SVasanthakumar Thiagarajan } else { 1216102885a5SVasanthakumar Thiagarajan if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) && 1217102885a5SVasanthakumar Thiagarajan (alt_rssi_avg > main_rssi_avg + 1218102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) || 1219102885a5SVasanthakumar Thiagarajan (alt_rssi_avg > main_rssi_avg)) && 1220102885a5SVasanthakumar Thiagarajan (antcomb->total_pkt_count > 50)) 1221102885a5SVasanthakumar Thiagarajan antcomb->second_ratio = true; 1222102885a5SVasanthakumar Thiagarajan else 1223102885a5SVasanthakumar Thiagarajan antcomb->second_ratio = false; 1224102885a5SVasanthakumar Thiagarajan } 1225102885a5SVasanthakumar Thiagarajan 1226102885a5SVasanthakumar Thiagarajan /* set alt to the conf with maximun ratio */ 1227102885a5SVasanthakumar Thiagarajan if (antcomb->first_ratio && antcomb->second_ratio) { 1228102885a5SVasanthakumar Thiagarajan if (antcomb->rssi_second > antcomb->rssi_third) { 1229102885a5SVasanthakumar Thiagarajan /* first alt*/ 1230102885a5SVasanthakumar Thiagarajan if ((antcomb->first_quick_scan_conf == 1231102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1) || 1232102885a5SVasanthakumar Thiagarajan (antcomb->first_quick_scan_conf == 1233102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2)) 1234102885a5SVasanthakumar Thiagarajan /* Set alt LNA1 or LNA2*/ 1235102885a5SVasanthakumar Thiagarajan if (div_ant_conf->main_lna_conf == 1236102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2) 1237102885a5SVasanthakumar Thiagarajan div_ant_conf->alt_lna_conf = 1238102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1; 1239102885a5SVasanthakumar Thiagarajan else 1240102885a5SVasanthakumar Thiagarajan div_ant_conf->alt_lna_conf = 1241102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2; 1242102885a5SVasanthakumar Thiagarajan else 1243102885a5SVasanthakumar Thiagarajan /* Set alt to A+B or A-B */ 1244102885a5SVasanthakumar Thiagarajan div_ant_conf->alt_lna_conf = 1245102885a5SVasanthakumar Thiagarajan antcomb->first_quick_scan_conf; 1246102885a5SVasanthakumar Thiagarajan } else if ((antcomb->second_quick_scan_conf == 1247102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1) || 1248102885a5SVasanthakumar Thiagarajan (antcomb->second_quick_scan_conf == 1249102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2)) { 1250102885a5SVasanthakumar Thiagarajan /* Set alt LNA1 or LNA2 */ 1251102885a5SVasanthakumar Thiagarajan if (div_ant_conf->main_lna_conf == 1252102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2) 1253102885a5SVasanthakumar Thiagarajan div_ant_conf->alt_lna_conf = 1254102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1; 1255102885a5SVasanthakumar Thiagarajan else 1256102885a5SVasanthakumar Thiagarajan div_ant_conf->alt_lna_conf = 1257102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2; 1258102885a5SVasanthakumar Thiagarajan } else { 1259102885a5SVasanthakumar Thiagarajan /* Set alt to A+B or A-B */ 1260102885a5SVasanthakumar Thiagarajan div_ant_conf->alt_lna_conf = 1261102885a5SVasanthakumar Thiagarajan antcomb->second_quick_scan_conf; 1262102885a5SVasanthakumar Thiagarajan } 1263102885a5SVasanthakumar Thiagarajan } else if (antcomb->first_ratio) { 1264102885a5SVasanthakumar Thiagarajan /* first alt */ 1265102885a5SVasanthakumar Thiagarajan if ((antcomb->first_quick_scan_conf == 1266102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1) || 1267102885a5SVasanthakumar Thiagarajan (antcomb->first_quick_scan_conf == 1268102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2)) 1269102885a5SVasanthakumar Thiagarajan /* Set alt LNA1 or LNA2 */ 1270102885a5SVasanthakumar Thiagarajan if (div_ant_conf->main_lna_conf == 1271102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2) 1272102885a5SVasanthakumar Thiagarajan div_ant_conf->alt_lna_conf = 1273102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1; 1274102885a5SVasanthakumar Thiagarajan else 1275102885a5SVasanthakumar Thiagarajan div_ant_conf->alt_lna_conf = 1276102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2; 1277102885a5SVasanthakumar Thiagarajan else 1278102885a5SVasanthakumar Thiagarajan /* Set alt to A+B or A-B */ 1279102885a5SVasanthakumar Thiagarajan div_ant_conf->alt_lna_conf = 1280102885a5SVasanthakumar Thiagarajan antcomb->first_quick_scan_conf; 1281102885a5SVasanthakumar Thiagarajan } else if (antcomb->second_ratio) { 1282102885a5SVasanthakumar Thiagarajan /* second alt */ 1283102885a5SVasanthakumar Thiagarajan if ((antcomb->second_quick_scan_conf == 1284102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1) || 1285102885a5SVasanthakumar Thiagarajan (antcomb->second_quick_scan_conf == 1286102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2)) 1287102885a5SVasanthakumar Thiagarajan /* Set alt LNA1 or LNA2 */ 1288102885a5SVasanthakumar Thiagarajan if (div_ant_conf->main_lna_conf == 1289102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2) 1290102885a5SVasanthakumar Thiagarajan div_ant_conf->alt_lna_conf = 1291102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1; 1292102885a5SVasanthakumar Thiagarajan else 1293102885a5SVasanthakumar Thiagarajan div_ant_conf->alt_lna_conf = 1294102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2; 1295102885a5SVasanthakumar Thiagarajan else 1296102885a5SVasanthakumar Thiagarajan /* Set alt to A+B or A-B */ 1297102885a5SVasanthakumar Thiagarajan div_ant_conf->alt_lna_conf = 1298102885a5SVasanthakumar Thiagarajan antcomb->second_quick_scan_conf; 1299102885a5SVasanthakumar Thiagarajan } else { 1300102885a5SVasanthakumar Thiagarajan /* main is largest */ 1301102885a5SVasanthakumar Thiagarajan if ((antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) || 1302102885a5SVasanthakumar Thiagarajan (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2)) 1303102885a5SVasanthakumar Thiagarajan /* Set alt LNA1 or LNA2 */ 1304102885a5SVasanthakumar Thiagarajan if (div_ant_conf->main_lna_conf == 1305102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2) 1306102885a5SVasanthakumar Thiagarajan div_ant_conf->alt_lna_conf = 1307102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1; 1308102885a5SVasanthakumar Thiagarajan else 1309102885a5SVasanthakumar Thiagarajan div_ant_conf->alt_lna_conf = 1310102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2; 1311102885a5SVasanthakumar Thiagarajan else 1312102885a5SVasanthakumar Thiagarajan /* Set alt to A+B or A-B */ 1313102885a5SVasanthakumar Thiagarajan div_ant_conf->alt_lna_conf = antcomb->main_conf; 1314102885a5SVasanthakumar Thiagarajan } 1315102885a5SVasanthakumar Thiagarajan break; 1316102885a5SVasanthakumar Thiagarajan default: 1317102885a5SVasanthakumar Thiagarajan break; 1318102885a5SVasanthakumar Thiagarajan } 1319102885a5SVasanthakumar Thiagarajan } 1320102885a5SVasanthakumar Thiagarajan 13213e9a212aSMohammed Shafi Shajakhan static void ath_ant_div_conf_fast_divbias(struct ath_hw_antcomb_conf *ant_conf, 13223e9a212aSMohammed Shafi Shajakhan struct ath_ant_comb *antcomb, int alt_ratio) 1323102885a5SVasanthakumar Thiagarajan { 13243e9a212aSMohammed Shafi Shajakhan if (ant_conf->div_group == 0) { 1325102885a5SVasanthakumar Thiagarajan /* Adjust the fast_div_bias based on main and alt lna conf */ 13263e9a212aSMohammed Shafi Shajakhan switch ((ant_conf->main_lna_conf << 4) | 13273e9a212aSMohammed Shafi Shajakhan ant_conf->alt_lna_conf) { 1328223c5a87SGabor Juhos case 0x01: /* A-B LNA2 */ 1329102885a5SVasanthakumar Thiagarajan ant_conf->fast_div_bias = 0x3b; 1330102885a5SVasanthakumar Thiagarajan break; 1331223c5a87SGabor Juhos case 0x02: /* A-B LNA1 */ 1332102885a5SVasanthakumar Thiagarajan ant_conf->fast_div_bias = 0x3d; 1333102885a5SVasanthakumar Thiagarajan break; 1334223c5a87SGabor Juhos case 0x03: /* A-B A+B */ 1335102885a5SVasanthakumar Thiagarajan ant_conf->fast_div_bias = 0x1; 1336102885a5SVasanthakumar Thiagarajan break; 1337223c5a87SGabor Juhos case 0x10: /* LNA2 A-B */ 1338102885a5SVasanthakumar Thiagarajan ant_conf->fast_div_bias = 0x7; 1339102885a5SVasanthakumar Thiagarajan break; 1340223c5a87SGabor Juhos case 0x12: /* LNA2 LNA1 */ 1341102885a5SVasanthakumar Thiagarajan ant_conf->fast_div_bias = 0x2; 1342102885a5SVasanthakumar Thiagarajan break; 1343223c5a87SGabor Juhos case 0x13: /* LNA2 A+B */ 1344102885a5SVasanthakumar Thiagarajan ant_conf->fast_div_bias = 0x7; 1345102885a5SVasanthakumar Thiagarajan break; 1346223c5a87SGabor Juhos case 0x20: /* LNA1 A-B */ 1347102885a5SVasanthakumar Thiagarajan ant_conf->fast_div_bias = 0x6; 1348102885a5SVasanthakumar Thiagarajan break; 1349223c5a87SGabor Juhos case 0x21: /* LNA1 LNA2 */ 1350102885a5SVasanthakumar Thiagarajan ant_conf->fast_div_bias = 0x0; 1351102885a5SVasanthakumar Thiagarajan break; 1352223c5a87SGabor Juhos case 0x23: /* LNA1 A+B */ 1353102885a5SVasanthakumar Thiagarajan ant_conf->fast_div_bias = 0x6; 1354102885a5SVasanthakumar Thiagarajan break; 1355223c5a87SGabor Juhos case 0x30: /* A+B A-B */ 1356102885a5SVasanthakumar Thiagarajan ant_conf->fast_div_bias = 0x1; 1357102885a5SVasanthakumar Thiagarajan break; 1358223c5a87SGabor Juhos case 0x31: /* A+B LNA2 */ 1359102885a5SVasanthakumar Thiagarajan ant_conf->fast_div_bias = 0x3b; 1360102885a5SVasanthakumar Thiagarajan break; 1361223c5a87SGabor Juhos case 0x32: /* A+B LNA1 */ 1362102885a5SVasanthakumar Thiagarajan ant_conf->fast_div_bias = 0x3d; 1363102885a5SVasanthakumar Thiagarajan break; 1364102885a5SVasanthakumar Thiagarajan default: 1365102885a5SVasanthakumar Thiagarajan break; 1366102885a5SVasanthakumar Thiagarajan } 1367e7ef5bc0SGabor Juhos } else if (ant_conf->div_group == 1) { 1368e7ef5bc0SGabor Juhos /* Adjust the fast_div_bias based on main and alt_lna_conf */ 1369e7ef5bc0SGabor Juhos switch ((ant_conf->main_lna_conf << 4) | 1370e7ef5bc0SGabor Juhos ant_conf->alt_lna_conf) { 1371e7ef5bc0SGabor Juhos case 0x01: /* A-B LNA2 */ 1372e7ef5bc0SGabor Juhos ant_conf->fast_div_bias = 0x1; 1373e7ef5bc0SGabor Juhos ant_conf->main_gaintb = 0; 1374e7ef5bc0SGabor Juhos ant_conf->alt_gaintb = 0; 1375e7ef5bc0SGabor Juhos break; 1376e7ef5bc0SGabor Juhos case 0x02: /* A-B LNA1 */ 1377e7ef5bc0SGabor Juhos ant_conf->fast_div_bias = 0x1; 1378e7ef5bc0SGabor Juhos ant_conf->main_gaintb = 0; 1379e7ef5bc0SGabor Juhos ant_conf->alt_gaintb = 0; 1380e7ef5bc0SGabor Juhos break; 1381e7ef5bc0SGabor Juhos case 0x03: /* A-B A+B */ 1382e7ef5bc0SGabor Juhos ant_conf->fast_div_bias = 0x1; 1383e7ef5bc0SGabor Juhos ant_conf->main_gaintb = 0; 1384e7ef5bc0SGabor Juhos ant_conf->alt_gaintb = 0; 1385e7ef5bc0SGabor Juhos break; 1386e7ef5bc0SGabor Juhos case 0x10: /* LNA2 A-B */ 1387e7ef5bc0SGabor Juhos if (!(antcomb->scan) && 1388e7ef5bc0SGabor Juhos (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO)) 1389e7ef5bc0SGabor Juhos ant_conf->fast_div_bias = 0x3f; 1390e7ef5bc0SGabor Juhos else 1391e7ef5bc0SGabor Juhos ant_conf->fast_div_bias = 0x1; 1392e7ef5bc0SGabor Juhos ant_conf->main_gaintb = 0; 1393e7ef5bc0SGabor Juhos ant_conf->alt_gaintb = 0; 1394e7ef5bc0SGabor Juhos break; 1395e7ef5bc0SGabor Juhos case 0x12: /* LNA2 LNA1 */ 1396e7ef5bc0SGabor Juhos ant_conf->fast_div_bias = 0x1; 1397e7ef5bc0SGabor Juhos ant_conf->main_gaintb = 0; 1398e7ef5bc0SGabor Juhos ant_conf->alt_gaintb = 0; 1399e7ef5bc0SGabor Juhos break; 1400e7ef5bc0SGabor Juhos case 0x13: /* LNA2 A+B */ 1401e7ef5bc0SGabor Juhos if (!(antcomb->scan) && 1402e7ef5bc0SGabor Juhos (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO)) 1403e7ef5bc0SGabor Juhos ant_conf->fast_div_bias = 0x3f; 1404e7ef5bc0SGabor Juhos else 1405e7ef5bc0SGabor Juhos ant_conf->fast_div_bias = 0x1; 1406e7ef5bc0SGabor Juhos ant_conf->main_gaintb = 0; 1407e7ef5bc0SGabor Juhos ant_conf->alt_gaintb = 0; 1408e7ef5bc0SGabor Juhos break; 1409e7ef5bc0SGabor Juhos case 0x20: /* LNA1 A-B */ 1410e7ef5bc0SGabor Juhos if (!(antcomb->scan) && 1411e7ef5bc0SGabor Juhos (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO)) 1412e7ef5bc0SGabor Juhos ant_conf->fast_div_bias = 0x3f; 1413e7ef5bc0SGabor Juhos else 1414e7ef5bc0SGabor Juhos ant_conf->fast_div_bias = 0x1; 1415e7ef5bc0SGabor Juhos ant_conf->main_gaintb = 0; 1416e7ef5bc0SGabor Juhos ant_conf->alt_gaintb = 0; 1417e7ef5bc0SGabor Juhos break; 1418e7ef5bc0SGabor Juhos case 0x21: /* LNA1 LNA2 */ 1419e7ef5bc0SGabor Juhos ant_conf->fast_div_bias = 0x1; 1420e7ef5bc0SGabor Juhos ant_conf->main_gaintb = 0; 1421e7ef5bc0SGabor Juhos ant_conf->alt_gaintb = 0; 1422e7ef5bc0SGabor Juhos break; 1423e7ef5bc0SGabor Juhos case 0x23: /* LNA1 A+B */ 1424e7ef5bc0SGabor Juhos if (!(antcomb->scan) && 1425e7ef5bc0SGabor Juhos (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO)) 1426e7ef5bc0SGabor Juhos ant_conf->fast_div_bias = 0x3f; 1427e7ef5bc0SGabor Juhos else 1428e7ef5bc0SGabor Juhos ant_conf->fast_div_bias = 0x1; 1429e7ef5bc0SGabor Juhos ant_conf->main_gaintb = 0; 1430e7ef5bc0SGabor Juhos ant_conf->alt_gaintb = 0; 1431e7ef5bc0SGabor Juhos break; 1432e7ef5bc0SGabor Juhos case 0x30: /* A+B A-B */ 1433e7ef5bc0SGabor Juhos ant_conf->fast_div_bias = 0x1; 1434e7ef5bc0SGabor Juhos ant_conf->main_gaintb = 0; 1435e7ef5bc0SGabor Juhos ant_conf->alt_gaintb = 0; 1436e7ef5bc0SGabor Juhos break; 1437e7ef5bc0SGabor Juhos case 0x31: /* A+B LNA2 */ 1438e7ef5bc0SGabor Juhos ant_conf->fast_div_bias = 0x1; 1439e7ef5bc0SGabor Juhos ant_conf->main_gaintb = 0; 1440e7ef5bc0SGabor Juhos ant_conf->alt_gaintb = 0; 1441e7ef5bc0SGabor Juhos break; 1442e7ef5bc0SGabor Juhos case 0x32: /* A+B LNA1 */ 1443e7ef5bc0SGabor Juhos ant_conf->fast_div_bias = 0x1; 1444e7ef5bc0SGabor Juhos ant_conf->main_gaintb = 0; 1445e7ef5bc0SGabor Juhos ant_conf->alt_gaintb = 0; 1446e7ef5bc0SGabor Juhos break; 1447e7ef5bc0SGabor Juhos default: 1448e7ef5bc0SGabor Juhos break; 1449e7ef5bc0SGabor Juhos } 14503e9a212aSMohammed Shafi Shajakhan } else if (ant_conf->div_group == 2) { 14513e9a212aSMohammed Shafi Shajakhan /* Adjust the fast_div_bias based on main and alt_lna_conf */ 14523e9a212aSMohammed Shafi Shajakhan switch ((ant_conf->main_lna_conf << 4) | 14533e9a212aSMohammed Shafi Shajakhan ant_conf->alt_lna_conf) { 1454223c5a87SGabor Juhos case 0x01: /* A-B LNA2 */ 14553e9a212aSMohammed Shafi Shajakhan ant_conf->fast_div_bias = 0x1; 14563e9a212aSMohammed Shafi Shajakhan ant_conf->main_gaintb = 0; 14573e9a212aSMohammed Shafi Shajakhan ant_conf->alt_gaintb = 0; 14583e9a212aSMohammed Shafi Shajakhan break; 1459223c5a87SGabor Juhos case 0x02: /* A-B LNA1 */ 14603e9a212aSMohammed Shafi Shajakhan ant_conf->fast_div_bias = 0x1; 14613e9a212aSMohammed Shafi Shajakhan ant_conf->main_gaintb = 0; 14623e9a212aSMohammed Shafi Shajakhan ant_conf->alt_gaintb = 0; 14633e9a212aSMohammed Shafi Shajakhan break; 1464223c5a87SGabor Juhos case 0x03: /* A-B A+B */ 14653e9a212aSMohammed Shafi Shajakhan ant_conf->fast_div_bias = 0x1; 14663e9a212aSMohammed Shafi Shajakhan ant_conf->main_gaintb = 0; 14673e9a212aSMohammed Shafi Shajakhan ant_conf->alt_gaintb = 0; 14683e9a212aSMohammed Shafi Shajakhan break; 1469223c5a87SGabor Juhos case 0x10: /* LNA2 A-B */ 14703e9a212aSMohammed Shafi Shajakhan if (!(antcomb->scan) && 14713e9a212aSMohammed Shafi Shajakhan (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO)) 14723e9a212aSMohammed Shafi Shajakhan ant_conf->fast_div_bias = 0x1; 14733e9a212aSMohammed Shafi Shajakhan else 14743e9a212aSMohammed Shafi Shajakhan ant_conf->fast_div_bias = 0x2; 14753e9a212aSMohammed Shafi Shajakhan ant_conf->main_gaintb = 0; 14763e9a212aSMohammed Shafi Shajakhan ant_conf->alt_gaintb = 0; 14773e9a212aSMohammed Shafi Shajakhan break; 1478223c5a87SGabor Juhos case 0x12: /* LNA2 LNA1 */ 14793e9a212aSMohammed Shafi Shajakhan ant_conf->fast_div_bias = 0x1; 14803e9a212aSMohammed Shafi Shajakhan ant_conf->main_gaintb = 0; 14813e9a212aSMohammed Shafi Shajakhan ant_conf->alt_gaintb = 0; 14823e9a212aSMohammed Shafi Shajakhan break; 1483223c5a87SGabor Juhos case 0x13: /* LNA2 A+B */ 14843e9a212aSMohammed Shafi Shajakhan if (!(antcomb->scan) && 14853e9a212aSMohammed Shafi Shajakhan (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO)) 14863e9a212aSMohammed Shafi Shajakhan ant_conf->fast_div_bias = 0x1; 14873e9a212aSMohammed Shafi Shajakhan else 14883e9a212aSMohammed Shafi Shajakhan ant_conf->fast_div_bias = 0x2; 14893e9a212aSMohammed Shafi Shajakhan ant_conf->main_gaintb = 0; 14903e9a212aSMohammed Shafi Shajakhan ant_conf->alt_gaintb = 0; 14913e9a212aSMohammed Shafi Shajakhan break; 1492223c5a87SGabor Juhos case 0x20: /* LNA1 A-B */ 14933e9a212aSMohammed Shafi Shajakhan if (!(antcomb->scan) && 14943e9a212aSMohammed Shafi Shajakhan (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO)) 14953e9a212aSMohammed Shafi Shajakhan ant_conf->fast_div_bias = 0x1; 14963e9a212aSMohammed Shafi Shajakhan else 14973e9a212aSMohammed Shafi Shajakhan ant_conf->fast_div_bias = 0x2; 14983e9a212aSMohammed Shafi Shajakhan ant_conf->main_gaintb = 0; 14993e9a212aSMohammed Shafi Shajakhan ant_conf->alt_gaintb = 0; 15003e9a212aSMohammed Shafi Shajakhan break; 1501223c5a87SGabor Juhos case 0x21: /* LNA1 LNA2 */ 15023e9a212aSMohammed Shafi Shajakhan ant_conf->fast_div_bias = 0x1; 15033e9a212aSMohammed Shafi Shajakhan ant_conf->main_gaintb = 0; 15043e9a212aSMohammed Shafi Shajakhan ant_conf->alt_gaintb = 0; 15053e9a212aSMohammed Shafi Shajakhan break; 1506223c5a87SGabor Juhos case 0x23: /* LNA1 A+B */ 15073e9a212aSMohammed Shafi Shajakhan if (!(antcomb->scan) && 15083e9a212aSMohammed Shafi Shajakhan (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO)) 15093e9a212aSMohammed Shafi Shajakhan ant_conf->fast_div_bias = 0x1; 15103e9a212aSMohammed Shafi Shajakhan else 15113e9a212aSMohammed Shafi Shajakhan ant_conf->fast_div_bias = 0x2; 15123e9a212aSMohammed Shafi Shajakhan ant_conf->main_gaintb = 0; 15133e9a212aSMohammed Shafi Shajakhan ant_conf->alt_gaintb = 0; 15143e9a212aSMohammed Shafi Shajakhan break; 1515223c5a87SGabor Juhos case 0x30: /* A+B A-B */ 15163e9a212aSMohammed Shafi Shajakhan ant_conf->fast_div_bias = 0x1; 15173e9a212aSMohammed Shafi Shajakhan ant_conf->main_gaintb = 0; 15183e9a212aSMohammed Shafi Shajakhan ant_conf->alt_gaintb = 0; 15193e9a212aSMohammed Shafi Shajakhan break; 1520223c5a87SGabor Juhos case 0x31: /* A+B LNA2 */ 15213e9a212aSMohammed Shafi Shajakhan ant_conf->fast_div_bias = 0x1; 15223e9a212aSMohammed Shafi Shajakhan ant_conf->main_gaintb = 0; 15233e9a212aSMohammed Shafi Shajakhan ant_conf->alt_gaintb = 0; 15243e9a212aSMohammed Shafi Shajakhan break; 1525223c5a87SGabor Juhos case 0x32: /* A+B LNA1 */ 15263e9a212aSMohammed Shafi Shajakhan ant_conf->fast_div_bias = 0x1; 15273e9a212aSMohammed Shafi Shajakhan ant_conf->main_gaintb = 0; 15283e9a212aSMohammed Shafi Shajakhan ant_conf->alt_gaintb = 0; 15293e9a212aSMohammed Shafi Shajakhan break; 15303e9a212aSMohammed Shafi Shajakhan default: 15313e9a212aSMohammed Shafi Shajakhan break; 15323e9a212aSMohammed Shafi Shajakhan } 15333e9a212aSMohammed Shafi Shajakhan } 1534102885a5SVasanthakumar Thiagarajan } 1535102885a5SVasanthakumar Thiagarajan 1536102885a5SVasanthakumar Thiagarajan /* Antenna diversity and combining */ 1537102885a5SVasanthakumar Thiagarajan static void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs) 1538102885a5SVasanthakumar Thiagarajan { 1539102885a5SVasanthakumar Thiagarajan struct ath_hw_antcomb_conf div_ant_conf; 1540102885a5SVasanthakumar Thiagarajan struct ath_ant_comb *antcomb = &sc->ant_comb; 1541102885a5SVasanthakumar Thiagarajan int alt_ratio = 0, alt_rssi_avg = 0, main_rssi_avg = 0, curr_alt_set; 15420ff2b5c0SSujith Manoharan int curr_main_set; 1543102885a5SVasanthakumar Thiagarajan int main_rssi = rs->rs_rssi_ctl0; 1544102885a5SVasanthakumar Thiagarajan int alt_rssi = rs->rs_rssi_ctl1; 1545102885a5SVasanthakumar Thiagarajan int rx_ant_conf, main_ant_conf; 1546102885a5SVasanthakumar Thiagarajan bool short_scan = false; 1547102885a5SVasanthakumar Thiagarajan 1548102885a5SVasanthakumar Thiagarajan rx_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_CURRENT_SHIFT) & 1549102885a5SVasanthakumar Thiagarajan ATH_ANT_RX_MASK; 1550102885a5SVasanthakumar Thiagarajan main_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_MAIN_SHIFT) & 1551102885a5SVasanthakumar Thiagarajan ATH_ANT_RX_MASK; 1552102885a5SVasanthakumar Thiagarajan 155321e8ee6dSMohammed Shafi Shajakhan /* Record packet only when both main_rssi and alt_rssi is positive */ 155421e8ee6dSMohammed Shafi Shajakhan if (main_rssi > 0 && alt_rssi > 0) { 1555102885a5SVasanthakumar Thiagarajan antcomb->total_pkt_count++; 1556102885a5SVasanthakumar Thiagarajan antcomb->main_total_rssi += main_rssi; 1557102885a5SVasanthakumar Thiagarajan antcomb->alt_total_rssi += alt_rssi; 1558102885a5SVasanthakumar Thiagarajan if (main_ant_conf == rx_ant_conf) 1559102885a5SVasanthakumar Thiagarajan antcomb->main_recv_cnt++; 1560102885a5SVasanthakumar Thiagarajan else 1561102885a5SVasanthakumar Thiagarajan antcomb->alt_recv_cnt++; 1562102885a5SVasanthakumar Thiagarajan } 1563102885a5SVasanthakumar Thiagarajan 1564102885a5SVasanthakumar Thiagarajan /* Short scan check */ 1565102885a5SVasanthakumar Thiagarajan if (antcomb->scan && antcomb->alt_good) { 1566102885a5SVasanthakumar Thiagarajan if (time_after(jiffies, antcomb->scan_start_time + 1567102885a5SVasanthakumar Thiagarajan msecs_to_jiffies(ATH_ANT_DIV_COMB_SHORT_SCAN_INTR))) 1568102885a5SVasanthakumar Thiagarajan short_scan = true; 1569102885a5SVasanthakumar Thiagarajan else 1570102885a5SVasanthakumar Thiagarajan if (antcomb->total_pkt_count == 1571102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT) { 1572102885a5SVasanthakumar Thiagarajan alt_ratio = ((antcomb->alt_recv_cnt * 100) / 1573102885a5SVasanthakumar Thiagarajan antcomb->total_pkt_count); 1574102885a5SVasanthakumar Thiagarajan if (alt_ratio < ATH_ANT_DIV_COMB_ALT_ANT_RATIO) 1575102885a5SVasanthakumar Thiagarajan short_scan = true; 1576102885a5SVasanthakumar Thiagarajan } 1577102885a5SVasanthakumar Thiagarajan } 1578102885a5SVasanthakumar Thiagarajan 1579102885a5SVasanthakumar Thiagarajan if (((antcomb->total_pkt_count < ATH_ANT_DIV_COMB_MAX_PKTCOUNT) || 1580102885a5SVasanthakumar Thiagarajan rs->rs_moreaggr) && !short_scan) 1581102885a5SVasanthakumar Thiagarajan return; 1582102885a5SVasanthakumar Thiagarajan 1583102885a5SVasanthakumar Thiagarajan if (antcomb->total_pkt_count) { 1584102885a5SVasanthakumar Thiagarajan alt_ratio = ((antcomb->alt_recv_cnt * 100) / 1585102885a5SVasanthakumar Thiagarajan antcomb->total_pkt_count); 1586102885a5SVasanthakumar Thiagarajan main_rssi_avg = (antcomb->main_total_rssi / 1587102885a5SVasanthakumar Thiagarajan antcomb->total_pkt_count); 1588102885a5SVasanthakumar Thiagarajan alt_rssi_avg = (antcomb->alt_total_rssi / 1589102885a5SVasanthakumar Thiagarajan antcomb->total_pkt_count); 1590102885a5SVasanthakumar Thiagarajan } 1591102885a5SVasanthakumar Thiagarajan 1592102885a5SVasanthakumar Thiagarajan 1593102885a5SVasanthakumar Thiagarajan ath9k_hw_antdiv_comb_conf_get(sc->sc_ah, &div_ant_conf); 1594102885a5SVasanthakumar Thiagarajan curr_alt_set = div_ant_conf.alt_lna_conf; 1595102885a5SVasanthakumar Thiagarajan curr_main_set = div_ant_conf.main_lna_conf; 1596102885a5SVasanthakumar Thiagarajan 1597102885a5SVasanthakumar Thiagarajan antcomb->count++; 1598102885a5SVasanthakumar Thiagarajan 1599102885a5SVasanthakumar Thiagarajan if (antcomb->count == ATH_ANT_DIV_COMB_MAX_COUNT) { 1600102885a5SVasanthakumar Thiagarajan if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO) { 1601102885a5SVasanthakumar Thiagarajan ath_lnaconf_alt_good_scan(antcomb, div_ant_conf, 1602102885a5SVasanthakumar Thiagarajan main_rssi_avg); 1603102885a5SVasanthakumar Thiagarajan antcomb->alt_good = true; 1604102885a5SVasanthakumar Thiagarajan } else { 1605102885a5SVasanthakumar Thiagarajan antcomb->alt_good = false; 1606102885a5SVasanthakumar Thiagarajan } 1607102885a5SVasanthakumar Thiagarajan 1608102885a5SVasanthakumar Thiagarajan antcomb->count = 0; 1609102885a5SVasanthakumar Thiagarajan antcomb->scan = true; 1610102885a5SVasanthakumar Thiagarajan antcomb->scan_not_start = true; 1611102885a5SVasanthakumar Thiagarajan } 1612102885a5SVasanthakumar Thiagarajan 1613102885a5SVasanthakumar Thiagarajan if (!antcomb->scan) { 1614b85c5734SMohammed Shafi Shajakhan if (ath_ant_div_comb_alt_check(div_ant_conf.div_group, 1615b85c5734SMohammed Shafi Shajakhan alt_ratio, curr_main_set, curr_alt_set, 1616b85c5734SMohammed Shafi Shajakhan alt_rssi_avg, main_rssi_avg)) { 1617102885a5SVasanthakumar Thiagarajan if (curr_alt_set == ATH_ANT_DIV_COMB_LNA2) { 1618102885a5SVasanthakumar Thiagarajan /* Switch main and alt LNA */ 1619102885a5SVasanthakumar Thiagarajan div_ant_conf.main_lna_conf = 1620102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2; 1621102885a5SVasanthakumar Thiagarajan div_ant_conf.alt_lna_conf = 1622102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1; 1623102885a5SVasanthakumar Thiagarajan } else if (curr_alt_set == ATH_ANT_DIV_COMB_LNA1) { 1624102885a5SVasanthakumar Thiagarajan div_ant_conf.main_lna_conf = 1625102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1; 1626102885a5SVasanthakumar Thiagarajan div_ant_conf.alt_lna_conf = 1627102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2; 1628102885a5SVasanthakumar Thiagarajan } 1629102885a5SVasanthakumar Thiagarajan 1630102885a5SVasanthakumar Thiagarajan goto div_comb_done; 1631102885a5SVasanthakumar Thiagarajan } else if ((curr_alt_set != ATH_ANT_DIV_COMB_LNA1) && 1632102885a5SVasanthakumar Thiagarajan (curr_alt_set != ATH_ANT_DIV_COMB_LNA2)) { 1633102885a5SVasanthakumar Thiagarajan /* Set alt to another LNA */ 1634102885a5SVasanthakumar Thiagarajan if (curr_main_set == ATH_ANT_DIV_COMB_LNA2) 1635102885a5SVasanthakumar Thiagarajan div_ant_conf.alt_lna_conf = 1636102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1; 1637102885a5SVasanthakumar Thiagarajan else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1) 1638102885a5SVasanthakumar Thiagarajan div_ant_conf.alt_lna_conf = 1639102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2; 1640102885a5SVasanthakumar Thiagarajan 1641102885a5SVasanthakumar Thiagarajan goto div_comb_done; 1642102885a5SVasanthakumar Thiagarajan } 1643102885a5SVasanthakumar Thiagarajan 1644102885a5SVasanthakumar Thiagarajan if ((alt_rssi_avg < (main_rssi_avg + 16458afbcc8bSMohammed Shafi Shajakhan div_ant_conf.lna1_lna2_delta))) 1646102885a5SVasanthakumar Thiagarajan goto div_comb_done; 1647102885a5SVasanthakumar Thiagarajan } 1648102885a5SVasanthakumar Thiagarajan 1649102885a5SVasanthakumar Thiagarajan if (!antcomb->scan_not_start) { 1650102885a5SVasanthakumar Thiagarajan switch (curr_alt_set) { 1651102885a5SVasanthakumar Thiagarajan case ATH_ANT_DIV_COMB_LNA2: 1652102885a5SVasanthakumar Thiagarajan antcomb->rssi_lna2 = alt_rssi_avg; 1653102885a5SVasanthakumar Thiagarajan antcomb->rssi_lna1 = main_rssi_avg; 1654102885a5SVasanthakumar Thiagarajan antcomb->scan = true; 1655102885a5SVasanthakumar Thiagarajan /* set to A+B */ 1656102885a5SVasanthakumar Thiagarajan div_ant_conf.main_lna_conf = 1657102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1; 1658102885a5SVasanthakumar Thiagarajan div_ant_conf.alt_lna_conf = 1659102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2; 1660102885a5SVasanthakumar Thiagarajan break; 1661102885a5SVasanthakumar Thiagarajan case ATH_ANT_DIV_COMB_LNA1: 1662102885a5SVasanthakumar Thiagarajan antcomb->rssi_lna1 = alt_rssi_avg; 1663102885a5SVasanthakumar Thiagarajan antcomb->rssi_lna2 = main_rssi_avg; 1664102885a5SVasanthakumar Thiagarajan antcomb->scan = true; 1665102885a5SVasanthakumar Thiagarajan /* set to A+B */ 1666102885a5SVasanthakumar Thiagarajan div_ant_conf.main_lna_conf = ATH_ANT_DIV_COMB_LNA2; 1667102885a5SVasanthakumar Thiagarajan div_ant_conf.alt_lna_conf = 1668102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2; 1669102885a5SVasanthakumar Thiagarajan break; 1670102885a5SVasanthakumar Thiagarajan case ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2: 1671102885a5SVasanthakumar Thiagarajan antcomb->rssi_add = alt_rssi_avg; 1672102885a5SVasanthakumar Thiagarajan antcomb->scan = true; 1673102885a5SVasanthakumar Thiagarajan /* set to A-B */ 1674102885a5SVasanthakumar Thiagarajan div_ant_conf.alt_lna_conf = 1675102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2; 1676102885a5SVasanthakumar Thiagarajan break; 1677102885a5SVasanthakumar Thiagarajan case ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2: 1678102885a5SVasanthakumar Thiagarajan antcomb->rssi_sub = alt_rssi_avg; 1679102885a5SVasanthakumar Thiagarajan antcomb->scan = false; 1680102885a5SVasanthakumar Thiagarajan if (antcomb->rssi_lna2 > 1681102885a5SVasanthakumar Thiagarajan (antcomb->rssi_lna1 + 1682102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)) { 1683102885a5SVasanthakumar Thiagarajan /* use LNA2 as main LNA */ 1684102885a5SVasanthakumar Thiagarajan if ((antcomb->rssi_add > antcomb->rssi_lna1) && 1685102885a5SVasanthakumar Thiagarajan (antcomb->rssi_add > antcomb->rssi_sub)) { 1686102885a5SVasanthakumar Thiagarajan /* set to A+B */ 1687102885a5SVasanthakumar Thiagarajan div_ant_conf.main_lna_conf = 1688102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2; 1689102885a5SVasanthakumar Thiagarajan div_ant_conf.alt_lna_conf = 1690102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2; 1691102885a5SVasanthakumar Thiagarajan } else if (antcomb->rssi_sub > 1692102885a5SVasanthakumar Thiagarajan antcomb->rssi_lna1) { 1693102885a5SVasanthakumar Thiagarajan /* set to A-B */ 1694102885a5SVasanthakumar Thiagarajan div_ant_conf.main_lna_conf = 1695102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2; 1696102885a5SVasanthakumar Thiagarajan div_ant_conf.alt_lna_conf = 1697102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2; 1698102885a5SVasanthakumar Thiagarajan } else { 1699102885a5SVasanthakumar Thiagarajan /* set to LNA1 */ 1700102885a5SVasanthakumar Thiagarajan div_ant_conf.main_lna_conf = 1701102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2; 1702102885a5SVasanthakumar Thiagarajan div_ant_conf.alt_lna_conf = 1703102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1; 1704102885a5SVasanthakumar Thiagarajan } 1705102885a5SVasanthakumar Thiagarajan } else { 1706102885a5SVasanthakumar Thiagarajan /* use LNA1 as main LNA */ 1707102885a5SVasanthakumar Thiagarajan if ((antcomb->rssi_add > antcomb->rssi_lna2) && 1708102885a5SVasanthakumar Thiagarajan (antcomb->rssi_add > antcomb->rssi_sub)) { 1709102885a5SVasanthakumar Thiagarajan /* set to A+B */ 1710102885a5SVasanthakumar Thiagarajan div_ant_conf.main_lna_conf = 1711102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1; 1712102885a5SVasanthakumar Thiagarajan div_ant_conf.alt_lna_conf = 1713102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2; 1714102885a5SVasanthakumar Thiagarajan } else if (antcomb->rssi_sub > 1715102885a5SVasanthakumar Thiagarajan antcomb->rssi_lna1) { 1716102885a5SVasanthakumar Thiagarajan /* set to A-B */ 1717102885a5SVasanthakumar Thiagarajan div_ant_conf.main_lna_conf = 1718102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1; 1719102885a5SVasanthakumar Thiagarajan div_ant_conf.alt_lna_conf = 1720102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2; 1721102885a5SVasanthakumar Thiagarajan } else { 1722102885a5SVasanthakumar Thiagarajan /* set to LNA2 */ 1723102885a5SVasanthakumar Thiagarajan div_ant_conf.main_lna_conf = 1724102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1; 1725102885a5SVasanthakumar Thiagarajan div_ant_conf.alt_lna_conf = 1726102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2; 1727102885a5SVasanthakumar Thiagarajan } 1728102885a5SVasanthakumar Thiagarajan } 1729102885a5SVasanthakumar Thiagarajan break; 1730102885a5SVasanthakumar Thiagarajan default: 1731102885a5SVasanthakumar Thiagarajan break; 1732102885a5SVasanthakumar Thiagarajan } 1733102885a5SVasanthakumar Thiagarajan } else { 1734102885a5SVasanthakumar Thiagarajan if (!antcomb->alt_good) { 1735102885a5SVasanthakumar Thiagarajan antcomb->scan_not_start = false; 1736102885a5SVasanthakumar Thiagarajan /* Set alt to another LNA */ 1737102885a5SVasanthakumar Thiagarajan if (curr_main_set == ATH_ANT_DIV_COMB_LNA2) { 1738102885a5SVasanthakumar Thiagarajan div_ant_conf.main_lna_conf = 1739102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2; 1740102885a5SVasanthakumar Thiagarajan div_ant_conf.alt_lna_conf = 1741102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1; 1742102885a5SVasanthakumar Thiagarajan } else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1) { 1743102885a5SVasanthakumar Thiagarajan div_ant_conf.main_lna_conf = 1744102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA1; 1745102885a5SVasanthakumar Thiagarajan div_ant_conf.alt_lna_conf = 1746102885a5SVasanthakumar Thiagarajan ATH_ANT_DIV_COMB_LNA2; 1747102885a5SVasanthakumar Thiagarajan } 1748102885a5SVasanthakumar Thiagarajan goto div_comb_done; 1749102885a5SVasanthakumar Thiagarajan } 1750102885a5SVasanthakumar Thiagarajan } 1751102885a5SVasanthakumar Thiagarajan 1752102885a5SVasanthakumar Thiagarajan ath_select_ant_div_from_quick_scan(antcomb, &div_ant_conf, 1753102885a5SVasanthakumar Thiagarajan main_rssi_avg, alt_rssi_avg, 1754102885a5SVasanthakumar Thiagarajan alt_ratio); 1755102885a5SVasanthakumar Thiagarajan 1756102885a5SVasanthakumar Thiagarajan antcomb->quick_scan_cnt++; 1757102885a5SVasanthakumar Thiagarajan 1758102885a5SVasanthakumar Thiagarajan div_comb_done: 17593e9a212aSMohammed Shafi Shajakhan ath_ant_div_conf_fast_divbias(&div_ant_conf, antcomb, alt_ratio); 1760102885a5SVasanthakumar Thiagarajan ath9k_hw_antdiv_comb_conf_set(sc->sc_ah, &div_ant_conf); 1761102885a5SVasanthakumar Thiagarajan 1762102885a5SVasanthakumar Thiagarajan antcomb->scan_start_time = jiffies; 1763102885a5SVasanthakumar Thiagarajan antcomb->total_pkt_count = 0; 1764102885a5SVasanthakumar Thiagarajan antcomb->main_total_rssi = 0; 1765102885a5SVasanthakumar Thiagarajan antcomb->alt_total_rssi = 0; 1766102885a5SVasanthakumar Thiagarajan antcomb->main_recv_cnt = 0; 1767102885a5SVasanthakumar Thiagarajan antcomb->alt_recv_cnt = 0; 1768102885a5SVasanthakumar Thiagarajan } 1769102885a5SVasanthakumar Thiagarajan 1770b5c80475SFelix Fietkau int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp) 1771b5c80475SFelix Fietkau { 1772b5c80475SFelix Fietkau struct ath_buf *bf; 17730d95521eSFelix Fietkau struct sk_buff *skb = NULL, *requeue_skb, *hdr_skb; 1774b5c80475SFelix Fietkau struct ieee80211_rx_status *rxs; 1775b5c80475SFelix Fietkau struct ath_hw *ah = sc->sc_ah; 1776b5c80475SFelix Fietkau struct ath_common *common = ath9k_hw_common(ah); 17777545daf4SFelix Fietkau struct ieee80211_hw *hw = sc->hw; 1778b5c80475SFelix Fietkau struct ieee80211_hdr *hdr; 1779b5c80475SFelix Fietkau int retval; 1780b5c80475SFelix Fietkau bool decrypt_error = false; 1781b5c80475SFelix Fietkau struct ath_rx_status rs; 1782b5c80475SFelix Fietkau enum ath9k_rx_qtype qtype; 1783b5c80475SFelix Fietkau bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA); 1784b5c80475SFelix Fietkau int dma_type; 17855c6dd921SVasanthakumar Thiagarajan u8 rx_status_len = ah->caps.rx_status_len; 1786a6d2055bSFelix Fietkau u64 tsf = 0; 1787a6d2055bSFelix Fietkau u32 tsf_lower = 0; 17888ab2cd09SLuis R. Rodriguez unsigned long flags; 1789b5c80475SFelix Fietkau 1790b5c80475SFelix Fietkau if (edma) 1791b5c80475SFelix Fietkau dma_type = DMA_BIDIRECTIONAL; 179256824223SMing Lei else 179356824223SMing Lei dma_type = DMA_FROM_DEVICE; 1794b5c80475SFelix Fietkau 1795b5c80475SFelix Fietkau qtype = hp ? ATH9K_RX_QUEUE_HP : ATH9K_RX_QUEUE_LP; 1796b5c80475SFelix Fietkau spin_lock_bh(&sc->rx.rxbuflock); 1797b5c80475SFelix Fietkau 1798a6d2055bSFelix Fietkau tsf = ath9k_hw_gettsf64(ah); 1799a6d2055bSFelix Fietkau tsf_lower = tsf & 0xffffffff; 1800a6d2055bSFelix Fietkau 1801b5c80475SFelix Fietkau do { 1802b5c80475SFelix Fietkau /* If handling rx interrupt and flush is in progress => exit */ 1803b5c80475SFelix Fietkau if ((sc->sc_flags & SC_OP_RXFLUSH) && (flush == 0)) 1804b5c80475SFelix Fietkau break; 1805b5c80475SFelix Fietkau 1806b5c80475SFelix Fietkau memset(&rs, 0, sizeof(rs)); 1807b5c80475SFelix Fietkau if (edma) 1808b5c80475SFelix Fietkau bf = ath_edma_get_next_rx_buf(sc, &rs, qtype); 1809b5c80475SFelix Fietkau else 1810b5c80475SFelix Fietkau bf = ath_get_next_rx_buf(sc, &rs); 1811b5c80475SFelix Fietkau 1812b5c80475SFelix Fietkau if (!bf) 1813b5c80475SFelix Fietkau break; 1814b5c80475SFelix Fietkau 1815b5c80475SFelix Fietkau skb = bf->bf_mpdu; 1816b5c80475SFelix Fietkau if (!skb) 1817b5c80475SFelix Fietkau continue; 1818b5c80475SFelix Fietkau 18190d95521eSFelix Fietkau /* 18200d95521eSFelix Fietkau * Take frame header from the first fragment and RX status from 18210d95521eSFelix Fietkau * the last one. 18220d95521eSFelix Fietkau */ 18230d95521eSFelix Fietkau if (sc->rx.frag) 18240d95521eSFelix Fietkau hdr_skb = sc->rx.frag; 18250d95521eSFelix Fietkau else 18260d95521eSFelix Fietkau hdr_skb = skb; 18270d95521eSFelix Fietkau 18280d95521eSFelix Fietkau hdr = (struct ieee80211_hdr *) (hdr_skb->data + rx_status_len); 18290d95521eSFelix Fietkau rxs = IEEE80211_SKB_RXCB(hdr_skb); 1830cf3af748SRajkumar Manoharan if (ieee80211_is_beacon(hdr->frame_control) && 1831cf3af748SRajkumar Manoharan !compare_ether_addr(hdr->addr3, common->curbssid)) 1832cf3af748SRajkumar Manoharan rs.is_mybeacon = true; 1833cf3af748SRajkumar Manoharan else 1834cf3af748SRajkumar Manoharan rs.is_mybeacon = false; 18355ca42627SLuis R. Rodriguez 183629bffa96SFelix Fietkau ath_debug_stat_rx(sc, &rs); 18371395d3f0SSujith 1838203c4805SLuis R. Rodriguez /* 1839203c4805SLuis R. Rodriguez * If we're asked to flush receive queue, directly 1840203c4805SLuis R. Rodriguez * chain it back at the queue without processing it. 1841203c4805SLuis R. Rodriguez */ 1842203c4805SLuis R. Rodriguez if (flush) 18430d95521eSFelix Fietkau goto requeue_drop_frag; 1844203c4805SLuis R. Rodriguez 1845c8f3b721SJan Friedrich retval = ath9k_rx_skb_preprocess(common, hw, hdr, &rs, 1846c8f3b721SJan Friedrich rxs, &decrypt_error); 1847c8f3b721SJan Friedrich if (retval) 18480d95521eSFelix Fietkau goto requeue_drop_frag; 1849c8f3b721SJan Friedrich 1850a6d2055bSFelix Fietkau rxs->mactime = (tsf & ~0xffffffffULL) | rs.rs_tstamp; 1851a6d2055bSFelix Fietkau if (rs.rs_tstamp > tsf_lower && 1852a6d2055bSFelix Fietkau unlikely(rs.rs_tstamp - tsf_lower > 0x10000000)) 1853a6d2055bSFelix Fietkau rxs->mactime -= 0x100000000ULL; 1854a6d2055bSFelix Fietkau 1855a6d2055bSFelix Fietkau if (rs.rs_tstamp < tsf_lower && 1856a6d2055bSFelix Fietkau unlikely(tsf_lower - rs.rs_tstamp > 0x10000000)) 1857a6d2055bSFelix Fietkau rxs->mactime += 0x100000000ULL; 1858a6d2055bSFelix Fietkau 1859203c4805SLuis R. Rodriguez /* Ensure we always have an skb to requeue once we are done 1860203c4805SLuis R. Rodriguez * processing the current buffer's skb */ 1861cc861f74SLuis R. Rodriguez requeue_skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_ATOMIC); 1862203c4805SLuis R. Rodriguez 1863203c4805SLuis R. Rodriguez /* If there is no memory we ignore the current RX'd frame, 1864203c4805SLuis R. Rodriguez * tell hardware it can give us a new frame using the old 1865203c4805SLuis R. Rodriguez * skb and put it at the tail of the sc->rx.rxbuf list for 1866203c4805SLuis R. Rodriguez * processing. */ 1867203c4805SLuis R. Rodriguez if (!requeue_skb) 18680d95521eSFelix Fietkau goto requeue_drop_frag; 1869203c4805SLuis R. Rodriguez 1870203c4805SLuis R. Rodriguez /* Unmap the frame */ 1871203c4805SLuis R. Rodriguez dma_unmap_single(sc->dev, bf->bf_buf_addr, 1872cc861f74SLuis R. Rodriguez common->rx_bufsize, 1873b5c80475SFelix Fietkau dma_type); 1874203c4805SLuis R. Rodriguez 1875b5c80475SFelix Fietkau skb_put(skb, rs.rs_datalen + ah->caps.rx_status_len); 1876b5c80475SFelix Fietkau if (ah->caps.rx_status_len) 1877b5c80475SFelix Fietkau skb_pull(skb, ah->caps.rx_status_len); 1878203c4805SLuis R. Rodriguez 18790d95521eSFelix Fietkau if (!rs.rs_more) 18800d95521eSFelix Fietkau ath9k_rx_skb_postprocess(common, hdr_skb, &rs, 1881c9b14170SLuis R. Rodriguez rxs, decrypt_error); 1882203c4805SLuis R. Rodriguez 1883203c4805SLuis R. Rodriguez /* We will now give hardware our shiny new allocated skb */ 1884203c4805SLuis R. Rodriguez bf->bf_mpdu = requeue_skb; 1885203c4805SLuis R. Rodriguez bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data, 1886cc861f74SLuis R. Rodriguez common->rx_bufsize, 1887b5c80475SFelix Fietkau dma_type); 1888203c4805SLuis R. Rodriguez if (unlikely(dma_mapping_error(sc->dev, 1889203c4805SLuis R. Rodriguez bf->bf_buf_addr))) { 1890203c4805SLuis R. Rodriguez dev_kfree_skb_any(requeue_skb); 1891203c4805SLuis R. Rodriguez bf->bf_mpdu = NULL; 18926cf9e995SBen Greear bf->bf_buf_addr = 0; 18933800276aSJoe Perches ath_err(common, "dma_mapping_error() on RX\n"); 18947545daf4SFelix Fietkau ieee80211_rx(hw, skb); 1895203c4805SLuis R. Rodriguez break; 1896203c4805SLuis R. Rodriguez } 1897203c4805SLuis R. Rodriguez 18980d95521eSFelix Fietkau if (rs.rs_more) { 18990d95521eSFelix Fietkau /* 19000d95521eSFelix Fietkau * rs_more indicates chained descriptors which can be 19010d95521eSFelix Fietkau * used to link buffers together for a sort of 19020d95521eSFelix Fietkau * scatter-gather operation. 19030d95521eSFelix Fietkau */ 19040d95521eSFelix Fietkau if (sc->rx.frag) { 19050d95521eSFelix Fietkau /* too many fragments - cannot handle frame */ 19060d95521eSFelix Fietkau dev_kfree_skb_any(sc->rx.frag); 19070d95521eSFelix Fietkau dev_kfree_skb_any(skb); 19080d95521eSFelix Fietkau skb = NULL; 19090d95521eSFelix Fietkau } 19100d95521eSFelix Fietkau sc->rx.frag = skb; 19110d95521eSFelix Fietkau goto requeue; 19120d95521eSFelix Fietkau } 19130d95521eSFelix Fietkau 19140d95521eSFelix Fietkau if (sc->rx.frag) { 19150d95521eSFelix Fietkau int space = skb->len - skb_tailroom(hdr_skb); 19160d95521eSFelix Fietkau 19170d95521eSFelix Fietkau sc->rx.frag = NULL; 19180d95521eSFelix Fietkau 19190d95521eSFelix Fietkau if (pskb_expand_head(hdr_skb, 0, space, GFP_ATOMIC) < 0) { 19200d95521eSFelix Fietkau dev_kfree_skb(skb); 19210d95521eSFelix Fietkau goto requeue_drop_frag; 19220d95521eSFelix Fietkau } 19230d95521eSFelix Fietkau 19240d95521eSFelix Fietkau skb_copy_from_linear_data(skb, skb_put(hdr_skb, skb->len), 19250d95521eSFelix Fietkau skb->len); 19260d95521eSFelix Fietkau dev_kfree_skb_any(skb); 19270d95521eSFelix Fietkau skb = hdr_skb; 19280d95521eSFelix Fietkau } 19290d95521eSFelix Fietkau 1930203c4805SLuis R. Rodriguez /* 1931203c4805SLuis R. Rodriguez * change the default rx antenna if rx diversity chooses the 1932203c4805SLuis R. Rodriguez * other antenna 3 times in a row. 1933203c4805SLuis R. Rodriguez */ 193429bffa96SFelix Fietkau if (sc->rx.defant != rs.rs_antenna) { 1935203c4805SLuis R. Rodriguez if (++sc->rx.rxotherant >= 3) 193629bffa96SFelix Fietkau ath_setdefantenna(sc, rs.rs_antenna); 1937203c4805SLuis R. Rodriguez } else { 1938203c4805SLuis R. Rodriguez sc->rx.rxotherant = 0; 1939203c4805SLuis R. Rodriguez } 1940203c4805SLuis R. Rodriguez 194166760eacSFelix Fietkau if (rxs->flag & RX_FLAG_MMIC_STRIPPED) 194266760eacSFelix Fietkau skb_trim(skb, skb->len - 8); 194366760eacSFelix Fietkau 19448ab2cd09SLuis R. Rodriguez spin_lock_irqsave(&sc->sc_pm_lock, flags); 1945aaef24b4SMohammed Shafi Shajakhan 1946aaef24b4SMohammed Shafi Shajakhan if ((sc->ps_flags & (PS_WAIT_FOR_BEACON | 19471b04b930SSujith PS_WAIT_FOR_CAB | 1948aaef24b4SMohammed Shafi Shajakhan PS_WAIT_FOR_PSPOLL_DATA)) || 1949cedc7e3dSMohammed Shafi Shajakhan ath9k_check_auto_sleep(sc)) 1950cc65965cSJouni Malinen ath_rx_ps(sc, skb); 19518ab2cd09SLuis R. Rodriguez spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 1952cc65965cSJouni Malinen 1953*43c35284SFelix Fietkau if ((ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) && sc->ant_rx == 3) 1954102885a5SVasanthakumar Thiagarajan ath_ant_comb_scan(sc, &rs); 1955102885a5SVasanthakumar Thiagarajan 19567545daf4SFelix Fietkau ieee80211_rx(hw, skb); 1957cc65965cSJouni Malinen 19580d95521eSFelix Fietkau requeue_drop_frag: 19590d95521eSFelix Fietkau if (sc->rx.frag) { 19600d95521eSFelix Fietkau dev_kfree_skb_any(sc->rx.frag); 19610d95521eSFelix Fietkau sc->rx.frag = NULL; 19620d95521eSFelix Fietkau } 1963203c4805SLuis R. Rodriguez requeue: 1964b5c80475SFelix Fietkau if (edma) { 1965b5c80475SFelix Fietkau list_add_tail(&bf->list, &sc->rx.rxbuf); 1966b5c80475SFelix Fietkau ath_rx_edma_buf_link(sc, qtype); 1967b5c80475SFelix Fietkau } else { 1968203c4805SLuis R. Rodriguez list_move_tail(&bf->list, &sc->rx.rxbuf); 1969203c4805SLuis R. Rodriguez ath_rx_buf_link(sc, bf); 197095294973SFelix Fietkau ath9k_hw_rxena(ah); 1971b5c80475SFelix Fietkau } 1972203c4805SLuis R. Rodriguez } while (1); 1973203c4805SLuis R. Rodriguez 1974203c4805SLuis R. Rodriguez spin_unlock_bh(&sc->rx.rxbuflock); 1975203c4805SLuis R. Rodriguez 197629ab0b36SRajkumar Manoharan if (!(ah->imask & ATH9K_INT_RXEOL)) { 197729ab0b36SRajkumar Manoharan ah->imask |= (ATH9K_INT_RXEOL | ATH9K_INT_RXORN); 197829ab0b36SRajkumar Manoharan ath9k_hw_set_interrupts(ah, ah->imask); 197929ab0b36SRajkumar Manoharan } 198029ab0b36SRajkumar Manoharan 1981203c4805SLuis R. Rodriguez return 0; 1982203c4805SLuis R. Rodriguez } 1983