xref: /openbmc/linux/drivers/net/wireless/ath/ath9k/recv.c (revision 1e875e9f16e3138d0e23cbf806a6d9520b622db2)
1203c4805SLuis R. Rodriguez /*
2203c4805SLuis R. Rodriguez  * Copyright (c) 2008-2009 Atheros Communications Inc.
3203c4805SLuis R. Rodriguez  *
4203c4805SLuis R. Rodriguez  * Permission to use, copy, modify, and/or distribute this software for any
5203c4805SLuis R. Rodriguez  * purpose with or without fee is hereby granted, provided that the above
6203c4805SLuis R. Rodriguez  * copyright notice and this permission notice appear in all copies.
7203c4805SLuis R. Rodriguez  *
8203c4805SLuis R. Rodriguez  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9203c4805SLuis R. Rodriguez  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10203c4805SLuis R. Rodriguez  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11203c4805SLuis R. Rodriguez  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12203c4805SLuis R. Rodriguez  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13203c4805SLuis R. Rodriguez  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14203c4805SLuis R. Rodriguez  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15203c4805SLuis R. Rodriguez  */
16203c4805SLuis R. Rodriguez 
17203c4805SLuis R. Rodriguez #include "ath9k.h"
18203c4805SLuis R. Rodriguez 
19203c4805SLuis R. Rodriguez static struct ieee80211_hw * ath_get_virt_hw(struct ath_softc *sc,
20203c4805SLuis R. Rodriguez 					     struct ieee80211_hdr *hdr)
21203c4805SLuis R. Rodriguez {
22203c4805SLuis R. Rodriguez 	struct ieee80211_hw *hw = sc->pri_wiphy->hw;
23203c4805SLuis R. Rodriguez 	int i;
24203c4805SLuis R. Rodriguez 
25203c4805SLuis R. Rodriguez 	spin_lock_bh(&sc->wiphy_lock);
26203c4805SLuis R. Rodriguez 	for (i = 0; i < sc->num_sec_wiphy; i++) {
27203c4805SLuis R. Rodriguez 		struct ath_wiphy *aphy = sc->sec_wiphy[i];
28203c4805SLuis R. Rodriguez 		if (aphy == NULL)
29203c4805SLuis R. Rodriguez 			continue;
30203c4805SLuis R. Rodriguez 		if (compare_ether_addr(hdr->addr1, aphy->hw->wiphy->perm_addr)
31203c4805SLuis R. Rodriguez 		    == 0) {
32203c4805SLuis R. Rodriguez 			hw = aphy->hw;
33203c4805SLuis R. Rodriguez 			break;
34203c4805SLuis R. Rodriguez 		}
35203c4805SLuis R. Rodriguez 	}
36203c4805SLuis R. Rodriguez 	spin_unlock_bh(&sc->wiphy_lock);
37203c4805SLuis R. Rodriguez 	return hw;
38203c4805SLuis R. Rodriguez }
39203c4805SLuis R. Rodriguez 
40203c4805SLuis R. Rodriguez /*
41203c4805SLuis R. Rodriguez  * Setup and link descriptors.
42203c4805SLuis R. Rodriguez  *
43203c4805SLuis R. Rodriguez  * 11N: we can no longer afford to self link the last descriptor.
44203c4805SLuis R. Rodriguez  * MAC acknowledges BA status as long as it copies frames to host
45203c4805SLuis R. Rodriguez  * buffer (or rx fifo). This can incorrectly acknowledge packets
46203c4805SLuis R. Rodriguez  * to a sender if last desc is self-linked.
47203c4805SLuis R. Rodriguez  */
48203c4805SLuis R. Rodriguez static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf)
49203c4805SLuis R. Rodriguez {
50203c4805SLuis R. Rodriguez 	struct ath_hw *ah = sc->sc_ah;
51cc861f74SLuis R. Rodriguez 	struct ath_common *common = ath9k_hw_common(ah);
52203c4805SLuis R. Rodriguez 	struct ath_desc *ds;
53203c4805SLuis R. Rodriguez 	struct sk_buff *skb;
54203c4805SLuis R. Rodriguez 
55203c4805SLuis R. Rodriguez 	ATH_RXBUF_RESET(bf);
56203c4805SLuis R. Rodriguez 
57203c4805SLuis R. Rodriguez 	ds = bf->bf_desc;
58203c4805SLuis R. Rodriguez 	ds->ds_link = 0; /* link to null */
59203c4805SLuis R. Rodriguez 	ds->ds_data = bf->bf_buf_addr;
60203c4805SLuis R. Rodriguez 
61203c4805SLuis R. Rodriguez 	/* virtual addr of the beginning of the buffer. */
62203c4805SLuis R. Rodriguez 	skb = bf->bf_mpdu;
639680e8a3SLuis R. Rodriguez 	BUG_ON(skb == NULL);
64203c4805SLuis R. Rodriguez 	ds->ds_vdata = skb->data;
65203c4805SLuis R. Rodriguez 
66cc861f74SLuis R. Rodriguez 	/*
67cc861f74SLuis R. Rodriguez 	 * setup rx descriptors. The rx_bufsize here tells the hardware
68203c4805SLuis R. Rodriguez 	 * how much data it can DMA to us and that we are prepared
69cc861f74SLuis R. Rodriguez 	 * to process
70cc861f74SLuis R. Rodriguez 	 */
71203c4805SLuis R. Rodriguez 	ath9k_hw_setuprxdesc(ah, ds,
72cc861f74SLuis R. Rodriguez 			     common->rx_bufsize,
73203c4805SLuis R. Rodriguez 			     0);
74203c4805SLuis R. Rodriguez 
75203c4805SLuis R. Rodriguez 	if (sc->rx.rxlink == NULL)
76203c4805SLuis R. Rodriguez 		ath9k_hw_putrxbuf(ah, bf->bf_daddr);
77203c4805SLuis R. Rodriguez 	else
78203c4805SLuis R. Rodriguez 		*sc->rx.rxlink = bf->bf_daddr;
79203c4805SLuis R. Rodriguez 
80203c4805SLuis R. Rodriguez 	sc->rx.rxlink = &ds->ds_link;
81203c4805SLuis R. Rodriguez 	ath9k_hw_rxena(ah);
82203c4805SLuis R. Rodriguez }
83203c4805SLuis R. Rodriguez 
84203c4805SLuis R. Rodriguez static void ath_setdefantenna(struct ath_softc *sc, u32 antenna)
85203c4805SLuis R. Rodriguez {
86203c4805SLuis R. Rodriguez 	/* XXX block beacon interrupts */
87203c4805SLuis R. Rodriguez 	ath9k_hw_setantenna(sc->sc_ah, antenna);
88203c4805SLuis R. Rodriguez 	sc->rx.defant = antenna;
89203c4805SLuis R. Rodriguez 	sc->rx.rxotherant = 0;
90203c4805SLuis R. Rodriguez }
91203c4805SLuis R. Rodriguez 
92207e9685SLuis R. Rodriguez /* Assumes you've already done the endian to CPU conversion */
93207e9685SLuis R. Rodriguez static bool ath9k_rx_accept(struct ath_common *common,
94207e9685SLuis R. Rodriguez 			    struct sk_buff *skb,
95207e9685SLuis R. Rodriguez 			    struct ieee80211_rx_status *rxs,
96207e9685SLuis R. Rodriguez 			    struct ath_rx_status *rx_stats,
97207e9685SLuis R. Rodriguez 			    bool *decrypt_error)
98207e9685SLuis R. Rodriguez {
99207e9685SLuis R. Rodriguez 	struct ath_hw *ah = common->ah;
100207e9685SLuis R. Rodriguez 	struct ieee80211_hdr *hdr;
101207e9685SLuis R. Rodriguez 	__le16 fc;
102207e9685SLuis R. Rodriguez 
103207e9685SLuis R. Rodriguez 	hdr = (struct ieee80211_hdr *) skb->data;
104207e9685SLuis R. Rodriguez 	fc = hdr->frame_control;
105207e9685SLuis R. Rodriguez 
1060a45da76SLuis R. Rodriguez 	if (!rx_stats->rs_datalen)
1070a45da76SLuis R. Rodriguez 		return false;
1082c74aa4dSLuis R. Rodriguez         /*
1092c74aa4dSLuis R. Rodriguez          * rs_status follows rs_datalen so if rs_datalen is too large
1102c74aa4dSLuis R. Rodriguez          * we can take a hint that hardware corrupted it, so ignore
1112c74aa4dSLuis R. Rodriguez          * those frames.
1122c74aa4dSLuis R. Rodriguez          */
1132c74aa4dSLuis R. Rodriguez 	if (rx_stats->rs_datalen > common->rx_bufsize)
1142c74aa4dSLuis R. Rodriguez 		return false;
1150a45da76SLuis R. Rodriguez 
116207e9685SLuis R. Rodriguez 	if (rx_stats->rs_more) {
117207e9685SLuis R. Rodriguez 		/*
118207e9685SLuis R. Rodriguez 		 * Frame spans multiple descriptors; this cannot happen yet
119207e9685SLuis R. Rodriguez 		 * as we don't support jumbograms. If not in monitor mode,
120207e9685SLuis R. Rodriguez 		 * discard the frame. Enable this if you want to see
121207e9685SLuis R. Rodriguez 		 * error frames in Monitor mode.
122207e9685SLuis R. Rodriguez 		 */
123207e9685SLuis R. Rodriguez 		if (ah->opmode != NL80211_IFTYPE_MONITOR)
124207e9685SLuis R. Rodriguez 			return false;
125207e9685SLuis R. Rodriguez 	} else if (rx_stats->rs_status != 0) {
126207e9685SLuis R. Rodriguez 		if (rx_stats->rs_status & ATH9K_RXERR_CRC)
127207e9685SLuis R. Rodriguez 			rxs->flag |= RX_FLAG_FAILED_FCS_CRC;
128207e9685SLuis R. Rodriguez 		if (rx_stats->rs_status & ATH9K_RXERR_PHY)
129207e9685SLuis R. Rodriguez 			return false;
130207e9685SLuis R. Rodriguez 
131207e9685SLuis R. Rodriguez 		if (rx_stats->rs_status & ATH9K_RXERR_DECRYPT) {
132207e9685SLuis R. Rodriguez 			*decrypt_error = true;
133207e9685SLuis R. Rodriguez 		} else if (rx_stats->rs_status & ATH9K_RXERR_MIC) {
134207e9685SLuis R. Rodriguez 			if (ieee80211_is_ctl(fc))
135207e9685SLuis R. Rodriguez 				/*
136207e9685SLuis R. Rodriguez 				 * Sometimes, we get invalid
137207e9685SLuis R. Rodriguez 				 * MIC failures on valid control frames.
138207e9685SLuis R. Rodriguez 				 * Remove these mic errors.
139207e9685SLuis R. Rodriguez 				 */
140207e9685SLuis R. Rodriguez 				rx_stats->rs_status &= ~ATH9K_RXERR_MIC;
141207e9685SLuis R. Rodriguez 			else
142207e9685SLuis R. Rodriguez 				rxs->flag |= RX_FLAG_MMIC_ERROR;
143207e9685SLuis R. Rodriguez 		}
144207e9685SLuis R. Rodriguez 		/*
145207e9685SLuis R. Rodriguez 		 * Reject error frames with the exception of
146207e9685SLuis R. Rodriguez 		 * decryption and MIC failures. For monitor mode,
147207e9685SLuis R. Rodriguez 		 * we also ignore the CRC error.
148207e9685SLuis R. Rodriguez 		 */
149207e9685SLuis R. Rodriguez 		if (ah->opmode == NL80211_IFTYPE_MONITOR) {
150207e9685SLuis R. Rodriguez 			if (rx_stats->rs_status &
151207e9685SLuis R. Rodriguez 			    ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
152207e9685SLuis R. Rodriguez 			      ATH9K_RXERR_CRC))
153207e9685SLuis R. Rodriguez 				return false;
154207e9685SLuis R. Rodriguez 		} else {
155207e9685SLuis R. Rodriguez 			if (rx_stats->rs_status &
156207e9685SLuis R. Rodriguez 			    ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) {
157207e9685SLuis R. Rodriguez 				return false;
158207e9685SLuis R. Rodriguez 			}
159207e9685SLuis R. Rodriguez 		}
160207e9685SLuis R. Rodriguez 	}
161207e9685SLuis R. Rodriguez 	return true;
162207e9685SLuis R. Rodriguez }
163207e9685SLuis R. Rodriguez 
1649878841eSLuis R. Rodriguez static u8 ath9k_process_rate(struct ath_common *common,
1659878841eSLuis R. Rodriguez 			     struct ieee80211_hw *hw,
1669878841eSLuis R. Rodriguez 			     struct ath_rx_status *rx_stats,
1679878841eSLuis R. Rodriguez 			     struct ieee80211_rx_status *rxs,
1689878841eSLuis R. Rodriguez 			     struct sk_buff *skb)
1699878841eSLuis R. Rodriguez {
1709878841eSLuis R. Rodriguez 	struct ieee80211_supported_band *sband;
1719878841eSLuis R. Rodriguez 	enum ieee80211_band band;
1729878841eSLuis R. Rodriguez 	unsigned int i = 0;
1739878841eSLuis R. Rodriguez 
1749878841eSLuis R. Rodriguez 	band = hw->conf.channel->band;
1759878841eSLuis R. Rodriguez 	sband = hw->wiphy->bands[band];
1769878841eSLuis R. Rodriguez 
1779878841eSLuis R. Rodriguez 	if (rx_stats->rs_rate & 0x80) {
1789878841eSLuis R. Rodriguez 		/* HT rate */
1799878841eSLuis R. Rodriguez 		rxs->flag |= RX_FLAG_HT;
1809878841eSLuis R. Rodriguez 		if (rx_stats->rs_flags & ATH9K_RX_2040)
1819878841eSLuis R. Rodriguez 			rxs->flag |= RX_FLAG_40MHZ;
1829878841eSLuis R. Rodriguez 		if (rx_stats->rs_flags & ATH9K_RX_GI)
1839878841eSLuis R. Rodriguez 			rxs->flag |= RX_FLAG_SHORT_GI;
1849878841eSLuis R. Rodriguez 		return rx_stats->rs_rate & 0x7f;
1859878841eSLuis R. Rodriguez 	}
1869878841eSLuis R. Rodriguez 
1879878841eSLuis R. Rodriguez 	for (i = 0; i < sband->n_bitrates; i++) {
1889878841eSLuis R. Rodriguez 		if (sband->bitrates[i].hw_value == rx_stats->rs_rate)
1899878841eSLuis R. Rodriguez 			return i;
1909878841eSLuis R. Rodriguez 		if (sband->bitrates[i].hw_value_short == rx_stats->rs_rate) {
1919878841eSLuis R. Rodriguez 			rxs->flag |= RX_FLAG_SHORTPRE;
1929878841eSLuis R. Rodriguez 			return i;
1939878841eSLuis R. Rodriguez 		}
1949878841eSLuis R. Rodriguez 	}
1959878841eSLuis R. Rodriguez 
1969878841eSLuis R. Rodriguez 	/* No valid hardware bitrate found -- we should not get here */
1979878841eSLuis R. Rodriguez 	ath_print(common, ATH_DBG_XMIT, "unsupported hw bitrate detected "
1989878841eSLuis R. Rodriguez 		  "0x%02x using 1 Mbit\n", rx_stats->rs_rate);
1999878841eSLuis R. Rodriguez 	if ((common->debug_mask & ATH_DBG_XMIT))
2009878841eSLuis R. Rodriguez 		print_hex_dump_bytes("", DUMP_PREFIX_NONE, skb->data, skb->len);
2019878841eSLuis R. Rodriguez 
2029878841eSLuis R. Rodriguez         return 0;
2039878841eSLuis R. Rodriguez }
2049878841eSLuis R. Rodriguez 
205203c4805SLuis R. Rodriguez /*
20621b22738SLuis R. Rodriguez  * Theory for reporting quality:
20721b22738SLuis R. Rodriguez  *
20821b22738SLuis R. Rodriguez  * At a hardware RSSI of 45 you will be able to use MCS 7  reliably.
20921b22738SLuis R. Rodriguez  * At a hardware RSSI of 45 you will be able to use MCS 15 reliably.
21021b22738SLuis R. Rodriguez  * At a hardware RSSI of 35 you should be able use 54 Mbps reliably.
21121b22738SLuis R. Rodriguez  *
21221b22738SLuis R. Rodriguez  * MCS 7  is the highets MCS index usable by a 1-stream device.
21321b22738SLuis R. Rodriguez  * MCS 15 is the highest MCS index usable by a 2-stream device.
21421b22738SLuis R. Rodriguez  *
21521b22738SLuis R. Rodriguez  * All ath9k devices are either 1-stream or 2-stream.
21621b22738SLuis R. Rodriguez  *
21721b22738SLuis R. Rodriguez  * How many bars you see is derived from the qual reporting.
21821b22738SLuis R. Rodriguez  *
21921b22738SLuis R. Rodriguez  * A more elaborate scheme can be used here but it requires tables
22021b22738SLuis R. Rodriguez  * of SNR/throughput for each possible mode used. For the MCS table
22121b22738SLuis R. Rodriguez  * you can refer to the wireless wiki:
22221b22738SLuis R. Rodriguez  *
22321b22738SLuis R. Rodriguez  * http://wireless.kernel.org/en/developers/Documentation/ieee80211/802.11n
22421b22738SLuis R. Rodriguez  *
22521b22738SLuis R. Rodriguez  */
22621b22738SLuis R. Rodriguez static int ath9k_compute_qual(struct ieee80211_hw *hw,
22721b22738SLuis R. Rodriguez 			      struct ath_rx_status *rx_stats)
22821b22738SLuis R. Rodriguez {
22921b22738SLuis R. Rodriguez 	int qual;
23021b22738SLuis R. Rodriguez 
23121b22738SLuis R. Rodriguez 	if (conf_is_ht(&hw->conf))
23221b22738SLuis R. Rodriguez 		qual =  rx_stats->rs_rssi * 100 / 45;
23321b22738SLuis R. Rodriguez 	else
23421b22738SLuis R. Rodriguez 		qual =  rx_stats->rs_rssi * 100 / 35;
23521b22738SLuis R. Rodriguez 
23621b22738SLuis R. Rodriguez 	/*
23721b22738SLuis R. Rodriguez 	 * rssi can be more than 45 though, anything above that
23821b22738SLuis R. Rodriguez 	 * should be considered at 100%
23921b22738SLuis R. Rodriguez 	 */
24021b22738SLuis R. Rodriguez 	if (qual > 100)
24121b22738SLuis R. Rodriguez 		qual = 100;
24221b22738SLuis R. Rodriguez 
24321b22738SLuis R. Rodriguez 	return qual;
24421b22738SLuis R. Rodriguez }
24521b22738SLuis R. Rodriguez 
246dbfc22dfSLuis R. Rodriguez static void ath9k_process_rssi(struct ath_common *common,
247712c13a8SLuis R. Rodriguez 			       struct ieee80211_hw *hw,
248dbfc22dfSLuis R. Rodriguez 			       struct sk_buff *skb,
249dbfc22dfSLuis R. Rodriguez 			       struct ath_rx_status *rx_stats)
250203c4805SLuis R. Rodriguez {
251712c13a8SLuis R. Rodriguez 	struct ath_hw *ah = common->ah;
252a59b5a5eSSenthil Balasubramanian 	struct ieee80211_sta *sta;
253dbfc22dfSLuis R. Rodriguez 	struct ieee80211_hdr *hdr;
254a59b5a5eSSenthil Balasubramanian 	struct ath_node *an;
255a59b5a5eSSenthil Balasubramanian 	int last_rssi = ATH_RSSI_DUMMY_MARKER;
256dbfc22dfSLuis R. Rodriguez 	__le16 fc;
257a59b5a5eSSenthil Balasubramanian 
258203c4805SLuis R. Rodriguez 	hdr = (struct ieee80211_hdr *)skb->data;
259203c4805SLuis R. Rodriguez 	fc = hdr->frame_control;
260203c4805SLuis R. Rodriguez 
261a59b5a5eSSenthil Balasubramanian 	rcu_read_lock();
2625ed176e1SJohannes Berg 	/* XXX: use ieee80211_find_sta! */
263cee71d6cSLuis R. Rodriguez 	sta = ieee80211_find_sta_by_hw(hw, hdr->addr2);
264a59b5a5eSSenthil Balasubramanian 	if (sta) {
265a59b5a5eSSenthil Balasubramanian 		an = (struct ath_node *) sta->drv_priv;
26626ab2645SLuis R. Rodriguez 		if (rx_stats->rs_rssi != ATH9K_RSSI_BAD &&
26726ab2645SLuis R. Rodriguez 		   !rx_stats->rs_moreaggr)
26826ab2645SLuis R. Rodriguez 			ATH_RSSI_LPF(an->last_rssi, rx_stats->rs_rssi);
269a59b5a5eSSenthil Balasubramanian 		last_rssi = an->last_rssi;
270a59b5a5eSSenthil Balasubramanian 	}
271a59b5a5eSSenthil Balasubramanian 	rcu_read_unlock();
272a59b5a5eSSenthil Balasubramanian 
273a59b5a5eSSenthil Balasubramanian 	if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER))
27426ab2645SLuis R. Rodriguez 		rx_stats->rs_rssi = ATH_EP_RND(last_rssi,
275a59b5a5eSSenthil Balasubramanian 					      ATH_RSSI_EP_MULTIPLIER);
27626ab2645SLuis R. Rodriguez 	if (rx_stats->rs_rssi < 0)
27726ab2645SLuis R. Rodriguez 		rx_stats->rs_rssi = 0;
27826ab2645SLuis R. Rodriguez 	else if (rx_stats->rs_rssi > 127)
27926ab2645SLuis R. Rodriguez 		rx_stats->rs_rssi = 127;
280a59b5a5eSSenthil Balasubramanian 
2815e32b1edSSujith 	/* Update Beacon RSSI, this is used by ANI. */
2825e32b1edSSujith 	if (ieee80211_is_beacon(fc))
283712c13a8SLuis R. Rodriguez 		ah->stats.avgbrssi = rx_stats->rs_rssi;
284dbfc22dfSLuis R. Rodriguez }
285dbfc22dfSLuis R. Rodriguez 
286dbfc22dfSLuis R. Rodriguez /*
287dbfc22dfSLuis R. Rodriguez  * For Decrypt or Demic errors, we only mark packet status here and always push
288dbfc22dfSLuis R. Rodriguez  * up the frame up to let mac80211 handle the actual error case, be it no
289dbfc22dfSLuis R. Rodriguez  * decryption key or real decryption error. This let us keep statistics there.
290dbfc22dfSLuis R. Rodriguez  */
291*1e875e9fSLuis R. Rodriguez static int ath9k_rx_skb_preprocess(struct ath_common *common,
292dbfc22dfSLuis R. Rodriguez 				   struct ieee80211_hw *hw,
293*1e875e9fSLuis R. Rodriguez 				   struct sk_buff *skb,
294*1e875e9fSLuis R. Rodriguez 				   struct ath_rx_status *rx_stats,
295dbfc22dfSLuis R. Rodriguez 				   struct ieee80211_rx_status *rx_status,
296dbfc22dfSLuis R. Rodriguez 				   bool *decrypt_error)
297dbfc22dfSLuis R. Rodriguez {
298dbfc22dfSLuis R. Rodriguez 	struct ath_hw *ah = common->ah;
299dbfc22dfSLuis R. Rodriguez 
300dbfc22dfSLuis R. Rodriguez 	if (!ath9k_rx_accept(common, skb, rx_status, rx_stats, decrypt_error))
301*1e875e9fSLuis R. Rodriguez 		return -EINVAL;
302dbfc22dfSLuis R. Rodriguez 
303dbfc22dfSLuis R. Rodriguez 	ath9k_process_rssi(common, hw, skb, rx_stats);
3045e32b1edSSujith 
3059878841eSLuis R. Rodriguez 	rx_status->rate_idx = ath9k_process_rate(common, hw,
3069878841eSLuis R. Rodriguez 						 rx_stats, rx_status, skb);
307712c13a8SLuis R. Rodriguez 	rx_status->mactime = ath9k_hw_extend_tsf(ah, rx_stats->rs_tstamp);
308203c4805SLuis R. Rodriguez 	rx_status->band = hw->conf.channel->band;
309203c4805SLuis R. Rodriguez 	rx_status->freq = hw->conf.channel->center_freq;
3103d536acfSLuis R. Rodriguez 	rx_status->noise = common->ani.noise_floor;
31126ab2645SLuis R. Rodriguez 	rx_status->signal = ATH_DEFAULT_NOISE_FLOOR + rx_stats->rs_rssi;
31226ab2645SLuis R. Rodriguez 	rx_status->antenna = rx_stats->rs_antenna;
31321b22738SLuis R. Rodriguez 	rx_status->qual = ath9k_compute_qual(hw, rx_stats);
314203c4805SLuis R. Rodriguez 	rx_status->flag |= RX_FLAG_TSFT;
315203c4805SLuis R. Rodriguez 
316203c4805SLuis R. Rodriguez 	return 0;
317203c4805SLuis R. Rodriguez }
318203c4805SLuis R. Rodriguez 
319203c4805SLuis R. Rodriguez static void ath_opmode_init(struct ath_softc *sc)
320203c4805SLuis R. Rodriguez {
321203c4805SLuis R. Rodriguez 	struct ath_hw *ah = sc->sc_ah;
3221510718dSLuis R. Rodriguez 	struct ath_common *common = ath9k_hw_common(ah);
3231510718dSLuis R. Rodriguez 
324203c4805SLuis R. Rodriguez 	u32 rfilt, mfilt[2];
325203c4805SLuis R. Rodriguez 
326203c4805SLuis R. Rodriguez 	/* configure rx filter */
327203c4805SLuis R. Rodriguez 	rfilt = ath_calcrxfilter(sc);
328203c4805SLuis R. Rodriguez 	ath9k_hw_setrxfilter(ah, rfilt);
329203c4805SLuis R. Rodriguez 
330203c4805SLuis R. Rodriguez 	/* configure bssid mask */
331203c4805SLuis R. Rodriguez 	if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
33213b81559SLuis R. Rodriguez 		ath_hw_setbssidmask(common);
333203c4805SLuis R. Rodriguez 
334203c4805SLuis R. Rodriguez 	/* configure operational mode */
335203c4805SLuis R. Rodriguez 	ath9k_hw_setopmode(ah);
336203c4805SLuis R. Rodriguez 
337203c4805SLuis R. Rodriguez 	/* Handle any link-level address change. */
3381510718dSLuis R. Rodriguez 	ath9k_hw_setmac(ah, common->macaddr);
339203c4805SLuis R. Rodriguez 
340203c4805SLuis R. Rodriguez 	/* calculate and install multicast filter */
341203c4805SLuis R. Rodriguez 	mfilt[0] = mfilt[1] = ~0;
342203c4805SLuis R. Rodriguez 	ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]);
343203c4805SLuis R. Rodriguez }
344203c4805SLuis R. Rodriguez 
345203c4805SLuis R. Rodriguez int ath_rx_init(struct ath_softc *sc, int nbufs)
346203c4805SLuis R. Rodriguez {
34727c51f1aSLuis R. Rodriguez 	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
348203c4805SLuis R. Rodriguez 	struct sk_buff *skb;
349203c4805SLuis R. Rodriguez 	struct ath_buf *bf;
350203c4805SLuis R. Rodriguez 	int error = 0;
351203c4805SLuis R. Rodriguez 
352203c4805SLuis R. Rodriguez 	spin_lock_init(&sc->rx.rxflushlock);
353203c4805SLuis R. Rodriguez 	sc->sc_flags &= ~SC_OP_RXFLUSH;
354203c4805SLuis R. Rodriguez 	spin_lock_init(&sc->rx.rxbuflock);
355203c4805SLuis R. Rodriguez 
356cc861f74SLuis R. Rodriguez 	common->rx_bufsize = roundup(IEEE80211_MAX_MPDU_LEN,
35727c51f1aSLuis R. Rodriguez 				     min(common->cachelsz, (u16)64));
358203c4805SLuis R. Rodriguez 
359c46917bbSLuis R. Rodriguez 	ath_print(common, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n",
360cc861f74SLuis R. Rodriguez 		  common->cachelsz, common->rx_bufsize);
361203c4805SLuis R. Rodriguez 
362203c4805SLuis R. Rodriguez 	/* Initialize rx descriptors */
363203c4805SLuis R. Rodriguez 
364203c4805SLuis R. Rodriguez 	error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf,
365203c4805SLuis R. Rodriguez 				  "rx", nbufs, 1);
366203c4805SLuis R. Rodriguez 	if (error != 0) {
367c46917bbSLuis R. Rodriguez 		ath_print(common, ATH_DBG_FATAL,
368203c4805SLuis R. Rodriguez 			  "failed to allocate rx descriptors: %d\n", error);
369203c4805SLuis R. Rodriguez 		goto err;
370203c4805SLuis R. Rodriguez 	}
371203c4805SLuis R. Rodriguez 
372203c4805SLuis R. Rodriguez 	list_for_each_entry(bf, &sc->rx.rxbuf, list) {
373cc861f74SLuis R. Rodriguez 		skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_KERNEL);
374203c4805SLuis R. Rodriguez 		if (skb == NULL) {
375203c4805SLuis R. Rodriguez 			error = -ENOMEM;
376203c4805SLuis R. Rodriguez 			goto err;
377203c4805SLuis R. Rodriguez 		}
378203c4805SLuis R. Rodriguez 
379203c4805SLuis R. Rodriguez 		bf->bf_mpdu = skb;
380203c4805SLuis R. Rodriguez 		bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
381cc861f74SLuis R. Rodriguez 						 common->rx_bufsize,
382203c4805SLuis R. Rodriguez 						 DMA_FROM_DEVICE);
383203c4805SLuis R. Rodriguez 		if (unlikely(dma_mapping_error(sc->dev,
384203c4805SLuis R. Rodriguez 					       bf->bf_buf_addr))) {
385203c4805SLuis R. Rodriguez 			dev_kfree_skb_any(skb);
386203c4805SLuis R. Rodriguez 			bf->bf_mpdu = NULL;
387c46917bbSLuis R. Rodriguez 			ath_print(common, ATH_DBG_FATAL,
388203c4805SLuis R. Rodriguez 				  "dma_mapping_error() on RX init\n");
389203c4805SLuis R. Rodriguez 			error = -ENOMEM;
390203c4805SLuis R. Rodriguez 			goto err;
391203c4805SLuis R. Rodriguez 		}
392203c4805SLuis R. Rodriguez 		bf->bf_dmacontext = bf->bf_buf_addr;
393203c4805SLuis R. Rodriguez 	}
394203c4805SLuis R. Rodriguez 	sc->rx.rxlink = NULL;
395203c4805SLuis R. Rodriguez 
396203c4805SLuis R. Rodriguez err:
397203c4805SLuis R. Rodriguez 	if (error)
398203c4805SLuis R. Rodriguez 		ath_rx_cleanup(sc);
399203c4805SLuis R. Rodriguez 
400203c4805SLuis R. Rodriguez 	return error;
401203c4805SLuis R. Rodriguez }
402203c4805SLuis R. Rodriguez 
403203c4805SLuis R. Rodriguez void ath_rx_cleanup(struct ath_softc *sc)
404203c4805SLuis R. Rodriguez {
405cc861f74SLuis R. Rodriguez 	struct ath_hw *ah = sc->sc_ah;
406cc861f74SLuis R. Rodriguez 	struct ath_common *common = ath9k_hw_common(ah);
407203c4805SLuis R. Rodriguez 	struct sk_buff *skb;
408203c4805SLuis R. Rodriguez 	struct ath_buf *bf;
409203c4805SLuis R. Rodriguez 
410203c4805SLuis R. Rodriguez 	list_for_each_entry(bf, &sc->rx.rxbuf, list) {
411203c4805SLuis R. Rodriguez 		skb = bf->bf_mpdu;
412203c4805SLuis R. Rodriguez 		if (skb) {
413203c4805SLuis R. Rodriguez 			dma_unmap_single(sc->dev, bf->bf_buf_addr,
414cc861f74SLuis R. Rodriguez 					 common->rx_bufsize, DMA_FROM_DEVICE);
415203c4805SLuis R. Rodriguez 			dev_kfree_skb(skb);
416203c4805SLuis R. Rodriguez 		}
417203c4805SLuis R. Rodriguez 	}
418203c4805SLuis R. Rodriguez 
419203c4805SLuis R. Rodriguez 	if (sc->rx.rxdma.dd_desc_len != 0)
420203c4805SLuis R. Rodriguez 		ath_descdma_cleanup(sc, &sc->rx.rxdma, &sc->rx.rxbuf);
421203c4805SLuis R. Rodriguez }
422203c4805SLuis R. Rodriguez 
423203c4805SLuis R. Rodriguez /*
424203c4805SLuis R. Rodriguez  * Calculate the receive filter according to the
425203c4805SLuis R. Rodriguez  * operating mode and state:
426203c4805SLuis R. Rodriguez  *
427203c4805SLuis R. Rodriguez  * o always accept unicast, broadcast, and multicast traffic
428203c4805SLuis R. Rodriguez  * o maintain current state of phy error reception (the hal
429203c4805SLuis R. Rodriguez  *   may enable phy error frames for noise immunity work)
430203c4805SLuis R. Rodriguez  * o probe request frames are accepted only when operating in
431203c4805SLuis R. Rodriguez  *   hostap, adhoc, or monitor modes
432203c4805SLuis R. Rodriguez  * o enable promiscuous mode according to the interface state
433203c4805SLuis R. Rodriguez  * o accept beacons:
434203c4805SLuis R. Rodriguez  *   - when operating in adhoc mode so the 802.11 layer creates
435203c4805SLuis R. Rodriguez  *     node table entries for peers,
436203c4805SLuis R. Rodriguez  *   - when operating in station mode for collecting rssi data when
437203c4805SLuis R. Rodriguez  *     the station is otherwise quiet, or
438203c4805SLuis R. Rodriguez  *   - when operating as a repeater so we see repeater-sta beacons
439203c4805SLuis R. Rodriguez  *   - when scanning
440203c4805SLuis R. Rodriguez  */
441203c4805SLuis R. Rodriguez 
442203c4805SLuis R. Rodriguez u32 ath_calcrxfilter(struct ath_softc *sc)
443203c4805SLuis R. Rodriguez {
444203c4805SLuis R. Rodriguez #define	RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR)
445203c4805SLuis R. Rodriguez 
446203c4805SLuis R. Rodriguez 	u32 rfilt;
447203c4805SLuis R. Rodriguez 
448203c4805SLuis R. Rodriguez 	rfilt = (ath9k_hw_getrxfilter(sc->sc_ah) & RX_FILTER_PRESERVE)
449203c4805SLuis R. Rodriguez 		| ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
450203c4805SLuis R. Rodriguez 		| ATH9K_RX_FILTER_MCAST;
451203c4805SLuis R. Rodriguez 
452203c4805SLuis R. Rodriguez 	/* If not a STA, enable processing of Probe Requests */
453203c4805SLuis R. Rodriguez 	if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
454203c4805SLuis R. Rodriguez 		rfilt |= ATH9K_RX_FILTER_PROBEREQ;
455203c4805SLuis R. Rodriguez 
456203c4805SLuis R. Rodriguez 	/*
457203c4805SLuis R. Rodriguez 	 * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station
458203c4805SLuis R. Rodriguez 	 * mode interface or when in monitor mode. AP mode does not need this
459203c4805SLuis R. Rodriguez 	 * since it receives all in-BSS frames anyway.
460203c4805SLuis R. Rodriguez 	 */
461203c4805SLuis R. Rodriguez 	if (((sc->sc_ah->opmode != NL80211_IFTYPE_AP) &&
462203c4805SLuis R. Rodriguez 	     (sc->rx.rxfilter & FIF_PROMISC_IN_BSS)) ||
463203c4805SLuis R. Rodriguez 	    (sc->sc_ah->opmode == NL80211_IFTYPE_MONITOR))
464203c4805SLuis R. Rodriguez 		rfilt |= ATH9K_RX_FILTER_PROM;
465203c4805SLuis R. Rodriguez 
466203c4805SLuis R. Rodriguez 	if (sc->rx.rxfilter & FIF_CONTROL)
467203c4805SLuis R. Rodriguez 		rfilt |= ATH9K_RX_FILTER_CONTROL;
468203c4805SLuis R. Rodriguez 
469203c4805SLuis R. Rodriguez 	if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
470203c4805SLuis R. Rodriguez 	    !(sc->rx.rxfilter & FIF_BCN_PRBRESP_PROMISC))
471203c4805SLuis R. Rodriguez 		rfilt |= ATH9K_RX_FILTER_MYBEACON;
472203c4805SLuis R. Rodriguez 	else
473203c4805SLuis R. Rodriguez 		rfilt |= ATH9K_RX_FILTER_BEACON;
474203c4805SLuis R. Rodriguez 
47566afad01SSenthil Balasubramanian 	if ((AR_SREV_9280_10_OR_LATER(sc->sc_ah) ||
47666afad01SSenthil Balasubramanian 	    AR_SREV_9285_10_OR_LATER(sc->sc_ah)) &&
47766afad01SSenthil Balasubramanian 	    (sc->sc_ah->opmode == NL80211_IFTYPE_AP) &&
47866afad01SSenthil Balasubramanian 	    (sc->rx.rxfilter & FIF_PSPOLL))
479203c4805SLuis R. Rodriguez 		rfilt |= ATH9K_RX_FILTER_PSPOLL;
480203c4805SLuis R. Rodriguez 
4817ea310beSSujith 	if (conf_is_ht(&sc->hw->conf))
4827ea310beSSujith 		rfilt |= ATH9K_RX_FILTER_COMP_BAR;
4837ea310beSSujith 
4845eb6ba83SJavier Cardona 	if (sc->sec_wiphy || (sc->rx.rxfilter & FIF_OTHER_BSS)) {
485203c4805SLuis R. Rodriguez 		/* TODO: only needed if more than one BSSID is in use in
486203c4805SLuis R. Rodriguez 		 * station/adhoc mode */
4875eb6ba83SJavier Cardona 		/* The following may also be needed for other older chips */
4885eb6ba83SJavier Cardona 		if (sc->sc_ah->hw_version.macVersion == AR_SREV_VERSION_9160)
4895eb6ba83SJavier Cardona 			rfilt |= ATH9K_RX_FILTER_PROM;
490203c4805SLuis R. Rodriguez 		rfilt |= ATH9K_RX_FILTER_MCAST_BCAST_ALL;
491203c4805SLuis R. Rodriguez 	}
492203c4805SLuis R. Rodriguez 
493203c4805SLuis R. Rodriguez 	return rfilt;
494203c4805SLuis R. Rodriguez 
495203c4805SLuis R. Rodriguez #undef RX_FILTER_PRESERVE
496203c4805SLuis R. Rodriguez }
497203c4805SLuis R. Rodriguez 
498203c4805SLuis R. Rodriguez int ath_startrecv(struct ath_softc *sc)
499203c4805SLuis R. Rodriguez {
500203c4805SLuis R. Rodriguez 	struct ath_hw *ah = sc->sc_ah;
501203c4805SLuis R. Rodriguez 	struct ath_buf *bf, *tbf;
502203c4805SLuis R. Rodriguez 
503203c4805SLuis R. Rodriguez 	spin_lock_bh(&sc->rx.rxbuflock);
504203c4805SLuis R. Rodriguez 	if (list_empty(&sc->rx.rxbuf))
505203c4805SLuis R. Rodriguez 		goto start_recv;
506203c4805SLuis R. Rodriguez 
507203c4805SLuis R. Rodriguez 	sc->rx.rxlink = NULL;
508203c4805SLuis R. Rodriguez 	list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) {
509203c4805SLuis R. Rodriguez 		ath_rx_buf_link(sc, bf);
510203c4805SLuis R. Rodriguez 	}
511203c4805SLuis R. Rodriguez 
512203c4805SLuis R. Rodriguez 	/* We could have deleted elements so the list may be empty now */
513203c4805SLuis R. Rodriguez 	if (list_empty(&sc->rx.rxbuf))
514203c4805SLuis R. Rodriguez 		goto start_recv;
515203c4805SLuis R. Rodriguez 
516203c4805SLuis R. Rodriguez 	bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
517203c4805SLuis R. Rodriguez 	ath9k_hw_putrxbuf(ah, bf->bf_daddr);
518203c4805SLuis R. Rodriguez 	ath9k_hw_rxena(ah);
519203c4805SLuis R. Rodriguez 
520203c4805SLuis R. Rodriguez start_recv:
521203c4805SLuis R. Rodriguez 	spin_unlock_bh(&sc->rx.rxbuflock);
522203c4805SLuis R. Rodriguez 	ath_opmode_init(sc);
523203c4805SLuis R. Rodriguez 	ath9k_hw_startpcureceive(ah);
524203c4805SLuis R. Rodriguez 
525203c4805SLuis R. Rodriguez 	return 0;
526203c4805SLuis R. Rodriguez }
527203c4805SLuis R. Rodriguez 
528203c4805SLuis R. Rodriguez bool ath_stoprecv(struct ath_softc *sc)
529203c4805SLuis R. Rodriguez {
530203c4805SLuis R. Rodriguez 	struct ath_hw *ah = sc->sc_ah;
531203c4805SLuis R. Rodriguez 	bool stopped;
532203c4805SLuis R. Rodriguez 
533203c4805SLuis R. Rodriguez 	ath9k_hw_stoppcurecv(ah);
534203c4805SLuis R. Rodriguez 	ath9k_hw_setrxfilter(ah, 0);
535203c4805SLuis R. Rodriguez 	stopped = ath9k_hw_stopdmarecv(ah);
536203c4805SLuis R. Rodriguez 	sc->rx.rxlink = NULL;
537203c4805SLuis R. Rodriguez 
538203c4805SLuis R. Rodriguez 	return stopped;
539203c4805SLuis R. Rodriguez }
540203c4805SLuis R. Rodriguez 
541203c4805SLuis R. Rodriguez void ath_flushrecv(struct ath_softc *sc)
542203c4805SLuis R. Rodriguez {
543203c4805SLuis R. Rodriguez 	spin_lock_bh(&sc->rx.rxflushlock);
544203c4805SLuis R. Rodriguez 	sc->sc_flags |= SC_OP_RXFLUSH;
545203c4805SLuis R. Rodriguez 	ath_rx_tasklet(sc, 1);
546203c4805SLuis R. Rodriguez 	sc->sc_flags &= ~SC_OP_RXFLUSH;
547203c4805SLuis R. Rodriguez 	spin_unlock_bh(&sc->rx.rxflushlock);
548203c4805SLuis R. Rodriguez }
549203c4805SLuis R. Rodriguez 
550cc65965cSJouni Malinen static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
551cc65965cSJouni Malinen {
552cc65965cSJouni Malinen 	/* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
553cc65965cSJouni Malinen 	struct ieee80211_mgmt *mgmt;
554cc65965cSJouni Malinen 	u8 *pos, *end, id, elen;
555cc65965cSJouni Malinen 	struct ieee80211_tim_ie *tim;
556cc65965cSJouni Malinen 
557cc65965cSJouni Malinen 	mgmt = (struct ieee80211_mgmt *)skb->data;
558cc65965cSJouni Malinen 	pos = mgmt->u.beacon.variable;
559cc65965cSJouni Malinen 	end = skb->data + skb->len;
560cc65965cSJouni Malinen 
561cc65965cSJouni Malinen 	while (pos + 2 < end) {
562cc65965cSJouni Malinen 		id = *pos++;
563cc65965cSJouni Malinen 		elen = *pos++;
564cc65965cSJouni Malinen 		if (pos + elen > end)
565cc65965cSJouni Malinen 			break;
566cc65965cSJouni Malinen 
567cc65965cSJouni Malinen 		if (id == WLAN_EID_TIM) {
568cc65965cSJouni Malinen 			if (elen < sizeof(*tim))
569cc65965cSJouni Malinen 				break;
570cc65965cSJouni Malinen 			tim = (struct ieee80211_tim_ie *) pos;
571cc65965cSJouni Malinen 			if (tim->dtim_count != 0)
572cc65965cSJouni Malinen 				break;
573cc65965cSJouni Malinen 			return tim->bitmap_ctrl & 0x01;
574cc65965cSJouni Malinen 		}
575cc65965cSJouni Malinen 
576cc65965cSJouni Malinen 		pos += elen;
577cc65965cSJouni Malinen 	}
578cc65965cSJouni Malinen 
579cc65965cSJouni Malinen 	return false;
580cc65965cSJouni Malinen }
581cc65965cSJouni Malinen 
582cc65965cSJouni Malinen static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
583cc65965cSJouni Malinen {
584cc65965cSJouni Malinen 	struct ieee80211_mgmt *mgmt;
5851510718dSLuis R. Rodriguez 	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
586cc65965cSJouni Malinen 
587cc65965cSJouni Malinen 	if (skb->len < 24 + 8 + 2 + 2)
588cc65965cSJouni Malinen 		return;
589cc65965cSJouni Malinen 
590cc65965cSJouni Malinen 	mgmt = (struct ieee80211_mgmt *)skb->data;
5911510718dSLuis R. Rodriguez 	if (memcmp(common->curbssid, mgmt->bssid, ETH_ALEN) != 0)
592cc65965cSJouni Malinen 		return; /* not from our current AP */
593cc65965cSJouni Malinen 
594293dc5dfSGabor Juhos 	sc->sc_flags &= ~SC_OP_WAIT_FOR_BEACON;
595293dc5dfSGabor Juhos 
596ccdfeab6SJouni Malinen 	if (sc->sc_flags & SC_OP_BEACON_SYNC) {
597ccdfeab6SJouni Malinen 		sc->sc_flags &= ~SC_OP_BEACON_SYNC;
598c46917bbSLuis R. Rodriguez 		ath_print(common, ATH_DBG_PS,
599c46917bbSLuis R. Rodriguez 			  "Reconfigure Beacon timers based on "
600ccdfeab6SJouni Malinen 			  "timestamp from the AP\n");
601ccdfeab6SJouni Malinen 		ath_beacon_config(sc, NULL);
602ccdfeab6SJouni Malinen 	}
603ccdfeab6SJouni Malinen 
604cc65965cSJouni Malinen 	if (ath_beacon_dtim_pending_cab(skb)) {
605cc65965cSJouni Malinen 		/*
606cc65965cSJouni Malinen 		 * Remain awake waiting for buffered broadcast/multicast
60758f5fffdSGabor Juhos 		 * frames. If the last broadcast/multicast frame is not
60858f5fffdSGabor Juhos 		 * received properly, the next beacon frame will work as
60958f5fffdSGabor Juhos 		 * a backup trigger for returning into NETWORK SLEEP state,
61058f5fffdSGabor Juhos 		 * so we are waiting for it as well.
611cc65965cSJouni Malinen 		 */
612c46917bbSLuis R. Rodriguez 		ath_print(common, ATH_DBG_PS, "Received DTIM beacon indicating "
613cc65965cSJouni Malinen 			  "buffered broadcast/multicast frame(s)\n");
61458f5fffdSGabor Juhos 		sc->sc_flags |= SC_OP_WAIT_FOR_CAB | SC_OP_WAIT_FOR_BEACON;
615cc65965cSJouni Malinen 		return;
616cc65965cSJouni Malinen 	}
617cc65965cSJouni Malinen 
618cc65965cSJouni Malinen 	if (sc->sc_flags & SC_OP_WAIT_FOR_CAB) {
619cc65965cSJouni Malinen 		/*
620cc65965cSJouni Malinen 		 * This can happen if a broadcast frame is dropped or the AP
621cc65965cSJouni Malinen 		 * fails to send a frame indicating that all CAB frames have
622cc65965cSJouni Malinen 		 * been delivered.
623cc65965cSJouni Malinen 		 */
624293dc5dfSGabor Juhos 		sc->sc_flags &= ~SC_OP_WAIT_FOR_CAB;
625c46917bbSLuis R. Rodriguez 		ath_print(common, ATH_DBG_PS,
626c46917bbSLuis R. Rodriguez 			  "PS wait for CAB frames timed out\n");
627cc65965cSJouni Malinen 	}
628cc65965cSJouni Malinen }
629cc65965cSJouni Malinen 
630cc65965cSJouni Malinen static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb)
631cc65965cSJouni Malinen {
632cc65965cSJouni Malinen 	struct ieee80211_hdr *hdr;
633c46917bbSLuis R. Rodriguez 	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
634cc65965cSJouni Malinen 
635cc65965cSJouni Malinen 	hdr = (struct ieee80211_hdr *)skb->data;
636cc65965cSJouni Malinen 
637cc65965cSJouni Malinen 	/* Process Beacon and CAB receive in PS state */
6389a23f9caSJouni Malinen 	if ((sc->sc_flags & SC_OP_WAIT_FOR_BEACON) &&
6399a23f9caSJouni Malinen 	    ieee80211_is_beacon(hdr->frame_control))
640cc65965cSJouni Malinen 		ath_rx_ps_beacon(sc, skb);
641cc65965cSJouni Malinen 	else if ((sc->sc_flags & SC_OP_WAIT_FOR_CAB) &&
642cc65965cSJouni Malinen 		 (ieee80211_is_data(hdr->frame_control) ||
643cc65965cSJouni Malinen 		  ieee80211_is_action(hdr->frame_control)) &&
644cc65965cSJouni Malinen 		 is_multicast_ether_addr(hdr->addr1) &&
645cc65965cSJouni Malinen 		 !ieee80211_has_moredata(hdr->frame_control)) {
646cc65965cSJouni Malinen 		/*
647cc65965cSJouni Malinen 		 * No more broadcast/multicast frames to be received at this
648cc65965cSJouni Malinen 		 * point.
649cc65965cSJouni Malinen 		 */
650293dc5dfSGabor Juhos 		sc->sc_flags &= ~SC_OP_WAIT_FOR_CAB;
651c46917bbSLuis R. Rodriguez 		ath_print(common, ATH_DBG_PS,
652c46917bbSLuis R. Rodriguez 			  "All PS CAB frames received, back to sleep\n");
6539a23f9caSJouni Malinen 	} else if ((sc->sc_flags & SC_OP_WAIT_FOR_PSPOLL_DATA) &&
6549a23f9caSJouni Malinen 		   !is_multicast_ether_addr(hdr->addr1) &&
6559a23f9caSJouni Malinen 		   !ieee80211_has_morefrags(hdr->frame_control)) {
6569a23f9caSJouni Malinen 		sc->sc_flags &= ~SC_OP_WAIT_FOR_PSPOLL_DATA;
657c46917bbSLuis R. Rodriguez 		ath_print(common, ATH_DBG_PS,
658c46917bbSLuis R. Rodriguez 			  "Going back to sleep after having received "
659c46917bbSLuis R. Rodriguez 			  "PS-Poll data (0x%x)\n",
6609a23f9caSJouni Malinen 			sc->sc_flags & (SC_OP_WAIT_FOR_BEACON |
6619a23f9caSJouni Malinen 					SC_OP_WAIT_FOR_CAB |
6629a23f9caSJouni Malinen 					SC_OP_WAIT_FOR_PSPOLL_DATA |
6639a23f9caSJouni Malinen 					SC_OP_WAIT_FOR_TX_ACK));
664cc65965cSJouni Malinen 	}
665cc65965cSJouni Malinen }
666cc65965cSJouni Malinen 
667b4afffc0SLuis R. Rodriguez static void ath_rx_send_to_mac80211(struct ieee80211_hw *hw,
668b4afffc0SLuis R. Rodriguez 				    struct ath_softc *sc, struct sk_buff *skb,
6695ca42627SLuis R. Rodriguez 				    struct ieee80211_rx_status *rxs)
6709d64a3cfSJouni Malinen {
6719d64a3cfSJouni Malinen 	struct ieee80211_hdr *hdr;
6729d64a3cfSJouni Malinen 
6739d64a3cfSJouni Malinen 	hdr = (struct ieee80211_hdr *)skb->data;
6749d64a3cfSJouni Malinen 
6759d64a3cfSJouni Malinen 	/* Send the frame to mac80211 */
6769d64a3cfSJouni Malinen 	if (is_multicast_ether_addr(hdr->addr1)) {
6779d64a3cfSJouni Malinen 		int i;
6789d64a3cfSJouni Malinen 		/*
6799d64a3cfSJouni Malinen 		 * Deliver broadcast/multicast frames to all suitable
6809d64a3cfSJouni Malinen 		 * virtual wiphys.
6819d64a3cfSJouni Malinen 		 */
6829d64a3cfSJouni Malinen 		/* TODO: filter based on channel configuration */
6839d64a3cfSJouni Malinen 		for (i = 0; i < sc->num_sec_wiphy; i++) {
6849d64a3cfSJouni Malinen 			struct ath_wiphy *aphy = sc->sec_wiphy[i];
6859d64a3cfSJouni Malinen 			struct sk_buff *nskb;
6869d64a3cfSJouni Malinen 			if (aphy == NULL)
6879d64a3cfSJouni Malinen 				continue;
6889d64a3cfSJouni Malinen 			nskb = skb_copy(skb, GFP_ATOMIC);
6895ca42627SLuis R. Rodriguez 			if (!nskb)
6905ca42627SLuis R. Rodriguez 				continue;
691f1d58c25SJohannes Berg 			ieee80211_rx(aphy->hw, nskb);
6929d64a3cfSJouni Malinen 		}
693f1d58c25SJohannes Berg 		ieee80211_rx(sc->hw, skb);
6945ca42627SLuis R. Rodriguez 	} else
6959d64a3cfSJouni Malinen 		/* Deliver unicast frames based on receiver address */
696b4afffc0SLuis R. Rodriguez 		ieee80211_rx(hw, skb);
6979d64a3cfSJouni Malinen }
6989d64a3cfSJouni Malinen 
699203c4805SLuis R. Rodriguez int ath_rx_tasklet(struct ath_softc *sc, int flush)
700203c4805SLuis R. Rodriguez {
701203c4805SLuis R. Rodriguez #define PA2DESC(_sc, _pa)                                               \
702203c4805SLuis R. Rodriguez 	((struct ath_desc *)((caddr_t)(_sc)->rx.rxdma.dd_desc +		\
703203c4805SLuis R. Rodriguez 			     ((_pa) - (_sc)->rx.rxdma.dd_desc_paddr)))
704203c4805SLuis R. Rodriguez 
705203c4805SLuis R. Rodriguez 	struct ath_buf *bf;
706203c4805SLuis R. Rodriguez 	struct ath_desc *ds;
70726ab2645SLuis R. Rodriguez 	struct ath_rx_status *rx_stats;
708203c4805SLuis R. Rodriguez 	struct sk_buff *skb = NULL, *requeue_skb;
7095ca42627SLuis R. Rodriguez 	struct ieee80211_rx_status *rxs;
710203c4805SLuis R. Rodriguez 	struct ath_hw *ah = sc->sc_ah;
71127c51f1aSLuis R. Rodriguez 	struct ath_common *common = ath9k_hw_common(ah);
712b4afffc0SLuis R. Rodriguez 	/*
713b4afffc0SLuis R. Rodriguez 	 * The hw can techncically differ from common->hw when using ath9k
714b4afffc0SLuis R. Rodriguez 	 * virtual wiphy so to account for that we iterate over the active
715b4afffc0SLuis R. Rodriguez 	 * wiphys and find the appropriate wiphy and therefore hw.
716b4afffc0SLuis R. Rodriguez 	 */
717b4afffc0SLuis R. Rodriguez 	struct ieee80211_hw *hw = NULL;
718203c4805SLuis R. Rodriguez 	struct ieee80211_hdr *hdr;
719203c4805SLuis R. Rodriguez 	int hdrlen, padsize, retval;
720203c4805SLuis R. Rodriguez 	bool decrypt_error = false;
721203c4805SLuis R. Rodriguez 	u8 keyix;
722203c4805SLuis R. Rodriguez 	__le16 fc;
723203c4805SLuis R. Rodriguez 
724203c4805SLuis R. Rodriguez 	spin_lock_bh(&sc->rx.rxbuflock);
725203c4805SLuis R. Rodriguez 
726203c4805SLuis R. Rodriguez 	do {
727203c4805SLuis R. Rodriguez 		/* If handling rx interrupt and flush is in progress => exit */
728203c4805SLuis R. Rodriguez 		if ((sc->sc_flags & SC_OP_RXFLUSH) && (flush == 0))
729203c4805SLuis R. Rodriguez 			break;
730203c4805SLuis R. Rodriguez 
731203c4805SLuis R. Rodriguez 		if (list_empty(&sc->rx.rxbuf)) {
732203c4805SLuis R. Rodriguez 			sc->rx.rxlink = NULL;
733203c4805SLuis R. Rodriguez 			break;
734203c4805SLuis R. Rodriguez 		}
735203c4805SLuis R. Rodriguez 
736203c4805SLuis R. Rodriguez 		bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
737203c4805SLuis R. Rodriguez 		ds = bf->bf_desc;
738203c4805SLuis R. Rodriguez 
739203c4805SLuis R. Rodriguez 		/*
740203c4805SLuis R. Rodriguez 		 * Must provide the virtual address of the current
741203c4805SLuis R. Rodriguez 		 * descriptor, the physical address, and the virtual
742203c4805SLuis R. Rodriguez 		 * address of the next descriptor in the h/w chain.
743203c4805SLuis R. Rodriguez 		 * This allows the HAL to look ahead to see if the
744203c4805SLuis R. Rodriguez 		 * hardware is done with a descriptor by checking the
745203c4805SLuis R. Rodriguez 		 * done bit in the following descriptor and the address
746203c4805SLuis R. Rodriguez 		 * of the current descriptor the DMA engine is working
747203c4805SLuis R. Rodriguez 		 * on.  All this is necessary because of our use of
748203c4805SLuis R. Rodriguez 		 * a self-linked list to avoid rx overruns.
749203c4805SLuis R. Rodriguez 		 */
750203c4805SLuis R. Rodriguez 		retval = ath9k_hw_rxprocdesc(ah, ds,
751203c4805SLuis R. Rodriguez 					     bf->bf_daddr,
752203c4805SLuis R. Rodriguez 					     PA2DESC(sc, ds->ds_link),
753203c4805SLuis R. Rodriguez 					     0);
754203c4805SLuis R. Rodriguez 		if (retval == -EINPROGRESS) {
755203c4805SLuis R. Rodriguez 			struct ath_buf *tbf;
756203c4805SLuis R. Rodriguez 			struct ath_desc *tds;
757203c4805SLuis R. Rodriguez 
758203c4805SLuis R. Rodriguez 			if (list_is_last(&bf->list, &sc->rx.rxbuf)) {
759203c4805SLuis R. Rodriguez 				sc->rx.rxlink = NULL;
760203c4805SLuis R. Rodriguez 				break;
761203c4805SLuis R. Rodriguez 			}
762203c4805SLuis R. Rodriguez 
763203c4805SLuis R. Rodriguez 			tbf = list_entry(bf->list.next, struct ath_buf, list);
764203c4805SLuis R. Rodriguez 
765203c4805SLuis R. Rodriguez 			/*
766203c4805SLuis R. Rodriguez 			 * On some hardware the descriptor status words could
767203c4805SLuis R. Rodriguez 			 * get corrupted, including the done bit. Because of
768203c4805SLuis R. Rodriguez 			 * this, check if the next descriptor's done bit is
769203c4805SLuis R. Rodriguez 			 * set or not.
770203c4805SLuis R. Rodriguez 			 *
771203c4805SLuis R. Rodriguez 			 * If the next descriptor's done bit is set, the current
772203c4805SLuis R. Rodriguez 			 * descriptor has been corrupted. Force s/w to discard
773203c4805SLuis R. Rodriguez 			 * this descriptor and continue...
774203c4805SLuis R. Rodriguez 			 */
775203c4805SLuis R. Rodriguez 
776203c4805SLuis R. Rodriguez 			tds = tbf->bf_desc;
777203c4805SLuis R. Rodriguez 			retval = ath9k_hw_rxprocdesc(ah, tds, tbf->bf_daddr,
778203c4805SLuis R. Rodriguez 					     PA2DESC(sc, tds->ds_link), 0);
779203c4805SLuis R. Rodriguez 			if (retval == -EINPROGRESS) {
780203c4805SLuis R. Rodriguez 				break;
781203c4805SLuis R. Rodriguez 			}
782203c4805SLuis R. Rodriguez 		}
783203c4805SLuis R. Rodriguez 
784203c4805SLuis R. Rodriguez 		skb = bf->bf_mpdu;
785203c4805SLuis R. Rodriguez 		if (!skb)
786203c4805SLuis R. Rodriguez 			continue;
787203c4805SLuis R. Rodriguez 
788203c4805SLuis R. Rodriguez 		/*
789203c4805SLuis R. Rodriguez 		 * Synchronize the DMA transfer with CPU before
790203c4805SLuis R. Rodriguez 		 * 1. accessing the frame
791203c4805SLuis R. Rodriguez 		 * 2. requeueing the same buffer to h/w
792203c4805SLuis R. Rodriguez 		 */
793203c4805SLuis R. Rodriguez 		dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
794cc861f74SLuis R. Rodriguez 				common->rx_bufsize,
795203c4805SLuis R. Rodriguez 				DMA_FROM_DEVICE);
796203c4805SLuis R. Rodriguez 
797b4afffc0SLuis R. Rodriguez 		hdr = (struct ieee80211_hdr *) skb->data;
7985ca42627SLuis R. Rodriguez 		rxs =  IEEE80211_SKB_RXCB(skb);
7995ca42627SLuis R. Rodriguez 
800b4afffc0SLuis R. Rodriguez 		hw = ath_get_virt_hw(sc, hdr);
80126ab2645SLuis R. Rodriguez 		rx_stats = &ds->ds_rxstat;
802b4afffc0SLuis R. Rodriguez 
803203c4805SLuis R. Rodriguez 		/*
804203c4805SLuis R. Rodriguez 		 * If we're asked to flush receive queue, directly
805203c4805SLuis R. Rodriguez 		 * chain it back at the queue without processing it.
806203c4805SLuis R. Rodriguez 		 */
807203c4805SLuis R. Rodriguez 		if (flush)
808203c4805SLuis R. Rodriguez 			goto requeue;
809203c4805SLuis R. Rodriguez 
810*1e875e9fSLuis R. Rodriguez 		retval = ath9k_rx_skb_preprocess(common, hw, skb, rx_stats,
811*1e875e9fSLuis R. Rodriguez 						 rxs, &decrypt_error);
812*1e875e9fSLuis R. Rodriguez 		if (retval)
813203c4805SLuis R. Rodriguez 			goto requeue;
814203c4805SLuis R. Rodriguez 
815203c4805SLuis R. Rodriguez 		/* Ensure we always have an skb to requeue once we are done
816203c4805SLuis R. Rodriguez 		 * processing the current buffer's skb */
817cc861f74SLuis R. Rodriguez 		requeue_skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_ATOMIC);
818203c4805SLuis R. Rodriguez 
819203c4805SLuis R. Rodriguez 		/* If there is no memory we ignore the current RX'd frame,
820203c4805SLuis R. Rodriguez 		 * tell hardware it can give us a new frame using the old
821203c4805SLuis R. Rodriguez 		 * skb and put it at the tail of the sc->rx.rxbuf list for
822203c4805SLuis R. Rodriguez 		 * processing. */
823203c4805SLuis R. Rodriguez 		if (!requeue_skb)
824203c4805SLuis R. Rodriguez 			goto requeue;
825203c4805SLuis R. Rodriguez 
826203c4805SLuis R. Rodriguez 		/* Unmap the frame */
827203c4805SLuis R. Rodriguez 		dma_unmap_single(sc->dev, bf->bf_buf_addr,
828cc861f74SLuis R. Rodriguez 				 common->rx_bufsize,
829203c4805SLuis R. Rodriguez 				 DMA_FROM_DEVICE);
830203c4805SLuis R. Rodriguez 
83126ab2645SLuis R. Rodriguez 		skb_put(skb, rx_stats->rs_datalen);
832203c4805SLuis R. Rodriguez 
833203c4805SLuis R. Rodriguez 		/* see if any padding is done by the hw and remove it */
834203c4805SLuis R. Rodriguez 		hdrlen = ieee80211_get_hdrlen_from_skb(skb);
835203c4805SLuis R. Rodriguez 		fc = hdr->frame_control;
836203c4805SLuis R. Rodriguez 
837203c4805SLuis R. Rodriguez 		/* The MAC header is padded to have 32-bit boundary if the
838203c4805SLuis R. Rodriguez 		 * packet payload is non-zero. The general calculation for
839203c4805SLuis R. Rodriguez 		 * padsize would take into account odd header lengths:
840203c4805SLuis R. Rodriguez 		 * padsize = (4 - hdrlen % 4) % 4; However, since only
841203c4805SLuis R. Rodriguez 		 * even-length headers are used, padding can only be 0 or 2
842203c4805SLuis R. Rodriguez 		 * bytes and we can optimize this a bit. In addition, we must
843203c4805SLuis R. Rodriguez 		 * not try to remove padding from short control frames that do
844203c4805SLuis R. Rodriguez 		 * not have payload. */
845203c4805SLuis R. Rodriguez 		padsize = hdrlen & 3;
846203c4805SLuis R. Rodriguez 		if (padsize && hdrlen >= 24) {
847203c4805SLuis R. Rodriguez 			memmove(skb->data + padsize, skb->data, hdrlen);
848203c4805SLuis R. Rodriguez 			skb_pull(skb, padsize);
849203c4805SLuis R. Rodriguez 		}
850203c4805SLuis R. Rodriguez 
85126ab2645SLuis R. Rodriguez 		keyix = rx_stats->rs_keyix;
852203c4805SLuis R. Rodriguez 
853203c4805SLuis R. Rodriguez 		if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error) {
8545ca42627SLuis R. Rodriguez 			rxs->flag |= RX_FLAG_DECRYPTED;
8559d64a3cfSJouni Malinen 		} else if (ieee80211_has_protected(fc)
856203c4805SLuis R. Rodriguez 			   && !decrypt_error && skb->len >= hdrlen + 4) {
857203c4805SLuis R. Rodriguez 			keyix = skb->data[hdrlen + 3] >> 6;
858203c4805SLuis R. Rodriguez 
859203c4805SLuis R. Rodriguez 			if (test_bit(keyix, sc->keymap))
8605ca42627SLuis R. Rodriguez 				rxs->flag |= RX_FLAG_DECRYPTED;
861203c4805SLuis R. Rodriguez 		}
862203c4805SLuis R. Rodriguez 		if (ah->sw_mgmt_crypto &&
8635ca42627SLuis R. Rodriguez 		    (rxs->flag & RX_FLAG_DECRYPTED) &&
8645ca42627SLuis R. Rodriguez 		    ieee80211_is_mgmt(fc))
865203c4805SLuis R. Rodriguez 			/* Use software decrypt for management frames. */
8665ca42627SLuis R. Rodriguez 			rxs->flag &= ~RX_FLAG_DECRYPTED;
867203c4805SLuis R. Rodriguez 
868203c4805SLuis R. Rodriguez 		/* We will now give hardware our shiny new allocated skb */
869203c4805SLuis R. Rodriguez 		bf->bf_mpdu = requeue_skb;
870203c4805SLuis R. Rodriguez 		bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data,
871cc861f74SLuis R. Rodriguez 						 common->rx_bufsize,
872203c4805SLuis R. Rodriguez 						 DMA_FROM_DEVICE);
873203c4805SLuis R. Rodriguez 		if (unlikely(dma_mapping_error(sc->dev,
874203c4805SLuis R. Rodriguez 			  bf->bf_buf_addr))) {
875203c4805SLuis R. Rodriguez 			dev_kfree_skb_any(requeue_skb);
876203c4805SLuis R. Rodriguez 			bf->bf_mpdu = NULL;
877c46917bbSLuis R. Rodriguez 			ath_print(common, ATH_DBG_FATAL,
878203c4805SLuis R. Rodriguez 				  "dma_mapping_error() on RX\n");
8795ca42627SLuis R. Rodriguez 			ath_rx_send_to_mac80211(hw, sc, skb, rxs);
880203c4805SLuis R. Rodriguez 			break;
881203c4805SLuis R. Rodriguez 		}
882203c4805SLuis R. Rodriguez 		bf->bf_dmacontext = bf->bf_buf_addr;
883203c4805SLuis R. Rodriguez 
884203c4805SLuis R. Rodriguez 		/*
885203c4805SLuis R. Rodriguez 		 * change the default rx antenna if rx diversity chooses the
886203c4805SLuis R. Rodriguez 		 * other antenna 3 times in a row.
887203c4805SLuis R. Rodriguez 		 */
888203c4805SLuis R. Rodriguez 		if (sc->rx.defant != ds->ds_rxstat.rs_antenna) {
889203c4805SLuis R. Rodriguez 			if (++sc->rx.rxotherant >= 3)
89026ab2645SLuis R. Rodriguez 				ath_setdefantenna(sc, rx_stats->rs_antenna);
891203c4805SLuis R. Rodriguez 		} else {
892203c4805SLuis R. Rodriguez 			sc->rx.rxotherant = 0;
893203c4805SLuis R. Rodriguez 		}
894203c4805SLuis R. Rodriguez 
8959a23f9caSJouni Malinen 		if (unlikely(sc->sc_flags & (SC_OP_WAIT_FOR_BEACON |
896f0e9a860SGabor Juhos 					     SC_OP_WAIT_FOR_CAB |
8979a23f9caSJouni Malinen 					     SC_OP_WAIT_FOR_PSPOLL_DATA)))
898cc65965cSJouni Malinen 			ath_rx_ps(sc, skb);
899cc65965cSJouni Malinen 
9005ca42627SLuis R. Rodriguez 		ath_rx_send_to_mac80211(hw, sc, skb, rxs);
901cc65965cSJouni Malinen 
902203c4805SLuis R. Rodriguez requeue:
903203c4805SLuis R. Rodriguez 		list_move_tail(&bf->list, &sc->rx.rxbuf);
904203c4805SLuis R. Rodriguez 		ath_rx_buf_link(sc, bf);
905203c4805SLuis R. Rodriguez 	} while (1);
906203c4805SLuis R. Rodriguez 
907203c4805SLuis R. Rodriguez 	spin_unlock_bh(&sc->rx.rxbuflock);
908203c4805SLuis R. Rodriguez 
909203c4805SLuis R. Rodriguez 	return 0;
910203c4805SLuis R. Rodriguez #undef PA2DESC
911203c4805SLuis R. Rodriguez }
912