1 /* 2 * Copyright (c) 2008-2011 Atheros Communications Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #include <linux/nl80211.h> 18 #include <linux/delay.h> 19 #include "ath9k.h" 20 #include "btcoex.h" 21 22 static u8 parse_mpdudensity(u8 mpdudensity) 23 { 24 /* 25 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing": 26 * 0 for no restriction 27 * 1 for 1/4 us 28 * 2 for 1/2 us 29 * 3 for 1 us 30 * 4 for 2 us 31 * 5 for 4 us 32 * 6 for 8 us 33 * 7 for 16 us 34 */ 35 switch (mpdudensity) { 36 case 0: 37 return 0; 38 case 1: 39 case 2: 40 case 3: 41 /* Our lower layer calculations limit our precision to 42 1 microsecond */ 43 return 1; 44 case 4: 45 return 2; 46 case 5: 47 return 4; 48 case 6: 49 return 8; 50 case 7: 51 return 16; 52 default: 53 return 0; 54 } 55 } 56 57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq) 58 { 59 bool pending = false; 60 61 spin_lock_bh(&txq->axq_lock); 62 63 if (txq->axq_depth || !list_empty(&txq->axq_acq)) 64 pending = true; 65 66 spin_unlock_bh(&txq->axq_lock); 67 return pending; 68 } 69 70 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode) 71 { 72 unsigned long flags; 73 bool ret; 74 75 spin_lock_irqsave(&sc->sc_pm_lock, flags); 76 ret = ath9k_hw_setpower(sc->sc_ah, mode); 77 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 78 79 return ret; 80 } 81 82 void ath9k_ps_wakeup(struct ath_softc *sc) 83 { 84 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 85 unsigned long flags; 86 enum ath9k_power_mode power_mode; 87 88 spin_lock_irqsave(&sc->sc_pm_lock, flags); 89 if (++sc->ps_usecount != 1) 90 goto unlock; 91 92 power_mode = sc->sc_ah->power_mode; 93 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE); 94 95 /* 96 * While the hardware is asleep, the cycle counters contain no 97 * useful data. Better clear them now so that they don't mess up 98 * survey data results. 99 */ 100 if (power_mode != ATH9K_PM_AWAKE) { 101 spin_lock(&common->cc_lock); 102 ath_hw_cycle_counters_update(common); 103 memset(&common->cc_survey, 0, sizeof(common->cc_survey)); 104 spin_unlock(&common->cc_lock); 105 } 106 107 unlock: 108 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 109 } 110 111 void ath9k_ps_restore(struct ath_softc *sc) 112 { 113 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 114 unsigned long flags; 115 116 spin_lock_irqsave(&sc->sc_pm_lock, flags); 117 if (--sc->ps_usecount != 0) 118 goto unlock; 119 120 spin_lock(&common->cc_lock); 121 ath_hw_cycle_counters_update(common); 122 spin_unlock(&common->cc_lock); 123 124 if (sc->ps_idle) 125 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP); 126 else if (sc->ps_enabled && 127 !(sc->ps_flags & (PS_WAIT_FOR_BEACON | 128 PS_WAIT_FOR_CAB | 129 PS_WAIT_FOR_PSPOLL_DATA | 130 PS_WAIT_FOR_TX_ACK))) 131 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP); 132 133 unlock: 134 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 135 } 136 137 static void ath_start_ani(struct ath_common *common) 138 { 139 struct ath_hw *ah = common->ah; 140 unsigned long timestamp = jiffies_to_msecs(jiffies); 141 struct ath_softc *sc = (struct ath_softc *) common->priv; 142 143 if (!(sc->sc_flags & SC_OP_ANI_RUN)) 144 return; 145 146 if (sc->sc_flags & SC_OP_OFFCHANNEL) 147 return; 148 149 common->ani.longcal_timer = timestamp; 150 common->ani.shortcal_timer = timestamp; 151 common->ani.checkani_timer = timestamp; 152 153 mod_timer(&common->ani.timer, 154 jiffies + 155 msecs_to_jiffies((u32)ah->config.ani_poll_interval)); 156 } 157 158 static void ath_update_survey_nf(struct ath_softc *sc, int channel) 159 { 160 struct ath_hw *ah = sc->sc_ah; 161 struct ath9k_channel *chan = &ah->channels[channel]; 162 struct survey_info *survey = &sc->survey[channel]; 163 164 if (chan->noisefloor) { 165 survey->filled |= SURVEY_INFO_NOISE_DBM; 166 survey->noise = chan->noisefloor; 167 } 168 } 169 170 /* 171 * Updates the survey statistics and returns the busy time since last 172 * update in %, if the measurement duration was long enough for the 173 * result to be useful, -1 otherwise. 174 */ 175 static int ath_update_survey_stats(struct ath_softc *sc) 176 { 177 struct ath_hw *ah = sc->sc_ah; 178 struct ath_common *common = ath9k_hw_common(ah); 179 int pos = ah->curchan - &ah->channels[0]; 180 struct survey_info *survey = &sc->survey[pos]; 181 struct ath_cycle_counters *cc = &common->cc_survey; 182 unsigned int div = common->clockrate * 1000; 183 int ret = 0; 184 185 if (!ah->curchan) 186 return -1; 187 188 if (ah->power_mode == ATH9K_PM_AWAKE) 189 ath_hw_cycle_counters_update(common); 190 191 if (cc->cycles > 0) { 192 survey->filled |= SURVEY_INFO_CHANNEL_TIME | 193 SURVEY_INFO_CHANNEL_TIME_BUSY | 194 SURVEY_INFO_CHANNEL_TIME_RX | 195 SURVEY_INFO_CHANNEL_TIME_TX; 196 survey->channel_time += cc->cycles / div; 197 survey->channel_time_busy += cc->rx_busy / div; 198 survey->channel_time_rx += cc->rx_frame / div; 199 survey->channel_time_tx += cc->tx_frame / div; 200 } 201 202 if (cc->cycles < div) 203 return -1; 204 205 if (cc->cycles > 0) 206 ret = cc->rx_busy * 100 / cc->cycles; 207 208 memset(cc, 0, sizeof(*cc)); 209 210 ath_update_survey_nf(sc, pos); 211 212 return ret; 213 } 214 215 /* 216 * Set/change channels. If the channel is really being changed, it's done 217 * by reseting the chip. To accomplish this we must first cleanup any pending 218 * DMA, then restart stuff. 219 */ 220 static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw, 221 struct ath9k_channel *hchan) 222 { 223 struct ath_hw *ah = sc->sc_ah; 224 struct ath_common *common = ath9k_hw_common(ah); 225 struct ieee80211_conf *conf = &common->hw->conf; 226 bool fastcc = true, stopped; 227 struct ieee80211_channel *channel = hw->conf.channel; 228 struct ath9k_hw_cal_data *caldata = NULL; 229 int r; 230 231 if (sc->sc_flags & SC_OP_INVALID) 232 return -EIO; 233 234 sc->hw_busy_count = 0; 235 236 del_timer_sync(&common->ani.timer); 237 cancel_work_sync(&sc->paprd_work); 238 cancel_work_sync(&sc->hw_check_work); 239 cancel_delayed_work_sync(&sc->tx_complete_work); 240 cancel_delayed_work_sync(&sc->hw_pll_work); 241 242 ath9k_ps_wakeup(sc); 243 244 spin_lock_bh(&sc->sc_pcu_lock); 245 246 /* 247 * This is only performed if the channel settings have 248 * actually changed. 249 * 250 * To switch channels clear any pending DMA operations; 251 * wait long enough for the RX fifo to drain, reset the 252 * hardware at the new frequency, and then re-enable 253 * the relevant bits of the h/w. 254 */ 255 ath9k_hw_disable_interrupts(ah); 256 stopped = ath_drain_all_txq(sc, false); 257 258 if (!ath_stoprecv(sc)) 259 stopped = false; 260 261 if (!ath9k_hw_check_alive(ah)) 262 stopped = false; 263 264 /* XXX: do not flush receive queue here. We don't want 265 * to flush data frames already in queue because of 266 * changing channel. */ 267 268 if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL)) 269 fastcc = false; 270 271 if (!(sc->sc_flags & SC_OP_OFFCHANNEL)) 272 caldata = &sc->caldata; 273 274 ath_dbg(common, ATH_DBG_CONFIG, 275 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n", 276 sc->sc_ah->curchan->channel, 277 channel->center_freq, conf_is_ht40(conf), 278 fastcc); 279 280 r = ath9k_hw_reset(ah, hchan, caldata, fastcc); 281 if (r) { 282 ath_err(common, 283 "Unable to reset channel (%u MHz), reset status %d\n", 284 channel->center_freq, r); 285 goto ps_restore; 286 } 287 288 if (ath_startrecv(sc) != 0) { 289 ath_err(common, "Unable to restart recv logic\n"); 290 r = -EIO; 291 goto ps_restore; 292 } 293 294 ath9k_cmn_update_txpow(ah, sc->curtxpow, 295 sc->config.txpowlimit, &sc->curtxpow); 296 ath9k_hw_set_interrupts(ah, ah->imask); 297 298 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) { 299 if (sc->sc_flags & SC_OP_BEACONS) 300 ath_set_beacon(sc); 301 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0); 302 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2); 303 ath_start_ani(common); 304 } 305 306 ps_restore: 307 ieee80211_wake_queues(hw); 308 309 spin_unlock_bh(&sc->sc_pcu_lock); 310 311 ath9k_ps_restore(sc); 312 return r; 313 } 314 315 static void ath_paprd_activate(struct ath_softc *sc) 316 { 317 struct ath_hw *ah = sc->sc_ah; 318 struct ath9k_hw_cal_data *caldata = ah->caldata; 319 struct ath_common *common = ath9k_hw_common(ah); 320 int chain; 321 322 if (!caldata || !caldata->paprd_done) 323 return; 324 325 ath9k_ps_wakeup(sc); 326 ar9003_paprd_enable(ah, false); 327 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) { 328 if (!(common->tx_chainmask & BIT(chain))) 329 continue; 330 331 ar9003_paprd_populate_single_table(ah, caldata, chain); 332 } 333 334 ar9003_paprd_enable(ah, true); 335 ath9k_ps_restore(sc); 336 } 337 338 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain) 339 { 340 struct ieee80211_hw *hw = sc->hw; 341 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 342 struct ath_hw *ah = sc->sc_ah; 343 struct ath_common *common = ath9k_hw_common(ah); 344 struct ath_tx_control txctl; 345 int time_left; 346 347 memset(&txctl, 0, sizeof(txctl)); 348 txctl.txq = sc->tx.txq_map[WME_AC_BE]; 349 350 memset(tx_info, 0, sizeof(*tx_info)); 351 tx_info->band = hw->conf.channel->band; 352 tx_info->flags |= IEEE80211_TX_CTL_NO_ACK; 353 tx_info->control.rates[0].idx = 0; 354 tx_info->control.rates[0].count = 1; 355 tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS; 356 tx_info->control.rates[1].idx = -1; 357 358 init_completion(&sc->paprd_complete); 359 txctl.paprd = BIT(chain); 360 361 if (ath_tx_start(hw, skb, &txctl) != 0) { 362 ath_dbg(common, ATH_DBG_XMIT, "PAPRD TX failed\n"); 363 dev_kfree_skb_any(skb); 364 return false; 365 } 366 367 time_left = wait_for_completion_timeout(&sc->paprd_complete, 368 msecs_to_jiffies(ATH_PAPRD_TIMEOUT)); 369 370 if (!time_left) 371 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE, 372 "Timeout waiting for paprd training on TX chain %d\n", 373 chain); 374 375 return !!time_left; 376 } 377 378 void ath_paprd_calibrate(struct work_struct *work) 379 { 380 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work); 381 struct ieee80211_hw *hw = sc->hw; 382 struct ath_hw *ah = sc->sc_ah; 383 struct ieee80211_hdr *hdr; 384 struct sk_buff *skb = NULL; 385 struct ath9k_hw_cal_data *caldata = ah->caldata; 386 struct ath_common *common = ath9k_hw_common(ah); 387 int ftype; 388 int chain_ok = 0; 389 int chain; 390 int len = 1800; 391 392 if (!caldata) 393 return; 394 395 ath9k_ps_wakeup(sc); 396 397 if (ar9003_paprd_init_table(ah) < 0) 398 goto fail_paprd; 399 400 skb = alloc_skb(len, GFP_KERNEL); 401 if (!skb) 402 goto fail_paprd; 403 404 skb_put(skb, len); 405 memset(skb->data, 0, len); 406 hdr = (struct ieee80211_hdr *)skb->data; 407 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC; 408 hdr->frame_control = cpu_to_le16(ftype); 409 hdr->duration_id = cpu_to_le16(10); 410 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN); 411 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN); 412 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN); 413 414 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) { 415 if (!(common->tx_chainmask & BIT(chain))) 416 continue; 417 418 chain_ok = 0; 419 420 ath_dbg(common, ATH_DBG_CALIBRATE, 421 "Sending PAPRD frame for thermal measurement " 422 "on chain %d\n", chain); 423 if (!ath_paprd_send_frame(sc, skb, chain)) 424 goto fail_paprd; 425 426 ar9003_paprd_setup_gain_table(ah, chain); 427 428 ath_dbg(common, ATH_DBG_CALIBRATE, 429 "Sending PAPRD training frame on chain %d\n", chain); 430 if (!ath_paprd_send_frame(sc, skb, chain)) 431 goto fail_paprd; 432 433 if (!ar9003_paprd_is_done(ah)) 434 break; 435 436 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0) 437 break; 438 439 chain_ok = 1; 440 } 441 kfree_skb(skb); 442 443 if (chain_ok) { 444 caldata->paprd_done = true; 445 ath_paprd_activate(sc); 446 } 447 448 fail_paprd: 449 ath9k_ps_restore(sc); 450 } 451 452 /* 453 * This routine performs the periodic noise floor calibration function 454 * that is used to adjust and optimize the chip performance. This 455 * takes environmental changes (location, temperature) into account. 456 * When the task is complete, it reschedules itself depending on the 457 * appropriate interval that was calculated. 458 */ 459 void ath_ani_calibrate(unsigned long data) 460 { 461 struct ath_softc *sc = (struct ath_softc *)data; 462 struct ath_hw *ah = sc->sc_ah; 463 struct ath_common *common = ath9k_hw_common(ah); 464 bool longcal = false; 465 bool shortcal = false; 466 bool aniflag = false; 467 unsigned int timestamp = jiffies_to_msecs(jiffies); 468 u32 cal_interval, short_cal_interval, long_cal_interval; 469 unsigned long flags; 470 471 if (ah->caldata && ah->caldata->nfcal_interference) 472 long_cal_interval = ATH_LONG_CALINTERVAL_INT; 473 else 474 long_cal_interval = ATH_LONG_CALINTERVAL; 475 476 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ? 477 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL; 478 479 /* Only calibrate if awake */ 480 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE) 481 goto set_timer; 482 483 ath9k_ps_wakeup(sc); 484 485 /* Long calibration runs independently of short calibration. */ 486 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) { 487 longcal = true; 488 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies); 489 common->ani.longcal_timer = timestamp; 490 } 491 492 /* Short calibration applies only while caldone is false */ 493 if (!common->ani.caldone) { 494 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) { 495 shortcal = true; 496 ath_dbg(common, ATH_DBG_ANI, 497 "shortcal @%lu\n", jiffies); 498 common->ani.shortcal_timer = timestamp; 499 common->ani.resetcal_timer = timestamp; 500 } 501 } else { 502 if ((timestamp - common->ani.resetcal_timer) >= 503 ATH_RESTART_CALINTERVAL) { 504 common->ani.caldone = ath9k_hw_reset_calvalid(ah); 505 if (common->ani.caldone) 506 common->ani.resetcal_timer = timestamp; 507 } 508 } 509 510 /* Verify whether we must check ANI */ 511 if ((timestamp - common->ani.checkani_timer) >= 512 ah->config.ani_poll_interval) { 513 aniflag = true; 514 common->ani.checkani_timer = timestamp; 515 } 516 517 /* Call ANI routine if necessary */ 518 if (aniflag) { 519 spin_lock_irqsave(&common->cc_lock, flags); 520 ath9k_hw_ani_monitor(ah, ah->curchan); 521 ath_update_survey_stats(sc); 522 spin_unlock_irqrestore(&common->cc_lock, flags); 523 } 524 525 /* Perform calibration if necessary */ 526 if (longcal || shortcal) { 527 common->ani.caldone = 528 ath9k_hw_calibrate(ah, ah->curchan, 529 common->rx_chainmask, longcal); 530 } 531 532 ath9k_ps_restore(sc); 533 534 set_timer: 535 /* 536 * Set timer interval based on previous results. 537 * The interval must be the shortest necessary to satisfy ANI, 538 * short calibration and long calibration. 539 */ 540 cal_interval = ATH_LONG_CALINTERVAL; 541 if (sc->sc_ah->config.enable_ani) 542 cal_interval = min(cal_interval, 543 (u32)ah->config.ani_poll_interval); 544 if (!common->ani.caldone) 545 cal_interval = min(cal_interval, (u32)short_cal_interval); 546 547 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval)); 548 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) { 549 if (!ah->caldata->paprd_done) 550 ieee80211_queue_work(sc->hw, &sc->paprd_work); 551 else if (!ah->paprd_table_write_done) 552 ath_paprd_activate(sc); 553 } 554 } 555 556 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta) 557 { 558 struct ath_node *an; 559 struct ath_hw *ah = sc->sc_ah; 560 an = (struct ath_node *)sta->drv_priv; 561 562 #ifdef CONFIG_ATH9K_DEBUGFS 563 spin_lock(&sc->nodes_lock); 564 list_add(&an->list, &sc->nodes); 565 spin_unlock(&sc->nodes_lock); 566 an->sta = sta; 567 #endif 568 if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM) 569 sc->sc_flags |= SC_OP_ENABLE_APM; 570 571 if (sc->sc_flags & SC_OP_TXAGGR) { 572 ath_tx_node_init(sc, an); 573 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR + 574 sta->ht_cap.ampdu_factor); 575 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density); 576 } 577 } 578 579 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta) 580 { 581 struct ath_node *an = (struct ath_node *)sta->drv_priv; 582 583 #ifdef CONFIG_ATH9K_DEBUGFS 584 spin_lock(&sc->nodes_lock); 585 list_del(&an->list); 586 spin_unlock(&sc->nodes_lock); 587 an->sta = NULL; 588 #endif 589 590 if (sc->sc_flags & SC_OP_TXAGGR) 591 ath_tx_node_cleanup(sc, an); 592 } 593 594 void ath_hw_check(struct work_struct *work) 595 { 596 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work); 597 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 598 unsigned long flags; 599 int busy; 600 601 ath9k_ps_wakeup(sc); 602 if (ath9k_hw_check_alive(sc->sc_ah)) 603 goto out; 604 605 spin_lock_irqsave(&common->cc_lock, flags); 606 busy = ath_update_survey_stats(sc); 607 spin_unlock_irqrestore(&common->cc_lock, flags); 608 609 ath_dbg(common, ATH_DBG_RESET, "Possible baseband hang, " 610 "busy=%d (try %d)\n", busy, sc->hw_busy_count + 1); 611 if (busy >= 99) { 612 if (++sc->hw_busy_count >= 3) 613 ath_reset(sc, true); 614 } else if (busy >= 0) 615 sc->hw_busy_count = 0; 616 617 out: 618 ath9k_ps_restore(sc); 619 } 620 621 static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum) 622 { 623 static int count; 624 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 625 626 if (pll_sqsum >= 0x40000) { 627 count++; 628 if (count == 3) { 629 /* Rx is hung for more than 500ms. Reset it */ 630 ath_dbg(common, ATH_DBG_RESET, 631 "Possible RX hang, resetting"); 632 ath_reset(sc, true); 633 count = 0; 634 } 635 } else 636 count = 0; 637 } 638 639 void ath_hw_pll_work(struct work_struct *work) 640 { 641 struct ath_softc *sc = container_of(work, struct ath_softc, 642 hw_pll_work.work); 643 u32 pll_sqsum; 644 645 if (AR_SREV_9485(sc->sc_ah)) { 646 647 ath9k_ps_wakeup(sc); 648 pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah); 649 ath9k_ps_restore(sc); 650 651 ath_hw_pll_rx_hang_check(sc, pll_sqsum); 652 653 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5); 654 } 655 } 656 657 658 void ath9k_tasklet(unsigned long data) 659 { 660 struct ath_softc *sc = (struct ath_softc *)data; 661 struct ath_hw *ah = sc->sc_ah; 662 struct ath_common *common = ath9k_hw_common(ah); 663 664 u32 status = sc->intrstatus; 665 u32 rxmask; 666 667 if ((status & ATH9K_INT_FATAL) || 668 (status & ATH9K_INT_BB_WATCHDOG)) { 669 ath_reset(sc, true); 670 return; 671 } 672 673 ath9k_ps_wakeup(sc); 674 spin_lock(&sc->sc_pcu_lock); 675 676 /* 677 * Only run the baseband hang check if beacons stop working in AP or 678 * IBSS mode, because it has a high false positive rate. For station 679 * mode it should not be necessary, since the upper layers will detect 680 * this through a beacon miss automatically and the following channel 681 * change will trigger a hardware reset anyway 682 */ 683 if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 && 684 !ath9k_hw_check_alive(ah)) 685 ieee80211_queue_work(sc->hw, &sc->hw_check_work); 686 687 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) { 688 /* 689 * TSF sync does not look correct; remain awake to sync with 690 * the next Beacon. 691 */ 692 ath_dbg(common, ATH_DBG_PS, 693 "TSFOOR - Sync with next Beacon\n"); 694 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC | 695 PS_TSFOOR_SYNC; 696 } 697 698 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) 699 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL | 700 ATH9K_INT_RXORN); 701 else 702 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN); 703 704 if (status & rxmask) { 705 /* Check for high priority Rx first */ 706 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) && 707 (status & ATH9K_INT_RXHP)) 708 ath_rx_tasklet(sc, 0, true); 709 710 ath_rx_tasklet(sc, 0, false); 711 } 712 713 if (status & ATH9K_INT_TX) { 714 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) 715 ath_tx_edma_tasklet(sc); 716 else 717 ath_tx_tasklet(sc); 718 } 719 720 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE) 721 if (status & ATH9K_INT_GENTIMER) 722 ath_gen_timer_isr(sc->sc_ah); 723 724 /* re-enable hardware interrupt */ 725 ath9k_hw_enable_interrupts(ah); 726 727 spin_unlock(&sc->sc_pcu_lock); 728 ath9k_ps_restore(sc); 729 } 730 731 irqreturn_t ath_isr(int irq, void *dev) 732 { 733 #define SCHED_INTR ( \ 734 ATH9K_INT_FATAL | \ 735 ATH9K_INT_BB_WATCHDOG | \ 736 ATH9K_INT_RXORN | \ 737 ATH9K_INT_RXEOL | \ 738 ATH9K_INT_RX | \ 739 ATH9K_INT_RXLP | \ 740 ATH9K_INT_RXHP | \ 741 ATH9K_INT_TX | \ 742 ATH9K_INT_BMISS | \ 743 ATH9K_INT_CST | \ 744 ATH9K_INT_TSFOOR | \ 745 ATH9K_INT_GENTIMER) 746 747 struct ath_softc *sc = dev; 748 struct ath_hw *ah = sc->sc_ah; 749 struct ath_common *common = ath9k_hw_common(ah); 750 enum ath9k_int status; 751 bool sched = false; 752 753 /* 754 * The hardware is not ready/present, don't 755 * touch anything. Note this can happen early 756 * on if the IRQ is shared. 757 */ 758 if (sc->sc_flags & SC_OP_INVALID) 759 return IRQ_NONE; 760 761 762 /* shared irq, not for us */ 763 764 if (!ath9k_hw_intrpend(ah)) 765 return IRQ_NONE; 766 767 /* 768 * Figure out the reason(s) for the interrupt. Note 769 * that the hal returns a pseudo-ISR that may include 770 * bits we haven't explicitly enabled so we mask the 771 * value to insure we only process bits we requested. 772 */ 773 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */ 774 status &= ah->imask; /* discard unasked-for bits */ 775 776 /* 777 * If there are no status bits set, then this interrupt was not 778 * for me (should have been caught above). 779 */ 780 if (!status) 781 return IRQ_NONE; 782 783 /* Cache the status */ 784 sc->intrstatus = status; 785 786 if (status & SCHED_INTR) 787 sched = true; 788 789 /* 790 * If a FATAL or RXORN interrupt is received, we have to reset the 791 * chip immediately. 792 */ 793 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) && 794 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA))) 795 goto chip_reset; 796 797 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) && 798 (status & ATH9K_INT_BB_WATCHDOG)) { 799 800 spin_lock(&common->cc_lock); 801 ath_hw_cycle_counters_update(common); 802 ar9003_hw_bb_watchdog_dbg_info(ah); 803 spin_unlock(&common->cc_lock); 804 805 goto chip_reset; 806 } 807 808 if (status & ATH9K_INT_SWBA) 809 tasklet_schedule(&sc->bcon_tasklet); 810 811 if (status & ATH9K_INT_TXURN) 812 ath9k_hw_updatetxtriglevel(ah, true); 813 814 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) { 815 if (status & ATH9K_INT_RXEOL) { 816 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN); 817 ath9k_hw_set_interrupts(ah, ah->imask); 818 } 819 } 820 821 if (status & ATH9K_INT_MIB) { 822 /* 823 * Disable interrupts until we service the MIB 824 * interrupt; otherwise it will continue to 825 * fire. 826 */ 827 ath9k_hw_disable_interrupts(ah); 828 /* 829 * Let the hal handle the event. We assume 830 * it will clear whatever condition caused 831 * the interrupt. 832 */ 833 spin_lock(&common->cc_lock); 834 ath9k_hw_proc_mib_event(ah); 835 spin_unlock(&common->cc_lock); 836 ath9k_hw_enable_interrupts(ah); 837 } 838 839 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) 840 if (status & ATH9K_INT_TIM_TIMER) { 841 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle)) 842 goto chip_reset; 843 /* Clear RxAbort bit so that we can 844 * receive frames */ 845 ath9k_setpower(sc, ATH9K_PM_AWAKE); 846 ath9k_hw_setrxabort(sc->sc_ah, 0); 847 sc->ps_flags |= PS_WAIT_FOR_BEACON; 848 } 849 850 chip_reset: 851 852 ath_debug_stat_interrupt(sc, status); 853 854 if (sched) { 855 /* turn off every interrupt */ 856 ath9k_hw_disable_interrupts(ah); 857 tasklet_schedule(&sc->intr_tq); 858 } 859 860 return IRQ_HANDLED; 861 862 #undef SCHED_INTR 863 } 864 865 static void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw) 866 { 867 struct ath_hw *ah = sc->sc_ah; 868 struct ath_common *common = ath9k_hw_common(ah); 869 struct ieee80211_channel *channel = hw->conf.channel; 870 int r; 871 872 ath9k_ps_wakeup(sc); 873 spin_lock_bh(&sc->sc_pcu_lock); 874 875 ath9k_hw_configpcipowersave(ah, 0, 0); 876 877 if (!ah->curchan) 878 ah->curchan = ath9k_cmn_get_curchannel(sc->hw, ah); 879 880 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false); 881 if (r) { 882 ath_err(common, 883 "Unable to reset channel (%u MHz), reset status %d\n", 884 channel->center_freq, r); 885 } 886 887 ath9k_cmn_update_txpow(ah, sc->curtxpow, 888 sc->config.txpowlimit, &sc->curtxpow); 889 if (ath_startrecv(sc) != 0) { 890 ath_err(common, "Unable to restart recv logic\n"); 891 goto out; 892 } 893 if (sc->sc_flags & SC_OP_BEACONS) 894 ath_set_beacon(sc); /* restart beacons */ 895 896 /* Re-Enable interrupts */ 897 ath9k_hw_set_interrupts(ah, ah->imask); 898 899 /* Enable LED */ 900 ath9k_hw_cfg_output(ah, ah->led_pin, 901 AR_GPIO_OUTPUT_MUX_AS_OUTPUT); 902 ath9k_hw_set_gpio(ah, ah->led_pin, 0); 903 904 ieee80211_wake_queues(hw); 905 ieee80211_queue_delayed_work(hw, &sc->hw_pll_work, HZ/2); 906 907 out: 908 spin_unlock_bh(&sc->sc_pcu_lock); 909 910 ath9k_ps_restore(sc); 911 } 912 913 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw) 914 { 915 struct ath_hw *ah = sc->sc_ah; 916 struct ieee80211_channel *channel = hw->conf.channel; 917 int r; 918 919 ath9k_ps_wakeup(sc); 920 cancel_delayed_work_sync(&sc->hw_pll_work); 921 922 spin_lock_bh(&sc->sc_pcu_lock); 923 924 ieee80211_stop_queues(hw); 925 926 /* 927 * Keep the LED on when the radio is disabled 928 * during idle unassociated state. 929 */ 930 if (!sc->ps_idle) { 931 ath9k_hw_set_gpio(ah, ah->led_pin, 1); 932 ath9k_hw_cfg_gpio_input(ah, ah->led_pin); 933 } 934 935 /* Disable interrupts */ 936 ath9k_hw_disable_interrupts(ah); 937 938 ath_drain_all_txq(sc, false); /* clear pending tx frames */ 939 940 ath_stoprecv(sc); /* turn off frame recv */ 941 ath_flushrecv(sc); /* flush recv queue */ 942 943 if (!ah->curchan) 944 ah->curchan = ath9k_cmn_get_curchannel(hw, ah); 945 946 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false); 947 if (r) { 948 ath_err(ath9k_hw_common(sc->sc_ah), 949 "Unable to reset channel (%u MHz), reset status %d\n", 950 channel->center_freq, r); 951 } 952 953 ath9k_hw_phy_disable(ah); 954 955 ath9k_hw_configpcipowersave(ah, 1, 1); 956 957 spin_unlock_bh(&sc->sc_pcu_lock); 958 ath9k_ps_restore(sc); 959 } 960 961 int ath_reset(struct ath_softc *sc, bool retry_tx) 962 { 963 struct ath_hw *ah = sc->sc_ah; 964 struct ath_common *common = ath9k_hw_common(ah); 965 struct ieee80211_hw *hw = sc->hw; 966 int r; 967 968 sc->hw_busy_count = 0; 969 970 /* Stop ANI */ 971 del_timer_sync(&common->ani.timer); 972 973 ath9k_ps_wakeup(sc); 974 spin_lock_bh(&sc->sc_pcu_lock); 975 976 ieee80211_stop_queues(hw); 977 978 ath9k_hw_disable_interrupts(ah); 979 ath_drain_all_txq(sc, retry_tx); 980 981 ath_stoprecv(sc); 982 ath_flushrecv(sc); 983 984 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false); 985 if (r) 986 ath_err(common, 987 "Unable to reset hardware; reset status %d\n", r); 988 989 if (ath_startrecv(sc) != 0) 990 ath_err(common, "Unable to start recv logic\n"); 991 992 /* 993 * We may be doing a reset in response to a request 994 * that changes the channel so update any state that 995 * might change as a result. 996 */ 997 ath9k_cmn_update_txpow(ah, sc->curtxpow, 998 sc->config.txpowlimit, &sc->curtxpow); 999 1000 if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL))) 1001 ath_set_beacon(sc); /* restart beacons */ 1002 1003 ath9k_hw_set_interrupts(ah, ah->imask); 1004 1005 if (retry_tx) { 1006 int i; 1007 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) { 1008 if (ATH_TXQ_SETUP(sc, i)) { 1009 spin_lock_bh(&sc->tx.txq[i].axq_lock); 1010 ath_txq_schedule(sc, &sc->tx.txq[i]); 1011 spin_unlock_bh(&sc->tx.txq[i].axq_lock); 1012 } 1013 } 1014 } 1015 1016 ieee80211_wake_queues(hw); 1017 spin_unlock_bh(&sc->sc_pcu_lock); 1018 1019 /* Start ANI */ 1020 ath_start_ani(common); 1021 ath9k_ps_restore(sc); 1022 1023 return r; 1024 } 1025 1026 /**********************/ 1027 /* mac80211 callbacks */ 1028 /**********************/ 1029 1030 static int ath9k_start(struct ieee80211_hw *hw) 1031 { 1032 struct ath_softc *sc = hw->priv; 1033 struct ath_hw *ah = sc->sc_ah; 1034 struct ath_common *common = ath9k_hw_common(ah); 1035 struct ieee80211_channel *curchan = hw->conf.channel; 1036 struct ath9k_channel *init_channel; 1037 int r; 1038 1039 ath_dbg(common, ATH_DBG_CONFIG, 1040 "Starting driver with initial channel: %d MHz\n", 1041 curchan->center_freq); 1042 1043 ath9k_ps_wakeup(sc); 1044 1045 mutex_lock(&sc->mutex); 1046 1047 /* setup initial channel */ 1048 sc->chan_idx = curchan->hw_value; 1049 1050 init_channel = ath9k_cmn_get_curchannel(hw, ah); 1051 1052 /* Reset SERDES registers */ 1053 ath9k_hw_configpcipowersave(ah, 0, 0); 1054 1055 /* 1056 * The basic interface to setting the hardware in a good 1057 * state is ``reset''. On return the hardware is known to 1058 * be powered up and with interrupts disabled. This must 1059 * be followed by initialization of the appropriate bits 1060 * and then setup of the interrupt mask. 1061 */ 1062 spin_lock_bh(&sc->sc_pcu_lock); 1063 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false); 1064 if (r) { 1065 ath_err(common, 1066 "Unable to reset hardware; reset status %d (freq %u MHz)\n", 1067 r, curchan->center_freq); 1068 spin_unlock_bh(&sc->sc_pcu_lock); 1069 goto mutex_unlock; 1070 } 1071 1072 /* 1073 * This is needed only to setup initial state 1074 * but it's best done after a reset. 1075 */ 1076 ath9k_cmn_update_txpow(ah, sc->curtxpow, 1077 sc->config.txpowlimit, &sc->curtxpow); 1078 1079 /* 1080 * Setup the hardware after reset: 1081 * The receive engine is set going. 1082 * Frame transmit is handled entirely 1083 * in the frame output path; there's nothing to do 1084 * here except setup the interrupt mask. 1085 */ 1086 if (ath_startrecv(sc) != 0) { 1087 ath_err(common, "Unable to start recv logic\n"); 1088 r = -EIO; 1089 spin_unlock_bh(&sc->sc_pcu_lock); 1090 goto mutex_unlock; 1091 } 1092 spin_unlock_bh(&sc->sc_pcu_lock); 1093 1094 /* Setup our intr mask. */ 1095 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL | 1096 ATH9K_INT_RXORN | ATH9K_INT_FATAL | 1097 ATH9K_INT_GLOBAL; 1098 1099 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) 1100 ah->imask |= ATH9K_INT_RXHP | 1101 ATH9K_INT_RXLP | 1102 ATH9K_INT_BB_WATCHDOG; 1103 else 1104 ah->imask |= ATH9K_INT_RX; 1105 1106 ah->imask |= ATH9K_INT_GTT; 1107 1108 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT) 1109 ah->imask |= ATH9K_INT_CST; 1110 1111 sc->sc_flags &= ~SC_OP_INVALID; 1112 sc->sc_ah->is_monitoring = false; 1113 1114 /* Disable BMISS interrupt when we're not associated */ 1115 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS); 1116 ath9k_hw_set_interrupts(ah, ah->imask); 1117 1118 ieee80211_wake_queues(hw); 1119 1120 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0); 1121 1122 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) && 1123 !ah->btcoex_hw.enabled) { 1124 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT, 1125 AR_STOMP_LOW_WLAN_WGHT); 1126 ath9k_hw_btcoex_enable(ah); 1127 1128 if (common->bus_ops->bt_coex_prep) 1129 common->bus_ops->bt_coex_prep(common); 1130 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE) 1131 ath9k_btcoex_timer_resume(sc); 1132 } 1133 1134 if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en) 1135 common->bus_ops->extn_synch_en(common); 1136 1137 mutex_unlock: 1138 mutex_unlock(&sc->mutex); 1139 1140 ath9k_ps_restore(sc); 1141 1142 return r; 1143 } 1144 1145 static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb) 1146 { 1147 struct ath_softc *sc = hw->priv; 1148 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1149 struct ath_tx_control txctl; 1150 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data; 1151 1152 if (sc->ps_enabled) { 1153 /* 1154 * mac80211 does not set PM field for normal data frames, so we 1155 * need to update that based on the current PS mode. 1156 */ 1157 if (ieee80211_is_data(hdr->frame_control) && 1158 !ieee80211_is_nullfunc(hdr->frame_control) && 1159 !ieee80211_has_pm(hdr->frame_control)) { 1160 ath_dbg(common, ATH_DBG_PS, 1161 "Add PM=1 for a TX frame while in PS mode\n"); 1162 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM); 1163 } 1164 } 1165 1166 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) { 1167 /* 1168 * We are using PS-Poll and mac80211 can request TX while in 1169 * power save mode. Need to wake up hardware for the TX to be 1170 * completed and if needed, also for RX of buffered frames. 1171 */ 1172 ath9k_ps_wakeup(sc); 1173 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) 1174 ath9k_hw_setrxabort(sc->sc_ah, 0); 1175 if (ieee80211_is_pspoll(hdr->frame_control)) { 1176 ath_dbg(common, ATH_DBG_PS, 1177 "Sending PS-Poll to pick a buffered frame\n"); 1178 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA; 1179 } else { 1180 ath_dbg(common, ATH_DBG_PS, 1181 "Wake up to complete TX\n"); 1182 sc->ps_flags |= PS_WAIT_FOR_TX_ACK; 1183 } 1184 /* 1185 * The actual restore operation will happen only after 1186 * the sc_flags bit is cleared. We are just dropping 1187 * the ps_usecount here. 1188 */ 1189 ath9k_ps_restore(sc); 1190 } 1191 1192 memset(&txctl, 0, sizeof(struct ath_tx_control)); 1193 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)]; 1194 1195 ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb); 1196 1197 if (ath_tx_start(hw, skb, &txctl) != 0) { 1198 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n"); 1199 goto exit; 1200 } 1201 1202 return; 1203 exit: 1204 dev_kfree_skb_any(skb); 1205 } 1206 1207 static void ath9k_stop(struct ieee80211_hw *hw) 1208 { 1209 struct ath_softc *sc = hw->priv; 1210 struct ath_hw *ah = sc->sc_ah; 1211 struct ath_common *common = ath9k_hw_common(ah); 1212 1213 mutex_lock(&sc->mutex); 1214 1215 cancel_delayed_work_sync(&sc->tx_complete_work); 1216 cancel_delayed_work_sync(&sc->hw_pll_work); 1217 cancel_work_sync(&sc->paprd_work); 1218 cancel_work_sync(&sc->hw_check_work); 1219 1220 if (sc->sc_flags & SC_OP_INVALID) { 1221 ath_dbg(common, ATH_DBG_ANY, "Device not present\n"); 1222 mutex_unlock(&sc->mutex); 1223 return; 1224 } 1225 1226 /* Ensure HW is awake when we try to shut it down. */ 1227 ath9k_ps_wakeup(sc); 1228 1229 if (ah->btcoex_hw.enabled) { 1230 ath9k_hw_btcoex_disable(ah); 1231 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE) 1232 ath9k_btcoex_timer_pause(sc); 1233 } 1234 1235 spin_lock_bh(&sc->sc_pcu_lock); 1236 1237 /* prevent tasklets to enable interrupts once we disable them */ 1238 ah->imask &= ~ATH9K_INT_GLOBAL; 1239 1240 /* make sure h/w will not generate any interrupt 1241 * before setting the invalid flag. */ 1242 ath9k_hw_disable_interrupts(ah); 1243 1244 if (!(sc->sc_flags & SC_OP_INVALID)) { 1245 ath_drain_all_txq(sc, false); 1246 ath_stoprecv(sc); 1247 ath9k_hw_phy_disable(ah); 1248 } else 1249 sc->rx.rxlink = NULL; 1250 1251 if (sc->rx.frag) { 1252 dev_kfree_skb_any(sc->rx.frag); 1253 sc->rx.frag = NULL; 1254 } 1255 1256 /* disable HAL and put h/w to sleep */ 1257 ath9k_hw_disable(ah); 1258 ath9k_hw_configpcipowersave(ah, 1, 1); 1259 1260 spin_unlock_bh(&sc->sc_pcu_lock); 1261 1262 /* we can now sync irq and kill any running tasklets, since we already 1263 * disabled interrupts and not holding a spin lock */ 1264 synchronize_irq(sc->irq); 1265 tasklet_kill(&sc->intr_tq); 1266 tasklet_kill(&sc->bcon_tasklet); 1267 1268 ath9k_ps_restore(sc); 1269 1270 sc->ps_idle = true; 1271 ath_radio_disable(sc, hw); 1272 1273 sc->sc_flags |= SC_OP_INVALID; 1274 1275 mutex_unlock(&sc->mutex); 1276 1277 ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n"); 1278 } 1279 1280 bool ath9k_uses_beacons(int type) 1281 { 1282 switch (type) { 1283 case NL80211_IFTYPE_AP: 1284 case NL80211_IFTYPE_ADHOC: 1285 case NL80211_IFTYPE_MESH_POINT: 1286 return true; 1287 default: 1288 return false; 1289 } 1290 } 1291 1292 static void ath9k_reclaim_beacon(struct ath_softc *sc, 1293 struct ieee80211_vif *vif) 1294 { 1295 struct ath_vif *avp = (void *)vif->drv_priv; 1296 1297 ath9k_set_beaconing_status(sc, false); 1298 ath_beacon_return(sc, avp); 1299 ath9k_set_beaconing_status(sc, true); 1300 sc->sc_flags &= ~SC_OP_BEACONS; 1301 } 1302 1303 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif) 1304 { 1305 struct ath9k_vif_iter_data *iter_data = data; 1306 int i; 1307 1308 if (iter_data->hw_macaddr) 1309 for (i = 0; i < ETH_ALEN; i++) 1310 iter_data->mask[i] &= 1311 ~(iter_data->hw_macaddr[i] ^ mac[i]); 1312 1313 switch (vif->type) { 1314 case NL80211_IFTYPE_AP: 1315 iter_data->naps++; 1316 break; 1317 case NL80211_IFTYPE_STATION: 1318 iter_data->nstations++; 1319 break; 1320 case NL80211_IFTYPE_ADHOC: 1321 iter_data->nadhocs++; 1322 break; 1323 case NL80211_IFTYPE_MESH_POINT: 1324 iter_data->nmeshes++; 1325 break; 1326 case NL80211_IFTYPE_WDS: 1327 iter_data->nwds++; 1328 break; 1329 default: 1330 iter_data->nothers++; 1331 break; 1332 } 1333 } 1334 1335 /* Called with sc->mutex held. */ 1336 void ath9k_calculate_iter_data(struct ieee80211_hw *hw, 1337 struct ieee80211_vif *vif, 1338 struct ath9k_vif_iter_data *iter_data) 1339 { 1340 struct ath_softc *sc = hw->priv; 1341 struct ath_hw *ah = sc->sc_ah; 1342 struct ath_common *common = ath9k_hw_common(ah); 1343 1344 /* 1345 * Use the hardware MAC address as reference, the hardware uses it 1346 * together with the BSSID mask when matching addresses. 1347 */ 1348 memset(iter_data, 0, sizeof(*iter_data)); 1349 iter_data->hw_macaddr = common->macaddr; 1350 memset(&iter_data->mask, 0xff, ETH_ALEN); 1351 1352 if (vif) 1353 ath9k_vif_iter(iter_data, vif->addr, vif); 1354 1355 /* Get list of all active MAC addresses */ 1356 ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter, 1357 iter_data); 1358 } 1359 1360 /* Called with sc->mutex held. */ 1361 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw, 1362 struct ieee80211_vif *vif) 1363 { 1364 struct ath_softc *sc = hw->priv; 1365 struct ath_hw *ah = sc->sc_ah; 1366 struct ath_common *common = ath9k_hw_common(ah); 1367 struct ath9k_vif_iter_data iter_data; 1368 1369 ath9k_calculate_iter_data(hw, vif, &iter_data); 1370 1371 /* Set BSSID mask. */ 1372 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN); 1373 ath_hw_setbssidmask(common); 1374 1375 /* Set op-mode & TSF */ 1376 if (iter_data.naps > 0) { 1377 ath9k_hw_set_tsfadjust(ah, 1); 1378 sc->sc_flags |= SC_OP_TSF_RESET; 1379 ah->opmode = NL80211_IFTYPE_AP; 1380 } else { 1381 ath9k_hw_set_tsfadjust(ah, 0); 1382 sc->sc_flags &= ~SC_OP_TSF_RESET; 1383 1384 if (iter_data.nmeshes) 1385 ah->opmode = NL80211_IFTYPE_MESH_POINT; 1386 else if (iter_data.nwds) 1387 ah->opmode = NL80211_IFTYPE_AP; 1388 else if (iter_data.nadhocs) 1389 ah->opmode = NL80211_IFTYPE_ADHOC; 1390 else 1391 ah->opmode = NL80211_IFTYPE_STATION; 1392 } 1393 1394 /* 1395 * Enable MIB interrupts when there are hardware phy counters. 1396 */ 1397 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) { 1398 if (ah->config.enable_ani) 1399 ah->imask |= ATH9K_INT_MIB; 1400 ah->imask |= ATH9K_INT_TSFOOR; 1401 } else { 1402 ah->imask &= ~ATH9K_INT_MIB; 1403 ah->imask &= ~ATH9K_INT_TSFOOR; 1404 } 1405 1406 ath9k_hw_set_interrupts(ah, ah->imask); 1407 1408 /* Set up ANI */ 1409 if (iter_data.naps > 0) { 1410 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER; 1411 sc->sc_flags |= SC_OP_ANI_RUN; 1412 ath_start_ani(common); 1413 } else { 1414 sc->sc_flags &= ~SC_OP_ANI_RUN; 1415 del_timer_sync(&common->ani.timer); 1416 } 1417 } 1418 1419 /* Called with sc->mutex held, vif counts set up properly. */ 1420 static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw, 1421 struct ieee80211_vif *vif) 1422 { 1423 struct ath_softc *sc = hw->priv; 1424 1425 ath9k_calculate_summary_state(hw, vif); 1426 1427 if (ath9k_uses_beacons(vif->type)) { 1428 int error; 1429 /* This may fail because upper levels do not have beacons 1430 * properly configured yet. That's OK, we assume it 1431 * will be properly configured and then we will be notified 1432 * in the info_changed method and set up beacons properly 1433 * there. 1434 */ 1435 ath9k_set_beaconing_status(sc, false); 1436 error = ath_beacon_alloc(sc, vif); 1437 if (!error) 1438 ath_beacon_config(sc, vif); 1439 ath9k_set_beaconing_status(sc, true); 1440 } 1441 } 1442 1443 1444 static int ath9k_add_interface(struct ieee80211_hw *hw, 1445 struct ieee80211_vif *vif) 1446 { 1447 struct ath_softc *sc = hw->priv; 1448 struct ath_hw *ah = sc->sc_ah; 1449 struct ath_common *common = ath9k_hw_common(ah); 1450 int ret = 0; 1451 1452 ath9k_ps_wakeup(sc); 1453 mutex_lock(&sc->mutex); 1454 1455 switch (vif->type) { 1456 case NL80211_IFTYPE_STATION: 1457 case NL80211_IFTYPE_WDS: 1458 case NL80211_IFTYPE_ADHOC: 1459 case NL80211_IFTYPE_AP: 1460 case NL80211_IFTYPE_MESH_POINT: 1461 break; 1462 default: 1463 ath_err(common, "Interface type %d not yet supported\n", 1464 vif->type); 1465 ret = -EOPNOTSUPP; 1466 goto out; 1467 } 1468 1469 if (ath9k_uses_beacons(vif->type)) { 1470 if (sc->nbcnvifs >= ATH_BCBUF) { 1471 ath_err(common, "Not enough beacon buffers when adding" 1472 " new interface of type: %i\n", 1473 vif->type); 1474 ret = -ENOBUFS; 1475 goto out; 1476 } 1477 } 1478 1479 if ((ah->opmode == NL80211_IFTYPE_ADHOC) || 1480 ((vif->type == NL80211_IFTYPE_ADHOC) && 1481 sc->nvifs > 0)) { 1482 ath_err(common, "Cannot create ADHOC interface when other" 1483 " interfaces already exist.\n"); 1484 ret = -EINVAL; 1485 goto out; 1486 } 1487 1488 ath_dbg(common, ATH_DBG_CONFIG, 1489 "Attach a VIF of type: %d\n", vif->type); 1490 1491 sc->nvifs++; 1492 1493 ath9k_do_vif_add_setup(hw, vif); 1494 out: 1495 mutex_unlock(&sc->mutex); 1496 ath9k_ps_restore(sc); 1497 return ret; 1498 } 1499 1500 static int ath9k_change_interface(struct ieee80211_hw *hw, 1501 struct ieee80211_vif *vif, 1502 enum nl80211_iftype new_type, 1503 bool p2p) 1504 { 1505 struct ath_softc *sc = hw->priv; 1506 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1507 int ret = 0; 1508 1509 ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n"); 1510 mutex_lock(&sc->mutex); 1511 ath9k_ps_wakeup(sc); 1512 1513 /* See if new interface type is valid. */ 1514 if ((new_type == NL80211_IFTYPE_ADHOC) && 1515 (sc->nvifs > 1)) { 1516 ath_err(common, "When using ADHOC, it must be the only" 1517 " interface.\n"); 1518 ret = -EINVAL; 1519 goto out; 1520 } 1521 1522 if (ath9k_uses_beacons(new_type) && 1523 !ath9k_uses_beacons(vif->type)) { 1524 if (sc->nbcnvifs >= ATH_BCBUF) { 1525 ath_err(common, "No beacon slot available\n"); 1526 ret = -ENOBUFS; 1527 goto out; 1528 } 1529 } 1530 1531 /* Clean up old vif stuff */ 1532 if (ath9k_uses_beacons(vif->type)) 1533 ath9k_reclaim_beacon(sc, vif); 1534 1535 /* Add new settings */ 1536 vif->type = new_type; 1537 vif->p2p = p2p; 1538 1539 ath9k_do_vif_add_setup(hw, vif); 1540 out: 1541 ath9k_ps_restore(sc); 1542 mutex_unlock(&sc->mutex); 1543 return ret; 1544 } 1545 1546 static void ath9k_remove_interface(struct ieee80211_hw *hw, 1547 struct ieee80211_vif *vif) 1548 { 1549 struct ath_softc *sc = hw->priv; 1550 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1551 1552 ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n"); 1553 1554 ath9k_ps_wakeup(sc); 1555 mutex_lock(&sc->mutex); 1556 1557 sc->nvifs--; 1558 1559 /* Reclaim beacon resources */ 1560 if (ath9k_uses_beacons(vif->type)) 1561 ath9k_reclaim_beacon(sc, vif); 1562 1563 ath9k_calculate_summary_state(hw, NULL); 1564 1565 mutex_unlock(&sc->mutex); 1566 ath9k_ps_restore(sc); 1567 } 1568 1569 static void ath9k_enable_ps(struct ath_softc *sc) 1570 { 1571 struct ath_hw *ah = sc->sc_ah; 1572 1573 sc->ps_enabled = true; 1574 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) { 1575 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) { 1576 ah->imask |= ATH9K_INT_TIM_TIMER; 1577 ath9k_hw_set_interrupts(ah, ah->imask); 1578 } 1579 ath9k_hw_setrxabort(ah, 1); 1580 } 1581 } 1582 1583 static void ath9k_disable_ps(struct ath_softc *sc) 1584 { 1585 struct ath_hw *ah = sc->sc_ah; 1586 1587 sc->ps_enabled = false; 1588 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE); 1589 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) { 1590 ath9k_hw_setrxabort(ah, 0); 1591 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON | 1592 PS_WAIT_FOR_CAB | 1593 PS_WAIT_FOR_PSPOLL_DATA | 1594 PS_WAIT_FOR_TX_ACK); 1595 if (ah->imask & ATH9K_INT_TIM_TIMER) { 1596 ah->imask &= ~ATH9K_INT_TIM_TIMER; 1597 ath9k_hw_set_interrupts(ah, ah->imask); 1598 } 1599 } 1600 1601 } 1602 1603 static int ath9k_config(struct ieee80211_hw *hw, u32 changed) 1604 { 1605 struct ath_softc *sc = hw->priv; 1606 struct ath_hw *ah = sc->sc_ah; 1607 struct ath_common *common = ath9k_hw_common(ah); 1608 struct ieee80211_conf *conf = &hw->conf; 1609 bool disable_radio = false; 1610 1611 mutex_lock(&sc->mutex); 1612 1613 /* 1614 * Leave this as the first check because we need to turn on the 1615 * radio if it was disabled before prior to processing the rest 1616 * of the changes. Likewise we must only disable the radio towards 1617 * the end. 1618 */ 1619 if (changed & IEEE80211_CONF_CHANGE_IDLE) { 1620 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE); 1621 if (!sc->ps_idle) { 1622 ath_radio_enable(sc, hw); 1623 ath_dbg(common, ATH_DBG_CONFIG, 1624 "not-idle: enabling radio\n"); 1625 } else { 1626 disable_radio = true; 1627 } 1628 } 1629 1630 /* 1631 * We just prepare to enable PS. We have to wait until our AP has 1632 * ACK'd our null data frame to disable RX otherwise we'll ignore 1633 * those ACKs and end up retransmitting the same null data frames. 1634 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode. 1635 */ 1636 if (changed & IEEE80211_CONF_CHANGE_PS) { 1637 unsigned long flags; 1638 spin_lock_irqsave(&sc->sc_pm_lock, flags); 1639 if (conf->flags & IEEE80211_CONF_PS) 1640 ath9k_enable_ps(sc); 1641 else 1642 ath9k_disable_ps(sc); 1643 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 1644 } 1645 1646 if (changed & IEEE80211_CONF_CHANGE_MONITOR) { 1647 if (conf->flags & IEEE80211_CONF_MONITOR) { 1648 ath_dbg(common, ATH_DBG_CONFIG, 1649 "Monitor mode is enabled\n"); 1650 sc->sc_ah->is_monitoring = true; 1651 } else { 1652 ath_dbg(common, ATH_DBG_CONFIG, 1653 "Monitor mode is disabled\n"); 1654 sc->sc_ah->is_monitoring = false; 1655 } 1656 } 1657 1658 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) { 1659 struct ieee80211_channel *curchan = hw->conf.channel; 1660 int pos = curchan->hw_value; 1661 int old_pos = -1; 1662 unsigned long flags; 1663 1664 if (ah->curchan) 1665 old_pos = ah->curchan - &ah->channels[0]; 1666 1667 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) 1668 sc->sc_flags |= SC_OP_OFFCHANNEL; 1669 else 1670 sc->sc_flags &= ~SC_OP_OFFCHANNEL; 1671 1672 ath_dbg(common, ATH_DBG_CONFIG, 1673 "Set channel: %d MHz type: %d\n", 1674 curchan->center_freq, conf->channel_type); 1675 1676 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos], 1677 curchan, conf->channel_type); 1678 1679 /* update survey stats for the old channel before switching */ 1680 spin_lock_irqsave(&common->cc_lock, flags); 1681 ath_update_survey_stats(sc); 1682 spin_unlock_irqrestore(&common->cc_lock, flags); 1683 1684 /* 1685 * If the operating channel changes, change the survey in-use flags 1686 * along with it. 1687 * Reset the survey data for the new channel, unless we're switching 1688 * back to the operating channel from an off-channel operation. 1689 */ 1690 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) && 1691 sc->cur_survey != &sc->survey[pos]) { 1692 1693 if (sc->cur_survey) 1694 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE; 1695 1696 sc->cur_survey = &sc->survey[pos]; 1697 1698 memset(sc->cur_survey, 0, sizeof(struct survey_info)); 1699 sc->cur_survey->filled |= SURVEY_INFO_IN_USE; 1700 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) { 1701 memset(&sc->survey[pos], 0, sizeof(struct survey_info)); 1702 } 1703 1704 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) { 1705 ath_err(common, "Unable to set channel\n"); 1706 mutex_unlock(&sc->mutex); 1707 return -EINVAL; 1708 } 1709 1710 /* 1711 * The most recent snapshot of channel->noisefloor for the old 1712 * channel is only available after the hardware reset. Copy it to 1713 * the survey stats now. 1714 */ 1715 if (old_pos >= 0) 1716 ath_update_survey_nf(sc, old_pos); 1717 } 1718 1719 if (changed & IEEE80211_CONF_CHANGE_POWER) { 1720 ath_dbg(common, ATH_DBG_CONFIG, 1721 "Set power: %d\n", conf->power_level); 1722 sc->config.txpowlimit = 2 * conf->power_level; 1723 ath9k_ps_wakeup(sc); 1724 ath9k_cmn_update_txpow(ah, sc->curtxpow, 1725 sc->config.txpowlimit, &sc->curtxpow); 1726 ath9k_ps_restore(sc); 1727 } 1728 1729 if (disable_radio) { 1730 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n"); 1731 ath_radio_disable(sc, hw); 1732 } 1733 1734 mutex_unlock(&sc->mutex); 1735 1736 return 0; 1737 } 1738 1739 #define SUPPORTED_FILTERS \ 1740 (FIF_PROMISC_IN_BSS | \ 1741 FIF_ALLMULTI | \ 1742 FIF_CONTROL | \ 1743 FIF_PSPOLL | \ 1744 FIF_OTHER_BSS | \ 1745 FIF_BCN_PRBRESP_PROMISC | \ 1746 FIF_PROBE_REQ | \ 1747 FIF_FCSFAIL) 1748 1749 /* FIXME: sc->sc_full_reset ? */ 1750 static void ath9k_configure_filter(struct ieee80211_hw *hw, 1751 unsigned int changed_flags, 1752 unsigned int *total_flags, 1753 u64 multicast) 1754 { 1755 struct ath_softc *sc = hw->priv; 1756 u32 rfilt; 1757 1758 changed_flags &= SUPPORTED_FILTERS; 1759 *total_flags &= SUPPORTED_FILTERS; 1760 1761 sc->rx.rxfilter = *total_flags; 1762 ath9k_ps_wakeup(sc); 1763 rfilt = ath_calcrxfilter(sc); 1764 ath9k_hw_setrxfilter(sc->sc_ah, rfilt); 1765 ath9k_ps_restore(sc); 1766 1767 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG, 1768 "Set HW RX filter: 0x%x\n", rfilt); 1769 } 1770 1771 static int ath9k_sta_add(struct ieee80211_hw *hw, 1772 struct ieee80211_vif *vif, 1773 struct ieee80211_sta *sta) 1774 { 1775 struct ath_softc *sc = hw->priv; 1776 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1777 struct ath_node *an = (struct ath_node *) sta->drv_priv; 1778 struct ieee80211_key_conf ps_key = { }; 1779 1780 ath_node_attach(sc, sta); 1781 1782 if (vif->type != NL80211_IFTYPE_AP && 1783 vif->type != NL80211_IFTYPE_AP_VLAN) 1784 return 0; 1785 1786 an->ps_key = ath_key_config(common, vif, sta, &ps_key); 1787 1788 return 0; 1789 } 1790 1791 static void ath9k_del_ps_key(struct ath_softc *sc, 1792 struct ieee80211_vif *vif, 1793 struct ieee80211_sta *sta) 1794 { 1795 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1796 struct ath_node *an = (struct ath_node *) sta->drv_priv; 1797 struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key }; 1798 1799 if (!an->ps_key) 1800 return; 1801 1802 ath_key_delete(common, &ps_key); 1803 } 1804 1805 static int ath9k_sta_remove(struct ieee80211_hw *hw, 1806 struct ieee80211_vif *vif, 1807 struct ieee80211_sta *sta) 1808 { 1809 struct ath_softc *sc = hw->priv; 1810 1811 ath9k_del_ps_key(sc, vif, sta); 1812 ath_node_detach(sc, sta); 1813 1814 return 0; 1815 } 1816 1817 static void ath9k_sta_notify(struct ieee80211_hw *hw, 1818 struct ieee80211_vif *vif, 1819 enum sta_notify_cmd cmd, 1820 struct ieee80211_sta *sta) 1821 { 1822 struct ath_softc *sc = hw->priv; 1823 struct ath_node *an = (struct ath_node *) sta->drv_priv; 1824 1825 switch (cmd) { 1826 case STA_NOTIFY_SLEEP: 1827 an->sleeping = true; 1828 if (ath_tx_aggr_sleep(sc, an)) 1829 ieee80211_sta_set_tim(sta); 1830 break; 1831 case STA_NOTIFY_AWAKE: 1832 an->sleeping = false; 1833 ath_tx_aggr_wakeup(sc, an); 1834 break; 1835 } 1836 } 1837 1838 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue, 1839 const struct ieee80211_tx_queue_params *params) 1840 { 1841 struct ath_softc *sc = hw->priv; 1842 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1843 struct ath_txq *txq; 1844 struct ath9k_tx_queue_info qi; 1845 int ret = 0; 1846 1847 if (queue >= WME_NUM_AC) 1848 return 0; 1849 1850 txq = sc->tx.txq_map[queue]; 1851 1852 ath9k_ps_wakeup(sc); 1853 mutex_lock(&sc->mutex); 1854 1855 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info)); 1856 1857 qi.tqi_aifs = params->aifs; 1858 qi.tqi_cwmin = params->cw_min; 1859 qi.tqi_cwmax = params->cw_max; 1860 qi.tqi_burstTime = params->txop; 1861 1862 ath_dbg(common, ATH_DBG_CONFIG, 1863 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n", 1864 queue, txq->axq_qnum, params->aifs, params->cw_min, 1865 params->cw_max, params->txop); 1866 1867 ret = ath_txq_update(sc, txq->axq_qnum, &qi); 1868 if (ret) 1869 ath_err(common, "TXQ Update failed\n"); 1870 1871 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) 1872 if (queue == WME_AC_BE && !ret) 1873 ath_beaconq_config(sc); 1874 1875 mutex_unlock(&sc->mutex); 1876 ath9k_ps_restore(sc); 1877 1878 return ret; 1879 } 1880 1881 static int ath9k_set_key(struct ieee80211_hw *hw, 1882 enum set_key_cmd cmd, 1883 struct ieee80211_vif *vif, 1884 struct ieee80211_sta *sta, 1885 struct ieee80211_key_conf *key) 1886 { 1887 struct ath_softc *sc = hw->priv; 1888 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1889 int ret = 0; 1890 1891 if (ath9k_modparam_nohwcrypt) 1892 return -ENOSPC; 1893 1894 if (vif->type == NL80211_IFTYPE_ADHOC && 1895 (key->cipher == WLAN_CIPHER_SUITE_TKIP || 1896 key->cipher == WLAN_CIPHER_SUITE_CCMP) && 1897 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) { 1898 /* 1899 * For now, disable hw crypto for the RSN IBSS group keys. This 1900 * could be optimized in the future to use a modified key cache 1901 * design to support per-STA RX GTK, but until that gets 1902 * implemented, use of software crypto for group addressed 1903 * frames is a acceptable to allow RSN IBSS to be used. 1904 */ 1905 return -EOPNOTSUPP; 1906 } 1907 1908 mutex_lock(&sc->mutex); 1909 ath9k_ps_wakeup(sc); 1910 ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n"); 1911 1912 switch (cmd) { 1913 case SET_KEY: 1914 if (sta) 1915 ath9k_del_ps_key(sc, vif, sta); 1916 1917 ret = ath_key_config(common, vif, sta, key); 1918 if (ret >= 0) { 1919 key->hw_key_idx = ret; 1920 /* push IV and Michael MIC generation to stack */ 1921 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV; 1922 if (key->cipher == WLAN_CIPHER_SUITE_TKIP) 1923 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC; 1924 if (sc->sc_ah->sw_mgmt_crypto && 1925 key->cipher == WLAN_CIPHER_SUITE_CCMP) 1926 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT; 1927 ret = 0; 1928 } 1929 break; 1930 case DISABLE_KEY: 1931 ath_key_delete(common, key); 1932 break; 1933 default: 1934 ret = -EINVAL; 1935 } 1936 1937 ath9k_ps_restore(sc); 1938 mutex_unlock(&sc->mutex); 1939 1940 return ret; 1941 } 1942 static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif) 1943 { 1944 struct ath_softc *sc = data; 1945 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1946 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf; 1947 struct ath_vif *avp = (void *)vif->drv_priv; 1948 1949 /* 1950 * Skip iteration if primary station vif's bss info 1951 * was not changed 1952 */ 1953 if (sc->sc_flags & SC_OP_PRIM_STA_VIF) 1954 return; 1955 1956 if (bss_conf->assoc) { 1957 sc->sc_flags |= SC_OP_PRIM_STA_VIF; 1958 avp->primary_sta_vif = true; 1959 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN); 1960 common->curaid = bss_conf->aid; 1961 ath9k_hw_write_associd(sc->sc_ah); 1962 ath_dbg(common, ATH_DBG_CONFIG, 1963 "Bss Info ASSOC %d, bssid: %pM\n", 1964 bss_conf->aid, common->curbssid); 1965 ath_beacon_config(sc, vif); 1966 /* 1967 * Request a re-configuration of Beacon related timers 1968 * on the receipt of the first Beacon frame (i.e., 1969 * after time sync with the AP). 1970 */ 1971 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON; 1972 /* Reset rssi stats */ 1973 sc->last_rssi = ATH_RSSI_DUMMY_MARKER; 1974 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER; 1975 1976 sc->sc_flags |= SC_OP_ANI_RUN; 1977 ath_start_ani(common); 1978 } 1979 } 1980 1981 static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif) 1982 { 1983 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1984 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf; 1985 struct ath_vif *avp = (void *)vif->drv_priv; 1986 1987 if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION) 1988 return; 1989 1990 /* Reconfigure bss info */ 1991 if (avp->primary_sta_vif && !bss_conf->assoc) { 1992 ath_dbg(common, ATH_DBG_CONFIG, 1993 "Bss Info DISASSOC %d, bssid %pM\n", 1994 common->curaid, common->curbssid); 1995 sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS); 1996 avp->primary_sta_vif = false; 1997 memset(common->curbssid, 0, ETH_ALEN); 1998 common->curaid = 0; 1999 } 2000 2001 ieee80211_iterate_active_interfaces_atomic( 2002 sc->hw, ath9k_bss_iter, sc); 2003 2004 /* 2005 * None of station vifs are associated. 2006 * Clear bssid & aid 2007 */ 2008 if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF)) { 2009 ath9k_hw_write_associd(sc->sc_ah); 2010 /* Stop ANI */ 2011 sc->sc_flags &= ~SC_OP_ANI_RUN; 2012 del_timer_sync(&common->ani.timer); 2013 } 2014 } 2015 2016 static void ath9k_bss_info_changed(struct ieee80211_hw *hw, 2017 struct ieee80211_vif *vif, 2018 struct ieee80211_bss_conf *bss_conf, 2019 u32 changed) 2020 { 2021 struct ath_softc *sc = hw->priv; 2022 struct ath_hw *ah = sc->sc_ah; 2023 struct ath_common *common = ath9k_hw_common(ah); 2024 struct ath_vif *avp = (void *)vif->drv_priv; 2025 int slottime; 2026 int error; 2027 2028 ath9k_ps_wakeup(sc); 2029 mutex_lock(&sc->mutex); 2030 2031 if (changed & BSS_CHANGED_BSSID) { 2032 ath9k_config_bss(sc, vif); 2033 2034 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n", 2035 common->curbssid, common->curaid); 2036 } 2037 2038 if (changed & BSS_CHANGED_IBSS) { 2039 /* There can be only one vif available */ 2040 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN); 2041 common->curaid = bss_conf->aid; 2042 ath9k_hw_write_associd(sc->sc_ah); 2043 2044 if (bss_conf->ibss_joined) { 2045 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER; 2046 sc->sc_flags |= SC_OP_ANI_RUN; 2047 ath_start_ani(common); 2048 } else { 2049 sc->sc_flags &= ~SC_OP_ANI_RUN; 2050 del_timer_sync(&common->ani.timer); 2051 } 2052 } 2053 2054 /* Enable transmission of beacons (AP, IBSS, MESH) */ 2055 if ((changed & BSS_CHANGED_BEACON) || 2056 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) { 2057 ath9k_set_beaconing_status(sc, false); 2058 error = ath_beacon_alloc(sc, vif); 2059 if (!error) 2060 ath_beacon_config(sc, vif); 2061 ath9k_set_beaconing_status(sc, true); 2062 } 2063 2064 if (changed & BSS_CHANGED_ERP_SLOT) { 2065 if (bss_conf->use_short_slot) 2066 slottime = 9; 2067 else 2068 slottime = 20; 2069 if (vif->type == NL80211_IFTYPE_AP) { 2070 /* 2071 * Defer update, so that connected stations can adjust 2072 * their settings at the same time. 2073 * See beacon.c for more details 2074 */ 2075 sc->beacon.slottime = slottime; 2076 sc->beacon.updateslot = UPDATE; 2077 } else { 2078 ah->slottime = slottime; 2079 ath9k_hw_init_global_settings(ah); 2080 } 2081 } 2082 2083 /* Disable transmission of beacons */ 2084 if ((changed & BSS_CHANGED_BEACON_ENABLED) && 2085 !bss_conf->enable_beacon) { 2086 ath9k_set_beaconing_status(sc, false); 2087 avp->is_bslot_active = false; 2088 ath9k_set_beaconing_status(sc, true); 2089 } 2090 2091 if (changed & BSS_CHANGED_BEACON_INT) { 2092 /* 2093 * In case of AP mode, the HW TSF has to be reset 2094 * when the beacon interval changes. 2095 */ 2096 if (vif->type == NL80211_IFTYPE_AP) { 2097 sc->sc_flags |= SC_OP_TSF_RESET; 2098 ath9k_set_beaconing_status(sc, false); 2099 error = ath_beacon_alloc(sc, vif); 2100 if (!error) 2101 ath_beacon_config(sc, vif); 2102 ath9k_set_beaconing_status(sc, true); 2103 } else 2104 ath_beacon_config(sc, vif); 2105 } 2106 2107 if (changed & BSS_CHANGED_ERP_PREAMBLE) { 2108 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n", 2109 bss_conf->use_short_preamble); 2110 if (bss_conf->use_short_preamble) 2111 sc->sc_flags |= SC_OP_PREAMBLE_SHORT; 2112 else 2113 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT; 2114 } 2115 2116 if (changed & BSS_CHANGED_ERP_CTS_PROT) { 2117 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n", 2118 bss_conf->use_cts_prot); 2119 if (bss_conf->use_cts_prot && 2120 hw->conf.channel->band != IEEE80211_BAND_5GHZ) 2121 sc->sc_flags |= SC_OP_PROTECT_ENABLE; 2122 else 2123 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE; 2124 } 2125 2126 mutex_unlock(&sc->mutex); 2127 ath9k_ps_restore(sc); 2128 } 2129 2130 static u64 ath9k_get_tsf(struct ieee80211_hw *hw) 2131 { 2132 struct ath_softc *sc = hw->priv; 2133 u64 tsf; 2134 2135 mutex_lock(&sc->mutex); 2136 ath9k_ps_wakeup(sc); 2137 tsf = ath9k_hw_gettsf64(sc->sc_ah); 2138 ath9k_ps_restore(sc); 2139 mutex_unlock(&sc->mutex); 2140 2141 return tsf; 2142 } 2143 2144 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf) 2145 { 2146 struct ath_softc *sc = hw->priv; 2147 2148 mutex_lock(&sc->mutex); 2149 ath9k_ps_wakeup(sc); 2150 ath9k_hw_settsf64(sc->sc_ah, tsf); 2151 ath9k_ps_restore(sc); 2152 mutex_unlock(&sc->mutex); 2153 } 2154 2155 static void ath9k_reset_tsf(struct ieee80211_hw *hw) 2156 { 2157 struct ath_softc *sc = hw->priv; 2158 2159 mutex_lock(&sc->mutex); 2160 2161 ath9k_ps_wakeup(sc); 2162 ath9k_hw_reset_tsf(sc->sc_ah); 2163 ath9k_ps_restore(sc); 2164 2165 mutex_unlock(&sc->mutex); 2166 } 2167 2168 static int ath9k_ampdu_action(struct ieee80211_hw *hw, 2169 struct ieee80211_vif *vif, 2170 enum ieee80211_ampdu_mlme_action action, 2171 struct ieee80211_sta *sta, 2172 u16 tid, u16 *ssn, u8 buf_size) 2173 { 2174 struct ath_softc *sc = hw->priv; 2175 int ret = 0; 2176 2177 local_bh_disable(); 2178 2179 switch (action) { 2180 case IEEE80211_AMPDU_RX_START: 2181 if (!(sc->sc_flags & SC_OP_RXAGGR)) 2182 ret = -ENOTSUPP; 2183 break; 2184 case IEEE80211_AMPDU_RX_STOP: 2185 break; 2186 case IEEE80211_AMPDU_TX_START: 2187 if (!(sc->sc_flags & SC_OP_TXAGGR)) 2188 return -EOPNOTSUPP; 2189 2190 ath9k_ps_wakeup(sc); 2191 ret = ath_tx_aggr_start(sc, sta, tid, ssn); 2192 if (!ret) 2193 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid); 2194 ath9k_ps_restore(sc); 2195 break; 2196 case IEEE80211_AMPDU_TX_STOP: 2197 ath9k_ps_wakeup(sc); 2198 ath_tx_aggr_stop(sc, sta, tid); 2199 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid); 2200 ath9k_ps_restore(sc); 2201 break; 2202 case IEEE80211_AMPDU_TX_OPERATIONAL: 2203 ath9k_ps_wakeup(sc); 2204 ath_tx_aggr_resume(sc, sta, tid); 2205 ath9k_ps_restore(sc); 2206 break; 2207 default: 2208 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n"); 2209 } 2210 2211 local_bh_enable(); 2212 2213 return ret; 2214 } 2215 2216 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx, 2217 struct survey_info *survey) 2218 { 2219 struct ath_softc *sc = hw->priv; 2220 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 2221 struct ieee80211_supported_band *sband; 2222 struct ieee80211_channel *chan; 2223 unsigned long flags; 2224 int pos; 2225 2226 spin_lock_irqsave(&common->cc_lock, flags); 2227 if (idx == 0) 2228 ath_update_survey_stats(sc); 2229 2230 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ]; 2231 if (sband && idx >= sband->n_channels) { 2232 idx -= sband->n_channels; 2233 sband = NULL; 2234 } 2235 2236 if (!sband) 2237 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ]; 2238 2239 if (!sband || idx >= sband->n_channels) { 2240 spin_unlock_irqrestore(&common->cc_lock, flags); 2241 return -ENOENT; 2242 } 2243 2244 chan = &sband->channels[idx]; 2245 pos = chan->hw_value; 2246 memcpy(survey, &sc->survey[pos], sizeof(*survey)); 2247 survey->channel = chan; 2248 spin_unlock_irqrestore(&common->cc_lock, flags); 2249 2250 return 0; 2251 } 2252 2253 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class) 2254 { 2255 struct ath_softc *sc = hw->priv; 2256 struct ath_hw *ah = sc->sc_ah; 2257 2258 mutex_lock(&sc->mutex); 2259 ah->coverage_class = coverage_class; 2260 ath9k_hw_init_global_settings(ah); 2261 mutex_unlock(&sc->mutex); 2262 } 2263 2264 static void ath9k_flush(struct ieee80211_hw *hw, bool drop) 2265 { 2266 struct ath_softc *sc = hw->priv; 2267 struct ath_hw *ah = sc->sc_ah; 2268 struct ath_common *common = ath9k_hw_common(ah); 2269 int timeout = 200; /* ms */ 2270 int i, j; 2271 bool drain_txq; 2272 2273 mutex_lock(&sc->mutex); 2274 cancel_delayed_work_sync(&sc->tx_complete_work); 2275 2276 if (sc->sc_flags & SC_OP_INVALID) { 2277 ath_dbg(common, ATH_DBG_ANY, "Device not present\n"); 2278 mutex_unlock(&sc->mutex); 2279 return; 2280 } 2281 2282 if (drop) 2283 timeout = 1; 2284 2285 for (j = 0; j < timeout; j++) { 2286 bool npend = false; 2287 2288 if (j) 2289 usleep_range(1000, 2000); 2290 2291 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) { 2292 if (!ATH_TXQ_SETUP(sc, i)) 2293 continue; 2294 2295 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]); 2296 2297 if (npend) 2298 break; 2299 } 2300 2301 if (!npend) 2302 goto out; 2303 } 2304 2305 ath9k_ps_wakeup(sc); 2306 spin_lock_bh(&sc->sc_pcu_lock); 2307 drain_txq = ath_drain_all_txq(sc, false); 2308 spin_unlock_bh(&sc->sc_pcu_lock); 2309 if (!drain_txq) 2310 ath_reset(sc, false); 2311 ath9k_ps_restore(sc); 2312 ieee80211_wake_queues(hw); 2313 2314 out: 2315 ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0); 2316 mutex_unlock(&sc->mutex); 2317 } 2318 2319 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw) 2320 { 2321 struct ath_softc *sc = hw->priv; 2322 int i; 2323 2324 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) { 2325 if (!ATH_TXQ_SETUP(sc, i)) 2326 continue; 2327 2328 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i])) 2329 return true; 2330 } 2331 return false; 2332 } 2333 2334 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw) 2335 { 2336 struct ath_softc *sc = hw->priv; 2337 struct ath_hw *ah = sc->sc_ah; 2338 struct ieee80211_vif *vif; 2339 struct ath_vif *avp; 2340 struct ath_buf *bf; 2341 struct ath_tx_status ts; 2342 int status; 2343 2344 vif = sc->beacon.bslot[0]; 2345 if (!vif) 2346 return 0; 2347 2348 avp = (void *)vif->drv_priv; 2349 if (!avp->is_bslot_active) 2350 return 0; 2351 2352 if (!sc->beacon.tx_processed) { 2353 tasklet_disable(&sc->bcon_tasklet); 2354 2355 bf = avp->av_bcbuf; 2356 if (!bf || !bf->bf_mpdu) 2357 goto skip; 2358 2359 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts); 2360 if (status == -EINPROGRESS) 2361 goto skip; 2362 2363 sc->beacon.tx_processed = true; 2364 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK); 2365 2366 skip: 2367 tasklet_enable(&sc->bcon_tasklet); 2368 } 2369 2370 return sc->beacon.tx_last; 2371 } 2372 2373 struct ieee80211_ops ath9k_ops = { 2374 .tx = ath9k_tx, 2375 .start = ath9k_start, 2376 .stop = ath9k_stop, 2377 .add_interface = ath9k_add_interface, 2378 .change_interface = ath9k_change_interface, 2379 .remove_interface = ath9k_remove_interface, 2380 .config = ath9k_config, 2381 .configure_filter = ath9k_configure_filter, 2382 .sta_add = ath9k_sta_add, 2383 .sta_remove = ath9k_sta_remove, 2384 .sta_notify = ath9k_sta_notify, 2385 .conf_tx = ath9k_conf_tx, 2386 .bss_info_changed = ath9k_bss_info_changed, 2387 .set_key = ath9k_set_key, 2388 .get_tsf = ath9k_get_tsf, 2389 .set_tsf = ath9k_set_tsf, 2390 .reset_tsf = ath9k_reset_tsf, 2391 .ampdu_action = ath9k_ampdu_action, 2392 .get_survey = ath9k_get_survey, 2393 .rfkill_poll = ath9k_rfkill_poll_state, 2394 .set_coverage_class = ath9k_set_coverage_class, 2395 .flush = ath9k_flush, 2396 .tx_frames_pending = ath9k_tx_frames_pending, 2397 .tx_last_beacon = ath9k_tx_last_beacon, 2398 }; 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