1 /* 2 * Copyright (c) 2008-2009 Atheros Communications Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #include <linux/nl80211.h> 18 #include "ath9k.h" 19 #include "btcoex.h" 20 21 static void ath_update_txpow(struct ath_softc *sc) 22 { 23 struct ath_hw *ah = sc->sc_ah; 24 25 if (sc->curtxpow != sc->config.txpowlimit) { 26 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit); 27 /* read back in case value is clamped */ 28 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit; 29 } 30 } 31 32 static u8 parse_mpdudensity(u8 mpdudensity) 33 { 34 /* 35 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing": 36 * 0 for no restriction 37 * 1 for 1/4 us 38 * 2 for 1/2 us 39 * 3 for 1 us 40 * 4 for 2 us 41 * 5 for 4 us 42 * 6 for 8 us 43 * 7 for 16 us 44 */ 45 switch (mpdudensity) { 46 case 0: 47 return 0; 48 case 1: 49 case 2: 50 case 3: 51 /* Our lower layer calculations limit our precision to 52 1 microsecond */ 53 return 1; 54 case 4: 55 return 2; 56 case 5: 57 return 4; 58 case 6: 59 return 8; 60 case 7: 61 return 16; 62 default: 63 return 0; 64 } 65 } 66 67 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc, 68 struct ieee80211_hw *hw) 69 { 70 struct ieee80211_channel *curchan = hw->conf.channel; 71 struct ath9k_channel *channel; 72 u8 chan_idx; 73 74 chan_idx = curchan->hw_value; 75 channel = &sc->sc_ah->channels[chan_idx]; 76 ath9k_update_ichannel(sc, hw, channel); 77 return channel; 78 } 79 80 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode) 81 { 82 unsigned long flags; 83 bool ret; 84 85 spin_lock_irqsave(&sc->sc_pm_lock, flags); 86 ret = ath9k_hw_setpower(sc->sc_ah, mode); 87 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 88 89 return ret; 90 } 91 92 void ath9k_ps_wakeup(struct ath_softc *sc) 93 { 94 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 95 unsigned long flags; 96 97 spin_lock_irqsave(&sc->sc_pm_lock, flags); 98 if (++sc->ps_usecount != 1) 99 goto unlock; 100 101 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE); 102 103 /* 104 * While the hardware is asleep, the cycle counters contain no 105 * useful data. Better clear them now so that they don't mess up 106 * survey data results. 107 */ 108 spin_lock(&common->cc_lock); 109 ath_hw_cycle_counters_update(common); 110 memset(&common->cc_survey, 0, sizeof(common->cc_survey)); 111 spin_unlock(&common->cc_lock); 112 113 unlock: 114 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 115 } 116 117 void ath9k_ps_restore(struct ath_softc *sc) 118 { 119 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 120 unsigned long flags; 121 122 spin_lock_irqsave(&sc->sc_pm_lock, flags); 123 if (--sc->ps_usecount != 0) 124 goto unlock; 125 126 spin_lock(&common->cc_lock); 127 ath_hw_cycle_counters_update(common); 128 spin_unlock(&common->cc_lock); 129 130 if (sc->ps_idle) 131 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP); 132 else if (sc->ps_enabled && 133 !(sc->ps_flags & (PS_WAIT_FOR_BEACON | 134 PS_WAIT_FOR_CAB | 135 PS_WAIT_FOR_PSPOLL_DATA | 136 PS_WAIT_FOR_TX_ACK))) 137 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP); 138 139 unlock: 140 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 141 } 142 143 static void ath_start_ani(struct ath_common *common) 144 { 145 struct ath_hw *ah = common->ah; 146 unsigned long timestamp = jiffies_to_msecs(jiffies); 147 struct ath_softc *sc = (struct ath_softc *) common->priv; 148 149 if (!(sc->sc_flags & SC_OP_ANI_RUN)) 150 return; 151 152 if (sc->sc_flags & SC_OP_OFFCHANNEL) 153 return; 154 155 common->ani.longcal_timer = timestamp; 156 common->ani.shortcal_timer = timestamp; 157 common->ani.checkani_timer = timestamp; 158 159 mod_timer(&common->ani.timer, 160 jiffies + 161 msecs_to_jiffies((u32)ah->config.ani_poll_interval)); 162 } 163 164 static void ath_update_survey_nf(struct ath_softc *sc, int channel) 165 { 166 struct ath_hw *ah = sc->sc_ah; 167 struct ath9k_channel *chan = &ah->channels[channel]; 168 struct survey_info *survey = &sc->survey[channel]; 169 170 if (chan->noisefloor) { 171 survey->filled |= SURVEY_INFO_NOISE_DBM; 172 survey->noise = chan->noisefloor; 173 } 174 } 175 176 static void ath_update_survey_stats(struct ath_softc *sc) 177 { 178 struct ath_hw *ah = sc->sc_ah; 179 struct ath_common *common = ath9k_hw_common(ah); 180 int pos = ah->curchan - &ah->channels[0]; 181 struct survey_info *survey = &sc->survey[pos]; 182 struct ath_cycle_counters *cc = &common->cc_survey; 183 unsigned int div = common->clockrate * 1000; 184 185 if (!ah->curchan) 186 return; 187 188 if (ah->power_mode == ATH9K_PM_AWAKE) 189 ath_hw_cycle_counters_update(common); 190 191 if (cc->cycles > 0) { 192 survey->filled |= SURVEY_INFO_CHANNEL_TIME | 193 SURVEY_INFO_CHANNEL_TIME_BUSY | 194 SURVEY_INFO_CHANNEL_TIME_RX | 195 SURVEY_INFO_CHANNEL_TIME_TX; 196 survey->channel_time += cc->cycles / div; 197 survey->channel_time_busy += cc->rx_busy / div; 198 survey->channel_time_rx += cc->rx_frame / div; 199 survey->channel_time_tx += cc->tx_frame / div; 200 } 201 memset(cc, 0, sizeof(*cc)); 202 203 ath_update_survey_nf(sc, pos); 204 } 205 206 /* 207 * Set/change channels. If the channel is really being changed, it's done 208 * by reseting the chip. To accomplish this we must first cleanup any pending 209 * DMA, then restart stuff. 210 */ 211 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw, 212 struct ath9k_channel *hchan) 213 { 214 struct ath_wiphy *aphy = hw->priv; 215 struct ath_hw *ah = sc->sc_ah; 216 struct ath_common *common = ath9k_hw_common(ah); 217 struct ieee80211_conf *conf = &common->hw->conf; 218 bool fastcc = true, stopped; 219 struct ieee80211_channel *channel = hw->conf.channel; 220 struct ath9k_hw_cal_data *caldata = NULL; 221 int r; 222 223 if (sc->sc_flags & SC_OP_INVALID) 224 return -EIO; 225 226 del_timer_sync(&common->ani.timer); 227 cancel_work_sync(&sc->paprd_work); 228 cancel_work_sync(&sc->hw_check_work); 229 cancel_delayed_work_sync(&sc->tx_complete_work); 230 231 ath9k_ps_wakeup(sc); 232 233 /* 234 * This is only performed if the channel settings have 235 * actually changed. 236 * 237 * To switch channels clear any pending DMA operations; 238 * wait long enough for the RX fifo to drain, reset the 239 * hardware at the new frequency, and then re-enable 240 * the relevant bits of the h/w. 241 */ 242 ath9k_hw_set_interrupts(ah, 0); 243 ath_drain_all_txq(sc, false); 244 245 spin_lock_bh(&sc->rx.pcu_lock); 246 247 stopped = ath_stoprecv(sc); 248 249 /* XXX: do not flush receive queue here. We don't want 250 * to flush data frames already in queue because of 251 * changing channel. */ 252 253 if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL)) 254 fastcc = false; 255 256 if (!(sc->sc_flags & SC_OP_OFFCHANNEL)) 257 caldata = &aphy->caldata; 258 259 ath_print(common, ATH_DBG_CONFIG, 260 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n", 261 sc->sc_ah->curchan->channel, 262 channel->center_freq, conf_is_ht40(conf), 263 fastcc); 264 265 spin_lock_bh(&sc->sc_resetlock); 266 267 r = ath9k_hw_reset(ah, hchan, caldata, fastcc); 268 if (r) { 269 ath_print(common, ATH_DBG_FATAL, 270 "Unable to reset channel (%u MHz), " 271 "reset status %d\n", 272 channel->center_freq, r); 273 spin_unlock_bh(&sc->sc_resetlock); 274 spin_unlock_bh(&sc->rx.pcu_lock); 275 goto ps_restore; 276 } 277 spin_unlock_bh(&sc->sc_resetlock); 278 279 if (ath_startrecv(sc) != 0) { 280 ath_print(common, ATH_DBG_FATAL, 281 "Unable to restart recv logic\n"); 282 r = -EIO; 283 spin_unlock_bh(&sc->rx.pcu_lock); 284 goto ps_restore; 285 } 286 287 spin_unlock_bh(&sc->rx.pcu_lock); 288 289 ath_update_txpow(sc); 290 ath9k_hw_set_interrupts(ah, ah->imask); 291 292 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) { 293 ath_beacon_config(sc, NULL); 294 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0); 295 ath_start_ani(common); 296 } 297 298 ps_restore: 299 ath9k_ps_restore(sc); 300 return r; 301 } 302 303 static void ath_paprd_activate(struct ath_softc *sc) 304 { 305 struct ath_hw *ah = sc->sc_ah; 306 struct ath9k_hw_cal_data *caldata = ah->caldata; 307 struct ath_common *common = ath9k_hw_common(ah); 308 int chain; 309 310 if (!caldata || !caldata->paprd_done) 311 return; 312 313 ath9k_ps_wakeup(sc); 314 ar9003_paprd_enable(ah, false); 315 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) { 316 if (!(common->tx_chainmask & BIT(chain))) 317 continue; 318 319 ar9003_paprd_populate_single_table(ah, caldata, chain); 320 } 321 322 ar9003_paprd_enable(ah, true); 323 ath9k_ps_restore(sc); 324 } 325 326 void ath_paprd_calibrate(struct work_struct *work) 327 { 328 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work); 329 struct ieee80211_hw *hw = sc->hw; 330 struct ath_hw *ah = sc->sc_ah; 331 struct ieee80211_hdr *hdr; 332 struct sk_buff *skb = NULL; 333 struct ieee80211_tx_info *tx_info; 334 int band = hw->conf.channel->band; 335 struct ieee80211_supported_band *sband = &sc->sbands[band]; 336 struct ath_tx_control txctl; 337 struct ath9k_hw_cal_data *caldata = ah->caldata; 338 struct ath_common *common = ath9k_hw_common(ah); 339 int qnum, ftype; 340 int chain_ok = 0; 341 int chain; 342 int len = 1800; 343 int time_left; 344 int i; 345 346 if (!caldata) 347 return; 348 349 skb = alloc_skb(len, GFP_KERNEL); 350 if (!skb) 351 return; 352 353 tx_info = IEEE80211_SKB_CB(skb); 354 355 skb_put(skb, len); 356 memset(skb->data, 0, len); 357 hdr = (struct ieee80211_hdr *)skb->data; 358 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC; 359 hdr->frame_control = cpu_to_le16(ftype); 360 hdr->duration_id = cpu_to_le16(10); 361 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN); 362 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN); 363 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN); 364 365 memset(&txctl, 0, sizeof(txctl)); 366 qnum = sc->tx.hwq_map[WME_AC_BE]; 367 txctl.txq = &sc->tx.txq[qnum]; 368 369 ath9k_ps_wakeup(sc); 370 ar9003_paprd_init_table(ah); 371 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) { 372 if (!(common->tx_chainmask & BIT(chain))) 373 continue; 374 375 chain_ok = 0; 376 memset(tx_info, 0, sizeof(*tx_info)); 377 tx_info->band = band; 378 379 for (i = 0; i < 4; i++) { 380 tx_info->control.rates[i].idx = sband->n_bitrates - 1; 381 tx_info->control.rates[i].count = 6; 382 } 383 384 init_completion(&sc->paprd_complete); 385 ar9003_paprd_setup_gain_table(ah, chain); 386 txctl.paprd = BIT(chain); 387 if (ath_tx_start(hw, skb, &txctl) != 0) 388 break; 389 390 time_left = wait_for_completion_timeout(&sc->paprd_complete, 391 msecs_to_jiffies(ATH_PAPRD_TIMEOUT)); 392 if (!time_left) { 393 ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE, 394 "Timeout waiting for paprd training on " 395 "TX chain %d\n", 396 chain); 397 goto fail_paprd; 398 } 399 400 if (!ar9003_paprd_is_done(ah)) 401 break; 402 403 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0) 404 break; 405 406 chain_ok = 1; 407 } 408 kfree_skb(skb); 409 410 if (chain_ok) { 411 caldata->paprd_done = true; 412 ath_paprd_activate(sc); 413 } 414 415 fail_paprd: 416 ath9k_ps_restore(sc); 417 } 418 419 /* 420 * This routine performs the periodic noise floor calibration function 421 * that is used to adjust and optimize the chip performance. This 422 * takes environmental changes (location, temperature) into account. 423 * When the task is complete, it reschedules itself depending on the 424 * appropriate interval that was calculated. 425 */ 426 void ath_ani_calibrate(unsigned long data) 427 { 428 struct ath_softc *sc = (struct ath_softc *)data; 429 struct ath_hw *ah = sc->sc_ah; 430 struct ath_common *common = ath9k_hw_common(ah); 431 bool longcal = false; 432 bool shortcal = false; 433 bool aniflag = false; 434 unsigned int timestamp = jiffies_to_msecs(jiffies); 435 u32 cal_interval, short_cal_interval, long_cal_interval; 436 unsigned long flags; 437 438 if (ah->caldata && ah->caldata->nfcal_interference) 439 long_cal_interval = ATH_LONG_CALINTERVAL_INT; 440 else 441 long_cal_interval = ATH_LONG_CALINTERVAL; 442 443 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ? 444 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL; 445 446 /* Only calibrate if awake */ 447 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE) 448 goto set_timer; 449 450 ath9k_ps_wakeup(sc); 451 452 /* Long calibration runs independently of short calibration. */ 453 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) { 454 longcal = true; 455 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies); 456 common->ani.longcal_timer = timestamp; 457 } 458 459 /* Short calibration applies only while caldone is false */ 460 if (!common->ani.caldone) { 461 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) { 462 shortcal = true; 463 ath_print(common, ATH_DBG_ANI, 464 "shortcal @%lu\n", jiffies); 465 common->ani.shortcal_timer = timestamp; 466 common->ani.resetcal_timer = timestamp; 467 } 468 } else { 469 if ((timestamp - common->ani.resetcal_timer) >= 470 ATH_RESTART_CALINTERVAL) { 471 common->ani.caldone = ath9k_hw_reset_calvalid(ah); 472 if (common->ani.caldone) 473 common->ani.resetcal_timer = timestamp; 474 } 475 } 476 477 /* Verify whether we must check ANI */ 478 if ((timestamp - common->ani.checkani_timer) >= 479 ah->config.ani_poll_interval) { 480 aniflag = true; 481 common->ani.checkani_timer = timestamp; 482 } 483 484 /* Skip all processing if there's nothing to do. */ 485 if (longcal || shortcal || aniflag) { 486 /* Call ANI routine if necessary */ 487 if (aniflag) { 488 spin_lock_irqsave(&common->cc_lock, flags); 489 ath9k_hw_ani_monitor(ah, ah->curchan); 490 ath_update_survey_stats(sc); 491 spin_unlock_irqrestore(&common->cc_lock, flags); 492 } 493 494 /* Perform calibration if necessary */ 495 if (longcal || shortcal) { 496 common->ani.caldone = 497 ath9k_hw_calibrate(ah, 498 ah->curchan, 499 common->rx_chainmask, 500 longcal); 501 } 502 } 503 504 ath9k_ps_restore(sc); 505 506 set_timer: 507 /* 508 * Set timer interval based on previous results. 509 * The interval must be the shortest necessary to satisfy ANI, 510 * short calibration and long calibration. 511 */ 512 cal_interval = ATH_LONG_CALINTERVAL; 513 if (sc->sc_ah->config.enable_ani) 514 cal_interval = min(cal_interval, 515 (u32)ah->config.ani_poll_interval); 516 if (!common->ani.caldone) 517 cal_interval = min(cal_interval, (u32)short_cal_interval); 518 519 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval)); 520 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) { 521 if (!ah->caldata->paprd_done) 522 ieee80211_queue_work(sc->hw, &sc->paprd_work); 523 else 524 ath_paprd_activate(sc); 525 } 526 } 527 528 /* 529 * Update tx/rx chainmask. For legacy association, 530 * hard code chainmask to 1x1, for 11n association, use 531 * the chainmask configuration, for bt coexistence, use 532 * the chainmask configuration even in legacy mode. 533 */ 534 void ath_update_chainmask(struct ath_softc *sc, int is_ht) 535 { 536 struct ath_hw *ah = sc->sc_ah; 537 struct ath_common *common = ath9k_hw_common(ah); 538 539 if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht || 540 (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) { 541 common->tx_chainmask = ah->caps.tx_chainmask; 542 common->rx_chainmask = ah->caps.rx_chainmask; 543 } else { 544 common->tx_chainmask = 1; 545 common->rx_chainmask = 1; 546 } 547 548 ath_print(common, ATH_DBG_CONFIG, 549 "tx chmask: %d, rx chmask: %d\n", 550 common->tx_chainmask, 551 common->rx_chainmask); 552 } 553 554 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta) 555 { 556 struct ath_node *an; 557 558 an = (struct ath_node *)sta->drv_priv; 559 560 if (sc->sc_flags & SC_OP_TXAGGR) { 561 ath_tx_node_init(sc, an); 562 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR + 563 sta->ht_cap.ampdu_factor); 564 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density); 565 an->last_rssi = ATH_RSSI_DUMMY_MARKER; 566 } 567 } 568 569 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta) 570 { 571 struct ath_node *an = (struct ath_node *)sta->drv_priv; 572 573 if (sc->sc_flags & SC_OP_TXAGGR) 574 ath_tx_node_cleanup(sc, an); 575 } 576 577 void ath_hw_check(struct work_struct *work) 578 { 579 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work); 580 int i; 581 582 ath9k_ps_wakeup(sc); 583 584 for (i = 0; i < 3; i++) { 585 if (ath9k_hw_check_alive(sc->sc_ah)) 586 goto out; 587 588 msleep(1); 589 } 590 ath_reset(sc, true); 591 592 out: 593 ath9k_ps_restore(sc); 594 } 595 596 void ath9k_tasklet(unsigned long data) 597 { 598 struct ath_softc *sc = (struct ath_softc *)data; 599 struct ath_hw *ah = sc->sc_ah; 600 struct ath_common *common = ath9k_hw_common(ah); 601 602 u32 status = sc->intrstatus; 603 u32 rxmask; 604 605 ath9k_ps_wakeup(sc); 606 607 if (status & ATH9K_INT_FATAL) { 608 ath_reset(sc, true); 609 ath9k_ps_restore(sc); 610 return; 611 } 612 613 if (!ath9k_hw_check_alive(ah)) 614 ieee80211_queue_work(sc->hw, &sc->hw_check_work); 615 616 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) 617 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL | 618 ATH9K_INT_RXORN); 619 else 620 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN); 621 622 if (status & rxmask) { 623 spin_lock_bh(&sc->rx.pcu_lock); 624 625 /* Check for high priority Rx first */ 626 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) && 627 (status & ATH9K_INT_RXHP)) 628 ath_rx_tasklet(sc, 0, true); 629 630 ath_rx_tasklet(sc, 0, false); 631 spin_unlock_bh(&sc->rx.pcu_lock); 632 } 633 634 if (status & ATH9K_INT_TX) { 635 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) 636 ath_tx_edma_tasklet(sc); 637 else 638 ath_tx_tasklet(sc); 639 } 640 641 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) { 642 /* 643 * TSF sync does not look correct; remain awake to sync with 644 * the next Beacon. 645 */ 646 ath_print(common, ATH_DBG_PS, 647 "TSFOOR - Sync with next Beacon\n"); 648 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC; 649 } 650 651 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE) 652 if (status & ATH9K_INT_GENTIMER) 653 ath_gen_timer_isr(sc->sc_ah); 654 655 /* re-enable hardware interrupt */ 656 ath9k_hw_set_interrupts(ah, ah->imask); 657 ath9k_ps_restore(sc); 658 } 659 660 irqreturn_t ath_isr(int irq, void *dev) 661 { 662 #define SCHED_INTR ( \ 663 ATH9K_INT_FATAL | \ 664 ATH9K_INT_RXORN | \ 665 ATH9K_INT_RXEOL | \ 666 ATH9K_INT_RX | \ 667 ATH9K_INT_RXLP | \ 668 ATH9K_INT_RXHP | \ 669 ATH9K_INT_TX | \ 670 ATH9K_INT_BMISS | \ 671 ATH9K_INT_CST | \ 672 ATH9K_INT_TSFOOR | \ 673 ATH9K_INT_GENTIMER) 674 675 struct ath_softc *sc = dev; 676 struct ath_hw *ah = sc->sc_ah; 677 struct ath_common *common = ath9k_hw_common(ah); 678 enum ath9k_int status; 679 bool sched = false; 680 681 /* 682 * The hardware is not ready/present, don't 683 * touch anything. Note this can happen early 684 * on if the IRQ is shared. 685 */ 686 if (sc->sc_flags & SC_OP_INVALID) 687 return IRQ_NONE; 688 689 690 /* shared irq, not for us */ 691 692 if (!ath9k_hw_intrpend(ah)) 693 return IRQ_NONE; 694 695 /* 696 * Figure out the reason(s) for the interrupt. Note 697 * that the hal returns a pseudo-ISR that may include 698 * bits we haven't explicitly enabled so we mask the 699 * value to insure we only process bits we requested. 700 */ 701 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */ 702 status &= ah->imask; /* discard unasked-for bits */ 703 704 /* 705 * If there are no status bits set, then this interrupt was not 706 * for me (should have been caught above). 707 */ 708 if (!status) 709 return IRQ_NONE; 710 711 /* Cache the status */ 712 sc->intrstatus = status; 713 714 if (status & SCHED_INTR) 715 sched = true; 716 717 /* 718 * If a FATAL or RXORN interrupt is received, we have to reset the 719 * chip immediately. 720 */ 721 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) && 722 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA))) 723 goto chip_reset; 724 725 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) && 726 (status & ATH9K_INT_BB_WATCHDOG)) { 727 728 spin_lock(&common->cc_lock); 729 ath_hw_cycle_counters_update(common); 730 ar9003_hw_bb_watchdog_dbg_info(ah); 731 spin_unlock(&common->cc_lock); 732 733 goto chip_reset; 734 } 735 736 if (status & ATH9K_INT_SWBA) 737 tasklet_schedule(&sc->bcon_tasklet); 738 739 if (status & ATH9K_INT_TXURN) 740 ath9k_hw_updatetxtriglevel(ah, true); 741 742 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) { 743 if (status & ATH9K_INT_RXEOL) { 744 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN); 745 ath9k_hw_set_interrupts(ah, ah->imask); 746 } 747 } 748 749 if (status & ATH9K_INT_MIB) { 750 /* 751 * Disable interrupts until we service the MIB 752 * interrupt; otherwise it will continue to 753 * fire. 754 */ 755 ath9k_hw_set_interrupts(ah, 0); 756 /* 757 * Let the hal handle the event. We assume 758 * it will clear whatever condition caused 759 * the interrupt. 760 */ 761 spin_lock(&common->cc_lock); 762 ath9k_hw_proc_mib_event(ah); 763 spin_unlock(&common->cc_lock); 764 ath9k_hw_set_interrupts(ah, ah->imask); 765 } 766 767 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) 768 if (status & ATH9K_INT_TIM_TIMER) { 769 /* Clear RxAbort bit so that we can 770 * receive frames */ 771 ath9k_setpower(sc, ATH9K_PM_AWAKE); 772 ath9k_hw_setrxabort(sc->sc_ah, 0); 773 sc->ps_flags |= PS_WAIT_FOR_BEACON; 774 } 775 776 chip_reset: 777 778 ath_debug_stat_interrupt(sc, status); 779 780 if (sched) { 781 /* turn off every interrupt except SWBA */ 782 ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA)); 783 tasklet_schedule(&sc->intr_tq); 784 } 785 786 return IRQ_HANDLED; 787 788 #undef SCHED_INTR 789 } 790 791 static u32 ath_get_extchanmode(struct ath_softc *sc, 792 struct ieee80211_channel *chan, 793 enum nl80211_channel_type channel_type) 794 { 795 u32 chanmode = 0; 796 797 switch (chan->band) { 798 case IEEE80211_BAND_2GHZ: 799 switch(channel_type) { 800 case NL80211_CHAN_NO_HT: 801 case NL80211_CHAN_HT20: 802 chanmode = CHANNEL_G_HT20; 803 break; 804 case NL80211_CHAN_HT40PLUS: 805 chanmode = CHANNEL_G_HT40PLUS; 806 break; 807 case NL80211_CHAN_HT40MINUS: 808 chanmode = CHANNEL_G_HT40MINUS; 809 break; 810 } 811 break; 812 case IEEE80211_BAND_5GHZ: 813 switch(channel_type) { 814 case NL80211_CHAN_NO_HT: 815 case NL80211_CHAN_HT20: 816 chanmode = CHANNEL_A_HT20; 817 break; 818 case NL80211_CHAN_HT40PLUS: 819 chanmode = CHANNEL_A_HT40PLUS; 820 break; 821 case NL80211_CHAN_HT40MINUS: 822 chanmode = CHANNEL_A_HT40MINUS; 823 break; 824 } 825 break; 826 default: 827 break; 828 } 829 830 return chanmode; 831 } 832 833 static void ath9k_bss_assoc_info(struct ath_softc *sc, 834 struct ieee80211_vif *vif, 835 struct ieee80211_bss_conf *bss_conf) 836 { 837 struct ath_hw *ah = sc->sc_ah; 838 struct ath_common *common = ath9k_hw_common(ah); 839 840 if (bss_conf->assoc) { 841 ath_print(common, ATH_DBG_CONFIG, 842 "Bss Info ASSOC %d, bssid: %pM\n", 843 bss_conf->aid, common->curbssid); 844 845 /* New association, store aid */ 846 common->curaid = bss_conf->aid; 847 ath9k_hw_write_associd(ah); 848 849 /* 850 * Request a re-configuration of Beacon related timers 851 * on the receipt of the first Beacon frame (i.e., 852 * after time sync with the AP). 853 */ 854 sc->ps_flags |= PS_BEACON_SYNC; 855 856 /* Configure the beacon */ 857 ath_beacon_config(sc, vif); 858 859 /* Reset rssi stats */ 860 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER; 861 862 sc->sc_flags |= SC_OP_ANI_RUN; 863 ath_start_ani(common); 864 } else { 865 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n"); 866 common->curaid = 0; 867 /* Stop ANI */ 868 sc->sc_flags &= ~SC_OP_ANI_RUN; 869 del_timer_sync(&common->ani.timer); 870 } 871 } 872 873 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw) 874 { 875 struct ath_hw *ah = sc->sc_ah; 876 struct ath_common *common = ath9k_hw_common(ah); 877 struct ieee80211_channel *channel = hw->conf.channel; 878 int r; 879 880 ath9k_ps_wakeup(sc); 881 ath9k_hw_configpcipowersave(ah, 0, 0); 882 883 if (!ah->curchan) 884 ah->curchan = ath_get_curchannel(sc, sc->hw); 885 886 spin_lock_bh(&sc->rx.pcu_lock); 887 spin_lock_bh(&sc->sc_resetlock); 888 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false); 889 if (r) { 890 ath_print(common, ATH_DBG_FATAL, 891 "Unable to reset channel (%u MHz), " 892 "reset status %d\n", 893 channel->center_freq, r); 894 } 895 spin_unlock_bh(&sc->sc_resetlock); 896 897 ath_update_txpow(sc); 898 if (ath_startrecv(sc) != 0) { 899 ath_print(common, ATH_DBG_FATAL, 900 "Unable to restart recv logic\n"); 901 spin_unlock_bh(&sc->rx.pcu_lock); 902 return; 903 } 904 spin_unlock_bh(&sc->rx.pcu_lock); 905 906 if (sc->sc_flags & SC_OP_BEACONS) 907 ath_beacon_config(sc, NULL); /* restart beacons */ 908 909 /* Re-Enable interrupts */ 910 ath9k_hw_set_interrupts(ah, ah->imask); 911 912 /* Enable LED */ 913 ath9k_hw_cfg_output(ah, ah->led_pin, 914 AR_GPIO_OUTPUT_MUX_AS_OUTPUT); 915 ath9k_hw_set_gpio(ah, ah->led_pin, 0); 916 917 ieee80211_wake_queues(hw); 918 ath9k_ps_restore(sc); 919 } 920 921 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw) 922 { 923 struct ath_hw *ah = sc->sc_ah; 924 struct ieee80211_channel *channel = hw->conf.channel; 925 int r; 926 927 ath9k_ps_wakeup(sc); 928 ieee80211_stop_queues(hw); 929 930 /* 931 * Keep the LED on when the radio is disabled 932 * during idle unassociated state. 933 */ 934 if (!sc->ps_idle) { 935 ath9k_hw_set_gpio(ah, ah->led_pin, 1); 936 ath9k_hw_cfg_gpio_input(ah, ah->led_pin); 937 } 938 939 /* Disable interrupts */ 940 ath9k_hw_set_interrupts(ah, 0); 941 942 ath_drain_all_txq(sc, false); /* clear pending tx frames */ 943 944 spin_lock_bh(&sc->rx.pcu_lock); 945 946 ath_stoprecv(sc); /* turn off frame recv */ 947 ath_flushrecv(sc); /* flush recv queue */ 948 949 if (!ah->curchan) 950 ah->curchan = ath_get_curchannel(sc, hw); 951 952 spin_lock_bh(&sc->sc_resetlock); 953 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false); 954 if (r) { 955 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL, 956 "Unable to reset channel (%u MHz), " 957 "reset status %d\n", 958 channel->center_freq, r); 959 } 960 spin_unlock_bh(&sc->sc_resetlock); 961 962 ath9k_hw_phy_disable(ah); 963 964 spin_unlock_bh(&sc->rx.pcu_lock); 965 966 ath9k_hw_configpcipowersave(ah, 1, 1); 967 ath9k_ps_restore(sc); 968 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP); 969 } 970 971 int ath_reset(struct ath_softc *sc, bool retry_tx) 972 { 973 struct ath_hw *ah = sc->sc_ah; 974 struct ath_common *common = ath9k_hw_common(ah); 975 struct ieee80211_hw *hw = sc->hw; 976 int r; 977 978 /* Stop ANI */ 979 del_timer_sync(&common->ani.timer); 980 981 ieee80211_stop_queues(hw); 982 983 ath9k_hw_set_interrupts(ah, 0); 984 ath_drain_all_txq(sc, retry_tx); 985 986 spin_lock_bh(&sc->rx.pcu_lock); 987 988 ath_stoprecv(sc); 989 ath_flushrecv(sc); 990 991 spin_lock_bh(&sc->sc_resetlock); 992 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false); 993 if (r) 994 ath_print(common, ATH_DBG_FATAL, 995 "Unable to reset hardware; reset status %d\n", r); 996 spin_unlock_bh(&sc->sc_resetlock); 997 998 if (ath_startrecv(sc) != 0) 999 ath_print(common, ATH_DBG_FATAL, 1000 "Unable to start recv logic\n"); 1001 1002 spin_unlock_bh(&sc->rx.pcu_lock); 1003 1004 /* 1005 * We may be doing a reset in response to a request 1006 * that changes the channel so update any state that 1007 * might change as a result. 1008 */ 1009 ath_update_txpow(sc); 1010 1011 if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL))) 1012 ath_beacon_config(sc, NULL); /* restart beacons */ 1013 1014 ath9k_hw_set_interrupts(ah, ah->imask); 1015 1016 if (retry_tx) { 1017 int i; 1018 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) { 1019 if (ATH_TXQ_SETUP(sc, i)) { 1020 spin_lock_bh(&sc->tx.txq[i].axq_lock); 1021 ath_txq_schedule(sc, &sc->tx.txq[i]); 1022 spin_unlock_bh(&sc->tx.txq[i].axq_lock); 1023 } 1024 } 1025 } 1026 1027 ieee80211_wake_queues(hw); 1028 1029 /* Start ANI */ 1030 ath_start_ani(common); 1031 1032 return r; 1033 } 1034 1035 static int ath_get_hal_qnum(u16 queue, struct ath_softc *sc) 1036 { 1037 int qnum; 1038 1039 switch (queue) { 1040 case 0: 1041 qnum = sc->tx.hwq_map[WME_AC_VO]; 1042 break; 1043 case 1: 1044 qnum = sc->tx.hwq_map[WME_AC_VI]; 1045 break; 1046 case 2: 1047 qnum = sc->tx.hwq_map[WME_AC_BE]; 1048 break; 1049 case 3: 1050 qnum = sc->tx.hwq_map[WME_AC_BK]; 1051 break; 1052 default: 1053 qnum = sc->tx.hwq_map[WME_AC_BE]; 1054 break; 1055 } 1056 1057 return qnum; 1058 } 1059 1060 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc) 1061 { 1062 int qnum; 1063 1064 switch (queue) { 1065 case WME_AC_VO: 1066 qnum = 0; 1067 break; 1068 case WME_AC_VI: 1069 qnum = 1; 1070 break; 1071 case WME_AC_BE: 1072 qnum = 2; 1073 break; 1074 case WME_AC_BK: 1075 qnum = 3; 1076 break; 1077 default: 1078 qnum = -1; 1079 break; 1080 } 1081 1082 return qnum; 1083 } 1084 1085 /* XXX: Remove me once we don't depend on ath9k_channel for all 1086 * this redundant data */ 1087 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw, 1088 struct ath9k_channel *ichan) 1089 { 1090 struct ieee80211_channel *chan = hw->conf.channel; 1091 struct ieee80211_conf *conf = &hw->conf; 1092 1093 ichan->channel = chan->center_freq; 1094 ichan->chan = chan; 1095 1096 if (chan->band == IEEE80211_BAND_2GHZ) { 1097 ichan->chanmode = CHANNEL_G; 1098 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G; 1099 } else { 1100 ichan->chanmode = CHANNEL_A; 1101 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM; 1102 } 1103 1104 if (conf_is_ht(conf)) 1105 ichan->chanmode = ath_get_extchanmode(sc, chan, 1106 conf->channel_type); 1107 } 1108 1109 /**********************/ 1110 /* mac80211 callbacks */ 1111 /**********************/ 1112 1113 static int ath9k_start(struct ieee80211_hw *hw) 1114 { 1115 struct ath_wiphy *aphy = hw->priv; 1116 struct ath_softc *sc = aphy->sc; 1117 struct ath_hw *ah = sc->sc_ah; 1118 struct ath_common *common = ath9k_hw_common(ah); 1119 struct ieee80211_channel *curchan = hw->conf.channel; 1120 struct ath9k_channel *init_channel; 1121 int r; 1122 1123 ath_print(common, ATH_DBG_CONFIG, 1124 "Starting driver with initial channel: %d MHz\n", 1125 curchan->center_freq); 1126 1127 mutex_lock(&sc->mutex); 1128 1129 if (ath9k_wiphy_started(sc)) { 1130 if (sc->chan_idx == curchan->hw_value) { 1131 /* 1132 * Already on the operational channel, the new wiphy 1133 * can be marked active. 1134 */ 1135 aphy->state = ATH_WIPHY_ACTIVE; 1136 ieee80211_wake_queues(hw); 1137 } else { 1138 /* 1139 * Another wiphy is on another channel, start the new 1140 * wiphy in paused state. 1141 */ 1142 aphy->state = ATH_WIPHY_PAUSED; 1143 ieee80211_stop_queues(hw); 1144 } 1145 mutex_unlock(&sc->mutex); 1146 return 0; 1147 } 1148 aphy->state = ATH_WIPHY_ACTIVE; 1149 1150 /* setup initial channel */ 1151 1152 sc->chan_idx = curchan->hw_value; 1153 1154 init_channel = ath_get_curchannel(sc, hw); 1155 1156 /* Reset SERDES registers */ 1157 ath9k_hw_configpcipowersave(ah, 0, 0); 1158 1159 /* 1160 * The basic interface to setting the hardware in a good 1161 * state is ``reset''. On return the hardware is known to 1162 * be powered up and with interrupts disabled. This must 1163 * be followed by initialization of the appropriate bits 1164 * and then setup of the interrupt mask. 1165 */ 1166 spin_lock_bh(&sc->rx.pcu_lock); 1167 spin_lock_bh(&sc->sc_resetlock); 1168 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false); 1169 if (r) { 1170 ath_print(common, ATH_DBG_FATAL, 1171 "Unable to reset hardware; reset status %d " 1172 "(freq %u MHz)\n", r, 1173 curchan->center_freq); 1174 spin_unlock_bh(&sc->sc_resetlock); 1175 spin_unlock_bh(&sc->rx.pcu_lock); 1176 goto mutex_unlock; 1177 } 1178 spin_unlock_bh(&sc->sc_resetlock); 1179 1180 /* 1181 * This is needed only to setup initial state 1182 * but it's best done after a reset. 1183 */ 1184 ath_update_txpow(sc); 1185 1186 /* 1187 * Setup the hardware after reset: 1188 * The receive engine is set going. 1189 * Frame transmit is handled entirely 1190 * in the frame output path; there's nothing to do 1191 * here except setup the interrupt mask. 1192 */ 1193 if (ath_startrecv(sc) != 0) { 1194 ath_print(common, ATH_DBG_FATAL, 1195 "Unable to start recv logic\n"); 1196 r = -EIO; 1197 spin_unlock_bh(&sc->rx.pcu_lock); 1198 goto mutex_unlock; 1199 } 1200 spin_unlock_bh(&sc->rx.pcu_lock); 1201 1202 /* Setup our intr mask. */ 1203 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL | 1204 ATH9K_INT_RXORN | ATH9K_INT_FATAL | 1205 ATH9K_INT_GLOBAL; 1206 1207 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) 1208 ah->imask |= ATH9K_INT_RXHP | 1209 ATH9K_INT_RXLP | 1210 ATH9K_INT_BB_WATCHDOG; 1211 else 1212 ah->imask |= ATH9K_INT_RX; 1213 1214 ah->imask |= ATH9K_INT_GTT; 1215 1216 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT) 1217 ah->imask |= ATH9K_INT_CST; 1218 1219 sc->sc_flags &= ~SC_OP_INVALID; 1220 sc->sc_ah->is_monitoring = false; 1221 1222 /* Disable BMISS interrupt when we're not associated */ 1223 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS); 1224 ath9k_hw_set_interrupts(ah, ah->imask); 1225 1226 ieee80211_wake_queues(hw); 1227 1228 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0); 1229 1230 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) && 1231 !ah->btcoex_hw.enabled) { 1232 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT, 1233 AR_STOMP_LOW_WLAN_WGHT); 1234 ath9k_hw_btcoex_enable(ah); 1235 1236 if (common->bus_ops->bt_coex_prep) 1237 common->bus_ops->bt_coex_prep(common); 1238 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE) 1239 ath9k_btcoex_timer_resume(sc); 1240 } 1241 1242 mutex_unlock: 1243 mutex_unlock(&sc->mutex); 1244 1245 return r; 1246 } 1247 1248 static int ath9k_tx(struct ieee80211_hw *hw, 1249 struct sk_buff *skb) 1250 { 1251 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 1252 struct ath_wiphy *aphy = hw->priv; 1253 struct ath_softc *sc = aphy->sc; 1254 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1255 struct ath_tx_control txctl; 1256 int padpos, padsize; 1257 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data; 1258 int qnum; 1259 1260 if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) { 1261 ath_print(common, ATH_DBG_XMIT, 1262 "ath9k: %s: TX in unexpected wiphy state " 1263 "%d\n", wiphy_name(hw->wiphy), aphy->state); 1264 goto exit; 1265 } 1266 1267 if (sc->ps_enabled) { 1268 /* 1269 * mac80211 does not set PM field for normal data frames, so we 1270 * need to update that based on the current PS mode. 1271 */ 1272 if (ieee80211_is_data(hdr->frame_control) && 1273 !ieee80211_is_nullfunc(hdr->frame_control) && 1274 !ieee80211_has_pm(hdr->frame_control)) { 1275 ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame " 1276 "while in PS mode\n"); 1277 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM); 1278 } 1279 } 1280 1281 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) { 1282 /* 1283 * We are using PS-Poll and mac80211 can request TX while in 1284 * power save mode. Need to wake up hardware for the TX to be 1285 * completed and if needed, also for RX of buffered frames. 1286 */ 1287 ath9k_ps_wakeup(sc); 1288 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) 1289 ath9k_hw_setrxabort(sc->sc_ah, 0); 1290 if (ieee80211_is_pspoll(hdr->frame_control)) { 1291 ath_print(common, ATH_DBG_PS, 1292 "Sending PS-Poll to pick a buffered frame\n"); 1293 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA; 1294 } else { 1295 ath_print(common, ATH_DBG_PS, 1296 "Wake up to complete TX\n"); 1297 sc->ps_flags |= PS_WAIT_FOR_TX_ACK; 1298 } 1299 /* 1300 * The actual restore operation will happen only after 1301 * the sc_flags bit is cleared. We are just dropping 1302 * the ps_usecount here. 1303 */ 1304 ath9k_ps_restore(sc); 1305 } 1306 1307 memset(&txctl, 0, sizeof(struct ath_tx_control)); 1308 1309 /* 1310 * As a temporary workaround, assign seq# here; this will likely need 1311 * to be cleaned up to work better with Beacon transmission and virtual 1312 * BSSes. 1313 */ 1314 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { 1315 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) 1316 sc->tx.seq_no += 0x10; 1317 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); 1318 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no); 1319 } 1320 1321 /* Add the padding after the header if this is not already done */ 1322 padpos = ath9k_cmn_padpos(hdr->frame_control); 1323 padsize = padpos & 3; 1324 if (padsize && skb->len>padpos) { 1325 if (skb_headroom(skb) < padsize) 1326 return -1; 1327 skb_push(skb, padsize); 1328 memmove(skb->data, skb->data + padsize, padpos); 1329 } 1330 1331 qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc); 1332 txctl.txq = &sc->tx.txq[qnum]; 1333 1334 ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb); 1335 1336 if (ath_tx_start(hw, skb, &txctl) != 0) { 1337 ath_print(common, ATH_DBG_XMIT, "TX failed\n"); 1338 goto exit; 1339 } 1340 1341 return 0; 1342 exit: 1343 dev_kfree_skb_any(skb); 1344 return 0; 1345 } 1346 1347 static void ath9k_stop(struct ieee80211_hw *hw) 1348 { 1349 struct ath_wiphy *aphy = hw->priv; 1350 struct ath_softc *sc = aphy->sc; 1351 struct ath_hw *ah = sc->sc_ah; 1352 struct ath_common *common = ath9k_hw_common(ah); 1353 int i; 1354 1355 mutex_lock(&sc->mutex); 1356 1357 aphy->state = ATH_WIPHY_INACTIVE; 1358 1359 if (led_blink) 1360 cancel_delayed_work_sync(&sc->ath_led_blink_work); 1361 1362 cancel_delayed_work_sync(&sc->tx_complete_work); 1363 cancel_work_sync(&sc->paprd_work); 1364 cancel_work_sync(&sc->hw_check_work); 1365 1366 for (i = 0; i < sc->num_sec_wiphy; i++) { 1367 if (sc->sec_wiphy[i]) 1368 break; 1369 } 1370 1371 if (i == sc->num_sec_wiphy) { 1372 cancel_delayed_work_sync(&sc->wiphy_work); 1373 cancel_work_sync(&sc->chan_work); 1374 } 1375 1376 if (sc->sc_flags & SC_OP_INVALID) { 1377 ath_print(common, ATH_DBG_ANY, "Device not present\n"); 1378 mutex_unlock(&sc->mutex); 1379 return; 1380 } 1381 1382 if (ath9k_wiphy_started(sc)) { 1383 mutex_unlock(&sc->mutex); 1384 return; /* another wiphy still in use */ 1385 } 1386 1387 /* Ensure HW is awake when we try to shut it down. */ 1388 ath9k_ps_wakeup(sc); 1389 1390 if (ah->btcoex_hw.enabled) { 1391 ath9k_hw_btcoex_disable(ah); 1392 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE) 1393 ath9k_btcoex_timer_pause(sc); 1394 } 1395 1396 /* make sure h/w will not generate any interrupt 1397 * before setting the invalid flag. */ 1398 ath9k_hw_set_interrupts(ah, 0); 1399 1400 spin_lock_bh(&sc->rx.pcu_lock); 1401 if (!(sc->sc_flags & SC_OP_INVALID)) { 1402 ath_drain_all_txq(sc, false); 1403 ath_stoprecv(sc); 1404 ath9k_hw_phy_disable(ah); 1405 } else 1406 sc->rx.rxlink = NULL; 1407 spin_unlock_bh(&sc->rx.pcu_lock); 1408 1409 /* disable HAL and put h/w to sleep */ 1410 ath9k_hw_disable(ah); 1411 ath9k_hw_configpcipowersave(ah, 1, 1); 1412 ath9k_ps_restore(sc); 1413 1414 /* Finally, put the chip in FULL SLEEP mode */ 1415 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP); 1416 1417 sc->sc_flags |= SC_OP_INVALID; 1418 1419 mutex_unlock(&sc->mutex); 1420 1421 ath_print(common, ATH_DBG_CONFIG, "Driver halt\n"); 1422 } 1423 1424 static int ath9k_add_interface(struct ieee80211_hw *hw, 1425 struct ieee80211_vif *vif) 1426 { 1427 struct ath_wiphy *aphy = hw->priv; 1428 struct ath_softc *sc = aphy->sc; 1429 struct ath_hw *ah = sc->sc_ah; 1430 struct ath_common *common = ath9k_hw_common(ah); 1431 struct ath_vif *avp = (void *)vif->drv_priv; 1432 enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED; 1433 int ret = 0; 1434 1435 mutex_lock(&sc->mutex); 1436 1437 switch (vif->type) { 1438 case NL80211_IFTYPE_STATION: 1439 ic_opmode = NL80211_IFTYPE_STATION; 1440 break; 1441 case NL80211_IFTYPE_WDS: 1442 ic_opmode = NL80211_IFTYPE_WDS; 1443 break; 1444 case NL80211_IFTYPE_ADHOC: 1445 case NL80211_IFTYPE_AP: 1446 case NL80211_IFTYPE_MESH_POINT: 1447 if (sc->nbcnvifs >= ATH_BCBUF) { 1448 ret = -ENOBUFS; 1449 goto out; 1450 } 1451 ic_opmode = vif->type; 1452 break; 1453 default: 1454 ath_print(common, ATH_DBG_FATAL, 1455 "Interface type %d not yet supported\n", vif->type); 1456 ret = -EOPNOTSUPP; 1457 goto out; 1458 } 1459 1460 ath_print(common, ATH_DBG_CONFIG, 1461 "Attach a VIF of type: %d\n", ic_opmode); 1462 1463 /* Set the VIF opmode */ 1464 avp->av_opmode = ic_opmode; 1465 avp->av_bslot = -1; 1466 1467 sc->nvifs++; 1468 1469 ath9k_set_bssid_mask(hw, vif); 1470 1471 if (sc->nvifs > 1) 1472 goto out; /* skip global settings for secondary vif */ 1473 1474 if (ic_opmode == NL80211_IFTYPE_AP) { 1475 ath9k_hw_set_tsfadjust(ah, 1); 1476 sc->sc_flags |= SC_OP_TSF_RESET; 1477 } 1478 1479 /* Set the device opmode */ 1480 ah->opmode = ic_opmode; 1481 1482 /* 1483 * Enable MIB interrupts when there are hardware phy counters. 1484 * Note we only do this (at the moment) for station mode. 1485 */ 1486 if ((vif->type == NL80211_IFTYPE_STATION) || 1487 (vif->type == NL80211_IFTYPE_ADHOC) || 1488 (vif->type == NL80211_IFTYPE_MESH_POINT)) { 1489 if (ah->config.enable_ani) 1490 ah->imask |= ATH9K_INT_MIB; 1491 ah->imask |= ATH9K_INT_TSFOOR; 1492 } 1493 1494 ath9k_hw_set_interrupts(ah, ah->imask); 1495 1496 if (vif->type == NL80211_IFTYPE_AP || 1497 vif->type == NL80211_IFTYPE_ADHOC) { 1498 sc->sc_flags |= SC_OP_ANI_RUN; 1499 ath_start_ani(common); 1500 } 1501 1502 out: 1503 mutex_unlock(&sc->mutex); 1504 return ret; 1505 } 1506 1507 static void ath9k_remove_interface(struct ieee80211_hw *hw, 1508 struct ieee80211_vif *vif) 1509 { 1510 struct ath_wiphy *aphy = hw->priv; 1511 struct ath_softc *sc = aphy->sc; 1512 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1513 struct ath_vif *avp = (void *)vif->drv_priv; 1514 int i; 1515 1516 ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n"); 1517 1518 mutex_lock(&sc->mutex); 1519 1520 /* Stop ANI */ 1521 sc->sc_flags &= ~SC_OP_ANI_RUN; 1522 del_timer_sync(&common->ani.timer); 1523 1524 /* Reclaim beacon resources */ 1525 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) || 1526 (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) || 1527 (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) { 1528 ath9k_ps_wakeup(sc); 1529 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq); 1530 ath9k_ps_restore(sc); 1531 } 1532 1533 ath_beacon_return(sc, avp); 1534 sc->sc_flags &= ~SC_OP_BEACONS; 1535 1536 for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) { 1537 if (sc->beacon.bslot[i] == vif) { 1538 printk(KERN_DEBUG "%s: vif had allocated beacon " 1539 "slot\n", __func__); 1540 sc->beacon.bslot[i] = NULL; 1541 sc->beacon.bslot_aphy[i] = NULL; 1542 } 1543 } 1544 1545 sc->nvifs--; 1546 1547 mutex_unlock(&sc->mutex); 1548 } 1549 1550 static void ath9k_enable_ps(struct ath_softc *sc) 1551 { 1552 struct ath_hw *ah = sc->sc_ah; 1553 1554 sc->ps_enabled = true; 1555 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) { 1556 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) { 1557 ah->imask |= ATH9K_INT_TIM_TIMER; 1558 ath9k_hw_set_interrupts(ah, ah->imask); 1559 } 1560 ath9k_hw_setrxabort(ah, 1); 1561 } 1562 } 1563 1564 static void ath9k_disable_ps(struct ath_softc *sc) 1565 { 1566 struct ath_hw *ah = sc->sc_ah; 1567 1568 sc->ps_enabled = false; 1569 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE); 1570 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) { 1571 ath9k_hw_setrxabort(ah, 0); 1572 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON | 1573 PS_WAIT_FOR_CAB | 1574 PS_WAIT_FOR_PSPOLL_DATA | 1575 PS_WAIT_FOR_TX_ACK); 1576 if (ah->imask & ATH9K_INT_TIM_TIMER) { 1577 ah->imask &= ~ATH9K_INT_TIM_TIMER; 1578 ath9k_hw_set_interrupts(ah, ah->imask); 1579 } 1580 } 1581 1582 } 1583 1584 static int ath9k_config(struct ieee80211_hw *hw, u32 changed) 1585 { 1586 struct ath_wiphy *aphy = hw->priv; 1587 struct ath_softc *sc = aphy->sc; 1588 struct ath_hw *ah = sc->sc_ah; 1589 struct ath_common *common = ath9k_hw_common(ah); 1590 struct ieee80211_conf *conf = &hw->conf; 1591 bool disable_radio; 1592 1593 mutex_lock(&sc->mutex); 1594 1595 /* 1596 * Leave this as the first check because we need to turn on the 1597 * radio if it was disabled before prior to processing the rest 1598 * of the changes. Likewise we must only disable the radio towards 1599 * the end. 1600 */ 1601 if (changed & IEEE80211_CONF_CHANGE_IDLE) { 1602 bool enable_radio; 1603 bool all_wiphys_idle; 1604 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE); 1605 1606 spin_lock_bh(&sc->wiphy_lock); 1607 all_wiphys_idle = ath9k_all_wiphys_idle(sc); 1608 ath9k_set_wiphy_idle(aphy, idle); 1609 1610 enable_radio = (!idle && all_wiphys_idle); 1611 1612 /* 1613 * After we unlock here its possible another wiphy 1614 * can be re-renabled so to account for that we will 1615 * only disable the radio toward the end of this routine 1616 * if by then all wiphys are still idle. 1617 */ 1618 spin_unlock_bh(&sc->wiphy_lock); 1619 1620 if (enable_radio) { 1621 sc->ps_idle = false; 1622 ath_radio_enable(sc, hw); 1623 ath_print(common, ATH_DBG_CONFIG, 1624 "not-idle: enabling radio\n"); 1625 } 1626 } 1627 1628 /* 1629 * We just prepare to enable PS. We have to wait until our AP has 1630 * ACK'd our null data frame to disable RX otherwise we'll ignore 1631 * those ACKs and end up retransmitting the same null data frames. 1632 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode. 1633 */ 1634 if (changed & IEEE80211_CONF_CHANGE_PS) { 1635 unsigned long flags; 1636 spin_lock_irqsave(&sc->sc_pm_lock, flags); 1637 if (conf->flags & IEEE80211_CONF_PS) 1638 ath9k_enable_ps(sc); 1639 else 1640 ath9k_disable_ps(sc); 1641 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 1642 } 1643 1644 if (changed & IEEE80211_CONF_CHANGE_MONITOR) { 1645 if (conf->flags & IEEE80211_CONF_MONITOR) { 1646 ath_print(common, ATH_DBG_CONFIG, 1647 "Monitor mode is enabled\n"); 1648 sc->sc_ah->is_monitoring = true; 1649 } else { 1650 ath_print(common, ATH_DBG_CONFIG, 1651 "Monitor mode is disabled\n"); 1652 sc->sc_ah->is_monitoring = false; 1653 } 1654 } 1655 1656 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) { 1657 struct ieee80211_channel *curchan = hw->conf.channel; 1658 int pos = curchan->hw_value; 1659 int old_pos = -1; 1660 unsigned long flags; 1661 1662 if (ah->curchan) 1663 old_pos = ah->curchan - &ah->channels[0]; 1664 1665 aphy->chan_idx = pos; 1666 aphy->chan_is_ht = conf_is_ht(conf); 1667 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) 1668 sc->sc_flags |= SC_OP_OFFCHANNEL; 1669 else 1670 sc->sc_flags &= ~SC_OP_OFFCHANNEL; 1671 1672 if (aphy->state == ATH_WIPHY_SCAN || 1673 aphy->state == ATH_WIPHY_ACTIVE) 1674 ath9k_wiphy_pause_all_forced(sc, aphy); 1675 else { 1676 /* 1677 * Do not change operational channel based on a paused 1678 * wiphy changes. 1679 */ 1680 goto skip_chan_change; 1681 } 1682 1683 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n", 1684 curchan->center_freq); 1685 1686 /* XXX: remove me eventualy */ 1687 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]); 1688 1689 ath_update_chainmask(sc, conf_is_ht(conf)); 1690 1691 /* update survey stats for the old channel before switching */ 1692 spin_lock_irqsave(&common->cc_lock, flags); 1693 ath_update_survey_stats(sc); 1694 spin_unlock_irqrestore(&common->cc_lock, flags); 1695 1696 /* 1697 * If the operating channel changes, change the survey in-use flags 1698 * along with it. 1699 * Reset the survey data for the new channel, unless we're switching 1700 * back to the operating channel from an off-channel operation. 1701 */ 1702 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) && 1703 sc->cur_survey != &sc->survey[pos]) { 1704 1705 if (sc->cur_survey) 1706 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE; 1707 1708 sc->cur_survey = &sc->survey[pos]; 1709 1710 memset(sc->cur_survey, 0, sizeof(struct survey_info)); 1711 sc->cur_survey->filled |= SURVEY_INFO_IN_USE; 1712 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) { 1713 memset(&sc->survey[pos], 0, sizeof(struct survey_info)); 1714 } 1715 1716 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) { 1717 ath_print(common, ATH_DBG_FATAL, 1718 "Unable to set channel\n"); 1719 mutex_unlock(&sc->mutex); 1720 return -EINVAL; 1721 } 1722 1723 /* 1724 * The most recent snapshot of channel->noisefloor for the old 1725 * channel is only available after the hardware reset. Copy it to 1726 * the survey stats now. 1727 */ 1728 if (old_pos >= 0) 1729 ath_update_survey_nf(sc, old_pos); 1730 } 1731 1732 skip_chan_change: 1733 if (changed & IEEE80211_CONF_CHANGE_POWER) { 1734 sc->config.txpowlimit = 2 * conf->power_level; 1735 ath_update_txpow(sc); 1736 } 1737 1738 spin_lock_bh(&sc->wiphy_lock); 1739 disable_radio = ath9k_all_wiphys_idle(sc); 1740 spin_unlock_bh(&sc->wiphy_lock); 1741 1742 if (disable_radio) { 1743 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n"); 1744 sc->ps_idle = true; 1745 ath_radio_disable(sc, hw); 1746 } 1747 1748 mutex_unlock(&sc->mutex); 1749 1750 return 0; 1751 } 1752 1753 #define SUPPORTED_FILTERS \ 1754 (FIF_PROMISC_IN_BSS | \ 1755 FIF_ALLMULTI | \ 1756 FIF_CONTROL | \ 1757 FIF_PSPOLL | \ 1758 FIF_OTHER_BSS | \ 1759 FIF_BCN_PRBRESP_PROMISC | \ 1760 FIF_PROBE_REQ | \ 1761 FIF_FCSFAIL) 1762 1763 /* FIXME: sc->sc_full_reset ? */ 1764 static void ath9k_configure_filter(struct ieee80211_hw *hw, 1765 unsigned int changed_flags, 1766 unsigned int *total_flags, 1767 u64 multicast) 1768 { 1769 struct ath_wiphy *aphy = hw->priv; 1770 struct ath_softc *sc = aphy->sc; 1771 u32 rfilt; 1772 1773 changed_flags &= SUPPORTED_FILTERS; 1774 *total_flags &= SUPPORTED_FILTERS; 1775 1776 sc->rx.rxfilter = *total_flags; 1777 ath9k_ps_wakeup(sc); 1778 rfilt = ath_calcrxfilter(sc); 1779 ath9k_hw_setrxfilter(sc->sc_ah, rfilt); 1780 ath9k_ps_restore(sc); 1781 1782 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG, 1783 "Set HW RX filter: 0x%x\n", rfilt); 1784 } 1785 1786 static int ath9k_sta_add(struct ieee80211_hw *hw, 1787 struct ieee80211_vif *vif, 1788 struct ieee80211_sta *sta) 1789 { 1790 struct ath_wiphy *aphy = hw->priv; 1791 struct ath_softc *sc = aphy->sc; 1792 1793 ath_node_attach(sc, sta); 1794 1795 return 0; 1796 } 1797 1798 static int ath9k_sta_remove(struct ieee80211_hw *hw, 1799 struct ieee80211_vif *vif, 1800 struct ieee80211_sta *sta) 1801 { 1802 struct ath_wiphy *aphy = hw->priv; 1803 struct ath_softc *sc = aphy->sc; 1804 1805 ath_node_detach(sc, sta); 1806 1807 return 0; 1808 } 1809 1810 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue, 1811 const struct ieee80211_tx_queue_params *params) 1812 { 1813 struct ath_wiphy *aphy = hw->priv; 1814 struct ath_softc *sc = aphy->sc; 1815 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1816 struct ath9k_tx_queue_info qi; 1817 int ret = 0, qnum; 1818 1819 if (queue >= WME_NUM_AC) 1820 return 0; 1821 1822 mutex_lock(&sc->mutex); 1823 1824 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info)); 1825 1826 qi.tqi_aifs = params->aifs; 1827 qi.tqi_cwmin = params->cw_min; 1828 qi.tqi_cwmax = params->cw_max; 1829 qi.tqi_burstTime = params->txop; 1830 qnum = ath_get_hal_qnum(queue, sc); 1831 1832 ath_print(common, ATH_DBG_CONFIG, 1833 "Configure tx [queue/halq] [%d/%d], " 1834 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n", 1835 queue, qnum, params->aifs, params->cw_min, 1836 params->cw_max, params->txop); 1837 1838 ret = ath_txq_update(sc, qnum, &qi); 1839 if (ret) 1840 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n"); 1841 1842 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) 1843 if ((qnum == sc->tx.hwq_map[WME_AC_BE]) && !ret) 1844 ath_beaconq_config(sc); 1845 1846 mutex_unlock(&sc->mutex); 1847 1848 return ret; 1849 } 1850 1851 static int ath9k_set_key(struct ieee80211_hw *hw, 1852 enum set_key_cmd cmd, 1853 struct ieee80211_vif *vif, 1854 struct ieee80211_sta *sta, 1855 struct ieee80211_key_conf *key) 1856 { 1857 struct ath_wiphy *aphy = hw->priv; 1858 struct ath_softc *sc = aphy->sc; 1859 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1860 int ret = 0; 1861 1862 if (modparam_nohwcrypt) 1863 return -ENOSPC; 1864 1865 mutex_lock(&sc->mutex); 1866 ath9k_ps_wakeup(sc); 1867 ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n"); 1868 1869 switch (cmd) { 1870 case SET_KEY: 1871 ret = ath_key_config(common, vif, sta, key); 1872 if (ret >= 0) { 1873 key->hw_key_idx = ret; 1874 /* push IV and Michael MIC generation to stack */ 1875 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV; 1876 if (key->cipher == WLAN_CIPHER_SUITE_TKIP) 1877 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC; 1878 if (sc->sc_ah->sw_mgmt_crypto && 1879 key->cipher == WLAN_CIPHER_SUITE_CCMP) 1880 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT; 1881 ret = 0; 1882 } 1883 break; 1884 case DISABLE_KEY: 1885 ath_key_delete(common, key); 1886 break; 1887 default: 1888 ret = -EINVAL; 1889 } 1890 1891 ath9k_ps_restore(sc); 1892 mutex_unlock(&sc->mutex); 1893 1894 return ret; 1895 } 1896 1897 static void ath9k_bss_info_changed(struct ieee80211_hw *hw, 1898 struct ieee80211_vif *vif, 1899 struct ieee80211_bss_conf *bss_conf, 1900 u32 changed) 1901 { 1902 struct ath_wiphy *aphy = hw->priv; 1903 struct ath_softc *sc = aphy->sc; 1904 struct ath_hw *ah = sc->sc_ah; 1905 struct ath_common *common = ath9k_hw_common(ah); 1906 struct ath_vif *avp = (void *)vif->drv_priv; 1907 int slottime; 1908 int error; 1909 1910 mutex_lock(&sc->mutex); 1911 1912 if (changed & BSS_CHANGED_BSSID) { 1913 /* Set BSSID */ 1914 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN); 1915 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN); 1916 common->curaid = 0; 1917 ath9k_hw_write_associd(ah); 1918 1919 /* Set aggregation protection mode parameters */ 1920 sc->config.ath_aggr_prot = 0; 1921 1922 /* Only legacy IBSS for now */ 1923 if (vif->type == NL80211_IFTYPE_ADHOC) 1924 ath_update_chainmask(sc, 0); 1925 1926 ath_print(common, ATH_DBG_CONFIG, 1927 "BSSID: %pM aid: 0x%x\n", 1928 common->curbssid, common->curaid); 1929 1930 /* need to reconfigure the beacon */ 1931 sc->sc_flags &= ~SC_OP_BEACONS ; 1932 } 1933 1934 /* Enable transmission of beacons (AP, IBSS, MESH) */ 1935 if ((changed & BSS_CHANGED_BEACON) || 1936 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) { 1937 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq); 1938 error = ath_beacon_alloc(aphy, vif); 1939 if (!error) 1940 ath_beacon_config(sc, vif); 1941 } 1942 1943 if (changed & BSS_CHANGED_ERP_SLOT) { 1944 if (bss_conf->use_short_slot) 1945 slottime = 9; 1946 else 1947 slottime = 20; 1948 if (vif->type == NL80211_IFTYPE_AP) { 1949 /* 1950 * Defer update, so that connected stations can adjust 1951 * their settings at the same time. 1952 * See beacon.c for more details 1953 */ 1954 sc->beacon.slottime = slottime; 1955 sc->beacon.updateslot = UPDATE; 1956 } else { 1957 ah->slottime = slottime; 1958 ath9k_hw_init_global_settings(ah); 1959 } 1960 } 1961 1962 /* Disable transmission of beacons */ 1963 if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon) 1964 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq); 1965 1966 if (changed & BSS_CHANGED_BEACON_INT) { 1967 sc->beacon_interval = bss_conf->beacon_int; 1968 /* 1969 * In case of AP mode, the HW TSF has to be reset 1970 * when the beacon interval changes. 1971 */ 1972 if (vif->type == NL80211_IFTYPE_AP) { 1973 sc->sc_flags |= SC_OP_TSF_RESET; 1974 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq); 1975 error = ath_beacon_alloc(aphy, vif); 1976 if (!error) 1977 ath_beacon_config(sc, vif); 1978 } else { 1979 ath_beacon_config(sc, vif); 1980 } 1981 } 1982 1983 if (changed & BSS_CHANGED_ERP_PREAMBLE) { 1984 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n", 1985 bss_conf->use_short_preamble); 1986 if (bss_conf->use_short_preamble) 1987 sc->sc_flags |= SC_OP_PREAMBLE_SHORT; 1988 else 1989 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT; 1990 } 1991 1992 if (changed & BSS_CHANGED_ERP_CTS_PROT) { 1993 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n", 1994 bss_conf->use_cts_prot); 1995 if (bss_conf->use_cts_prot && 1996 hw->conf.channel->band != IEEE80211_BAND_5GHZ) 1997 sc->sc_flags |= SC_OP_PROTECT_ENABLE; 1998 else 1999 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE; 2000 } 2001 2002 if (changed & BSS_CHANGED_ASSOC) { 2003 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n", 2004 bss_conf->assoc); 2005 ath9k_bss_assoc_info(sc, vif, bss_conf); 2006 } 2007 2008 mutex_unlock(&sc->mutex); 2009 } 2010 2011 static u64 ath9k_get_tsf(struct ieee80211_hw *hw) 2012 { 2013 u64 tsf; 2014 struct ath_wiphy *aphy = hw->priv; 2015 struct ath_softc *sc = aphy->sc; 2016 2017 mutex_lock(&sc->mutex); 2018 tsf = ath9k_hw_gettsf64(sc->sc_ah); 2019 mutex_unlock(&sc->mutex); 2020 2021 return tsf; 2022 } 2023 2024 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf) 2025 { 2026 struct ath_wiphy *aphy = hw->priv; 2027 struct ath_softc *sc = aphy->sc; 2028 2029 mutex_lock(&sc->mutex); 2030 ath9k_hw_settsf64(sc->sc_ah, tsf); 2031 mutex_unlock(&sc->mutex); 2032 } 2033 2034 static void ath9k_reset_tsf(struct ieee80211_hw *hw) 2035 { 2036 struct ath_wiphy *aphy = hw->priv; 2037 struct ath_softc *sc = aphy->sc; 2038 2039 mutex_lock(&sc->mutex); 2040 2041 ath9k_ps_wakeup(sc); 2042 ath9k_hw_reset_tsf(sc->sc_ah); 2043 ath9k_ps_restore(sc); 2044 2045 mutex_unlock(&sc->mutex); 2046 } 2047 2048 static int ath9k_ampdu_action(struct ieee80211_hw *hw, 2049 struct ieee80211_vif *vif, 2050 enum ieee80211_ampdu_mlme_action action, 2051 struct ieee80211_sta *sta, 2052 u16 tid, u16 *ssn) 2053 { 2054 struct ath_wiphy *aphy = hw->priv; 2055 struct ath_softc *sc = aphy->sc; 2056 int ret = 0; 2057 2058 local_bh_disable(); 2059 2060 switch (action) { 2061 case IEEE80211_AMPDU_RX_START: 2062 if (!(sc->sc_flags & SC_OP_RXAGGR)) 2063 ret = -ENOTSUPP; 2064 break; 2065 case IEEE80211_AMPDU_RX_STOP: 2066 break; 2067 case IEEE80211_AMPDU_TX_START: 2068 ath9k_ps_wakeup(sc); 2069 ret = ath_tx_aggr_start(sc, sta, tid, ssn); 2070 if (!ret) 2071 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid); 2072 ath9k_ps_restore(sc); 2073 break; 2074 case IEEE80211_AMPDU_TX_STOP: 2075 ath9k_ps_wakeup(sc); 2076 ath_tx_aggr_stop(sc, sta, tid); 2077 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid); 2078 ath9k_ps_restore(sc); 2079 break; 2080 case IEEE80211_AMPDU_TX_OPERATIONAL: 2081 ath9k_ps_wakeup(sc); 2082 ath_tx_aggr_resume(sc, sta, tid); 2083 ath9k_ps_restore(sc); 2084 break; 2085 default: 2086 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL, 2087 "Unknown AMPDU action\n"); 2088 } 2089 2090 local_bh_enable(); 2091 2092 return ret; 2093 } 2094 2095 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx, 2096 struct survey_info *survey) 2097 { 2098 struct ath_wiphy *aphy = hw->priv; 2099 struct ath_softc *sc = aphy->sc; 2100 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 2101 struct ieee80211_supported_band *sband; 2102 struct ieee80211_channel *chan; 2103 unsigned long flags; 2104 int pos; 2105 2106 spin_lock_irqsave(&common->cc_lock, flags); 2107 if (idx == 0) 2108 ath_update_survey_stats(sc); 2109 2110 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ]; 2111 if (sband && idx >= sband->n_channels) { 2112 idx -= sband->n_channels; 2113 sband = NULL; 2114 } 2115 2116 if (!sband) 2117 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ]; 2118 2119 if (!sband || idx >= sband->n_channels) { 2120 spin_unlock_irqrestore(&common->cc_lock, flags); 2121 return -ENOENT; 2122 } 2123 2124 chan = &sband->channels[idx]; 2125 pos = chan->hw_value; 2126 memcpy(survey, &sc->survey[pos], sizeof(*survey)); 2127 survey->channel = chan; 2128 spin_unlock_irqrestore(&common->cc_lock, flags); 2129 2130 return 0; 2131 } 2132 2133 static void ath9k_sw_scan_start(struct ieee80211_hw *hw) 2134 { 2135 struct ath_wiphy *aphy = hw->priv; 2136 struct ath_softc *sc = aphy->sc; 2137 2138 mutex_lock(&sc->mutex); 2139 if (ath9k_wiphy_scanning(sc)) { 2140 /* 2141 * There is a race here in mac80211 but fixing it requires 2142 * we revisit how we handle the scan complete callback. 2143 * After mac80211 fixes we will not have configured hardware 2144 * to the home channel nor would we have configured the RX 2145 * filter yet. 2146 */ 2147 mutex_unlock(&sc->mutex); 2148 return; 2149 } 2150 2151 aphy->state = ATH_WIPHY_SCAN; 2152 ath9k_wiphy_pause_all_forced(sc, aphy); 2153 mutex_unlock(&sc->mutex); 2154 } 2155 2156 /* 2157 * XXX: this requires a revisit after the driver 2158 * scan_complete gets moved to another place/removed in mac80211. 2159 */ 2160 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw) 2161 { 2162 struct ath_wiphy *aphy = hw->priv; 2163 struct ath_softc *sc = aphy->sc; 2164 2165 mutex_lock(&sc->mutex); 2166 aphy->state = ATH_WIPHY_ACTIVE; 2167 mutex_unlock(&sc->mutex); 2168 } 2169 2170 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class) 2171 { 2172 struct ath_wiphy *aphy = hw->priv; 2173 struct ath_softc *sc = aphy->sc; 2174 struct ath_hw *ah = sc->sc_ah; 2175 2176 mutex_lock(&sc->mutex); 2177 ah->coverage_class = coverage_class; 2178 ath9k_hw_init_global_settings(ah); 2179 mutex_unlock(&sc->mutex); 2180 } 2181 2182 struct ieee80211_ops ath9k_ops = { 2183 .tx = ath9k_tx, 2184 .start = ath9k_start, 2185 .stop = ath9k_stop, 2186 .add_interface = ath9k_add_interface, 2187 .remove_interface = ath9k_remove_interface, 2188 .config = ath9k_config, 2189 .configure_filter = ath9k_configure_filter, 2190 .sta_add = ath9k_sta_add, 2191 .sta_remove = ath9k_sta_remove, 2192 .conf_tx = ath9k_conf_tx, 2193 .bss_info_changed = ath9k_bss_info_changed, 2194 .set_key = ath9k_set_key, 2195 .get_tsf = ath9k_get_tsf, 2196 .set_tsf = ath9k_set_tsf, 2197 .reset_tsf = ath9k_reset_tsf, 2198 .ampdu_action = ath9k_ampdu_action, 2199 .get_survey = ath9k_get_survey, 2200 .sw_scan_start = ath9k_sw_scan_start, 2201 .sw_scan_complete = ath9k_sw_scan_complete, 2202 .rfkill_poll = ath9k_rfkill_poll_state, 2203 .set_coverage_class = ath9k_set_coverage_class, 2204 }; 2205