1 /* 2 * Copyright (c) 2008-2009 Atheros Communications Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #include <linux/nl80211.h> 18 #include "ath9k.h" 19 #include "btcoex.h" 20 21 static void ath_update_txpow(struct ath_softc *sc) 22 { 23 struct ath_hw *ah = sc->sc_ah; 24 25 if (sc->curtxpow != sc->config.txpowlimit) { 26 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false); 27 /* read back in case value is clamped */ 28 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit; 29 } 30 } 31 32 static u8 parse_mpdudensity(u8 mpdudensity) 33 { 34 /* 35 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing": 36 * 0 for no restriction 37 * 1 for 1/4 us 38 * 2 for 1/2 us 39 * 3 for 1 us 40 * 4 for 2 us 41 * 5 for 4 us 42 * 6 for 8 us 43 * 7 for 16 us 44 */ 45 switch (mpdudensity) { 46 case 0: 47 return 0; 48 case 1: 49 case 2: 50 case 3: 51 /* Our lower layer calculations limit our precision to 52 1 microsecond */ 53 return 1; 54 case 4: 55 return 2; 56 case 5: 57 return 4; 58 case 6: 59 return 8; 60 case 7: 61 return 16; 62 default: 63 return 0; 64 } 65 } 66 67 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc, 68 struct ieee80211_hw *hw) 69 { 70 struct ieee80211_channel *curchan = hw->conf.channel; 71 struct ath9k_channel *channel; 72 u8 chan_idx; 73 74 chan_idx = curchan->hw_value; 75 channel = &sc->sc_ah->channels[chan_idx]; 76 ath9k_update_ichannel(sc, hw, channel); 77 return channel; 78 } 79 80 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode) 81 { 82 unsigned long flags; 83 bool ret; 84 85 spin_lock_irqsave(&sc->sc_pm_lock, flags); 86 ret = ath9k_hw_setpower(sc->sc_ah, mode); 87 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 88 89 return ret; 90 } 91 92 void ath9k_ps_wakeup(struct ath_softc *sc) 93 { 94 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 95 unsigned long flags; 96 enum ath9k_power_mode power_mode; 97 98 spin_lock_irqsave(&sc->sc_pm_lock, flags); 99 if (++sc->ps_usecount != 1) 100 goto unlock; 101 102 power_mode = sc->sc_ah->power_mode; 103 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE); 104 105 /* 106 * While the hardware is asleep, the cycle counters contain no 107 * useful data. Better clear them now so that they don't mess up 108 * survey data results. 109 */ 110 if (power_mode != ATH9K_PM_AWAKE) { 111 spin_lock(&common->cc_lock); 112 ath_hw_cycle_counters_update(common); 113 memset(&common->cc_survey, 0, sizeof(common->cc_survey)); 114 spin_unlock(&common->cc_lock); 115 } 116 117 unlock: 118 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 119 } 120 121 void ath9k_ps_restore(struct ath_softc *sc) 122 { 123 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 124 unsigned long flags; 125 126 spin_lock_irqsave(&sc->sc_pm_lock, flags); 127 if (--sc->ps_usecount != 0) 128 goto unlock; 129 130 spin_lock(&common->cc_lock); 131 ath_hw_cycle_counters_update(common); 132 spin_unlock(&common->cc_lock); 133 134 if (sc->ps_idle) 135 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP); 136 else if (sc->ps_enabled && 137 !(sc->ps_flags & (PS_WAIT_FOR_BEACON | 138 PS_WAIT_FOR_CAB | 139 PS_WAIT_FOR_PSPOLL_DATA | 140 PS_WAIT_FOR_TX_ACK))) 141 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP); 142 143 unlock: 144 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 145 } 146 147 static void ath_start_ani(struct ath_common *common) 148 { 149 struct ath_hw *ah = common->ah; 150 unsigned long timestamp = jiffies_to_msecs(jiffies); 151 struct ath_softc *sc = (struct ath_softc *) common->priv; 152 153 if (!(sc->sc_flags & SC_OP_ANI_RUN)) 154 return; 155 156 if (sc->sc_flags & SC_OP_OFFCHANNEL) 157 return; 158 159 common->ani.longcal_timer = timestamp; 160 common->ani.shortcal_timer = timestamp; 161 common->ani.checkani_timer = timestamp; 162 163 mod_timer(&common->ani.timer, 164 jiffies + 165 msecs_to_jiffies((u32)ah->config.ani_poll_interval)); 166 } 167 168 static void ath_update_survey_nf(struct ath_softc *sc, int channel) 169 { 170 struct ath_hw *ah = sc->sc_ah; 171 struct ath9k_channel *chan = &ah->channels[channel]; 172 struct survey_info *survey = &sc->survey[channel]; 173 174 if (chan->noisefloor) { 175 survey->filled |= SURVEY_INFO_NOISE_DBM; 176 survey->noise = chan->noisefloor; 177 } 178 } 179 180 static void ath_update_survey_stats(struct ath_softc *sc) 181 { 182 struct ath_hw *ah = sc->sc_ah; 183 struct ath_common *common = ath9k_hw_common(ah); 184 int pos = ah->curchan - &ah->channels[0]; 185 struct survey_info *survey = &sc->survey[pos]; 186 struct ath_cycle_counters *cc = &common->cc_survey; 187 unsigned int div = common->clockrate * 1000; 188 189 if (!ah->curchan) 190 return; 191 192 if (ah->power_mode == ATH9K_PM_AWAKE) 193 ath_hw_cycle_counters_update(common); 194 195 if (cc->cycles > 0) { 196 survey->filled |= SURVEY_INFO_CHANNEL_TIME | 197 SURVEY_INFO_CHANNEL_TIME_BUSY | 198 SURVEY_INFO_CHANNEL_TIME_RX | 199 SURVEY_INFO_CHANNEL_TIME_TX; 200 survey->channel_time += cc->cycles / div; 201 survey->channel_time_busy += cc->rx_busy / div; 202 survey->channel_time_rx += cc->rx_frame / div; 203 survey->channel_time_tx += cc->tx_frame / div; 204 } 205 memset(cc, 0, sizeof(*cc)); 206 207 ath_update_survey_nf(sc, pos); 208 } 209 210 /* 211 * Set/change channels. If the channel is really being changed, it's done 212 * by reseting the chip. To accomplish this we must first cleanup any pending 213 * DMA, then restart stuff. 214 */ 215 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw, 216 struct ath9k_channel *hchan) 217 { 218 struct ath_wiphy *aphy = hw->priv; 219 struct ath_hw *ah = sc->sc_ah; 220 struct ath_common *common = ath9k_hw_common(ah); 221 struct ieee80211_conf *conf = &common->hw->conf; 222 bool fastcc = true, stopped; 223 struct ieee80211_channel *channel = hw->conf.channel; 224 struct ath9k_hw_cal_data *caldata = NULL; 225 int r; 226 227 if (sc->sc_flags & SC_OP_INVALID) 228 return -EIO; 229 230 del_timer_sync(&common->ani.timer); 231 cancel_work_sync(&sc->paprd_work); 232 cancel_work_sync(&sc->hw_check_work); 233 cancel_delayed_work_sync(&sc->tx_complete_work); 234 235 ath9k_ps_wakeup(sc); 236 237 spin_lock_bh(&sc->sc_pcu_lock); 238 239 /* 240 * This is only performed if the channel settings have 241 * actually changed. 242 * 243 * To switch channels clear any pending DMA operations; 244 * wait long enough for the RX fifo to drain, reset the 245 * hardware at the new frequency, and then re-enable 246 * the relevant bits of the h/w. 247 */ 248 ath9k_hw_disable_interrupts(ah); 249 stopped = ath_drain_all_txq(sc, false); 250 251 if (!ath_stoprecv(sc)) 252 stopped = false; 253 254 /* XXX: do not flush receive queue here. We don't want 255 * to flush data frames already in queue because of 256 * changing channel. */ 257 258 if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL)) 259 fastcc = false; 260 261 if (!(sc->sc_flags & SC_OP_OFFCHANNEL)) 262 caldata = &aphy->caldata; 263 264 ath_dbg(common, ATH_DBG_CONFIG, 265 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n", 266 sc->sc_ah->curchan->channel, 267 channel->center_freq, conf_is_ht40(conf), 268 fastcc); 269 270 r = ath9k_hw_reset(ah, hchan, caldata, fastcc); 271 if (r) { 272 ath_err(common, 273 "Unable to reset channel (%u MHz), reset status %d\n", 274 channel->center_freq, r); 275 goto ps_restore; 276 } 277 278 if (ath_startrecv(sc) != 0) { 279 ath_err(common, "Unable to restart recv logic\n"); 280 r = -EIO; 281 goto ps_restore; 282 } 283 284 ath_update_txpow(sc); 285 ath9k_hw_set_interrupts(ah, ah->imask); 286 287 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) { 288 ath_beacon_config(sc, NULL); 289 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0); 290 ath_start_ani(common); 291 } 292 293 ps_restore: 294 spin_unlock_bh(&sc->sc_pcu_lock); 295 296 ath9k_ps_restore(sc); 297 return r; 298 } 299 300 static void ath_paprd_activate(struct ath_softc *sc) 301 { 302 struct ath_hw *ah = sc->sc_ah; 303 struct ath9k_hw_cal_data *caldata = ah->caldata; 304 struct ath_common *common = ath9k_hw_common(ah); 305 int chain; 306 307 if (!caldata || !caldata->paprd_done) 308 return; 309 310 ath9k_ps_wakeup(sc); 311 ar9003_paprd_enable(ah, false); 312 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) { 313 if (!(common->tx_chainmask & BIT(chain))) 314 continue; 315 316 ar9003_paprd_populate_single_table(ah, caldata, chain); 317 } 318 319 ar9003_paprd_enable(ah, true); 320 ath9k_ps_restore(sc); 321 } 322 323 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain) 324 { 325 struct ieee80211_hw *hw = sc->hw; 326 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 327 struct ath_tx_control txctl; 328 int time_left; 329 330 memset(&txctl, 0, sizeof(txctl)); 331 txctl.txq = sc->tx.txq_map[WME_AC_BE]; 332 333 memset(tx_info, 0, sizeof(*tx_info)); 334 tx_info->band = hw->conf.channel->band; 335 tx_info->flags |= IEEE80211_TX_CTL_NO_ACK; 336 tx_info->control.rates[0].idx = 0; 337 tx_info->control.rates[0].count = 1; 338 tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS; 339 tx_info->control.rates[1].idx = -1; 340 341 init_completion(&sc->paprd_complete); 342 sc->paprd_pending = true; 343 txctl.paprd = BIT(chain); 344 if (ath_tx_start(hw, skb, &txctl) != 0) 345 return false; 346 347 time_left = wait_for_completion_timeout(&sc->paprd_complete, 348 msecs_to_jiffies(ATH_PAPRD_TIMEOUT)); 349 sc->paprd_pending = false; 350 351 if (!time_left) 352 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE, 353 "Timeout waiting for paprd training on TX chain %d\n", 354 chain); 355 356 return !!time_left; 357 } 358 359 void ath_paprd_calibrate(struct work_struct *work) 360 { 361 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work); 362 struct ieee80211_hw *hw = sc->hw; 363 struct ath_hw *ah = sc->sc_ah; 364 struct ieee80211_hdr *hdr; 365 struct sk_buff *skb = NULL; 366 struct ath9k_hw_cal_data *caldata = ah->caldata; 367 struct ath_common *common = ath9k_hw_common(ah); 368 int ftype; 369 int chain_ok = 0; 370 int chain; 371 int len = 1800; 372 373 if (!caldata) 374 return; 375 376 if (ar9003_paprd_init_table(ah) < 0) 377 return; 378 379 skb = alloc_skb(len, GFP_KERNEL); 380 if (!skb) 381 return; 382 383 skb_put(skb, len); 384 memset(skb->data, 0, len); 385 hdr = (struct ieee80211_hdr *)skb->data; 386 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC; 387 hdr->frame_control = cpu_to_le16(ftype); 388 hdr->duration_id = cpu_to_le16(10); 389 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN); 390 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN); 391 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN); 392 393 ath9k_ps_wakeup(sc); 394 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) { 395 if (!(common->tx_chainmask & BIT(chain))) 396 continue; 397 398 chain_ok = 0; 399 400 ath_dbg(common, ATH_DBG_CALIBRATE, 401 "Sending PAPRD frame for thermal measurement " 402 "on chain %d\n", chain); 403 if (!ath_paprd_send_frame(sc, skb, chain)) 404 goto fail_paprd; 405 406 ar9003_paprd_setup_gain_table(ah, chain); 407 408 ath_dbg(common, ATH_DBG_CALIBRATE, 409 "Sending PAPRD training frame on chain %d\n", chain); 410 if (!ath_paprd_send_frame(sc, skb, chain)) 411 goto fail_paprd; 412 413 if (!ar9003_paprd_is_done(ah)) 414 break; 415 416 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0) 417 break; 418 419 chain_ok = 1; 420 } 421 kfree_skb(skb); 422 423 if (chain_ok) { 424 caldata->paprd_done = true; 425 ath_paprd_activate(sc); 426 } 427 428 fail_paprd: 429 ath9k_ps_restore(sc); 430 } 431 432 /* 433 * This routine performs the periodic noise floor calibration function 434 * that is used to adjust and optimize the chip performance. This 435 * takes environmental changes (location, temperature) into account. 436 * When the task is complete, it reschedules itself depending on the 437 * appropriate interval that was calculated. 438 */ 439 void ath_ani_calibrate(unsigned long data) 440 { 441 struct ath_softc *sc = (struct ath_softc *)data; 442 struct ath_hw *ah = sc->sc_ah; 443 struct ath_common *common = ath9k_hw_common(ah); 444 bool longcal = false; 445 bool shortcal = false; 446 bool aniflag = false; 447 unsigned int timestamp = jiffies_to_msecs(jiffies); 448 u32 cal_interval, short_cal_interval, long_cal_interval; 449 unsigned long flags; 450 451 if (ah->caldata && ah->caldata->nfcal_interference) 452 long_cal_interval = ATH_LONG_CALINTERVAL_INT; 453 else 454 long_cal_interval = ATH_LONG_CALINTERVAL; 455 456 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ? 457 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL; 458 459 /* Only calibrate if awake */ 460 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE) 461 goto set_timer; 462 463 ath9k_ps_wakeup(sc); 464 465 /* Long calibration runs independently of short calibration. */ 466 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) { 467 longcal = true; 468 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies); 469 common->ani.longcal_timer = timestamp; 470 } 471 472 /* Short calibration applies only while caldone is false */ 473 if (!common->ani.caldone) { 474 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) { 475 shortcal = true; 476 ath_dbg(common, ATH_DBG_ANI, 477 "shortcal @%lu\n", jiffies); 478 common->ani.shortcal_timer = timestamp; 479 common->ani.resetcal_timer = timestamp; 480 } 481 } else { 482 if ((timestamp - common->ani.resetcal_timer) >= 483 ATH_RESTART_CALINTERVAL) { 484 common->ani.caldone = ath9k_hw_reset_calvalid(ah); 485 if (common->ani.caldone) 486 common->ani.resetcal_timer = timestamp; 487 } 488 } 489 490 /* Verify whether we must check ANI */ 491 if ((timestamp - common->ani.checkani_timer) >= 492 ah->config.ani_poll_interval) { 493 aniflag = true; 494 common->ani.checkani_timer = timestamp; 495 } 496 497 /* Skip all processing if there's nothing to do. */ 498 if (longcal || shortcal || aniflag) { 499 /* Call ANI routine if necessary */ 500 if (aniflag) { 501 spin_lock_irqsave(&common->cc_lock, flags); 502 ath9k_hw_ani_monitor(ah, ah->curchan); 503 ath_update_survey_stats(sc); 504 spin_unlock_irqrestore(&common->cc_lock, flags); 505 } 506 507 /* Perform calibration if necessary */ 508 if (longcal || shortcal) { 509 common->ani.caldone = 510 ath9k_hw_calibrate(ah, 511 ah->curchan, 512 common->rx_chainmask, 513 longcal); 514 } 515 } 516 517 ath9k_ps_restore(sc); 518 519 set_timer: 520 /* 521 * Set timer interval based on previous results. 522 * The interval must be the shortest necessary to satisfy ANI, 523 * short calibration and long calibration. 524 */ 525 cal_interval = ATH_LONG_CALINTERVAL; 526 if (sc->sc_ah->config.enable_ani) 527 cal_interval = min(cal_interval, 528 (u32)ah->config.ani_poll_interval); 529 if (!common->ani.caldone) 530 cal_interval = min(cal_interval, (u32)short_cal_interval); 531 532 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval)); 533 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) { 534 if (!ah->caldata->paprd_done) 535 ieee80211_queue_work(sc->hw, &sc->paprd_work); 536 else 537 ath_paprd_activate(sc); 538 } 539 } 540 541 /* 542 * Update tx/rx chainmask. For legacy association, 543 * hard code chainmask to 1x1, for 11n association, use 544 * the chainmask configuration, for bt coexistence, use 545 * the chainmask configuration even in legacy mode. 546 */ 547 void ath_update_chainmask(struct ath_softc *sc, int is_ht) 548 { 549 struct ath_hw *ah = sc->sc_ah; 550 struct ath_common *common = ath9k_hw_common(ah); 551 552 if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht || 553 (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) { 554 common->tx_chainmask = ah->caps.tx_chainmask; 555 common->rx_chainmask = ah->caps.rx_chainmask; 556 } else { 557 common->tx_chainmask = 1; 558 common->rx_chainmask = 1; 559 } 560 561 ath_dbg(common, ATH_DBG_CONFIG, 562 "tx chmask: %d, rx chmask: %d\n", 563 common->tx_chainmask, 564 common->rx_chainmask); 565 } 566 567 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta) 568 { 569 struct ath_node *an; 570 struct ath_hw *ah = sc->sc_ah; 571 an = (struct ath_node *)sta->drv_priv; 572 573 if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM) 574 sc->sc_flags |= SC_OP_ENABLE_APM; 575 576 if (sc->sc_flags & SC_OP_TXAGGR) { 577 ath_tx_node_init(sc, an); 578 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR + 579 sta->ht_cap.ampdu_factor); 580 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density); 581 } 582 } 583 584 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta) 585 { 586 struct ath_node *an = (struct ath_node *)sta->drv_priv; 587 588 if (sc->sc_flags & SC_OP_TXAGGR) 589 ath_tx_node_cleanup(sc, an); 590 } 591 592 void ath_hw_check(struct work_struct *work) 593 { 594 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work); 595 int i; 596 597 ath9k_ps_wakeup(sc); 598 599 for (i = 0; i < 3; i++) { 600 if (ath9k_hw_check_alive(sc->sc_ah)) 601 goto out; 602 603 msleep(1); 604 } 605 ath_reset(sc, true); 606 607 out: 608 ath9k_ps_restore(sc); 609 } 610 611 void ath9k_tasklet(unsigned long data) 612 { 613 struct ath_softc *sc = (struct ath_softc *)data; 614 struct ath_hw *ah = sc->sc_ah; 615 struct ath_common *common = ath9k_hw_common(ah); 616 617 u32 status = sc->intrstatus; 618 u32 rxmask; 619 620 ath9k_ps_wakeup(sc); 621 622 if (status & ATH9K_INT_FATAL) { 623 ath_reset(sc, true); 624 ath9k_ps_restore(sc); 625 return; 626 } 627 628 spin_lock_bh(&sc->sc_pcu_lock); 629 630 if (!ath9k_hw_check_alive(ah)) 631 ieee80211_queue_work(sc->hw, &sc->hw_check_work); 632 633 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) 634 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL | 635 ATH9K_INT_RXORN); 636 else 637 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN); 638 639 if (status & rxmask) { 640 /* Check for high priority Rx first */ 641 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) && 642 (status & ATH9K_INT_RXHP)) 643 ath_rx_tasklet(sc, 0, true); 644 645 ath_rx_tasklet(sc, 0, false); 646 } 647 648 if (status & ATH9K_INT_TX) { 649 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) 650 ath_tx_edma_tasklet(sc); 651 else 652 ath_tx_tasklet(sc); 653 } 654 655 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) { 656 /* 657 * TSF sync does not look correct; remain awake to sync with 658 * the next Beacon. 659 */ 660 ath_dbg(common, ATH_DBG_PS, 661 "TSFOOR - Sync with next Beacon\n"); 662 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC; 663 } 664 665 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE) 666 if (status & ATH9K_INT_GENTIMER) 667 ath_gen_timer_isr(sc->sc_ah); 668 669 /* re-enable hardware interrupt */ 670 ath9k_hw_enable_interrupts(ah); 671 672 spin_unlock_bh(&sc->sc_pcu_lock); 673 ath9k_ps_restore(sc); 674 } 675 676 irqreturn_t ath_isr(int irq, void *dev) 677 { 678 #define SCHED_INTR ( \ 679 ATH9K_INT_FATAL | \ 680 ATH9K_INT_RXORN | \ 681 ATH9K_INT_RXEOL | \ 682 ATH9K_INT_RX | \ 683 ATH9K_INT_RXLP | \ 684 ATH9K_INT_RXHP | \ 685 ATH9K_INT_TX | \ 686 ATH9K_INT_BMISS | \ 687 ATH9K_INT_CST | \ 688 ATH9K_INT_TSFOOR | \ 689 ATH9K_INT_GENTIMER) 690 691 struct ath_softc *sc = dev; 692 struct ath_hw *ah = sc->sc_ah; 693 struct ath_common *common = ath9k_hw_common(ah); 694 enum ath9k_int status; 695 bool sched = false; 696 697 /* 698 * The hardware is not ready/present, don't 699 * touch anything. Note this can happen early 700 * on if the IRQ is shared. 701 */ 702 if (sc->sc_flags & SC_OP_INVALID) 703 return IRQ_NONE; 704 705 706 /* shared irq, not for us */ 707 708 if (!ath9k_hw_intrpend(ah)) 709 return IRQ_NONE; 710 711 /* 712 * Figure out the reason(s) for the interrupt. Note 713 * that the hal returns a pseudo-ISR that may include 714 * bits we haven't explicitly enabled so we mask the 715 * value to insure we only process bits we requested. 716 */ 717 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */ 718 status &= ah->imask; /* discard unasked-for bits */ 719 720 /* 721 * If there are no status bits set, then this interrupt was not 722 * for me (should have been caught above). 723 */ 724 if (!status) 725 return IRQ_NONE; 726 727 /* Cache the status */ 728 sc->intrstatus = status; 729 730 if (status & SCHED_INTR) 731 sched = true; 732 733 /* 734 * If a FATAL or RXORN interrupt is received, we have to reset the 735 * chip immediately. 736 */ 737 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) && 738 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA))) 739 goto chip_reset; 740 741 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) && 742 (status & ATH9K_INT_BB_WATCHDOG)) { 743 744 spin_lock(&common->cc_lock); 745 ath_hw_cycle_counters_update(common); 746 ar9003_hw_bb_watchdog_dbg_info(ah); 747 spin_unlock(&common->cc_lock); 748 749 goto chip_reset; 750 } 751 752 if (status & ATH9K_INT_SWBA) 753 tasklet_schedule(&sc->bcon_tasklet); 754 755 if (status & ATH9K_INT_TXURN) 756 ath9k_hw_updatetxtriglevel(ah, true); 757 758 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) { 759 if (status & ATH9K_INT_RXEOL) { 760 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN); 761 ath9k_hw_set_interrupts(ah, ah->imask); 762 } 763 } 764 765 if (status & ATH9K_INT_MIB) { 766 /* 767 * Disable interrupts until we service the MIB 768 * interrupt; otherwise it will continue to 769 * fire. 770 */ 771 ath9k_hw_disable_interrupts(ah); 772 /* 773 * Let the hal handle the event. We assume 774 * it will clear whatever condition caused 775 * the interrupt. 776 */ 777 spin_lock(&common->cc_lock); 778 ath9k_hw_proc_mib_event(ah); 779 spin_unlock(&common->cc_lock); 780 ath9k_hw_enable_interrupts(ah); 781 } 782 783 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) 784 if (status & ATH9K_INT_TIM_TIMER) { 785 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle)) 786 goto chip_reset; 787 /* Clear RxAbort bit so that we can 788 * receive frames */ 789 ath9k_setpower(sc, ATH9K_PM_AWAKE); 790 ath9k_hw_setrxabort(sc->sc_ah, 0); 791 sc->ps_flags |= PS_WAIT_FOR_BEACON; 792 } 793 794 chip_reset: 795 796 ath_debug_stat_interrupt(sc, status); 797 798 if (sched) { 799 /* turn off every interrupt */ 800 ath9k_hw_disable_interrupts(ah); 801 tasklet_schedule(&sc->intr_tq); 802 } 803 804 return IRQ_HANDLED; 805 806 #undef SCHED_INTR 807 } 808 809 static u32 ath_get_extchanmode(struct ath_softc *sc, 810 struct ieee80211_channel *chan, 811 enum nl80211_channel_type channel_type) 812 { 813 u32 chanmode = 0; 814 815 switch (chan->band) { 816 case IEEE80211_BAND_2GHZ: 817 switch(channel_type) { 818 case NL80211_CHAN_NO_HT: 819 case NL80211_CHAN_HT20: 820 chanmode = CHANNEL_G_HT20; 821 break; 822 case NL80211_CHAN_HT40PLUS: 823 chanmode = CHANNEL_G_HT40PLUS; 824 break; 825 case NL80211_CHAN_HT40MINUS: 826 chanmode = CHANNEL_G_HT40MINUS; 827 break; 828 } 829 break; 830 case IEEE80211_BAND_5GHZ: 831 switch(channel_type) { 832 case NL80211_CHAN_NO_HT: 833 case NL80211_CHAN_HT20: 834 chanmode = CHANNEL_A_HT20; 835 break; 836 case NL80211_CHAN_HT40PLUS: 837 chanmode = CHANNEL_A_HT40PLUS; 838 break; 839 case NL80211_CHAN_HT40MINUS: 840 chanmode = CHANNEL_A_HT40MINUS; 841 break; 842 } 843 break; 844 default: 845 break; 846 } 847 848 return chanmode; 849 } 850 851 static void ath9k_bss_assoc_info(struct ath_softc *sc, 852 struct ieee80211_hw *hw, 853 struct ieee80211_vif *vif, 854 struct ieee80211_bss_conf *bss_conf) 855 { 856 struct ath_wiphy *aphy = hw->priv; 857 struct ath_hw *ah = sc->sc_ah; 858 struct ath_common *common = ath9k_hw_common(ah); 859 860 if (bss_conf->assoc) { 861 ath_dbg(common, ATH_DBG_CONFIG, 862 "Bss Info ASSOC %d, bssid: %pM\n", 863 bss_conf->aid, common->curbssid); 864 865 /* New association, store aid */ 866 common->curaid = bss_conf->aid; 867 ath9k_hw_write_associd(ah); 868 869 /* 870 * Request a re-configuration of Beacon related timers 871 * on the receipt of the first Beacon frame (i.e., 872 * after time sync with the AP). 873 */ 874 sc->ps_flags |= PS_BEACON_SYNC; 875 876 /* Configure the beacon */ 877 ath_beacon_config(sc, vif); 878 879 /* Reset rssi stats */ 880 aphy->last_rssi = ATH_RSSI_DUMMY_MARKER; 881 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER; 882 883 sc->sc_flags |= SC_OP_ANI_RUN; 884 ath_start_ani(common); 885 } else { 886 ath_dbg(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n"); 887 common->curaid = 0; 888 /* Stop ANI */ 889 sc->sc_flags &= ~SC_OP_ANI_RUN; 890 del_timer_sync(&common->ani.timer); 891 } 892 } 893 894 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw) 895 { 896 struct ath_hw *ah = sc->sc_ah; 897 struct ath_common *common = ath9k_hw_common(ah); 898 struct ieee80211_channel *channel = hw->conf.channel; 899 int r; 900 901 ath9k_ps_wakeup(sc); 902 spin_lock_bh(&sc->sc_pcu_lock); 903 904 ath9k_hw_configpcipowersave(ah, 0, 0); 905 906 if (!ah->curchan) 907 ah->curchan = ath_get_curchannel(sc, sc->hw); 908 909 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false); 910 if (r) { 911 ath_err(common, 912 "Unable to reset channel (%u MHz), reset status %d\n", 913 channel->center_freq, r); 914 } 915 916 ath_update_txpow(sc); 917 if (ath_startrecv(sc) != 0) { 918 ath_err(common, "Unable to restart recv logic\n"); 919 goto out; 920 } 921 if (sc->sc_flags & SC_OP_BEACONS) 922 ath_beacon_config(sc, NULL); /* restart beacons */ 923 924 /* Re-Enable interrupts */ 925 ath9k_hw_set_interrupts(ah, ah->imask); 926 927 /* Enable LED */ 928 ath9k_hw_cfg_output(ah, ah->led_pin, 929 AR_GPIO_OUTPUT_MUX_AS_OUTPUT); 930 ath9k_hw_set_gpio(ah, ah->led_pin, 0); 931 932 ieee80211_wake_queues(hw); 933 out: 934 spin_unlock_bh(&sc->sc_pcu_lock); 935 936 ath9k_ps_restore(sc); 937 } 938 939 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw) 940 { 941 struct ath_hw *ah = sc->sc_ah; 942 struct ieee80211_channel *channel = hw->conf.channel; 943 int r; 944 945 ath9k_ps_wakeup(sc); 946 spin_lock_bh(&sc->sc_pcu_lock); 947 948 ieee80211_stop_queues(hw); 949 950 /* 951 * Keep the LED on when the radio is disabled 952 * during idle unassociated state. 953 */ 954 if (!sc->ps_idle) { 955 ath9k_hw_set_gpio(ah, ah->led_pin, 1); 956 ath9k_hw_cfg_gpio_input(ah, ah->led_pin); 957 } 958 959 /* Disable interrupts */ 960 ath9k_hw_disable_interrupts(ah); 961 962 ath_drain_all_txq(sc, false); /* clear pending tx frames */ 963 964 ath_stoprecv(sc); /* turn off frame recv */ 965 ath_flushrecv(sc); /* flush recv queue */ 966 967 if (!ah->curchan) 968 ah->curchan = ath_get_curchannel(sc, hw); 969 970 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false); 971 if (r) { 972 ath_err(ath9k_hw_common(sc->sc_ah), 973 "Unable to reset channel (%u MHz), reset status %d\n", 974 channel->center_freq, r); 975 } 976 977 ath9k_hw_phy_disable(ah); 978 979 ath9k_hw_configpcipowersave(ah, 1, 1); 980 981 spin_unlock_bh(&sc->sc_pcu_lock); 982 ath9k_ps_restore(sc); 983 984 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP); 985 } 986 987 int ath_reset(struct ath_softc *sc, bool retry_tx) 988 { 989 struct ath_hw *ah = sc->sc_ah; 990 struct ath_common *common = ath9k_hw_common(ah); 991 struct ieee80211_hw *hw = sc->hw; 992 int r; 993 994 /* Stop ANI */ 995 del_timer_sync(&common->ani.timer); 996 997 spin_lock_bh(&sc->sc_pcu_lock); 998 999 ieee80211_stop_queues(hw); 1000 1001 ath9k_hw_disable_interrupts(ah); 1002 ath_drain_all_txq(sc, retry_tx); 1003 1004 ath_stoprecv(sc); 1005 ath_flushrecv(sc); 1006 1007 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false); 1008 if (r) 1009 ath_err(common, 1010 "Unable to reset hardware; reset status %d\n", r); 1011 1012 if (ath_startrecv(sc) != 0) 1013 ath_err(common, "Unable to start recv logic\n"); 1014 1015 /* 1016 * We may be doing a reset in response to a request 1017 * that changes the channel so update any state that 1018 * might change as a result. 1019 */ 1020 ath_update_txpow(sc); 1021 1022 if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL))) 1023 ath_beacon_config(sc, NULL); /* restart beacons */ 1024 1025 ath9k_hw_set_interrupts(ah, ah->imask); 1026 1027 if (retry_tx) { 1028 int i; 1029 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) { 1030 if (ATH_TXQ_SETUP(sc, i)) { 1031 spin_lock_bh(&sc->tx.txq[i].axq_lock); 1032 ath_txq_schedule(sc, &sc->tx.txq[i]); 1033 spin_unlock_bh(&sc->tx.txq[i].axq_lock); 1034 } 1035 } 1036 } 1037 1038 ieee80211_wake_queues(hw); 1039 spin_unlock_bh(&sc->sc_pcu_lock); 1040 1041 /* Start ANI */ 1042 ath_start_ani(common); 1043 1044 return r; 1045 } 1046 1047 /* XXX: Remove me once we don't depend on ath9k_channel for all 1048 * this redundant data */ 1049 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw, 1050 struct ath9k_channel *ichan) 1051 { 1052 struct ieee80211_channel *chan = hw->conf.channel; 1053 struct ieee80211_conf *conf = &hw->conf; 1054 1055 ichan->channel = chan->center_freq; 1056 ichan->chan = chan; 1057 1058 if (chan->band == IEEE80211_BAND_2GHZ) { 1059 ichan->chanmode = CHANNEL_G; 1060 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G; 1061 } else { 1062 ichan->chanmode = CHANNEL_A; 1063 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM; 1064 } 1065 1066 if (conf_is_ht(conf)) 1067 ichan->chanmode = ath_get_extchanmode(sc, chan, 1068 conf->channel_type); 1069 } 1070 1071 /**********************/ 1072 /* mac80211 callbacks */ 1073 /**********************/ 1074 1075 static int ath9k_start(struct ieee80211_hw *hw) 1076 { 1077 struct ath_wiphy *aphy = hw->priv; 1078 struct ath_softc *sc = aphy->sc; 1079 struct ath_hw *ah = sc->sc_ah; 1080 struct ath_common *common = ath9k_hw_common(ah); 1081 struct ieee80211_channel *curchan = hw->conf.channel; 1082 struct ath9k_channel *init_channel; 1083 int r; 1084 1085 ath_dbg(common, ATH_DBG_CONFIG, 1086 "Starting driver with initial channel: %d MHz\n", 1087 curchan->center_freq); 1088 1089 mutex_lock(&sc->mutex); 1090 1091 if (ath9k_wiphy_started(sc)) { 1092 if (sc->chan_idx == curchan->hw_value) { 1093 /* 1094 * Already on the operational channel, the new wiphy 1095 * can be marked active. 1096 */ 1097 aphy->state = ATH_WIPHY_ACTIVE; 1098 ieee80211_wake_queues(hw); 1099 } else { 1100 /* 1101 * Another wiphy is on another channel, start the new 1102 * wiphy in paused state. 1103 */ 1104 aphy->state = ATH_WIPHY_PAUSED; 1105 ieee80211_stop_queues(hw); 1106 } 1107 mutex_unlock(&sc->mutex); 1108 return 0; 1109 } 1110 aphy->state = ATH_WIPHY_ACTIVE; 1111 1112 /* setup initial channel */ 1113 1114 sc->chan_idx = curchan->hw_value; 1115 1116 init_channel = ath_get_curchannel(sc, hw); 1117 1118 /* Reset SERDES registers */ 1119 ath9k_hw_configpcipowersave(ah, 0, 0); 1120 1121 /* 1122 * The basic interface to setting the hardware in a good 1123 * state is ``reset''. On return the hardware is known to 1124 * be powered up and with interrupts disabled. This must 1125 * be followed by initialization of the appropriate bits 1126 * and then setup of the interrupt mask. 1127 */ 1128 spin_lock_bh(&sc->sc_pcu_lock); 1129 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false); 1130 if (r) { 1131 ath_err(common, 1132 "Unable to reset hardware; reset status %d (freq %u MHz)\n", 1133 r, curchan->center_freq); 1134 spin_unlock_bh(&sc->sc_pcu_lock); 1135 goto mutex_unlock; 1136 } 1137 1138 /* 1139 * This is needed only to setup initial state 1140 * but it's best done after a reset. 1141 */ 1142 ath_update_txpow(sc); 1143 1144 /* 1145 * Setup the hardware after reset: 1146 * The receive engine is set going. 1147 * Frame transmit is handled entirely 1148 * in the frame output path; there's nothing to do 1149 * here except setup the interrupt mask. 1150 */ 1151 if (ath_startrecv(sc) != 0) { 1152 ath_err(common, "Unable to start recv logic\n"); 1153 r = -EIO; 1154 spin_unlock_bh(&sc->sc_pcu_lock); 1155 goto mutex_unlock; 1156 } 1157 spin_unlock_bh(&sc->sc_pcu_lock); 1158 1159 /* Setup our intr mask. */ 1160 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL | 1161 ATH9K_INT_RXORN | ATH9K_INT_FATAL | 1162 ATH9K_INT_GLOBAL; 1163 1164 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) 1165 ah->imask |= ATH9K_INT_RXHP | 1166 ATH9K_INT_RXLP | 1167 ATH9K_INT_BB_WATCHDOG; 1168 else 1169 ah->imask |= ATH9K_INT_RX; 1170 1171 ah->imask |= ATH9K_INT_GTT; 1172 1173 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT) 1174 ah->imask |= ATH9K_INT_CST; 1175 1176 sc->sc_flags &= ~SC_OP_INVALID; 1177 sc->sc_ah->is_monitoring = false; 1178 1179 /* Disable BMISS interrupt when we're not associated */ 1180 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS); 1181 ath9k_hw_set_interrupts(ah, ah->imask); 1182 1183 ieee80211_wake_queues(hw); 1184 1185 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0); 1186 1187 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) && 1188 !ah->btcoex_hw.enabled) { 1189 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT, 1190 AR_STOMP_LOW_WLAN_WGHT); 1191 ath9k_hw_btcoex_enable(ah); 1192 1193 if (common->bus_ops->bt_coex_prep) 1194 common->bus_ops->bt_coex_prep(common); 1195 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE) 1196 ath9k_btcoex_timer_resume(sc); 1197 } 1198 1199 pm_qos_update_request(&sc->pm_qos_req, 55); 1200 1201 if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en) 1202 common->bus_ops->extn_synch_en(common); 1203 1204 mutex_unlock: 1205 mutex_unlock(&sc->mutex); 1206 1207 return r; 1208 } 1209 1210 static int ath9k_tx(struct ieee80211_hw *hw, 1211 struct sk_buff *skb) 1212 { 1213 struct ath_wiphy *aphy = hw->priv; 1214 struct ath_softc *sc = aphy->sc; 1215 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1216 struct ath_tx_control txctl; 1217 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data; 1218 1219 if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) { 1220 ath_dbg(common, ATH_DBG_XMIT, 1221 "ath9k: %s: TX in unexpected wiphy state %d\n", 1222 wiphy_name(hw->wiphy), aphy->state); 1223 goto exit; 1224 } 1225 1226 if (sc->ps_enabled) { 1227 /* 1228 * mac80211 does not set PM field for normal data frames, so we 1229 * need to update that based on the current PS mode. 1230 */ 1231 if (ieee80211_is_data(hdr->frame_control) && 1232 !ieee80211_is_nullfunc(hdr->frame_control) && 1233 !ieee80211_has_pm(hdr->frame_control)) { 1234 ath_dbg(common, ATH_DBG_PS, 1235 "Add PM=1 for a TX frame while in PS mode\n"); 1236 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM); 1237 } 1238 } 1239 1240 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) { 1241 /* 1242 * We are using PS-Poll and mac80211 can request TX while in 1243 * power save mode. Need to wake up hardware for the TX to be 1244 * completed and if needed, also for RX of buffered frames. 1245 */ 1246 ath9k_ps_wakeup(sc); 1247 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) 1248 ath9k_hw_setrxabort(sc->sc_ah, 0); 1249 if (ieee80211_is_pspoll(hdr->frame_control)) { 1250 ath_dbg(common, ATH_DBG_PS, 1251 "Sending PS-Poll to pick a buffered frame\n"); 1252 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA; 1253 } else { 1254 ath_dbg(common, ATH_DBG_PS, 1255 "Wake up to complete TX\n"); 1256 sc->ps_flags |= PS_WAIT_FOR_TX_ACK; 1257 } 1258 /* 1259 * The actual restore operation will happen only after 1260 * the sc_flags bit is cleared. We are just dropping 1261 * the ps_usecount here. 1262 */ 1263 ath9k_ps_restore(sc); 1264 } 1265 1266 memset(&txctl, 0, sizeof(struct ath_tx_control)); 1267 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)]; 1268 1269 ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb); 1270 1271 if (ath_tx_start(hw, skb, &txctl) != 0) { 1272 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n"); 1273 goto exit; 1274 } 1275 1276 return 0; 1277 exit: 1278 dev_kfree_skb_any(skb); 1279 return 0; 1280 } 1281 1282 static void ath9k_stop(struct ieee80211_hw *hw) 1283 { 1284 struct ath_wiphy *aphy = hw->priv; 1285 struct ath_softc *sc = aphy->sc; 1286 struct ath_hw *ah = sc->sc_ah; 1287 struct ath_common *common = ath9k_hw_common(ah); 1288 int i; 1289 1290 mutex_lock(&sc->mutex); 1291 1292 aphy->state = ATH_WIPHY_INACTIVE; 1293 1294 if (led_blink) 1295 cancel_delayed_work_sync(&sc->ath_led_blink_work); 1296 1297 cancel_delayed_work_sync(&sc->tx_complete_work); 1298 cancel_work_sync(&sc->paprd_work); 1299 cancel_work_sync(&sc->hw_check_work); 1300 1301 for (i = 0; i < sc->num_sec_wiphy; i++) { 1302 if (sc->sec_wiphy[i]) 1303 break; 1304 } 1305 1306 if (i == sc->num_sec_wiphy) { 1307 cancel_delayed_work_sync(&sc->wiphy_work); 1308 cancel_work_sync(&sc->chan_work); 1309 } 1310 1311 if (sc->sc_flags & SC_OP_INVALID) { 1312 ath_dbg(common, ATH_DBG_ANY, "Device not present\n"); 1313 mutex_unlock(&sc->mutex); 1314 return; 1315 } 1316 1317 if (ath9k_wiphy_started(sc)) { 1318 mutex_unlock(&sc->mutex); 1319 return; /* another wiphy still in use */ 1320 } 1321 1322 /* Ensure HW is awake when we try to shut it down. */ 1323 ath9k_ps_wakeup(sc); 1324 1325 if (ah->btcoex_hw.enabled) { 1326 ath9k_hw_btcoex_disable(ah); 1327 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE) 1328 ath9k_btcoex_timer_pause(sc); 1329 } 1330 1331 spin_lock_bh(&sc->sc_pcu_lock); 1332 1333 /* make sure h/w will not generate any interrupt 1334 * before setting the invalid flag. */ 1335 ath9k_hw_disable_interrupts(ah); 1336 1337 if (!(sc->sc_flags & SC_OP_INVALID)) { 1338 ath_drain_all_txq(sc, false); 1339 ath_stoprecv(sc); 1340 ath9k_hw_phy_disable(ah); 1341 } else 1342 sc->rx.rxlink = NULL; 1343 1344 /* disable HAL and put h/w to sleep */ 1345 ath9k_hw_disable(ah); 1346 ath9k_hw_configpcipowersave(ah, 1, 1); 1347 1348 spin_unlock_bh(&sc->sc_pcu_lock); 1349 1350 ath9k_ps_restore(sc); 1351 1352 sc->ps_idle = true; 1353 ath_radio_disable(sc, hw); 1354 1355 sc->sc_flags |= SC_OP_INVALID; 1356 1357 pm_qos_update_request(&sc->pm_qos_req, PM_QOS_DEFAULT_VALUE); 1358 1359 mutex_unlock(&sc->mutex); 1360 1361 ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n"); 1362 } 1363 1364 static int ath9k_add_interface(struct ieee80211_hw *hw, 1365 struct ieee80211_vif *vif) 1366 { 1367 struct ath_wiphy *aphy = hw->priv; 1368 struct ath_softc *sc = aphy->sc; 1369 struct ath_hw *ah = sc->sc_ah; 1370 struct ath_common *common = ath9k_hw_common(ah); 1371 struct ath_vif *avp = (void *)vif->drv_priv; 1372 enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED; 1373 int ret = 0; 1374 1375 mutex_lock(&sc->mutex); 1376 1377 switch (vif->type) { 1378 case NL80211_IFTYPE_STATION: 1379 ic_opmode = NL80211_IFTYPE_STATION; 1380 break; 1381 case NL80211_IFTYPE_WDS: 1382 ic_opmode = NL80211_IFTYPE_WDS; 1383 break; 1384 case NL80211_IFTYPE_ADHOC: 1385 case NL80211_IFTYPE_AP: 1386 case NL80211_IFTYPE_MESH_POINT: 1387 if (sc->nbcnvifs >= ATH_BCBUF) { 1388 ret = -ENOBUFS; 1389 goto out; 1390 } 1391 ic_opmode = vif->type; 1392 break; 1393 default: 1394 ath_err(common, "Interface type %d not yet supported\n", 1395 vif->type); 1396 ret = -EOPNOTSUPP; 1397 goto out; 1398 } 1399 1400 ath_dbg(common, ATH_DBG_CONFIG, 1401 "Attach a VIF of type: %d\n", ic_opmode); 1402 1403 /* Set the VIF opmode */ 1404 avp->av_opmode = ic_opmode; 1405 avp->av_bslot = -1; 1406 1407 sc->nvifs++; 1408 1409 ath9k_set_bssid_mask(hw, vif); 1410 1411 if (sc->nvifs > 1) 1412 goto out; /* skip global settings for secondary vif */ 1413 1414 if (ic_opmode == NL80211_IFTYPE_AP) { 1415 ath9k_hw_set_tsfadjust(ah, 1); 1416 sc->sc_flags |= SC_OP_TSF_RESET; 1417 } 1418 1419 /* Set the device opmode */ 1420 ah->opmode = ic_opmode; 1421 1422 /* 1423 * Enable MIB interrupts when there are hardware phy counters. 1424 * Note we only do this (at the moment) for station mode. 1425 */ 1426 if ((vif->type == NL80211_IFTYPE_STATION) || 1427 (vif->type == NL80211_IFTYPE_ADHOC) || 1428 (vif->type == NL80211_IFTYPE_MESH_POINT)) { 1429 if (ah->config.enable_ani) 1430 ah->imask |= ATH9K_INT_MIB; 1431 ah->imask |= ATH9K_INT_TSFOOR; 1432 } 1433 1434 ath9k_hw_set_interrupts(ah, ah->imask); 1435 1436 if (vif->type == NL80211_IFTYPE_AP || 1437 vif->type == NL80211_IFTYPE_ADHOC) { 1438 sc->sc_flags |= SC_OP_ANI_RUN; 1439 ath_start_ani(common); 1440 } 1441 1442 out: 1443 mutex_unlock(&sc->mutex); 1444 return ret; 1445 } 1446 1447 static void ath9k_reclaim_beacon(struct ath_softc *sc, 1448 struct ieee80211_vif *vif) 1449 { 1450 struct ath_vif *avp = (void *)vif->drv_priv; 1451 1452 /* Disable SWBA interrupt */ 1453 sc->sc_ah->imask &= ~ATH9K_INT_SWBA; 1454 ath9k_ps_wakeup(sc); 1455 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask); 1456 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq); 1457 tasklet_kill(&sc->bcon_tasklet); 1458 ath9k_ps_restore(sc); 1459 1460 ath_beacon_return(sc, avp); 1461 sc->sc_flags &= ~SC_OP_BEACONS; 1462 1463 if (sc->nbcnvifs > 0) { 1464 /* Re-enable beaconing */ 1465 sc->sc_ah->imask |= ATH9K_INT_SWBA; 1466 ath9k_ps_wakeup(sc); 1467 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask); 1468 ath9k_ps_restore(sc); 1469 } 1470 } 1471 1472 static int ath9k_change_interface(struct ieee80211_hw *hw, 1473 struct ieee80211_vif *vif, 1474 enum nl80211_iftype new_type, 1475 bool p2p) 1476 { 1477 struct ath_wiphy *aphy = hw->priv; 1478 struct ath_softc *sc = aphy->sc; 1479 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1480 1481 ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n"); 1482 mutex_lock(&sc->mutex); 1483 1484 switch (new_type) { 1485 case NL80211_IFTYPE_AP: 1486 case NL80211_IFTYPE_ADHOC: 1487 if (sc->nbcnvifs >= ATH_BCBUF) { 1488 ath_err(common, "No beacon slot available\n"); 1489 return -ENOBUFS; 1490 } 1491 break; 1492 case NL80211_IFTYPE_STATION: 1493 /* Stop ANI */ 1494 sc->sc_flags &= ~SC_OP_ANI_RUN; 1495 del_timer_sync(&common->ani.timer); 1496 if ((vif->type == NL80211_IFTYPE_AP) || 1497 (vif->type == NL80211_IFTYPE_ADHOC)) 1498 ath9k_reclaim_beacon(sc, vif); 1499 break; 1500 default: 1501 ath_err(common, "Interface type %d not yet supported\n", 1502 vif->type); 1503 mutex_unlock(&sc->mutex); 1504 return -ENOTSUPP; 1505 } 1506 vif->type = new_type; 1507 vif->p2p = p2p; 1508 1509 mutex_unlock(&sc->mutex); 1510 return 0; 1511 } 1512 1513 static void ath9k_remove_interface(struct ieee80211_hw *hw, 1514 struct ieee80211_vif *vif) 1515 { 1516 struct ath_wiphy *aphy = hw->priv; 1517 struct ath_softc *sc = aphy->sc; 1518 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1519 1520 ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n"); 1521 1522 mutex_lock(&sc->mutex); 1523 1524 /* Stop ANI */ 1525 sc->sc_flags &= ~SC_OP_ANI_RUN; 1526 del_timer_sync(&common->ani.timer); 1527 1528 /* Reclaim beacon resources */ 1529 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) || 1530 (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) || 1531 (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) 1532 ath9k_reclaim_beacon(sc, vif); 1533 1534 sc->nvifs--; 1535 1536 mutex_unlock(&sc->mutex); 1537 } 1538 1539 static void ath9k_enable_ps(struct ath_softc *sc) 1540 { 1541 struct ath_hw *ah = sc->sc_ah; 1542 1543 sc->ps_enabled = true; 1544 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) { 1545 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) { 1546 ah->imask |= ATH9K_INT_TIM_TIMER; 1547 ath9k_hw_set_interrupts(ah, ah->imask); 1548 } 1549 ath9k_hw_setrxabort(ah, 1); 1550 } 1551 } 1552 1553 static void ath9k_disable_ps(struct ath_softc *sc) 1554 { 1555 struct ath_hw *ah = sc->sc_ah; 1556 1557 sc->ps_enabled = false; 1558 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE); 1559 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) { 1560 ath9k_hw_setrxabort(ah, 0); 1561 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON | 1562 PS_WAIT_FOR_CAB | 1563 PS_WAIT_FOR_PSPOLL_DATA | 1564 PS_WAIT_FOR_TX_ACK); 1565 if (ah->imask & ATH9K_INT_TIM_TIMER) { 1566 ah->imask &= ~ATH9K_INT_TIM_TIMER; 1567 ath9k_hw_set_interrupts(ah, ah->imask); 1568 } 1569 } 1570 1571 } 1572 1573 static int ath9k_config(struct ieee80211_hw *hw, u32 changed) 1574 { 1575 struct ath_wiphy *aphy = hw->priv; 1576 struct ath_softc *sc = aphy->sc; 1577 struct ath_hw *ah = sc->sc_ah; 1578 struct ath_common *common = ath9k_hw_common(ah); 1579 struct ieee80211_conf *conf = &hw->conf; 1580 bool disable_radio; 1581 1582 mutex_lock(&sc->mutex); 1583 1584 /* 1585 * Leave this as the first check because we need to turn on the 1586 * radio if it was disabled before prior to processing the rest 1587 * of the changes. Likewise we must only disable the radio towards 1588 * the end. 1589 */ 1590 if (changed & IEEE80211_CONF_CHANGE_IDLE) { 1591 bool enable_radio; 1592 bool all_wiphys_idle; 1593 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE); 1594 1595 spin_lock_bh(&sc->wiphy_lock); 1596 all_wiphys_idle = ath9k_all_wiphys_idle(sc); 1597 ath9k_set_wiphy_idle(aphy, idle); 1598 1599 enable_radio = (!idle && all_wiphys_idle); 1600 1601 /* 1602 * After we unlock here its possible another wiphy 1603 * can be re-renabled so to account for that we will 1604 * only disable the radio toward the end of this routine 1605 * if by then all wiphys are still idle. 1606 */ 1607 spin_unlock_bh(&sc->wiphy_lock); 1608 1609 if (enable_radio) { 1610 sc->ps_idle = false; 1611 ath_radio_enable(sc, hw); 1612 ath_dbg(common, ATH_DBG_CONFIG, 1613 "not-idle: enabling radio\n"); 1614 } 1615 } 1616 1617 /* 1618 * We just prepare to enable PS. We have to wait until our AP has 1619 * ACK'd our null data frame to disable RX otherwise we'll ignore 1620 * those ACKs and end up retransmitting the same null data frames. 1621 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode. 1622 */ 1623 if (changed & IEEE80211_CONF_CHANGE_PS) { 1624 unsigned long flags; 1625 spin_lock_irqsave(&sc->sc_pm_lock, flags); 1626 if (conf->flags & IEEE80211_CONF_PS) 1627 ath9k_enable_ps(sc); 1628 else 1629 ath9k_disable_ps(sc); 1630 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 1631 } 1632 1633 if (changed & IEEE80211_CONF_CHANGE_MONITOR) { 1634 if (conf->flags & IEEE80211_CONF_MONITOR) { 1635 ath_dbg(common, ATH_DBG_CONFIG, 1636 "Monitor mode is enabled\n"); 1637 sc->sc_ah->is_monitoring = true; 1638 } else { 1639 ath_dbg(common, ATH_DBG_CONFIG, 1640 "Monitor mode is disabled\n"); 1641 sc->sc_ah->is_monitoring = false; 1642 } 1643 } 1644 1645 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) { 1646 struct ieee80211_channel *curchan = hw->conf.channel; 1647 int pos = curchan->hw_value; 1648 int old_pos = -1; 1649 unsigned long flags; 1650 1651 if (ah->curchan) 1652 old_pos = ah->curchan - &ah->channels[0]; 1653 1654 aphy->chan_idx = pos; 1655 aphy->chan_is_ht = conf_is_ht(conf); 1656 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) 1657 sc->sc_flags |= SC_OP_OFFCHANNEL; 1658 else 1659 sc->sc_flags &= ~SC_OP_OFFCHANNEL; 1660 1661 if (aphy->state == ATH_WIPHY_SCAN || 1662 aphy->state == ATH_WIPHY_ACTIVE) 1663 ath9k_wiphy_pause_all_forced(sc, aphy); 1664 else { 1665 /* 1666 * Do not change operational channel based on a paused 1667 * wiphy changes. 1668 */ 1669 goto skip_chan_change; 1670 } 1671 1672 ath_dbg(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n", 1673 curchan->center_freq); 1674 1675 /* XXX: remove me eventualy */ 1676 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]); 1677 1678 ath_update_chainmask(sc, conf_is_ht(conf)); 1679 1680 /* update survey stats for the old channel before switching */ 1681 spin_lock_irqsave(&common->cc_lock, flags); 1682 ath_update_survey_stats(sc); 1683 spin_unlock_irqrestore(&common->cc_lock, flags); 1684 1685 /* 1686 * If the operating channel changes, change the survey in-use flags 1687 * along with it. 1688 * Reset the survey data for the new channel, unless we're switching 1689 * back to the operating channel from an off-channel operation. 1690 */ 1691 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) && 1692 sc->cur_survey != &sc->survey[pos]) { 1693 1694 if (sc->cur_survey) 1695 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE; 1696 1697 sc->cur_survey = &sc->survey[pos]; 1698 1699 memset(sc->cur_survey, 0, sizeof(struct survey_info)); 1700 sc->cur_survey->filled |= SURVEY_INFO_IN_USE; 1701 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) { 1702 memset(&sc->survey[pos], 0, sizeof(struct survey_info)); 1703 } 1704 1705 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) { 1706 ath_err(common, "Unable to set channel\n"); 1707 mutex_unlock(&sc->mutex); 1708 return -EINVAL; 1709 } 1710 1711 /* 1712 * The most recent snapshot of channel->noisefloor for the old 1713 * channel is only available after the hardware reset. Copy it to 1714 * the survey stats now. 1715 */ 1716 if (old_pos >= 0) 1717 ath_update_survey_nf(sc, old_pos); 1718 } 1719 1720 skip_chan_change: 1721 if (changed & IEEE80211_CONF_CHANGE_POWER) { 1722 sc->config.txpowlimit = 2 * conf->power_level; 1723 ath_update_txpow(sc); 1724 } 1725 1726 spin_lock_bh(&sc->wiphy_lock); 1727 disable_radio = ath9k_all_wiphys_idle(sc); 1728 spin_unlock_bh(&sc->wiphy_lock); 1729 1730 if (disable_radio) { 1731 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n"); 1732 sc->ps_idle = true; 1733 ath_radio_disable(sc, hw); 1734 } 1735 1736 mutex_unlock(&sc->mutex); 1737 1738 return 0; 1739 } 1740 1741 #define SUPPORTED_FILTERS \ 1742 (FIF_PROMISC_IN_BSS | \ 1743 FIF_ALLMULTI | \ 1744 FIF_CONTROL | \ 1745 FIF_PSPOLL | \ 1746 FIF_OTHER_BSS | \ 1747 FIF_BCN_PRBRESP_PROMISC | \ 1748 FIF_PROBE_REQ | \ 1749 FIF_FCSFAIL) 1750 1751 /* FIXME: sc->sc_full_reset ? */ 1752 static void ath9k_configure_filter(struct ieee80211_hw *hw, 1753 unsigned int changed_flags, 1754 unsigned int *total_flags, 1755 u64 multicast) 1756 { 1757 struct ath_wiphy *aphy = hw->priv; 1758 struct ath_softc *sc = aphy->sc; 1759 u32 rfilt; 1760 1761 changed_flags &= SUPPORTED_FILTERS; 1762 *total_flags &= SUPPORTED_FILTERS; 1763 1764 sc->rx.rxfilter = *total_flags; 1765 ath9k_ps_wakeup(sc); 1766 rfilt = ath_calcrxfilter(sc); 1767 ath9k_hw_setrxfilter(sc->sc_ah, rfilt); 1768 ath9k_ps_restore(sc); 1769 1770 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG, 1771 "Set HW RX filter: 0x%x\n", rfilt); 1772 } 1773 1774 static int ath9k_sta_add(struct ieee80211_hw *hw, 1775 struct ieee80211_vif *vif, 1776 struct ieee80211_sta *sta) 1777 { 1778 struct ath_wiphy *aphy = hw->priv; 1779 struct ath_softc *sc = aphy->sc; 1780 1781 ath_node_attach(sc, sta); 1782 1783 return 0; 1784 } 1785 1786 static int ath9k_sta_remove(struct ieee80211_hw *hw, 1787 struct ieee80211_vif *vif, 1788 struct ieee80211_sta *sta) 1789 { 1790 struct ath_wiphy *aphy = hw->priv; 1791 struct ath_softc *sc = aphy->sc; 1792 1793 ath_node_detach(sc, sta); 1794 1795 return 0; 1796 } 1797 1798 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue, 1799 const struct ieee80211_tx_queue_params *params) 1800 { 1801 struct ath_wiphy *aphy = hw->priv; 1802 struct ath_softc *sc = aphy->sc; 1803 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1804 struct ath_txq *txq; 1805 struct ath9k_tx_queue_info qi; 1806 int ret = 0; 1807 1808 if (queue >= WME_NUM_AC) 1809 return 0; 1810 1811 txq = sc->tx.txq_map[queue]; 1812 1813 mutex_lock(&sc->mutex); 1814 1815 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info)); 1816 1817 qi.tqi_aifs = params->aifs; 1818 qi.tqi_cwmin = params->cw_min; 1819 qi.tqi_cwmax = params->cw_max; 1820 qi.tqi_burstTime = params->txop; 1821 1822 ath_dbg(common, ATH_DBG_CONFIG, 1823 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n", 1824 queue, txq->axq_qnum, params->aifs, params->cw_min, 1825 params->cw_max, params->txop); 1826 1827 ret = ath_txq_update(sc, txq->axq_qnum, &qi); 1828 if (ret) 1829 ath_err(common, "TXQ Update failed\n"); 1830 1831 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) 1832 if (queue == WME_AC_BE && !ret) 1833 ath_beaconq_config(sc); 1834 1835 mutex_unlock(&sc->mutex); 1836 1837 return ret; 1838 } 1839 1840 static int ath9k_set_key(struct ieee80211_hw *hw, 1841 enum set_key_cmd cmd, 1842 struct ieee80211_vif *vif, 1843 struct ieee80211_sta *sta, 1844 struct ieee80211_key_conf *key) 1845 { 1846 struct ath_wiphy *aphy = hw->priv; 1847 struct ath_softc *sc = aphy->sc; 1848 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1849 int ret = 0; 1850 1851 if (modparam_nohwcrypt) 1852 return -ENOSPC; 1853 1854 mutex_lock(&sc->mutex); 1855 ath9k_ps_wakeup(sc); 1856 ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n"); 1857 1858 switch (cmd) { 1859 case SET_KEY: 1860 ret = ath_key_config(common, vif, sta, key); 1861 if (ret >= 0) { 1862 key->hw_key_idx = ret; 1863 /* push IV and Michael MIC generation to stack */ 1864 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV; 1865 if (key->cipher == WLAN_CIPHER_SUITE_TKIP) 1866 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC; 1867 if (sc->sc_ah->sw_mgmt_crypto && 1868 key->cipher == WLAN_CIPHER_SUITE_CCMP) 1869 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT; 1870 ret = 0; 1871 } 1872 break; 1873 case DISABLE_KEY: 1874 ath_key_delete(common, key); 1875 break; 1876 default: 1877 ret = -EINVAL; 1878 } 1879 1880 ath9k_ps_restore(sc); 1881 mutex_unlock(&sc->mutex); 1882 1883 return ret; 1884 } 1885 1886 static void ath9k_bss_info_changed(struct ieee80211_hw *hw, 1887 struct ieee80211_vif *vif, 1888 struct ieee80211_bss_conf *bss_conf, 1889 u32 changed) 1890 { 1891 struct ath_wiphy *aphy = hw->priv; 1892 struct ath_softc *sc = aphy->sc; 1893 struct ath_hw *ah = sc->sc_ah; 1894 struct ath_common *common = ath9k_hw_common(ah); 1895 struct ath_vif *avp = (void *)vif->drv_priv; 1896 int slottime; 1897 int error; 1898 1899 mutex_lock(&sc->mutex); 1900 1901 if (changed & BSS_CHANGED_BSSID) { 1902 /* Set BSSID */ 1903 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN); 1904 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN); 1905 common->curaid = 0; 1906 ath9k_hw_write_associd(ah); 1907 1908 /* Set aggregation protection mode parameters */ 1909 sc->config.ath_aggr_prot = 0; 1910 1911 /* Only legacy IBSS for now */ 1912 if (vif->type == NL80211_IFTYPE_ADHOC) 1913 ath_update_chainmask(sc, 0); 1914 1915 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n", 1916 common->curbssid, common->curaid); 1917 1918 /* need to reconfigure the beacon */ 1919 sc->sc_flags &= ~SC_OP_BEACONS ; 1920 } 1921 1922 /* Enable transmission of beacons (AP, IBSS, MESH) */ 1923 if ((changed & BSS_CHANGED_BEACON) || 1924 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) { 1925 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq); 1926 error = ath_beacon_alloc(aphy, vif); 1927 if (!error) 1928 ath_beacon_config(sc, vif); 1929 } 1930 1931 if (changed & BSS_CHANGED_ERP_SLOT) { 1932 if (bss_conf->use_short_slot) 1933 slottime = 9; 1934 else 1935 slottime = 20; 1936 if (vif->type == NL80211_IFTYPE_AP) { 1937 /* 1938 * Defer update, so that connected stations can adjust 1939 * their settings at the same time. 1940 * See beacon.c for more details 1941 */ 1942 sc->beacon.slottime = slottime; 1943 sc->beacon.updateslot = UPDATE; 1944 } else { 1945 ah->slottime = slottime; 1946 ath9k_hw_init_global_settings(ah); 1947 } 1948 } 1949 1950 /* Disable transmission of beacons */ 1951 if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon) 1952 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq); 1953 1954 if (changed & BSS_CHANGED_BEACON_INT) { 1955 sc->beacon_interval = bss_conf->beacon_int; 1956 /* 1957 * In case of AP mode, the HW TSF has to be reset 1958 * when the beacon interval changes. 1959 */ 1960 if (vif->type == NL80211_IFTYPE_AP) { 1961 sc->sc_flags |= SC_OP_TSF_RESET; 1962 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq); 1963 error = ath_beacon_alloc(aphy, vif); 1964 if (!error) 1965 ath_beacon_config(sc, vif); 1966 } else { 1967 ath_beacon_config(sc, vif); 1968 } 1969 } 1970 1971 if (changed & BSS_CHANGED_ERP_PREAMBLE) { 1972 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n", 1973 bss_conf->use_short_preamble); 1974 if (bss_conf->use_short_preamble) 1975 sc->sc_flags |= SC_OP_PREAMBLE_SHORT; 1976 else 1977 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT; 1978 } 1979 1980 if (changed & BSS_CHANGED_ERP_CTS_PROT) { 1981 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n", 1982 bss_conf->use_cts_prot); 1983 if (bss_conf->use_cts_prot && 1984 hw->conf.channel->band != IEEE80211_BAND_5GHZ) 1985 sc->sc_flags |= SC_OP_PROTECT_ENABLE; 1986 else 1987 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE; 1988 } 1989 1990 if (changed & BSS_CHANGED_ASSOC) { 1991 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n", 1992 bss_conf->assoc); 1993 ath9k_bss_assoc_info(sc, hw, vif, bss_conf); 1994 } 1995 1996 mutex_unlock(&sc->mutex); 1997 } 1998 1999 static u64 ath9k_get_tsf(struct ieee80211_hw *hw) 2000 { 2001 u64 tsf; 2002 struct ath_wiphy *aphy = hw->priv; 2003 struct ath_softc *sc = aphy->sc; 2004 2005 mutex_lock(&sc->mutex); 2006 ath9k_ps_wakeup(sc); 2007 tsf = ath9k_hw_gettsf64(sc->sc_ah); 2008 ath9k_ps_restore(sc); 2009 mutex_unlock(&sc->mutex); 2010 2011 return tsf; 2012 } 2013 2014 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf) 2015 { 2016 struct ath_wiphy *aphy = hw->priv; 2017 struct ath_softc *sc = aphy->sc; 2018 2019 mutex_lock(&sc->mutex); 2020 ath9k_ps_wakeup(sc); 2021 ath9k_hw_settsf64(sc->sc_ah, tsf); 2022 ath9k_ps_restore(sc); 2023 mutex_unlock(&sc->mutex); 2024 } 2025 2026 static void ath9k_reset_tsf(struct ieee80211_hw *hw) 2027 { 2028 struct ath_wiphy *aphy = hw->priv; 2029 struct ath_softc *sc = aphy->sc; 2030 2031 mutex_lock(&sc->mutex); 2032 2033 ath9k_ps_wakeup(sc); 2034 ath9k_hw_reset_tsf(sc->sc_ah); 2035 ath9k_ps_restore(sc); 2036 2037 mutex_unlock(&sc->mutex); 2038 } 2039 2040 static int ath9k_ampdu_action(struct ieee80211_hw *hw, 2041 struct ieee80211_vif *vif, 2042 enum ieee80211_ampdu_mlme_action action, 2043 struct ieee80211_sta *sta, 2044 u16 tid, u16 *ssn) 2045 { 2046 struct ath_wiphy *aphy = hw->priv; 2047 struct ath_softc *sc = aphy->sc; 2048 int ret = 0; 2049 2050 local_bh_disable(); 2051 2052 switch (action) { 2053 case IEEE80211_AMPDU_RX_START: 2054 if (!(sc->sc_flags & SC_OP_RXAGGR)) 2055 ret = -ENOTSUPP; 2056 break; 2057 case IEEE80211_AMPDU_RX_STOP: 2058 break; 2059 case IEEE80211_AMPDU_TX_START: 2060 if (!(sc->sc_flags & SC_OP_TXAGGR)) 2061 return -EOPNOTSUPP; 2062 2063 ath9k_ps_wakeup(sc); 2064 ret = ath_tx_aggr_start(sc, sta, tid, ssn); 2065 if (!ret) 2066 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid); 2067 ath9k_ps_restore(sc); 2068 break; 2069 case IEEE80211_AMPDU_TX_STOP: 2070 ath9k_ps_wakeup(sc); 2071 ath_tx_aggr_stop(sc, sta, tid); 2072 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid); 2073 ath9k_ps_restore(sc); 2074 break; 2075 case IEEE80211_AMPDU_TX_OPERATIONAL: 2076 ath9k_ps_wakeup(sc); 2077 ath_tx_aggr_resume(sc, sta, tid); 2078 ath9k_ps_restore(sc); 2079 break; 2080 default: 2081 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n"); 2082 } 2083 2084 local_bh_enable(); 2085 2086 return ret; 2087 } 2088 2089 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx, 2090 struct survey_info *survey) 2091 { 2092 struct ath_wiphy *aphy = hw->priv; 2093 struct ath_softc *sc = aphy->sc; 2094 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 2095 struct ieee80211_supported_band *sband; 2096 struct ieee80211_channel *chan; 2097 unsigned long flags; 2098 int pos; 2099 2100 spin_lock_irqsave(&common->cc_lock, flags); 2101 if (idx == 0) 2102 ath_update_survey_stats(sc); 2103 2104 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ]; 2105 if (sband && idx >= sband->n_channels) { 2106 idx -= sband->n_channels; 2107 sband = NULL; 2108 } 2109 2110 if (!sband) 2111 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ]; 2112 2113 if (!sband || idx >= sband->n_channels) { 2114 spin_unlock_irqrestore(&common->cc_lock, flags); 2115 return -ENOENT; 2116 } 2117 2118 chan = &sband->channels[idx]; 2119 pos = chan->hw_value; 2120 memcpy(survey, &sc->survey[pos], sizeof(*survey)); 2121 survey->channel = chan; 2122 spin_unlock_irqrestore(&common->cc_lock, flags); 2123 2124 return 0; 2125 } 2126 2127 static void ath9k_sw_scan_start(struct ieee80211_hw *hw) 2128 { 2129 struct ath_wiphy *aphy = hw->priv; 2130 struct ath_softc *sc = aphy->sc; 2131 2132 mutex_lock(&sc->mutex); 2133 if (ath9k_wiphy_scanning(sc)) { 2134 /* 2135 * There is a race here in mac80211 but fixing it requires 2136 * we revisit how we handle the scan complete callback. 2137 * After mac80211 fixes we will not have configured hardware 2138 * to the home channel nor would we have configured the RX 2139 * filter yet. 2140 */ 2141 mutex_unlock(&sc->mutex); 2142 return; 2143 } 2144 2145 aphy->state = ATH_WIPHY_SCAN; 2146 ath9k_wiphy_pause_all_forced(sc, aphy); 2147 mutex_unlock(&sc->mutex); 2148 } 2149 2150 /* 2151 * XXX: this requires a revisit after the driver 2152 * scan_complete gets moved to another place/removed in mac80211. 2153 */ 2154 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw) 2155 { 2156 struct ath_wiphy *aphy = hw->priv; 2157 struct ath_softc *sc = aphy->sc; 2158 2159 mutex_lock(&sc->mutex); 2160 aphy->state = ATH_WIPHY_ACTIVE; 2161 mutex_unlock(&sc->mutex); 2162 } 2163 2164 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class) 2165 { 2166 struct ath_wiphy *aphy = hw->priv; 2167 struct ath_softc *sc = aphy->sc; 2168 struct ath_hw *ah = sc->sc_ah; 2169 2170 mutex_lock(&sc->mutex); 2171 ah->coverage_class = coverage_class; 2172 ath9k_hw_init_global_settings(ah); 2173 mutex_unlock(&sc->mutex); 2174 } 2175 2176 struct ieee80211_ops ath9k_ops = { 2177 .tx = ath9k_tx, 2178 .start = ath9k_start, 2179 .stop = ath9k_stop, 2180 .add_interface = ath9k_add_interface, 2181 .change_interface = ath9k_change_interface, 2182 .remove_interface = ath9k_remove_interface, 2183 .config = ath9k_config, 2184 .configure_filter = ath9k_configure_filter, 2185 .sta_add = ath9k_sta_add, 2186 .sta_remove = ath9k_sta_remove, 2187 .conf_tx = ath9k_conf_tx, 2188 .bss_info_changed = ath9k_bss_info_changed, 2189 .set_key = ath9k_set_key, 2190 .get_tsf = ath9k_get_tsf, 2191 .set_tsf = ath9k_set_tsf, 2192 .reset_tsf = ath9k_reset_tsf, 2193 .ampdu_action = ath9k_ampdu_action, 2194 .get_survey = ath9k_get_survey, 2195 .sw_scan_start = ath9k_sw_scan_start, 2196 .sw_scan_complete = ath9k_sw_scan_complete, 2197 .rfkill_poll = ath9k_rfkill_poll_state, 2198 .set_coverage_class = ath9k_set_coverage_class, 2199 }; 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