1 /* 2 * Copyright (c) 2010-2011 Atheros Communications Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef ATH9K_HW_OPS_H 18 #define ATH9K_HW_OPS_H 19 20 #include "hw.h" 21 22 /* Hardware core and driver accessible callbacks */ 23 24 static inline void ath9k_hw_configpcipowersave(struct ath_hw *ah, 25 bool power_off) 26 { 27 if (!ah->aspm_enabled) 28 return; 29 30 ath9k_hw_ops(ah)->config_pci_powersave(ah, power_off); 31 } 32 33 static inline void ath9k_hw_rxena(struct ath_hw *ah) 34 { 35 ath9k_hw_ops(ah)->rx_enable(ah); 36 } 37 38 static inline void ath9k_hw_set_desc_link(struct ath_hw *ah, void *ds, 39 u32 link) 40 { 41 ath9k_hw_ops(ah)->set_desc_link(ds, link); 42 } 43 44 static inline int ath9k_hw_calibrate(struct ath_hw *ah, 45 struct ath9k_channel *chan, 46 u8 rxchainmask, bool longcal) 47 { 48 return ath9k_hw_ops(ah)->calibrate(ah, chan, rxchainmask, longcal); 49 } 50 51 static inline bool ath9k_hw_getisr(struct ath_hw *ah, enum ath9k_int *masked, 52 u32 *sync_cause_p) 53 { 54 return ath9k_hw_ops(ah)->get_isr(ah, masked, sync_cause_p); 55 } 56 57 static inline void ath9k_hw_set_txdesc(struct ath_hw *ah, void *ds, 58 struct ath_tx_info *i) 59 { 60 return ath9k_hw_ops(ah)->set_txdesc(ah, ds, i); 61 } 62 63 static inline int ath9k_hw_txprocdesc(struct ath_hw *ah, void *ds, 64 struct ath_tx_status *ts) 65 { 66 return ath9k_hw_ops(ah)->proc_txdesc(ah, ds, ts); 67 } 68 69 static inline int ath9k_hw_get_duration(struct ath_hw *ah, const void *ds, 70 int index) 71 { 72 return ath9k_hw_ops(ah)->get_duration(ah, ds, index); 73 } 74 75 static inline void ath9k_hw_antdiv_comb_conf_get(struct ath_hw *ah, 76 struct ath_hw_antcomb_conf *antconf) 77 { 78 ath9k_hw_ops(ah)->antdiv_comb_conf_get(ah, antconf); 79 } 80 81 static inline void ath9k_hw_antdiv_comb_conf_set(struct ath_hw *ah, 82 struct ath_hw_antcomb_conf *antconf) 83 { 84 ath9k_hw_ops(ah)->antdiv_comb_conf_set(ah, antconf); 85 } 86 87 static inline void ath9k_hw_tx99_start(struct ath_hw *ah, u32 qnum) 88 { 89 ath9k_hw_ops(ah)->tx99_start(ah, qnum); 90 } 91 92 static inline void ath9k_hw_tx99_stop(struct ath_hw *ah) 93 { 94 ath9k_hw_ops(ah)->tx99_stop(ah); 95 } 96 97 static inline void ath9k_hw_tx99_set_txpower(struct ath_hw *ah, u8 power) 98 { 99 if (ath9k_hw_ops(ah)->tx99_set_txpower) 100 ath9k_hw_ops(ah)->tx99_set_txpower(ah, power); 101 } 102 103 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT 104 105 static inline void ath9k_hw_set_bt_ant_diversity(struct ath_hw *ah, bool enable) 106 { 107 if (ath9k_hw_ops(ah)->set_bt_ant_diversity) 108 ath9k_hw_ops(ah)->set_bt_ant_diversity(ah, enable); 109 } 110 111 #endif 112 113 /* Private hardware call ops */ 114 115 static inline void ath9k_hw_init_hang_checks(struct ath_hw *ah) 116 { 117 ath9k_hw_private_ops(ah)->init_hang_checks(ah); 118 } 119 120 static inline bool ath9k_hw_detect_mac_hang(struct ath_hw *ah) 121 { 122 return ath9k_hw_private_ops(ah)->detect_mac_hang(ah); 123 } 124 125 static inline bool ath9k_hw_detect_bb_hang(struct ath_hw *ah) 126 { 127 return ath9k_hw_private_ops(ah)->detect_bb_hang(ah); 128 } 129 130 /* PHY ops */ 131 132 static inline int ath9k_hw_rf_set_freq(struct ath_hw *ah, 133 struct ath9k_channel *chan) 134 { 135 return ath9k_hw_private_ops(ah)->rf_set_freq(ah, chan); 136 } 137 138 static inline void ath9k_hw_spur_mitigate_freq(struct ath_hw *ah, 139 struct ath9k_channel *chan) 140 { 141 ath9k_hw_private_ops(ah)->spur_mitigate_freq(ah, chan); 142 } 143 144 static inline bool ath9k_hw_set_rf_regs(struct ath_hw *ah, 145 struct ath9k_channel *chan, 146 u16 modesIndex) 147 { 148 if (!ath9k_hw_private_ops(ah)->set_rf_regs) 149 return true; 150 151 return ath9k_hw_private_ops(ah)->set_rf_regs(ah, chan, modesIndex); 152 } 153 154 static inline void ath9k_hw_init_bb(struct ath_hw *ah, 155 struct ath9k_channel *chan) 156 { 157 return ath9k_hw_private_ops(ah)->init_bb(ah, chan); 158 } 159 160 static inline void ath9k_hw_set_channel_regs(struct ath_hw *ah, 161 struct ath9k_channel *chan) 162 { 163 return ath9k_hw_private_ops(ah)->set_channel_regs(ah, chan); 164 } 165 166 static inline int ath9k_hw_process_ini(struct ath_hw *ah, 167 struct ath9k_channel *chan) 168 { 169 return ath9k_hw_private_ops(ah)->process_ini(ah, chan); 170 } 171 172 static inline void ath9k_olc_init(struct ath_hw *ah) 173 { 174 if (!ath9k_hw_private_ops(ah)->olc_init) 175 return; 176 177 return ath9k_hw_private_ops(ah)->olc_init(ah); 178 } 179 180 static inline void ath9k_hw_set_rfmode(struct ath_hw *ah, 181 struct ath9k_channel *chan) 182 { 183 return ath9k_hw_private_ops(ah)->set_rfmode(ah, chan); 184 } 185 186 static inline void ath9k_hw_mark_phy_inactive(struct ath_hw *ah) 187 { 188 return ath9k_hw_private_ops(ah)->mark_phy_inactive(ah); 189 } 190 191 static inline void ath9k_hw_set_delta_slope(struct ath_hw *ah, 192 struct ath9k_channel *chan) 193 { 194 return ath9k_hw_private_ops(ah)->set_delta_slope(ah, chan); 195 } 196 197 static inline bool ath9k_hw_rfbus_req(struct ath_hw *ah) 198 { 199 return ath9k_hw_private_ops(ah)->rfbus_req(ah); 200 } 201 202 static inline void ath9k_hw_rfbus_done(struct ath_hw *ah) 203 { 204 return ath9k_hw_private_ops(ah)->rfbus_done(ah); 205 } 206 207 static inline void ath9k_hw_restore_chainmask(struct ath_hw *ah) 208 { 209 if (!ath9k_hw_private_ops(ah)->restore_chainmask) 210 return; 211 212 return ath9k_hw_private_ops(ah)->restore_chainmask(ah); 213 } 214 215 static inline bool ath9k_hw_ani_control(struct ath_hw *ah, 216 enum ath9k_ani_cmd cmd, int param) 217 { 218 return ath9k_hw_private_ops(ah)->ani_control(ah, cmd, param); 219 } 220 221 static inline void ath9k_hw_do_getnf(struct ath_hw *ah, 222 int16_t nfarray[NUM_NF_READINGS]) 223 { 224 ath9k_hw_private_ops(ah)->do_getnf(ah, nfarray); 225 } 226 227 static inline bool ath9k_hw_init_cal(struct ath_hw *ah, 228 struct ath9k_channel *chan) 229 { 230 return ath9k_hw_private_ops(ah)->init_cal(ah, chan); 231 } 232 233 static inline void ath9k_hw_setup_calibration(struct ath_hw *ah, 234 struct ath9k_cal_list *currCal) 235 { 236 ath9k_hw_private_ops(ah)->setup_calibration(ah, currCal); 237 } 238 239 static inline int ath9k_hw_fast_chan_change(struct ath_hw *ah, 240 struct ath9k_channel *chan, 241 u8 *ini_reloaded) 242 { 243 return ath9k_hw_private_ops(ah)->fast_chan_change(ah, chan, 244 ini_reloaded); 245 } 246 247 static inline void ath9k_hw_set_radar_params(struct ath_hw *ah) 248 { 249 if (!ath9k_hw_private_ops(ah)->set_radar_params) 250 return; 251 252 ath9k_hw_private_ops(ah)->set_radar_params(ah, &ah->radar_conf); 253 } 254 255 static inline void ath9k_hw_init_cal_settings(struct ath_hw *ah) 256 { 257 ath9k_hw_private_ops(ah)->init_cal_settings(ah); 258 } 259 260 static inline u32 ath9k_hw_compute_pll_control(struct ath_hw *ah, 261 struct ath9k_channel *chan) 262 { 263 return ath9k_hw_private_ops(ah)->compute_pll_control(ah, chan); 264 } 265 266 static inline void ath9k_hw_init_mode_gain_regs(struct ath_hw *ah) 267 { 268 if (!ath9k_hw_private_ops(ah)->init_mode_gain_regs) 269 return; 270 271 ath9k_hw_private_ops(ah)->init_mode_gain_regs(ah); 272 } 273 274 static inline void ath9k_hw_ani_cache_ini_regs(struct ath_hw *ah) 275 { 276 if (!ath9k_hw_private_ops(ah)->ani_cache_ini_regs) 277 return; 278 279 ath9k_hw_private_ops(ah)->ani_cache_ini_regs(ah); 280 } 281 282 #endif /* ATH9K_HW_OPS_H */ 283