1 /* 2 * Copyright (c) 2008-2009 Atheros Communications Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef DEBUG_H 18 #define DEBUG_H 19 20 #include "hw.h" 21 #include "rc.h" 22 23 struct ath_txq; 24 struct ath_buf; 25 26 #ifdef CONFIG_ATH9K_DEBUGFS 27 #define TX_STAT_INC(q, c) sc->debug.stats.txstats[q].c++ 28 #else 29 #define TX_STAT_INC(q, c) do { } while (0) 30 #endif 31 32 #ifdef CONFIG_ATH9K_DEBUGFS 33 34 /** 35 * struct ath_interrupt_stats - Contains statistics about interrupts 36 * @total: Total no. of interrupts generated so far 37 * @rxok: RX with no errors 38 * @rxlp: RX with low priority RX 39 * @rxhp: RX with high priority, uapsd only 40 * @rxeol: RX with no more RXDESC available 41 * @rxorn: RX FIFO overrun 42 * @txok: TX completed at the requested rate 43 * @txurn: TX FIFO underrun 44 * @mib: MIB regs reaching its threshold 45 * @rxphyerr: RX with phy errors 46 * @rx_keycache_miss: RX with key cache misses 47 * @swba: Software Beacon Alert 48 * @bmiss: Beacon Miss 49 * @bnr: Beacon Not Ready 50 * @cst: Carrier Sense TImeout 51 * @gtt: Global TX Timeout 52 * @tim: RX beacon TIM occurrence 53 * @cabend: RX End of CAB traffic 54 * @dtimsync: DTIM sync lossage 55 * @dtim: RX Beacon with DTIM 56 */ 57 struct ath_interrupt_stats { 58 u32 total; 59 u32 rxok; 60 u32 rxlp; 61 u32 rxhp; 62 u32 rxeol; 63 u32 rxorn; 64 u32 txok; 65 u32 txeol; 66 u32 txurn; 67 u32 mib; 68 u32 rxphyerr; 69 u32 rx_keycache_miss; 70 u32 swba; 71 u32 bmiss; 72 u32 bnr; 73 u32 cst; 74 u32 gtt; 75 u32 tim; 76 u32 cabend; 77 u32 dtimsync; 78 u32 dtim; 79 }; 80 81 struct ath_rc_stats { 82 u32 success; 83 u32 retries; 84 u32 xretries; 85 u8 per; 86 }; 87 88 /** 89 * struct ath_tx_stats - Statistics about TX 90 * @queued: Total MPDUs (non-aggr) queued 91 * @completed: Total MPDUs (non-aggr) completed 92 * @a_aggr: Total no. of aggregates queued 93 * @a_queued: Total AMPDUs queued 94 * @a_completed: Total AMPDUs completed 95 * @a_retries: No. of AMPDUs retried (SW) 96 * @a_xretries: No. of AMPDUs dropped due to xretries 97 * @fifo_underrun: FIFO underrun occurrences 98 Valid only for: 99 - non-aggregate condition. 100 - first packet of aggregate. 101 * @xtxop: No. of frames filtered because of TXOP limit 102 * @timer_exp: Transmit timer expiry 103 * @desc_cfg_err: Descriptor configuration errors 104 * @data_urn: TX data underrun errors 105 * @delim_urn: TX delimiter underrun errors 106 */ 107 struct ath_tx_stats { 108 u32 queued; 109 u32 completed; 110 u32 a_aggr; 111 u32 a_queued; 112 u32 a_completed; 113 u32 a_retries; 114 u32 a_xretries; 115 u32 fifo_underrun; 116 u32 xtxop; 117 u32 timer_exp; 118 u32 desc_cfg_err; 119 u32 data_underrun; 120 u32 delim_underrun; 121 }; 122 123 /** 124 * struct ath_rx_stats - RX Statistics 125 * @crc_err: No. of frames with incorrect CRC value 126 * @decrypt_crc_err: No. of frames whose CRC check failed after 127 decryption process completed 128 * @phy_err: No. of frames whose reception failed because the PHY 129 encountered an error 130 * @mic_err: No. of frames with incorrect TKIP MIC verification failure 131 * @pre_delim_crc_err: Pre-Frame delimiter CRC error detections 132 * @post_delim_crc_err: Post-Frame delimiter CRC error detections 133 * @decrypt_busy_err: Decryption interruptions counter 134 * @phy_err_stats: Individual PHY error statistics 135 */ 136 struct ath_rx_stats { 137 u32 crc_err; 138 u32 decrypt_crc_err; 139 u32 phy_err; 140 u32 mic_err; 141 u32 pre_delim_crc_err; 142 u32 post_delim_crc_err; 143 u32 decrypt_busy_err; 144 u32 phy_err_stats[ATH9K_PHYERR_MAX]; 145 }; 146 147 struct ath_stats { 148 struct ath_interrupt_stats istats; 149 struct ath_rc_stats rcstats[RATE_TABLE_SIZE]; 150 struct ath_tx_stats txstats[ATH9K_NUM_TX_QUEUES]; 151 struct ath_rx_stats rxstats; 152 }; 153 154 struct ath9k_debug { 155 struct dentry *debugfs_phy; 156 u32 regidx; 157 struct ath_stats stats; 158 }; 159 160 int ath9k_init_debug(struct ath_hw *ah); 161 void ath9k_exit_debug(struct ath_hw *ah); 162 163 int ath9k_debug_create_root(void); 164 void ath9k_debug_remove_root(void); 165 void ath_debug_stat_interrupt(struct ath_softc *sc, enum ath9k_int status); 166 void ath_debug_stat_rc(struct ath_softc *sc, int final_rate); 167 void ath_debug_stat_tx(struct ath_softc *sc, struct ath_txq *txq, 168 struct ath_buf *bf, struct ath_tx_status *ts); 169 void ath_debug_stat_rx(struct ath_softc *sc, struct ath_rx_status *rs); 170 void ath_debug_stat_retries(struct ath_softc *sc, int rix, 171 int xretries, int retries, u8 per); 172 173 #else 174 175 static inline int ath9k_init_debug(struct ath_hw *ah) 176 { 177 return 0; 178 } 179 180 static inline void ath9k_exit_debug(struct ath_hw *ah) 181 { 182 } 183 184 static inline int ath9k_debug_create_root(void) 185 { 186 return 0; 187 } 188 189 static inline void ath9k_debug_remove_root(void) 190 { 191 } 192 193 static inline void ath_debug_stat_interrupt(struct ath_softc *sc, 194 enum ath9k_int status) 195 { 196 } 197 198 static inline void ath_debug_stat_rc(struct ath_softc *sc, 199 int final_rate) 200 { 201 } 202 203 static inline void ath_debug_stat_tx(struct ath_softc *sc, 204 struct ath_txq *txq, 205 struct ath_buf *bf, 206 struct ath_tx_status *ts) 207 { 208 } 209 210 static inline void ath_debug_stat_rx(struct ath_softc *sc, 211 struct ath_rx_status *rs) 212 { 213 } 214 215 static inline void ath_debug_stat_retries(struct ath_softc *sc, int rix, 216 int xretries, int retries, u8 per) 217 { 218 } 219 220 #endif /* CONFIG_ATH9K_DEBUGFS */ 221 222 #endif /* DEBUG_H */ 223