1*17d50d1dSVasanthakumar Thiagarajan /* 2*17d50d1dSVasanthakumar Thiagarajan * Copyright (c) 2009 Atheros Communications Inc. 3*17d50d1dSVasanthakumar Thiagarajan * 4*17d50d1dSVasanthakumar Thiagarajan * Permission to use, copy, modify, and/or distribute this software for any 5*17d50d1dSVasanthakumar Thiagarajan * purpose with or without fee is hereby granted, provided that the above 6*17d50d1dSVasanthakumar Thiagarajan * copyright notice and this permission notice appear in all copies. 7*17d50d1dSVasanthakumar Thiagarajan * 8*17d50d1dSVasanthakumar Thiagarajan * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9*17d50d1dSVasanthakumar Thiagarajan * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10*17d50d1dSVasanthakumar Thiagarajan * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11*17d50d1dSVasanthakumar Thiagarajan * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12*17d50d1dSVasanthakumar Thiagarajan * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13*17d50d1dSVasanthakumar Thiagarajan * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14*17d50d1dSVasanthakumar Thiagarajan * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15*17d50d1dSVasanthakumar Thiagarajan */ 16*17d50d1dSVasanthakumar Thiagarajan 17*17d50d1dSVasanthakumar Thiagarajan #include "ath9k.h" 18*17d50d1dSVasanthakumar Thiagarajan 19*17d50d1dSVasanthakumar Thiagarajan void ath9k_hw_btcoex_init(struct ath_hw *ah) 20*17d50d1dSVasanthakumar Thiagarajan { 21*17d50d1dSVasanthakumar Thiagarajan /* connect bt_active to baseband */ 22*17d50d1dSVasanthakumar Thiagarajan REG_CLR_BIT(ah, AR_GPIO_INPUT_EN_VAL, 23*17d50d1dSVasanthakumar Thiagarajan (AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_DEF | 24*17d50d1dSVasanthakumar Thiagarajan AR_GPIO_INPUT_EN_VAL_BT_FREQUENCY_DEF)); 25*17d50d1dSVasanthakumar Thiagarajan 26*17d50d1dSVasanthakumar Thiagarajan REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL, 27*17d50d1dSVasanthakumar Thiagarajan AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB); 28*17d50d1dSVasanthakumar Thiagarajan 29*17d50d1dSVasanthakumar Thiagarajan /* Set input mux for bt_active to gpio pin */ 30*17d50d1dSVasanthakumar Thiagarajan REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1, 31*17d50d1dSVasanthakumar Thiagarajan AR_GPIO_INPUT_MUX1_BT_ACTIVE, 32*17d50d1dSVasanthakumar Thiagarajan ah->btactive_gpio); 33*17d50d1dSVasanthakumar Thiagarajan 34*17d50d1dSVasanthakumar Thiagarajan /* Configure the desired gpio port for input */ 35*17d50d1dSVasanthakumar Thiagarajan ath9k_hw_cfg_gpio_input(ah, ah->btactive_gpio); 36*17d50d1dSVasanthakumar Thiagarajan } 37*17d50d1dSVasanthakumar Thiagarajan 38*17d50d1dSVasanthakumar Thiagarajan void ath9k_hw_btcoex_enable(struct ath_hw *ah) 39*17d50d1dSVasanthakumar Thiagarajan { 40*17d50d1dSVasanthakumar Thiagarajan /* Configure the desired GPIO port for TX_FRAME output */ 41*17d50d1dSVasanthakumar Thiagarajan ath9k_hw_cfg_output(ah, ah->wlanactive_gpio, 42*17d50d1dSVasanthakumar Thiagarajan AR_GPIO_OUTPUT_MUX_AS_TX_FRAME); 43*17d50d1dSVasanthakumar Thiagarajan 44*17d50d1dSVasanthakumar Thiagarajan ah->ah_sc->sc_flags |= SC_OP_BTCOEX_ENABLED; 45*17d50d1dSVasanthakumar Thiagarajan } 46*17d50d1dSVasanthakumar Thiagarajan 47*17d50d1dSVasanthakumar Thiagarajan void ath9k_hw_btcoex_disable(struct ath_hw *ah) 48*17d50d1dSVasanthakumar Thiagarajan { 49*17d50d1dSVasanthakumar Thiagarajan ath9k_hw_set_gpio(ah, ah->wlanactive_gpio, 0); 50*17d50d1dSVasanthakumar Thiagarajan 51*17d50d1dSVasanthakumar Thiagarajan ath9k_hw_cfg_output(ah, ah->wlanactive_gpio, 52*17d50d1dSVasanthakumar Thiagarajan AR_GPIO_OUTPUT_MUX_AS_OUTPUT); 53*17d50d1dSVasanthakumar Thiagarajan 54*17d50d1dSVasanthakumar Thiagarajan ah->ah_sc->sc_flags &= ~SC_OP_BTCOEX_ENABLED; 55*17d50d1dSVasanthakumar Thiagarajan } 56