1 /* 2 * Copyright (c) 2008-2011 Atheros Communications Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef ATH9K_H 18 #define ATH9K_H 19 20 #include <linux/etherdevice.h> 21 #include <linux/device.h> 22 #include <linux/interrupt.h> 23 #include <linux/leds.h> 24 #include <linux/completion.h> 25 #include <linux/time.h> 26 27 #include "common.h" 28 #include "debug.h" 29 #include "mci.h" 30 #include "dfs.h" 31 #include "spectral.h" 32 33 struct ath_node; 34 35 extern struct ieee80211_ops ath9k_ops; 36 extern int ath9k_modparam_nohwcrypt; 37 extern int led_blink; 38 extern bool is_ath9k_unloaded; 39 extern int ath9k_use_chanctx; 40 41 /*************************/ 42 /* Descriptor Management */ 43 /*************************/ 44 45 #define ATH_TXSTATUS_RING_SIZE 512 46 47 /* Macro to expand scalars to 64-bit objects */ 48 #define ito64(x) (sizeof(x) == 1) ? \ 49 (((unsigned long long int)(x)) & (0xff)) : \ 50 (sizeof(x) == 2) ? \ 51 (((unsigned long long int)(x)) & 0xffff) : \ 52 ((sizeof(x) == 4) ? \ 53 (((unsigned long long int)(x)) & 0xffffffff) : \ 54 (unsigned long long int)(x)) 55 56 #define ATH_TXBUF_RESET(_bf) do { \ 57 (_bf)->bf_lastbf = NULL; \ 58 (_bf)->bf_next = NULL; \ 59 memset(&((_bf)->bf_state), 0, \ 60 sizeof(struct ath_buf_state)); \ 61 } while (0) 62 63 #define DS2PHYS(_dd, _ds) \ 64 ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc)) 65 #define ATH_DESC_4KB_BOUND_CHECK(_daddr) ((((_daddr) & 0xFFF) > 0xF7F) ? 1 : 0) 66 #define ATH_DESC_4KB_BOUND_NUM_SKIPPED(_len) ((_len) / 4096) 67 68 struct ath_descdma { 69 void *dd_desc; 70 dma_addr_t dd_desc_paddr; 71 u32 dd_desc_len; 72 }; 73 74 int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd, 75 struct list_head *head, const char *name, 76 int nbuf, int ndesc, bool is_tx); 77 78 /***********/ 79 /* RX / TX */ 80 /***********/ 81 82 #define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i)) 83 84 /* increment with wrap-around */ 85 #define INCR(_l, _sz) do { \ 86 (_l)++; \ 87 (_l) &= ((_sz) - 1); \ 88 } while (0) 89 90 #define ATH_RXBUF 512 91 #define ATH_TXBUF 512 92 #define ATH_TXBUF_RESERVE 5 93 #define ATH_MAX_QDEPTH (ATH_TXBUF / 4 - ATH_TXBUF_RESERVE) 94 #define ATH_TXMAXTRY 13 95 #define ATH_MAX_SW_RETRIES 30 96 97 #define TID_TO_WME_AC(_tid) \ 98 ((((_tid) == 0) || ((_tid) == 3)) ? IEEE80211_AC_BE : \ 99 (((_tid) == 1) || ((_tid) == 2)) ? IEEE80211_AC_BK : \ 100 (((_tid) == 4) || ((_tid) == 5)) ? IEEE80211_AC_VI : \ 101 IEEE80211_AC_VO) 102 103 #define ATH_AGGR_DELIM_SZ 4 104 #define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */ 105 /* number of delimiters for encryption padding */ 106 #define ATH_AGGR_ENCRYPTDELIM 10 107 /* minimum h/w qdepth to be sustained to maximize aggregation */ 108 #define ATH_AGGR_MIN_QDEPTH 2 109 /* minimum h/w qdepth for non-aggregated traffic */ 110 #define ATH_NON_AGGR_MIN_QDEPTH 8 111 #define ATH_TX_COMPLETE_POLL_INT 1000 112 #define ATH_TXFIFO_DEPTH 8 113 #define ATH_TX_ERROR 0x01 114 115 /* Stop tx traffic 1ms before the GO goes away */ 116 #define ATH_P2P_PS_STOP_TIME 1000 117 118 #define IEEE80211_SEQ_SEQ_SHIFT 4 119 #define IEEE80211_SEQ_MAX 4096 120 #define IEEE80211_WEP_IVLEN 3 121 #define IEEE80211_WEP_KIDLEN 1 122 #define IEEE80211_WEP_CRCLEN 4 123 #define IEEE80211_MAX_MPDU_LEN (3840 + FCS_LEN + \ 124 (IEEE80211_WEP_IVLEN + \ 125 IEEE80211_WEP_KIDLEN + \ 126 IEEE80211_WEP_CRCLEN)) 127 128 /* return whether a bit at index _n in bitmap _bm is set 129 * _sz is the size of the bitmap */ 130 #define ATH_BA_ISSET(_bm, _n) (((_n) < (WME_BA_BMP_SIZE)) && \ 131 ((_bm)[(_n) >> 5] & (1 << ((_n) & 31)))) 132 133 /* return block-ack bitmap index given sequence and starting sequence */ 134 #define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1)) 135 136 /* return the seqno for _start + _offset */ 137 #define ATH_BA_INDEX2SEQ(_seq, _offset) (((_seq) + (_offset)) & (IEEE80211_SEQ_MAX - 1)) 138 139 /* returns delimiter padding required given the packet length */ 140 #define ATH_AGGR_GET_NDELIM(_len) \ 141 (((_len) >= ATH_AGGR_MINPLEN) ? 0 : \ 142 DIV_ROUND_UP(ATH_AGGR_MINPLEN - (_len), ATH_AGGR_DELIM_SZ)) 143 144 #define BAW_WITHIN(_start, _bawsz, _seqno) \ 145 ((((_seqno) - (_start)) & 4095) < (_bawsz)) 146 147 #define ATH_AN_2_TID(_an, _tidno) (&(_an)->tid[(_tidno)]) 148 149 #define IS_HT_RATE(rate) (rate & 0x80) 150 #define IS_CCK_RATE(rate) ((rate >= 0x18) && (rate <= 0x1e)) 151 #define IS_OFDM_RATE(rate) ((rate >= 0x8) && (rate <= 0xf)) 152 153 enum { 154 WLAN_RC_PHY_OFDM, 155 WLAN_RC_PHY_CCK, 156 }; 157 158 struct ath_txq { 159 int mac80211_qnum; /* mac80211 queue number, -1 means not mac80211 Q */ 160 u32 axq_qnum; /* ath9k hardware queue number */ 161 void *axq_link; 162 struct list_head axq_q; 163 spinlock_t axq_lock; 164 u32 axq_depth; 165 u32 axq_ampdu_depth; 166 bool stopped; 167 bool axq_tx_inprogress; 168 struct list_head txq_fifo[ATH_TXFIFO_DEPTH]; 169 u8 txq_headidx; 170 u8 txq_tailidx; 171 int pending_frames; 172 struct sk_buff_head complete_q; 173 }; 174 175 struct ath_atx_ac { 176 struct ath_txq *txq; 177 struct list_head list; 178 struct list_head tid_q; 179 bool clear_ps_filter; 180 bool sched; 181 }; 182 183 struct ath_frame_info { 184 struct ath_buf *bf; 185 u16 framelen; 186 s8 txq; 187 enum ath9k_key_type keytype; 188 u8 keyix; 189 u8 rtscts_rate; 190 u8 retries : 7; 191 u8 baw_tracked : 1; 192 }; 193 194 struct ath_rxbuf { 195 struct list_head list; 196 struct sk_buff *bf_mpdu; 197 void *bf_desc; 198 dma_addr_t bf_daddr; 199 dma_addr_t bf_buf_addr; 200 }; 201 202 /** 203 * enum buffer_type - Buffer type flags 204 * 205 * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX) 206 * @BUF_AGGR: Indicates whether the buffer can be aggregated 207 * (used in aggregation scheduling) 208 */ 209 enum buffer_type { 210 BUF_AMPDU = BIT(0), 211 BUF_AGGR = BIT(1), 212 }; 213 214 #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU) 215 #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR) 216 217 struct ath_buf_state { 218 u8 bf_type; 219 u8 bfs_paprd; 220 u8 ndelim; 221 bool stale; 222 u16 seqno; 223 unsigned long bfs_paprd_timestamp; 224 }; 225 226 struct ath_buf { 227 struct list_head list; 228 struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or 229 an aggregate) */ 230 struct ath_buf *bf_next; /* next subframe in the aggregate */ 231 struct sk_buff *bf_mpdu; /* enclosing frame structure */ 232 void *bf_desc; /* virtual addr of desc */ 233 dma_addr_t bf_daddr; /* physical addr of desc */ 234 dma_addr_t bf_buf_addr; /* physical addr of data buffer, for DMA */ 235 struct ieee80211_tx_rate rates[4]; 236 struct ath_buf_state bf_state; 237 }; 238 239 struct ath_atx_tid { 240 struct list_head list; 241 struct sk_buff_head buf_q; 242 struct sk_buff_head retry_q; 243 struct ath_node *an; 244 struct ath_atx_ac *ac; 245 unsigned long tx_buf[BITS_TO_LONGS(ATH_TID_MAX_BUFS)]; 246 u16 seq_start; 247 u16 seq_next; 248 u16 baw_size; 249 u8 tidno; 250 int baw_head; /* first un-acked tx buffer */ 251 int baw_tail; /* next unused tx buffer slot */ 252 253 s8 bar_index; 254 bool sched; 255 bool active; 256 }; 257 258 struct ath_node { 259 struct ath_softc *sc; 260 struct ieee80211_sta *sta; /* station struct we're part of */ 261 struct ieee80211_vif *vif; /* interface with which we're associated */ 262 struct ath_atx_tid tid[IEEE80211_NUM_TIDS]; 263 struct ath_atx_ac ac[IEEE80211_NUM_ACS]; 264 265 u16 maxampdu; 266 u8 mpdudensity; 267 s8 ps_key; 268 269 bool sleeping; 270 bool no_ps_filter; 271 272 #ifdef CONFIG_ATH9K_STATION_STATISTICS 273 struct ath_rx_rate_stats rx_rate_stats; 274 #endif 275 u8 key_idx[4]; 276 }; 277 278 struct ath_tx_control { 279 struct ath_txq *txq; 280 struct ath_node *an; 281 struct ieee80211_sta *sta; 282 u8 paprd; 283 bool force_channel; 284 }; 285 286 287 /** 288 * @txq_map: Index is mac80211 queue number. This is 289 * not necessarily the same as the hardware queue number 290 * (axq_qnum). 291 */ 292 struct ath_tx { 293 u16 seq_no; 294 u32 txqsetup; 295 spinlock_t txbuflock; 296 struct list_head txbuf; 297 struct ath_txq txq[ATH9K_NUM_TX_QUEUES]; 298 struct ath_descdma txdma; 299 struct ath_txq *txq_map[IEEE80211_NUM_ACS]; 300 struct ath_txq *uapsdq; 301 u32 txq_max_pending[IEEE80211_NUM_ACS]; 302 u16 max_aggr_framelen[IEEE80211_NUM_ACS][4][32]; 303 }; 304 305 struct ath_rx_edma { 306 struct sk_buff_head rx_fifo; 307 u32 rx_fifo_hwsize; 308 }; 309 310 struct ath_rx { 311 u8 defant; 312 u8 rxotherant; 313 bool discard_next; 314 u32 *rxlink; 315 u32 num_pkts; 316 unsigned int rxfilter; 317 struct list_head rxbuf; 318 struct ath_descdma rxdma; 319 struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX]; 320 321 struct ath_rxbuf *buf_hold; 322 struct sk_buff *frag; 323 324 u32 ampdu_ref; 325 }; 326 327 struct ath_chanctx { 328 struct cfg80211_chan_def chandef; 329 struct list_head vifs; 330 struct list_head acq[IEEE80211_NUM_ACS]; 331 int hw_queue_base; 332 333 /* do not dereference, use for comparison only */ 334 struct ieee80211_vif *primary_sta; 335 336 struct ath_beacon_config beacon; 337 struct ath9k_hw_cal_data caldata; 338 struct timespec tsf_ts; 339 u64 tsf_val; 340 u32 last_beacon; 341 342 u16 txpower; 343 bool offchannel; 344 bool stopped; 345 bool active; 346 bool assigned; 347 bool switch_after_beacon; 348 }; 349 350 enum ath_chanctx_event { 351 ATH_CHANCTX_EVENT_BEACON_PREPARE, 352 ATH_CHANCTX_EVENT_BEACON_SENT, 353 ATH_CHANCTX_EVENT_TSF_TIMER, 354 ATH_CHANCTX_EVENT_BEACON_RECEIVED, 355 ATH_CHANCTX_EVENT_ASSOC, 356 ATH_CHANCTX_EVENT_SWITCH, 357 ATH_CHANCTX_EVENT_UNASSIGN, 358 ATH_CHANCTX_EVENT_ENABLE_MULTICHANNEL, 359 }; 360 361 enum ath_chanctx_state { 362 ATH_CHANCTX_STATE_IDLE, 363 ATH_CHANCTX_STATE_WAIT_FOR_BEACON, 364 ATH_CHANCTX_STATE_WAIT_FOR_TIMER, 365 ATH_CHANCTX_STATE_SWITCH, 366 ATH_CHANCTX_STATE_FORCE_ACTIVE, 367 }; 368 369 struct ath_chanctx_sched { 370 bool beacon_pending; 371 bool offchannel_pending; 372 enum ath_chanctx_state state; 373 u8 beacon_miss; 374 375 u32 next_tbtt; 376 u32 switch_start_time; 377 unsigned int offchannel_duration; 378 unsigned int channel_switch_time; 379 380 /* backup, in case the hardware timer fails */ 381 struct timer_list timer; 382 }; 383 384 enum ath_offchannel_state { 385 ATH_OFFCHANNEL_IDLE, 386 ATH_OFFCHANNEL_PROBE_SEND, 387 ATH_OFFCHANNEL_PROBE_WAIT, 388 ATH_OFFCHANNEL_SUSPEND, 389 ATH_OFFCHANNEL_ROC_START, 390 ATH_OFFCHANNEL_ROC_WAIT, 391 ATH_OFFCHANNEL_ROC_DONE, 392 }; 393 394 struct ath_offchannel { 395 struct ath_chanctx chan; 396 struct timer_list timer; 397 struct cfg80211_scan_request *scan_req; 398 struct ieee80211_vif *scan_vif; 399 int scan_idx; 400 enum ath_offchannel_state state; 401 struct ieee80211_channel *roc_chan; 402 struct ieee80211_vif *roc_vif; 403 int roc_duration; 404 int duration; 405 }; 406 #define ath_for_each_chanctx(_sc, _ctx) \ 407 for (ctx = &sc->chanctx[0]; \ 408 ctx <= &sc->chanctx[ARRAY_SIZE(sc->chanctx) - 1]; \ 409 ctx++) 410 411 void ath9k_chanctx_force_active(struct ieee80211_hw *hw, 412 struct ieee80211_vif *vif); 413 static inline struct ath_chanctx * 414 ath_chanctx_get(struct ieee80211_chanctx_conf *ctx) 415 { 416 struct ath_chanctx **ptr = (void *) ctx->drv_priv; 417 return *ptr; 418 } 419 void ath_chanctx_init(struct ath_softc *sc); 420 void ath_chanctx_set_channel(struct ath_softc *sc, struct ath_chanctx *ctx, 421 struct cfg80211_chan_def *chandef); 422 void ath_chanctx_switch(struct ath_softc *sc, struct ath_chanctx *ctx, 423 struct cfg80211_chan_def *chandef); 424 void ath_chanctx_check_active(struct ath_softc *sc, struct ath_chanctx *ctx); 425 void ath_offchannel_timer(unsigned long data); 426 void ath_offchannel_channel_change(struct ath_softc *sc); 427 void ath_chanctx_offchan_switch(struct ath_softc *sc, 428 struct ieee80211_channel *chan); 429 struct ath_chanctx *ath_chanctx_get_oper_chan(struct ath_softc *sc, 430 bool active); 431 void ath_chanctx_event(struct ath_softc *sc, struct ieee80211_vif *vif, 432 enum ath_chanctx_event ev); 433 void ath_chanctx_timer(unsigned long data); 434 void ath_offchannel_next(struct ath_softc *sc); 435 void ath_scan_complete(struct ath_softc *sc, bool abort); 436 void ath_roc_complete(struct ath_softc *sc, bool abort); 437 438 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT 439 bool ath9k_is_chanctx_enabled(void); 440 void ath9k_fill_chanctx_ops(void); 441 int ath9k_init_p2p(struct ath_softc *sc); 442 void ath9k_deinit_p2p(struct ath_softc *sc); 443 void ath9k_p2p_remove_vif(struct ath_softc *sc, 444 struct ieee80211_vif *vif); 445 void ath9k_p2p_beacon_sync(struct ath_softc *sc); 446 void ath9k_p2p_bss_info_changed(struct ath_softc *sc, 447 struct ieee80211_vif *vif); 448 void ath9k_p2p_ps_timer(void *priv); 449 #else 450 static inline bool ath9k_is_chanctx_enabled(void) 451 { 452 return false; 453 } 454 static inline void ath9k_fill_chanctx_ops(void) 455 { 456 } 457 static inline int ath9k_init_p2p(struct ath_softc *sc) 458 { 459 return 0; 460 } 461 static inline void ath9k_deinit_p2p(struct ath_softc *sc) 462 { 463 } 464 static inline void ath9k_p2p_remove_vif(struct ath_softc *sc, 465 struct ieee80211_vif *vif) 466 { 467 } 468 static inline void ath9k_p2p_beacon_sync(struct ath_softc *sc) 469 { 470 } 471 static inline void ath9k_p2p_bss_info_changed(struct ath_softc *sc, 472 struct ieee80211_vif *vif) 473 { 474 } 475 static inline void ath9k_p2p_ps_timer(struct ath_softc *sc) 476 { 477 } 478 #endif /* CONFIG_ATH9K_CHANNEL_CONTEXT */ 479 480 int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan); 481 int ath_startrecv(struct ath_softc *sc); 482 bool ath_stoprecv(struct ath_softc *sc); 483 u32 ath_calcrxfilter(struct ath_softc *sc); 484 int ath_rx_init(struct ath_softc *sc, int nbufs); 485 void ath_rx_cleanup(struct ath_softc *sc); 486 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp); 487 struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype); 488 void ath_txq_lock(struct ath_softc *sc, struct ath_txq *txq); 489 void ath_txq_unlock(struct ath_softc *sc, struct ath_txq *txq); 490 void ath_txq_unlock_complete(struct ath_softc *sc, struct ath_txq *txq); 491 void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq); 492 bool ath_drain_all_txq(struct ath_softc *sc); 493 void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq); 494 void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an); 495 void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an); 496 void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq); 497 void ath_txq_schedule_all(struct ath_softc *sc); 498 int ath_tx_init(struct ath_softc *sc, int nbufs); 499 int ath_txq_update(struct ath_softc *sc, int qnum, 500 struct ath9k_tx_queue_info *q); 501 void ath_update_max_aggr_framelen(struct ath_softc *sc, int queue, int txop); 502 int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb, 503 struct ath_tx_control *txctl); 504 void ath_tx_cabq(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 505 struct sk_buff *skb); 506 void ath_tx_tasklet(struct ath_softc *sc); 507 void ath_tx_edma_tasklet(struct ath_softc *sc); 508 int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta, 509 u16 tid, u16 *ssn); 510 void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid); 511 void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid); 512 513 void ath_tx_aggr_wakeup(struct ath_softc *sc, struct ath_node *an); 514 void ath_tx_aggr_sleep(struct ieee80211_sta *sta, struct ath_softc *sc, 515 struct ath_node *an); 516 void ath9k_release_buffered_frames(struct ieee80211_hw *hw, 517 struct ieee80211_sta *sta, 518 u16 tids, int nframes, 519 enum ieee80211_frame_release_type reason, 520 bool more_data); 521 522 /********/ 523 /* VIFs */ 524 /********/ 525 526 struct ath_vif { 527 struct list_head list; 528 529 struct ieee80211_vif *vif; 530 struct ath_node mcast_node; 531 int av_bslot; 532 __le64 tsf_adjust; /* TSF adjustment for staggered beacons */ 533 struct ath_buf *av_bcbuf; 534 struct ath_chanctx *chanctx; 535 536 /* P2P Client */ 537 struct ieee80211_noa_data noa; 538 539 /* P2P GO */ 540 u8 noa_index; 541 u32 offchannel_start; 542 u32 offchannel_duration; 543 544 u32 periodic_noa_start; 545 u32 periodic_noa_duration; 546 }; 547 548 struct ath9k_vif_iter_data { 549 u8 hw_macaddr[ETH_ALEN]; /* address of the first vif */ 550 u8 mask[ETH_ALEN]; /* bssid mask */ 551 bool has_hw_macaddr; 552 u8 slottime; 553 bool beacons; 554 555 int naps; /* number of AP vifs */ 556 int nmeshes; /* number of mesh vifs */ 557 int nstations; /* number of station vifs */ 558 int nwds; /* number of WDS vifs */ 559 int nadhocs; /* number of adhoc vifs */ 560 struct ieee80211_vif *primary_sta; 561 }; 562 563 void ath9k_calculate_iter_data(struct ath_softc *sc, 564 struct ath_chanctx *ctx, 565 struct ath9k_vif_iter_data *iter_data); 566 void ath9k_calculate_summary_state(struct ath_softc *sc, 567 struct ath_chanctx *ctx); 568 569 /*******************/ 570 /* Beacon Handling */ 571 /*******************/ 572 573 /* 574 * Regardless of the number of beacons we stagger, (i.e. regardless of the 575 * number of BSSIDs) if a given beacon does not go out even after waiting this 576 * number of beacon intervals, the game's up. 577 */ 578 #define BSTUCK_THRESH 9 579 #define ATH_BCBUF 8 580 #define ATH_DEFAULT_BINTVAL 100 /* TU */ 581 #define ATH_DEFAULT_BMISS_LIMIT 10 582 583 #define TSF_TO_TU(_h,_l) \ 584 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10)) 585 586 struct ath_beacon { 587 enum { 588 OK, /* no change needed */ 589 UPDATE, /* update pending */ 590 COMMIT /* beacon sent, commit change */ 591 } updateslot; /* slot time update fsm */ 592 593 u32 beaconq; 594 u32 bmisscnt; 595 struct ieee80211_vif *bslot[ATH_BCBUF]; 596 int slottime; 597 int slotupdate; 598 struct ath_descdma bdma; 599 struct ath_txq *cabq; 600 struct list_head bbuf; 601 602 bool tx_processed; 603 bool tx_last; 604 }; 605 606 void ath9k_beacon_tasklet(unsigned long data); 607 void ath9k_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif, 608 u32 changed); 609 void ath9k_beacon_assign_slot(struct ath_softc *sc, struct ieee80211_vif *vif); 610 void ath9k_beacon_remove_slot(struct ath_softc *sc, struct ieee80211_vif *vif); 611 void ath9k_set_beacon(struct ath_softc *sc); 612 bool ath9k_csa_is_finished(struct ath_softc *sc, struct ieee80211_vif *vif); 613 void ath9k_csa_update(struct ath_softc *sc); 614 615 /*******************/ 616 /* Link Monitoring */ 617 /*******************/ 618 619 #define ATH_STA_SHORT_CALINTERVAL 1000 /* 1 second */ 620 #define ATH_AP_SHORT_CALINTERVAL 100 /* 100 ms */ 621 #define ATH_ANI_POLLINTERVAL_OLD 100 /* 100 ms */ 622 #define ATH_ANI_POLLINTERVAL_NEW 1000 /* 1000 ms */ 623 #define ATH_LONG_CALINTERVAL_INT 1000 /* 1000 ms */ 624 #define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */ 625 #define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */ 626 #define ATH_ANI_MAX_SKIP_COUNT 10 627 #define ATH_PAPRD_TIMEOUT 100 /* msecs */ 628 #define ATH_PLL_WORK_INTERVAL 100 629 630 void ath_chanctx_work(struct work_struct *work); 631 void ath_tx_complete_poll_work(struct work_struct *work); 632 void ath_reset_work(struct work_struct *work); 633 bool ath_hw_check(struct ath_softc *sc); 634 void ath_hw_pll_work(struct work_struct *work); 635 void ath_paprd_calibrate(struct work_struct *work); 636 void ath_ani_calibrate(unsigned long data); 637 void ath_start_ani(struct ath_softc *sc); 638 void ath_stop_ani(struct ath_softc *sc); 639 void ath_check_ani(struct ath_softc *sc); 640 int ath_update_survey_stats(struct ath_softc *sc); 641 void ath_update_survey_nf(struct ath_softc *sc, int channel); 642 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type); 643 void ath_ps_full_sleep(unsigned long data); 644 void __ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop); 645 646 /**********/ 647 /* BTCOEX */ 648 /**********/ 649 650 #define ATH_DUMP_BTCOEX(_s, _val) \ 651 do { \ 652 len += scnprintf(buf + len, size - len, \ 653 "%20s : %10d\n", _s, (_val)); \ 654 } while (0) 655 656 enum bt_op_flags { 657 BT_OP_PRIORITY_DETECTED, 658 BT_OP_SCAN, 659 }; 660 661 struct ath_btcoex { 662 spinlock_t btcoex_lock; 663 struct timer_list period_timer; /* Timer for BT period */ 664 struct timer_list no_stomp_timer; 665 u32 bt_priority_cnt; 666 unsigned long bt_priority_time; 667 unsigned long op_flags; 668 int bt_stomp_type; /* Types of BT stomping */ 669 u32 btcoex_no_stomp; /* in msec */ 670 u32 btcoex_period; /* in msec */ 671 u32 btscan_no_stomp; /* in msec */ 672 u32 duty_cycle; 673 u32 bt_wait_time; 674 int rssi_count; 675 struct ath_mci_profile mci; 676 u8 stomp_audio; 677 }; 678 679 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT 680 int ath9k_init_btcoex(struct ath_softc *sc); 681 void ath9k_deinit_btcoex(struct ath_softc *sc); 682 void ath9k_start_btcoex(struct ath_softc *sc); 683 void ath9k_stop_btcoex(struct ath_softc *sc); 684 void ath9k_btcoex_timer_resume(struct ath_softc *sc); 685 void ath9k_btcoex_timer_pause(struct ath_softc *sc); 686 void ath9k_btcoex_handle_interrupt(struct ath_softc *sc, u32 status); 687 u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc, u32 max_4ms_framelen); 688 void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc); 689 int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size); 690 #else 691 static inline int ath9k_init_btcoex(struct ath_softc *sc) 692 { 693 return 0; 694 } 695 static inline void ath9k_deinit_btcoex(struct ath_softc *sc) 696 { 697 } 698 static inline void ath9k_start_btcoex(struct ath_softc *sc) 699 { 700 } 701 static inline void ath9k_stop_btcoex(struct ath_softc *sc) 702 { 703 } 704 static inline void ath9k_btcoex_handle_interrupt(struct ath_softc *sc, 705 u32 status) 706 { 707 } 708 static inline u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc, 709 u32 max_4ms_framelen) 710 { 711 return 0; 712 } 713 static inline void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc) 714 { 715 } 716 static inline int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size) 717 { 718 return 0; 719 } 720 #endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */ 721 722 /********************/ 723 /* LED Control */ 724 /********************/ 725 726 #define ATH_LED_PIN_DEF 1 727 #define ATH_LED_PIN_9287 8 728 #define ATH_LED_PIN_9300 10 729 #define ATH_LED_PIN_9485 6 730 #define ATH_LED_PIN_9462 4 731 732 #ifdef CONFIG_MAC80211_LEDS 733 void ath_init_leds(struct ath_softc *sc); 734 void ath_deinit_leds(struct ath_softc *sc); 735 void ath_fill_led_pin(struct ath_softc *sc); 736 #else 737 static inline void ath_init_leds(struct ath_softc *sc) 738 { 739 } 740 741 static inline void ath_deinit_leds(struct ath_softc *sc) 742 { 743 } 744 static inline void ath_fill_led_pin(struct ath_softc *sc) 745 { 746 } 747 #endif 748 749 /************************/ 750 /* Wake on Wireless LAN */ 751 /************************/ 752 753 struct ath9k_wow_pattern { 754 u8 pattern_bytes[MAX_PATTERN_SIZE]; 755 u8 mask_bytes[MAX_PATTERN_SIZE]; 756 u32 pattern_len; 757 }; 758 759 #ifdef CONFIG_ATH9K_WOW 760 void ath9k_init_wow(struct ieee80211_hw *hw); 761 int ath9k_suspend(struct ieee80211_hw *hw, 762 struct cfg80211_wowlan *wowlan); 763 int ath9k_resume(struct ieee80211_hw *hw); 764 void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled); 765 #else 766 static inline void ath9k_init_wow(struct ieee80211_hw *hw) 767 { 768 } 769 static inline int ath9k_suspend(struct ieee80211_hw *hw, 770 struct cfg80211_wowlan *wowlan) 771 { 772 return 0; 773 } 774 static inline int ath9k_resume(struct ieee80211_hw *hw) 775 { 776 return 0; 777 } 778 static inline void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled) 779 { 780 } 781 #endif /* CONFIG_ATH9K_WOW */ 782 783 /*******************************/ 784 /* Antenna diversity/combining */ 785 /*******************************/ 786 787 #define ATH_ANT_RX_CURRENT_SHIFT 4 788 #define ATH_ANT_RX_MAIN_SHIFT 2 789 #define ATH_ANT_RX_MASK 0x3 790 791 #define ATH_ANT_DIV_COMB_SHORT_SCAN_INTR 50 792 #define ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT 0x100 793 #define ATH_ANT_DIV_COMB_MAX_PKTCOUNT 0x200 794 #define ATH_ANT_DIV_COMB_INIT_COUNT 95 795 #define ATH_ANT_DIV_COMB_MAX_COUNT 100 796 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO 30 797 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2 20 798 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO_LOW_RSSI 50 799 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2_LOW_RSSI 50 800 801 #define ATH_ANT_DIV_COMB_LNA1_DELTA_HI -4 802 #define ATH_ANT_DIV_COMB_LNA1_DELTA_MID -2 803 #define ATH_ANT_DIV_COMB_LNA1_DELTA_LOW 2 804 805 struct ath_ant_comb { 806 u16 count; 807 u16 total_pkt_count; 808 bool scan; 809 bool scan_not_start; 810 int main_total_rssi; 811 int alt_total_rssi; 812 int alt_recv_cnt; 813 int main_recv_cnt; 814 int rssi_lna1; 815 int rssi_lna2; 816 int rssi_add; 817 int rssi_sub; 818 int rssi_first; 819 int rssi_second; 820 int rssi_third; 821 int ant_ratio; 822 int ant_ratio2; 823 bool alt_good; 824 int quick_scan_cnt; 825 enum ath9k_ant_div_comb_lna_conf main_conf; 826 enum ath9k_ant_div_comb_lna_conf first_quick_scan_conf; 827 enum ath9k_ant_div_comb_lna_conf second_quick_scan_conf; 828 bool first_ratio; 829 bool second_ratio; 830 unsigned long scan_start_time; 831 832 /* 833 * Card-specific config values. 834 */ 835 int low_rssi_thresh; 836 int fast_div_bias; 837 }; 838 839 void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs); 840 841 /********************/ 842 /* Main driver core */ 843 /********************/ 844 845 #define ATH9K_PCI_CUS198 0x0001 846 #define ATH9K_PCI_CUS230 0x0002 847 #define ATH9K_PCI_CUS217 0x0004 848 #define ATH9K_PCI_CUS252 0x0008 849 #define ATH9K_PCI_WOW 0x0010 850 #define ATH9K_PCI_BT_ANT_DIV 0x0020 851 #define ATH9K_PCI_D3_L1_WAR 0x0040 852 #define ATH9K_PCI_AR9565_1ANT 0x0080 853 #define ATH9K_PCI_AR9565_2ANT 0x0100 854 #define ATH9K_PCI_NO_PLL_PWRSAVE 0x0200 855 #define ATH9K_PCI_KILLER 0x0400 856 857 /* 858 * Default cache line size, in bytes. 859 * Used when PCI device not fully initialized by bootrom/BIOS 860 */ 861 #define DEFAULT_CACHELINE 32 862 #define ATH_CABQ_READY_TIME 80 /* % of beacon interval */ 863 #define ATH_TXPOWER_MAX 100 /* .5 dBm units */ 864 #define MAX_GTT_CNT 5 865 866 /* Powersave flags */ 867 #define PS_WAIT_FOR_BEACON BIT(0) 868 #define PS_WAIT_FOR_CAB BIT(1) 869 #define PS_WAIT_FOR_PSPOLL_DATA BIT(2) 870 #define PS_WAIT_FOR_TX_ACK BIT(3) 871 #define PS_BEACON_SYNC BIT(4) 872 #define PS_WAIT_FOR_ANI BIT(5) 873 874 #define ATH9K_NUM_CHANCTX 2 /* supports 2 operating channels */ 875 876 struct ath_softc { 877 struct ieee80211_hw *hw; 878 struct device *dev; 879 880 struct survey_info *cur_survey; 881 struct survey_info survey[ATH9K_NUM_CHANNELS]; 882 883 struct tasklet_struct intr_tq; 884 struct tasklet_struct bcon_tasklet; 885 struct ath_hw *sc_ah; 886 void __iomem *mem; 887 int irq; 888 spinlock_t sc_serial_rw; 889 spinlock_t sc_pm_lock; 890 spinlock_t sc_pcu_lock; 891 struct mutex mutex; 892 struct work_struct paprd_work; 893 struct work_struct hw_reset_work; 894 struct work_struct chanctx_work; 895 struct completion paprd_complete; 896 wait_queue_head_t tx_wait; 897 898 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT 899 struct ath_gen_timer *p2p_ps_timer; 900 struct ath_vif *p2p_ps_vif; 901 #endif 902 903 unsigned long driver_data; 904 905 u8 gtt_cnt; 906 u32 intrstatus; 907 u16 ps_flags; /* PS_* */ 908 u16 curtxpow; 909 bool ps_enabled; 910 bool ps_idle; 911 short nbcnvifs; 912 short nvifs; 913 unsigned long ps_usecount; 914 915 struct ath_rx rx; 916 struct ath_tx tx; 917 struct ath_beacon beacon; 918 919 struct cfg80211_chan_def cur_chandef; 920 struct ath_chanctx chanctx[ATH9K_NUM_CHANCTX]; 921 struct ath_chanctx *cur_chan; 922 struct ath_chanctx *next_chan; 923 spinlock_t chan_lock; 924 struct ath_offchannel offchannel; 925 struct ath_chanctx_sched sched; 926 927 #ifdef CONFIG_MAC80211_LEDS 928 bool led_registered; 929 char led_name[32]; 930 struct led_classdev led_cdev; 931 #endif 932 933 #ifdef CONFIG_ATH9K_DEBUGFS 934 struct ath9k_debug debug; 935 #endif 936 struct delayed_work tx_complete_work; 937 struct delayed_work hw_pll_work; 938 struct timer_list sleep_timer; 939 940 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT 941 struct ath_btcoex btcoex; 942 struct ath_mci_coex mci_coex; 943 struct work_struct mci_work; 944 #endif 945 946 struct ath_descdma txsdma; 947 948 struct ath_ant_comb ant_comb; 949 u8 ant_tx, ant_rx; 950 struct dfs_pattern_detector *dfs_detector; 951 u64 dfs_prev_pulse_ts; 952 u32 wow_enabled; 953 /* relay(fs) channel for spectral scan */ 954 struct rchan *rfs_chan_spec_scan; 955 enum spectral_mode spectral_mode; 956 struct ath_spec_scan spec_config; 957 958 struct ieee80211_vif *tx99_vif; 959 struct sk_buff *tx99_skb; 960 bool tx99_state; 961 s16 tx99_power; 962 963 #ifdef CONFIG_ATH9K_WOW 964 atomic_t wow_got_bmiss_intr; 965 atomic_t wow_sleep_proc_intr; /* in the middle of WoW sleep ? */ 966 u32 wow_intr_before_sleep; 967 #endif 968 }; 969 970 /********/ 971 /* TX99 */ 972 /********/ 973 974 #ifdef CONFIG_ATH9K_TX99 975 void ath9k_tx99_init_debug(struct ath_softc *sc); 976 int ath9k_tx99_send(struct ath_softc *sc, struct sk_buff *skb, 977 struct ath_tx_control *txctl); 978 #else 979 static inline void ath9k_tx99_init_debug(struct ath_softc *sc) 980 { 981 } 982 static inline int ath9k_tx99_send(struct ath_softc *sc, 983 struct sk_buff *skb, 984 struct ath_tx_control *txctl) 985 { 986 return 0; 987 } 988 #endif /* CONFIG_ATH9K_TX99 */ 989 990 static inline void ath_read_cachesize(struct ath_common *common, int *csz) 991 { 992 common->bus_ops->read_cachesize(common, csz); 993 } 994 995 void ath9k_tasklet(unsigned long data); 996 int ath_cabq_update(struct ath_softc *); 997 u8 ath9k_parse_mpdudensity(u8 mpdudensity); 998 irqreturn_t ath_isr(int irq, void *dev); 999 int ath_reset(struct ath_softc *sc); 1000 void ath_cancel_work(struct ath_softc *sc); 1001 void ath_restart_work(struct ath_softc *sc); 1002 int ath9k_init_device(u16 devid, struct ath_softc *sc, 1003 const struct ath_bus_ops *bus_ops); 1004 void ath9k_deinit_device(struct ath_softc *sc); 1005 void ath9k_reload_chainmask_settings(struct ath_softc *sc); 1006 u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate); 1007 void ath_start_rfkill_poll(struct ath_softc *sc); 1008 void ath9k_rfkill_poll_state(struct ieee80211_hw *hw); 1009 void ath9k_ps_wakeup(struct ath_softc *sc); 1010 void ath9k_ps_restore(struct ath_softc *sc); 1011 1012 #ifdef CONFIG_ATH9K_PCI 1013 int ath_pci_init(void); 1014 void ath_pci_exit(void); 1015 #else 1016 static inline int ath_pci_init(void) { return 0; }; 1017 static inline void ath_pci_exit(void) {}; 1018 #endif 1019 1020 #ifdef CONFIG_ATH9K_AHB 1021 int ath_ahb_init(void); 1022 void ath_ahb_exit(void); 1023 #else 1024 static inline int ath_ahb_init(void) { return 0; }; 1025 static inline void ath_ahb_exit(void) {}; 1026 #endif 1027 1028 #endif /* ATH9K_H */ 1029