1bdcd8170SKalle Valo /* 2bdcd8170SKalle Valo * Copyright (c) 2004-2011 Atheros Communications Inc. 31b2df407SVasanthakumar Thiagarajan * Copyright (c) 2011-2012 Qualcomm Atheros, Inc. 4bdcd8170SKalle Valo * 5bdcd8170SKalle Valo * Permission to use, copy, modify, and/or distribute this software for any 6bdcd8170SKalle Valo * purpose with or without fee is hereby granted, provided that the above 7bdcd8170SKalle Valo * copyright notice and this permission notice appear in all copies. 8bdcd8170SKalle Valo * 9bdcd8170SKalle Valo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10bdcd8170SKalle Valo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11bdcd8170SKalle Valo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12bdcd8170SKalle Valo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13bdcd8170SKalle Valo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14bdcd8170SKalle Valo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15bdcd8170SKalle Valo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16bdcd8170SKalle Valo */ 17bdcd8170SKalle Valo 18bdcd8170SKalle Valo #include "core.h" 19bdcd8170SKalle Valo #include "debug.h" 20*e76ac2bfSKalle Valo #include "htc-ops.h" 21bdcd8170SKalle Valo 223fdc0991SVasanthakumar Thiagarajan /* 233fdc0991SVasanthakumar Thiagarajan * tid - tid_mux0..tid_mux3 243fdc0991SVasanthakumar Thiagarajan * aid - tid_mux4..tid_mux7 253fdc0991SVasanthakumar Thiagarajan */ 263fdc0991SVasanthakumar Thiagarajan #define ATH6KL_TID_MASK 0xf 271d2a4456SVasanthakumar Thiagarajan #define ATH6KL_AID_SHIFT 4 283fdc0991SVasanthakumar Thiagarajan 293fdc0991SVasanthakumar Thiagarajan static inline u8 ath6kl_get_tid(u8 tid_mux) 303fdc0991SVasanthakumar Thiagarajan { 313fdc0991SVasanthakumar Thiagarajan return tid_mux & ATH6KL_TID_MASK; 323fdc0991SVasanthakumar Thiagarajan } 333fdc0991SVasanthakumar Thiagarajan 341d2a4456SVasanthakumar Thiagarajan static inline u8 ath6kl_get_aid(u8 tid_mux) 351d2a4456SVasanthakumar Thiagarajan { 361d2a4456SVasanthakumar Thiagarajan return tid_mux >> ATH6KL_AID_SHIFT; 371d2a4456SVasanthakumar Thiagarajan } 381d2a4456SVasanthakumar Thiagarajan 39bdcd8170SKalle Valo static u8 ath6kl_ibss_map_epid(struct sk_buff *skb, struct net_device *dev, 40bdcd8170SKalle Valo u32 *map_no) 41bdcd8170SKalle Valo { 42bdcd8170SKalle Valo struct ath6kl *ar = ath6kl_priv(dev); 43bdcd8170SKalle Valo struct ethhdr *eth_hdr; 44bdcd8170SKalle Valo u32 i, ep_map = -1; 45bdcd8170SKalle Valo u8 *datap; 46bdcd8170SKalle Valo 47bdcd8170SKalle Valo *map_no = 0; 48bdcd8170SKalle Valo datap = skb->data; 49bdcd8170SKalle Valo eth_hdr = (struct ethhdr *) (datap + sizeof(struct wmi_data_hdr)); 50bdcd8170SKalle Valo 51bdcd8170SKalle Valo if (is_multicast_ether_addr(eth_hdr->h_dest)) 52bdcd8170SKalle Valo return ENDPOINT_2; 53bdcd8170SKalle Valo 54bdcd8170SKalle Valo for (i = 0; i < ar->node_num; i++) { 55bdcd8170SKalle Valo if (memcmp(eth_hdr->h_dest, ar->node_map[i].mac_addr, 56bdcd8170SKalle Valo ETH_ALEN) == 0) { 57bdcd8170SKalle Valo *map_no = i + 1; 58bdcd8170SKalle Valo ar->node_map[i].tx_pend++; 59bdcd8170SKalle Valo return ar->node_map[i].ep_id; 60bdcd8170SKalle Valo } 61bdcd8170SKalle Valo 62bdcd8170SKalle Valo if ((ep_map == -1) && !ar->node_map[i].tx_pend) 63bdcd8170SKalle Valo ep_map = i; 64bdcd8170SKalle Valo } 65bdcd8170SKalle Valo 66bdcd8170SKalle Valo if (ep_map == -1) { 67bdcd8170SKalle Valo ep_map = ar->node_num; 68bdcd8170SKalle Valo ar->node_num++; 69bdcd8170SKalle Valo if (ar->node_num > MAX_NODE_NUM) 70bdcd8170SKalle Valo return ENDPOINT_UNUSED; 71bdcd8170SKalle Valo } 72bdcd8170SKalle Valo 73bdcd8170SKalle Valo memcpy(ar->node_map[ep_map].mac_addr, eth_hdr->h_dest, ETH_ALEN); 74bdcd8170SKalle Valo 75bdcd8170SKalle Valo for (i = ENDPOINT_2; i <= ENDPOINT_5; i++) { 76bdcd8170SKalle Valo if (!ar->tx_pending[i]) { 77bdcd8170SKalle Valo ar->node_map[ep_map].ep_id = i; 78bdcd8170SKalle Valo break; 79bdcd8170SKalle Valo } 80bdcd8170SKalle Valo 81bdcd8170SKalle Valo /* 82bdcd8170SKalle Valo * No free endpoint is available, start redistribution on 83bdcd8170SKalle Valo * the inuse endpoints. 84bdcd8170SKalle Valo */ 85bdcd8170SKalle Valo if (i == ENDPOINT_5) { 86bdcd8170SKalle Valo ar->node_map[ep_map].ep_id = ar->next_ep_id; 87bdcd8170SKalle Valo ar->next_ep_id++; 88bdcd8170SKalle Valo if (ar->next_ep_id > ENDPOINT_5) 89bdcd8170SKalle Valo ar->next_ep_id = ENDPOINT_2; 90bdcd8170SKalle Valo } 91bdcd8170SKalle Valo } 92bdcd8170SKalle Valo 93bdcd8170SKalle Valo *map_no = ep_map + 1; 94bdcd8170SKalle Valo ar->node_map[ep_map].tx_pend++; 95bdcd8170SKalle Valo 96bdcd8170SKalle Valo return ar->node_map[ep_map].ep_id; 97bdcd8170SKalle Valo } 98bdcd8170SKalle Valo 99c1762a3fSThirumalai Pachamuthu static bool ath6kl_process_uapsdq(struct ath6kl_sta *conn, 100c1762a3fSThirumalai Pachamuthu struct ath6kl_vif *vif, 101c1762a3fSThirumalai Pachamuthu struct sk_buff *skb, 102c1762a3fSThirumalai Pachamuthu u32 *flags) 103c1762a3fSThirumalai Pachamuthu { 104c1762a3fSThirumalai Pachamuthu struct ath6kl *ar = vif->ar; 105c1762a3fSThirumalai Pachamuthu bool is_apsdq_empty = false; 106c1762a3fSThirumalai Pachamuthu struct ethhdr *datap = (struct ethhdr *) skb->data; 107e5726028SKalle Valo u8 up = 0, traffic_class, *ip_hdr; 108c1762a3fSThirumalai Pachamuthu u16 ether_type; 109c1762a3fSThirumalai Pachamuthu struct ath6kl_llc_snap_hdr *llc_hdr; 110c1762a3fSThirumalai Pachamuthu 111c1762a3fSThirumalai Pachamuthu if (conn->sta_flags & STA_PS_APSD_TRIGGER) { 112c1762a3fSThirumalai Pachamuthu /* 113c1762a3fSThirumalai Pachamuthu * This tx is because of a uAPSD trigger, determine 114c1762a3fSThirumalai Pachamuthu * more and EOSP bit. Set EOSP if queue is empty 115c1762a3fSThirumalai Pachamuthu * or sufficient frames are delivered for this trigger. 116c1762a3fSThirumalai Pachamuthu */ 117c1762a3fSThirumalai Pachamuthu spin_lock_bh(&conn->psq_lock); 118c1762a3fSThirumalai Pachamuthu if (!skb_queue_empty(&conn->apsdq)) 119c1762a3fSThirumalai Pachamuthu *flags |= WMI_DATA_HDR_FLAGS_MORE; 120c1762a3fSThirumalai Pachamuthu else if (conn->sta_flags & STA_PS_APSD_EOSP) 121c1762a3fSThirumalai Pachamuthu *flags |= WMI_DATA_HDR_FLAGS_EOSP; 122c1762a3fSThirumalai Pachamuthu *flags |= WMI_DATA_HDR_FLAGS_UAPSD; 123c1762a3fSThirumalai Pachamuthu spin_unlock_bh(&conn->psq_lock); 124c1762a3fSThirumalai Pachamuthu return false; 125c1762a3fSThirumalai Pachamuthu } else if (!conn->apsd_info) 126c1762a3fSThirumalai Pachamuthu return false; 127c1762a3fSThirumalai Pachamuthu 128c1762a3fSThirumalai Pachamuthu if (test_bit(WMM_ENABLED, &vif->flags)) { 129c1762a3fSThirumalai Pachamuthu ether_type = be16_to_cpu(datap->h_proto); 130c1762a3fSThirumalai Pachamuthu if (is_ethertype(ether_type)) { 131c1762a3fSThirumalai Pachamuthu /* packet is in DIX format */ 132c1762a3fSThirumalai Pachamuthu ip_hdr = (u8 *)(datap + 1); 133c1762a3fSThirumalai Pachamuthu } else { 134c1762a3fSThirumalai Pachamuthu /* packet is in 802.3 format */ 135c1762a3fSThirumalai Pachamuthu llc_hdr = (struct ath6kl_llc_snap_hdr *) 136c1762a3fSThirumalai Pachamuthu (datap + 1); 137c1762a3fSThirumalai Pachamuthu ether_type = be16_to_cpu(llc_hdr->eth_type); 138c1762a3fSThirumalai Pachamuthu ip_hdr = (u8 *)(llc_hdr + 1); 139c1762a3fSThirumalai Pachamuthu } 140c1762a3fSThirumalai Pachamuthu 141c1762a3fSThirumalai Pachamuthu if (ether_type == IP_ETHERTYPE) 142c1762a3fSThirumalai Pachamuthu up = ath6kl_wmi_determine_user_priority( 143c1762a3fSThirumalai Pachamuthu ip_hdr, 0); 144c1762a3fSThirumalai Pachamuthu } 145c1762a3fSThirumalai Pachamuthu 146c1762a3fSThirumalai Pachamuthu traffic_class = ath6kl_wmi_get_traffic_class(up); 147c1762a3fSThirumalai Pachamuthu 148c1762a3fSThirumalai Pachamuthu if ((conn->apsd_info & (1 << traffic_class)) == 0) 149c1762a3fSThirumalai Pachamuthu return false; 150c1762a3fSThirumalai Pachamuthu 151c1762a3fSThirumalai Pachamuthu /* Queue the frames if the STA is sleeping */ 152c1762a3fSThirumalai Pachamuthu spin_lock_bh(&conn->psq_lock); 153c1762a3fSThirumalai Pachamuthu is_apsdq_empty = skb_queue_empty(&conn->apsdq); 154c1762a3fSThirumalai Pachamuthu skb_queue_tail(&conn->apsdq, skb); 155c1762a3fSThirumalai Pachamuthu spin_unlock_bh(&conn->psq_lock); 156c1762a3fSThirumalai Pachamuthu 157c1762a3fSThirumalai Pachamuthu /* 158c1762a3fSThirumalai Pachamuthu * If this is the first pkt getting queued 159c1762a3fSThirumalai Pachamuthu * for this STA, update the PVB for this STA 160c1762a3fSThirumalai Pachamuthu */ 161c1762a3fSThirumalai Pachamuthu if (is_apsdq_empty) { 162c1762a3fSThirumalai Pachamuthu ath6kl_wmi_set_apsd_bfrd_traf(ar->wmi, 163c1762a3fSThirumalai Pachamuthu vif->fw_vif_idx, 164c1762a3fSThirumalai Pachamuthu conn->aid, 1, 0); 165c1762a3fSThirumalai Pachamuthu } 166c1762a3fSThirumalai Pachamuthu *flags |= WMI_DATA_HDR_FLAGS_UAPSD; 167c1762a3fSThirumalai Pachamuthu 168c1762a3fSThirumalai Pachamuthu return true; 169c1762a3fSThirumalai Pachamuthu } 170c1762a3fSThirumalai Pachamuthu 171c1762a3fSThirumalai Pachamuthu static bool ath6kl_process_psq(struct ath6kl_sta *conn, 172c1762a3fSThirumalai Pachamuthu struct ath6kl_vif *vif, 173c1762a3fSThirumalai Pachamuthu struct sk_buff *skb, 174c1762a3fSThirumalai Pachamuthu u32 *flags) 175c1762a3fSThirumalai Pachamuthu { 176c1762a3fSThirumalai Pachamuthu bool is_psq_empty = false; 177c1762a3fSThirumalai Pachamuthu struct ath6kl *ar = vif->ar; 178c1762a3fSThirumalai Pachamuthu 179c1762a3fSThirumalai Pachamuthu if (conn->sta_flags & STA_PS_POLLED) { 180c1762a3fSThirumalai Pachamuthu spin_lock_bh(&conn->psq_lock); 181c1762a3fSThirumalai Pachamuthu if (!skb_queue_empty(&conn->psq)) 182c1762a3fSThirumalai Pachamuthu *flags |= WMI_DATA_HDR_FLAGS_MORE; 183c1762a3fSThirumalai Pachamuthu spin_unlock_bh(&conn->psq_lock); 184c1762a3fSThirumalai Pachamuthu return false; 185c1762a3fSThirumalai Pachamuthu } 186c1762a3fSThirumalai Pachamuthu 187c1762a3fSThirumalai Pachamuthu /* Queue the frames if the STA is sleeping */ 188c1762a3fSThirumalai Pachamuthu spin_lock_bh(&conn->psq_lock); 189c1762a3fSThirumalai Pachamuthu is_psq_empty = skb_queue_empty(&conn->psq); 190c1762a3fSThirumalai Pachamuthu skb_queue_tail(&conn->psq, skb); 191c1762a3fSThirumalai Pachamuthu spin_unlock_bh(&conn->psq_lock); 192c1762a3fSThirumalai Pachamuthu 193c1762a3fSThirumalai Pachamuthu /* 194c1762a3fSThirumalai Pachamuthu * If this is the first pkt getting queued 195c1762a3fSThirumalai Pachamuthu * for this STA, update the PVB for this 196c1762a3fSThirumalai Pachamuthu * STA. 197c1762a3fSThirumalai Pachamuthu */ 198c1762a3fSThirumalai Pachamuthu if (is_psq_empty) 199c1762a3fSThirumalai Pachamuthu ath6kl_wmi_set_pvb_cmd(ar->wmi, 200c1762a3fSThirumalai Pachamuthu vif->fw_vif_idx, 201c1762a3fSThirumalai Pachamuthu conn->aid, 1); 202c1762a3fSThirumalai Pachamuthu return true; 203c1762a3fSThirumalai Pachamuthu } 204c1762a3fSThirumalai Pachamuthu 2056765d0aaSVasanthakumar Thiagarajan static bool ath6kl_powersave_ap(struct ath6kl_vif *vif, struct sk_buff *skb, 206c1762a3fSThirumalai Pachamuthu u32 *flags) 207bdcd8170SKalle Valo { 208bdcd8170SKalle Valo struct ethhdr *datap = (struct ethhdr *) skb->data; 209bdcd8170SKalle Valo struct ath6kl_sta *conn = NULL; 210c1762a3fSThirumalai Pachamuthu bool ps_queued = false; 2116765d0aaSVasanthakumar Thiagarajan struct ath6kl *ar = vif->ar; 212bdcd8170SKalle Valo 213bdcd8170SKalle Valo if (is_multicast_ether_addr(datap->h_dest)) { 214bdcd8170SKalle Valo u8 ctr = 0; 215bdcd8170SKalle Valo bool q_mcast = false; 216bdcd8170SKalle Valo 217bdcd8170SKalle Valo for (ctr = 0; ctr < AP_MAX_NUM_STA; ctr++) { 218bdcd8170SKalle Valo if (ar->sta_list[ctr].sta_flags & STA_PS_SLEEP) { 219bdcd8170SKalle Valo q_mcast = true; 220bdcd8170SKalle Valo break; 221bdcd8170SKalle Valo } 222bdcd8170SKalle Valo } 223bdcd8170SKalle Valo 224bdcd8170SKalle Valo if (q_mcast) { 225bdcd8170SKalle Valo /* 226bdcd8170SKalle Valo * If this transmit is not because of a Dtim Expiry 227bdcd8170SKalle Valo * q it. 228bdcd8170SKalle Valo */ 22959c98449SVasanthakumar Thiagarajan if (!test_bit(DTIM_EXPIRED, &vif->flags)) { 230bdcd8170SKalle Valo bool is_mcastq_empty = false; 231bdcd8170SKalle Valo 232bdcd8170SKalle Valo spin_lock_bh(&ar->mcastpsq_lock); 233bdcd8170SKalle Valo is_mcastq_empty = 234bdcd8170SKalle Valo skb_queue_empty(&ar->mcastpsq); 235bdcd8170SKalle Valo skb_queue_tail(&ar->mcastpsq, skb); 236bdcd8170SKalle Valo spin_unlock_bh(&ar->mcastpsq_lock); 237bdcd8170SKalle Valo 238bdcd8170SKalle Valo /* 239bdcd8170SKalle Valo * If this is the first Mcast pkt getting 240bdcd8170SKalle Valo * queued indicate to the target to set the 241bdcd8170SKalle Valo * BitmapControl LSB of the TIM IE. 242bdcd8170SKalle Valo */ 243bdcd8170SKalle Valo if (is_mcastq_empty) 244bdcd8170SKalle Valo ath6kl_wmi_set_pvb_cmd(ar->wmi, 245334234b5SVasanthakumar Thiagarajan vif->fw_vif_idx, 246bdcd8170SKalle Valo MCAST_AID, 1); 247bdcd8170SKalle Valo 248bdcd8170SKalle Valo ps_queued = true; 249bdcd8170SKalle Valo } else { 250bdcd8170SKalle Valo /* 251bdcd8170SKalle Valo * This transmit is because of Dtim expiry. 252bdcd8170SKalle Valo * Determine if MoreData bit has to be set. 253bdcd8170SKalle Valo */ 254bdcd8170SKalle Valo spin_lock_bh(&ar->mcastpsq_lock); 255bdcd8170SKalle Valo if (!skb_queue_empty(&ar->mcastpsq)) 256c1762a3fSThirumalai Pachamuthu *flags |= WMI_DATA_HDR_FLAGS_MORE; 257bdcd8170SKalle Valo spin_unlock_bh(&ar->mcastpsq_lock); 258bdcd8170SKalle Valo } 259bdcd8170SKalle Valo } 260bdcd8170SKalle Valo } else { 2616765d0aaSVasanthakumar Thiagarajan conn = ath6kl_find_sta(vif, datap->h_dest); 262bdcd8170SKalle Valo if (!conn) { 263bdcd8170SKalle Valo dev_kfree_skb(skb); 264bdcd8170SKalle Valo 265bdcd8170SKalle Valo /* Inform the caller that the skb is consumed */ 266bdcd8170SKalle Valo return true; 267bdcd8170SKalle Valo } 268bdcd8170SKalle Valo 269bdcd8170SKalle Valo if (conn->sta_flags & STA_PS_SLEEP) { 270c1762a3fSThirumalai Pachamuthu ps_queued = ath6kl_process_uapsdq(conn, 271c1762a3fSThirumalai Pachamuthu vif, skb, flags); 272c1762a3fSThirumalai Pachamuthu if (!(*flags & WMI_DATA_HDR_FLAGS_UAPSD)) 273c1762a3fSThirumalai Pachamuthu ps_queued = ath6kl_process_psq(conn, 274c1762a3fSThirumalai Pachamuthu vif, skb, flags); 275bdcd8170SKalle Valo } 276bdcd8170SKalle Valo } 277bdcd8170SKalle Valo return ps_queued; 278bdcd8170SKalle Valo } 279bdcd8170SKalle Valo 280bdcd8170SKalle Valo /* Tx functions */ 281bdcd8170SKalle Valo 282bdcd8170SKalle Valo int ath6kl_control_tx(void *devt, struct sk_buff *skb, 283bdcd8170SKalle Valo enum htc_endpoint_id eid) 284bdcd8170SKalle Valo { 285bdcd8170SKalle Valo struct ath6kl *ar = devt; 286bdcd8170SKalle Valo int status = 0; 287bdcd8170SKalle Valo struct ath6kl_cookie *cookie = NULL; 288bdcd8170SKalle Valo 289390a8c8fSRaja Mani if (WARN_ON_ONCE(ar->state == ATH6KL_STATE_WOW)) 290390a8c8fSRaja Mani return -EACCES; 291390a8c8fSRaja Mani 292bdcd8170SKalle Valo spin_lock_bh(&ar->lock); 293bdcd8170SKalle Valo 294bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_WLAN_TX, 295bdcd8170SKalle Valo "%s: skb=0x%p, len=0x%x eid =%d\n", __func__, 296bdcd8170SKalle Valo skb, skb->len, eid); 297bdcd8170SKalle Valo 298bdcd8170SKalle Valo if (test_bit(WMI_CTRL_EP_FULL, &ar->flag) && (eid == ar->ctrl_ep)) { 299bdcd8170SKalle Valo /* 300bdcd8170SKalle Valo * Control endpoint is full, don't allocate resources, we 301bdcd8170SKalle Valo * are just going to drop this packet. 302bdcd8170SKalle Valo */ 303bdcd8170SKalle Valo cookie = NULL; 304bdcd8170SKalle Valo ath6kl_err("wmi ctrl ep full, dropping pkt : 0x%p, len:%d\n", 305bdcd8170SKalle Valo skb, skb->len); 306bdcd8170SKalle Valo } else 307bdcd8170SKalle Valo cookie = ath6kl_alloc_cookie(ar); 308bdcd8170SKalle Valo 309bdcd8170SKalle Valo if (cookie == NULL) { 310bdcd8170SKalle Valo spin_unlock_bh(&ar->lock); 311bdcd8170SKalle Valo status = -ENOMEM; 312bdcd8170SKalle Valo goto fail_ctrl_tx; 313bdcd8170SKalle Valo } 314bdcd8170SKalle Valo 315bdcd8170SKalle Valo ar->tx_pending[eid]++; 316bdcd8170SKalle Valo 317bdcd8170SKalle Valo if (eid != ar->ctrl_ep) 318bdcd8170SKalle Valo ar->total_tx_data_pend++; 319bdcd8170SKalle Valo 320bdcd8170SKalle Valo spin_unlock_bh(&ar->lock); 321bdcd8170SKalle Valo 322bdcd8170SKalle Valo cookie->skb = skb; 323bdcd8170SKalle Valo cookie->map_no = 0; 324bdcd8170SKalle Valo set_htc_pkt_info(&cookie->htc_pkt, cookie, skb->data, skb->len, 325bdcd8170SKalle Valo eid, ATH6KL_CONTROL_PKT_TAG); 326cfc10f24SKalle Valo cookie->htc_pkt.skb = skb; 327bdcd8170SKalle Valo 328bdcd8170SKalle Valo /* 329bdcd8170SKalle Valo * This interface is asynchronous, if there is an error, cleanup 330bdcd8170SKalle Valo * will happen in the TX completion callback. 331bdcd8170SKalle Valo */ 332ad226ec2SKalle Valo ath6kl_htc_tx(ar->htc_target, &cookie->htc_pkt); 333bdcd8170SKalle Valo 334bdcd8170SKalle Valo return 0; 335bdcd8170SKalle Valo 336bdcd8170SKalle Valo fail_ctrl_tx: 337bdcd8170SKalle Valo dev_kfree_skb(skb); 338bdcd8170SKalle Valo return status; 339bdcd8170SKalle Valo } 340bdcd8170SKalle Valo 341bdcd8170SKalle Valo int ath6kl_data_tx(struct sk_buff *skb, struct net_device *dev) 342bdcd8170SKalle Valo { 343bdcd8170SKalle Valo struct ath6kl *ar = ath6kl_priv(dev); 344bdcd8170SKalle Valo struct ath6kl_cookie *cookie = NULL; 345bdcd8170SKalle Valo enum htc_endpoint_id eid = ENDPOINT_UNUSED; 34659c98449SVasanthakumar Thiagarajan struct ath6kl_vif *vif = netdev_priv(dev); 347bdcd8170SKalle Valo u32 map_no = 0; 348bdcd8170SKalle Valo u16 htc_tag = ATH6KL_DATA_PKT_TAG; 349bdcd8170SKalle Valo u8 ac = 99 ; /* initialize to unmapped ac */ 350c1762a3fSThirumalai Pachamuthu bool chk_adhoc_ps_mapping = false; 351bdcd8170SKalle Valo int ret; 352bc48ad31SRishi Panjwani struct wmi_tx_meta_v2 meta_v2; 353bc48ad31SRishi Panjwani void *meta; 354bc48ad31SRishi Panjwani u8 csum_start = 0, csum_dest = 0, csum = skb->ip_summed; 355bc48ad31SRishi Panjwani u8 meta_ver = 0; 356c1762a3fSThirumalai Pachamuthu u32 flags = 0; 357bdcd8170SKalle Valo 358bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_WLAN_TX, 359bdcd8170SKalle Valo "%s: skb=0x%p, data=0x%p, len=0x%x\n", __func__, 360bdcd8170SKalle Valo skb, skb->data, skb->len); 361bdcd8170SKalle Valo 362bdcd8170SKalle Valo /* If target is not associated */ 36359c98449SVasanthakumar Thiagarajan if (!test_bit(CONNECTED, &vif->flags)) { 364bdcd8170SKalle Valo dev_kfree_skb(skb); 365bdcd8170SKalle Valo return 0; 366bdcd8170SKalle Valo } 367bdcd8170SKalle Valo 368390a8c8fSRaja Mani if (WARN_ON_ONCE(ar->state != ATH6KL_STATE_ON)) { 369390a8c8fSRaja Mani dev_kfree_skb(skb); 370390a8c8fSRaja Mani return 0; 371390a8c8fSRaja Mani } 372390a8c8fSRaja Mani 373bdcd8170SKalle Valo if (!test_bit(WMI_READY, &ar->flag)) 374bdcd8170SKalle Valo goto fail_tx; 375bdcd8170SKalle Valo 376bdcd8170SKalle Valo /* AP mode Power saving processing */ 377f5938f24SVasanthakumar Thiagarajan if (vif->nw_type == AP_NETWORK) { 378c1762a3fSThirumalai Pachamuthu if (ath6kl_powersave_ap(vif, skb, &flags)) 379bdcd8170SKalle Valo return 0; 380bdcd8170SKalle Valo } 381bdcd8170SKalle Valo 382bdcd8170SKalle Valo if (test_bit(WMI_ENABLED, &ar->flag)) { 383bc48ad31SRishi Panjwani if ((dev->features & NETIF_F_IP_CSUM) && 384bc48ad31SRishi Panjwani (csum == CHECKSUM_PARTIAL)) { 385bc48ad31SRishi Panjwani csum_start = skb->csum_start - 386bc48ad31SRishi Panjwani (skb_network_header(skb) - skb->head) + 387bc48ad31SRishi Panjwani sizeof(struct ath6kl_llc_snap_hdr); 388bc48ad31SRishi Panjwani csum_dest = skb->csum_offset + csum_start; 389bc48ad31SRishi Panjwani } 390bc48ad31SRishi Panjwani 391bdcd8170SKalle Valo if (skb_headroom(skb) < dev->needed_headroom) { 392a29517ceSVasanthakumar Thiagarajan struct sk_buff *tmp_skb = skb; 393a29517ceSVasanthakumar Thiagarajan 394a29517ceSVasanthakumar Thiagarajan skb = skb_realloc_headroom(skb, dev->needed_headroom); 395a29517ceSVasanthakumar Thiagarajan kfree_skb(tmp_skb); 396a29517ceSVasanthakumar Thiagarajan if (skb == NULL) { 397a29517ceSVasanthakumar Thiagarajan vif->net_stats.tx_dropped++; 398a29517ceSVasanthakumar Thiagarajan return 0; 399a29517ceSVasanthakumar Thiagarajan } 400bdcd8170SKalle Valo } 401bdcd8170SKalle Valo 402bdcd8170SKalle Valo if (ath6kl_wmi_dix_2_dot3(ar->wmi, skb)) { 403bdcd8170SKalle Valo ath6kl_err("ath6kl_wmi_dix_2_dot3 failed\n"); 404bdcd8170SKalle Valo goto fail_tx; 405bdcd8170SKalle Valo } 406bdcd8170SKalle Valo 407bc48ad31SRishi Panjwani if ((dev->features & NETIF_F_IP_CSUM) && 408bc48ad31SRishi Panjwani (csum == CHECKSUM_PARTIAL)) { 409bc48ad31SRishi Panjwani meta_v2.csum_start = csum_start; 410bc48ad31SRishi Panjwani meta_v2.csum_dest = csum_dest; 411bc48ad31SRishi Panjwani 412bc48ad31SRishi Panjwani /* instruct target to calculate checksum */ 413bc48ad31SRishi Panjwani meta_v2.csum_flags = WMI_META_V2_FLAG_CSUM_OFFLOAD; 414bc48ad31SRishi Panjwani meta_ver = WMI_META_VERSION_2; 415bc48ad31SRishi Panjwani meta = &meta_v2; 416bc48ad31SRishi Panjwani } else { 417bc48ad31SRishi Panjwani meta_ver = 0; 418bc48ad31SRishi Panjwani meta = NULL; 419bc48ad31SRishi Panjwani } 420bc48ad31SRishi Panjwani 421bc48ad31SRishi Panjwani ret = ath6kl_wmi_data_hdr_add(ar->wmi, skb, 422c1762a3fSThirumalai Pachamuthu DATA_MSGTYPE, flags, 0, 423bc48ad31SRishi Panjwani meta_ver, 424bc48ad31SRishi Panjwani meta, vif->fw_vif_idx); 425bc48ad31SRishi Panjwani 426bc48ad31SRishi Panjwani if (ret) { 427bc48ad31SRishi Panjwani ath6kl_warn("failed to add wmi data header:%d\n" 428bc48ad31SRishi Panjwani , ret); 429bdcd8170SKalle Valo goto fail_tx; 430bdcd8170SKalle Valo } 431bdcd8170SKalle Valo 432f5938f24SVasanthakumar Thiagarajan if ((vif->nw_type == ADHOC_NETWORK) && 43359c98449SVasanthakumar Thiagarajan ar->ibss_ps_enable && test_bit(CONNECTED, &vif->flags)) 434bdcd8170SKalle Valo chk_adhoc_ps_mapping = true; 435bdcd8170SKalle Valo else { 436bdcd8170SKalle Valo /* get the stream mapping */ 437240d2799SVasanthakumar Thiagarajan ret = ath6kl_wmi_implicit_create_pstream(ar->wmi, 438240d2799SVasanthakumar Thiagarajan vif->fw_vif_idx, skb, 43959c98449SVasanthakumar Thiagarajan 0, test_bit(WMM_ENABLED, &vif->flags), &ac); 440bdcd8170SKalle Valo if (ret) 441bdcd8170SKalle Valo goto fail_tx; 442bdcd8170SKalle Valo } 443bdcd8170SKalle Valo } else 444bdcd8170SKalle Valo goto fail_tx; 445bdcd8170SKalle Valo 446bdcd8170SKalle Valo spin_lock_bh(&ar->lock); 447bdcd8170SKalle Valo 448bdcd8170SKalle Valo if (chk_adhoc_ps_mapping) 449bdcd8170SKalle Valo eid = ath6kl_ibss_map_epid(skb, dev, &map_no); 450bdcd8170SKalle Valo else 451bdcd8170SKalle Valo eid = ar->ac2ep_map[ac]; 452bdcd8170SKalle Valo 453bdcd8170SKalle Valo if (eid == 0 || eid == ENDPOINT_UNUSED) { 454bdcd8170SKalle Valo ath6kl_err("eid %d is not mapped!\n", eid); 455bdcd8170SKalle Valo spin_unlock_bh(&ar->lock); 456bdcd8170SKalle Valo goto fail_tx; 457bdcd8170SKalle Valo } 458bdcd8170SKalle Valo 459bdcd8170SKalle Valo /* allocate resource for this packet */ 460bdcd8170SKalle Valo cookie = ath6kl_alloc_cookie(ar); 461bdcd8170SKalle Valo 462bdcd8170SKalle Valo if (!cookie) { 463bdcd8170SKalle Valo spin_unlock_bh(&ar->lock); 464bdcd8170SKalle Valo goto fail_tx; 465bdcd8170SKalle Valo } 466bdcd8170SKalle Valo 467bdcd8170SKalle Valo /* update counts while the lock is held */ 468bdcd8170SKalle Valo ar->tx_pending[eid]++; 469bdcd8170SKalle Valo ar->total_tx_data_pend++; 470bdcd8170SKalle Valo 471bdcd8170SKalle Valo spin_unlock_bh(&ar->lock); 472bdcd8170SKalle Valo 47300b1edf1SJouni Malinen if (!IS_ALIGNED((unsigned long) skb->data - HTC_HDR_LENGTH, 4) && 47400b1edf1SJouni Malinen skb_cloned(skb)) { 47500b1edf1SJouni Malinen /* 47600b1edf1SJouni Malinen * We will touch (move the buffer data to align it. Since the 47700b1edf1SJouni Malinen * skb buffer is cloned and not only the header is changed, we 47800b1edf1SJouni Malinen * have to copy it to allow the changes. Since we are copying 47900b1edf1SJouni Malinen * the data here, we may as well align it by reserving suitable 48000b1edf1SJouni Malinen * headroom to avoid the memmove in ath6kl_htc_tx_buf_align(). 48100b1edf1SJouni Malinen */ 48200b1edf1SJouni Malinen struct sk_buff *nskb; 48300b1edf1SJouni Malinen 48400b1edf1SJouni Malinen nskb = skb_copy_expand(skb, HTC_HDR_LENGTH, 0, GFP_ATOMIC); 48500b1edf1SJouni Malinen if (nskb == NULL) 48600b1edf1SJouni Malinen goto fail_tx; 48700b1edf1SJouni Malinen kfree_skb(skb); 48800b1edf1SJouni Malinen skb = nskb; 48900b1edf1SJouni Malinen } 49000b1edf1SJouni Malinen 491bdcd8170SKalle Valo cookie->skb = skb; 492bdcd8170SKalle Valo cookie->map_no = map_no; 493bdcd8170SKalle Valo set_htc_pkt_info(&cookie->htc_pkt, cookie, skb->data, skb->len, 494bdcd8170SKalle Valo eid, htc_tag); 495cfc10f24SKalle Valo cookie->htc_pkt.skb = skb; 496bdcd8170SKalle Valo 497ef094103SKalle Valo ath6kl_dbg_dump(ATH6KL_DBG_RAW_BYTES, __func__, "tx ", 498ef094103SKalle Valo skb->data, skb->len); 499bdcd8170SKalle Valo 500bdcd8170SKalle Valo /* 501bdcd8170SKalle Valo * HTC interface is asynchronous, if this fails, cleanup will 502bdcd8170SKalle Valo * happen in the ath6kl_tx_complete callback. 503bdcd8170SKalle Valo */ 504ad226ec2SKalle Valo ath6kl_htc_tx(ar->htc_target, &cookie->htc_pkt); 505bdcd8170SKalle Valo 506bdcd8170SKalle Valo return 0; 507bdcd8170SKalle Valo 508bdcd8170SKalle Valo fail_tx: 509bdcd8170SKalle Valo dev_kfree_skb(skb); 510bdcd8170SKalle Valo 511b95907a7SVasanthakumar Thiagarajan vif->net_stats.tx_dropped++; 512b95907a7SVasanthakumar Thiagarajan vif->net_stats.tx_aborted_errors++; 513bdcd8170SKalle Valo 514bdcd8170SKalle Valo return 0; 515bdcd8170SKalle Valo } 516bdcd8170SKalle Valo 517bdcd8170SKalle Valo /* indicate tx activity or inactivity on a WMI stream */ 518bdcd8170SKalle Valo void ath6kl_indicate_tx_activity(void *devt, u8 traffic_class, bool active) 519bdcd8170SKalle Valo { 520bdcd8170SKalle Valo struct ath6kl *ar = devt; 521bdcd8170SKalle Valo enum htc_endpoint_id eid; 522bdcd8170SKalle Valo int i; 523bdcd8170SKalle Valo 524bdcd8170SKalle Valo eid = ar->ac2ep_map[traffic_class]; 525bdcd8170SKalle Valo 526bdcd8170SKalle Valo if (!test_bit(WMI_ENABLED, &ar->flag)) 527bdcd8170SKalle Valo goto notify_htc; 528bdcd8170SKalle Valo 529bdcd8170SKalle Valo spin_lock_bh(&ar->lock); 530bdcd8170SKalle Valo 531bdcd8170SKalle Valo ar->ac_stream_active[traffic_class] = active; 532bdcd8170SKalle Valo 533bdcd8170SKalle Valo if (active) { 534bdcd8170SKalle Valo /* 535bdcd8170SKalle Valo * Keep track of the active stream with the highest 536bdcd8170SKalle Valo * priority. 537bdcd8170SKalle Valo */ 538bdcd8170SKalle Valo if (ar->ac_stream_pri_map[traffic_class] > 539bdcd8170SKalle Valo ar->hiac_stream_active_pri) 540bdcd8170SKalle Valo /* set the new highest active priority */ 541bdcd8170SKalle Valo ar->hiac_stream_active_pri = 542bdcd8170SKalle Valo ar->ac_stream_pri_map[traffic_class]; 543bdcd8170SKalle Valo 544bdcd8170SKalle Valo } else { 545bdcd8170SKalle Valo /* 546bdcd8170SKalle Valo * We may have to search for the next active stream 547bdcd8170SKalle Valo * that is the highest priority. 548bdcd8170SKalle Valo */ 549bdcd8170SKalle Valo if (ar->hiac_stream_active_pri == 550bdcd8170SKalle Valo ar->ac_stream_pri_map[traffic_class]) { 551bdcd8170SKalle Valo /* 552bdcd8170SKalle Valo * The highest priority stream just went inactive 553bdcd8170SKalle Valo * reset and search for the "next" highest "active" 554bdcd8170SKalle Valo * priority stream. 555bdcd8170SKalle Valo */ 556bdcd8170SKalle Valo ar->hiac_stream_active_pri = 0; 557bdcd8170SKalle Valo 558bdcd8170SKalle Valo for (i = 0; i < WMM_NUM_AC; i++) { 559bdcd8170SKalle Valo if (ar->ac_stream_active[i] && 560bdcd8170SKalle Valo (ar->ac_stream_pri_map[i] > 561bdcd8170SKalle Valo ar->hiac_stream_active_pri)) 562bdcd8170SKalle Valo /* 563bdcd8170SKalle Valo * Set the new highest active 564bdcd8170SKalle Valo * priority. 565bdcd8170SKalle Valo */ 566bdcd8170SKalle Valo ar->hiac_stream_active_pri = 567bdcd8170SKalle Valo ar->ac_stream_pri_map[i]; 568bdcd8170SKalle Valo } 569bdcd8170SKalle Valo } 570bdcd8170SKalle Valo } 571bdcd8170SKalle Valo 572bdcd8170SKalle Valo spin_unlock_bh(&ar->lock); 573bdcd8170SKalle Valo 574bdcd8170SKalle Valo notify_htc: 575bdcd8170SKalle Valo /* notify HTC, this may cause credit distribution changes */ 576*e76ac2bfSKalle Valo ath6kl_htc_activity_changed(ar->htc_target, eid, active); 577bdcd8170SKalle Valo } 578bdcd8170SKalle Valo 579bdcd8170SKalle Valo enum htc_send_full_action ath6kl_tx_queue_full(struct htc_target *target, 580bdcd8170SKalle Valo struct htc_packet *packet) 581bdcd8170SKalle Valo { 582bdcd8170SKalle Valo struct ath6kl *ar = target->dev->ar; 583990bd915SVasanthakumar Thiagarajan struct ath6kl_vif *vif; 584bdcd8170SKalle Valo enum htc_endpoint_id endpoint = packet->endpoint; 585990bd915SVasanthakumar Thiagarajan enum htc_send_full_action action = HTC_SEND_FULL_KEEP; 586bdcd8170SKalle Valo 587bdcd8170SKalle Valo if (endpoint == ar->ctrl_ep) { 588bdcd8170SKalle Valo /* 589bdcd8170SKalle Valo * Under normal WMI if this is getting full, then something 590bdcd8170SKalle Valo * is running rampant the host should not be exhausting the 591bdcd8170SKalle Valo * WMI queue with too many commands the only exception to 592bdcd8170SKalle Valo * this is during testing using endpointping. 593bdcd8170SKalle Valo */ 594bdcd8170SKalle Valo set_bit(WMI_CTRL_EP_FULL, &ar->flag); 595bdcd8170SKalle Valo ath6kl_err("wmi ctrl ep is full\n"); 596901db39cSVasanthakumar Thiagarajan return action; 597bdcd8170SKalle Valo } 598bdcd8170SKalle Valo 599bdcd8170SKalle Valo if (packet->info.tx.tag == ATH6KL_CONTROL_PKT_TAG) 600901db39cSVasanthakumar Thiagarajan return action; 601bdcd8170SKalle Valo 602bdcd8170SKalle Valo /* 603bdcd8170SKalle Valo * The last MAX_HI_COOKIE_NUM "batch" of cookies are reserved for 604bdcd8170SKalle Valo * the highest active stream. 605bdcd8170SKalle Valo */ 606bdcd8170SKalle Valo if (ar->ac_stream_pri_map[ar->ep2ac_map[endpoint]] < 607bdcd8170SKalle Valo ar->hiac_stream_active_pri && 6080ea10f2bSChilam Ng ar->cookie_count <= 6090ea10f2bSChilam Ng target->endpoint[endpoint].tx_drop_packet_threshold) 610bdcd8170SKalle Valo /* 611bdcd8170SKalle Valo * Give preference to the highest priority stream by 612bdcd8170SKalle Valo * dropping the packets which overflowed. 613bdcd8170SKalle Valo */ 614990bd915SVasanthakumar Thiagarajan action = HTC_SEND_FULL_DROP; 615bdcd8170SKalle Valo 616990bd915SVasanthakumar Thiagarajan /* FIXME: Locking */ 61711f6e40dSVasanthakumar Thiagarajan spin_lock_bh(&ar->list_lock); 618990bd915SVasanthakumar Thiagarajan list_for_each_entry(vif, &ar->vif_list, list) { 619901db39cSVasanthakumar Thiagarajan if (vif->nw_type == ADHOC_NETWORK || 620901db39cSVasanthakumar Thiagarajan action != HTC_SEND_FULL_DROP) { 62111f6e40dSVasanthakumar Thiagarajan spin_unlock_bh(&ar->list_lock); 622990bd915SVasanthakumar Thiagarajan 62359c98449SVasanthakumar Thiagarajan set_bit(NETQ_STOPPED, &vif->flags); 62428ae58ddSVasanthakumar Thiagarajan netif_stop_queue(vif->ndev); 625bdcd8170SKalle Valo 626990bd915SVasanthakumar Thiagarajan return action; 627990bd915SVasanthakumar Thiagarajan } 628990bd915SVasanthakumar Thiagarajan } 62911f6e40dSVasanthakumar Thiagarajan spin_unlock_bh(&ar->list_lock); 630990bd915SVasanthakumar Thiagarajan 631990bd915SVasanthakumar Thiagarajan return action; 632bdcd8170SKalle Valo } 633bdcd8170SKalle Valo 634bdcd8170SKalle Valo /* TODO this needs to be looked at */ 635990bd915SVasanthakumar Thiagarajan static void ath6kl_tx_clear_node_map(struct ath6kl_vif *vif, 636bdcd8170SKalle Valo enum htc_endpoint_id eid, u32 map_no) 637bdcd8170SKalle Valo { 638990bd915SVasanthakumar Thiagarajan struct ath6kl *ar = vif->ar; 639bdcd8170SKalle Valo u32 i; 640bdcd8170SKalle Valo 641f5938f24SVasanthakumar Thiagarajan if (vif->nw_type != ADHOC_NETWORK) 642bdcd8170SKalle Valo return; 643bdcd8170SKalle Valo 644bdcd8170SKalle Valo if (!ar->ibss_ps_enable) 645bdcd8170SKalle Valo return; 646bdcd8170SKalle Valo 647bdcd8170SKalle Valo if (eid == ar->ctrl_ep) 648bdcd8170SKalle Valo return; 649bdcd8170SKalle Valo 650bdcd8170SKalle Valo if (map_no == 0) 651bdcd8170SKalle Valo return; 652bdcd8170SKalle Valo 653bdcd8170SKalle Valo map_no--; 654bdcd8170SKalle Valo ar->node_map[map_no].tx_pend--; 655bdcd8170SKalle Valo 656bdcd8170SKalle Valo if (ar->node_map[map_no].tx_pend) 657bdcd8170SKalle Valo return; 658bdcd8170SKalle Valo 659bdcd8170SKalle Valo if (map_no != (ar->node_num - 1)) 660bdcd8170SKalle Valo return; 661bdcd8170SKalle Valo 662bdcd8170SKalle Valo for (i = ar->node_num; i > 0; i--) { 663bdcd8170SKalle Valo if (ar->node_map[i - 1].tx_pend) 664bdcd8170SKalle Valo break; 665bdcd8170SKalle Valo 666bdcd8170SKalle Valo memset(&ar->node_map[i - 1], 0, 667bdcd8170SKalle Valo sizeof(struct ath6kl_node_mapping)); 668bdcd8170SKalle Valo ar->node_num--; 669bdcd8170SKalle Valo } 670bdcd8170SKalle Valo } 671bdcd8170SKalle Valo 67263de1112SKalle Valo void ath6kl_tx_complete(struct htc_target *target, 67363de1112SKalle Valo struct list_head *packet_queue) 674bdcd8170SKalle Valo { 67563de1112SKalle Valo struct ath6kl *ar = target->dev->ar; 676bdcd8170SKalle Valo struct sk_buff_head skb_queue; 677bdcd8170SKalle Valo struct htc_packet *packet; 678bdcd8170SKalle Valo struct sk_buff *skb; 679bdcd8170SKalle Valo struct ath6kl_cookie *ath6kl_cookie; 680bdcd8170SKalle Valo u32 map_no = 0; 681bdcd8170SKalle Valo int status; 682bdcd8170SKalle Valo enum htc_endpoint_id eid; 683bdcd8170SKalle Valo bool wake_event = false; 68471f96ee6SKalle Valo bool flushing[ATH6KL_VIF_MAX] = {false}; 6856765d0aaSVasanthakumar Thiagarajan u8 if_idx; 686990bd915SVasanthakumar Thiagarajan struct ath6kl_vif *vif; 687bdcd8170SKalle Valo 688bdcd8170SKalle Valo skb_queue_head_init(&skb_queue); 689bdcd8170SKalle Valo 690bdcd8170SKalle Valo /* lock the driver as we update internal state */ 691bdcd8170SKalle Valo spin_lock_bh(&ar->lock); 692bdcd8170SKalle Valo 693bdcd8170SKalle Valo /* reap completed packets */ 694bdcd8170SKalle Valo while (!list_empty(packet_queue)) { 695bdcd8170SKalle Valo 696bdcd8170SKalle Valo packet = list_first_entry(packet_queue, struct htc_packet, 697bdcd8170SKalle Valo list); 698bdcd8170SKalle Valo list_del(&packet->list); 699bdcd8170SKalle Valo 700bdcd8170SKalle Valo ath6kl_cookie = (struct ath6kl_cookie *)packet->pkt_cntxt; 701bdcd8170SKalle Valo if (!ath6kl_cookie) 702bdcd8170SKalle Valo goto fatal; 703bdcd8170SKalle Valo 704bdcd8170SKalle Valo status = packet->status; 705bdcd8170SKalle Valo skb = ath6kl_cookie->skb; 706bdcd8170SKalle Valo eid = packet->endpoint; 707bdcd8170SKalle Valo map_no = ath6kl_cookie->map_no; 708bdcd8170SKalle Valo 709bdcd8170SKalle Valo if (!skb || !skb->data) 710bdcd8170SKalle Valo goto fatal; 711bdcd8170SKalle Valo 712bdcd8170SKalle Valo __skb_queue_tail(&skb_queue, skb); 713bdcd8170SKalle Valo 714bdcd8170SKalle Valo if (!status && (packet->act_len != skb->len)) 715bdcd8170SKalle Valo goto fatal; 716bdcd8170SKalle Valo 717bdcd8170SKalle Valo ar->tx_pending[eid]--; 718bdcd8170SKalle Valo 719bdcd8170SKalle Valo if (eid != ar->ctrl_ep) 720bdcd8170SKalle Valo ar->total_tx_data_pend--; 721bdcd8170SKalle Valo 722bdcd8170SKalle Valo if (eid == ar->ctrl_ep) { 723bdcd8170SKalle Valo if (test_bit(WMI_CTRL_EP_FULL, &ar->flag)) 724bdcd8170SKalle Valo clear_bit(WMI_CTRL_EP_FULL, &ar->flag); 725bdcd8170SKalle Valo 726bdcd8170SKalle Valo if (ar->tx_pending[eid] == 0) 727bdcd8170SKalle Valo wake_event = true; 728bdcd8170SKalle Valo } 729bdcd8170SKalle Valo 7306765d0aaSVasanthakumar Thiagarajan if (eid == ar->ctrl_ep) { 7316765d0aaSVasanthakumar Thiagarajan if_idx = wmi_cmd_hdr_get_if_idx( 732f3803eb2SVasanthakumar Thiagarajan (struct wmi_cmd_hdr *) packet->buf); 7336765d0aaSVasanthakumar Thiagarajan } else { 7346765d0aaSVasanthakumar Thiagarajan if_idx = wmi_data_hdr_get_if_idx( 735f3803eb2SVasanthakumar Thiagarajan (struct wmi_data_hdr *) packet->buf); 7366765d0aaSVasanthakumar Thiagarajan } 7376765d0aaSVasanthakumar Thiagarajan 7386765d0aaSVasanthakumar Thiagarajan vif = ath6kl_get_vif_by_index(ar, if_idx); 7396765d0aaSVasanthakumar Thiagarajan if (!vif) { 7406765d0aaSVasanthakumar Thiagarajan ath6kl_free_cookie(ar, ath6kl_cookie); 7416765d0aaSVasanthakumar Thiagarajan continue; 7426765d0aaSVasanthakumar Thiagarajan } 7436765d0aaSVasanthakumar Thiagarajan 744bdcd8170SKalle Valo if (status) { 745bdcd8170SKalle Valo if (status == -ECANCELED) 746bdcd8170SKalle Valo /* a packet was flushed */ 747990bd915SVasanthakumar Thiagarajan flushing[if_idx] = true; 748bdcd8170SKalle Valo 749b95907a7SVasanthakumar Thiagarajan vif->net_stats.tx_errors++; 750bdcd8170SKalle Valo 751778e6502SKalle Valo if (status != -ENOSPC && status != -ECANCELED) 752778e6502SKalle Valo ath6kl_warn("tx complete error: %d\n", status); 753778e6502SKalle Valo 754bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_WLAN_TX, 755bdcd8170SKalle Valo "%s: skb=0x%p data=0x%p len=0x%x eid=%d %s\n", 756bdcd8170SKalle Valo __func__, skb, packet->buf, packet->act_len, 757bdcd8170SKalle Valo eid, "error!"); 758bdcd8170SKalle Valo } else { 759bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_WLAN_TX, 760bdcd8170SKalle Valo "%s: skb=0x%p data=0x%p len=0x%x eid=%d %s\n", 761bdcd8170SKalle Valo __func__, skb, packet->buf, packet->act_len, 762bdcd8170SKalle Valo eid, "OK"); 763bdcd8170SKalle Valo 764990bd915SVasanthakumar Thiagarajan flushing[if_idx] = false; 765b95907a7SVasanthakumar Thiagarajan vif->net_stats.tx_packets++; 766b95907a7SVasanthakumar Thiagarajan vif->net_stats.tx_bytes += skb->len; 767bdcd8170SKalle Valo } 768bdcd8170SKalle Valo 769990bd915SVasanthakumar Thiagarajan ath6kl_tx_clear_node_map(vif, eid, map_no); 770bdcd8170SKalle Valo 771bdcd8170SKalle Valo ath6kl_free_cookie(ar, ath6kl_cookie); 772bdcd8170SKalle Valo 77359c98449SVasanthakumar Thiagarajan if (test_bit(NETQ_STOPPED, &vif->flags)) 77459c98449SVasanthakumar Thiagarajan clear_bit(NETQ_STOPPED, &vif->flags); 775bdcd8170SKalle Valo } 776bdcd8170SKalle Valo 777bdcd8170SKalle Valo spin_unlock_bh(&ar->lock); 778bdcd8170SKalle Valo 779bdcd8170SKalle Valo __skb_queue_purge(&skb_queue); 780bdcd8170SKalle Valo 781990bd915SVasanthakumar Thiagarajan /* FIXME: Locking */ 78211f6e40dSVasanthakumar Thiagarajan spin_lock_bh(&ar->list_lock); 783990bd915SVasanthakumar Thiagarajan list_for_each_entry(vif, &ar->vif_list, list) { 784990bd915SVasanthakumar Thiagarajan if (test_bit(CONNECTED, &vif->flags) && 785990bd915SVasanthakumar Thiagarajan !flushing[vif->fw_vif_idx]) { 78611f6e40dSVasanthakumar Thiagarajan spin_unlock_bh(&ar->list_lock); 78728ae58ddSVasanthakumar Thiagarajan netif_wake_queue(vif->ndev); 78811f6e40dSVasanthakumar Thiagarajan spin_lock_bh(&ar->list_lock); 789bdcd8170SKalle Valo } 790990bd915SVasanthakumar Thiagarajan } 79111f6e40dSVasanthakumar Thiagarajan spin_unlock_bh(&ar->list_lock); 792bdcd8170SKalle Valo 793bdcd8170SKalle Valo if (wake_event) 794bdcd8170SKalle Valo wake_up(&ar->event_wq); 795bdcd8170SKalle Valo 796bdcd8170SKalle Valo return; 797bdcd8170SKalle Valo 798bdcd8170SKalle Valo fatal: 799bdcd8170SKalle Valo WARN_ON(1); 800bdcd8170SKalle Valo spin_unlock_bh(&ar->lock); 801bdcd8170SKalle Valo return; 802bdcd8170SKalle Valo } 803bdcd8170SKalle Valo 804bdcd8170SKalle Valo void ath6kl_tx_data_cleanup(struct ath6kl *ar) 805bdcd8170SKalle Valo { 806bdcd8170SKalle Valo int i; 807bdcd8170SKalle Valo 808bdcd8170SKalle Valo /* flush all the data (non-control) streams */ 809bdcd8170SKalle Valo for (i = 0; i < WMM_NUM_AC; i++) 810ad226ec2SKalle Valo ath6kl_htc_flush_txep(ar->htc_target, ar->ac2ep_map[i], 811bdcd8170SKalle Valo ATH6KL_DATA_PKT_TAG); 812bdcd8170SKalle Valo } 813bdcd8170SKalle Valo 814bdcd8170SKalle Valo /* Rx functions */ 815bdcd8170SKalle Valo 816bdcd8170SKalle Valo static void ath6kl_deliver_frames_to_nw_stack(struct net_device *dev, 817bdcd8170SKalle Valo struct sk_buff *skb) 818bdcd8170SKalle Valo { 819bdcd8170SKalle Valo if (!skb) 820bdcd8170SKalle Valo return; 821bdcd8170SKalle Valo 822bdcd8170SKalle Valo skb->dev = dev; 823bdcd8170SKalle Valo 824bdcd8170SKalle Valo if (!(skb->dev->flags & IFF_UP)) { 825bdcd8170SKalle Valo dev_kfree_skb(skb); 826bdcd8170SKalle Valo return; 827bdcd8170SKalle Valo } 828bdcd8170SKalle Valo 829bdcd8170SKalle Valo skb->protocol = eth_type_trans(skb, skb->dev); 830bdcd8170SKalle Valo 831bdcd8170SKalle Valo netif_rx_ni(skb); 832bdcd8170SKalle Valo } 833bdcd8170SKalle Valo 834bdcd8170SKalle Valo static void ath6kl_alloc_netbufs(struct sk_buff_head *q, u16 num) 835bdcd8170SKalle Valo { 836bdcd8170SKalle Valo struct sk_buff *skb; 837bdcd8170SKalle Valo 838bdcd8170SKalle Valo while (num) { 839bdcd8170SKalle Valo skb = ath6kl_buf_alloc(ATH6KL_BUFFER_SIZE); 840bdcd8170SKalle Valo if (!skb) { 841bdcd8170SKalle Valo ath6kl_err("netbuf allocation failed\n"); 842bdcd8170SKalle Valo return; 843bdcd8170SKalle Valo } 844bdcd8170SKalle Valo skb_queue_tail(q, skb); 845bdcd8170SKalle Valo num--; 846bdcd8170SKalle Valo } 847bdcd8170SKalle Valo } 848bdcd8170SKalle Valo 849bdcd8170SKalle Valo static struct sk_buff *aggr_get_free_skb(struct aggr_info *p_aggr) 850bdcd8170SKalle Valo { 851bdcd8170SKalle Valo struct sk_buff *skb = NULL; 852bdcd8170SKalle Valo 8537baef812SVasanthakumar Thiagarajan if (skb_queue_len(&p_aggr->rx_amsdu_freeq) < 8547baef812SVasanthakumar Thiagarajan (AGGR_NUM_OF_FREE_NETBUFS >> 2)) 8557baef812SVasanthakumar Thiagarajan ath6kl_alloc_netbufs(&p_aggr->rx_amsdu_freeq, 8567baef812SVasanthakumar Thiagarajan AGGR_NUM_OF_FREE_NETBUFS); 857bdcd8170SKalle Valo 8587baef812SVasanthakumar Thiagarajan skb = skb_dequeue(&p_aggr->rx_amsdu_freeq); 859bdcd8170SKalle Valo 860bdcd8170SKalle Valo return skb; 861bdcd8170SKalle Valo } 862bdcd8170SKalle Valo 863bdcd8170SKalle Valo void ath6kl_rx_refill(struct htc_target *target, enum htc_endpoint_id endpoint) 864bdcd8170SKalle Valo { 865bdcd8170SKalle Valo struct ath6kl *ar = target->dev->ar; 866bdcd8170SKalle Valo struct sk_buff *skb; 867bdcd8170SKalle Valo int rx_buf; 868bdcd8170SKalle Valo int n_buf_refill; 869bdcd8170SKalle Valo struct htc_packet *packet; 870bdcd8170SKalle Valo struct list_head queue; 871bdcd8170SKalle Valo 872bdcd8170SKalle Valo n_buf_refill = ATH6KL_MAX_RX_BUFFERS - 873ad226ec2SKalle Valo ath6kl_htc_get_rxbuf_num(ar->htc_target, endpoint); 874bdcd8170SKalle Valo 875bdcd8170SKalle Valo if (n_buf_refill <= 0) 876bdcd8170SKalle Valo return; 877bdcd8170SKalle Valo 878bdcd8170SKalle Valo INIT_LIST_HEAD(&queue); 879bdcd8170SKalle Valo 880bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_WLAN_RX, 881bdcd8170SKalle Valo "%s: providing htc with %d buffers at eid=%d\n", 882bdcd8170SKalle Valo __func__, n_buf_refill, endpoint); 883bdcd8170SKalle Valo 884bdcd8170SKalle Valo for (rx_buf = 0; rx_buf < n_buf_refill; rx_buf++) { 885bdcd8170SKalle Valo skb = ath6kl_buf_alloc(ATH6KL_BUFFER_SIZE); 886bdcd8170SKalle Valo if (!skb) 887bdcd8170SKalle Valo break; 888bdcd8170SKalle Valo 889bdcd8170SKalle Valo packet = (struct htc_packet *) skb->head; 89094e532d1SVasanthakumar Thiagarajan if (!IS_ALIGNED((unsigned long) skb->data, 4)) 8911df94a85SVasanthakumar Thiagarajan skb->data = PTR_ALIGN(skb->data - 4, 4); 892bdcd8170SKalle Valo set_htc_rxpkt_info(packet, skb, skb->data, 893bdcd8170SKalle Valo ATH6KL_BUFFER_SIZE, endpoint); 894cfc10f24SKalle Valo packet->skb = skb; 895bdcd8170SKalle Valo list_add_tail(&packet->list, &queue); 896bdcd8170SKalle Valo } 897bdcd8170SKalle Valo 898bdcd8170SKalle Valo if (!list_empty(&queue)) 899ad226ec2SKalle Valo ath6kl_htc_add_rxbuf_multiple(ar->htc_target, &queue); 900bdcd8170SKalle Valo } 901bdcd8170SKalle Valo 902bdcd8170SKalle Valo void ath6kl_refill_amsdu_rxbufs(struct ath6kl *ar, int count) 903bdcd8170SKalle Valo { 904bdcd8170SKalle Valo struct htc_packet *packet; 905bdcd8170SKalle Valo struct sk_buff *skb; 906bdcd8170SKalle Valo 907bdcd8170SKalle Valo while (count) { 908bdcd8170SKalle Valo skb = ath6kl_buf_alloc(ATH6KL_AMSDU_BUFFER_SIZE); 909bdcd8170SKalle Valo if (!skb) 910bdcd8170SKalle Valo return; 911bdcd8170SKalle Valo 912bdcd8170SKalle Valo packet = (struct htc_packet *) skb->head; 91394e532d1SVasanthakumar Thiagarajan if (!IS_ALIGNED((unsigned long) skb->data, 4)) 9141df94a85SVasanthakumar Thiagarajan skb->data = PTR_ALIGN(skb->data - 4, 4); 915bdcd8170SKalle Valo set_htc_rxpkt_info(packet, skb, skb->data, 916bdcd8170SKalle Valo ATH6KL_AMSDU_BUFFER_SIZE, 0); 917cfc10f24SKalle Valo packet->skb = skb; 918cfc10f24SKalle Valo 919bdcd8170SKalle Valo spin_lock_bh(&ar->lock); 920bdcd8170SKalle Valo list_add_tail(&packet->list, &ar->amsdu_rx_buffer_queue); 921bdcd8170SKalle Valo spin_unlock_bh(&ar->lock); 922bdcd8170SKalle Valo count--; 923bdcd8170SKalle Valo } 924bdcd8170SKalle Valo } 925bdcd8170SKalle Valo 926bdcd8170SKalle Valo /* 927bdcd8170SKalle Valo * Callback to allocate a receive buffer for a pending packet. We use a 928bdcd8170SKalle Valo * pre-allocated list of buffers of maximum AMSDU size (4K). 929bdcd8170SKalle Valo */ 930bdcd8170SKalle Valo struct htc_packet *ath6kl_alloc_amsdu_rxbuf(struct htc_target *target, 931bdcd8170SKalle Valo enum htc_endpoint_id endpoint, 932bdcd8170SKalle Valo int len) 933bdcd8170SKalle Valo { 934bdcd8170SKalle Valo struct ath6kl *ar = target->dev->ar; 935bdcd8170SKalle Valo struct htc_packet *packet = NULL; 936bdcd8170SKalle Valo struct list_head *pkt_pos; 937bdcd8170SKalle Valo int refill_cnt = 0, depth = 0; 938bdcd8170SKalle Valo 939bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_WLAN_RX, "%s: eid=%d, len:%d\n", 940bdcd8170SKalle Valo __func__, endpoint, len); 941bdcd8170SKalle Valo 942bdcd8170SKalle Valo if ((len <= ATH6KL_BUFFER_SIZE) || 943bdcd8170SKalle Valo (len > ATH6KL_AMSDU_BUFFER_SIZE)) 944bdcd8170SKalle Valo return NULL; 945bdcd8170SKalle Valo 946bdcd8170SKalle Valo spin_lock_bh(&ar->lock); 947bdcd8170SKalle Valo 948bdcd8170SKalle Valo if (list_empty(&ar->amsdu_rx_buffer_queue)) { 949bdcd8170SKalle Valo spin_unlock_bh(&ar->lock); 950bdcd8170SKalle Valo refill_cnt = ATH6KL_MAX_AMSDU_RX_BUFFERS; 951bdcd8170SKalle Valo goto refill_buf; 952bdcd8170SKalle Valo } 953bdcd8170SKalle Valo 954bdcd8170SKalle Valo packet = list_first_entry(&ar->amsdu_rx_buffer_queue, 955bdcd8170SKalle Valo struct htc_packet, list); 956bdcd8170SKalle Valo list_del(&packet->list); 957bdcd8170SKalle Valo list_for_each(pkt_pos, &ar->amsdu_rx_buffer_queue) 958bdcd8170SKalle Valo depth++; 959bdcd8170SKalle Valo 960bdcd8170SKalle Valo refill_cnt = ATH6KL_MAX_AMSDU_RX_BUFFERS - depth; 961bdcd8170SKalle Valo spin_unlock_bh(&ar->lock); 962bdcd8170SKalle Valo 963bdcd8170SKalle Valo /* set actual endpoint ID */ 964bdcd8170SKalle Valo packet->endpoint = endpoint; 965bdcd8170SKalle Valo 966bdcd8170SKalle Valo refill_buf: 967bdcd8170SKalle Valo if (refill_cnt >= ATH6KL_AMSDU_REFILL_THRESHOLD) 968bdcd8170SKalle Valo ath6kl_refill_amsdu_rxbufs(ar, refill_cnt); 969bdcd8170SKalle Valo 970bdcd8170SKalle Valo return packet; 971bdcd8170SKalle Valo } 972bdcd8170SKalle Valo 973bdcd8170SKalle Valo static void aggr_slice_amsdu(struct aggr_info *p_aggr, 974bdcd8170SKalle Valo struct rxtid *rxtid, struct sk_buff *skb) 975bdcd8170SKalle Valo { 976bdcd8170SKalle Valo struct sk_buff *new_skb; 977bdcd8170SKalle Valo struct ethhdr *hdr; 978bdcd8170SKalle Valo u16 frame_8023_len, payload_8023_len, mac_hdr_len, amsdu_len; 979bdcd8170SKalle Valo u8 *framep; 980bdcd8170SKalle Valo 981bdcd8170SKalle Valo mac_hdr_len = sizeof(struct ethhdr); 982bdcd8170SKalle Valo framep = skb->data + mac_hdr_len; 983bdcd8170SKalle Valo amsdu_len = skb->len - mac_hdr_len; 984bdcd8170SKalle Valo 985bdcd8170SKalle Valo while (amsdu_len > mac_hdr_len) { 986bdcd8170SKalle Valo hdr = (struct ethhdr *) framep; 987bdcd8170SKalle Valo payload_8023_len = ntohs(hdr->h_proto); 988bdcd8170SKalle Valo 989bdcd8170SKalle Valo if (payload_8023_len < MIN_MSDU_SUBFRAME_PAYLOAD_LEN || 990bdcd8170SKalle Valo payload_8023_len > MAX_MSDU_SUBFRAME_PAYLOAD_LEN) { 991bdcd8170SKalle Valo ath6kl_err("802.3 AMSDU frame bound check failed. len %d\n", 992bdcd8170SKalle Valo payload_8023_len); 993bdcd8170SKalle Valo break; 994bdcd8170SKalle Valo } 995bdcd8170SKalle Valo 996bdcd8170SKalle Valo frame_8023_len = payload_8023_len + mac_hdr_len; 997bdcd8170SKalle Valo new_skb = aggr_get_free_skb(p_aggr); 998bdcd8170SKalle Valo if (!new_skb) { 999bdcd8170SKalle Valo ath6kl_err("no buffer available\n"); 1000bdcd8170SKalle Valo break; 1001bdcd8170SKalle Valo } 1002bdcd8170SKalle Valo 1003bdcd8170SKalle Valo memcpy(new_skb->data, framep, frame_8023_len); 1004bdcd8170SKalle Valo skb_put(new_skb, frame_8023_len); 1005bdcd8170SKalle Valo if (ath6kl_wmi_dot3_2_dix(new_skb)) { 1006bdcd8170SKalle Valo ath6kl_err("dot3_2_dix error\n"); 1007bdcd8170SKalle Valo dev_kfree_skb(new_skb); 1008bdcd8170SKalle Valo break; 1009bdcd8170SKalle Valo } 1010bdcd8170SKalle Valo 1011bdcd8170SKalle Valo skb_queue_tail(&rxtid->q, new_skb); 1012bdcd8170SKalle Valo 1013bdcd8170SKalle Valo /* Is this the last subframe within this aggregate ? */ 1014bdcd8170SKalle Valo if ((amsdu_len - frame_8023_len) == 0) 1015bdcd8170SKalle Valo break; 1016bdcd8170SKalle Valo 1017bdcd8170SKalle Valo /* Add the length of A-MSDU subframe padding bytes - 1018bdcd8170SKalle Valo * Round to nearest word. 1019bdcd8170SKalle Valo */ 102013e34ea1SVasanthakumar Thiagarajan frame_8023_len = ALIGN(frame_8023_len, 4); 1021bdcd8170SKalle Valo 1022bdcd8170SKalle Valo framep += frame_8023_len; 1023bdcd8170SKalle Valo amsdu_len -= frame_8023_len; 1024bdcd8170SKalle Valo } 1025bdcd8170SKalle Valo 1026bdcd8170SKalle Valo dev_kfree_skb(skb); 1027bdcd8170SKalle Valo } 1028bdcd8170SKalle Valo 10291d2a4456SVasanthakumar Thiagarajan static void aggr_deque_frms(struct aggr_info_conn *agg_conn, u8 tid, 1030bdcd8170SKalle Valo u16 seq_no, u8 order) 1031bdcd8170SKalle Valo { 1032bdcd8170SKalle Valo struct sk_buff *skb; 1033bdcd8170SKalle Valo struct rxtid *rxtid; 1034bdcd8170SKalle Valo struct skb_hold_q *node; 1035bdcd8170SKalle Valo u16 idx, idx_end, seq_end; 1036bdcd8170SKalle Valo struct rxtid_stats *stats; 1037bdcd8170SKalle Valo 10387baef812SVasanthakumar Thiagarajan rxtid = &agg_conn->rx_tid[tid]; 10397baef812SVasanthakumar Thiagarajan stats = &agg_conn->stat[tid]; 1040bdcd8170SKalle Valo 1041bdcd8170SKalle Valo idx = AGGR_WIN_IDX(rxtid->seq_next, rxtid->hold_q_sz); 1042bdcd8170SKalle Valo 1043bdcd8170SKalle Valo /* 1044bdcd8170SKalle Valo * idx_end is typically the last possible frame in the window, 1045bdcd8170SKalle Valo * but changes to 'the' seq_no, when BAR comes. If seq_no 1046bdcd8170SKalle Valo * is non-zero, we will go up to that and stop. 1047bdcd8170SKalle Valo * Note: last seq no in current window will occupy the same 1048bdcd8170SKalle Valo * index position as index that is just previous to start. 1049bdcd8170SKalle Valo * An imp point : if win_sz is 7, for seq_no space of 4095, 1050bdcd8170SKalle Valo * then, there would be holes when sequence wrap around occurs. 1051bdcd8170SKalle Valo * Target should judiciously choose the win_sz, based on 1052bdcd8170SKalle Valo * this condition. For 4095, (TID_WINDOW_SZ = 2 x win_sz 1053bdcd8170SKalle Valo * 2, 4, 8, 16 win_sz works fine). 1054bdcd8170SKalle Valo * We must deque from "idx" to "idx_end", including both. 1055bdcd8170SKalle Valo */ 1056bdcd8170SKalle Valo seq_end = seq_no ? seq_no : rxtid->seq_next; 1057bdcd8170SKalle Valo idx_end = AGGR_WIN_IDX(seq_end, rxtid->hold_q_sz); 1058bdcd8170SKalle Valo 1059bdcd8170SKalle Valo spin_lock_bh(&rxtid->lock); 1060bdcd8170SKalle Valo 1061bdcd8170SKalle Valo do { 1062bdcd8170SKalle Valo node = &rxtid->hold_q[idx]; 1063bdcd8170SKalle Valo if ((order == 1) && (!node->skb)) 1064bdcd8170SKalle Valo break; 1065bdcd8170SKalle Valo 1066bdcd8170SKalle Valo if (node->skb) { 1067bdcd8170SKalle Valo if (node->is_amsdu) 10681d2a4456SVasanthakumar Thiagarajan aggr_slice_amsdu(agg_conn->aggr_info, rxtid, 10691d2a4456SVasanthakumar Thiagarajan node->skb); 1070bdcd8170SKalle Valo else 1071bdcd8170SKalle Valo skb_queue_tail(&rxtid->q, node->skb); 1072bdcd8170SKalle Valo node->skb = NULL; 1073bdcd8170SKalle Valo } else 1074bdcd8170SKalle Valo stats->num_hole++; 1075bdcd8170SKalle Valo 1076bdcd8170SKalle Valo rxtid->seq_next = ATH6KL_NEXT_SEQ_NO(rxtid->seq_next); 1077bdcd8170SKalle Valo idx = AGGR_WIN_IDX(rxtid->seq_next, rxtid->hold_q_sz); 1078bdcd8170SKalle Valo } while (idx != idx_end); 1079bdcd8170SKalle Valo 1080bdcd8170SKalle Valo spin_unlock_bh(&rxtid->lock); 1081bdcd8170SKalle Valo 1082bdcd8170SKalle Valo stats->num_delivered += skb_queue_len(&rxtid->q); 1083bdcd8170SKalle Valo 1084bdcd8170SKalle Valo while ((skb = skb_dequeue(&rxtid->q))) 10857baef812SVasanthakumar Thiagarajan ath6kl_deliver_frames_to_nw_stack(agg_conn->dev, skb); 1086bdcd8170SKalle Valo } 1087bdcd8170SKalle Valo 10881d2a4456SVasanthakumar Thiagarajan static bool aggr_process_recv_frm(struct aggr_info_conn *agg_conn, u8 tid, 1089bdcd8170SKalle Valo u16 seq_no, 1090bdcd8170SKalle Valo bool is_amsdu, struct sk_buff *frame) 1091bdcd8170SKalle Valo { 1092bdcd8170SKalle Valo struct rxtid *rxtid; 1093bdcd8170SKalle Valo struct rxtid_stats *stats; 1094bdcd8170SKalle Valo struct sk_buff *skb; 1095bdcd8170SKalle Valo struct skb_hold_q *node; 1096bdcd8170SKalle Valo u16 idx, st, cur, end; 1097bdcd8170SKalle Valo bool is_queued = false; 1098bdcd8170SKalle Valo u16 extended_end; 1099bdcd8170SKalle Valo 11007baef812SVasanthakumar Thiagarajan rxtid = &agg_conn->rx_tid[tid]; 11017baef812SVasanthakumar Thiagarajan stats = &agg_conn->stat[tid]; 1102bdcd8170SKalle Valo 1103bdcd8170SKalle Valo stats->num_into_aggr++; 1104bdcd8170SKalle Valo 1105bdcd8170SKalle Valo if (!rxtid->aggr) { 1106bdcd8170SKalle Valo if (is_amsdu) { 11071d2a4456SVasanthakumar Thiagarajan aggr_slice_amsdu(agg_conn->aggr_info, rxtid, frame); 1108bdcd8170SKalle Valo is_queued = true; 1109bdcd8170SKalle Valo stats->num_amsdu++; 1110bdcd8170SKalle Valo while ((skb = skb_dequeue(&rxtid->q))) 11117baef812SVasanthakumar Thiagarajan ath6kl_deliver_frames_to_nw_stack(agg_conn->dev, 1112bdcd8170SKalle Valo skb); 1113bdcd8170SKalle Valo } 1114bdcd8170SKalle Valo return is_queued; 1115bdcd8170SKalle Valo } 1116bdcd8170SKalle Valo 1117bdcd8170SKalle Valo /* Check the incoming sequence no, if it's in the window */ 1118bdcd8170SKalle Valo st = rxtid->seq_next; 1119bdcd8170SKalle Valo cur = seq_no; 1120bdcd8170SKalle Valo end = (st + rxtid->hold_q_sz-1) & ATH6KL_MAX_SEQ_NO; 1121bdcd8170SKalle Valo 1122bdcd8170SKalle Valo if (((st < end) && (cur < st || cur > end)) || 1123bdcd8170SKalle Valo ((st > end) && (cur > end) && (cur < st))) { 1124bdcd8170SKalle Valo extended_end = (end + rxtid->hold_q_sz - 1) & 1125bdcd8170SKalle Valo ATH6KL_MAX_SEQ_NO; 1126bdcd8170SKalle Valo 1127bdcd8170SKalle Valo if (((end < extended_end) && 1128bdcd8170SKalle Valo (cur < end || cur > extended_end)) || 1129bdcd8170SKalle Valo ((end > extended_end) && (cur > extended_end) && 1130bdcd8170SKalle Valo (cur < end))) { 11311d2a4456SVasanthakumar Thiagarajan aggr_deque_frms(agg_conn, tid, 0, 0); 1132bdcd8170SKalle Valo if (cur >= rxtid->hold_q_sz - 1) 1133bdcd8170SKalle Valo rxtid->seq_next = cur - (rxtid->hold_q_sz - 1); 1134bdcd8170SKalle Valo else 1135bdcd8170SKalle Valo rxtid->seq_next = ATH6KL_MAX_SEQ_NO - 1136bdcd8170SKalle Valo (rxtid->hold_q_sz - 2 - cur); 1137bdcd8170SKalle Valo } else { 1138bdcd8170SKalle Valo /* 1139bdcd8170SKalle Valo * Dequeue only those frames that are outside the 1140bdcd8170SKalle Valo * new shifted window. 1141bdcd8170SKalle Valo */ 1142bdcd8170SKalle Valo if (cur >= rxtid->hold_q_sz - 1) 1143bdcd8170SKalle Valo st = cur - (rxtid->hold_q_sz - 1); 1144bdcd8170SKalle Valo else 1145bdcd8170SKalle Valo st = ATH6KL_MAX_SEQ_NO - 1146bdcd8170SKalle Valo (rxtid->hold_q_sz - 2 - cur); 1147bdcd8170SKalle Valo 11481d2a4456SVasanthakumar Thiagarajan aggr_deque_frms(agg_conn, tid, st, 0); 1149bdcd8170SKalle Valo } 1150bdcd8170SKalle Valo 1151bdcd8170SKalle Valo stats->num_oow++; 1152bdcd8170SKalle Valo } 1153bdcd8170SKalle Valo 1154bdcd8170SKalle Valo idx = AGGR_WIN_IDX(seq_no, rxtid->hold_q_sz); 1155bdcd8170SKalle Valo 1156bdcd8170SKalle Valo node = &rxtid->hold_q[idx]; 1157bdcd8170SKalle Valo 1158bdcd8170SKalle Valo spin_lock_bh(&rxtid->lock); 1159bdcd8170SKalle Valo 1160bdcd8170SKalle Valo /* 1161bdcd8170SKalle Valo * Is the cur frame duplicate or something beyond our window(hold_q 1162bdcd8170SKalle Valo * -> which is 2x, already)? 1163bdcd8170SKalle Valo * 1164bdcd8170SKalle Valo * 1. Duplicate is easy - drop incoming frame. 1165bdcd8170SKalle Valo * 2. Not falling in current sliding window. 1166bdcd8170SKalle Valo * 2a. is the frame_seq_no preceding current tid_seq_no? 1167bdcd8170SKalle Valo * -> drop the frame. perhaps sender did not get our ACK. 1168bdcd8170SKalle Valo * this is taken care of above. 1169bdcd8170SKalle Valo * 2b. is the frame_seq_no beyond window(st, TID_WINDOW_SZ); 1170bdcd8170SKalle Valo * -> Taken care of it above, by moving window forward. 1171bdcd8170SKalle Valo */ 1172bdcd8170SKalle Valo dev_kfree_skb(node->skb); 1173bdcd8170SKalle Valo stats->num_dups++; 1174bdcd8170SKalle Valo 1175bdcd8170SKalle Valo node->skb = frame; 1176bdcd8170SKalle Valo is_queued = true; 1177bdcd8170SKalle Valo node->is_amsdu = is_amsdu; 1178bdcd8170SKalle Valo node->seq_no = seq_no; 1179bdcd8170SKalle Valo 1180bdcd8170SKalle Valo if (node->is_amsdu) 1181bdcd8170SKalle Valo stats->num_amsdu++; 1182bdcd8170SKalle Valo else 1183bdcd8170SKalle Valo stats->num_mpdu++; 1184bdcd8170SKalle Valo 1185bdcd8170SKalle Valo spin_unlock_bh(&rxtid->lock); 1186bdcd8170SKalle Valo 11871d2a4456SVasanthakumar Thiagarajan aggr_deque_frms(agg_conn, tid, 0, 1); 1188bdcd8170SKalle Valo 11897baef812SVasanthakumar Thiagarajan if (agg_conn->timer_scheduled) 1190bdcd8170SKalle Valo rxtid->progress = true; 1191bdcd8170SKalle Valo else 1192bdcd8170SKalle Valo for (idx = 0 ; idx < rxtid->hold_q_sz; idx++) { 1193bdcd8170SKalle Valo if (rxtid->hold_q[idx].skb) { 1194bdcd8170SKalle Valo /* 1195bdcd8170SKalle Valo * There is a frame in the queue and no 1196bdcd8170SKalle Valo * timer so start a timer to ensure that 1197bdcd8170SKalle Valo * the frame doesn't remain stuck 1198bdcd8170SKalle Valo * forever. 1199bdcd8170SKalle Valo */ 12007baef812SVasanthakumar Thiagarajan agg_conn->timer_scheduled = true; 12017baef812SVasanthakumar Thiagarajan mod_timer(&agg_conn->timer, 1202bdcd8170SKalle Valo (jiffies + 1203bdcd8170SKalle Valo HZ * (AGGR_RX_TIMEOUT) / 1000)); 1204bdcd8170SKalle Valo rxtid->progress = false; 1205bdcd8170SKalle Valo rxtid->timer_mon = true; 1206bdcd8170SKalle Valo break; 1207bdcd8170SKalle Valo } 1208bdcd8170SKalle Valo } 1209bdcd8170SKalle Valo 1210bdcd8170SKalle Valo return is_queued; 1211bdcd8170SKalle Valo } 1212bdcd8170SKalle Valo 1213c1762a3fSThirumalai Pachamuthu static void ath6kl_uapsd_trigger_frame_rx(struct ath6kl_vif *vif, 1214c1762a3fSThirumalai Pachamuthu struct ath6kl_sta *conn) 1215c1762a3fSThirumalai Pachamuthu { 1216c1762a3fSThirumalai Pachamuthu struct ath6kl *ar = vif->ar; 1217c1762a3fSThirumalai Pachamuthu bool is_apsdq_empty, is_apsdq_empty_at_start; 1218c1762a3fSThirumalai Pachamuthu u32 num_frames_to_deliver, flags; 1219c1762a3fSThirumalai Pachamuthu struct sk_buff *skb = NULL; 1220c1762a3fSThirumalai Pachamuthu 1221c1762a3fSThirumalai Pachamuthu /* 1222c1762a3fSThirumalai Pachamuthu * If the APSD q for this STA is not empty, dequeue and 1223c1762a3fSThirumalai Pachamuthu * send a pkt from the head of the q. Also update the 1224c1762a3fSThirumalai Pachamuthu * More data bit in the WMI_DATA_HDR if there are 1225c1762a3fSThirumalai Pachamuthu * more pkts for this STA in the APSD q. 1226c1762a3fSThirumalai Pachamuthu * If there are no more pkts for this STA, 1227c1762a3fSThirumalai Pachamuthu * update the APSD bitmap for this STA. 1228c1762a3fSThirumalai Pachamuthu */ 1229c1762a3fSThirumalai Pachamuthu 1230c1762a3fSThirumalai Pachamuthu num_frames_to_deliver = (conn->apsd_info >> ATH6KL_APSD_NUM_OF_AC) & 1231c1762a3fSThirumalai Pachamuthu ATH6KL_APSD_FRAME_MASK; 1232c1762a3fSThirumalai Pachamuthu /* 1233c1762a3fSThirumalai Pachamuthu * Number of frames to send in a service period is 1234c1762a3fSThirumalai Pachamuthu * indicated by the station 1235c1762a3fSThirumalai Pachamuthu * in the QOS_INFO of the association request 1236c1762a3fSThirumalai Pachamuthu * If it is zero, send all frames 1237c1762a3fSThirumalai Pachamuthu */ 1238c1762a3fSThirumalai Pachamuthu if (!num_frames_to_deliver) 1239c1762a3fSThirumalai Pachamuthu num_frames_to_deliver = ATH6KL_APSD_ALL_FRAME; 1240c1762a3fSThirumalai Pachamuthu 1241c1762a3fSThirumalai Pachamuthu spin_lock_bh(&conn->psq_lock); 1242c1762a3fSThirumalai Pachamuthu is_apsdq_empty = skb_queue_empty(&conn->apsdq); 1243c1762a3fSThirumalai Pachamuthu spin_unlock_bh(&conn->psq_lock); 1244c1762a3fSThirumalai Pachamuthu is_apsdq_empty_at_start = is_apsdq_empty; 1245c1762a3fSThirumalai Pachamuthu 1246c1762a3fSThirumalai Pachamuthu while ((!is_apsdq_empty) && (num_frames_to_deliver)) { 1247c1762a3fSThirumalai Pachamuthu 1248c1762a3fSThirumalai Pachamuthu spin_lock_bh(&conn->psq_lock); 1249c1762a3fSThirumalai Pachamuthu skb = skb_dequeue(&conn->apsdq); 1250c1762a3fSThirumalai Pachamuthu is_apsdq_empty = skb_queue_empty(&conn->apsdq); 1251c1762a3fSThirumalai Pachamuthu spin_unlock_bh(&conn->psq_lock); 1252c1762a3fSThirumalai Pachamuthu 1253c1762a3fSThirumalai Pachamuthu /* 1254c1762a3fSThirumalai Pachamuthu * Set the STA flag to Trigger delivery, 1255c1762a3fSThirumalai Pachamuthu * so that the frame will go out 1256c1762a3fSThirumalai Pachamuthu */ 1257c1762a3fSThirumalai Pachamuthu conn->sta_flags |= STA_PS_APSD_TRIGGER; 1258c1762a3fSThirumalai Pachamuthu num_frames_to_deliver--; 1259c1762a3fSThirumalai Pachamuthu 1260c1762a3fSThirumalai Pachamuthu /* Last frame in the service period, set EOSP or queue empty */ 1261c1762a3fSThirumalai Pachamuthu if ((is_apsdq_empty) || (!num_frames_to_deliver)) 1262c1762a3fSThirumalai Pachamuthu conn->sta_flags |= STA_PS_APSD_EOSP; 1263c1762a3fSThirumalai Pachamuthu 1264c1762a3fSThirumalai Pachamuthu ath6kl_data_tx(skb, vif->ndev); 1265c1762a3fSThirumalai Pachamuthu conn->sta_flags &= ~(STA_PS_APSD_TRIGGER); 1266c1762a3fSThirumalai Pachamuthu conn->sta_flags &= ~(STA_PS_APSD_EOSP); 1267c1762a3fSThirumalai Pachamuthu } 1268c1762a3fSThirumalai Pachamuthu 1269c1762a3fSThirumalai Pachamuthu if (is_apsdq_empty) { 1270c1762a3fSThirumalai Pachamuthu if (is_apsdq_empty_at_start) 1271c1762a3fSThirumalai Pachamuthu flags = WMI_AP_APSD_NO_DELIVERY_FRAMES; 1272c1762a3fSThirumalai Pachamuthu else 1273c1762a3fSThirumalai Pachamuthu flags = 0; 1274c1762a3fSThirumalai Pachamuthu 1275c1762a3fSThirumalai Pachamuthu ath6kl_wmi_set_apsd_bfrd_traf(ar->wmi, 1276c1762a3fSThirumalai Pachamuthu vif->fw_vif_idx, 1277c1762a3fSThirumalai Pachamuthu conn->aid, 0, flags); 1278c1762a3fSThirumalai Pachamuthu } 1279c1762a3fSThirumalai Pachamuthu 1280c1762a3fSThirumalai Pachamuthu return; 1281c1762a3fSThirumalai Pachamuthu } 1282c1762a3fSThirumalai Pachamuthu 1283bdcd8170SKalle Valo void ath6kl_rx(struct htc_target *target, struct htc_packet *packet) 1284bdcd8170SKalle Valo { 1285bdcd8170SKalle Valo struct ath6kl *ar = target->dev->ar; 1286bdcd8170SKalle Valo struct sk_buff *skb = packet->pkt_cntxt; 1287bdcd8170SKalle Valo struct wmi_rx_meta_v2 *meta; 1288bdcd8170SKalle Valo struct wmi_data_hdr *dhdr; 1289bdcd8170SKalle Valo int min_hdr_len; 1290bdcd8170SKalle Valo u8 meta_type, dot11_hdr = 0; 12918bd5bca8SKalle Valo u8 pad_before_data_start; 1292bdcd8170SKalle Valo int status = packet->status; 1293bdcd8170SKalle Valo enum htc_endpoint_id ept = packet->endpoint; 1294bdcd8170SKalle Valo bool is_amsdu, prev_ps, ps_state = false; 1295c1762a3fSThirumalai Pachamuthu bool trig_state = false; 1296bdcd8170SKalle Valo struct ath6kl_sta *conn = NULL; 1297bdcd8170SKalle Valo struct sk_buff *skb1 = NULL; 1298bdcd8170SKalle Valo struct ethhdr *datap = NULL; 12996765d0aaSVasanthakumar Thiagarajan struct ath6kl_vif *vif; 13001d2a4456SVasanthakumar Thiagarajan struct aggr_info_conn *aggr_conn; 1301bdcd8170SKalle Valo u16 seq_no, offset; 13026765d0aaSVasanthakumar Thiagarajan u8 tid, if_idx; 1303bdcd8170SKalle Valo 1304bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_WLAN_RX, 1305bdcd8170SKalle Valo "%s: ar=0x%p eid=%d, skb=0x%p, data=0x%p, len=0x%x status:%d", 1306bdcd8170SKalle Valo __func__, ar, ept, skb, packet->buf, 1307bdcd8170SKalle Valo packet->act_len, status); 1308bdcd8170SKalle Valo 1309bdcd8170SKalle Valo if (status || !(skb->data + HTC_HDR_LENGTH)) { 13106765d0aaSVasanthakumar Thiagarajan dev_kfree_skb(skb); 13116765d0aaSVasanthakumar Thiagarajan return; 13126765d0aaSVasanthakumar Thiagarajan } 13136765d0aaSVasanthakumar Thiagarajan 13146765d0aaSVasanthakumar Thiagarajan skb_put(skb, packet->act_len + HTC_HDR_LENGTH); 13156765d0aaSVasanthakumar Thiagarajan skb_pull(skb, HTC_HDR_LENGTH); 13166765d0aaSVasanthakumar Thiagarajan 131781db48dcSVasanthakumar Thiagarajan ath6kl_dbg_dump(ATH6KL_DBG_RAW_BYTES, __func__, "rx ", 131881db48dcSVasanthakumar Thiagarajan skb->data, skb->len); 131981db48dcSVasanthakumar Thiagarajan 13206765d0aaSVasanthakumar Thiagarajan if (ept == ar->ctrl_ep) { 132181db48dcSVasanthakumar Thiagarajan if (test_bit(WMI_ENABLED, &ar->flag)) { 132281db48dcSVasanthakumar Thiagarajan ath6kl_check_wow_status(ar); 132381db48dcSVasanthakumar Thiagarajan ath6kl_wmi_control_rx(ar->wmi, skb); 132481db48dcSVasanthakumar Thiagarajan return; 132581db48dcSVasanthakumar Thiagarajan } 13266765d0aaSVasanthakumar Thiagarajan if_idx = 13276765d0aaSVasanthakumar Thiagarajan wmi_cmd_hdr_get_if_idx((struct wmi_cmd_hdr *) skb->data); 13286765d0aaSVasanthakumar Thiagarajan } else { 13296765d0aaSVasanthakumar Thiagarajan if_idx = 13306765d0aaSVasanthakumar Thiagarajan wmi_data_hdr_get_if_idx((struct wmi_data_hdr *) skb->data); 13316765d0aaSVasanthakumar Thiagarajan } 13326765d0aaSVasanthakumar Thiagarajan 13336765d0aaSVasanthakumar Thiagarajan vif = ath6kl_get_vif_by_index(ar, if_idx); 13346765d0aaSVasanthakumar Thiagarajan if (!vif) { 1335bdcd8170SKalle Valo dev_kfree_skb(skb); 1336bdcd8170SKalle Valo return; 1337bdcd8170SKalle Valo } 1338bdcd8170SKalle Valo 1339bdcd8170SKalle Valo /* 1340bdcd8170SKalle Valo * Take lock to protect buffer counts and adaptive power throughput 1341bdcd8170SKalle Valo * state. 1342bdcd8170SKalle Valo */ 1343478ac027SVasanthakumar Thiagarajan spin_lock_bh(&vif->if_lock); 1344bdcd8170SKalle Valo 1345b95907a7SVasanthakumar Thiagarajan vif->net_stats.rx_packets++; 1346b95907a7SVasanthakumar Thiagarajan vif->net_stats.rx_bytes += packet->act_len; 1347bdcd8170SKalle Valo 1348478ac027SVasanthakumar Thiagarajan spin_unlock_bh(&vif->if_lock); 134983dc5f2fSVasanthakumar Thiagarajan 135028ae58ddSVasanthakumar Thiagarajan skb->dev = vif->ndev; 1351bdcd8170SKalle Valo 1352bdcd8170SKalle Valo if (!test_bit(WMI_ENABLED, &ar->flag)) { 1353bdcd8170SKalle Valo if (EPPING_ALIGNMENT_PAD > 0) 1354bdcd8170SKalle Valo skb_pull(skb, EPPING_ALIGNMENT_PAD); 135528ae58ddSVasanthakumar Thiagarajan ath6kl_deliver_frames_to_nw_stack(vif->ndev, skb); 1356bdcd8170SKalle Valo return; 1357bdcd8170SKalle Valo } 1358bdcd8170SKalle Valo 1359a918fb3cSRaja Mani ath6kl_check_wow_status(ar); 1360a918fb3cSRaja Mani 136167f9178fSVasanthakumar Thiagarajan min_hdr_len = sizeof(struct ethhdr) + sizeof(struct wmi_data_hdr) + 1362bdcd8170SKalle Valo sizeof(struct ath6kl_llc_snap_hdr); 1363bdcd8170SKalle Valo 1364bdcd8170SKalle Valo dhdr = (struct wmi_data_hdr *) skb->data; 1365bdcd8170SKalle Valo 1366bdcd8170SKalle Valo /* 1367bdcd8170SKalle Valo * In the case of AP mode we may receive NULL data frames 1368bdcd8170SKalle Valo * that do not have LLC hdr. They are 16 bytes in size. 1369bdcd8170SKalle Valo * Allow these frames in the AP mode. 1370bdcd8170SKalle Valo */ 1371f5938f24SVasanthakumar Thiagarajan if (vif->nw_type != AP_NETWORK && 1372bdcd8170SKalle Valo ((packet->act_len < min_hdr_len) || 1373bdcd8170SKalle Valo (packet->act_len > WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH))) { 1374bdcd8170SKalle Valo ath6kl_info("frame len is too short or too long\n"); 1375b95907a7SVasanthakumar Thiagarajan vif->net_stats.rx_errors++; 1376b95907a7SVasanthakumar Thiagarajan vif->net_stats.rx_length_errors++; 1377bdcd8170SKalle Valo dev_kfree_skb(skb); 1378bdcd8170SKalle Valo return; 1379bdcd8170SKalle Valo } 1380bdcd8170SKalle Valo 1381bdcd8170SKalle Valo /* Get the Power save state of the STA */ 1382f5938f24SVasanthakumar Thiagarajan if (vif->nw_type == AP_NETWORK) { 1383bdcd8170SKalle Valo meta_type = wmi_data_hdr_get_meta(dhdr); 1384bdcd8170SKalle Valo 1385bdcd8170SKalle Valo ps_state = !!((dhdr->info >> WMI_DATA_HDR_PS_SHIFT) & 1386bdcd8170SKalle Valo WMI_DATA_HDR_PS_MASK); 1387bdcd8170SKalle Valo 1388bdcd8170SKalle Valo offset = sizeof(struct wmi_data_hdr); 1389c1762a3fSThirumalai Pachamuthu trig_state = !!(le16_to_cpu(dhdr->info3) & WMI_DATA_HDR_TRIG); 1390bdcd8170SKalle Valo 1391bdcd8170SKalle Valo switch (meta_type) { 1392bdcd8170SKalle Valo case 0: 1393bdcd8170SKalle Valo break; 1394bdcd8170SKalle Valo case WMI_META_VERSION_1: 1395bdcd8170SKalle Valo offset += sizeof(struct wmi_rx_meta_v1); 1396bdcd8170SKalle Valo break; 1397bdcd8170SKalle Valo case WMI_META_VERSION_2: 1398bdcd8170SKalle Valo offset += sizeof(struct wmi_rx_meta_v2); 1399bdcd8170SKalle Valo break; 1400bdcd8170SKalle Valo default: 1401bdcd8170SKalle Valo break; 1402bdcd8170SKalle Valo } 1403bdcd8170SKalle Valo 1404bdcd8170SKalle Valo datap = (struct ethhdr *) (skb->data + offset); 14056765d0aaSVasanthakumar Thiagarajan conn = ath6kl_find_sta(vif, datap->h_source); 1406bdcd8170SKalle Valo 1407bdcd8170SKalle Valo if (!conn) { 1408bdcd8170SKalle Valo dev_kfree_skb(skb); 1409bdcd8170SKalle Valo return; 1410bdcd8170SKalle Valo } 1411bdcd8170SKalle Valo 1412bdcd8170SKalle Valo /* 1413bdcd8170SKalle Valo * If there is a change in PS state of the STA, 1414bdcd8170SKalle Valo * take appropriate steps: 1415bdcd8170SKalle Valo * 1416bdcd8170SKalle Valo * 1. If Sleep-->Awake, flush the psq for the STA 1417bdcd8170SKalle Valo * Clear the PVB for the STA. 1418bdcd8170SKalle Valo * 2. If Awake-->Sleep, Starting queueing frames 1419bdcd8170SKalle Valo * the STA. 1420bdcd8170SKalle Valo */ 1421bdcd8170SKalle Valo prev_ps = !!(conn->sta_flags & STA_PS_SLEEP); 1422bdcd8170SKalle Valo 1423bdcd8170SKalle Valo if (ps_state) 1424bdcd8170SKalle Valo conn->sta_flags |= STA_PS_SLEEP; 1425bdcd8170SKalle Valo else 1426bdcd8170SKalle Valo conn->sta_flags &= ~STA_PS_SLEEP; 1427bdcd8170SKalle Valo 1428c1762a3fSThirumalai Pachamuthu /* Accept trigger only when the station is in sleep */ 1429c1762a3fSThirumalai Pachamuthu if ((conn->sta_flags & STA_PS_SLEEP) && trig_state) 1430c1762a3fSThirumalai Pachamuthu ath6kl_uapsd_trigger_frame_rx(vif, conn); 1431c1762a3fSThirumalai Pachamuthu 1432bdcd8170SKalle Valo if (prev_ps ^ !!(conn->sta_flags & STA_PS_SLEEP)) { 1433bdcd8170SKalle Valo if (!(conn->sta_flags & STA_PS_SLEEP)) { 1434bdcd8170SKalle Valo struct sk_buff *skbuff = NULL; 1435c1762a3fSThirumalai Pachamuthu bool is_apsdq_empty; 1436d0ff7383SNaveen Gangadharan struct ath6kl_mgmt_buff *mgmt; 1437d0ff7383SNaveen Gangadharan u8 idx; 1438bdcd8170SKalle Valo 1439bdcd8170SKalle Valo spin_lock_bh(&conn->psq_lock); 1440d0ff7383SNaveen Gangadharan while (conn->mgmt_psq_len > 0) { 1441d0ff7383SNaveen Gangadharan mgmt = list_first_entry( 1442d0ff7383SNaveen Gangadharan &conn->mgmt_psq, 1443d0ff7383SNaveen Gangadharan struct ath6kl_mgmt_buff, 1444d0ff7383SNaveen Gangadharan list); 1445d0ff7383SNaveen Gangadharan list_del(&mgmt->list); 1446d0ff7383SNaveen Gangadharan conn->mgmt_psq_len--; 1447d0ff7383SNaveen Gangadharan spin_unlock_bh(&conn->psq_lock); 1448d0ff7383SNaveen Gangadharan idx = vif->fw_vif_idx; 1449d0ff7383SNaveen Gangadharan 1450d0ff7383SNaveen Gangadharan ath6kl_wmi_send_mgmt_cmd(ar->wmi, 1451d0ff7383SNaveen Gangadharan idx, 1452d0ff7383SNaveen Gangadharan mgmt->id, 1453d0ff7383SNaveen Gangadharan mgmt->freq, 1454d0ff7383SNaveen Gangadharan mgmt->wait, 1455d0ff7383SNaveen Gangadharan mgmt->buf, 1456d0ff7383SNaveen Gangadharan mgmt->len, 1457d0ff7383SNaveen Gangadharan mgmt->no_cck); 1458d0ff7383SNaveen Gangadharan 1459d0ff7383SNaveen Gangadharan kfree(mgmt); 1460d0ff7383SNaveen Gangadharan spin_lock_bh(&conn->psq_lock); 1461d0ff7383SNaveen Gangadharan } 1462d0ff7383SNaveen Gangadharan conn->mgmt_psq_len = 0; 1463c1762a3fSThirumalai Pachamuthu while ((skbuff = skb_dequeue(&conn->psq))) { 1464c1762a3fSThirumalai Pachamuthu spin_unlock_bh(&conn->psq_lock); 1465c1762a3fSThirumalai Pachamuthu ath6kl_data_tx(skbuff, vif->ndev); 1466c1762a3fSThirumalai Pachamuthu spin_lock_bh(&conn->psq_lock); 1467c1762a3fSThirumalai Pachamuthu } 1468c1762a3fSThirumalai Pachamuthu 1469c1762a3fSThirumalai Pachamuthu is_apsdq_empty = skb_queue_empty(&conn->apsdq); 1470c1762a3fSThirumalai Pachamuthu while ((skbuff = skb_dequeue(&conn->apsdq))) { 1471bdcd8170SKalle Valo spin_unlock_bh(&conn->psq_lock); 147228ae58ddSVasanthakumar Thiagarajan ath6kl_data_tx(skbuff, vif->ndev); 1473bdcd8170SKalle Valo spin_lock_bh(&conn->psq_lock); 1474bdcd8170SKalle Valo } 1475bdcd8170SKalle Valo spin_unlock_bh(&conn->psq_lock); 1476c1762a3fSThirumalai Pachamuthu 1477c1762a3fSThirumalai Pachamuthu if (!is_apsdq_empty) 1478c1762a3fSThirumalai Pachamuthu ath6kl_wmi_set_apsd_bfrd_traf( 1479c1762a3fSThirumalai Pachamuthu ar->wmi, 1480c1762a3fSThirumalai Pachamuthu vif->fw_vif_idx, 1481c1762a3fSThirumalai Pachamuthu conn->aid, 0, 0); 1482c1762a3fSThirumalai Pachamuthu 1483bdcd8170SKalle Valo /* Clear the PVB for this STA */ 1484334234b5SVasanthakumar Thiagarajan ath6kl_wmi_set_pvb_cmd(ar->wmi, vif->fw_vif_idx, 1485334234b5SVasanthakumar Thiagarajan conn->aid, 0); 1486bdcd8170SKalle Valo } 1487bdcd8170SKalle Valo } 1488bdcd8170SKalle Valo 1489bdcd8170SKalle Valo /* drop NULL data frames here */ 1490bdcd8170SKalle Valo if ((packet->act_len < min_hdr_len) || 1491bdcd8170SKalle Valo (packet->act_len > 1492bdcd8170SKalle Valo WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH)) { 1493bdcd8170SKalle Valo dev_kfree_skb(skb); 1494bdcd8170SKalle Valo return; 1495bdcd8170SKalle Valo } 1496bdcd8170SKalle Valo } 1497bdcd8170SKalle Valo 1498bdcd8170SKalle Valo is_amsdu = wmi_data_hdr_is_amsdu(dhdr) ? true : false; 1499bdcd8170SKalle Valo tid = wmi_data_hdr_get_up(dhdr); 1500bdcd8170SKalle Valo seq_no = wmi_data_hdr_get_seqno(dhdr); 1501bdcd8170SKalle Valo meta_type = wmi_data_hdr_get_meta(dhdr); 1502bdcd8170SKalle Valo dot11_hdr = wmi_data_hdr_get_dot11(dhdr); 15038bd5bca8SKalle Valo pad_before_data_start = 15048bd5bca8SKalle Valo (le16_to_cpu(dhdr->info3) >> WMI_DATA_HDR_PAD_BEFORE_DATA_SHIFT) 15058bd5bca8SKalle Valo & WMI_DATA_HDR_PAD_BEFORE_DATA_MASK; 15068bd5bca8SKalle Valo 1507594a0bc8SVasanthakumar Thiagarajan skb_pull(skb, sizeof(struct wmi_data_hdr)); 1508bdcd8170SKalle Valo 1509bdcd8170SKalle Valo switch (meta_type) { 1510bdcd8170SKalle Valo case WMI_META_VERSION_1: 1511bdcd8170SKalle Valo skb_pull(skb, sizeof(struct wmi_rx_meta_v1)); 1512bdcd8170SKalle Valo break; 1513bdcd8170SKalle Valo case WMI_META_VERSION_2: 1514bdcd8170SKalle Valo meta = (struct wmi_rx_meta_v2 *) skb->data; 1515bdcd8170SKalle Valo if (meta->csum_flags & 0x1) { 1516bdcd8170SKalle Valo skb->ip_summed = CHECKSUM_COMPLETE; 1517bdcd8170SKalle Valo skb->csum = (__force __wsum) meta->csum; 1518bdcd8170SKalle Valo } 1519bdcd8170SKalle Valo skb_pull(skb, sizeof(struct wmi_rx_meta_v2)); 1520bdcd8170SKalle Valo break; 1521bdcd8170SKalle Valo default: 1522bdcd8170SKalle Valo break; 1523bdcd8170SKalle Valo } 1524bdcd8170SKalle Valo 15258bd5bca8SKalle Valo skb_pull(skb, pad_before_data_start); 15268bd5bca8SKalle Valo 1527bdcd8170SKalle Valo if (dot11_hdr) 1528bdcd8170SKalle Valo status = ath6kl_wmi_dot11_hdr_remove(ar->wmi, skb); 1529bdcd8170SKalle Valo else if (!is_amsdu) 1530bdcd8170SKalle Valo status = ath6kl_wmi_dot3_2_dix(skb); 1531bdcd8170SKalle Valo 1532bdcd8170SKalle Valo if (status) { 1533bdcd8170SKalle Valo /* 1534bdcd8170SKalle Valo * Drop frames that could not be processed (lack of 1535bdcd8170SKalle Valo * memory, etc.) 1536bdcd8170SKalle Valo */ 1537bdcd8170SKalle Valo dev_kfree_skb(skb); 1538bdcd8170SKalle Valo return; 1539bdcd8170SKalle Valo } 1540bdcd8170SKalle Valo 154128ae58ddSVasanthakumar Thiagarajan if (!(vif->ndev->flags & IFF_UP)) { 1542bdcd8170SKalle Valo dev_kfree_skb(skb); 1543bdcd8170SKalle Valo return; 1544bdcd8170SKalle Valo } 1545bdcd8170SKalle Valo 1546f5938f24SVasanthakumar Thiagarajan if (vif->nw_type == AP_NETWORK) { 1547bdcd8170SKalle Valo datap = (struct ethhdr *) skb->data; 1548bdcd8170SKalle Valo if (is_multicast_ether_addr(datap->h_dest)) 1549bdcd8170SKalle Valo /* 1550bdcd8170SKalle Valo * Bcast/Mcast frames should be sent to the 1551bdcd8170SKalle Valo * OS stack as well as on the air. 1552bdcd8170SKalle Valo */ 1553bdcd8170SKalle Valo skb1 = skb_copy(skb, GFP_ATOMIC); 1554bdcd8170SKalle Valo else { 1555bdcd8170SKalle Valo /* 1556bdcd8170SKalle Valo * Search for a connected STA with dstMac 1557bdcd8170SKalle Valo * as the Mac address. If found send the 1558bdcd8170SKalle Valo * frame to it on the air else send the 1559bdcd8170SKalle Valo * frame up the stack. 1560bdcd8170SKalle Valo */ 15616765d0aaSVasanthakumar Thiagarajan conn = ath6kl_find_sta(vif, datap->h_dest); 1562bdcd8170SKalle Valo 1563bdcd8170SKalle Valo if (conn && ar->intra_bss) { 1564bdcd8170SKalle Valo skb1 = skb; 1565bdcd8170SKalle Valo skb = NULL; 1566bdcd8170SKalle Valo } else if (conn && !ar->intra_bss) { 1567bdcd8170SKalle Valo dev_kfree_skb(skb); 1568bdcd8170SKalle Valo skb = NULL; 1569bdcd8170SKalle Valo } 1570bdcd8170SKalle Valo } 1571bdcd8170SKalle Valo if (skb1) 157228ae58ddSVasanthakumar Thiagarajan ath6kl_data_tx(skb1, vif->ndev); 1573ad3f78b9SKalle Valo 1574ad3f78b9SKalle Valo if (skb == NULL) { 1575ad3f78b9SKalle Valo /* nothing to deliver up the stack */ 1576ad3f78b9SKalle Valo return; 1577ad3f78b9SKalle Valo } 1578bdcd8170SKalle Valo } 1579bdcd8170SKalle Valo 15805694f962SKalle Valo datap = (struct ethhdr *) skb->data; 15815694f962SKalle Valo 15821d2a4456SVasanthakumar Thiagarajan if (is_unicast_ether_addr(datap->h_dest)) { 15831d2a4456SVasanthakumar Thiagarajan if (vif->nw_type == AP_NETWORK) { 15841d2a4456SVasanthakumar Thiagarajan conn = ath6kl_find_sta(vif, datap->h_source); 15851d2a4456SVasanthakumar Thiagarajan if (!conn) 15861d2a4456SVasanthakumar Thiagarajan return; 15871d2a4456SVasanthakumar Thiagarajan aggr_conn = conn->aggr_conn; 15881d2a4456SVasanthakumar Thiagarajan } else 15891d2a4456SVasanthakumar Thiagarajan aggr_conn = vif->aggr_cntxt->aggr_conn; 15901d2a4456SVasanthakumar Thiagarajan 15911d2a4456SVasanthakumar Thiagarajan if (aggr_process_recv_frm(aggr_conn, tid, seq_no, 15921d2a4456SVasanthakumar Thiagarajan is_amsdu, skb)) { 15935694f962SKalle Valo /* aggregation code will handle the skb */ 15945694f962SKalle Valo return; 15951d2a4456SVasanthakumar Thiagarajan } 15961d2a4456SVasanthakumar Thiagarajan } 15975694f962SKalle Valo 159828ae58ddSVasanthakumar Thiagarajan ath6kl_deliver_frames_to_nw_stack(vif->ndev, skb); 1599bdcd8170SKalle Valo } 1600bdcd8170SKalle Valo 1601bdcd8170SKalle Valo static void aggr_timeout(unsigned long arg) 1602bdcd8170SKalle Valo { 1603bdcd8170SKalle Valo u8 i, j; 16047baef812SVasanthakumar Thiagarajan struct aggr_info_conn *aggr_conn = (struct aggr_info_conn *) arg; 1605bdcd8170SKalle Valo struct rxtid *rxtid; 1606bdcd8170SKalle Valo struct rxtid_stats *stats; 1607bdcd8170SKalle Valo 1608bdcd8170SKalle Valo for (i = 0; i < NUM_OF_TIDS; i++) { 16097baef812SVasanthakumar Thiagarajan rxtid = &aggr_conn->rx_tid[i]; 16107baef812SVasanthakumar Thiagarajan stats = &aggr_conn->stat[i]; 1611bdcd8170SKalle Valo 1612bdcd8170SKalle Valo if (!rxtid->aggr || !rxtid->timer_mon || rxtid->progress) 1613bdcd8170SKalle Valo continue; 1614bdcd8170SKalle Valo 1615bdcd8170SKalle Valo stats->num_timeouts++; 161637ca6335SKalle Valo ath6kl_dbg(ATH6KL_DBG_AGGR, 161737ca6335SKalle Valo "aggr timeout (st %d end %d)\n", 1618bdcd8170SKalle Valo rxtid->seq_next, 1619bdcd8170SKalle Valo ((rxtid->seq_next + rxtid->hold_q_sz-1) & 1620bdcd8170SKalle Valo ATH6KL_MAX_SEQ_NO)); 16211d2a4456SVasanthakumar Thiagarajan aggr_deque_frms(aggr_conn, i, 0, 0); 1622bdcd8170SKalle Valo } 1623bdcd8170SKalle Valo 16247baef812SVasanthakumar Thiagarajan aggr_conn->timer_scheduled = false; 1625bdcd8170SKalle Valo 1626bdcd8170SKalle Valo for (i = 0; i < NUM_OF_TIDS; i++) { 16277baef812SVasanthakumar Thiagarajan rxtid = &aggr_conn->rx_tid[i]; 1628bdcd8170SKalle Valo 1629bdcd8170SKalle Valo if (rxtid->aggr && rxtid->hold_q) { 1630bdcd8170SKalle Valo for (j = 0; j < rxtid->hold_q_sz; j++) { 1631bdcd8170SKalle Valo if (rxtid->hold_q[j].skb) { 16327baef812SVasanthakumar Thiagarajan aggr_conn->timer_scheduled = true; 1633bdcd8170SKalle Valo rxtid->timer_mon = true; 1634bdcd8170SKalle Valo rxtid->progress = false; 1635bdcd8170SKalle Valo break; 1636bdcd8170SKalle Valo } 1637bdcd8170SKalle Valo } 1638bdcd8170SKalle Valo 1639bdcd8170SKalle Valo if (j >= rxtid->hold_q_sz) 1640bdcd8170SKalle Valo rxtid->timer_mon = false; 1641bdcd8170SKalle Valo } 1642bdcd8170SKalle Valo } 1643bdcd8170SKalle Valo 16447baef812SVasanthakumar Thiagarajan if (aggr_conn->timer_scheduled) 16457baef812SVasanthakumar Thiagarajan mod_timer(&aggr_conn->timer, 1646bdcd8170SKalle Valo jiffies + msecs_to_jiffies(AGGR_RX_TIMEOUT)); 1647bdcd8170SKalle Valo } 1648bdcd8170SKalle Valo 16497baef812SVasanthakumar Thiagarajan static void aggr_delete_tid_state(struct aggr_info_conn *aggr_conn, u8 tid) 1650bdcd8170SKalle Valo { 1651bdcd8170SKalle Valo struct rxtid *rxtid; 1652bdcd8170SKalle Valo struct rxtid_stats *stats; 1653bdcd8170SKalle Valo 16547baef812SVasanthakumar Thiagarajan if (!aggr_conn || tid >= NUM_OF_TIDS) 1655bdcd8170SKalle Valo return; 1656bdcd8170SKalle Valo 16577baef812SVasanthakumar Thiagarajan rxtid = &aggr_conn->rx_tid[tid]; 16587baef812SVasanthakumar Thiagarajan stats = &aggr_conn->stat[tid]; 1659bdcd8170SKalle Valo 1660bdcd8170SKalle Valo if (rxtid->aggr) 16611d2a4456SVasanthakumar Thiagarajan aggr_deque_frms(aggr_conn, tid, 0, 0); 1662bdcd8170SKalle Valo 1663bdcd8170SKalle Valo rxtid->aggr = false; 1664bdcd8170SKalle Valo rxtid->progress = false; 1665bdcd8170SKalle Valo rxtid->timer_mon = false; 1666bdcd8170SKalle Valo rxtid->win_sz = 0; 1667bdcd8170SKalle Valo rxtid->seq_next = 0; 1668bdcd8170SKalle Valo rxtid->hold_q_sz = 0; 1669bdcd8170SKalle Valo 1670bdcd8170SKalle Valo kfree(rxtid->hold_q); 1671bdcd8170SKalle Valo rxtid->hold_q = NULL; 1672bdcd8170SKalle Valo 1673bdcd8170SKalle Valo memset(stats, 0, sizeof(struct rxtid_stats)); 1674bdcd8170SKalle Valo } 1675bdcd8170SKalle Valo 16763fdc0991SVasanthakumar Thiagarajan void aggr_recv_addba_req_evt(struct ath6kl_vif *vif, u8 tid_mux, u16 seq_no, 1677240d2799SVasanthakumar Thiagarajan u8 win_sz) 1678bdcd8170SKalle Valo { 16791d2a4456SVasanthakumar Thiagarajan struct ath6kl_sta *sta; 16801d2a4456SVasanthakumar Thiagarajan struct aggr_info_conn *aggr_conn = NULL; 1681bdcd8170SKalle Valo struct rxtid *rxtid; 1682bdcd8170SKalle Valo struct rxtid_stats *stats; 1683bdcd8170SKalle Valo u16 hold_q_size; 16841d2a4456SVasanthakumar Thiagarajan u8 tid, aid; 1685bdcd8170SKalle Valo 16861d2a4456SVasanthakumar Thiagarajan if (vif->nw_type == AP_NETWORK) { 16871d2a4456SVasanthakumar Thiagarajan aid = ath6kl_get_aid(tid_mux); 16881d2a4456SVasanthakumar Thiagarajan sta = ath6kl_find_sta_by_aid(vif->ar, aid); 16891d2a4456SVasanthakumar Thiagarajan if (sta) 16901d2a4456SVasanthakumar Thiagarajan aggr_conn = sta->aggr_conn; 16911d2a4456SVasanthakumar Thiagarajan } else 16921d2a4456SVasanthakumar Thiagarajan aggr_conn = vif->aggr_cntxt->aggr_conn; 16931d2a4456SVasanthakumar Thiagarajan 16941d2a4456SVasanthakumar Thiagarajan if (!aggr_conn) 1695bdcd8170SKalle Valo return; 1696bdcd8170SKalle Valo 16973fdc0991SVasanthakumar Thiagarajan tid = ath6kl_get_tid(tid_mux); 16983fdc0991SVasanthakumar Thiagarajan if (tid >= NUM_OF_TIDS) 16993fdc0991SVasanthakumar Thiagarajan return; 17003fdc0991SVasanthakumar Thiagarajan 17017baef812SVasanthakumar Thiagarajan rxtid = &aggr_conn->rx_tid[tid]; 17027baef812SVasanthakumar Thiagarajan stats = &aggr_conn->stat[tid]; 1703bdcd8170SKalle Valo 1704bdcd8170SKalle Valo if (win_sz < AGGR_WIN_SZ_MIN || win_sz > AGGR_WIN_SZ_MAX) 1705bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_WLAN_RX, "%s: win_sz %d, tid %d\n", 1706bdcd8170SKalle Valo __func__, win_sz, tid); 1707bdcd8170SKalle Valo 1708bdcd8170SKalle Valo if (rxtid->aggr) 17097baef812SVasanthakumar Thiagarajan aggr_delete_tid_state(aggr_conn, tid); 1710bdcd8170SKalle Valo 1711bdcd8170SKalle Valo rxtid->seq_next = seq_no; 1712bdcd8170SKalle Valo hold_q_size = TID_WINDOW_SZ(win_sz) * sizeof(struct skb_hold_q); 1713bdcd8170SKalle Valo rxtid->hold_q = kzalloc(hold_q_size, GFP_KERNEL); 1714bdcd8170SKalle Valo if (!rxtid->hold_q) 1715bdcd8170SKalle Valo return; 1716bdcd8170SKalle Valo 1717bdcd8170SKalle Valo rxtid->win_sz = win_sz; 1718bdcd8170SKalle Valo rxtid->hold_q_sz = TID_WINDOW_SZ(win_sz); 1719bdcd8170SKalle Valo if (!skb_queue_empty(&rxtid->q)) 1720bdcd8170SKalle Valo return; 1721bdcd8170SKalle Valo 1722bdcd8170SKalle Valo rxtid->aggr = true; 1723bdcd8170SKalle Valo } 1724bdcd8170SKalle Valo 1725c8651541SVasanthakumar Thiagarajan void aggr_conn_init(struct ath6kl_vif *vif, struct aggr_info *aggr_info, 1726c8651541SVasanthakumar Thiagarajan struct aggr_info_conn *aggr_conn) 1727bdcd8170SKalle Valo { 1728bdcd8170SKalle Valo struct rxtid *rxtid; 1729bdcd8170SKalle Valo u8 i; 1730bdcd8170SKalle Valo 17317baef812SVasanthakumar Thiagarajan aggr_conn->aggr_sz = AGGR_SZ_DEFAULT; 17327baef812SVasanthakumar Thiagarajan aggr_conn->dev = vif->ndev; 17337baef812SVasanthakumar Thiagarajan init_timer(&aggr_conn->timer); 17347baef812SVasanthakumar Thiagarajan aggr_conn->timer.function = aggr_timeout; 17357baef812SVasanthakumar Thiagarajan aggr_conn->timer.data = (unsigned long) aggr_conn; 1736c8651541SVasanthakumar Thiagarajan aggr_conn->aggr_info = aggr_info; 17377baef812SVasanthakumar Thiagarajan 17387baef812SVasanthakumar Thiagarajan aggr_conn->timer_scheduled = false; 17397baef812SVasanthakumar Thiagarajan 17407baef812SVasanthakumar Thiagarajan for (i = 0; i < NUM_OF_TIDS; i++) { 17417baef812SVasanthakumar Thiagarajan rxtid = &aggr_conn->rx_tid[i]; 17427baef812SVasanthakumar Thiagarajan rxtid->aggr = false; 17437baef812SVasanthakumar Thiagarajan rxtid->progress = false; 17447baef812SVasanthakumar Thiagarajan rxtid->timer_mon = false; 17457baef812SVasanthakumar Thiagarajan skb_queue_head_init(&rxtid->q); 17467baef812SVasanthakumar Thiagarajan spin_lock_init(&rxtid->lock); 17477baef812SVasanthakumar Thiagarajan } 17487baef812SVasanthakumar Thiagarajan 17497baef812SVasanthakumar Thiagarajan } 17507baef812SVasanthakumar Thiagarajan 17517baef812SVasanthakumar Thiagarajan struct aggr_info *aggr_init(struct ath6kl_vif *vif) 17527baef812SVasanthakumar Thiagarajan { 17537baef812SVasanthakumar Thiagarajan struct aggr_info *p_aggr = NULL; 17547baef812SVasanthakumar Thiagarajan 1755bdcd8170SKalle Valo p_aggr = kzalloc(sizeof(struct aggr_info), GFP_KERNEL); 1756bdcd8170SKalle Valo if (!p_aggr) { 1757bdcd8170SKalle Valo ath6kl_err("failed to alloc memory for aggr_node\n"); 1758bdcd8170SKalle Valo return NULL; 1759bdcd8170SKalle Valo } 1760bdcd8170SKalle Valo 17617baef812SVasanthakumar Thiagarajan p_aggr->aggr_conn = kzalloc(sizeof(struct aggr_info_conn), GFP_KERNEL); 17627baef812SVasanthakumar Thiagarajan if (!p_aggr->aggr_conn) { 17637baef812SVasanthakumar Thiagarajan ath6kl_err("failed to alloc memory for connection specific aggr info\n"); 17647baef812SVasanthakumar Thiagarajan kfree(p_aggr); 17657baef812SVasanthakumar Thiagarajan return NULL; 1766bdcd8170SKalle Valo } 1767bdcd8170SKalle Valo 1768c8651541SVasanthakumar Thiagarajan aggr_conn_init(vif, p_aggr, p_aggr->aggr_conn); 17697baef812SVasanthakumar Thiagarajan 17707baef812SVasanthakumar Thiagarajan skb_queue_head_init(&p_aggr->rx_amsdu_freeq); 17717baef812SVasanthakumar Thiagarajan ath6kl_alloc_netbufs(&p_aggr->rx_amsdu_freeq, AGGR_NUM_OF_FREE_NETBUFS); 17727baef812SVasanthakumar Thiagarajan 1773bdcd8170SKalle Valo return p_aggr; 1774bdcd8170SKalle Valo } 1775bdcd8170SKalle Valo 17763fdc0991SVasanthakumar Thiagarajan void aggr_recv_delba_req_evt(struct ath6kl_vif *vif, u8 tid_mux) 1777bdcd8170SKalle Valo { 17781d2a4456SVasanthakumar Thiagarajan struct ath6kl_sta *sta; 1779bdcd8170SKalle Valo struct rxtid *rxtid; 17801d2a4456SVasanthakumar Thiagarajan struct aggr_info_conn *aggr_conn = NULL; 17811d2a4456SVasanthakumar Thiagarajan u8 tid, aid; 1782bdcd8170SKalle Valo 17831d2a4456SVasanthakumar Thiagarajan if (vif->nw_type == AP_NETWORK) { 17841d2a4456SVasanthakumar Thiagarajan aid = ath6kl_get_aid(tid_mux); 17851d2a4456SVasanthakumar Thiagarajan sta = ath6kl_find_sta_by_aid(vif->ar, aid); 17861d2a4456SVasanthakumar Thiagarajan if (sta) 17871d2a4456SVasanthakumar Thiagarajan aggr_conn = sta->aggr_conn; 17881d2a4456SVasanthakumar Thiagarajan } else 17891d2a4456SVasanthakumar Thiagarajan aggr_conn = vif->aggr_cntxt->aggr_conn; 17901d2a4456SVasanthakumar Thiagarajan 17911d2a4456SVasanthakumar Thiagarajan if (!aggr_conn) 1792bdcd8170SKalle Valo return; 1793bdcd8170SKalle Valo 17943fdc0991SVasanthakumar Thiagarajan tid = ath6kl_get_tid(tid_mux); 17953fdc0991SVasanthakumar Thiagarajan if (tid >= NUM_OF_TIDS) 17963fdc0991SVasanthakumar Thiagarajan return; 17973fdc0991SVasanthakumar Thiagarajan 17987baef812SVasanthakumar Thiagarajan rxtid = &aggr_conn->rx_tid[tid]; 1799bdcd8170SKalle Valo 1800bdcd8170SKalle Valo if (rxtid->aggr) 18017baef812SVasanthakumar Thiagarajan aggr_delete_tid_state(aggr_conn, tid); 1802bdcd8170SKalle Valo } 1803bdcd8170SKalle Valo 18041d2a4456SVasanthakumar Thiagarajan void aggr_reset_state(struct aggr_info_conn *aggr_conn) 1805bdcd8170SKalle Valo { 1806bdcd8170SKalle Valo u8 tid; 1807bdcd8170SKalle Valo 18081d2a4456SVasanthakumar Thiagarajan if (!aggr_conn) 18097baef812SVasanthakumar Thiagarajan return; 18107baef812SVasanthakumar Thiagarajan 18111d2a4456SVasanthakumar Thiagarajan if (aggr_conn->timer_scheduled) { 18121d2a4456SVasanthakumar Thiagarajan del_timer(&aggr_conn->timer); 18131d2a4456SVasanthakumar Thiagarajan aggr_conn->timer_scheduled = false; 18147a950ea8SVasanthakumar Thiagarajan } 18157a950ea8SVasanthakumar Thiagarajan 1816bdcd8170SKalle Valo for (tid = 0; tid < NUM_OF_TIDS; tid++) 18171d2a4456SVasanthakumar Thiagarajan aggr_delete_tid_state(aggr_conn, tid); 1818bdcd8170SKalle Valo } 1819bdcd8170SKalle Valo 1820bdcd8170SKalle Valo /* clean up our amsdu buffer list */ 1821bdcd8170SKalle Valo void ath6kl_cleanup_amsdu_rxbufs(struct ath6kl *ar) 1822bdcd8170SKalle Valo { 1823bdcd8170SKalle Valo struct htc_packet *packet, *tmp_pkt; 1824bdcd8170SKalle Valo 1825bdcd8170SKalle Valo spin_lock_bh(&ar->lock); 1826bdcd8170SKalle Valo if (list_empty(&ar->amsdu_rx_buffer_queue)) { 1827bdcd8170SKalle Valo spin_unlock_bh(&ar->lock); 1828bdcd8170SKalle Valo return; 1829bdcd8170SKalle Valo } 1830bdcd8170SKalle Valo 1831bdcd8170SKalle Valo list_for_each_entry_safe(packet, tmp_pkt, &ar->amsdu_rx_buffer_queue, 1832bdcd8170SKalle Valo list) { 1833bdcd8170SKalle Valo list_del(&packet->list); 1834bdcd8170SKalle Valo spin_unlock_bh(&ar->lock); 1835bdcd8170SKalle Valo dev_kfree_skb(packet->pkt_cntxt); 1836bdcd8170SKalle Valo spin_lock_bh(&ar->lock); 1837bdcd8170SKalle Valo } 1838bdcd8170SKalle Valo 1839bdcd8170SKalle Valo spin_unlock_bh(&ar->lock); 1840bdcd8170SKalle Valo } 1841bdcd8170SKalle Valo 1842bdcd8170SKalle Valo void aggr_module_destroy(struct aggr_info *aggr_info) 1843bdcd8170SKalle Valo { 18441d2a4456SVasanthakumar Thiagarajan if (!aggr_info) 1845bdcd8170SKalle Valo return; 1846bdcd8170SKalle Valo 18471d2a4456SVasanthakumar Thiagarajan aggr_reset_state(aggr_info->aggr_conn); 18487baef812SVasanthakumar Thiagarajan skb_queue_purge(&aggr_info->rx_amsdu_freeq); 18497baef812SVasanthakumar Thiagarajan kfree(aggr_info->aggr_conn); 1850bdcd8170SKalle Valo kfree(aggr_info); 1851bdcd8170SKalle Valo } 1852