xref: /openbmc/linux/drivers/net/wireless/ath/ath6kl/txrx.c (revision 3fdc099109e75359e5de54c56478c06255850741)
1bdcd8170SKalle Valo /*
2bdcd8170SKalle Valo  * Copyright (c) 2004-2011 Atheros Communications Inc.
3bdcd8170SKalle Valo  *
4bdcd8170SKalle Valo  * Permission to use, copy, modify, and/or distribute this software for any
5bdcd8170SKalle Valo  * purpose with or without fee is hereby granted, provided that the above
6bdcd8170SKalle Valo  * copyright notice and this permission notice appear in all copies.
7bdcd8170SKalle Valo  *
8bdcd8170SKalle Valo  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9bdcd8170SKalle Valo  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10bdcd8170SKalle Valo  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11bdcd8170SKalle Valo  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12bdcd8170SKalle Valo  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13bdcd8170SKalle Valo  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14bdcd8170SKalle Valo  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15bdcd8170SKalle Valo  */
16bdcd8170SKalle Valo 
17bdcd8170SKalle Valo #include "core.h"
18bdcd8170SKalle Valo #include "debug.h"
19bdcd8170SKalle Valo 
20*3fdc0991SVasanthakumar Thiagarajan /*
21*3fdc0991SVasanthakumar Thiagarajan  * tid - tid_mux0..tid_mux3
22*3fdc0991SVasanthakumar Thiagarajan  * aid - tid_mux4..tid_mux7
23*3fdc0991SVasanthakumar Thiagarajan  */
24*3fdc0991SVasanthakumar Thiagarajan #define ATH6KL_TID_MASK 0xf
25*3fdc0991SVasanthakumar Thiagarajan 
26*3fdc0991SVasanthakumar Thiagarajan static inline u8 ath6kl_get_tid(u8 tid_mux)
27*3fdc0991SVasanthakumar Thiagarajan {
28*3fdc0991SVasanthakumar Thiagarajan 	return tid_mux & ATH6KL_TID_MASK;
29*3fdc0991SVasanthakumar Thiagarajan }
30*3fdc0991SVasanthakumar Thiagarajan 
31bdcd8170SKalle Valo static u8 ath6kl_ibss_map_epid(struct sk_buff *skb, struct net_device *dev,
32bdcd8170SKalle Valo 			       u32 *map_no)
33bdcd8170SKalle Valo {
34bdcd8170SKalle Valo 	struct ath6kl *ar = ath6kl_priv(dev);
35bdcd8170SKalle Valo 	struct ethhdr *eth_hdr;
36bdcd8170SKalle Valo 	u32 i, ep_map = -1;
37bdcd8170SKalle Valo 	u8 *datap;
38bdcd8170SKalle Valo 
39bdcd8170SKalle Valo 	*map_no = 0;
40bdcd8170SKalle Valo 	datap = skb->data;
41bdcd8170SKalle Valo 	eth_hdr = (struct ethhdr *) (datap + sizeof(struct wmi_data_hdr));
42bdcd8170SKalle Valo 
43bdcd8170SKalle Valo 	if (is_multicast_ether_addr(eth_hdr->h_dest))
44bdcd8170SKalle Valo 		return ENDPOINT_2;
45bdcd8170SKalle Valo 
46bdcd8170SKalle Valo 	for (i = 0; i < ar->node_num; i++) {
47bdcd8170SKalle Valo 		if (memcmp(eth_hdr->h_dest, ar->node_map[i].mac_addr,
48bdcd8170SKalle Valo 			   ETH_ALEN) == 0) {
49bdcd8170SKalle Valo 			*map_no = i + 1;
50bdcd8170SKalle Valo 			ar->node_map[i].tx_pend++;
51bdcd8170SKalle Valo 			return ar->node_map[i].ep_id;
52bdcd8170SKalle Valo 		}
53bdcd8170SKalle Valo 
54bdcd8170SKalle Valo 		if ((ep_map == -1) && !ar->node_map[i].tx_pend)
55bdcd8170SKalle Valo 			ep_map = i;
56bdcd8170SKalle Valo 	}
57bdcd8170SKalle Valo 
58bdcd8170SKalle Valo 	if (ep_map == -1) {
59bdcd8170SKalle Valo 		ep_map = ar->node_num;
60bdcd8170SKalle Valo 		ar->node_num++;
61bdcd8170SKalle Valo 		if (ar->node_num > MAX_NODE_NUM)
62bdcd8170SKalle Valo 			return ENDPOINT_UNUSED;
63bdcd8170SKalle Valo 	}
64bdcd8170SKalle Valo 
65bdcd8170SKalle Valo 	memcpy(ar->node_map[ep_map].mac_addr, eth_hdr->h_dest, ETH_ALEN);
66bdcd8170SKalle Valo 
67bdcd8170SKalle Valo 	for (i = ENDPOINT_2; i <= ENDPOINT_5; i++) {
68bdcd8170SKalle Valo 		if (!ar->tx_pending[i]) {
69bdcd8170SKalle Valo 			ar->node_map[ep_map].ep_id = i;
70bdcd8170SKalle Valo 			break;
71bdcd8170SKalle Valo 		}
72bdcd8170SKalle Valo 
73bdcd8170SKalle Valo 		/*
74bdcd8170SKalle Valo 		 * No free endpoint is available, start redistribution on
75bdcd8170SKalle Valo 		 * the inuse endpoints.
76bdcd8170SKalle Valo 		 */
77bdcd8170SKalle Valo 		if (i == ENDPOINT_5) {
78bdcd8170SKalle Valo 			ar->node_map[ep_map].ep_id = ar->next_ep_id;
79bdcd8170SKalle Valo 			ar->next_ep_id++;
80bdcd8170SKalle Valo 			if (ar->next_ep_id > ENDPOINT_5)
81bdcd8170SKalle Valo 				ar->next_ep_id = ENDPOINT_2;
82bdcd8170SKalle Valo 		}
83bdcd8170SKalle Valo 	}
84bdcd8170SKalle Valo 
85bdcd8170SKalle Valo 	*map_no = ep_map + 1;
86bdcd8170SKalle Valo 	ar->node_map[ep_map].tx_pend++;
87bdcd8170SKalle Valo 
88bdcd8170SKalle Valo 	return ar->node_map[ep_map].ep_id;
89bdcd8170SKalle Valo }
90bdcd8170SKalle Valo 
91c1762a3fSThirumalai Pachamuthu static bool ath6kl_process_uapsdq(struct ath6kl_sta *conn,
92c1762a3fSThirumalai Pachamuthu 				struct ath6kl_vif *vif,
93c1762a3fSThirumalai Pachamuthu 				struct sk_buff *skb,
94c1762a3fSThirumalai Pachamuthu 				u32 *flags)
95c1762a3fSThirumalai Pachamuthu {
96c1762a3fSThirumalai Pachamuthu 	struct ath6kl *ar = vif->ar;
97c1762a3fSThirumalai Pachamuthu 	bool is_apsdq_empty = false;
98c1762a3fSThirumalai Pachamuthu 	struct ethhdr *datap = (struct ethhdr *) skb->data;
99e5726028SKalle Valo 	u8 up = 0, traffic_class, *ip_hdr;
100c1762a3fSThirumalai Pachamuthu 	u16 ether_type;
101c1762a3fSThirumalai Pachamuthu 	struct ath6kl_llc_snap_hdr *llc_hdr;
102c1762a3fSThirumalai Pachamuthu 
103c1762a3fSThirumalai Pachamuthu 	if (conn->sta_flags & STA_PS_APSD_TRIGGER) {
104c1762a3fSThirumalai Pachamuthu 		/*
105c1762a3fSThirumalai Pachamuthu 		 * This tx is because of a uAPSD trigger, determine
106c1762a3fSThirumalai Pachamuthu 		 * more and EOSP bit. Set EOSP if queue is empty
107c1762a3fSThirumalai Pachamuthu 		 * or sufficient frames are delivered for this trigger.
108c1762a3fSThirumalai Pachamuthu 		 */
109c1762a3fSThirumalai Pachamuthu 		spin_lock_bh(&conn->psq_lock);
110c1762a3fSThirumalai Pachamuthu 		if (!skb_queue_empty(&conn->apsdq))
111c1762a3fSThirumalai Pachamuthu 			*flags |= WMI_DATA_HDR_FLAGS_MORE;
112c1762a3fSThirumalai Pachamuthu 		else if (conn->sta_flags & STA_PS_APSD_EOSP)
113c1762a3fSThirumalai Pachamuthu 			*flags |= WMI_DATA_HDR_FLAGS_EOSP;
114c1762a3fSThirumalai Pachamuthu 		*flags |= WMI_DATA_HDR_FLAGS_UAPSD;
115c1762a3fSThirumalai Pachamuthu 		spin_unlock_bh(&conn->psq_lock);
116c1762a3fSThirumalai Pachamuthu 		return false;
117c1762a3fSThirumalai Pachamuthu 	} else if (!conn->apsd_info)
118c1762a3fSThirumalai Pachamuthu 		return false;
119c1762a3fSThirumalai Pachamuthu 
120c1762a3fSThirumalai Pachamuthu 	if (test_bit(WMM_ENABLED, &vif->flags)) {
121c1762a3fSThirumalai Pachamuthu 		ether_type = be16_to_cpu(datap->h_proto);
122c1762a3fSThirumalai Pachamuthu 		if (is_ethertype(ether_type)) {
123c1762a3fSThirumalai Pachamuthu 			/* packet is in DIX format  */
124c1762a3fSThirumalai Pachamuthu 			ip_hdr = (u8 *)(datap + 1);
125c1762a3fSThirumalai Pachamuthu 		} else {
126c1762a3fSThirumalai Pachamuthu 			/* packet is in 802.3 format */
127c1762a3fSThirumalai Pachamuthu 			llc_hdr = (struct ath6kl_llc_snap_hdr *)
128c1762a3fSThirumalai Pachamuthu 							(datap + 1);
129c1762a3fSThirumalai Pachamuthu 			ether_type = be16_to_cpu(llc_hdr->eth_type);
130c1762a3fSThirumalai Pachamuthu 			ip_hdr = (u8 *)(llc_hdr + 1);
131c1762a3fSThirumalai Pachamuthu 		}
132c1762a3fSThirumalai Pachamuthu 
133c1762a3fSThirumalai Pachamuthu 		if (ether_type == IP_ETHERTYPE)
134c1762a3fSThirumalai Pachamuthu 			up = ath6kl_wmi_determine_user_priority(
135c1762a3fSThirumalai Pachamuthu 							ip_hdr, 0);
136c1762a3fSThirumalai Pachamuthu 	}
137c1762a3fSThirumalai Pachamuthu 
138c1762a3fSThirumalai Pachamuthu 	traffic_class = ath6kl_wmi_get_traffic_class(up);
139c1762a3fSThirumalai Pachamuthu 
140c1762a3fSThirumalai Pachamuthu 	if ((conn->apsd_info & (1 << traffic_class)) == 0)
141c1762a3fSThirumalai Pachamuthu 		return false;
142c1762a3fSThirumalai Pachamuthu 
143c1762a3fSThirumalai Pachamuthu 	/* Queue the frames if the STA is sleeping */
144c1762a3fSThirumalai Pachamuthu 	spin_lock_bh(&conn->psq_lock);
145c1762a3fSThirumalai Pachamuthu 	is_apsdq_empty = skb_queue_empty(&conn->apsdq);
146c1762a3fSThirumalai Pachamuthu 	skb_queue_tail(&conn->apsdq, skb);
147c1762a3fSThirumalai Pachamuthu 	spin_unlock_bh(&conn->psq_lock);
148c1762a3fSThirumalai Pachamuthu 
149c1762a3fSThirumalai Pachamuthu 	/*
150c1762a3fSThirumalai Pachamuthu 	 * If this is the first pkt getting queued
151c1762a3fSThirumalai Pachamuthu 	 * for this STA, update the PVB for this STA
152c1762a3fSThirumalai Pachamuthu 	 */
153c1762a3fSThirumalai Pachamuthu 	if (is_apsdq_empty) {
154c1762a3fSThirumalai Pachamuthu 		ath6kl_wmi_set_apsd_bfrd_traf(ar->wmi,
155c1762a3fSThirumalai Pachamuthu 				vif->fw_vif_idx,
156c1762a3fSThirumalai Pachamuthu 				conn->aid, 1, 0);
157c1762a3fSThirumalai Pachamuthu 	}
158c1762a3fSThirumalai Pachamuthu 	*flags |= WMI_DATA_HDR_FLAGS_UAPSD;
159c1762a3fSThirumalai Pachamuthu 
160c1762a3fSThirumalai Pachamuthu 	return true;
161c1762a3fSThirumalai Pachamuthu }
162c1762a3fSThirumalai Pachamuthu 
163c1762a3fSThirumalai Pachamuthu static bool ath6kl_process_psq(struct ath6kl_sta *conn,
164c1762a3fSThirumalai Pachamuthu 				struct ath6kl_vif *vif,
165c1762a3fSThirumalai Pachamuthu 				struct sk_buff *skb,
166c1762a3fSThirumalai Pachamuthu 				u32 *flags)
167c1762a3fSThirumalai Pachamuthu {
168c1762a3fSThirumalai Pachamuthu 	bool is_psq_empty = false;
169c1762a3fSThirumalai Pachamuthu 	struct ath6kl *ar = vif->ar;
170c1762a3fSThirumalai Pachamuthu 
171c1762a3fSThirumalai Pachamuthu 	if (conn->sta_flags & STA_PS_POLLED) {
172c1762a3fSThirumalai Pachamuthu 		spin_lock_bh(&conn->psq_lock);
173c1762a3fSThirumalai Pachamuthu 		if (!skb_queue_empty(&conn->psq))
174c1762a3fSThirumalai Pachamuthu 			*flags |= WMI_DATA_HDR_FLAGS_MORE;
175c1762a3fSThirumalai Pachamuthu 		spin_unlock_bh(&conn->psq_lock);
176c1762a3fSThirumalai Pachamuthu 		return false;
177c1762a3fSThirumalai Pachamuthu 	}
178c1762a3fSThirumalai Pachamuthu 
179c1762a3fSThirumalai Pachamuthu 	/* Queue the frames if the STA is sleeping */
180c1762a3fSThirumalai Pachamuthu 	spin_lock_bh(&conn->psq_lock);
181c1762a3fSThirumalai Pachamuthu 	is_psq_empty = skb_queue_empty(&conn->psq);
182c1762a3fSThirumalai Pachamuthu 	skb_queue_tail(&conn->psq, skb);
183c1762a3fSThirumalai Pachamuthu 	spin_unlock_bh(&conn->psq_lock);
184c1762a3fSThirumalai Pachamuthu 
185c1762a3fSThirumalai Pachamuthu 	/*
186c1762a3fSThirumalai Pachamuthu 	 * If this is the first pkt getting queued
187c1762a3fSThirumalai Pachamuthu 	 * for this STA, update the PVB for this
188c1762a3fSThirumalai Pachamuthu 	 * STA.
189c1762a3fSThirumalai Pachamuthu 	 */
190c1762a3fSThirumalai Pachamuthu 	if (is_psq_empty)
191c1762a3fSThirumalai Pachamuthu 		ath6kl_wmi_set_pvb_cmd(ar->wmi,
192c1762a3fSThirumalai Pachamuthu 				       vif->fw_vif_idx,
193c1762a3fSThirumalai Pachamuthu 				       conn->aid, 1);
194c1762a3fSThirumalai Pachamuthu 	return true;
195c1762a3fSThirumalai Pachamuthu }
196c1762a3fSThirumalai Pachamuthu 
1976765d0aaSVasanthakumar Thiagarajan static bool ath6kl_powersave_ap(struct ath6kl_vif *vif, struct sk_buff *skb,
198c1762a3fSThirumalai Pachamuthu 				u32 *flags)
199bdcd8170SKalle Valo {
200bdcd8170SKalle Valo 	struct ethhdr *datap = (struct ethhdr *) skb->data;
201bdcd8170SKalle Valo 	struct ath6kl_sta *conn = NULL;
202c1762a3fSThirumalai Pachamuthu 	bool ps_queued = false;
2036765d0aaSVasanthakumar Thiagarajan 	struct ath6kl *ar = vif->ar;
204bdcd8170SKalle Valo 
205bdcd8170SKalle Valo 	if (is_multicast_ether_addr(datap->h_dest)) {
206bdcd8170SKalle Valo 		u8 ctr = 0;
207bdcd8170SKalle Valo 		bool q_mcast = false;
208bdcd8170SKalle Valo 
209bdcd8170SKalle Valo 		for (ctr = 0; ctr < AP_MAX_NUM_STA; ctr++) {
210bdcd8170SKalle Valo 			if (ar->sta_list[ctr].sta_flags & STA_PS_SLEEP) {
211bdcd8170SKalle Valo 				q_mcast = true;
212bdcd8170SKalle Valo 				break;
213bdcd8170SKalle Valo 			}
214bdcd8170SKalle Valo 		}
215bdcd8170SKalle Valo 
216bdcd8170SKalle Valo 		if (q_mcast) {
217bdcd8170SKalle Valo 			/*
218bdcd8170SKalle Valo 			 * If this transmit is not because of a Dtim Expiry
219bdcd8170SKalle Valo 			 * q it.
220bdcd8170SKalle Valo 			 */
22159c98449SVasanthakumar Thiagarajan 			if (!test_bit(DTIM_EXPIRED, &vif->flags)) {
222bdcd8170SKalle Valo 				bool is_mcastq_empty = false;
223bdcd8170SKalle Valo 
224bdcd8170SKalle Valo 				spin_lock_bh(&ar->mcastpsq_lock);
225bdcd8170SKalle Valo 				is_mcastq_empty =
226bdcd8170SKalle Valo 					skb_queue_empty(&ar->mcastpsq);
227bdcd8170SKalle Valo 				skb_queue_tail(&ar->mcastpsq, skb);
228bdcd8170SKalle Valo 				spin_unlock_bh(&ar->mcastpsq_lock);
229bdcd8170SKalle Valo 
230bdcd8170SKalle Valo 				/*
231bdcd8170SKalle Valo 				 * If this is the first Mcast pkt getting
232bdcd8170SKalle Valo 				 * queued indicate to the target to set the
233bdcd8170SKalle Valo 				 * BitmapControl LSB of the TIM IE.
234bdcd8170SKalle Valo 				 */
235bdcd8170SKalle Valo 				if (is_mcastq_empty)
236bdcd8170SKalle Valo 					ath6kl_wmi_set_pvb_cmd(ar->wmi,
237334234b5SVasanthakumar Thiagarajan 							       vif->fw_vif_idx,
238bdcd8170SKalle Valo 							       MCAST_AID, 1);
239bdcd8170SKalle Valo 
240bdcd8170SKalle Valo 				ps_queued = true;
241bdcd8170SKalle Valo 			} else {
242bdcd8170SKalle Valo 				/*
243bdcd8170SKalle Valo 				 * This transmit is because of Dtim expiry.
244bdcd8170SKalle Valo 				 * Determine if MoreData bit has to be set.
245bdcd8170SKalle Valo 				 */
246bdcd8170SKalle Valo 				spin_lock_bh(&ar->mcastpsq_lock);
247bdcd8170SKalle Valo 				if (!skb_queue_empty(&ar->mcastpsq))
248c1762a3fSThirumalai Pachamuthu 					*flags |= WMI_DATA_HDR_FLAGS_MORE;
249bdcd8170SKalle Valo 				spin_unlock_bh(&ar->mcastpsq_lock);
250bdcd8170SKalle Valo 			}
251bdcd8170SKalle Valo 		}
252bdcd8170SKalle Valo 	} else {
2536765d0aaSVasanthakumar Thiagarajan 		conn = ath6kl_find_sta(vif, datap->h_dest);
254bdcd8170SKalle Valo 		if (!conn) {
255bdcd8170SKalle Valo 			dev_kfree_skb(skb);
256bdcd8170SKalle Valo 
257bdcd8170SKalle Valo 			/* Inform the caller that the skb is consumed */
258bdcd8170SKalle Valo 			return true;
259bdcd8170SKalle Valo 		}
260bdcd8170SKalle Valo 
261bdcd8170SKalle Valo 		if (conn->sta_flags & STA_PS_SLEEP) {
262c1762a3fSThirumalai Pachamuthu 			ps_queued = ath6kl_process_uapsdq(conn,
263c1762a3fSThirumalai Pachamuthu 						vif, skb, flags);
264c1762a3fSThirumalai Pachamuthu 			if (!(*flags & WMI_DATA_HDR_FLAGS_UAPSD))
265c1762a3fSThirumalai Pachamuthu 				ps_queued = ath6kl_process_psq(conn,
266c1762a3fSThirumalai Pachamuthu 						vif, skb, flags);
267bdcd8170SKalle Valo 		}
268bdcd8170SKalle Valo 	}
269bdcd8170SKalle Valo 	return ps_queued;
270bdcd8170SKalle Valo }
271bdcd8170SKalle Valo 
272bdcd8170SKalle Valo /* Tx functions */
273bdcd8170SKalle Valo 
274bdcd8170SKalle Valo int ath6kl_control_tx(void *devt, struct sk_buff *skb,
275bdcd8170SKalle Valo 		      enum htc_endpoint_id eid)
276bdcd8170SKalle Valo {
277bdcd8170SKalle Valo 	struct ath6kl *ar = devt;
278bdcd8170SKalle Valo 	int status = 0;
279bdcd8170SKalle Valo 	struct ath6kl_cookie *cookie = NULL;
280bdcd8170SKalle Valo 
281bdcd8170SKalle Valo 	spin_lock_bh(&ar->lock);
282bdcd8170SKalle Valo 
283bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_WLAN_TX,
284bdcd8170SKalle Valo 		   "%s: skb=0x%p, len=0x%x eid =%d\n", __func__,
285bdcd8170SKalle Valo 		   skb, skb->len, eid);
286bdcd8170SKalle Valo 
287bdcd8170SKalle Valo 	if (test_bit(WMI_CTRL_EP_FULL, &ar->flag) && (eid == ar->ctrl_ep)) {
288bdcd8170SKalle Valo 		/*
289bdcd8170SKalle Valo 		 * Control endpoint is full, don't allocate resources, we
290bdcd8170SKalle Valo 		 * are just going to drop this packet.
291bdcd8170SKalle Valo 		 */
292bdcd8170SKalle Valo 		cookie = NULL;
293bdcd8170SKalle Valo 		ath6kl_err("wmi ctrl ep full, dropping pkt : 0x%p, len:%d\n",
294bdcd8170SKalle Valo 			   skb, skb->len);
295bdcd8170SKalle Valo 	} else
296bdcd8170SKalle Valo 		cookie = ath6kl_alloc_cookie(ar);
297bdcd8170SKalle Valo 
298bdcd8170SKalle Valo 	if (cookie == NULL) {
299bdcd8170SKalle Valo 		spin_unlock_bh(&ar->lock);
300bdcd8170SKalle Valo 		status = -ENOMEM;
301bdcd8170SKalle Valo 		goto fail_ctrl_tx;
302bdcd8170SKalle Valo 	}
303bdcd8170SKalle Valo 
304bdcd8170SKalle Valo 	ar->tx_pending[eid]++;
305bdcd8170SKalle Valo 
306bdcd8170SKalle Valo 	if (eid != ar->ctrl_ep)
307bdcd8170SKalle Valo 		ar->total_tx_data_pend++;
308bdcd8170SKalle Valo 
309bdcd8170SKalle Valo 	spin_unlock_bh(&ar->lock);
310bdcd8170SKalle Valo 
311bdcd8170SKalle Valo 	cookie->skb = skb;
312bdcd8170SKalle Valo 	cookie->map_no = 0;
313bdcd8170SKalle Valo 	set_htc_pkt_info(&cookie->htc_pkt, cookie, skb->data, skb->len,
314bdcd8170SKalle Valo 			 eid, ATH6KL_CONTROL_PKT_TAG);
315bdcd8170SKalle Valo 
316bdcd8170SKalle Valo 	/*
317bdcd8170SKalle Valo 	 * This interface is asynchronous, if there is an error, cleanup
318bdcd8170SKalle Valo 	 * will happen in the TX completion callback.
319bdcd8170SKalle Valo 	 */
320ad226ec2SKalle Valo 	ath6kl_htc_tx(ar->htc_target, &cookie->htc_pkt);
321bdcd8170SKalle Valo 
322bdcd8170SKalle Valo 	return 0;
323bdcd8170SKalle Valo 
324bdcd8170SKalle Valo fail_ctrl_tx:
325bdcd8170SKalle Valo 	dev_kfree_skb(skb);
326bdcd8170SKalle Valo 	return status;
327bdcd8170SKalle Valo }
328bdcd8170SKalle Valo 
329bdcd8170SKalle Valo int ath6kl_data_tx(struct sk_buff *skb, struct net_device *dev)
330bdcd8170SKalle Valo {
331bdcd8170SKalle Valo 	struct ath6kl *ar = ath6kl_priv(dev);
332bdcd8170SKalle Valo 	struct ath6kl_cookie *cookie = NULL;
333bdcd8170SKalle Valo 	enum htc_endpoint_id eid = ENDPOINT_UNUSED;
33459c98449SVasanthakumar Thiagarajan 	struct ath6kl_vif *vif = netdev_priv(dev);
335bdcd8170SKalle Valo 	u32 map_no = 0;
336bdcd8170SKalle Valo 	u16 htc_tag = ATH6KL_DATA_PKT_TAG;
337bdcd8170SKalle Valo 	u8 ac = 99 ; /* initialize to unmapped ac */
338c1762a3fSThirumalai Pachamuthu 	bool chk_adhoc_ps_mapping = false;
339bdcd8170SKalle Valo 	int ret;
340bc48ad31SRishi Panjwani 	struct wmi_tx_meta_v2 meta_v2;
341bc48ad31SRishi Panjwani 	void *meta;
342bc48ad31SRishi Panjwani 	u8 csum_start = 0, csum_dest = 0, csum = skb->ip_summed;
343bc48ad31SRishi Panjwani 	u8 meta_ver = 0;
344c1762a3fSThirumalai Pachamuthu 	u32 flags = 0;
345bdcd8170SKalle Valo 
346bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_WLAN_TX,
347bdcd8170SKalle Valo 		   "%s: skb=0x%p, data=0x%p, len=0x%x\n", __func__,
348bdcd8170SKalle Valo 		   skb, skb->data, skb->len);
349bdcd8170SKalle Valo 
350bdcd8170SKalle Valo 	/* If target is not associated */
35159c98449SVasanthakumar Thiagarajan 	if (!test_bit(CONNECTED, &vif->flags)) {
352bdcd8170SKalle Valo 		dev_kfree_skb(skb);
353bdcd8170SKalle Valo 		return 0;
354bdcd8170SKalle Valo 	}
355bdcd8170SKalle Valo 
356bdcd8170SKalle Valo 	if (!test_bit(WMI_READY, &ar->flag))
357bdcd8170SKalle Valo 		goto fail_tx;
358bdcd8170SKalle Valo 
359bdcd8170SKalle Valo 	/* AP mode Power saving processing */
360f5938f24SVasanthakumar Thiagarajan 	if (vif->nw_type == AP_NETWORK) {
361c1762a3fSThirumalai Pachamuthu 		if (ath6kl_powersave_ap(vif, skb, &flags))
362bdcd8170SKalle Valo 			return 0;
363bdcd8170SKalle Valo 	}
364bdcd8170SKalle Valo 
365bdcd8170SKalle Valo 	if (test_bit(WMI_ENABLED, &ar->flag)) {
366bc48ad31SRishi Panjwani 		if ((dev->features & NETIF_F_IP_CSUM) &&
367bc48ad31SRishi Panjwani 				(csum == CHECKSUM_PARTIAL)) {
368bc48ad31SRishi Panjwani 			csum_start = skb->csum_start -
369bc48ad31SRishi Panjwani 					(skb_network_header(skb) - skb->head) +
370bc48ad31SRishi Panjwani 					sizeof(struct ath6kl_llc_snap_hdr);
371bc48ad31SRishi Panjwani 			csum_dest = skb->csum_offset + csum_start;
372bc48ad31SRishi Panjwani 		}
373bc48ad31SRishi Panjwani 
374bdcd8170SKalle Valo 		if (skb_headroom(skb) < dev->needed_headroom) {
375a29517ceSVasanthakumar Thiagarajan 			struct sk_buff *tmp_skb = skb;
376a29517ceSVasanthakumar Thiagarajan 
377a29517ceSVasanthakumar Thiagarajan 			skb = skb_realloc_headroom(skb, dev->needed_headroom);
378a29517ceSVasanthakumar Thiagarajan 			kfree_skb(tmp_skb);
379a29517ceSVasanthakumar Thiagarajan 			if (skb == NULL) {
380a29517ceSVasanthakumar Thiagarajan 				vif->net_stats.tx_dropped++;
381a29517ceSVasanthakumar Thiagarajan 				return 0;
382a29517ceSVasanthakumar Thiagarajan 			}
383bdcd8170SKalle Valo 		}
384bdcd8170SKalle Valo 
385bdcd8170SKalle Valo 		if (ath6kl_wmi_dix_2_dot3(ar->wmi, skb)) {
386bdcd8170SKalle Valo 			ath6kl_err("ath6kl_wmi_dix_2_dot3 failed\n");
387bdcd8170SKalle Valo 			goto fail_tx;
388bdcd8170SKalle Valo 		}
389bdcd8170SKalle Valo 
390bc48ad31SRishi Panjwani 		if ((dev->features & NETIF_F_IP_CSUM) &&
391bc48ad31SRishi Panjwani 				(csum == CHECKSUM_PARTIAL)) {
392bc48ad31SRishi Panjwani 			meta_v2.csum_start = csum_start;
393bc48ad31SRishi Panjwani 			meta_v2.csum_dest = csum_dest;
394bc48ad31SRishi Panjwani 
395bc48ad31SRishi Panjwani 			/* instruct target to calculate checksum */
396bc48ad31SRishi Panjwani 			meta_v2.csum_flags = WMI_META_V2_FLAG_CSUM_OFFLOAD;
397bc48ad31SRishi Panjwani 			meta_ver = WMI_META_VERSION_2;
398bc48ad31SRishi Panjwani 			meta = &meta_v2;
399bc48ad31SRishi Panjwani 		} else {
400bc48ad31SRishi Panjwani 			meta_ver = 0;
401bc48ad31SRishi Panjwani 			meta = NULL;
402bc48ad31SRishi Panjwani 		}
403bc48ad31SRishi Panjwani 
404bc48ad31SRishi Panjwani 		ret = ath6kl_wmi_data_hdr_add(ar->wmi, skb,
405c1762a3fSThirumalai Pachamuthu 				DATA_MSGTYPE, flags, 0,
406bc48ad31SRishi Panjwani 				meta_ver,
407bc48ad31SRishi Panjwani 				meta, vif->fw_vif_idx);
408bc48ad31SRishi Panjwani 
409bc48ad31SRishi Panjwani 		if (ret) {
410bc48ad31SRishi Panjwani 			ath6kl_warn("failed to add wmi data header:%d\n"
411bc48ad31SRishi Panjwani 				, ret);
412bdcd8170SKalle Valo 			goto fail_tx;
413bdcd8170SKalle Valo 		}
414bdcd8170SKalle Valo 
415f5938f24SVasanthakumar Thiagarajan 		if ((vif->nw_type == ADHOC_NETWORK) &&
41659c98449SVasanthakumar Thiagarajan 		     ar->ibss_ps_enable && test_bit(CONNECTED, &vif->flags))
417bdcd8170SKalle Valo 			chk_adhoc_ps_mapping = true;
418bdcd8170SKalle Valo 		else {
419bdcd8170SKalle Valo 			/* get the stream mapping */
420240d2799SVasanthakumar Thiagarajan 			ret = ath6kl_wmi_implicit_create_pstream(ar->wmi,
421240d2799SVasanthakumar Thiagarajan 				    vif->fw_vif_idx, skb,
42259c98449SVasanthakumar Thiagarajan 				    0, test_bit(WMM_ENABLED, &vif->flags), &ac);
423bdcd8170SKalle Valo 			if (ret)
424bdcd8170SKalle Valo 				goto fail_tx;
425bdcd8170SKalle Valo 		}
426bdcd8170SKalle Valo 	} else
427bdcd8170SKalle Valo 		goto fail_tx;
428bdcd8170SKalle Valo 
429bdcd8170SKalle Valo 	spin_lock_bh(&ar->lock);
430bdcd8170SKalle Valo 
431bdcd8170SKalle Valo 	if (chk_adhoc_ps_mapping)
432bdcd8170SKalle Valo 		eid = ath6kl_ibss_map_epid(skb, dev, &map_no);
433bdcd8170SKalle Valo 	else
434bdcd8170SKalle Valo 		eid = ar->ac2ep_map[ac];
435bdcd8170SKalle Valo 
436bdcd8170SKalle Valo 	if (eid == 0 || eid == ENDPOINT_UNUSED) {
437bdcd8170SKalle Valo 		ath6kl_err("eid %d is not mapped!\n", eid);
438bdcd8170SKalle Valo 		spin_unlock_bh(&ar->lock);
439bdcd8170SKalle Valo 		goto fail_tx;
440bdcd8170SKalle Valo 	}
441bdcd8170SKalle Valo 
442bdcd8170SKalle Valo 	/* allocate resource for this packet */
443bdcd8170SKalle Valo 	cookie = ath6kl_alloc_cookie(ar);
444bdcd8170SKalle Valo 
445bdcd8170SKalle Valo 	if (!cookie) {
446bdcd8170SKalle Valo 		spin_unlock_bh(&ar->lock);
447bdcd8170SKalle Valo 		goto fail_tx;
448bdcd8170SKalle Valo 	}
449bdcd8170SKalle Valo 
450bdcd8170SKalle Valo 	/* update counts while the lock is held */
451bdcd8170SKalle Valo 	ar->tx_pending[eid]++;
452bdcd8170SKalle Valo 	ar->total_tx_data_pend++;
453bdcd8170SKalle Valo 
454bdcd8170SKalle Valo 	spin_unlock_bh(&ar->lock);
455bdcd8170SKalle Valo 
45600b1edf1SJouni Malinen 	if (!IS_ALIGNED((unsigned long) skb->data - HTC_HDR_LENGTH, 4) &&
45700b1edf1SJouni Malinen 	    skb_cloned(skb)) {
45800b1edf1SJouni Malinen 		/*
45900b1edf1SJouni Malinen 		 * We will touch (move the buffer data to align it. Since the
46000b1edf1SJouni Malinen 		 * skb buffer is cloned and not only the header is changed, we
46100b1edf1SJouni Malinen 		 * have to copy it to allow the changes. Since we are copying
46200b1edf1SJouni Malinen 		 * the data here, we may as well align it by reserving suitable
46300b1edf1SJouni Malinen 		 * headroom to avoid the memmove in ath6kl_htc_tx_buf_align().
46400b1edf1SJouni Malinen 		 */
46500b1edf1SJouni Malinen 		struct sk_buff *nskb;
46600b1edf1SJouni Malinen 
46700b1edf1SJouni Malinen 		nskb = skb_copy_expand(skb, HTC_HDR_LENGTH, 0, GFP_ATOMIC);
46800b1edf1SJouni Malinen 		if (nskb == NULL)
46900b1edf1SJouni Malinen 			goto fail_tx;
47000b1edf1SJouni Malinen 		kfree_skb(skb);
47100b1edf1SJouni Malinen 		skb = nskb;
47200b1edf1SJouni Malinen 	}
47300b1edf1SJouni Malinen 
474bdcd8170SKalle Valo 	cookie->skb = skb;
475bdcd8170SKalle Valo 	cookie->map_no = map_no;
476bdcd8170SKalle Valo 	set_htc_pkt_info(&cookie->htc_pkt, cookie, skb->data, skb->len,
477bdcd8170SKalle Valo 			 eid, htc_tag);
478bdcd8170SKalle Valo 
479ef094103SKalle Valo 	ath6kl_dbg_dump(ATH6KL_DBG_RAW_BYTES, __func__, "tx ",
480ef094103SKalle Valo 			skb->data, skb->len);
481bdcd8170SKalle Valo 
482bdcd8170SKalle Valo 	/*
483bdcd8170SKalle Valo 	 * HTC interface is asynchronous, if this fails, cleanup will
484bdcd8170SKalle Valo 	 * happen in the ath6kl_tx_complete callback.
485bdcd8170SKalle Valo 	 */
486ad226ec2SKalle Valo 	ath6kl_htc_tx(ar->htc_target, &cookie->htc_pkt);
487bdcd8170SKalle Valo 
488bdcd8170SKalle Valo 	return 0;
489bdcd8170SKalle Valo 
490bdcd8170SKalle Valo fail_tx:
491bdcd8170SKalle Valo 	dev_kfree_skb(skb);
492bdcd8170SKalle Valo 
493b95907a7SVasanthakumar Thiagarajan 	vif->net_stats.tx_dropped++;
494b95907a7SVasanthakumar Thiagarajan 	vif->net_stats.tx_aborted_errors++;
495bdcd8170SKalle Valo 
496bdcd8170SKalle Valo 	return 0;
497bdcd8170SKalle Valo }
498bdcd8170SKalle Valo 
499bdcd8170SKalle Valo /* indicate tx activity or inactivity on a WMI stream */
500bdcd8170SKalle Valo void ath6kl_indicate_tx_activity(void *devt, u8 traffic_class, bool active)
501bdcd8170SKalle Valo {
502bdcd8170SKalle Valo 	struct ath6kl *ar = devt;
503bdcd8170SKalle Valo 	enum htc_endpoint_id eid;
504bdcd8170SKalle Valo 	int i;
505bdcd8170SKalle Valo 
506bdcd8170SKalle Valo 	eid = ar->ac2ep_map[traffic_class];
507bdcd8170SKalle Valo 
508bdcd8170SKalle Valo 	if (!test_bit(WMI_ENABLED, &ar->flag))
509bdcd8170SKalle Valo 		goto notify_htc;
510bdcd8170SKalle Valo 
511bdcd8170SKalle Valo 	spin_lock_bh(&ar->lock);
512bdcd8170SKalle Valo 
513bdcd8170SKalle Valo 	ar->ac_stream_active[traffic_class] = active;
514bdcd8170SKalle Valo 
515bdcd8170SKalle Valo 	if (active) {
516bdcd8170SKalle Valo 		/*
517bdcd8170SKalle Valo 		 * Keep track of the active stream with the highest
518bdcd8170SKalle Valo 		 * priority.
519bdcd8170SKalle Valo 		 */
520bdcd8170SKalle Valo 		if (ar->ac_stream_pri_map[traffic_class] >
521bdcd8170SKalle Valo 		    ar->hiac_stream_active_pri)
522bdcd8170SKalle Valo 			/* set the new highest active priority */
523bdcd8170SKalle Valo 			ar->hiac_stream_active_pri =
524bdcd8170SKalle Valo 					ar->ac_stream_pri_map[traffic_class];
525bdcd8170SKalle Valo 
526bdcd8170SKalle Valo 	} else {
527bdcd8170SKalle Valo 		/*
528bdcd8170SKalle Valo 		 * We may have to search for the next active stream
529bdcd8170SKalle Valo 		 * that is the highest priority.
530bdcd8170SKalle Valo 		 */
531bdcd8170SKalle Valo 		if (ar->hiac_stream_active_pri ==
532bdcd8170SKalle Valo 			ar->ac_stream_pri_map[traffic_class]) {
533bdcd8170SKalle Valo 			/*
534bdcd8170SKalle Valo 			 * The highest priority stream just went inactive
535bdcd8170SKalle Valo 			 * reset and search for the "next" highest "active"
536bdcd8170SKalle Valo 			 * priority stream.
537bdcd8170SKalle Valo 			 */
538bdcd8170SKalle Valo 			ar->hiac_stream_active_pri = 0;
539bdcd8170SKalle Valo 
540bdcd8170SKalle Valo 			for (i = 0; i < WMM_NUM_AC; i++) {
541bdcd8170SKalle Valo 				if (ar->ac_stream_active[i] &&
542bdcd8170SKalle Valo 				    (ar->ac_stream_pri_map[i] >
543bdcd8170SKalle Valo 				     ar->hiac_stream_active_pri))
544bdcd8170SKalle Valo 					/*
545bdcd8170SKalle Valo 					 * Set the new highest active
546bdcd8170SKalle Valo 					 * priority.
547bdcd8170SKalle Valo 					 */
548bdcd8170SKalle Valo 					ar->hiac_stream_active_pri =
549bdcd8170SKalle Valo 						ar->ac_stream_pri_map[i];
550bdcd8170SKalle Valo 			}
551bdcd8170SKalle Valo 		}
552bdcd8170SKalle Valo 	}
553bdcd8170SKalle Valo 
554bdcd8170SKalle Valo 	spin_unlock_bh(&ar->lock);
555bdcd8170SKalle Valo 
556bdcd8170SKalle Valo notify_htc:
557bdcd8170SKalle Valo 	/* notify HTC, this may cause credit distribution changes */
558ad226ec2SKalle Valo 	ath6kl_htc_indicate_activity_change(ar->htc_target, eid, active);
559bdcd8170SKalle Valo }
560bdcd8170SKalle Valo 
561bdcd8170SKalle Valo enum htc_send_full_action ath6kl_tx_queue_full(struct htc_target *target,
562bdcd8170SKalle Valo 					       struct htc_packet *packet)
563bdcd8170SKalle Valo {
564bdcd8170SKalle Valo 	struct ath6kl *ar = target->dev->ar;
565990bd915SVasanthakumar Thiagarajan 	struct ath6kl_vif *vif;
566bdcd8170SKalle Valo 	enum htc_endpoint_id endpoint = packet->endpoint;
567990bd915SVasanthakumar Thiagarajan 	enum htc_send_full_action action = HTC_SEND_FULL_KEEP;
568bdcd8170SKalle Valo 
569bdcd8170SKalle Valo 	if (endpoint == ar->ctrl_ep) {
570bdcd8170SKalle Valo 		/*
571bdcd8170SKalle Valo 		 * Under normal WMI if this is getting full, then something
572bdcd8170SKalle Valo 		 * is running rampant the host should not be exhausting the
573bdcd8170SKalle Valo 		 * WMI queue with too many commands the only exception to
574bdcd8170SKalle Valo 		 * this is during testing using endpointping.
575bdcd8170SKalle Valo 		 */
576bdcd8170SKalle Valo 		set_bit(WMI_CTRL_EP_FULL, &ar->flag);
577bdcd8170SKalle Valo 		ath6kl_err("wmi ctrl ep is full\n");
578901db39cSVasanthakumar Thiagarajan 		return action;
579bdcd8170SKalle Valo 	}
580bdcd8170SKalle Valo 
581bdcd8170SKalle Valo 	if (packet->info.tx.tag == ATH6KL_CONTROL_PKT_TAG)
582901db39cSVasanthakumar Thiagarajan 		return action;
583bdcd8170SKalle Valo 
584bdcd8170SKalle Valo 	/*
585bdcd8170SKalle Valo 	 * The last MAX_HI_COOKIE_NUM "batch" of cookies are reserved for
586bdcd8170SKalle Valo 	 * the highest active stream.
587bdcd8170SKalle Valo 	 */
588bdcd8170SKalle Valo 	if (ar->ac_stream_pri_map[ar->ep2ac_map[endpoint]] <
589bdcd8170SKalle Valo 	    ar->hiac_stream_active_pri &&
590901db39cSVasanthakumar Thiagarajan 	    ar->cookie_count <= MAX_HI_COOKIE_NUM)
591bdcd8170SKalle Valo 		/*
592bdcd8170SKalle Valo 		 * Give preference to the highest priority stream by
593bdcd8170SKalle Valo 		 * dropping the packets which overflowed.
594bdcd8170SKalle Valo 		 */
595990bd915SVasanthakumar Thiagarajan 		action = HTC_SEND_FULL_DROP;
596bdcd8170SKalle Valo 
597990bd915SVasanthakumar Thiagarajan 	/* FIXME: Locking */
59811f6e40dSVasanthakumar Thiagarajan 	spin_lock_bh(&ar->list_lock);
599990bd915SVasanthakumar Thiagarajan 	list_for_each_entry(vif, &ar->vif_list, list) {
600901db39cSVasanthakumar Thiagarajan 		if (vif->nw_type == ADHOC_NETWORK ||
601901db39cSVasanthakumar Thiagarajan 		    action != HTC_SEND_FULL_DROP) {
60211f6e40dSVasanthakumar Thiagarajan 			spin_unlock_bh(&ar->list_lock);
603990bd915SVasanthakumar Thiagarajan 
60459c98449SVasanthakumar Thiagarajan 			set_bit(NETQ_STOPPED, &vif->flags);
60528ae58ddSVasanthakumar Thiagarajan 			netif_stop_queue(vif->ndev);
606bdcd8170SKalle Valo 
607990bd915SVasanthakumar Thiagarajan 			return action;
608990bd915SVasanthakumar Thiagarajan 		}
609990bd915SVasanthakumar Thiagarajan 	}
61011f6e40dSVasanthakumar Thiagarajan 	spin_unlock_bh(&ar->list_lock);
611990bd915SVasanthakumar Thiagarajan 
612990bd915SVasanthakumar Thiagarajan 	return action;
613bdcd8170SKalle Valo }
614bdcd8170SKalle Valo 
615bdcd8170SKalle Valo /* TODO this needs to be looked at */
616990bd915SVasanthakumar Thiagarajan static void ath6kl_tx_clear_node_map(struct ath6kl_vif *vif,
617bdcd8170SKalle Valo 				     enum htc_endpoint_id eid, u32 map_no)
618bdcd8170SKalle Valo {
619990bd915SVasanthakumar Thiagarajan 	struct ath6kl *ar = vif->ar;
620bdcd8170SKalle Valo 	u32 i;
621bdcd8170SKalle Valo 
622f5938f24SVasanthakumar Thiagarajan 	if (vif->nw_type != ADHOC_NETWORK)
623bdcd8170SKalle Valo 		return;
624bdcd8170SKalle Valo 
625bdcd8170SKalle Valo 	if (!ar->ibss_ps_enable)
626bdcd8170SKalle Valo 		return;
627bdcd8170SKalle Valo 
628bdcd8170SKalle Valo 	if (eid == ar->ctrl_ep)
629bdcd8170SKalle Valo 		return;
630bdcd8170SKalle Valo 
631bdcd8170SKalle Valo 	if (map_no == 0)
632bdcd8170SKalle Valo 		return;
633bdcd8170SKalle Valo 
634bdcd8170SKalle Valo 	map_no--;
635bdcd8170SKalle Valo 	ar->node_map[map_no].tx_pend--;
636bdcd8170SKalle Valo 
637bdcd8170SKalle Valo 	if (ar->node_map[map_no].tx_pend)
638bdcd8170SKalle Valo 		return;
639bdcd8170SKalle Valo 
640bdcd8170SKalle Valo 	if (map_no != (ar->node_num - 1))
641bdcd8170SKalle Valo 		return;
642bdcd8170SKalle Valo 
643bdcd8170SKalle Valo 	for (i = ar->node_num; i > 0; i--) {
644bdcd8170SKalle Valo 		if (ar->node_map[i - 1].tx_pend)
645bdcd8170SKalle Valo 			break;
646bdcd8170SKalle Valo 
647bdcd8170SKalle Valo 		memset(&ar->node_map[i - 1], 0,
648bdcd8170SKalle Valo 		       sizeof(struct ath6kl_node_mapping));
649bdcd8170SKalle Valo 		ar->node_num--;
650bdcd8170SKalle Valo 	}
651bdcd8170SKalle Valo }
652bdcd8170SKalle Valo 
653bdcd8170SKalle Valo void ath6kl_tx_complete(void *context, struct list_head *packet_queue)
654bdcd8170SKalle Valo {
655bdcd8170SKalle Valo 	struct ath6kl *ar = context;
656bdcd8170SKalle Valo 	struct sk_buff_head skb_queue;
657bdcd8170SKalle Valo 	struct htc_packet *packet;
658bdcd8170SKalle Valo 	struct sk_buff *skb;
659bdcd8170SKalle Valo 	struct ath6kl_cookie *ath6kl_cookie;
660bdcd8170SKalle Valo 	u32 map_no = 0;
661bdcd8170SKalle Valo 	int status;
662bdcd8170SKalle Valo 	enum htc_endpoint_id eid;
663bdcd8170SKalle Valo 	bool wake_event = false;
66471f96ee6SKalle Valo 	bool flushing[ATH6KL_VIF_MAX] = {false};
6656765d0aaSVasanthakumar Thiagarajan 	u8 if_idx;
666990bd915SVasanthakumar Thiagarajan 	struct ath6kl_vif *vif;
667bdcd8170SKalle Valo 
668bdcd8170SKalle Valo 	skb_queue_head_init(&skb_queue);
669bdcd8170SKalle Valo 
670bdcd8170SKalle Valo 	/* lock the driver as we update internal state */
671bdcd8170SKalle Valo 	spin_lock_bh(&ar->lock);
672bdcd8170SKalle Valo 
673bdcd8170SKalle Valo 	/* reap completed packets */
674bdcd8170SKalle Valo 	while (!list_empty(packet_queue)) {
675bdcd8170SKalle Valo 
676bdcd8170SKalle Valo 		packet = list_first_entry(packet_queue, struct htc_packet,
677bdcd8170SKalle Valo 					  list);
678bdcd8170SKalle Valo 		list_del(&packet->list);
679bdcd8170SKalle Valo 
680bdcd8170SKalle Valo 		ath6kl_cookie = (struct ath6kl_cookie *)packet->pkt_cntxt;
681bdcd8170SKalle Valo 		if (!ath6kl_cookie)
682bdcd8170SKalle Valo 			goto fatal;
683bdcd8170SKalle Valo 
684bdcd8170SKalle Valo 		status = packet->status;
685bdcd8170SKalle Valo 		skb = ath6kl_cookie->skb;
686bdcd8170SKalle Valo 		eid = packet->endpoint;
687bdcd8170SKalle Valo 		map_no = ath6kl_cookie->map_no;
688bdcd8170SKalle Valo 
689bdcd8170SKalle Valo 		if (!skb || !skb->data)
690bdcd8170SKalle Valo 			goto fatal;
691bdcd8170SKalle Valo 
692bdcd8170SKalle Valo 		__skb_queue_tail(&skb_queue, skb);
693bdcd8170SKalle Valo 
694bdcd8170SKalle Valo 		if (!status && (packet->act_len != skb->len))
695bdcd8170SKalle Valo 			goto fatal;
696bdcd8170SKalle Valo 
697bdcd8170SKalle Valo 		ar->tx_pending[eid]--;
698bdcd8170SKalle Valo 
699bdcd8170SKalle Valo 		if (eid != ar->ctrl_ep)
700bdcd8170SKalle Valo 			ar->total_tx_data_pend--;
701bdcd8170SKalle Valo 
702bdcd8170SKalle Valo 		if (eid == ar->ctrl_ep) {
703bdcd8170SKalle Valo 			if (test_bit(WMI_CTRL_EP_FULL, &ar->flag))
704bdcd8170SKalle Valo 				clear_bit(WMI_CTRL_EP_FULL, &ar->flag);
705bdcd8170SKalle Valo 
706bdcd8170SKalle Valo 			if (ar->tx_pending[eid] == 0)
707bdcd8170SKalle Valo 				wake_event = true;
708bdcd8170SKalle Valo 		}
709bdcd8170SKalle Valo 
7106765d0aaSVasanthakumar Thiagarajan 		if (eid == ar->ctrl_ep) {
7116765d0aaSVasanthakumar Thiagarajan 			if_idx = wmi_cmd_hdr_get_if_idx(
712f3803eb2SVasanthakumar Thiagarajan 				(struct wmi_cmd_hdr *) packet->buf);
7136765d0aaSVasanthakumar Thiagarajan 		} else {
7146765d0aaSVasanthakumar Thiagarajan 			if_idx = wmi_data_hdr_get_if_idx(
715f3803eb2SVasanthakumar Thiagarajan 				(struct wmi_data_hdr *) packet->buf);
7166765d0aaSVasanthakumar Thiagarajan 		}
7176765d0aaSVasanthakumar Thiagarajan 
7186765d0aaSVasanthakumar Thiagarajan 		vif = ath6kl_get_vif_by_index(ar, if_idx);
7196765d0aaSVasanthakumar Thiagarajan 		if (!vif) {
7206765d0aaSVasanthakumar Thiagarajan 			ath6kl_free_cookie(ar, ath6kl_cookie);
7216765d0aaSVasanthakumar Thiagarajan 			continue;
7226765d0aaSVasanthakumar Thiagarajan 		}
7236765d0aaSVasanthakumar Thiagarajan 
724bdcd8170SKalle Valo 		if (status) {
725bdcd8170SKalle Valo 			if (status == -ECANCELED)
726bdcd8170SKalle Valo 				/* a packet was flushed  */
727990bd915SVasanthakumar Thiagarajan 				flushing[if_idx] = true;
728bdcd8170SKalle Valo 
729b95907a7SVasanthakumar Thiagarajan 			vif->net_stats.tx_errors++;
730bdcd8170SKalle Valo 
731778e6502SKalle Valo 			if (status != -ENOSPC && status != -ECANCELED)
732778e6502SKalle Valo 				ath6kl_warn("tx complete error: %d\n", status);
733778e6502SKalle Valo 
734bdcd8170SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_WLAN_TX,
735bdcd8170SKalle Valo 				   "%s: skb=0x%p data=0x%p len=0x%x eid=%d %s\n",
736bdcd8170SKalle Valo 				   __func__, skb, packet->buf, packet->act_len,
737bdcd8170SKalle Valo 				   eid, "error!");
738bdcd8170SKalle Valo 		} else {
739bdcd8170SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_WLAN_TX,
740bdcd8170SKalle Valo 				   "%s: skb=0x%p data=0x%p len=0x%x eid=%d %s\n",
741bdcd8170SKalle Valo 				   __func__, skb, packet->buf, packet->act_len,
742bdcd8170SKalle Valo 				   eid, "OK");
743bdcd8170SKalle Valo 
744990bd915SVasanthakumar Thiagarajan 			flushing[if_idx] = false;
745b95907a7SVasanthakumar Thiagarajan 			vif->net_stats.tx_packets++;
746b95907a7SVasanthakumar Thiagarajan 			vif->net_stats.tx_bytes += skb->len;
747bdcd8170SKalle Valo 		}
748bdcd8170SKalle Valo 
749990bd915SVasanthakumar Thiagarajan 		ath6kl_tx_clear_node_map(vif, eid, map_no);
750bdcd8170SKalle Valo 
751bdcd8170SKalle Valo 		ath6kl_free_cookie(ar, ath6kl_cookie);
752bdcd8170SKalle Valo 
75359c98449SVasanthakumar Thiagarajan 		if (test_bit(NETQ_STOPPED, &vif->flags))
75459c98449SVasanthakumar Thiagarajan 			clear_bit(NETQ_STOPPED, &vif->flags);
755bdcd8170SKalle Valo 	}
756bdcd8170SKalle Valo 
757bdcd8170SKalle Valo 	spin_unlock_bh(&ar->lock);
758bdcd8170SKalle Valo 
759bdcd8170SKalle Valo 	__skb_queue_purge(&skb_queue);
760bdcd8170SKalle Valo 
761990bd915SVasanthakumar Thiagarajan 	/* FIXME: Locking */
76211f6e40dSVasanthakumar Thiagarajan 	spin_lock_bh(&ar->list_lock);
763990bd915SVasanthakumar Thiagarajan 	list_for_each_entry(vif, &ar->vif_list, list) {
764990bd915SVasanthakumar Thiagarajan 		if (test_bit(CONNECTED, &vif->flags) &&
765990bd915SVasanthakumar Thiagarajan 		    !flushing[vif->fw_vif_idx]) {
76611f6e40dSVasanthakumar Thiagarajan 			spin_unlock_bh(&ar->list_lock);
76728ae58ddSVasanthakumar Thiagarajan 			netif_wake_queue(vif->ndev);
76811f6e40dSVasanthakumar Thiagarajan 			spin_lock_bh(&ar->list_lock);
769bdcd8170SKalle Valo 		}
770990bd915SVasanthakumar Thiagarajan 	}
77111f6e40dSVasanthakumar Thiagarajan 	spin_unlock_bh(&ar->list_lock);
772bdcd8170SKalle Valo 
773bdcd8170SKalle Valo 	if (wake_event)
774bdcd8170SKalle Valo 		wake_up(&ar->event_wq);
775bdcd8170SKalle Valo 
776bdcd8170SKalle Valo 	return;
777bdcd8170SKalle Valo 
778bdcd8170SKalle Valo fatal:
779bdcd8170SKalle Valo 	WARN_ON(1);
780bdcd8170SKalle Valo 	spin_unlock_bh(&ar->lock);
781bdcd8170SKalle Valo 	return;
782bdcd8170SKalle Valo }
783bdcd8170SKalle Valo 
784bdcd8170SKalle Valo void ath6kl_tx_data_cleanup(struct ath6kl *ar)
785bdcd8170SKalle Valo {
786bdcd8170SKalle Valo 	int i;
787bdcd8170SKalle Valo 
788bdcd8170SKalle Valo 	/* flush all the data (non-control) streams */
789bdcd8170SKalle Valo 	for (i = 0; i < WMM_NUM_AC; i++)
790ad226ec2SKalle Valo 		ath6kl_htc_flush_txep(ar->htc_target, ar->ac2ep_map[i],
791bdcd8170SKalle Valo 				      ATH6KL_DATA_PKT_TAG);
792bdcd8170SKalle Valo }
793bdcd8170SKalle Valo 
794bdcd8170SKalle Valo /* Rx functions */
795bdcd8170SKalle Valo 
796bdcd8170SKalle Valo static void ath6kl_deliver_frames_to_nw_stack(struct net_device *dev,
797bdcd8170SKalle Valo 					      struct sk_buff *skb)
798bdcd8170SKalle Valo {
799bdcd8170SKalle Valo 	if (!skb)
800bdcd8170SKalle Valo 		return;
801bdcd8170SKalle Valo 
802bdcd8170SKalle Valo 	skb->dev = dev;
803bdcd8170SKalle Valo 
804bdcd8170SKalle Valo 	if (!(skb->dev->flags & IFF_UP)) {
805bdcd8170SKalle Valo 		dev_kfree_skb(skb);
806bdcd8170SKalle Valo 		return;
807bdcd8170SKalle Valo 	}
808bdcd8170SKalle Valo 
809bdcd8170SKalle Valo 	skb->protocol = eth_type_trans(skb, skb->dev);
810bdcd8170SKalle Valo 
811bdcd8170SKalle Valo 	netif_rx_ni(skb);
812bdcd8170SKalle Valo }
813bdcd8170SKalle Valo 
814bdcd8170SKalle Valo static void ath6kl_alloc_netbufs(struct sk_buff_head *q, u16 num)
815bdcd8170SKalle Valo {
816bdcd8170SKalle Valo 	struct sk_buff *skb;
817bdcd8170SKalle Valo 
818bdcd8170SKalle Valo 	while (num) {
819bdcd8170SKalle Valo 		skb = ath6kl_buf_alloc(ATH6KL_BUFFER_SIZE);
820bdcd8170SKalle Valo 		if (!skb) {
821bdcd8170SKalle Valo 			ath6kl_err("netbuf allocation failed\n");
822bdcd8170SKalle Valo 			return;
823bdcd8170SKalle Valo 		}
824bdcd8170SKalle Valo 		skb_queue_tail(q, skb);
825bdcd8170SKalle Valo 		num--;
826bdcd8170SKalle Valo 	}
827bdcd8170SKalle Valo }
828bdcd8170SKalle Valo 
829bdcd8170SKalle Valo static struct sk_buff *aggr_get_free_skb(struct aggr_info *p_aggr)
830bdcd8170SKalle Valo {
831bdcd8170SKalle Valo 	struct sk_buff *skb = NULL;
832bdcd8170SKalle Valo 
8337baef812SVasanthakumar Thiagarajan 	if (skb_queue_len(&p_aggr->rx_amsdu_freeq) <
8347baef812SVasanthakumar Thiagarajan 	    (AGGR_NUM_OF_FREE_NETBUFS >> 2))
8357baef812SVasanthakumar Thiagarajan 		ath6kl_alloc_netbufs(&p_aggr->rx_amsdu_freeq,
8367baef812SVasanthakumar Thiagarajan 				     AGGR_NUM_OF_FREE_NETBUFS);
837bdcd8170SKalle Valo 
8387baef812SVasanthakumar Thiagarajan 	skb = skb_dequeue(&p_aggr->rx_amsdu_freeq);
839bdcd8170SKalle Valo 
840bdcd8170SKalle Valo 	return skb;
841bdcd8170SKalle Valo }
842bdcd8170SKalle Valo 
843bdcd8170SKalle Valo void ath6kl_rx_refill(struct htc_target *target, enum htc_endpoint_id endpoint)
844bdcd8170SKalle Valo {
845bdcd8170SKalle Valo 	struct ath6kl *ar = target->dev->ar;
846bdcd8170SKalle Valo 	struct sk_buff *skb;
847bdcd8170SKalle Valo 	int rx_buf;
848bdcd8170SKalle Valo 	int n_buf_refill;
849bdcd8170SKalle Valo 	struct htc_packet *packet;
850bdcd8170SKalle Valo 	struct list_head queue;
851bdcd8170SKalle Valo 
852bdcd8170SKalle Valo 	n_buf_refill = ATH6KL_MAX_RX_BUFFERS -
853ad226ec2SKalle Valo 			  ath6kl_htc_get_rxbuf_num(ar->htc_target, endpoint);
854bdcd8170SKalle Valo 
855bdcd8170SKalle Valo 	if (n_buf_refill <= 0)
856bdcd8170SKalle Valo 		return;
857bdcd8170SKalle Valo 
858bdcd8170SKalle Valo 	INIT_LIST_HEAD(&queue);
859bdcd8170SKalle Valo 
860bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_WLAN_RX,
861bdcd8170SKalle Valo 		   "%s: providing htc with %d buffers at eid=%d\n",
862bdcd8170SKalle Valo 		   __func__, n_buf_refill, endpoint);
863bdcd8170SKalle Valo 
864bdcd8170SKalle Valo 	for (rx_buf = 0; rx_buf < n_buf_refill; rx_buf++) {
865bdcd8170SKalle Valo 		skb = ath6kl_buf_alloc(ATH6KL_BUFFER_SIZE);
866bdcd8170SKalle Valo 		if (!skb)
867bdcd8170SKalle Valo 			break;
868bdcd8170SKalle Valo 
869bdcd8170SKalle Valo 		packet = (struct htc_packet *) skb->head;
87094e532d1SVasanthakumar Thiagarajan 		if (!IS_ALIGNED((unsigned long) skb->data, 4))
8711df94a85SVasanthakumar Thiagarajan 			skb->data = PTR_ALIGN(skb->data - 4, 4);
872bdcd8170SKalle Valo 		set_htc_rxpkt_info(packet, skb, skb->data,
873bdcd8170SKalle Valo 				ATH6KL_BUFFER_SIZE, endpoint);
874bdcd8170SKalle Valo 		list_add_tail(&packet->list, &queue);
875bdcd8170SKalle Valo 	}
876bdcd8170SKalle Valo 
877bdcd8170SKalle Valo 	if (!list_empty(&queue))
878ad226ec2SKalle Valo 		ath6kl_htc_add_rxbuf_multiple(ar->htc_target, &queue);
879bdcd8170SKalle Valo }
880bdcd8170SKalle Valo 
881bdcd8170SKalle Valo void ath6kl_refill_amsdu_rxbufs(struct ath6kl *ar, int count)
882bdcd8170SKalle Valo {
883bdcd8170SKalle Valo 	struct htc_packet *packet;
884bdcd8170SKalle Valo 	struct sk_buff *skb;
885bdcd8170SKalle Valo 
886bdcd8170SKalle Valo 	while (count) {
887bdcd8170SKalle Valo 		skb = ath6kl_buf_alloc(ATH6KL_AMSDU_BUFFER_SIZE);
888bdcd8170SKalle Valo 		if (!skb)
889bdcd8170SKalle Valo 			return;
890bdcd8170SKalle Valo 
891bdcd8170SKalle Valo 		packet = (struct htc_packet *) skb->head;
89294e532d1SVasanthakumar Thiagarajan 		if (!IS_ALIGNED((unsigned long) skb->data, 4))
8931df94a85SVasanthakumar Thiagarajan 			skb->data = PTR_ALIGN(skb->data - 4, 4);
894bdcd8170SKalle Valo 		set_htc_rxpkt_info(packet, skb, skb->data,
895bdcd8170SKalle Valo 				   ATH6KL_AMSDU_BUFFER_SIZE, 0);
896bdcd8170SKalle Valo 		spin_lock_bh(&ar->lock);
897bdcd8170SKalle Valo 		list_add_tail(&packet->list, &ar->amsdu_rx_buffer_queue);
898bdcd8170SKalle Valo 		spin_unlock_bh(&ar->lock);
899bdcd8170SKalle Valo 		count--;
900bdcd8170SKalle Valo 	}
901bdcd8170SKalle Valo }
902bdcd8170SKalle Valo 
903bdcd8170SKalle Valo /*
904bdcd8170SKalle Valo  * Callback to allocate a receive buffer for a pending packet. We use a
905bdcd8170SKalle Valo  * pre-allocated list of buffers of maximum AMSDU size (4K).
906bdcd8170SKalle Valo  */
907bdcd8170SKalle Valo struct htc_packet *ath6kl_alloc_amsdu_rxbuf(struct htc_target *target,
908bdcd8170SKalle Valo 					    enum htc_endpoint_id endpoint,
909bdcd8170SKalle Valo 					    int len)
910bdcd8170SKalle Valo {
911bdcd8170SKalle Valo 	struct ath6kl *ar = target->dev->ar;
912bdcd8170SKalle Valo 	struct htc_packet *packet = NULL;
913bdcd8170SKalle Valo 	struct list_head *pkt_pos;
914bdcd8170SKalle Valo 	int refill_cnt = 0, depth = 0;
915bdcd8170SKalle Valo 
916bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_WLAN_RX, "%s: eid=%d, len:%d\n",
917bdcd8170SKalle Valo 		   __func__, endpoint, len);
918bdcd8170SKalle Valo 
919bdcd8170SKalle Valo 	if ((len <= ATH6KL_BUFFER_SIZE) ||
920bdcd8170SKalle Valo 	    (len > ATH6KL_AMSDU_BUFFER_SIZE))
921bdcd8170SKalle Valo 		return NULL;
922bdcd8170SKalle Valo 
923bdcd8170SKalle Valo 	spin_lock_bh(&ar->lock);
924bdcd8170SKalle Valo 
925bdcd8170SKalle Valo 	if (list_empty(&ar->amsdu_rx_buffer_queue)) {
926bdcd8170SKalle Valo 		spin_unlock_bh(&ar->lock);
927bdcd8170SKalle Valo 		refill_cnt = ATH6KL_MAX_AMSDU_RX_BUFFERS;
928bdcd8170SKalle Valo 		goto refill_buf;
929bdcd8170SKalle Valo 	}
930bdcd8170SKalle Valo 
931bdcd8170SKalle Valo 	packet = list_first_entry(&ar->amsdu_rx_buffer_queue,
932bdcd8170SKalle Valo 				  struct htc_packet, list);
933bdcd8170SKalle Valo 	list_del(&packet->list);
934bdcd8170SKalle Valo 	list_for_each(pkt_pos, &ar->amsdu_rx_buffer_queue)
935bdcd8170SKalle Valo 		depth++;
936bdcd8170SKalle Valo 
937bdcd8170SKalle Valo 	refill_cnt = ATH6KL_MAX_AMSDU_RX_BUFFERS - depth;
938bdcd8170SKalle Valo 	spin_unlock_bh(&ar->lock);
939bdcd8170SKalle Valo 
940bdcd8170SKalle Valo 	/* set actual endpoint ID */
941bdcd8170SKalle Valo 	packet->endpoint = endpoint;
942bdcd8170SKalle Valo 
943bdcd8170SKalle Valo refill_buf:
944bdcd8170SKalle Valo 	if (refill_cnt >= ATH6KL_AMSDU_REFILL_THRESHOLD)
945bdcd8170SKalle Valo 		ath6kl_refill_amsdu_rxbufs(ar, refill_cnt);
946bdcd8170SKalle Valo 
947bdcd8170SKalle Valo 	return packet;
948bdcd8170SKalle Valo }
949bdcd8170SKalle Valo 
950bdcd8170SKalle Valo static void aggr_slice_amsdu(struct aggr_info *p_aggr,
951bdcd8170SKalle Valo 			     struct rxtid *rxtid, struct sk_buff *skb)
952bdcd8170SKalle Valo {
953bdcd8170SKalle Valo 	struct sk_buff *new_skb;
954bdcd8170SKalle Valo 	struct ethhdr *hdr;
955bdcd8170SKalle Valo 	u16 frame_8023_len, payload_8023_len, mac_hdr_len, amsdu_len;
956bdcd8170SKalle Valo 	u8 *framep;
957bdcd8170SKalle Valo 
958bdcd8170SKalle Valo 	mac_hdr_len = sizeof(struct ethhdr);
959bdcd8170SKalle Valo 	framep = skb->data + mac_hdr_len;
960bdcd8170SKalle Valo 	amsdu_len = skb->len - mac_hdr_len;
961bdcd8170SKalle Valo 
962bdcd8170SKalle Valo 	while (amsdu_len > mac_hdr_len) {
963bdcd8170SKalle Valo 		hdr = (struct ethhdr *) framep;
964bdcd8170SKalle Valo 		payload_8023_len = ntohs(hdr->h_proto);
965bdcd8170SKalle Valo 
966bdcd8170SKalle Valo 		if (payload_8023_len < MIN_MSDU_SUBFRAME_PAYLOAD_LEN ||
967bdcd8170SKalle Valo 		    payload_8023_len > MAX_MSDU_SUBFRAME_PAYLOAD_LEN) {
968bdcd8170SKalle Valo 			ath6kl_err("802.3 AMSDU frame bound check failed. len %d\n",
969bdcd8170SKalle Valo 				   payload_8023_len);
970bdcd8170SKalle Valo 			break;
971bdcd8170SKalle Valo 		}
972bdcd8170SKalle Valo 
973bdcd8170SKalle Valo 		frame_8023_len = payload_8023_len + mac_hdr_len;
974bdcd8170SKalle Valo 		new_skb = aggr_get_free_skb(p_aggr);
975bdcd8170SKalle Valo 		if (!new_skb) {
976bdcd8170SKalle Valo 			ath6kl_err("no buffer available\n");
977bdcd8170SKalle Valo 			break;
978bdcd8170SKalle Valo 		}
979bdcd8170SKalle Valo 
980bdcd8170SKalle Valo 		memcpy(new_skb->data, framep, frame_8023_len);
981bdcd8170SKalle Valo 		skb_put(new_skb, frame_8023_len);
982bdcd8170SKalle Valo 		if (ath6kl_wmi_dot3_2_dix(new_skb)) {
983bdcd8170SKalle Valo 			ath6kl_err("dot3_2_dix error\n");
984bdcd8170SKalle Valo 			dev_kfree_skb(new_skb);
985bdcd8170SKalle Valo 			break;
986bdcd8170SKalle Valo 		}
987bdcd8170SKalle Valo 
988bdcd8170SKalle Valo 		skb_queue_tail(&rxtid->q, new_skb);
989bdcd8170SKalle Valo 
990bdcd8170SKalle Valo 		/* Is this the last subframe within this aggregate ? */
991bdcd8170SKalle Valo 		if ((amsdu_len - frame_8023_len) == 0)
992bdcd8170SKalle Valo 			break;
993bdcd8170SKalle Valo 
994bdcd8170SKalle Valo 		/* Add the length of A-MSDU subframe padding bytes -
995bdcd8170SKalle Valo 		 * Round to nearest word.
996bdcd8170SKalle Valo 		 */
99713e34ea1SVasanthakumar Thiagarajan 		frame_8023_len = ALIGN(frame_8023_len, 4);
998bdcd8170SKalle Valo 
999bdcd8170SKalle Valo 		framep += frame_8023_len;
1000bdcd8170SKalle Valo 		amsdu_len -= frame_8023_len;
1001bdcd8170SKalle Valo 	}
1002bdcd8170SKalle Valo 
1003bdcd8170SKalle Valo 	dev_kfree_skb(skb);
1004bdcd8170SKalle Valo }
1005bdcd8170SKalle Valo 
1006bdcd8170SKalle Valo static void aggr_deque_frms(struct aggr_info *p_aggr, u8 tid,
1007bdcd8170SKalle Valo 			    u16 seq_no, u8 order)
1008bdcd8170SKalle Valo {
1009bdcd8170SKalle Valo 	struct sk_buff *skb;
1010bdcd8170SKalle Valo 	struct rxtid *rxtid;
1011bdcd8170SKalle Valo 	struct skb_hold_q *node;
1012bdcd8170SKalle Valo 	u16 idx, idx_end, seq_end;
1013bdcd8170SKalle Valo 	struct rxtid_stats *stats;
10147baef812SVasanthakumar Thiagarajan 	struct aggr_info_conn *agg_conn;
1015bdcd8170SKalle Valo 
10167baef812SVasanthakumar Thiagarajan 	if (!p_aggr || !p_aggr->aggr_conn)
1017bdcd8170SKalle Valo 		return;
1018bdcd8170SKalle Valo 
10197baef812SVasanthakumar Thiagarajan 	agg_conn = p_aggr->aggr_conn;
10207baef812SVasanthakumar Thiagarajan 	rxtid = &agg_conn->rx_tid[tid];
10217baef812SVasanthakumar Thiagarajan 	stats = &agg_conn->stat[tid];
1022bdcd8170SKalle Valo 
1023bdcd8170SKalle Valo 	idx = AGGR_WIN_IDX(rxtid->seq_next, rxtid->hold_q_sz);
1024bdcd8170SKalle Valo 
1025bdcd8170SKalle Valo 	/*
1026bdcd8170SKalle Valo 	 * idx_end is typically the last possible frame in the window,
1027bdcd8170SKalle Valo 	 * but changes to 'the' seq_no, when BAR comes. If seq_no
1028bdcd8170SKalle Valo 	 * is non-zero, we will go up to that and stop.
1029bdcd8170SKalle Valo 	 * Note: last seq no in current window will occupy the same
1030bdcd8170SKalle Valo 	 * index position as index that is just previous to start.
1031bdcd8170SKalle Valo 	 * An imp point : if win_sz is 7, for seq_no space of 4095,
1032bdcd8170SKalle Valo 	 * then, there would be holes when sequence wrap around occurs.
1033bdcd8170SKalle Valo 	 * Target should judiciously choose the win_sz, based on
1034bdcd8170SKalle Valo 	 * this condition. For 4095, (TID_WINDOW_SZ = 2 x win_sz
1035bdcd8170SKalle Valo 	 * 2, 4, 8, 16 win_sz works fine).
1036bdcd8170SKalle Valo 	 * We must deque from "idx" to "idx_end", including both.
1037bdcd8170SKalle Valo 	 */
1038bdcd8170SKalle Valo 	seq_end = seq_no ? seq_no : rxtid->seq_next;
1039bdcd8170SKalle Valo 	idx_end = AGGR_WIN_IDX(seq_end, rxtid->hold_q_sz);
1040bdcd8170SKalle Valo 
1041bdcd8170SKalle Valo 	spin_lock_bh(&rxtid->lock);
1042bdcd8170SKalle Valo 
1043bdcd8170SKalle Valo 	do {
1044bdcd8170SKalle Valo 		node = &rxtid->hold_q[idx];
1045bdcd8170SKalle Valo 		if ((order == 1) && (!node->skb))
1046bdcd8170SKalle Valo 			break;
1047bdcd8170SKalle Valo 
1048bdcd8170SKalle Valo 		if (node->skb) {
1049bdcd8170SKalle Valo 			if (node->is_amsdu)
1050bdcd8170SKalle Valo 				aggr_slice_amsdu(p_aggr, rxtid, node->skb);
1051bdcd8170SKalle Valo 			else
1052bdcd8170SKalle Valo 				skb_queue_tail(&rxtid->q, node->skb);
1053bdcd8170SKalle Valo 			node->skb = NULL;
1054bdcd8170SKalle Valo 		} else
1055bdcd8170SKalle Valo 			stats->num_hole++;
1056bdcd8170SKalle Valo 
1057bdcd8170SKalle Valo 		rxtid->seq_next = ATH6KL_NEXT_SEQ_NO(rxtid->seq_next);
1058bdcd8170SKalle Valo 		idx = AGGR_WIN_IDX(rxtid->seq_next, rxtid->hold_q_sz);
1059bdcd8170SKalle Valo 	} while (idx != idx_end);
1060bdcd8170SKalle Valo 
1061bdcd8170SKalle Valo 	spin_unlock_bh(&rxtid->lock);
1062bdcd8170SKalle Valo 
1063bdcd8170SKalle Valo 	stats->num_delivered += skb_queue_len(&rxtid->q);
1064bdcd8170SKalle Valo 
1065bdcd8170SKalle Valo 	while ((skb = skb_dequeue(&rxtid->q)))
10667baef812SVasanthakumar Thiagarajan 		ath6kl_deliver_frames_to_nw_stack(agg_conn->dev, skb);
1067bdcd8170SKalle Valo }
1068bdcd8170SKalle Valo 
1069bdcd8170SKalle Valo static bool aggr_process_recv_frm(struct aggr_info *agg_info, u8 tid,
1070bdcd8170SKalle Valo 				  u16 seq_no,
1071bdcd8170SKalle Valo 				  bool is_amsdu, struct sk_buff *frame)
1072bdcd8170SKalle Valo {
1073bdcd8170SKalle Valo 	struct rxtid *rxtid;
1074bdcd8170SKalle Valo 	struct rxtid_stats *stats;
1075bdcd8170SKalle Valo 	struct sk_buff *skb;
1076bdcd8170SKalle Valo 	struct skb_hold_q *node;
1077bdcd8170SKalle Valo 	u16 idx, st, cur, end;
1078bdcd8170SKalle Valo 	bool is_queued = false;
1079bdcd8170SKalle Valo 	u16 extended_end;
10807baef812SVasanthakumar Thiagarajan 	struct aggr_info_conn *agg_conn = agg_info->aggr_conn;
1081bdcd8170SKalle Valo 
10827baef812SVasanthakumar Thiagarajan 	rxtid = &agg_conn->rx_tid[tid];
10837baef812SVasanthakumar Thiagarajan 	stats = &agg_conn->stat[tid];
1084bdcd8170SKalle Valo 
1085bdcd8170SKalle Valo 	stats->num_into_aggr++;
1086bdcd8170SKalle Valo 
1087bdcd8170SKalle Valo 	if (!rxtid->aggr) {
1088bdcd8170SKalle Valo 		if (is_amsdu) {
1089bdcd8170SKalle Valo 			aggr_slice_amsdu(agg_info, rxtid, frame);
1090bdcd8170SKalle Valo 			is_queued = true;
1091bdcd8170SKalle Valo 			stats->num_amsdu++;
1092bdcd8170SKalle Valo 			while ((skb = skb_dequeue(&rxtid->q)))
10937baef812SVasanthakumar Thiagarajan 				ath6kl_deliver_frames_to_nw_stack(agg_conn->dev,
1094bdcd8170SKalle Valo 								  skb);
1095bdcd8170SKalle Valo 		}
1096bdcd8170SKalle Valo 		return is_queued;
1097bdcd8170SKalle Valo 	}
1098bdcd8170SKalle Valo 
1099bdcd8170SKalle Valo 	/* Check the incoming sequence no, if it's in the window */
1100bdcd8170SKalle Valo 	st = rxtid->seq_next;
1101bdcd8170SKalle Valo 	cur = seq_no;
1102bdcd8170SKalle Valo 	end = (st + rxtid->hold_q_sz-1) & ATH6KL_MAX_SEQ_NO;
1103bdcd8170SKalle Valo 
1104bdcd8170SKalle Valo 	if (((st < end) && (cur < st || cur > end)) ||
1105bdcd8170SKalle Valo 	    ((st > end) && (cur > end) && (cur < st))) {
1106bdcd8170SKalle Valo 		extended_end = (end + rxtid->hold_q_sz - 1) &
1107bdcd8170SKalle Valo 			ATH6KL_MAX_SEQ_NO;
1108bdcd8170SKalle Valo 
1109bdcd8170SKalle Valo 		if (((end < extended_end) &&
1110bdcd8170SKalle Valo 		     (cur < end || cur > extended_end)) ||
1111bdcd8170SKalle Valo 		    ((end > extended_end) && (cur > extended_end) &&
1112bdcd8170SKalle Valo 		     (cur < end))) {
1113bdcd8170SKalle Valo 			aggr_deque_frms(agg_info, tid, 0, 0);
1114bdcd8170SKalle Valo 			if (cur >= rxtid->hold_q_sz - 1)
1115bdcd8170SKalle Valo 				rxtid->seq_next = cur - (rxtid->hold_q_sz - 1);
1116bdcd8170SKalle Valo 			else
1117bdcd8170SKalle Valo 				rxtid->seq_next = ATH6KL_MAX_SEQ_NO -
1118bdcd8170SKalle Valo 						  (rxtid->hold_q_sz - 2 - cur);
1119bdcd8170SKalle Valo 		} else {
1120bdcd8170SKalle Valo 			/*
1121bdcd8170SKalle Valo 			 * Dequeue only those frames that are outside the
1122bdcd8170SKalle Valo 			 * new shifted window.
1123bdcd8170SKalle Valo 			 */
1124bdcd8170SKalle Valo 			if (cur >= rxtid->hold_q_sz - 1)
1125bdcd8170SKalle Valo 				st = cur - (rxtid->hold_q_sz - 1);
1126bdcd8170SKalle Valo 			else
1127bdcd8170SKalle Valo 				st = ATH6KL_MAX_SEQ_NO -
1128bdcd8170SKalle Valo 					(rxtid->hold_q_sz - 2 - cur);
1129bdcd8170SKalle Valo 
1130bdcd8170SKalle Valo 			aggr_deque_frms(agg_info, tid, st, 0);
1131bdcd8170SKalle Valo 		}
1132bdcd8170SKalle Valo 
1133bdcd8170SKalle Valo 		stats->num_oow++;
1134bdcd8170SKalle Valo 	}
1135bdcd8170SKalle Valo 
1136bdcd8170SKalle Valo 	idx = AGGR_WIN_IDX(seq_no, rxtid->hold_q_sz);
1137bdcd8170SKalle Valo 
1138bdcd8170SKalle Valo 	node = &rxtid->hold_q[idx];
1139bdcd8170SKalle Valo 
1140bdcd8170SKalle Valo 	spin_lock_bh(&rxtid->lock);
1141bdcd8170SKalle Valo 
1142bdcd8170SKalle Valo 	/*
1143bdcd8170SKalle Valo 	 * Is the cur frame duplicate or something beyond our window(hold_q
1144bdcd8170SKalle Valo 	 * -> which is 2x, already)?
1145bdcd8170SKalle Valo 	 *
1146bdcd8170SKalle Valo 	 * 1. Duplicate is easy - drop incoming frame.
1147bdcd8170SKalle Valo 	 * 2. Not falling in current sliding window.
1148bdcd8170SKalle Valo 	 *  2a. is the frame_seq_no preceding current tid_seq_no?
1149bdcd8170SKalle Valo 	 *      -> drop the frame. perhaps sender did not get our ACK.
1150bdcd8170SKalle Valo 	 *         this is taken care of above.
1151bdcd8170SKalle Valo 	 *  2b. is the frame_seq_no beyond window(st, TID_WINDOW_SZ);
1152bdcd8170SKalle Valo 	 *      -> Taken care of it above, by moving window forward.
1153bdcd8170SKalle Valo 	 */
1154bdcd8170SKalle Valo 	dev_kfree_skb(node->skb);
1155bdcd8170SKalle Valo 	stats->num_dups++;
1156bdcd8170SKalle Valo 
1157bdcd8170SKalle Valo 	node->skb = frame;
1158bdcd8170SKalle Valo 	is_queued = true;
1159bdcd8170SKalle Valo 	node->is_amsdu = is_amsdu;
1160bdcd8170SKalle Valo 	node->seq_no = seq_no;
1161bdcd8170SKalle Valo 
1162bdcd8170SKalle Valo 	if (node->is_amsdu)
1163bdcd8170SKalle Valo 		stats->num_amsdu++;
1164bdcd8170SKalle Valo 	else
1165bdcd8170SKalle Valo 		stats->num_mpdu++;
1166bdcd8170SKalle Valo 
1167bdcd8170SKalle Valo 	spin_unlock_bh(&rxtid->lock);
1168bdcd8170SKalle Valo 
1169bdcd8170SKalle Valo 	aggr_deque_frms(agg_info, tid, 0, 1);
1170bdcd8170SKalle Valo 
11717baef812SVasanthakumar Thiagarajan 	if (agg_conn->timer_scheduled)
1172bdcd8170SKalle Valo 		rxtid->progress = true;
1173bdcd8170SKalle Valo 	else
1174bdcd8170SKalle Valo 		for (idx = 0 ; idx < rxtid->hold_q_sz; idx++) {
1175bdcd8170SKalle Valo 			if (rxtid->hold_q[idx].skb) {
1176bdcd8170SKalle Valo 				/*
1177bdcd8170SKalle Valo 				 * There is a frame in the queue and no
1178bdcd8170SKalle Valo 				 * timer so start a timer to ensure that
1179bdcd8170SKalle Valo 				 * the frame doesn't remain stuck
1180bdcd8170SKalle Valo 				 * forever.
1181bdcd8170SKalle Valo 				 */
11827baef812SVasanthakumar Thiagarajan 				agg_conn->timer_scheduled = true;
11837baef812SVasanthakumar Thiagarajan 				mod_timer(&agg_conn->timer,
1184bdcd8170SKalle Valo 					  (jiffies +
1185bdcd8170SKalle Valo 					   HZ * (AGGR_RX_TIMEOUT) / 1000));
1186bdcd8170SKalle Valo 				rxtid->progress = false;
1187bdcd8170SKalle Valo 				rxtid->timer_mon = true;
1188bdcd8170SKalle Valo 				break;
1189bdcd8170SKalle Valo 			}
1190bdcd8170SKalle Valo 		}
1191bdcd8170SKalle Valo 
1192bdcd8170SKalle Valo 	return is_queued;
1193bdcd8170SKalle Valo }
1194bdcd8170SKalle Valo 
1195c1762a3fSThirumalai Pachamuthu static void ath6kl_uapsd_trigger_frame_rx(struct ath6kl_vif *vif,
1196c1762a3fSThirumalai Pachamuthu 						 struct ath6kl_sta *conn)
1197c1762a3fSThirumalai Pachamuthu {
1198c1762a3fSThirumalai Pachamuthu 	struct ath6kl *ar = vif->ar;
1199c1762a3fSThirumalai Pachamuthu 	bool is_apsdq_empty, is_apsdq_empty_at_start;
1200c1762a3fSThirumalai Pachamuthu 	u32 num_frames_to_deliver, flags;
1201c1762a3fSThirumalai Pachamuthu 	struct sk_buff *skb = NULL;
1202c1762a3fSThirumalai Pachamuthu 
1203c1762a3fSThirumalai Pachamuthu 	/*
1204c1762a3fSThirumalai Pachamuthu 	 * If the APSD q for this STA is not empty, dequeue and
1205c1762a3fSThirumalai Pachamuthu 	 * send a pkt from the head of the q. Also update the
1206c1762a3fSThirumalai Pachamuthu 	 * More data bit in the WMI_DATA_HDR if there are
1207c1762a3fSThirumalai Pachamuthu 	 * more pkts for this STA in the APSD q.
1208c1762a3fSThirumalai Pachamuthu 	 * If there are no more pkts for this STA,
1209c1762a3fSThirumalai Pachamuthu 	 * update the APSD bitmap for this STA.
1210c1762a3fSThirumalai Pachamuthu 	 */
1211c1762a3fSThirumalai Pachamuthu 
1212c1762a3fSThirumalai Pachamuthu 	num_frames_to_deliver = (conn->apsd_info >> ATH6KL_APSD_NUM_OF_AC) &
1213c1762a3fSThirumalai Pachamuthu 						    ATH6KL_APSD_FRAME_MASK;
1214c1762a3fSThirumalai Pachamuthu 	/*
1215c1762a3fSThirumalai Pachamuthu 	 * Number of frames to send in a service period is
1216c1762a3fSThirumalai Pachamuthu 	 * indicated by the station
1217c1762a3fSThirumalai Pachamuthu 	 * in the QOS_INFO of the association request
1218c1762a3fSThirumalai Pachamuthu 	 * If it is zero, send all frames
1219c1762a3fSThirumalai Pachamuthu 	 */
1220c1762a3fSThirumalai Pachamuthu 	if (!num_frames_to_deliver)
1221c1762a3fSThirumalai Pachamuthu 		num_frames_to_deliver = ATH6KL_APSD_ALL_FRAME;
1222c1762a3fSThirumalai Pachamuthu 
1223c1762a3fSThirumalai Pachamuthu 	spin_lock_bh(&conn->psq_lock);
1224c1762a3fSThirumalai Pachamuthu 	is_apsdq_empty = skb_queue_empty(&conn->apsdq);
1225c1762a3fSThirumalai Pachamuthu 	spin_unlock_bh(&conn->psq_lock);
1226c1762a3fSThirumalai Pachamuthu 	is_apsdq_empty_at_start = is_apsdq_empty;
1227c1762a3fSThirumalai Pachamuthu 
1228c1762a3fSThirumalai Pachamuthu 	while ((!is_apsdq_empty) && (num_frames_to_deliver)) {
1229c1762a3fSThirumalai Pachamuthu 
1230c1762a3fSThirumalai Pachamuthu 		spin_lock_bh(&conn->psq_lock);
1231c1762a3fSThirumalai Pachamuthu 		skb = skb_dequeue(&conn->apsdq);
1232c1762a3fSThirumalai Pachamuthu 		is_apsdq_empty = skb_queue_empty(&conn->apsdq);
1233c1762a3fSThirumalai Pachamuthu 		spin_unlock_bh(&conn->psq_lock);
1234c1762a3fSThirumalai Pachamuthu 
1235c1762a3fSThirumalai Pachamuthu 		/*
1236c1762a3fSThirumalai Pachamuthu 		 * Set the STA flag to Trigger delivery,
1237c1762a3fSThirumalai Pachamuthu 		 * so that the frame will go out
1238c1762a3fSThirumalai Pachamuthu 		 */
1239c1762a3fSThirumalai Pachamuthu 		conn->sta_flags |= STA_PS_APSD_TRIGGER;
1240c1762a3fSThirumalai Pachamuthu 		num_frames_to_deliver--;
1241c1762a3fSThirumalai Pachamuthu 
1242c1762a3fSThirumalai Pachamuthu 		/* Last frame in the service period, set EOSP or queue empty */
1243c1762a3fSThirumalai Pachamuthu 		if ((is_apsdq_empty) || (!num_frames_to_deliver))
1244c1762a3fSThirumalai Pachamuthu 			conn->sta_flags |= STA_PS_APSD_EOSP;
1245c1762a3fSThirumalai Pachamuthu 
1246c1762a3fSThirumalai Pachamuthu 		ath6kl_data_tx(skb, vif->ndev);
1247c1762a3fSThirumalai Pachamuthu 		conn->sta_flags &= ~(STA_PS_APSD_TRIGGER);
1248c1762a3fSThirumalai Pachamuthu 		conn->sta_flags &= ~(STA_PS_APSD_EOSP);
1249c1762a3fSThirumalai Pachamuthu 	}
1250c1762a3fSThirumalai Pachamuthu 
1251c1762a3fSThirumalai Pachamuthu 	if (is_apsdq_empty) {
1252c1762a3fSThirumalai Pachamuthu 		if (is_apsdq_empty_at_start)
1253c1762a3fSThirumalai Pachamuthu 			flags = WMI_AP_APSD_NO_DELIVERY_FRAMES;
1254c1762a3fSThirumalai Pachamuthu 		else
1255c1762a3fSThirumalai Pachamuthu 			flags = 0;
1256c1762a3fSThirumalai Pachamuthu 
1257c1762a3fSThirumalai Pachamuthu 		ath6kl_wmi_set_apsd_bfrd_traf(ar->wmi,
1258c1762a3fSThirumalai Pachamuthu 				vif->fw_vif_idx,
1259c1762a3fSThirumalai Pachamuthu 				conn->aid, 0, flags);
1260c1762a3fSThirumalai Pachamuthu 	}
1261c1762a3fSThirumalai Pachamuthu 
1262c1762a3fSThirumalai Pachamuthu 	return;
1263c1762a3fSThirumalai Pachamuthu }
1264c1762a3fSThirumalai Pachamuthu 
1265bdcd8170SKalle Valo void ath6kl_rx(struct htc_target *target, struct htc_packet *packet)
1266bdcd8170SKalle Valo {
1267bdcd8170SKalle Valo 	struct ath6kl *ar = target->dev->ar;
1268bdcd8170SKalle Valo 	struct sk_buff *skb = packet->pkt_cntxt;
1269bdcd8170SKalle Valo 	struct wmi_rx_meta_v2 *meta;
1270bdcd8170SKalle Valo 	struct wmi_data_hdr *dhdr;
1271bdcd8170SKalle Valo 	int min_hdr_len;
1272bdcd8170SKalle Valo 	u8 meta_type, dot11_hdr = 0;
1273bdcd8170SKalle Valo 	int status = packet->status;
1274bdcd8170SKalle Valo 	enum htc_endpoint_id ept = packet->endpoint;
1275bdcd8170SKalle Valo 	bool is_amsdu, prev_ps, ps_state = false;
1276c1762a3fSThirumalai Pachamuthu 	bool trig_state = false;
1277bdcd8170SKalle Valo 	struct ath6kl_sta *conn = NULL;
1278bdcd8170SKalle Valo 	struct sk_buff *skb1 = NULL;
1279bdcd8170SKalle Valo 	struct ethhdr *datap = NULL;
12806765d0aaSVasanthakumar Thiagarajan 	struct ath6kl_vif *vif;
1281bdcd8170SKalle Valo 	u16 seq_no, offset;
12826765d0aaSVasanthakumar Thiagarajan 	u8 tid, if_idx;
1283bdcd8170SKalle Valo 
1284bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_WLAN_RX,
1285bdcd8170SKalle Valo 		   "%s: ar=0x%p eid=%d, skb=0x%p, data=0x%p, len=0x%x status:%d",
1286bdcd8170SKalle Valo 		   __func__, ar, ept, skb, packet->buf,
1287bdcd8170SKalle Valo 		   packet->act_len, status);
1288bdcd8170SKalle Valo 
1289bdcd8170SKalle Valo 	if (status || !(skb->data + HTC_HDR_LENGTH)) {
12906765d0aaSVasanthakumar Thiagarajan 		dev_kfree_skb(skb);
12916765d0aaSVasanthakumar Thiagarajan 		return;
12926765d0aaSVasanthakumar Thiagarajan 	}
12936765d0aaSVasanthakumar Thiagarajan 
12946765d0aaSVasanthakumar Thiagarajan 	skb_put(skb, packet->act_len + HTC_HDR_LENGTH);
12956765d0aaSVasanthakumar Thiagarajan 	skb_pull(skb, HTC_HDR_LENGTH);
12966765d0aaSVasanthakumar Thiagarajan 
12976765d0aaSVasanthakumar Thiagarajan 	if (ept == ar->ctrl_ep) {
12986765d0aaSVasanthakumar Thiagarajan 		if_idx =
12996765d0aaSVasanthakumar Thiagarajan 		wmi_cmd_hdr_get_if_idx((struct wmi_cmd_hdr *) skb->data);
13006765d0aaSVasanthakumar Thiagarajan 	} else {
13016765d0aaSVasanthakumar Thiagarajan 		if_idx =
13026765d0aaSVasanthakumar Thiagarajan 		wmi_data_hdr_get_if_idx((struct wmi_data_hdr *) skb->data);
13036765d0aaSVasanthakumar Thiagarajan 	}
13046765d0aaSVasanthakumar Thiagarajan 
13056765d0aaSVasanthakumar Thiagarajan 	vif = ath6kl_get_vif_by_index(ar, if_idx);
13066765d0aaSVasanthakumar Thiagarajan 	if (!vif) {
1307bdcd8170SKalle Valo 		dev_kfree_skb(skb);
1308bdcd8170SKalle Valo 		return;
1309bdcd8170SKalle Valo 	}
1310bdcd8170SKalle Valo 
1311bdcd8170SKalle Valo 	/*
1312bdcd8170SKalle Valo 	 * Take lock to protect buffer counts and adaptive power throughput
1313bdcd8170SKalle Valo 	 * state.
1314bdcd8170SKalle Valo 	 */
1315478ac027SVasanthakumar Thiagarajan 	spin_lock_bh(&vif->if_lock);
1316bdcd8170SKalle Valo 
1317b95907a7SVasanthakumar Thiagarajan 	vif->net_stats.rx_packets++;
1318b95907a7SVasanthakumar Thiagarajan 	vif->net_stats.rx_bytes += packet->act_len;
1319bdcd8170SKalle Valo 
1320478ac027SVasanthakumar Thiagarajan 	spin_unlock_bh(&vif->if_lock);
132183dc5f2fSVasanthakumar Thiagarajan 
1322bdcd8170SKalle Valo 
1323ef094103SKalle Valo 	ath6kl_dbg_dump(ATH6KL_DBG_RAW_BYTES, __func__, "rx ",
1324ef094103SKalle Valo 			skb->data, skb->len);
1325bdcd8170SKalle Valo 
132628ae58ddSVasanthakumar Thiagarajan 	skb->dev = vif->ndev;
1327bdcd8170SKalle Valo 
1328bdcd8170SKalle Valo 	if (!test_bit(WMI_ENABLED, &ar->flag)) {
1329bdcd8170SKalle Valo 		if (EPPING_ALIGNMENT_PAD > 0)
1330bdcd8170SKalle Valo 			skb_pull(skb, EPPING_ALIGNMENT_PAD);
133128ae58ddSVasanthakumar Thiagarajan 		ath6kl_deliver_frames_to_nw_stack(vif->ndev, skb);
1332bdcd8170SKalle Valo 		return;
1333bdcd8170SKalle Valo 	}
1334bdcd8170SKalle Valo 
1335a918fb3cSRaja Mani 	ath6kl_check_wow_status(ar);
1336a918fb3cSRaja Mani 
1337bdcd8170SKalle Valo 	if (ept == ar->ctrl_ep) {
1338bdcd8170SKalle Valo 		ath6kl_wmi_control_rx(ar->wmi, skb);
1339bdcd8170SKalle Valo 		return;
1340bdcd8170SKalle Valo 	}
1341bdcd8170SKalle Valo 
134267f9178fSVasanthakumar Thiagarajan 	min_hdr_len = sizeof(struct ethhdr) + sizeof(struct wmi_data_hdr) +
1343bdcd8170SKalle Valo 		      sizeof(struct ath6kl_llc_snap_hdr);
1344bdcd8170SKalle Valo 
1345bdcd8170SKalle Valo 	dhdr = (struct wmi_data_hdr *) skb->data;
1346bdcd8170SKalle Valo 
1347bdcd8170SKalle Valo 	/*
1348bdcd8170SKalle Valo 	 * In the case of AP mode we may receive NULL data frames
1349bdcd8170SKalle Valo 	 * that do not have LLC hdr. They are 16 bytes in size.
1350bdcd8170SKalle Valo 	 * Allow these frames in the AP mode.
1351bdcd8170SKalle Valo 	 */
1352f5938f24SVasanthakumar Thiagarajan 	if (vif->nw_type != AP_NETWORK &&
1353bdcd8170SKalle Valo 	    ((packet->act_len < min_hdr_len) ||
1354bdcd8170SKalle Valo 	     (packet->act_len > WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH))) {
1355bdcd8170SKalle Valo 		ath6kl_info("frame len is too short or too long\n");
1356b95907a7SVasanthakumar Thiagarajan 		vif->net_stats.rx_errors++;
1357b95907a7SVasanthakumar Thiagarajan 		vif->net_stats.rx_length_errors++;
1358bdcd8170SKalle Valo 		dev_kfree_skb(skb);
1359bdcd8170SKalle Valo 		return;
1360bdcd8170SKalle Valo 	}
1361bdcd8170SKalle Valo 
1362bdcd8170SKalle Valo 	/* Get the Power save state of the STA */
1363f5938f24SVasanthakumar Thiagarajan 	if (vif->nw_type == AP_NETWORK) {
1364bdcd8170SKalle Valo 		meta_type = wmi_data_hdr_get_meta(dhdr);
1365bdcd8170SKalle Valo 
1366bdcd8170SKalle Valo 		ps_state = !!((dhdr->info >> WMI_DATA_HDR_PS_SHIFT) &
1367bdcd8170SKalle Valo 			      WMI_DATA_HDR_PS_MASK);
1368bdcd8170SKalle Valo 
1369bdcd8170SKalle Valo 		offset = sizeof(struct wmi_data_hdr);
1370c1762a3fSThirumalai Pachamuthu 		trig_state = !!(le16_to_cpu(dhdr->info3) & WMI_DATA_HDR_TRIG);
1371bdcd8170SKalle Valo 
1372bdcd8170SKalle Valo 		switch (meta_type) {
1373bdcd8170SKalle Valo 		case 0:
1374bdcd8170SKalle Valo 			break;
1375bdcd8170SKalle Valo 		case WMI_META_VERSION_1:
1376bdcd8170SKalle Valo 			offset += sizeof(struct wmi_rx_meta_v1);
1377bdcd8170SKalle Valo 			break;
1378bdcd8170SKalle Valo 		case WMI_META_VERSION_2:
1379bdcd8170SKalle Valo 			offset += sizeof(struct wmi_rx_meta_v2);
1380bdcd8170SKalle Valo 			break;
1381bdcd8170SKalle Valo 		default:
1382bdcd8170SKalle Valo 			break;
1383bdcd8170SKalle Valo 		}
1384bdcd8170SKalle Valo 
1385bdcd8170SKalle Valo 		datap = (struct ethhdr *) (skb->data + offset);
13866765d0aaSVasanthakumar Thiagarajan 		conn = ath6kl_find_sta(vif, datap->h_source);
1387bdcd8170SKalle Valo 
1388bdcd8170SKalle Valo 		if (!conn) {
1389bdcd8170SKalle Valo 			dev_kfree_skb(skb);
1390bdcd8170SKalle Valo 			return;
1391bdcd8170SKalle Valo 		}
1392bdcd8170SKalle Valo 
1393bdcd8170SKalle Valo 		/*
1394bdcd8170SKalle Valo 		 * If there is a change in PS state of the STA,
1395bdcd8170SKalle Valo 		 * take appropriate steps:
1396bdcd8170SKalle Valo 		 *
1397bdcd8170SKalle Valo 		 * 1. If Sleep-->Awake, flush the psq for the STA
1398bdcd8170SKalle Valo 		 *    Clear the PVB for the STA.
1399bdcd8170SKalle Valo 		 * 2. If Awake-->Sleep, Starting queueing frames
1400bdcd8170SKalle Valo 		 *    the STA.
1401bdcd8170SKalle Valo 		 */
1402bdcd8170SKalle Valo 		prev_ps = !!(conn->sta_flags & STA_PS_SLEEP);
1403bdcd8170SKalle Valo 
1404bdcd8170SKalle Valo 		if (ps_state)
1405bdcd8170SKalle Valo 			conn->sta_flags |= STA_PS_SLEEP;
1406bdcd8170SKalle Valo 		else
1407bdcd8170SKalle Valo 			conn->sta_flags &= ~STA_PS_SLEEP;
1408bdcd8170SKalle Valo 
1409c1762a3fSThirumalai Pachamuthu 		/* Accept trigger only when the station is in sleep */
1410c1762a3fSThirumalai Pachamuthu 		if ((conn->sta_flags & STA_PS_SLEEP) && trig_state)
1411c1762a3fSThirumalai Pachamuthu 			ath6kl_uapsd_trigger_frame_rx(vif, conn);
1412c1762a3fSThirumalai Pachamuthu 
1413bdcd8170SKalle Valo 		if (prev_ps ^ !!(conn->sta_flags & STA_PS_SLEEP)) {
1414bdcd8170SKalle Valo 			if (!(conn->sta_flags & STA_PS_SLEEP)) {
1415bdcd8170SKalle Valo 				struct sk_buff *skbuff = NULL;
1416c1762a3fSThirumalai Pachamuthu 				bool is_apsdq_empty;
1417bdcd8170SKalle Valo 
1418bdcd8170SKalle Valo 				spin_lock_bh(&conn->psq_lock);
1419c1762a3fSThirumalai Pachamuthu 				while ((skbuff = skb_dequeue(&conn->psq))) {
1420c1762a3fSThirumalai Pachamuthu 					spin_unlock_bh(&conn->psq_lock);
1421c1762a3fSThirumalai Pachamuthu 					ath6kl_data_tx(skbuff, vif->ndev);
1422c1762a3fSThirumalai Pachamuthu 					spin_lock_bh(&conn->psq_lock);
1423c1762a3fSThirumalai Pachamuthu 				}
1424c1762a3fSThirumalai Pachamuthu 
1425c1762a3fSThirumalai Pachamuthu 				is_apsdq_empty = skb_queue_empty(&conn->apsdq);
1426c1762a3fSThirumalai Pachamuthu 				while ((skbuff = skb_dequeue(&conn->apsdq))) {
1427bdcd8170SKalle Valo 					spin_unlock_bh(&conn->psq_lock);
142828ae58ddSVasanthakumar Thiagarajan 					ath6kl_data_tx(skbuff, vif->ndev);
1429bdcd8170SKalle Valo 					spin_lock_bh(&conn->psq_lock);
1430bdcd8170SKalle Valo 				}
1431bdcd8170SKalle Valo 				spin_unlock_bh(&conn->psq_lock);
1432c1762a3fSThirumalai Pachamuthu 
1433c1762a3fSThirumalai Pachamuthu 				if (!is_apsdq_empty)
1434c1762a3fSThirumalai Pachamuthu 					ath6kl_wmi_set_apsd_bfrd_traf(
1435c1762a3fSThirumalai Pachamuthu 							ar->wmi,
1436c1762a3fSThirumalai Pachamuthu 							vif->fw_vif_idx,
1437c1762a3fSThirumalai Pachamuthu 							conn->aid, 0, 0);
1438c1762a3fSThirumalai Pachamuthu 
1439bdcd8170SKalle Valo 				/* Clear the PVB for this STA */
1440334234b5SVasanthakumar Thiagarajan 				ath6kl_wmi_set_pvb_cmd(ar->wmi, vif->fw_vif_idx,
1441334234b5SVasanthakumar Thiagarajan 						       conn->aid, 0);
1442bdcd8170SKalle Valo 			}
1443bdcd8170SKalle Valo 		}
1444bdcd8170SKalle Valo 
1445bdcd8170SKalle Valo 		/* drop NULL data frames here */
1446bdcd8170SKalle Valo 		if ((packet->act_len < min_hdr_len) ||
1447bdcd8170SKalle Valo 		    (packet->act_len >
1448bdcd8170SKalle Valo 		     WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH)) {
1449bdcd8170SKalle Valo 			dev_kfree_skb(skb);
1450bdcd8170SKalle Valo 			return;
1451bdcd8170SKalle Valo 		}
1452bdcd8170SKalle Valo 	}
1453bdcd8170SKalle Valo 
1454bdcd8170SKalle Valo 	is_amsdu = wmi_data_hdr_is_amsdu(dhdr) ? true : false;
1455bdcd8170SKalle Valo 	tid = wmi_data_hdr_get_up(dhdr);
1456bdcd8170SKalle Valo 	seq_no = wmi_data_hdr_get_seqno(dhdr);
1457bdcd8170SKalle Valo 	meta_type = wmi_data_hdr_get_meta(dhdr);
1458bdcd8170SKalle Valo 	dot11_hdr = wmi_data_hdr_get_dot11(dhdr);
1459594a0bc8SVasanthakumar Thiagarajan 	skb_pull(skb, sizeof(struct wmi_data_hdr));
1460bdcd8170SKalle Valo 
1461bdcd8170SKalle Valo 	switch (meta_type) {
1462bdcd8170SKalle Valo 	case WMI_META_VERSION_1:
1463bdcd8170SKalle Valo 		skb_pull(skb, sizeof(struct wmi_rx_meta_v1));
1464bdcd8170SKalle Valo 		break;
1465bdcd8170SKalle Valo 	case WMI_META_VERSION_2:
1466bdcd8170SKalle Valo 		meta = (struct wmi_rx_meta_v2 *) skb->data;
1467bdcd8170SKalle Valo 		if (meta->csum_flags & 0x1) {
1468bdcd8170SKalle Valo 			skb->ip_summed = CHECKSUM_COMPLETE;
1469bdcd8170SKalle Valo 			skb->csum = (__force __wsum) meta->csum;
1470bdcd8170SKalle Valo 		}
1471bdcd8170SKalle Valo 		skb_pull(skb, sizeof(struct wmi_rx_meta_v2));
1472bdcd8170SKalle Valo 		break;
1473bdcd8170SKalle Valo 	default:
1474bdcd8170SKalle Valo 		break;
1475bdcd8170SKalle Valo 	}
1476bdcd8170SKalle Valo 
1477bdcd8170SKalle Valo 	if (dot11_hdr)
1478bdcd8170SKalle Valo 		status = ath6kl_wmi_dot11_hdr_remove(ar->wmi, skb);
1479bdcd8170SKalle Valo 	else if (!is_amsdu)
1480bdcd8170SKalle Valo 		status = ath6kl_wmi_dot3_2_dix(skb);
1481bdcd8170SKalle Valo 
1482bdcd8170SKalle Valo 	if (status) {
1483bdcd8170SKalle Valo 		/*
1484bdcd8170SKalle Valo 		 * Drop frames that could not be processed (lack of
1485bdcd8170SKalle Valo 		 * memory, etc.)
1486bdcd8170SKalle Valo 		 */
1487bdcd8170SKalle Valo 		dev_kfree_skb(skb);
1488bdcd8170SKalle Valo 		return;
1489bdcd8170SKalle Valo 	}
1490bdcd8170SKalle Valo 
149128ae58ddSVasanthakumar Thiagarajan 	if (!(vif->ndev->flags & IFF_UP)) {
1492bdcd8170SKalle Valo 		dev_kfree_skb(skb);
1493bdcd8170SKalle Valo 		return;
1494bdcd8170SKalle Valo 	}
1495bdcd8170SKalle Valo 
1496f5938f24SVasanthakumar Thiagarajan 	if (vif->nw_type == AP_NETWORK) {
1497bdcd8170SKalle Valo 		datap = (struct ethhdr *) skb->data;
1498bdcd8170SKalle Valo 		if (is_multicast_ether_addr(datap->h_dest))
1499bdcd8170SKalle Valo 			/*
1500bdcd8170SKalle Valo 			 * Bcast/Mcast frames should be sent to the
1501bdcd8170SKalle Valo 			 * OS stack as well as on the air.
1502bdcd8170SKalle Valo 			 */
1503bdcd8170SKalle Valo 			skb1 = skb_copy(skb, GFP_ATOMIC);
1504bdcd8170SKalle Valo 		else {
1505bdcd8170SKalle Valo 			/*
1506bdcd8170SKalle Valo 			 * Search for a connected STA with dstMac
1507bdcd8170SKalle Valo 			 * as the Mac address. If found send the
1508bdcd8170SKalle Valo 			 * frame to it on the air else send the
1509bdcd8170SKalle Valo 			 * frame up the stack.
1510bdcd8170SKalle Valo 			 */
15116765d0aaSVasanthakumar Thiagarajan 			conn = ath6kl_find_sta(vif, datap->h_dest);
1512bdcd8170SKalle Valo 
1513bdcd8170SKalle Valo 			if (conn && ar->intra_bss) {
1514bdcd8170SKalle Valo 				skb1 = skb;
1515bdcd8170SKalle Valo 				skb = NULL;
1516bdcd8170SKalle Valo 			} else if (conn && !ar->intra_bss) {
1517bdcd8170SKalle Valo 				dev_kfree_skb(skb);
1518bdcd8170SKalle Valo 				skb = NULL;
1519bdcd8170SKalle Valo 			}
1520bdcd8170SKalle Valo 		}
1521bdcd8170SKalle Valo 		if (skb1)
152228ae58ddSVasanthakumar Thiagarajan 			ath6kl_data_tx(skb1, vif->ndev);
1523ad3f78b9SKalle Valo 
1524ad3f78b9SKalle Valo 		if (skb == NULL) {
1525ad3f78b9SKalle Valo 			/* nothing to deliver up the stack */
1526ad3f78b9SKalle Valo 			return;
1527ad3f78b9SKalle Valo 		}
1528bdcd8170SKalle Valo 	}
1529bdcd8170SKalle Valo 
15305694f962SKalle Valo 	datap = (struct ethhdr *) skb->data;
15315694f962SKalle Valo 
15325694f962SKalle Valo 	if (is_unicast_ether_addr(datap->h_dest) &&
15332132c69cSVasanthakumar Thiagarajan 	    aggr_process_recv_frm(vif->aggr_cntxt, tid, seq_no,
1534bdcd8170SKalle Valo 				  is_amsdu, skb))
15355694f962SKalle Valo 		/* aggregation code will handle the skb */
15365694f962SKalle Valo 		return;
15375694f962SKalle Valo 
153828ae58ddSVasanthakumar Thiagarajan 	ath6kl_deliver_frames_to_nw_stack(vif->ndev, skb);
1539bdcd8170SKalle Valo }
1540bdcd8170SKalle Valo 
1541bdcd8170SKalle Valo static void aggr_timeout(unsigned long arg)
1542bdcd8170SKalle Valo {
1543bdcd8170SKalle Valo 	u8 i, j;
15447baef812SVasanthakumar Thiagarajan 	struct aggr_info_conn *aggr_conn = (struct aggr_info_conn *) arg;
1545bdcd8170SKalle Valo 	struct rxtid *rxtid;
1546bdcd8170SKalle Valo 	struct rxtid_stats *stats;
1547bdcd8170SKalle Valo 
1548bdcd8170SKalle Valo 	for (i = 0; i < NUM_OF_TIDS; i++) {
15497baef812SVasanthakumar Thiagarajan 		rxtid = &aggr_conn->rx_tid[i];
15507baef812SVasanthakumar Thiagarajan 		stats = &aggr_conn->stat[i];
1551bdcd8170SKalle Valo 
1552bdcd8170SKalle Valo 		if (!rxtid->aggr || !rxtid->timer_mon || rxtid->progress)
1553bdcd8170SKalle Valo 			continue;
1554bdcd8170SKalle Valo 
1555bdcd8170SKalle Valo 		stats->num_timeouts++;
155637ca6335SKalle Valo 		ath6kl_dbg(ATH6KL_DBG_AGGR,
155737ca6335SKalle Valo 			   "aggr timeout (st %d end %d)\n",
1558bdcd8170SKalle Valo 			   rxtid->seq_next,
1559bdcd8170SKalle Valo 			   ((rxtid->seq_next + rxtid->hold_q_sz-1) &
1560bdcd8170SKalle Valo 			    ATH6KL_MAX_SEQ_NO));
15617baef812SVasanthakumar Thiagarajan 		aggr_deque_frms(aggr_conn->aggr_info, i, 0, 0);
1562bdcd8170SKalle Valo 	}
1563bdcd8170SKalle Valo 
15647baef812SVasanthakumar Thiagarajan 	aggr_conn->timer_scheduled = false;
1565bdcd8170SKalle Valo 
1566bdcd8170SKalle Valo 	for (i = 0; i < NUM_OF_TIDS; i++) {
15677baef812SVasanthakumar Thiagarajan 		rxtid = &aggr_conn->rx_tid[i];
1568bdcd8170SKalle Valo 
1569bdcd8170SKalle Valo 		if (rxtid->aggr && rxtid->hold_q) {
1570bdcd8170SKalle Valo 			for (j = 0; j < rxtid->hold_q_sz; j++) {
1571bdcd8170SKalle Valo 				if (rxtid->hold_q[j].skb) {
15727baef812SVasanthakumar Thiagarajan 					aggr_conn->timer_scheduled = true;
1573bdcd8170SKalle Valo 					rxtid->timer_mon = true;
1574bdcd8170SKalle Valo 					rxtid->progress = false;
1575bdcd8170SKalle Valo 					break;
1576bdcd8170SKalle Valo 				}
1577bdcd8170SKalle Valo 			}
1578bdcd8170SKalle Valo 
1579bdcd8170SKalle Valo 			if (j >= rxtid->hold_q_sz)
1580bdcd8170SKalle Valo 				rxtid->timer_mon = false;
1581bdcd8170SKalle Valo 		}
1582bdcd8170SKalle Valo 	}
1583bdcd8170SKalle Valo 
15847baef812SVasanthakumar Thiagarajan 	if (aggr_conn->timer_scheduled)
15857baef812SVasanthakumar Thiagarajan 		mod_timer(&aggr_conn->timer,
1586bdcd8170SKalle Valo 			  jiffies + msecs_to_jiffies(AGGR_RX_TIMEOUT));
1587bdcd8170SKalle Valo }
1588bdcd8170SKalle Valo 
15897baef812SVasanthakumar Thiagarajan static void aggr_delete_tid_state(struct aggr_info_conn *aggr_conn, u8 tid)
1590bdcd8170SKalle Valo {
1591bdcd8170SKalle Valo 	struct rxtid *rxtid;
1592bdcd8170SKalle Valo 	struct rxtid_stats *stats;
1593bdcd8170SKalle Valo 
15947baef812SVasanthakumar Thiagarajan 	if (!aggr_conn || tid >= NUM_OF_TIDS)
1595bdcd8170SKalle Valo 		return;
1596bdcd8170SKalle Valo 
15977baef812SVasanthakumar Thiagarajan 	rxtid = &aggr_conn->rx_tid[tid];
15987baef812SVasanthakumar Thiagarajan 	stats = &aggr_conn->stat[tid];
1599bdcd8170SKalle Valo 
1600bdcd8170SKalle Valo 	if (rxtid->aggr)
16017baef812SVasanthakumar Thiagarajan 		aggr_deque_frms(aggr_conn->aggr_info, tid, 0, 0);
1602bdcd8170SKalle Valo 
1603bdcd8170SKalle Valo 	rxtid->aggr = false;
1604bdcd8170SKalle Valo 	rxtid->progress = false;
1605bdcd8170SKalle Valo 	rxtid->timer_mon = false;
1606bdcd8170SKalle Valo 	rxtid->win_sz = 0;
1607bdcd8170SKalle Valo 	rxtid->seq_next = 0;
1608bdcd8170SKalle Valo 	rxtid->hold_q_sz = 0;
1609bdcd8170SKalle Valo 
1610bdcd8170SKalle Valo 	kfree(rxtid->hold_q);
1611bdcd8170SKalle Valo 	rxtid->hold_q = NULL;
1612bdcd8170SKalle Valo 
1613bdcd8170SKalle Valo 	memset(stats, 0, sizeof(struct rxtid_stats));
1614bdcd8170SKalle Valo }
1615bdcd8170SKalle Valo 
1616*3fdc0991SVasanthakumar Thiagarajan void aggr_recv_addba_req_evt(struct ath6kl_vif *vif, u8 tid_mux, u16 seq_no,
1617240d2799SVasanthakumar Thiagarajan 			     u8 win_sz)
1618bdcd8170SKalle Valo {
16192132c69cSVasanthakumar Thiagarajan 	struct aggr_info *p_aggr = vif->aggr_cntxt;
16207baef812SVasanthakumar Thiagarajan 	struct aggr_info_conn *aggr_conn;
1621bdcd8170SKalle Valo 	struct rxtid *rxtid;
1622bdcd8170SKalle Valo 	struct rxtid_stats *stats;
1623bdcd8170SKalle Valo 	u16 hold_q_size;
1624*3fdc0991SVasanthakumar Thiagarajan 	u8 tid;
1625bdcd8170SKalle Valo 
16267baef812SVasanthakumar Thiagarajan 	if (!p_aggr || !p_aggr->aggr_conn)
1627bdcd8170SKalle Valo 		return;
1628bdcd8170SKalle Valo 
16297baef812SVasanthakumar Thiagarajan 	aggr_conn = p_aggr->aggr_conn;
16307baef812SVasanthakumar Thiagarajan 
1631*3fdc0991SVasanthakumar Thiagarajan 	tid = ath6kl_get_tid(tid_mux);
1632*3fdc0991SVasanthakumar Thiagarajan 	if (tid >= NUM_OF_TIDS)
1633*3fdc0991SVasanthakumar Thiagarajan 		return;
1634*3fdc0991SVasanthakumar Thiagarajan 
16357baef812SVasanthakumar Thiagarajan 	rxtid = &aggr_conn->rx_tid[tid];
16367baef812SVasanthakumar Thiagarajan 	stats = &aggr_conn->stat[tid];
1637bdcd8170SKalle Valo 
1638bdcd8170SKalle Valo 	if (win_sz < AGGR_WIN_SZ_MIN || win_sz > AGGR_WIN_SZ_MAX)
1639bdcd8170SKalle Valo 		ath6kl_dbg(ATH6KL_DBG_WLAN_RX, "%s: win_sz %d, tid %d\n",
1640bdcd8170SKalle Valo 			   __func__, win_sz, tid);
1641bdcd8170SKalle Valo 
1642bdcd8170SKalle Valo 	if (rxtid->aggr)
16437baef812SVasanthakumar Thiagarajan 		aggr_delete_tid_state(aggr_conn, tid);
1644bdcd8170SKalle Valo 
1645bdcd8170SKalle Valo 	rxtid->seq_next = seq_no;
1646bdcd8170SKalle Valo 	hold_q_size = TID_WINDOW_SZ(win_sz) * sizeof(struct skb_hold_q);
1647bdcd8170SKalle Valo 	rxtid->hold_q = kzalloc(hold_q_size, GFP_KERNEL);
1648bdcd8170SKalle Valo 	if (!rxtid->hold_q)
1649bdcd8170SKalle Valo 		return;
1650bdcd8170SKalle Valo 
1651bdcd8170SKalle Valo 	rxtid->win_sz = win_sz;
1652bdcd8170SKalle Valo 	rxtid->hold_q_sz = TID_WINDOW_SZ(win_sz);
1653bdcd8170SKalle Valo 	if (!skb_queue_empty(&rxtid->q))
1654bdcd8170SKalle Valo 		return;
1655bdcd8170SKalle Valo 
1656bdcd8170SKalle Valo 	rxtid->aggr = true;
1657bdcd8170SKalle Valo }
1658bdcd8170SKalle Valo 
16597baef812SVasanthakumar Thiagarajan static void aggr_conn_init(struct ath6kl_vif *vif,
16607baef812SVasanthakumar Thiagarajan 			   struct aggr_info_conn *aggr_conn)
1661bdcd8170SKalle Valo {
1662bdcd8170SKalle Valo 	struct rxtid *rxtid;
1663bdcd8170SKalle Valo 	u8 i;
1664bdcd8170SKalle Valo 
16657baef812SVasanthakumar Thiagarajan 	aggr_conn->aggr_sz = AGGR_SZ_DEFAULT;
16667baef812SVasanthakumar Thiagarajan 	aggr_conn->dev = vif->ndev;
16677baef812SVasanthakumar Thiagarajan 	init_timer(&aggr_conn->timer);
16687baef812SVasanthakumar Thiagarajan 	aggr_conn->timer.function = aggr_timeout;
16697baef812SVasanthakumar Thiagarajan 	aggr_conn->timer.data = (unsigned long) aggr_conn;
16707baef812SVasanthakumar Thiagarajan 	aggr_conn->aggr_info = vif->aggr_cntxt;
16717baef812SVasanthakumar Thiagarajan 
16727baef812SVasanthakumar Thiagarajan 	aggr_conn->timer_scheduled = false;
16737baef812SVasanthakumar Thiagarajan 
16747baef812SVasanthakumar Thiagarajan 	for (i = 0; i < NUM_OF_TIDS; i++) {
16757baef812SVasanthakumar Thiagarajan 		rxtid = &aggr_conn->rx_tid[i];
16767baef812SVasanthakumar Thiagarajan 		rxtid->aggr = false;
16777baef812SVasanthakumar Thiagarajan 		rxtid->progress = false;
16787baef812SVasanthakumar Thiagarajan 		rxtid->timer_mon = false;
16797baef812SVasanthakumar Thiagarajan 		skb_queue_head_init(&rxtid->q);
16807baef812SVasanthakumar Thiagarajan 		spin_lock_init(&rxtid->lock);
16817baef812SVasanthakumar Thiagarajan 	}
16827baef812SVasanthakumar Thiagarajan 
16837baef812SVasanthakumar Thiagarajan }
16847baef812SVasanthakumar Thiagarajan 
16857baef812SVasanthakumar Thiagarajan struct aggr_info *aggr_init(struct ath6kl_vif *vif)
16867baef812SVasanthakumar Thiagarajan {
16877baef812SVasanthakumar Thiagarajan 	struct aggr_info *p_aggr = NULL;
16887baef812SVasanthakumar Thiagarajan 
1689bdcd8170SKalle Valo 	p_aggr = kzalloc(sizeof(struct aggr_info), GFP_KERNEL);
1690bdcd8170SKalle Valo 	if (!p_aggr) {
1691bdcd8170SKalle Valo 		ath6kl_err("failed to alloc memory for aggr_node\n");
1692bdcd8170SKalle Valo 		return NULL;
1693bdcd8170SKalle Valo 	}
1694bdcd8170SKalle Valo 
16957baef812SVasanthakumar Thiagarajan 	p_aggr->aggr_conn = kzalloc(sizeof(struct aggr_info_conn), GFP_KERNEL);
16967baef812SVasanthakumar Thiagarajan 	if (!p_aggr->aggr_conn) {
16977baef812SVasanthakumar Thiagarajan 		ath6kl_err("failed to alloc memory for connection specific aggr info\n");
16987baef812SVasanthakumar Thiagarajan 		kfree(p_aggr);
16997baef812SVasanthakumar Thiagarajan 		return NULL;
1700bdcd8170SKalle Valo 	}
1701bdcd8170SKalle Valo 
17027baef812SVasanthakumar Thiagarajan 	aggr_conn_init(vif, p_aggr->aggr_conn);
17037baef812SVasanthakumar Thiagarajan 
17047baef812SVasanthakumar Thiagarajan 	skb_queue_head_init(&p_aggr->rx_amsdu_freeq);
17057baef812SVasanthakumar Thiagarajan 	ath6kl_alloc_netbufs(&p_aggr->rx_amsdu_freeq, AGGR_NUM_OF_FREE_NETBUFS);
17067baef812SVasanthakumar Thiagarajan 
1707bdcd8170SKalle Valo 	return p_aggr;
1708bdcd8170SKalle Valo }
1709bdcd8170SKalle Valo 
1710*3fdc0991SVasanthakumar Thiagarajan void aggr_recv_delba_req_evt(struct ath6kl_vif *vif, u8 tid_mux)
1711bdcd8170SKalle Valo {
17122132c69cSVasanthakumar Thiagarajan 	struct aggr_info *p_aggr = vif->aggr_cntxt;
1713bdcd8170SKalle Valo 	struct rxtid *rxtid;
17147baef812SVasanthakumar Thiagarajan 	struct aggr_info_conn *aggr_conn;
1715*3fdc0991SVasanthakumar Thiagarajan 	u8 tid;
1716bdcd8170SKalle Valo 
17177baef812SVasanthakumar Thiagarajan 	if (!p_aggr || !p_aggr->aggr_conn)
1718bdcd8170SKalle Valo 		return;
1719bdcd8170SKalle Valo 
1720*3fdc0991SVasanthakumar Thiagarajan 	tid = ath6kl_get_tid(tid_mux);
1721*3fdc0991SVasanthakumar Thiagarajan 	if (tid >= NUM_OF_TIDS)
1722*3fdc0991SVasanthakumar Thiagarajan 		return;
1723*3fdc0991SVasanthakumar Thiagarajan 
17247baef812SVasanthakumar Thiagarajan 	aggr_conn = p_aggr->aggr_conn;
17257baef812SVasanthakumar Thiagarajan 	rxtid = &aggr_conn->rx_tid[tid];
1726bdcd8170SKalle Valo 
1727bdcd8170SKalle Valo 	if (rxtid->aggr)
17287baef812SVasanthakumar Thiagarajan 		aggr_delete_tid_state(aggr_conn, tid);
1729bdcd8170SKalle Valo }
1730bdcd8170SKalle Valo 
1731bdcd8170SKalle Valo void aggr_reset_state(struct aggr_info *aggr_info)
1732bdcd8170SKalle Valo {
1733bdcd8170SKalle Valo 	u8 tid;
1734bdcd8170SKalle Valo 
17357baef812SVasanthakumar Thiagarajan 	if (!aggr_info || !aggr_info->aggr_conn)
17367baef812SVasanthakumar Thiagarajan 		return;
17377baef812SVasanthakumar Thiagarajan 
17387baef812SVasanthakumar Thiagarajan 	if (aggr_info->aggr_conn->timer_scheduled) {
17397baef812SVasanthakumar Thiagarajan 		del_timer(&aggr_info->aggr_conn->timer);
17407baef812SVasanthakumar Thiagarajan 		aggr_info->aggr_conn->timer_scheduled = false;
17417a950ea8SVasanthakumar Thiagarajan 	}
17427a950ea8SVasanthakumar Thiagarajan 
1743bdcd8170SKalle Valo 	for (tid = 0; tid < NUM_OF_TIDS; tid++)
17447baef812SVasanthakumar Thiagarajan 		aggr_delete_tid_state(aggr_info->aggr_conn, tid);
1745bdcd8170SKalle Valo }
1746bdcd8170SKalle Valo 
1747bdcd8170SKalle Valo /* clean up our amsdu buffer list */
1748bdcd8170SKalle Valo void ath6kl_cleanup_amsdu_rxbufs(struct ath6kl *ar)
1749bdcd8170SKalle Valo {
1750bdcd8170SKalle Valo 	struct htc_packet *packet, *tmp_pkt;
1751bdcd8170SKalle Valo 
1752bdcd8170SKalle Valo 	spin_lock_bh(&ar->lock);
1753bdcd8170SKalle Valo 	if (list_empty(&ar->amsdu_rx_buffer_queue)) {
1754bdcd8170SKalle Valo 		spin_unlock_bh(&ar->lock);
1755bdcd8170SKalle Valo 		return;
1756bdcd8170SKalle Valo 	}
1757bdcd8170SKalle Valo 
1758bdcd8170SKalle Valo 	list_for_each_entry_safe(packet, tmp_pkt, &ar->amsdu_rx_buffer_queue,
1759bdcd8170SKalle Valo 				 list) {
1760bdcd8170SKalle Valo 		list_del(&packet->list);
1761bdcd8170SKalle Valo 		spin_unlock_bh(&ar->lock);
1762bdcd8170SKalle Valo 		dev_kfree_skb(packet->pkt_cntxt);
1763bdcd8170SKalle Valo 		spin_lock_bh(&ar->lock);
1764bdcd8170SKalle Valo 	}
1765bdcd8170SKalle Valo 
1766bdcd8170SKalle Valo 	spin_unlock_bh(&ar->lock);
1767bdcd8170SKalle Valo }
1768bdcd8170SKalle Valo 
1769bdcd8170SKalle Valo void aggr_module_destroy(struct aggr_info *aggr_info)
1770bdcd8170SKalle Valo {
17717baef812SVasanthakumar Thiagarajan 	if (!aggr_info || !aggr_info->aggr_conn)
1772bdcd8170SKalle Valo 		return;
1773bdcd8170SKalle Valo 
17747baef812SVasanthakumar Thiagarajan 	aggr_reset_state(aggr_info);
17757baef812SVasanthakumar Thiagarajan 	skb_queue_purge(&aggr_info->rx_amsdu_freeq);
17767baef812SVasanthakumar Thiagarajan 	kfree(aggr_info->aggr_conn);
1777bdcd8170SKalle Valo 	kfree(aggr_info);
1778bdcd8170SKalle Valo }
1779