1bdcd8170SKalle Valo /* 2bdcd8170SKalle Valo * Copyright (c) 2004-2011 Atheros Communications Inc. 3*1b2df407SVasanthakumar Thiagarajan * Copyright (c) 2011-2012 Qualcomm Atheros, Inc. 4bdcd8170SKalle Valo * 5bdcd8170SKalle Valo * Permission to use, copy, modify, and/or distribute this software for any 6bdcd8170SKalle Valo * purpose with or without fee is hereby granted, provided that the above 7bdcd8170SKalle Valo * copyright notice and this permission notice appear in all copies. 8bdcd8170SKalle Valo * 9bdcd8170SKalle Valo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10bdcd8170SKalle Valo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11bdcd8170SKalle Valo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12bdcd8170SKalle Valo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13bdcd8170SKalle Valo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14bdcd8170SKalle Valo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15bdcd8170SKalle Valo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16bdcd8170SKalle Valo */ 17bdcd8170SKalle Valo 18bdcd8170SKalle Valo #include "core.h" 19bdcd8170SKalle Valo #include "debug.h" 20bdcd8170SKalle Valo 213fdc0991SVasanthakumar Thiagarajan /* 223fdc0991SVasanthakumar Thiagarajan * tid - tid_mux0..tid_mux3 233fdc0991SVasanthakumar Thiagarajan * aid - tid_mux4..tid_mux7 243fdc0991SVasanthakumar Thiagarajan */ 253fdc0991SVasanthakumar Thiagarajan #define ATH6KL_TID_MASK 0xf 261d2a4456SVasanthakumar Thiagarajan #define ATH6KL_AID_SHIFT 4 273fdc0991SVasanthakumar Thiagarajan 283fdc0991SVasanthakumar Thiagarajan static inline u8 ath6kl_get_tid(u8 tid_mux) 293fdc0991SVasanthakumar Thiagarajan { 303fdc0991SVasanthakumar Thiagarajan return tid_mux & ATH6KL_TID_MASK; 313fdc0991SVasanthakumar Thiagarajan } 323fdc0991SVasanthakumar Thiagarajan 331d2a4456SVasanthakumar Thiagarajan static inline u8 ath6kl_get_aid(u8 tid_mux) 341d2a4456SVasanthakumar Thiagarajan { 351d2a4456SVasanthakumar Thiagarajan return tid_mux >> ATH6KL_AID_SHIFT; 361d2a4456SVasanthakumar Thiagarajan } 371d2a4456SVasanthakumar Thiagarajan 38bdcd8170SKalle Valo static u8 ath6kl_ibss_map_epid(struct sk_buff *skb, struct net_device *dev, 39bdcd8170SKalle Valo u32 *map_no) 40bdcd8170SKalle Valo { 41bdcd8170SKalle Valo struct ath6kl *ar = ath6kl_priv(dev); 42bdcd8170SKalle Valo struct ethhdr *eth_hdr; 43bdcd8170SKalle Valo u32 i, ep_map = -1; 44bdcd8170SKalle Valo u8 *datap; 45bdcd8170SKalle Valo 46bdcd8170SKalle Valo *map_no = 0; 47bdcd8170SKalle Valo datap = skb->data; 48bdcd8170SKalle Valo eth_hdr = (struct ethhdr *) (datap + sizeof(struct wmi_data_hdr)); 49bdcd8170SKalle Valo 50bdcd8170SKalle Valo if (is_multicast_ether_addr(eth_hdr->h_dest)) 51bdcd8170SKalle Valo return ENDPOINT_2; 52bdcd8170SKalle Valo 53bdcd8170SKalle Valo for (i = 0; i < ar->node_num; i++) { 54bdcd8170SKalle Valo if (memcmp(eth_hdr->h_dest, ar->node_map[i].mac_addr, 55bdcd8170SKalle Valo ETH_ALEN) == 0) { 56bdcd8170SKalle Valo *map_no = i + 1; 57bdcd8170SKalle Valo ar->node_map[i].tx_pend++; 58bdcd8170SKalle Valo return ar->node_map[i].ep_id; 59bdcd8170SKalle Valo } 60bdcd8170SKalle Valo 61bdcd8170SKalle Valo if ((ep_map == -1) && !ar->node_map[i].tx_pend) 62bdcd8170SKalle Valo ep_map = i; 63bdcd8170SKalle Valo } 64bdcd8170SKalle Valo 65bdcd8170SKalle Valo if (ep_map == -1) { 66bdcd8170SKalle Valo ep_map = ar->node_num; 67bdcd8170SKalle Valo ar->node_num++; 68bdcd8170SKalle Valo if (ar->node_num > MAX_NODE_NUM) 69bdcd8170SKalle Valo return ENDPOINT_UNUSED; 70bdcd8170SKalle Valo } 71bdcd8170SKalle Valo 72bdcd8170SKalle Valo memcpy(ar->node_map[ep_map].mac_addr, eth_hdr->h_dest, ETH_ALEN); 73bdcd8170SKalle Valo 74bdcd8170SKalle Valo for (i = ENDPOINT_2; i <= ENDPOINT_5; i++) { 75bdcd8170SKalle Valo if (!ar->tx_pending[i]) { 76bdcd8170SKalle Valo ar->node_map[ep_map].ep_id = i; 77bdcd8170SKalle Valo break; 78bdcd8170SKalle Valo } 79bdcd8170SKalle Valo 80bdcd8170SKalle Valo /* 81bdcd8170SKalle Valo * No free endpoint is available, start redistribution on 82bdcd8170SKalle Valo * the inuse endpoints. 83bdcd8170SKalle Valo */ 84bdcd8170SKalle Valo if (i == ENDPOINT_5) { 85bdcd8170SKalle Valo ar->node_map[ep_map].ep_id = ar->next_ep_id; 86bdcd8170SKalle Valo ar->next_ep_id++; 87bdcd8170SKalle Valo if (ar->next_ep_id > ENDPOINT_5) 88bdcd8170SKalle Valo ar->next_ep_id = ENDPOINT_2; 89bdcd8170SKalle Valo } 90bdcd8170SKalle Valo } 91bdcd8170SKalle Valo 92bdcd8170SKalle Valo *map_no = ep_map + 1; 93bdcd8170SKalle Valo ar->node_map[ep_map].tx_pend++; 94bdcd8170SKalle Valo 95bdcd8170SKalle Valo return ar->node_map[ep_map].ep_id; 96bdcd8170SKalle Valo } 97bdcd8170SKalle Valo 98c1762a3fSThirumalai Pachamuthu static bool ath6kl_process_uapsdq(struct ath6kl_sta *conn, 99c1762a3fSThirumalai Pachamuthu struct ath6kl_vif *vif, 100c1762a3fSThirumalai Pachamuthu struct sk_buff *skb, 101c1762a3fSThirumalai Pachamuthu u32 *flags) 102c1762a3fSThirumalai Pachamuthu { 103c1762a3fSThirumalai Pachamuthu struct ath6kl *ar = vif->ar; 104c1762a3fSThirumalai Pachamuthu bool is_apsdq_empty = false; 105c1762a3fSThirumalai Pachamuthu struct ethhdr *datap = (struct ethhdr *) skb->data; 106e5726028SKalle Valo u8 up = 0, traffic_class, *ip_hdr; 107c1762a3fSThirumalai Pachamuthu u16 ether_type; 108c1762a3fSThirumalai Pachamuthu struct ath6kl_llc_snap_hdr *llc_hdr; 109c1762a3fSThirumalai Pachamuthu 110c1762a3fSThirumalai Pachamuthu if (conn->sta_flags & STA_PS_APSD_TRIGGER) { 111c1762a3fSThirumalai Pachamuthu /* 112c1762a3fSThirumalai Pachamuthu * This tx is because of a uAPSD trigger, determine 113c1762a3fSThirumalai Pachamuthu * more and EOSP bit. Set EOSP if queue is empty 114c1762a3fSThirumalai Pachamuthu * or sufficient frames are delivered for this trigger. 115c1762a3fSThirumalai Pachamuthu */ 116c1762a3fSThirumalai Pachamuthu spin_lock_bh(&conn->psq_lock); 117c1762a3fSThirumalai Pachamuthu if (!skb_queue_empty(&conn->apsdq)) 118c1762a3fSThirumalai Pachamuthu *flags |= WMI_DATA_HDR_FLAGS_MORE; 119c1762a3fSThirumalai Pachamuthu else if (conn->sta_flags & STA_PS_APSD_EOSP) 120c1762a3fSThirumalai Pachamuthu *flags |= WMI_DATA_HDR_FLAGS_EOSP; 121c1762a3fSThirumalai Pachamuthu *flags |= WMI_DATA_HDR_FLAGS_UAPSD; 122c1762a3fSThirumalai Pachamuthu spin_unlock_bh(&conn->psq_lock); 123c1762a3fSThirumalai Pachamuthu return false; 124c1762a3fSThirumalai Pachamuthu } else if (!conn->apsd_info) 125c1762a3fSThirumalai Pachamuthu return false; 126c1762a3fSThirumalai Pachamuthu 127c1762a3fSThirumalai Pachamuthu if (test_bit(WMM_ENABLED, &vif->flags)) { 128c1762a3fSThirumalai Pachamuthu ether_type = be16_to_cpu(datap->h_proto); 129c1762a3fSThirumalai Pachamuthu if (is_ethertype(ether_type)) { 130c1762a3fSThirumalai Pachamuthu /* packet is in DIX format */ 131c1762a3fSThirumalai Pachamuthu ip_hdr = (u8 *)(datap + 1); 132c1762a3fSThirumalai Pachamuthu } else { 133c1762a3fSThirumalai Pachamuthu /* packet is in 802.3 format */ 134c1762a3fSThirumalai Pachamuthu llc_hdr = (struct ath6kl_llc_snap_hdr *) 135c1762a3fSThirumalai Pachamuthu (datap + 1); 136c1762a3fSThirumalai Pachamuthu ether_type = be16_to_cpu(llc_hdr->eth_type); 137c1762a3fSThirumalai Pachamuthu ip_hdr = (u8 *)(llc_hdr + 1); 138c1762a3fSThirumalai Pachamuthu } 139c1762a3fSThirumalai Pachamuthu 140c1762a3fSThirumalai Pachamuthu if (ether_type == IP_ETHERTYPE) 141c1762a3fSThirumalai Pachamuthu up = ath6kl_wmi_determine_user_priority( 142c1762a3fSThirumalai Pachamuthu ip_hdr, 0); 143c1762a3fSThirumalai Pachamuthu } 144c1762a3fSThirumalai Pachamuthu 145c1762a3fSThirumalai Pachamuthu traffic_class = ath6kl_wmi_get_traffic_class(up); 146c1762a3fSThirumalai Pachamuthu 147c1762a3fSThirumalai Pachamuthu if ((conn->apsd_info & (1 << traffic_class)) == 0) 148c1762a3fSThirumalai Pachamuthu return false; 149c1762a3fSThirumalai Pachamuthu 150c1762a3fSThirumalai Pachamuthu /* Queue the frames if the STA is sleeping */ 151c1762a3fSThirumalai Pachamuthu spin_lock_bh(&conn->psq_lock); 152c1762a3fSThirumalai Pachamuthu is_apsdq_empty = skb_queue_empty(&conn->apsdq); 153c1762a3fSThirumalai Pachamuthu skb_queue_tail(&conn->apsdq, skb); 154c1762a3fSThirumalai Pachamuthu spin_unlock_bh(&conn->psq_lock); 155c1762a3fSThirumalai Pachamuthu 156c1762a3fSThirumalai Pachamuthu /* 157c1762a3fSThirumalai Pachamuthu * If this is the first pkt getting queued 158c1762a3fSThirumalai Pachamuthu * for this STA, update the PVB for this STA 159c1762a3fSThirumalai Pachamuthu */ 160c1762a3fSThirumalai Pachamuthu if (is_apsdq_empty) { 161c1762a3fSThirumalai Pachamuthu ath6kl_wmi_set_apsd_bfrd_traf(ar->wmi, 162c1762a3fSThirumalai Pachamuthu vif->fw_vif_idx, 163c1762a3fSThirumalai Pachamuthu conn->aid, 1, 0); 164c1762a3fSThirumalai Pachamuthu } 165c1762a3fSThirumalai Pachamuthu *flags |= WMI_DATA_HDR_FLAGS_UAPSD; 166c1762a3fSThirumalai Pachamuthu 167c1762a3fSThirumalai Pachamuthu return true; 168c1762a3fSThirumalai Pachamuthu } 169c1762a3fSThirumalai Pachamuthu 170c1762a3fSThirumalai Pachamuthu static bool ath6kl_process_psq(struct ath6kl_sta *conn, 171c1762a3fSThirumalai Pachamuthu struct ath6kl_vif *vif, 172c1762a3fSThirumalai Pachamuthu struct sk_buff *skb, 173c1762a3fSThirumalai Pachamuthu u32 *flags) 174c1762a3fSThirumalai Pachamuthu { 175c1762a3fSThirumalai Pachamuthu bool is_psq_empty = false; 176c1762a3fSThirumalai Pachamuthu struct ath6kl *ar = vif->ar; 177c1762a3fSThirumalai Pachamuthu 178c1762a3fSThirumalai Pachamuthu if (conn->sta_flags & STA_PS_POLLED) { 179c1762a3fSThirumalai Pachamuthu spin_lock_bh(&conn->psq_lock); 180c1762a3fSThirumalai Pachamuthu if (!skb_queue_empty(&conn->psq)) 181c1762a3fSThirumalai Pachamuthu *flags |= WMI_DATA_HDR_FLAGS_MORE; 182c1762a3fSThirumalai Pachamuthu spin_unlock_bh(&conn->psq_lock); 183c1762a3fSThirumalai Pachamuthu return false; 184c1762a3fSThirumalai Pachamuthu } 185c1762a3fSThirumalai Pachamuthu 186c1762a3fSThirumalai Pachamuthu /* Queue the frames if the STA is sleeping */ 187c1762a3fSThirumalai Pachamuthu spin_lock_bh(&conn->psq_lock); 188c1762a3fSThirumalai Pachamuthu is_psq_empty = skb_queue_empty(&conn->psq); 189c1762a3fSThirumalai Pachamuthu skb_queue_tail(&conn->psq, skb); 190c1762a3fSThirumalai Pachamuthu spin_unlock_bh(&conn->psq_lock); 191c1762a3fSThirumalai Pachamuthu 192c1762a3fSThirumalai Pachamuthu /* 193c1762a3fSThirumalai Pachamuthu * If this is the first pkt getting queued 194c1762a3fSThirumalai Pachamuthu * for this STA, update the PVB for this 195c1762a3fSThirumalai Pachamuthu * STA. 196c1762a3fSThirumalai Pachamuthu */ 197c1762a3fSThirumalai Pachamuthu if (is_psq_empty) 198c1762a3fSThirumalai Pachamuthu ath6kl_wmi_set_pvb_cmd(ar->wmi, 199c1762a3fSThirumalai Pachamuthu vif->fw_vif_idx, 200c1762a3fSThirumalai Pachamuthu conn->aid, 1); 201c1762a3fSThirumalai Pachamuthu return true; 202c1762a3fSThirumalai Pachamuthu } 203c1762a3fSThirumalai Pachamuthu 2046765d0aaSVasanthakumar Thiagarajan static bool ath6kl_powersave_ap(struct ath6kl_vif *vif, struct sk_buff *skb, 205c1762a3fSThirumalai Pachamuthu u32 *flags) 206bdcd8170SKalle Valo { 207bdcd8170SKalle Valo struct ethhdr *datap = (struct ethhdr *) skb->data; 208bdcd8170SKalle Valo struct ath6kl_sta *conn = NULL; 209c1762a3fSThirumalai Pachamuthu bool ps_queued = false; 2106765d0aaSVasanthakumar Thiagarajan struct ath6kl *ar = vif->ar; 211bdcd8170SKalle Valo 212bdcd8170SKalle Valo if (is_multicast_ether_addr(datap->h_dest)) { 213bdcd8170SKalle Valo u8 ctr = 0; 214bdcd8170SKalle Valo bool q_mcast = false; 215bdcd8170SKalle Valo 216bdcd8170SKalle Valo for (ctr = 0; ctr < AP_MAX_NUM_STA; ctr++) { 217bdcd8170SKalle Valo if (ar->sta_list[ctr].sta_flags & STA_PS_SLEEP) { 218bdcd8170SKalle Valo q_mcast = true; 219bdcd8170SKalle Valo break; 220bdcd8170SKalle Valo } 221bdcd8170SKalle Valo } 222bdcd8170SKalle Valo 223bdcd8170SKalle Valo if (q_mcast) { 224bdcd8170SKalle Valo /* 225bdcd8170SKalle Valo * If this transmit is not because of a Dtim Expiry 226bdcd8170SKalle Valo * q it. 227bdcd8170SKalle Valo */ 22859c98449SVasanthakumar Thiagarajan if (!test_bit(DTIM_EXPIRED, &vif->flags)) { 229bdcd8170SKalle Valo bool is_mcastq_empty = false; 230bdcd8170SKalle Valo 231bdcd8170SKalle Valo spin_lock_bh(&ar->mcastpsq_lock); 232bdcd8170SKalle Valo is_mcastq_empty = 233bdcd8170SKalle Valo skb_queue_empty(&ar->mcastpsq); 234bdcd8170SKalle Valo skb_queue_tail(&ar->mcastpsq, skb); 235bdcd8170SKalle Valo spin_unlock_bh(&ar->mcastpsq_lock); 236bdcd8170SKalle Valo 237bdcd8170SKalle Valo /* 238bdcd8170SKalle Valo * If this is the first Mcast pkt getting 239bdcd8170SKalle Valo * queued indicate to the target to set the 240bdcd8170SKalle Valo * BitmapControl LSB of the TIM IE. 241bdcd8170SKalle Valo */ 242bdcd8170SKalle Valo if (is_mcastq_empty) 243bdcd8170SKalle Valo ath6kl_wmi_set_pvb_cmd(ar->wmi, 244334234b5SVasanthakumar Thiagarajan vif->fw_vif_idx, 245bdcd8170SKalle Valo MCAST_AID, 1); 246bdcd8170SKalle Valo 247bdcd8170SKalle Valo ps_queued = true; 248bdcd8170SKalle Valo } else { 249bdcd8170SKalle Valo /* 250bdcd8170SKalle Valo * This transmit is because of Dtim expiry. 251bdcd8170SKalle Valo * Determine if MoreData bit has to be set. 252bdcd8170SKalle Valo */ 253bdcd8170SKalle Valo spin_lock_bh(&ar->mcastpsq_lock); 254bdcd8170SKalle Valo if (!skb_queue_empty(&ar->mcastpsq)) 255c1762a3fSThirumalai Pachamuthu *flags |= WMI_DATA_HDR_FLAGS_MORE; 256bdcd8170SKalle Valo spin_unlock_bh(&ar->mcastpsq_lock); 257bdcd8170SKalle Valo } 258bdcd8170SKalle Valo } 259bdcd8170SKalle Valo } else { 2606765d0aaSVasanthakumar Thiagarajan conn = ath6kl_find_sta(vif, datap->h_dest); 261bdcd8170SKalle Valo if (!conn) { 262bdcd8170SKalle Valo dev_kfree_skb(skb); 263bdcd8170SKalle Valo 264bdcd8170SKalle Valo /* Inform the caller that the skb is consumed */ 265bdcd8170SKalle Valo return true; 266bdcd8170SKalle Valo } 267bdcd8170SKalle Valo 268bdcd8170SKalle Valo if (conn->sta_flags & STA_PS_SLEEP) { 269c1762a3fSThirumalai Pachamuthu ps_queued = ath6kl_process_uapsdq(conn, 270c1762a3fSThirumalai Pachamuthu vif, skb, flags); 271c1762a3fSThirumalai Pachamuthu if (!(*flags & WMI_DATA_HDR_FLAGS_UAPSD)) 272c1762a3fSThirumalai Pachamuthu ps_queued = ath6kl_process_psq(conn, 273c1762a3fSThirumalai Pachamuthu vif, skb, flags); 274bdcd8170SKalle Valo } 275bdcd8170SKalle Valo } 276bdcd8170SKalle Valo return ps_queued; 277bdcd8170SKalle Valo } 278bdcd8170SKalle Valo 279bdcd8170SKalle Valo /* Tx functions */ 280bdcd8170SKalle Valo 281bdcd8170SKalle Valo int ath6kl_control_tx(void *devt, struct sk_buff *skb, 282bdcd8170SKalle Valo enum htc_endpoint_id eid) 283bdcd8170SKalle Valo { 284bdcd8170SKalle Valo struct ath6kl *ar = devt; 285bdcd8170SKalle Valo int status = 0; 286bdcd8170SKalle Valo struct ath6kl_cookie *cookie = NULL; 287bdcd8170SKalle Valo 288bdcd8170SKalle Valo spin_lock_bh(&ar->lock); 289bdcd8170SKalle Valo 290bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_WLAN_TX, 291bdcd8170SKalle Valo "%s: skb=0x%p, len=0x%x eid =%d\n", __func__, 292bdcd8170SKalle Valo skb, skb->len, eid); 293bdcd8170SKalle Valo 294bdcd8170SKalle Valo if (test_bit(WMI_CTRL_EP_FULL, &ar->flag) && (eid == ar->ctrl_ep)) { 295bdcd8170SKalle Valo /* 296bdcd8170SKalle Valo * Control endpoint is full, don't allocate resources, we 297bdcd8170SKalle Valo * are just going to drop this packet. 298bdcd8170SKalle Valo */ 299bdcd8170SKalle Valo cookie = NULL; 300bdcd8170SKalle Valo ath6kl_err("wmi ctrl ep full, dropping pkt : 0x%p, len:%d\n", 301bdcd8170SKalle Valo skb, skb->len); 302bdcd8170SKalle Valo } else 303bdcd8170SKalle Valo cookie = ath6kl_alloc_cookie(ar); 304bdcd8170SKalle Valo 305bdcd8170SKalle Valo if (cookie == NULL) { 306bdcd8170SKalle Valo spin_unlock_bh(&ar->lock); 307bdcd8170SKalle Valo status = -ENOMEM; 308bdcd8170SKalle Valo goto fail_ctrl_tx; 309bdcd8170SKalle Valo } 310bdcd8170SKalle Valo 311bdcd8170SKalle Valo ar->tx_pending[eid]++; 312bdcd8170SKalle Valo 313bdcd8170SKalle Valo if (eid != ar->ctrl_ep) 314bdcd8170SKalle Valo ar->total_tx_data_pend++; 315bdcd8170SKalle Valo 316bdcd8170SKalle Valo spin_unlock_bh(&ar->lock); 317bdcd8170SKalle Valo 318bdcd8170SKalle Valo cookie->skb = skb; 319bdcd8170SKalle Valo cookie->map_no = 0; 320bdcd8170SKalle Valo set_htc_pkt_info(&cookie->htc_pkt, cookie, skb->data, skb->len, 321bdcd8170SKalle Valo eid, ATH6KL_CONTROL_PKT_TAG); 322bdcd8170SKalle Valo 323bdcd8170SKalle Valo /* 324bdcd8170SKalle Valo * This interface is asynchronous, if there is an error, cleanup 325bdcd8170SKalle Valo * will happen in the TX completion callback. 326bdcd8170SKalle Valo */ 327ad226ec2SKalle Valo ath6kl_htc_tx(ar->htc_target, &cookie->htc_pkt); 328bdcd8170SKalle Valo 329bdcd8170SKalle Valo return 0; 330bdcd8170SKalle Valo 331bdcd8170SKalle Valo fail_ctrl_tx: 332bdcd8170SKalle Valo dev_kfree_skb(skb); 333bdcd8170SKalle Valo return status; 334bdcd8170SKalle Valo } 335bdcd8170SKalle Valo 336bdcd8170SKalle Valo int ath6kl_data_tx(struct sk_buff *skb, struct net_device *dev) 337bdcd8170SKalle Valo { 338bdcd8170SKalle Valo struct ath6kl *ar = ath6kl_priv(dev); 339bdcd8170SKalle Valo struct ath6kl_cookie *cookie = NULL; 340bdcd8170SKalle Valo enum htc_endpoint_id eid = ENDPOINT_UNUSED; 34159c98449SVasanthakumar Thiagarajan struct ath6kl_vif *vif = netdev_priv(dev); 342bdcd8170SKalle Valo u32 map_no = 0; 343bdcd8170SKalle Valo u16 htc_tag = ATH6KL_DATA_PKT_TAG; 344bdcd8170SKalle Valo u8 ac = 99 ; /* initialize to unmapped ac */ 345c1762a3fSThirumalai Pachamuthu bool chk_adhoc_ps_mapping = false; 346bdcd8170SKalle Valo int ret; 347bc48ad31SRishi Panjwani struct wmi_tx_meta_v2 meta_v2; 348bc48ad31SRishi Panjwani void *meta; 349bc48ad31SRishi Panjwani u8 csum_start = 0, csum_dest = 0, csum = skb->ip_summed; 350bc48ad31SRishi Panjwani u8 meta_ver = 0; 351c1762a3fSThirumalai Pachamuthu u32 flags = 0; 352bdcd8170SKalle Valo 353bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_WLAN_TX, 354bdcd8170SKalle Valo "%s: skb=0x%p, data=0x%p, len=0x%x\n", __func__, 355bdcd8170SKalle Valo skb, skb->data, skb->len); 356bdcd8170SKalle Valo 357bdcd8170SKalle Valo /* If target is not associated */ 35859c98449SVasanthakumar Thiagarajan if (!test_bit(CONNECTED, &vif->flags)) { 359bdcd8170SKalle Valo dev_kfree_skb(skb); 360bdcd8170SKalle Valo return 0; 361bdcd8170SKalle Valo } 362bdcd8170SKalle Valo 363bdcd8170SKalle Valo if (!test_bit(WMI_READY, &ar->flag)) 364bdcd8170SKalle Valo goto fail_tx; 365bdcd8170SKalle Valo 366bdcd8170SKalle Valo /* AP mode Power saving processing */ 367f5938f24SVasanthakumar Thiagarajan if (vif->nw_type == AP_NETWORK) { 368c1762a3fSThirumalai Pachamuthu if (ath6kl_powersave_ap(vif, skb, &flags)) 369bdcd8170SKalle Valo return 0; 370bdcd8170SKalle Valo } 371bdcd8170SKalle Valo 372bdcd8170SKalle Valo if (test_bit(WMI_ENABLED, &ar->flag)) { 373bc48ad31SRishi Panjwani if ((dev->features & NETIF_F_IP_CSUM) && 374bc48ad31SRishi Panjwani (csum == CHECKSUM_PARTIAL)) { 375bc48ad31SRishi Panjwani csum_start = skb->csum_start - 376bc48ad31SRishi Panjwani (skb_network_header(skb) - skb->head) + 377bc48ad31SRishi Panjwani sizeof(struct ath6kl_llc_snap_hdr); 378bc48ad31SRishi Panjwani csum_dest = skb->csum_offset + csum_start; 379bc48ad31SRishi Panjwani } 380bc48ad31SRishi Panjwani 381bdcd8170SKalle Valo if (skb_headroom(skb) < dev->needed_headroom) { 382a29517ceSVasanthakumar Thiagarajan struct sk_buff *tmp_skb = skb; 383a29517ceSVasanthakumar Thiagarajan 384a29517ceSVasanthakumar Thiagarajan skb = skb_realloc_headroom(skb, dev->needed_headroom); 385a29517ceSVasanthakumar Thiagarajan kfree_skb(tmp_skb); 386a29517ceSVasanthakumar Thiagarajan if (skb == NULL) { 387a29517ceSVasanthakumar Thiagarajan vif->net_stats.tx_dropped++; 388a29517ceSVasanthakumar Thiagarajan return 0; 389a29517ceSVasanthakumar Thiagarajan } 390bdcd8170SKalle Valo } 391bdcd8170SKalle Valo 392bdcd8170SKalle Valo if (ath6kl_wmi_dix_2_dot3(ar->wmi, skb)) { 393bdcd8170SKalle Valo ath6kl_err("ath6kl_wmi_dix_2_dot3 failed\n"); 394bdcd8170SKalle Valo goto fail_tx; 395bdcd8170SKalle Valo } 396bdcd8170SKalle Valo 397bc48ad31SRishi Panjwani if ((dev->features & NETIF_F_IP_CSUM) && 398bc48ad31SRishi Panjwani (csum == CHECKSUM_PARTIAL)) { 399bc48ad31SRishi Panjwani meta_v2.csum_start = csum_start; 400bc48ad31SRishi Panjwani meta_v2.csum_dest = csum_dest; 401bc48ad31SRishi Panjwani 402bc48ad31SRishi Panjwani /* instruct target to calculate checksum */ 403bc48ad31SRishi Panjwani meta_v2.csum_flags = WMI_META_V2_FLAG_CSUM_OFFLOAD; 404bc48ad31SRishi Panjwani meta_ver = WMI_META_VERSION_2; 405bc48ad31SRishi Panjwani meta = &meta_v2; 406bc48ad31SRishi Panjwani } else { 407bc48ad31SRishi Panjwani meta_ver = 0; 408bc48ad31SRishi Panjwani meta = NULL; 409bc48ad31SRishi Panjwani } 410bc48ad31SRishi Panjwani 411bc48ad31SRishi Panjwani ret = ath6kl_wmi_data_hdr_add(ar->wmi, skb, 412c1762a3fSThirumalai Pachamuthu DATA_MSGTYPE, flags, 0, 413bc48ad31SRishi Panjwani meta_ver, 414bc48ad31SRishi Panjwani meta, vif->fw_vif_idx); 415bc48ad31SRishi Panjwani 416bc48ad31SRishi Panjwani if (ret) { 417bc48ad31SRishi Panjwani ath6kl_warn("failed to add wmi data header:%d\n" 418bc48ad31SRishi Panjwani , ret); 419bdcd8170SKalle Valo goto fail_tx; 420bdcd8170SKalle Valo } 421bdcd8170SKalle Valo 422f5938f24SVasanthakumar Thiagarajan if ((vif->nw_type == ADHOC_NETWORK) && 42359c98449SVasanthakumar Thiagarajan ar->ibss_ps_enable && test_bit(CONNECTED, &vif->flags)) 424bdcd8170SKalle Valo chk_adhoc_ps_mapping = true; 425bdcd8170SKalle Valo else { 426bdcd8170SKalle Valo /* get the stream mapping */ 427240d2799SVasanthakumar Thiagarajan ret = ath6kl_wmi_implicit_create_pstream(ar->wmi, 428240d2799SVasanthakumar Thiagarajan vif->fw_vif_idx, skb, 42959c98449SVasanthakumar Thiagarajan 0, test_bit(WMM_ENABLED, &vif->flags), &ac); 430bdcd8170SKalle Valo if (ret) 431bdcd8170SKalle Valo goto fail_tx; 432bdcd8170SKalle Valo } 433bdcd8170SKalle Valo } else 434bdcd8170SKalle Valo goto fail_tx; 435bdcd8170SKalle Valo 436bdcd8170SKalle Valo spin_lock_bh(&ar->lock); 437bdcd8170SKalle Valo 438bdcd8170SKalle Valo if (chk_adhoc_ps_mapping) 439bdcd8170SKalle Valo eid = ath6kl_ibss_map_epid(skb, dev, &map_no); 440bdcd8170SKalle Valo else 441bdcd8170SKalle Valo eid = ar->ac2ep_map[ac]; 442bdcd8170SKalle Valo 443bdcd8170SKalle Valo if (eid == 0 || eid == ENDPOINT_UNUSED) { 444bdcd8170SKalle Valo ath6kl_err("eid %d is not mapped!\n", eid); 445bdcd8170SKalle Valo spin_unlock_bh(&ar->lock); 446bdcd8170SKalle Valo goto fail_tx; 447bdcd8170SKalle Valo } 448bdcd8170SKalle Valo 449bdcd8170SKalle Valo /* allocate resource for this packet */ 450bdcd8170SKalle Valo cookie = ath6kl_alloc_cookie(ar); 451bdcd8170SKalle Valo 452bdcd8170SKalle Valo if (!cookie) { 453bdcd8170SKalle Valo spin_unlock_bh(&ar->lock); 454bdcd8170SKalle Valo goto fail_tx; 455bdcd8170SKalle Valo } 456bdcd8170SKalle Valo 457bdcd8170SKalle Valo /* update counts while the lock is held */ 458bdcd8170SKalle Valo ar->tx_pending[eid]++; 459bdcd8170SKalle Valo ar->total_tx_data_pend++; 460bdcd8170SKalle Valo 461bdcd8170SKalle Valo spin_unlock_bh(&ar->lock); 462bdcd8170SKalle Valo 46300b1edf1SJouni Malinen if (!IS_ALIGNED((unsigned long) skb->data - HTC_HDR_LENGTH, 4) && 46400b1edf1SJouni Malinen skb_cloned(skb)) { 46500b1edf1SJouni Malinen /* 46600b1edf1SJouni Malinen * We will touch (move the buffer data to align it. Since the 46700b1edf1SJouni Malinen * skb buffer is cloned and not only the header is changed, we 46800b1edf1SJouni Malinen * have to copy it to allow the changes. Since we are copying 46900b1edf1SJouni Malinen * the data here, we may as well align it by reserving suitable 47000b1edf1SJouni Malinen * headroom to avoid the memmove in ath6kl_htc_tx_buf_align(). 47100b1edf1SJouni Malinen */ 47200b1edf1SJouni Malinen struct sk_buff *nskb; 47300b1edf1SJouni Malinen 47400b1edf1SJouni Malinen nskb = skb_copy_expand(skb, HTC_HDR_LENGTH, 0, GFP_ATOMIC); 47500b1edf1SJouni Malinen if (nskb == NULL) 47600b1edf1SJouni Malinen goto fail_tx; 47700b1edf1SJouni Malinen kfree_skb(skb); 47800b1edf1SJouni Malinen skb = nskb; 47900b1edf1SJouni Malinen } 48000b1edf1SJouni Malinen 481bdcd8170SKalle Valo cookie->skb = skb; 482bdcd8170SKalle Valo cookie->map_no = map_no; 483bdcd8170SKalle Valo set_htc_pkt_info(&cookie->htc_pkt, cookie, skb->data, skb->len, 484bdcd8170SKalle Valo eid, htc_tag); 485bdcd8170SKalle Valo 486ef094103SKalle Valo ath6kl_dbg_dump(ATH6KL_DBG_RAW_BYTES, __func__, "tx ", 487ef094103SKalle Valo skb->data, skb->len); 488bdcd8170SKalle Valo 489bdcd8170SKalle Valo /* 490bdcd8170SKalle Valo * HTC interface is asynchronous, if this fails, cleanup will 491bdcd8170SKalle Valo * happen in the ath6kl_tx_complete callback. 492bdcd8170SKalle Valo */ 493ad226ec2SKalle Valo ath6kl_htc_tx(ar->htc_target, &cookie->htc_pkt); 494bdcd8170SKalle Valo 495bdcd8170SKalle Valo return 0; 496bdcd8170SKalle Valo 497bdcd8170SKalle Valo fail_tx: 498bdcd8170SKalle Valo dev_kfree_skb(skb); 499bdcd8170SKalle Valo 500b95907a7SVasanthakumar Thiagarajan vif->net_stats.tx_dropped++; 501b95907a7SVasanthakumar Thiagarajan vif->net_stats.tx_aborted_errors++; 502bdcd8170SKalle Valo 503bdcd8170SKalle Valo return 0; 504bdcd8170SKalle Valo } 505bdcd8170SKalle Valo 506bdcd8170SKalle Valo /* indicate tx activity or inactivity on a WMI stream */ 507bdcd8170SKalle Valo void ath6kl_indicate_tx_activity(void *devt, u8 traffic_class, bool active) 508bdcd8170SKalle Valo { 509bdcd8170SKalle Valo struct ath6kl *ar = devt; 510bdcd8170SKalle Valo enum htc_endpoint_id eid; 511bdcd8170SKalle Valo int i; 512bdcd8170SKalle Valo 513bdcd8170SKalle Valo eid = ar->ac2ep_map[traffic_class]; 514bdcd8170SKalle Valo 515bdcd8170SKalle Valo if (!test_bit(WMI_ENABLED, &ar->flag)) 516bdcd8170SKalle Valo goto notify_htc; 517bdcd8170SKalle Valo 518bdcd8170SKalle Valo spin_lock_bh(&ar->lock); 519bdcd8170SKalle Valo 520bdcd8170SKalle Valo ar->ac_stream_active[traffic_class] = active; 521bdcd8170SKalle Valo 522bdcd8170SKalle Valo if (active) { 523bdcd8170SKalle Valo /* 524bdcd8170SKalle Valo * Keep track of the active stream with the highest 525bdcd8170SKalle Valo * priority. 526bdcd8170SKalle Valo */ 527bdcd8170SKalle Valo if (ar->ac_stream_pri_map[traffic_class] > 528bdcd8170SKalle Valo ar->hiac_stream_active_pri) 529bdcd8170SKalle Valo /* set the new highest active priority */ 530bdcd8170SKalle Valo ar->hiac_stream_active_pri = 531bdcd8170SKalle Valo ar->ac_stream_pri_map[traffic_class]; 532bdcd8170SKalle Valo 533bdcd8170SKalle Valo } else { 534bdcd8170SKalle Valo /* 535bdcd8170SKalle Valo * We may have to search for the next active stream 536bdcd8170SKalle Valo * that is the highest priority. 537bdcd8170SKalle Valo */ 538bdcd8170SKalle Valo if (ar->hiac_stream_active_pri == 539bdcd8170SKalle Valo ar->ac_stream_pri_map[traffic_class]) { 540bdcd8170SKalle Valo /* 541bdcd8170SKalle Valo * The highest priority stream just went inactive 542bdcd8170SKalle Valo * reset and search for the "next" highest "active" 543bdcd8170SKalle Valo * priority stream. 544bdcd8170SKalle Valo */ 545bdcd8170SKalle Valo ar->hiac_stream_active_pri = 0; 546bdcd8170SKalle Valo 547bdcd8170SKalle Valo for (i = 0; i < WMM_NUM_AC; i++) { 548bdcd8170SKalle Valo if (ar->ac_stream_active[i] && 549bdcd8170SKalle Valo (ar->ac_stream_pri_map[i] > 550bdcd8170SKalle Valo ar->hiac_stream_active_pri)) 551bdcd8170SKalle Valo /* 552bdcd8170SKalle Valo * Set the new highest active 553bdcd8170SKalle Valo * priority. 554bdcd8170SKalle Valo */ 555bdcd8170SKalle Valo ar->hiac_stream_active_pri = 556bdcd8170SKalle Valo ar->ac_stream_pri_map[i]; 557bdcd8170SKalle Valo } 558bdcd8170SKalle Valo } 559bdcd8170SKalle Valo } 560bdcd8170SKalle Valo 561bdcd8170SKalle Valo spin_unlock_bh(&ar->lock); 562bdcd8170SKalle Valo 563bdcd8170SKalle Valo notify_htc: 564bdcd8170SKalle Valo /* notify HTC, this may cause credit distribution changes */ 565ad226ec2SKalle Valo ath6kl_htc_indicate_activity_change(ar->htc_target, eid, active); 566bdcd8170SKalle Valo } 567bdcd8170SKalle Valo 568bdcd8170SKalle Valo enum htc_send_full_action ath6kl_tx_queue_full(struct htc_target *target, 569bdcd8170SKalle Valo struct htc_packet *packet) 570bdcd8170SKalle Valo { 571bdcd8170SKalle Valo struct ath6kl *ar = target->dev->ar; 572990bd915SVasanthakumar Thiagarajan struct ath6kl_vif *vif; 573bdcd8170SKalle Valo enum htc_endpoint_id endpoint = packet->endpoint; 574990bd915SVasanthakumar Thiagarajan enum htc_send_full_action action = HTC_SEND_FULL_KEEP; 575bdcd8170SKalle Valo 576bdcd8170SKalle Valo if (endpoint == ar->ctrl_ep) { 577bdcd8170SKalle Valo /* 578bdcd8170SKalle Valo * Under normal WMI if this is getting full, then something 579bdcd8170SKalle Valo * is running rampant the host should not be exhausting the 580bdcd8170SKalle Valo * WMI queue with too many commands the only exception to 581bdcd8170SKalle Valo * this is during testing using endpointping. 582bdcd8170SKalle Valo */ 583bdcd8170SKalle Valo set_bit(WMI_CTRL_EP_FULL, &ar->flag); 584bdcd8170SKalle Valo ath6kl_err("wmi ctrl ep is full\n"); 585901db39cSVasanthakumar Thiagarajan return action; 586bdcd8170SKalle Valo } 587bdcd8170SKalle Valo 588bdcd8170SKalle Valo if (packet->info.tx.tag == ATH6KL_CONTROL_PKT_TAG) 589901db39cSVasanthakumar Thiagarajan return action; 590bdcd8170SKalle Valo 591bdcd8170SKalle Valo /* 592bdcd8170SKalle Valo * The last MAX_HI_COOKIE_NUM "batch" of cookies are reserved for 593bdcd8170SKalle Valo * the highest active stream. 594bdcd8170SKalle Valo */ 595bdcd8170SKalle Valo if (ar->ac_stream_pri_map[ar->ep2ac_map[endpoint]] < 596bdcd8170SKalle Valo ar->hiac_stream_active_pri && 597901db39cSVasanthakumar Thiagarajan ar->cookie_count <= MAX_HI_COOKIE_NUM) 598bdcd8170SKalle Valo /* 599bdcd8170SKalle Valo * Give preference to the highest priority stream by 600bdcd8170SKalle Valo * dropping the packets which overflowed. 601bdcd8170SKalle Valo */ 602990bd915SVasanthakumar Thiagarajan action = HTC_SEND_FULL_DROP; 603bdcd8170SKalle Valo 604990bd915SVasanthakumar Thiagarajan /* FIXME: Locking */ 60511f6e40dSVasanthakumar Thiagarajan spin_lock_bh(&ar->list_lock); 606990bd915SVasanthakumar Thiagarajan list_for_each_entry(vif, &ar->vif_list, list) { 607901db39cSVasanthakumar Thiagarajan if (vif->nw_type == ADHOC_NETWORK || 608901db39cSVasanthakumar Thiagarajan action != HTC_SEND_FULL_DROP) { 60911f6e40dSVasanthakumar Thiagarajan spin_unlock_bh(&ar->list_lock); 610990bd915SVasanthakumar Thiagarajan 61159c98449SVasanthakumar Thiagarajan set_bit(NETQ_STOPPED, &vif->flags); 61228ae58ddSVasanthakumar Thiagarajan netif_stop_queue(vif->ndev); 613bdcd8170SKalle Valo 614990bd915SVasanthakumar Thiagarajan return action; 615990bd915SVasanthakumar Thiagarajan } 616990bd915SVasanthakumar Thiagarajan } 61711f6e40dSVasanthakumar Thiagarajan spin_unlock_bh(&ar->list_lock); 618990bd915SVasanthakumar Thiagarajan 619990bd915SVasanthakumar Thiagarajan return action; 620bdcd8170SKalle Valo } 621bdcd8170SKalle Valo 622bdcd8170SKalle Valo /* TODO this needs to be looked at */ 623990bd915SVasanthakumar Thiagarajan static void ath6kl_tx_clear_node_map(struct ath6kl_vif *vif, 624bdcd8170SKalle Valo enum htc_endpoint_id eid, u32 map_no) 625bdcd8170SKalle Valo { 626990bd915SVasanthakumar Thiagarajan struct ath6kl *ar = vif->ar; 627bdcd8170SKalle Valo u32 i; 628bdcd8170SKalle Valo 629f5938f24SVasanthakumar Thiagarajan if (vif->nw_type != ADHOC_NETWORK) 630bdcd8170SKalle Valo return; 631bdcd8170SKalle Valo 632bdcd8170SKalle Valo if (!ar->ibss_ps_enable) 633bdcd8170SKalle Valo return; 634bdcd8170SKalle Valo 635bdcd8170SKalle Valo if (eid == ar->ctrl_ep) 636bdcd8170SKalle Valo return; 637bdcd8170SKalle Valo 638bdcd8170SKalle Valo if (map_no == 0) 639bdcd8170SKalle Valo return; 640bdcd8170SKalle Valo 641bdcd8170SKalle Valo map_no--; 642bdcd8170SKalle Valo ar->node_map[map_no].tx_pend--; 643bdcd8170SKalle Valo 644bdcd8170SKalle Valo if (ar->node_map[map_no].tx_pend) 645bdcd8170SKalle Valo return; 646bdcd8170SKalle Valo 647bdcd8170SKalle Valo if (map_no != (ar->node_num - 1)) 648bdcd8170SKalle Valo return; 649bdcd8170SKalle Valo 650bdcd8170SKalle Valo for (i = ar->node_num; i > 0; i--) { 651bdcd8170SKalle Valo if (ar->node_map[i - 1].tx_pend) 652bdcd8170SKalle Valo break; 653bdcd8170SKalle Valo 654bdcd8170SKalle Valo memset(&ar->node_map[i - 1], 0, 655bdcd8170SKalle Valo sizeof(struct ath6kl_node_mapping)); 656bdcd8170SKalle Valo ar->node_num--; 657bdcd8170SKalle Valo } 658bdcd8170SKalle Valo } 659bdcd8170SKalle Valo 660bdcd8170SKalle Valo void ath6kl_tx_complete(void *context, struct list_head *packet_queue) 661bdcd8170SKalle Valo { 662bdcd8170SKalle Valo struct ath6kl *ar = context; 663bdcd8170SKalle Valo struct sk_buff_head skb_queue; 664bdcd8170SKalle Valo struct htc_packet *packet; 665bdcd8170SKalle Valo struct sk_buff *skb; 666bdcd8170SKalle Valo struct ath6kl_cookie *ath6kl_cookie; 667bdcd8170SKalle Valo u32 map_no = 0; 668bdcd8170SKalle Valo int status; 669bdcd8170SKalle Valo enum htc_endpoint_id eid; 670bdcd8170SKalle Valo bool wake_event = false; 67171f96ee6SKalle Valo bool flushing[ATH6KL_VIF_MAX] = {false}; 6726765d0aaSVasanthakumar Thiagarajan u8 if_idx; 673990bd915SVasanthakumar Thiagarajan struct ath6kl_vif *vif; 674bdcd8170SKalle Valo 675bdcd8170SKalle Valo skb_queue_head_init(&skb_queue); 676bdcd8170SKalle Valo 677bdcd8170SKalle Valo /* lock the driver as we update internal state */ 678bdcd8170SKalle Valo spin_lock_bh(&ar->lock); 679bdcd8170SKalle Valo 680bdcd8170SKalle Valo /* reap completed packets */ 681bdcd8170SKalle Valo while (!list_empty(packet_queue)) { 682bdcd8170SKalle Valo 683bdcd8170SKalle Valo packet = list_first_entry(packet_queue, struct htc_packet, 684bdcd8170SKalle Valo list); 685bdcd8170SKalle Valo list_del(&packet->list); 686bdcd8170SKalle Valo 687bdcd8170SKalle Valo ath6kl_cookie = (struct ath6kl_cookie *)packet->pkt_cntxt; 688bdcd8170SKalle Valo if (!ath6kl_cookie) 689bdcd8170SKalle Valo goto fatal; 690bdcd8170SKalle Valo 691bdcd8170SKalle Valo status = packet->status; 692bdcd8170SKalle Valo skb = ath6kl_cookie->skb; 693bdcd8170SKalle Valo eid = packet->endpoint; 694bdcd8170SKalle Valo map_no = ath6kl_cookie->map_no; 695bdcd8170SKalle Valo 696bdcd8170SKalle Valo if (!skb || !skb->data) 697bdcd8170SKalle Valo goto fatal; 698bdcd8170SKalle Valo 699bdcd8170SKalle Valo __skb_queue_tail(&skb_queue, skb); 700bdcd8170SKalle Valo 701bdcd8170SKalle Valo if (!status && (packet->act_len != skb->len)) 702bdcd8170SKalle Valo goto fatal; 703bdcd8170SKalle Valo 704bdcd8170SKalle Valo ar->tx_pending[eid]--; 705bdcd8170SKalle Valo 706bdcd8170SKalle Valo if (eid != ar->ctrl_ep) 707bdcd8170SKalle Valo ar->total_tx_data_pend--; 708bdcd8170SKalle Valo 709bdcd8170SKalle Valo if (eid == ar->ctrl_ep) { 710bdcd8170SKalle Valo if (test_bit(WMI_CTRL_EP_FULL, &ar->flag)) 711bdcd8170SKalle Valo clear_bit(WMI_CTRL_EP_FULL, &ar->flag); 712bdcd8170SKalle Valo 713bdcd8170SKalle Valo if (ar->tx_pending[eid] == 0) 714bdcd8170SKalle Valo wake_event = true; 715bdcd8170SKalle Valo } 716bdcd8170SKalle Valo 7176765d0aaSVasanthakumar Thiagarajan if (eid == ar->ctrl_ep) { 7186765d0aaSVasanthakumar Thiagarajan if_idx = wmi_cmd_hdr_get_if_idx( 719f3803eb2SVasanthakumar Thiagarajan (struct wmi_cmd_hdr *) packet->buf); 7206765d0aaSVasanthakumar Thiagarajan } else { 7216765d0aaSVasanthakumar Thiagarajan if_idx = wmi_data_hdr_get_if_idx( 722f3803eb2SVasanthakumar Thiagarajan (struct wmi_data_hdr *) packet->buf); 7236765d0aaSVasanthakumar Thiagarajan } 7246765d0aaSVasanthakumar Thiagarajan 7256765d0aaSVasanthakumar Thiagarajan vif = ath6kl_get_vif_by_index(ar, if_idx); 7266765d0aaSVasanthakumar Thiagarajan if (!vif) { 7276765d0aaSVasanthakumar Thiagarajan ath6kl_free_cookie(ar, ath6kl_cookie); 7286765d0aaSVasanthakumar Thiagarajan continue; 7296765d0aaSVasanthakumar Thiagarajan } 7306765d0aaSVasanthakumar Thiagarajan 731bdcd8170SKalle Valo if (status) { 732bdcd8170SKalle Valo if (status == -ECANCELED) 733bdcd8170SKalle Valo /* a packet was flushed */ 734990bd915SVasanthakumar Thiagarajan flushing[if_idx] = true; 735bdcd8170SKalle Valo 736b95907a7SVasanthakumar Thiagarajan vif->net_stats.tx_errors++; 737bdcd8170SKalle Valo 738778e6502SKalle Valo if (status != -ENOSPC && status != -ECANCELED) 739778e6502SKalle Valo ath6kl_warn("tx complete error: %d\n", status); 740778e6502SKalle Valo 741bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_WLAN_TX, 742bdcd8170SKalle Valo "%s: skb=0x%p data=0x%p len=0x%x eid=%d %s\n", 743bdcd8170SKalle Valo __func__, skb, packet->buf, packet->act_len, 744bdcd8170SKalle Valo eid, "error!"); 745bdcd8170SKalle Valo } else { 746bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_WLAN_TX, 747bdcd8170SKalle Valo "%s: skb=0x%p data=0x%p len=0x%x eid=%d %s\n", 748bdcd8170SKalle Valo __func__, skb, packet->buf, packet->act_len, 749bdcd8170SKalle Valo eid, "OK"); 750bdcd8170SKalle Valo 751990bd915SVasanthakumar Thiagarajan flushing[if_idx] = false; 752b95907a7SVasanthakumar Thiagarajan vif->net_stats.tx_packets++; 753b95907a7SVasanthakumar Thiagarajan vif->net_stats.tx_bytes += skb->len; 754bdcd8170SKalle Valo } 755bdcd8170SKalle Valo 756990bd915SVasanthakumar Thiagarajan ath6kl_tx_clear_node_map(vif, eid, map_no); 757bdcd8170SKalle Valo 758bdcd8170SKalle Valo ath6kl_free_cookie(ar, ath6kl_cookie); 759bdcd8170SKalle Valo 76059c98449SVasanthakumar Thiagarajan if (test_bit(NETQ_STOPPED, &vif->flags)) 76159c98449SVasanthakumar Thiagarajan clear_bit(NETQ_STOPPED, &vif->flags); 762bdcd8170SKalle Valo } 763bdcd8170SKalle Valo 764bdcd8170SKalle Valo spin_unlock_bh(&ar->lock); 765bdcd8170SKalle Valo 766bdcd8170SKalle Valo __skb_queue_purge(&skb_queue); 767bdcd8170SKalle Valo 768990bd915SVasanthakumar Thiagarajan /* FIXME: Locking */ 76911f6e40dSVasanthakumar Thiagarajan spin_lock_bh(&ar->list_lock); 770990bd915SVasanthakumar Thiagarajan list_for_each_entry(vif, &ar->vif_list, list) { 771990bd915SVasanthakumar Thiagarajan if (test_bit(CONNECTED, &vif->flags) && 772990bd915SVasanthakumar Thiagarajan !flushing[vif->fw_vif_idx]) { 77311f6e40dSVasanthakumar Thiagarajan spin_unlock_bh(&ar->list_lock); 77428ae58ddSVasanthakumar Thiagarajan netif_wake_queue(vif->ndev); 77511f6e40dSVasanthakumar Thiagarajan spin_lock_bh(&ar->list_lock); 776bdcd8170SKalle Valo } 777990bd915SVasanthakumar Thiagarajan } 77811f6e40dSVasanthakumar Thiagarajan spin_unlock_bh(&ar->list_lock); 779bdcd8170SKalle Valo 780bdcd8170SKalle Valo if (wake_event) 781bdcd8170SKalle Valo wake_up(&ar->event_wq); 782bdcd8170SKalle Valo 783bdcd8170SKalle Valo return; 784bdcd8170SKalle Valo 785bdcd8170SKalle Valo fatal: 786bdcd8170SKalle Valo WARN_ON(1); 787bdcd8170SKalle Valo spin_unlock_bh(&ar->lock); 788bdcd8170SKalle Valo return; 789bdcd8170SKalle Valo } 790bdcd8170SKalle Valo 791bdcd8170SKalle Valo void ath6kl_tx_data_cleanup(struct ath6kl *ar) 792bdcd8170SKalle Valo { 793bdcd8170SKalle Valo int i; 794bdcd8170SKalle Valo 795bdcd8170SKalle Valo /* flush all the data (non-control) streams */ 796bdcd8170SKalle Valo for (i = 0; i < WMM_NUM_AC; i++) 797ad226ec2SKalle Valo ath6kl_htc_flush_txep(ar->htc_target, ar->ac2ep_map[i], 798bdcd8170SKalle Valo ATH6KL_DATA_PKT_TAG); 799bdcd8170SKalle Valo } 800bdcd8170SKalle Valo 801bdcd8170SKalle Valo /* Rx functions */ 802bdcd8170SKalle Valo 803bdcd8170SKalle Valo static void ath6kl_deliver_frames_to_nw_stack(struct net_device *dev, 804bdcd8170SKalle Valo struct sk_buff *skb) 805bdcd8170SKalle Valo { 806bdcd8170SKalle Valo if (!skb) 807bdcd8170SKalle Valo return; 808bdcd8170SKalle Valo 809bdcd8170SKalle Valo skb->dev = dev; 810bdcd8170SKalle Valo 811bdcd8170SKalle Valo if (!(skb->dev->flags & IFF_UP)) { 812bdcd8170SKalle Valo dev_kfree_skb(skb); 813bdcd8170SKalle Valo return; 814bdcd8170SKalle Valo } 815bdcd8170SKalle Valo 816bdcd8170SKalle Valo skb->protocol = eth_type_trans(skb, skb->dev); 817bdcd8170SKalle Valo 818bdcd8170SKalle Valo netif_rx_ni(skb); 819bdcd8170SKalle Valo } 820bdcd8170SKalle Valo 821bdcd8170SKalle Valo static void ath6kl_alloc_netbufs(struct sk_buff_head *q, u16 num) 822bdcd8170SKalle Valo { 823bdcd8170SKalle Valo struct sk_buff *skb; 824bdcd8170SKalle Valo 825bdcd8170SKalle Valo while (num) { 826bdcd8170SKalle Valo skb = ath6kl_buf_alloc(ATH6KL_BUFFER_SIZE); 827bdcd8170SKalle Valo if (!skb) { 828bdcd8170SKalle Valo ath6kl_err("netbuf allocation failed\n"); 829bdcd8170SKalle Valo return; 830bdcd8170SKalle Valo } 831bdcd8170SKalle Valo skb_queue_tail(q, skb); 832bdcd8170SKalle Valo num--; 833bdcd8170SKalle Valo } 834bdcd8170SKalle Valo } 835bdcd8170SKalle Valo 836bdcd8170SKalle Valo static struct sk_buff *aggr_get_free_skb(struct aggr_info *p_aggr) 837bdcd8170SKalle Valo { 838bdcd8170SKalle Valo struct sk_buff *skb = NULL; 839bdcd8170SKalle Valo 8407baef812SVasanthakumar Thiagarajan if (skb_queue_len(&p_aggr->rx_amsdu_freeq) < 8417baef812SVasanthakumar Thiagarajan (AGGR_NUM_OF_FREE_NETBUFS >> 2)) 8427baef812SVasanthakumar Thiagarajan ath6kl_alloc_netbufs(&p_aggr->rx_amsdu_freeq, 8437baef812SVasanthakumar Thiagarajan AGGR_NUM_OF_FREE_NETBUFS); 844bdcd8170SKalle Valo 8457baef812SVasanthakumar Thiagarajan skb = skb_dequeue(&p_aggr->rx_amsdu_freeq); 846bdcd8170SKalle Valo 847bdcd8170SKalle Valo return skb; 848bdcd8170SKalle Valo } 849bdcd8170SKalle Valo 850bdcd8170SKalle Valo void ath6kl_rx_refill(struct htc_target *target, enum htc_endpoint_id endpoint) 851bdcd8170SKalle Valo { 852bdcd8170SKalle Valo struct ath6kl *ar = target->dev->ar; 853bdcd8170SKalle Valo struct sk_buff *skb; 854bdcd8170SKalle Valo int rx_buf; 855bdcd8170SKalle Valo int n_buf_refill; 856bdcd8170SKalle Valo struct htc_packet *packet; 857bdcd8170SKalle Valo struct list_head queue; 858bdcd8170SKalle Valo 859bdcd8170SKalle Valo n_buf_refill = ATH6KL_MAX_RX_BUFFERS - 860ad226ec2SKalle Valo ath6kl_htc_get_rxbuf_num(ar->htc_target, endpoint); 861bdcd8170SKalle Valo 862bdcd8170SKalle Valo if (n_buf_refill <= 0) 863bdcd8170SKalle Valo return; 864bdcd8170SKalle Valo 865bdcd8170SKalle Valo INIT_LIST_HEAD(&queue); 866bdcd8170SKalle Valo 867bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_WLAN_RX, 868bdcd8170SKalle Valo "%s: providing htc with %d buffers at eid=%d\n", 869bdcd8170SKalle Valo __func__, n_buf_refill, endpoint); 870bdcd8170SKalle Valo 871bdcd8170SKalle Valo for (rx_buf = 0; rx_buf < n_buf_refill; rx_buf++) { 872bdcd8170SKalle Valo skb = ath6kl_buf_alloc(ATH6KL_BUFFER_SIZE); 873bdcd8170SKalle Valo if (!skb) 874bdcd8170SKalle Valo break; 875bdcd8170SKalle Valo 876bdcd8170SKalle Valo packet = (struct htc_packet *) skb->head; 87794e532d1SVasanthakumar Thiagarajan if (!IS_ALIGNED((unsigned long) skb->data, 4)) 8781df94a85SVasanthakumar Thiagarajan skb->data = PTR_ALIGN(skb->data - 4, 4); 879bdcd8170SKalle Valo set_htc_rxpkt_info(packet, skb, skb->data, 880bdcd8170SKalle Valo ATH6KL_BUFFER_SIZE, endpoint); 881bdcd8170SKalle Valo list_add_tail(&packet->list, &queue); 882bdcd8170SKalle Valo } 883bdcd8170SKalle Valo 884bdcd8170SKalle Valo if (!list_empty(&queue)) 885ad226ec2SKalle Valo ath6kl_htc_add_rxbuf_multiple(ar->htc_target, &queue); 886bdcd8170SKalle Valo } 887bdcd8170SKalle Valo 888bdcd8170SKalle Valo void ath6kl_refill_amsdu_rxbufs(struct ath6kl *ar, int count) 889bdcd8170SKalle Valo { 890bdcd8170SKalle Valo struct htc_packet *packet; 891bdcd8170SKalle Valo struct sk_buff *skb; 892bdcd8170SKalle Valo 893bdcd8170SKalle Valo while (count) { 894bdcd8170SKalle Valo skb = ath6kl_buf_alloc(ATH6KL_AMSDU_BUFFER_SIZE); 895bdcd8170SKalle Valo if (!skb) 896bdcd8170SKalle Valo return; 897bdcd8170SKalle Valo 898bdcd8170SKalle Valo packet = (struct htc_packet *) skb->head; 89994e532d1SVasanthakumar Thiagarajan if (!IS_ALIGNED((unsigned long) skb->data, 4)) 9001df94a85SVasanthakumar Thiagarajan skb->data = PTR_ALIGN(skb->data - 4, 4); 901bdcd8170SKalle Valo set_htc_rxpkt_info(packet, skb, skb->data, 902bdcd8170SKalle Valo ATH6KL_AMSDU_BUFFER_SIZE, 0); 903bdcd8170SKalle Valo spin_lock_bh(&ar->lock); 904bdcd8170SKalle Valo list_add_tail(&packet->list, &ar->amsdu_rx_buffer_queue); 905bdcd8170SKalle Valo spin_unlock_bh(&ar->lock); 906bdcd8170SKalle Valo count--; 907bdcd8170SKalle Valo } 908bdcd8170SKalle Valo } 909bdcd8170SKalle Valo 910bdcd8170SKalle Valo /* 911bdcd8170SKalle Valo * Callback to allocate a receive buffer for a pending packet. We use a 912bdcd8170SKalle Valo * pre-allocated list of buffers of maximum AMSDU size (4K). 913bdcd8170SKalle Valo */ 914bdcd8170SKalle Valo struct htc_packet *ath6kl_alloc_amsdu_rxbuf(struct htc_target *target, 915bdcd8170SKalle Valo enum htc_endpoint_id endpoint, 916bdcd8170SKalle Valo int len) 917bdcd8170SKalle Valo { 918bdcd8170SKalle Valo struct ath6kl *ar = target->dev->ar; 919bdcd8170SKalle Valo struct htc_packet *packet = NULL; 920bdcd8170SKalle Valo struct list_head *pkt_pos; 921bdcd8170SKalle Valo int refill_cnt = 0, depth = 0; 922bdcd8170SKalle Valo 923bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_WLAN_RX, "%s: eid=%d, len:%d\n", 924bdcd8170SKalle Valo __func__, endpoint, len); 925bdcd8170SKalle Valo 926bdcd8170SKalle Valo if ((len <= ATH6KL_BUFFER_SIZE) || 927bdcd8170SKalle Valo (len > ATH6KL_AMSDU_BUFFER_SIZE)) 928bdcd8170SKalle Valo return NULL; 929bdcd8170SKalle Valo 930bdcd8170SKalle Valo spin_lock_bh(&ar->lock); 931bdcd8170SKalle Valo 932bdcd8170SKalle Valo if (list_empty(&ar->amsdu_rx_buffer_queue)) { 933bdcd8170SKalle Valo spin_unlock_bh(&ar->lock); 934bdcd8170SKalle Valo refill_cnt = ATH6KL_MAX_AMSDU_RX_BUFFERS; 935bdcd8170SKalle Valo goto refill_buf; 936bdcd8170SKalle Valo } 937bdcd8170SKalle Valo 938bdcd8170SKalle Valo packet = list_first_entry(&ar->amsdu_rx_buffer_queue, 939bdcd8170SKalle Valo struct htc_packet, list); 940bdcd8170SKalle Valo list_del(&packet->list); 941bdcd8170SKalle Valo list_for_each(pkt_pos, &ar->amsdu_rx_buffer_queue) 942bdcd8170SKalle Valo depth++; 943bdcd8170SKalle Valo 944bdcd8170SKalle Valo refill_cnt = ATH6KL_MAX_AMSDU_RX_BUFFERS - depth; 945bdcd8170SKalle Valo spin_unlock_bh(&ar->lock); 946bdcd8170SKalle Valo 947bdcd8170SKalle Valo /* set actual endpoint ID */ 948bdcd8170SKalle Valo packet->endpoint = endpoint; 949bdcd8170SKalle Valo 950bdcd8170SKalle Valo refill_buf: 951bdcd8170SKalle Valo if (refill_cnt >= ATH6KL_AMSDU_REFILL_THRESHOLD) 952bdcd8170SKalle Valo ath6kl_refill_amsdu_rxbufs(ar, refill_cnt); 953bdcd8170SKalle Valo 954bdcd8170SKalle Valo return packet; 955bdcd8170SKalle Valo } 956bdcd8170SKalle Valo 957bdcd8170SKalle Valo static void aggr_slice_amsdu(struct aggr_info *p_aggr, 958bdcd8170SKalle Valo struct rxtid *rxtid, struct sk_buff *skb) 959bdcd8170SKalle Valo { 960bdcd8170SKalle Valo struct sk_buff *new_skb; 961bdcd8170SKalle Valo struct ethhdr *hdr; 962bdcd8170SKalle Valo u16 frame_8023_len, payload_8023_len, mac_hdr_len, amsdu_len; 963bdcd8170SKalle Valo u8 *framep; 964bdcd8170SKalle Valo 965bdcd8170SKalle Valo mac_hdr_len = sizeof(struct ethhdr); 966bdcd8170SKalle Valo framep = skb->data + mac_hdr_len; 967bdcd8170SKalle Valo amsdu_len = skb->len - mac_hdr_len; 968bdcd8170SKalle Valo 969bdcd8170SKalle Valo while (amsdu_len > mac_hdr_len) { 970bdcd8170SKalle Valo hdr = (struct ethhdr *) framep; 971bdcd8170SKalle Valo payload_8023_len = ntohs(hdr->h_proto); 972bdcd8170SKalle Valo 973bdcd8170SKalle Valo if (payload_8023_len < MIN_MSDU_SUBFRAME_PAYLOAD_LEN || 974bdcd8170SKalle Valo payload_8023_len > MAX_MSDU_SUBFRAME_PAYLOAD_LEN) { 975bdcd8170SKalle Valo ath6kl_err("802.3 AMSDU frame bound check failed. len %d\n", 976bdcd8170SKalle Valo payload_8023_len); 977bdcd8170SKalle Valo break; 978bdcd8170SKalle Valo } 979bdcd8170SKalle Valo 980bdcd8170SKalle Valo frame_8023_len = payload_8023_len + mac_hdr_len; 981bdcd8170SKalle Valo new_skb = aggr_get_free_skb(p_aggr); 982bdcd8170SKalle Valo if (!new_skb) { 983bdcd8170SKalle Valo ath6kl_err("no buffer available\n"); 984bdcd8170SKalle Valo break; 985bdcd8170SKalle Valo } 986bdcd8170SKalle Valo 987bdcd8170SKalle Valo memcpy(new_skb->data, framep, frame_8023_len); 988bdcd8170SKalle Valo skb_put(new_skb, frame_8023_len); 989bdcd8170SKalle Valo if (ath6kl_wmi_dot3_2_dix(new_skb)) { 990bdcd8170SKalle Valo ath6kl_err("dot3_2_dix error\n"); 991bdcd8170SKalle Valo dev_kfree_skb(new_skb); 992bdcd8170SKalle Valo break; 993bdcd8170SKalle Valo } 994bdcd8170SKalle Valo 995bdcd8170SKalle Valo skb_queue_tail(&rxtid->q, new_skb); 996bdcd8170SKalle Valo 997bdcd8170SKalle Valo /* Is this the last subframe within this aggregate ? */ 998bdcd8170SKalle Valo if ((amsdu_len - frame_8023_len) == 0) 999bdcd8170SKalle Valo break; 1000bdcd8170SKalle Valo 1001bdcd8170SKalle Valo /* Add the length of A-MSDU subframe padding bytes - 1002bdcd8170SKalle Valo * Round to nearest word. 1003bdcd8170SKalle Valo */ 100413e34ea1SVasanthakumar Thiagarajan frame_8023_len = ALIGN(frame_8023_len, 4); 1005bdcd8170SKalle Valo 1006bdcd8170SKalle Valo framep += frame_8023_len; 1007bdcd8170SKalle Valo amsdu_len -= frame_8023_len; 1008bdcd8170SKalle Valo } 1009bdcd8170SKalle Valo 1010bdcd8170SKalle Valo dev_kfree_skb(skb); 1011bdcd8170SKalle Valo } 1012bdcd8170SKalle Valo 10131d2a4456SVasanthakumar Thiagarajan static void aggr_deque_frms(struct aggr_info_conn *agg_conn, u8 tid, 1014bdcd8170SKalle Valo u16 seq_no, u8 order) 1015bdcd8170SKalle Valo { 1016bdcd8170SKalle Valo struct sk_buff *skb; 1017bdcd8170SKalle Valo struct rxtid *rxtid; 1018bdcd8170SKalle Valo struct skb_hold_q *node; 1019bdcd8170SKalle Valo u16 idx, idx_end, seq_end; 1020bdcd8170SKalle Valo struct rxtid_stats *stats; 1021bdcd8170SKalle Valo 10227baef812SVasanthakumar Thiagarajan rxtid = &agg_conn->rx_tid[tid]; 10237baef812SVasanthakumar Thiagarajan stats = &agg_conn->stat[tid]; 1024bdcd8170SKalle Valo 1025bdcd8170SKalle Valo idx = AGGR_WIN_IDX(rxtid->seq_next, rxtid->hold_q_sz); 1026bdcd8170SKalle Valo 1027bdcd8170SKalle Valo /* 1028bdcd8170SKalle Valo * idx_end is typically the last possible frame in the window, 1029bdcd8170SKalle Valo * but changes to 'the' seq_no, when BAR comes. If seq_no 1030bdcd8170SKalle Valo * is non-zero, we will go up to that and stop. 1031bdcd8170SKalle Valo * Note: last seq no in current window will occupy the same 1032bdcd8170SKalle Valo * index position as index that is just previous to start. 1033bdcd8170SKalle Valo * An imp point : if win_sz is 7, for seq_no space of 4095, 1034bdcd8170SKalle Valo * then, there would be holes when sequence wrap around occurs. 1035bdcd8170SKalle Valo * Target should judiciously choose the win_sz, based on 1036bdcd8170SKalle Valo * this condition. For 4095, (TID_WINDOW_SZ = 2 x win_sz 1037bdcd8170SKalle Valo * 2, 4, 8, 16 win_sz works fine). 1038bdcd8170SKalle Valo * We must deque from "idx" to "idx_end", including both. 1039bdcd8170SKalle Valo */ 1040bdcd8170SKalle Valo seq_end = seq_no ? seq_no : rxtid->seq_next; 1041bdcd8170SKalle Valo idx_end = AGGR_WIN_IDX(seq_end, rxtid->hold_q_sz); 1042bdcd8170SKalle Valo 1043bdcd8170SKalle Valo spin_lock_bh(&rxtid->lock); 1044bdcd8170SKalle Valo 1045bdcd8170SKalle Valo do { 1046bdcd8170SKalle Valo node = &rxtid->hold_q[idx]; 1047bdcd8170SKalle Valo if ((order == 1) && (!node->skb)) 1048bdcd8170SKalle Valo break; 1049bdcd8170SKalle Valo 1050bdcd8170SKalle Valo if (node->skb) { 1051bdcd8170SKalle Valo if (node->is_amsdu) 10521d2a4456SVasanthakumar Thiagarajan aggr_slice_amsdu(agg_conn->aggr_info, rxtid, 10531d2a4456SVasanthakumar Thiagarajan node->skb); 1054bdcd8170SKalle Valo else 1055bdcd8170SKalle Valo skb_queue_tail(&rxtid->q, node->skb); 1056bdcd8170SKalle Valo node->skb = NULL; 1057bdcd8170SKalle Valo } else 1058bdcd8170SKalle Valo stats->num_hole++; 1059bdcd8170SKalle Valo 1060bdcd8170SKalle Valo rxtid->seq_next = ATH6KL_NEXT_SEQ_NO(rxtid->seq_next); 1061bdcd8170SKalle Valo idx = AGGR_WIN_IDX(rxtid->seq_next, rxtid->hold_q_sz); 1062bdcd8170SKalle Valo } while (idx != idx_end); 1063bdcd8170SKalle Valo 1064bdcd8170SKalle Valo spin_unlock_bh(&rxtid->lock); 1065bdcd8170SKalle Valo 1066bdcd8170SKalle Valo stats->num_delivered += skb_queue_len(&rxtid->q); 1067bdcd8170SKalle Valo 1068bdcd8170SKalle Valo while ((skb = skb_dequeue(&rxtid->q))) 10697baef812SVasanthakumar Thiagarajan ath6kl_deliver_frames_to_nw_stack(agg_conn->dev, skb); 1070bdcd8170SKalle Valo } 1071bdcd8170SKalle Valo 10721d2a4456SVasanthakumar Thiagarajan static bool aggr_process_recv_frm(struct aggr_info_conn *agg_conn, u8 tid, 1073bdcd8170SKalle Valo u16 seq_no, 1074bdcd8170SKalle Valo bool is_amsdu, struct sk_buff *frame) 1075bdcd8170SKalle Valo { 1076bdcd8170SKalle Valo struct rxtid *rxtid; 1077bdcd8170SKalle Valo struct rxtid_stats *stats; 1078bdcd8170SKalle Valo struct sk_buff *skb; 1079bdcd8170SKalle Valo struct skb_hold_q *node; 1080bdcd8170SKalle Valo u16 idx, st, cur, end; 1081bdcd8170SKalle Valo bool is_queued = false; 1082bdcd8170SKalle Valo u16 extended_end; 1083bdcd8170SKalle Valo 10847baef812SVasanthakumar Thiagarajan rxtid = &agg_conn->rx_tid[tid]; 10857baef812SVasanthakumar Thiagarajan stats = &agg_conn->stat[tid]; 1086bdcd8170SKalle Valo 1087bdcd8170SKalle Valo stats->num_into_aggr++; 1088bdcd8170SKalle Valo 1089bdcd8170SKalle Valo if (!rxtid->aggr) { 1090bdcd8170SKalle Valo if (is_amsdu) { 10911d2a4456SVasanthakumar Thiagarajan aggr_slice_amsdu(agg_conn->aggr_info, rxtid, frame); 1092bdcd8170SKalle Valo is_queued = true; 1093bdcd8170SKalle Valo stats->num_amsdu++; 1094bdcd8170SKalle Valo while ((skb = skb_dequeue(&rxtid->q))) 10957baef812SVasanthakumar Thiagarajan ath6kl_deliver_frames_to_nw_stack(agg_conn->dev, 1096bdcd8170SKalle Valo skb); 1097bdcd8170SKalle Valo } 1098bdcd8170SKalle Valo return is_queued; 1099bdcd8170SKalle Valo } 1100bdcd8170SKalle Valo 1101bdcd8170SKalle Valo /* Check the incoming sequence no, if it's in the window */ 1102bdcd8170SKalle Valo st = rxtid->seq_next; 1103bdcd8170SKalle Valo cur = seq_no; 1104bdcd8170SKalle Valo end = (st + rxtid->hold_q_sz-1) & ATH6KL_MAX_SEQ_NO; 1105bdcd8170SKalle Valo 1106bdcd8170SKalle Valo if (((st < end) && (cur < st || cur > end)) || 1107bdcd8170SKalle Valo ((st > end) && (cur > end) && (cur < st))) { 1108bdcd8170SKalle Valo extended_end = (end + rxtid->hold_q_sz - 1) & 1109bdcd8170SKalle Valo ATH6KL_MAX_SEQ_NO; 1110bdcd8170SKalle Valo 1111bdcd8170SKalle Valo if (((end < extended_end) && 1112bdcd8170SKalle Valo (cur < end || cur > extended_end)) || 1113bdcd8170SKalle Valo ((end > extended_end) && (cur > extended_end) && 1114bdcd8170SKalle Valo (cur < end))) { 11151d2a4456SVasanthakumar Thiagarajan aggr_deque_frms(agg_conn, tid, 0, 0); 1116bdcd8170SKalle Valo if (cur >= rxtid->hold_q_sz - 1) 1117bdcd8170SKalle Valo rxtid->seq_next = cur - (rxtid->hold_q_sz - 1); 1118bdcd8170SKalle Valo else 1119bdcd8170SKalle Valo rxtid->seq_next = ATH6KL_MAX_SEQ_NO - 1120bdcd8170SKalle Valo (rxtid->hold_q_sz - 2 - cur); 1121bdcd8170SKalle Valo } else { 1122bdcd8170SKalle Valo /* 1123bdcd8170SKalle Valo * Dequeue only those frames that are outside the 1124bdcd8170SKalle Valo * new shifted window. 1125bdcd8170SKalle Valo */ 1126bdcd8170SKalle Valo if (cur >= rxtid->hold_q_sz - 1) 1127bdcd8170SKalle Valo st = cur - (rxtid->hold_q_sz - 1); 1128bdcd8170SKalle Valo else 1129bdcd8170SKalle Valo st = ATH6KL_MAX_SEQ_NO - 1130bdcd8170SKalle Valo (rxtid->hold_q_sz - 2 - cur); 1131bdcd8170SKalle Valo 11321d2a4456SVasanthakumar Thiagarajan aggr_deque_frms(agg_conn, tid, st, 0); 1133bdcd8170SKalle Valo } 1134bdcd8170SKalle Valo 1135bdcd8170SKalle Valo stats->num_oow++; 1136bdcd8170SKalle Valo } 1137bdcd8170SKalle Valo 1138bdcd8170SKalle Valo idx = AGGR_WIN_IDX(seq_no, rxtid->hold_q_sz); 1139bdcd8170SKalle Valo 1140bdcd8170SKalle Valo node = &rxtid->hold_q[idx]; 1141bdcd8170SKalle Valo 1142bdcd8170SKalle Valo spin_lock_bh(&rxtid->lock); 1143bdcd8170SKalle Valo 1144bdcd8170SKalle Valo /* 1145bdcd8170SKalle Valo * Is the cur frame duplicate or something beyond our window(hold_q 1146bdcd8170SKalle Valo * -> which is 2x, already)? 1147bdcd8170SKalle Valo * 1148bdcd8170SKalle Valo * 1. Duplicate is easy - drop incoming frame. 1149bdcd8170SKalle Valo * 2. Not falling in current sliding window. 1150bdcd8170SKalle Valo * 2a. is the frame_seq_no preceding current tid_seq_no? 1151bdcd8170SKalle Valo * -> drop the frame. perhaps sender did not get our ACK. 1152bdcd8170SKalle Valo * this is taken care of above. 1153bdcd8170SKalle Valo * 2b. is the frame_seq_no beyond window(st, TID_WINDOW_SZ); 1154bdcd8170SKalle Valo * -> Taken care of it above, by moving window forward. 1155bdcd8170SKalle Valo */ 1156bdcd8170SKalle Valo dev_kfree_skb(node->skb); 1157bdcd8170SKalle Valo stats->num_dups++; 1158bdcd8170SKalle Valo 1159bdcd8170SKalle Valo node->skb = frame; 1160bdcd8170SKalle Valo is_queued = true; 1161bdcd8170SKalle Valo node->is_amsdu = is_amsdu; 1162bdcd8170SKalle Valo node->seq_no = seq_no; 1163bdcd8170SKalle Valo 1164bdcd8170SKalle Valo if (node->is_amsdu) 1165bdcd8170SKalle Valo stats->num_amsdu++; 1166bdcd8170SKalle Valo else 1167bdcd8170SKalle Valo stats->num_mpdu++; 1168bdcd8170SKalle Valo 1169bdcd8170SKalle Valo spin_unlock_bh(&rxtid->lock); 1170bdcd8170SKalle Valo 11711d2a4456SVasanthakumar Thiagarajan aggr_deque_frms(agg_conn, tid, 0, 1); 1172bdcd8170SKalle Valo 11737baef812SVasanthakumar Thiagarajan if (agg_conn->timer_scheduled) 1174bdcd8170SKalle Valo rxtid->progress = true; 1175bdcd8170SKalle Valo else 1176bdcd8170SKalle Valo for (idx = 0 ; idx < rxtid->hold_q_sz; idx++) { 1177bdcd8170SKalle Valo if (rxtid->hold_q[idx].skb) { 1178bdcd8170SKalle Valo /* 1179bdcd8170SKalle Valo * There is a frame in the queue and no 1180bdcd8170SKalle Valo * timer so start a timer to ensure that 1181bdcd8170SKalle Valo * the frame doesn't remain stuck 1182bdcd8170SKalle Valo * forever. 1183bdcd8170SKalle Valo */ 11847baef812SVasanthakumar Thiagarajan agg_conn->timer_scheduled = true; 11857baef812SVasanthakumar Thiagarajan mod_timer(&agg_conn->timer, 1186bdcd8170SKalle Valo (jiffies + 1187bdcd8170SKalle Valo HZ * (AGGR_RX_TIMEOUT) / 1000)); 1188bdcd8170SKalle Valo rxtid->progress = false; 1189bdcd8170SKalle Valo rxtid->timer_mon = true; 1190bdcd8170SKalle Valo break; 1191bdcd8170SKalle Valo } 1192bdcd8170SKalle Valo } 1193bdcd8170SKalle Valo 1194bdcd8170SKalle Valo return is_queued; 1195bdcd8170SKalle Valo } 1196bdcd8170SKalle Valo 1197c1762a3fSThirumalai Pachamuthu static void ath6kl_uapsd_trigger_frame_rx(struct ath6kl_vif *vif, 1198c1762a3fSThirumalai Pachamuthu struct ath6kl_sta *conn) 1199c1762a3fSThirumalai Pachamuthu { 1200c1762a3fSThirumalai Pachamuthu struct ath6kl *ar = vif->ar; 1201c1762a3fSThirumalai Pachamuthu bool is_apsdq_empty, is_apsdq_empty_at_start; 1202c1762a3fSThirumalai Pachamuthu u32 num_frames_to_deliver, flags; 1203c1762a3fSThirumalai Pachamuthu struct sk_buff *skb = NULL; 1204c1762a3fSThirumalai Pachamuthu 1205c1762a3fSThirumalai Pachamuthu /* 1206c1762a3fSThirumalai Pachamuthu * If the APSD q for this STA is not empty, dequeue and 1207c1762a3fSThirumalai Pachamuthu * send a pkt from the head of the q. Also update the 1208c1762a3fSThirumalai Pachamuthu * More data bit in the WMI_DATA_HDR if there are 1209c1762a3fSThirumalai Pachamuthu * more pkts for this STA in the APSD q. 1210c1762a3fSThirumalai Pachamuthu * If there are no more pkts for this STA, 1211c1762a3fSThirumalai Pachamuthu * update the APSD bitmap for this STA. 1212c1762a3fSThirumalai Pachamuthu */ 1213c1762a3fSThirumalai Pachamuthu 1214c1762a3fSThirumalai Pachamuthu num_frames_to_deliver = (conn->apsd_info >> ATH6KL_APSD_NUM_OF_AC) & 1215c1762a3fSThirumalai Pachamuthu ATH6KL_APSD_FRAME_MASK; 1216c1762a3fSThirumalai Pachamuthu /* 1217c1762a3fSThirumalai Pachamuthu * Number of frames to send in a service period is 1218c1762a3fSThirumalai Pachamuthu * indicated by the station 1219c1762a3fSThirumalai Pachamuthu * in the QOS_INFO of the association request 1220c1762a3fSThirumalai Pachamuthu * If it is zero, send all frames 1221c1762a3fSThirumalai Pachamuthu */ 1222c1762a3fSThirumalai Pachamuthu if (!num_frames_to_deliver) 1223c1762a3fSThirumalai Pachamuthu num_frames_to_deliver = ATH6KL_APSD_ALL_FRAME; 1224c1762a3fSThirumalai Pachamuthu 1225c1762a3fSThirumalai Pachamuthu spin_lock_bh(&conn->psq_lock); 1226c1762a3fSThirumalai Pachamuthu is_apsdq_empty = skb_queue_empty(&conn->apsdq); 1227c1762a3fSThirumalai Pachamuthu spin_unlock_bh(&conn->psq_lock); 1228c1762a3fSThirumalai Pachamuthu is_apsdq_empty_at_start = is_apsdq_empty; 1229c1762a3fSThirumalai Pachamuthu 1230c1762a3fSThirumalai Pachamuthu while ((!is_apsdq_empty) && (num_frames_to_deliver)) { 1231c1762a3fSThirumalai Pachamuthu 1232c1762a3fSThirumalai Pachamuthu spin_lock_bh(&conn->psq_lock); 1233c1762a3fSThirumalai Pachamuthu skb = skb_dequeue(&conn->apsdq); 1234c1762a3fSThirumalai Pachamuthu is_apsdq_empty = skb_queue_empty(&conn->apsdq); 1235c1762a3fSThirumalai Pachamuthu spin_unlock_bh(&conn->psq_lock); 1236c1762a3fSThirumalai Pachamuthu 1237c1762a3fSThirumalai Pachamuthu /* 1238c1762a3fSThirumalai Pachamuthu * Set the STA flag to Trigger delivery, 1239c1762a3fSThirumalai Pachamuthu * so that the frame will go out 1240c1762a3fSThirumalai Pachamuthu */ 1241c1762a3fSThirumalai Pachamuthu conn->sta_flags |= STA_PS_APSD_TRIGGER; 1242c1762a3fSThirumalai Pachamuthu num_frames_to_deliver--; 1243c1762a3fSThirumalai Pachamuthu 1244c1762a3fSThirumalai Pachamuthu /* Last frame in the service period, set EOSP or queue empty */ 1245c1762a3fSThirumalai Pachamuthu if ((is_apsdq_empty) || (!num_frames_to_deliver)) 1246c1762a3fSThirumalai Pachamuthu conn->sta_flags |= STA_PS_APSD_EOSP; 1247c1762a3fSThirumalai Pachamuthu 1248c1762a3fSThirumalai Pachamuthu ath6kl_data_tx(skb, vif->ndev); 1249c1762a3fSThirumalai Pachamuthu conn->sta_flags &= ~(STA_PS_APSD_TRIGGER); 1250c1762a3fSThirumalai Pachamuthu conn->sta_flags &= ~(STA_PS_APSD_EOSP); 1251c1762a3fSThirumalai Pachamuthu } 1252c1762a3fSThirumalai Pachamuthu 1253c1762a3fSThirumalai Pachamuthu if (is_apsdq_empty) { 1254c1762a3fSThirumalai Pachamuthu if (is_apsdq_empty_at_start) 1255c1762a3fSThirumalai Pachamuthu flags = WMI_AP_APSD_NO_DELIVERY_FRAMES; 1256c1762a3fSThirumalai Pachamuthu else 1257c1762a3fSThirumalai Pachamuthu flags = 0; 1258c1762a3fSThirumalai Pachamuthu 1259c1762a3fSThirumalai Pachamuthu ath6kl_wmi_set_apsd_bfrd_traf(ar->wmi, 1260c1762a3fSThirumalai Pachamuthu vif->fw_vif_idx, 1261c1762a3fSThirumalai Pachamuthu conn->aid, 0, flags); 1262c1762a3fSThirumalai Pachamuthu } 1263c1762a3fSThirumalai Pachamuthu 1264c1762a3fSThirumalai Pachamuthu return; 1265c1762a3fSThirumalai Pachamuthu } 1266c1762a3fSThirumalai Pachamuthu 1267bdcd8170SKalle Valo void ath6kl_rx(struct htc_target *target, struct htc_packet *packet) 1268bdcd8170SKalle Valo { 1269bdcd8170SKalle Valo struct ath6kl *ar = target->dev->ar; 1270bdcd8170SKalle Valo struct sk_buff *skb = packet->pkt_cntxt; 1271bdcd8170SKalle Valo struct wmi_rx_meta_v2 *meta; 1272bdcd8170SKalle Valo struct wmi_data_hdr *dhdr; 1273bdcd8170SKalle Valo int min_hdr_len; 1274bdcd8170SKalle Valo u8 meta_type, dot11_hdr = 0; 1275bdcd8170SKalle Valo int status = packet->status; 1276bdcd8170SKalle Valo enum htc_endpoint_id ept = packet->endpoint; 1277bdcd8170SKalle Valo bool is_amsdu, prev_ps, ps_state = false; 1278c1762a3fSThirumalai Pachamuthu bool trig_state = false; 1279bdcd8170SKalle Valo struct ath6kl_sta *conn = NULL; 1280bdcd8170SKalle Valo struct sk_buff *skb1 = NULL; 1281bdcd8170SKalle Valo struct ethhdr *datap = NULL; 12826765d0aaSVasanthakumar Thiagarajan struct ath6kl_vif *vif; 12831d2a4456SVasanthakumar Thiagarajan struct aggr_info_conn *aggr_conn; 1284bdcd8170SKalle Valo u16 seq_no, offset; 12856765d0aaSVasanthakumar Thiagarajan u8 tid, if_idx; 1286bdcd8170SKalle Valo 1287bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_WLAN_RX, 1288bdcd8170SKalle Valo "%s: ar=0x%p eid=%d, skb=0x%p, data=0x%p, len=0x%x status:%d", 1289bdcd8170SKalle Valo __func__, ar, ept, skb, packet->buf, 1290bdcd8170SKalle Valo packet->act_len, status); 1291bdcd8170SKalle Valo 1292bdcd8170SKalle Valo if (status || !(skb->data + HTC_HDR_LENGTH)) { 12936765d0aaSVasanthakumar Thiagarajan dev_kfree_skb(skb); 12946765d0aaSVasanthakumar Thiagarajan return; 12956765d0aaSVasanthakumar Thiagarajan } 12966765d0aaSVasanthakumar Thiagarajan 12976765d0aaSVasanthakumar Thiagarajan skb_put(skb, packet->act_len + HTC_HDR_LENGTH); 12986765d0aaSVasanthakumar Thiagarajan skb_pull(skb, HTC_HDR_LENGTH); 12996765d0aaSVasanthakumar Thiagarajan 13006765d0aaSVasanthakumar Thiagarajan if (ept == ar->ctrl_ep) { 13016765d0aaSVasanthakumar Thiagarajan if_idx = 13026765d0aaSVasanthakumar Thiagarajan wmi_cmd_hdr_get_if_idx((struct wmi_cmd_hdr *) skb->data); 13036765d0aaSVasanthakumar Thiagarajan } else { 13046765d0aaSVasanthakumar Thiagarajan if_idx = 13056765d0aaSVasanthakumar Thiagarajan wmi_data_hdr_get_if_idx((struct wmi_data_hdr *) skb->data); 13066765d0aaSVasanthakumar Thiagarajan } 13076765d0aaSVasanthakumar Thiagarajan 13086765d0aaSVasanthakumar Thiagarajan vif = ath6kl_get_vif_by_index(ar, if_idx); 13096765d0aaSVasanthakumar Thiagarajan if (!vif) { 1310bdcd8170SKalle Valo dev_kfree_skb(skb); 1311bdcd8170SKalle Valo return; 1312bdcd8170SKalle Valo } 1313bdcd8170SKalle Valo 1314bdcd8170SKalle Valo /* 1315bdcd8170SKalle Valo * Take lock to protect buffer counts and adaptive power throughput 1316bdcd8170SKalle Valo * state. 1317bdcd8170SKalle Valo */ 1318478ac027SVasanthakumar Thiagarajan spin_lock_bh(&vif->if_lock); 1319bdcd8170SKalle Valo 1320b95907a7SVasanthakumar Thiagarajan vif->net_stats.rx_packets++; 1321b95907a7SVasanthakumar Thiagarajan vif->net_stats.rx_bytes += packet->act_len; 1322bdcd8170SKalle Valo 1323478ac027SVasanthakumar Thiagarajan spin_unlock_bh(&vif->if_lock); 132483dc5f2fSVasanthakumar Thiagarajan 1325bdcd8170SKalle Valo 1326ef094103SKalle Valo ath6kl_dbg_dump(ATH6KL_DBG_RAW_BYTES, __func__, "rx ", 1327ef094103SKalle Valo skb->data, skb->len); 1328bdcd8170SKalle Valo 132928ae58ddSVasanthakumar Thiagarajan skb->dev = vif->ndev; 1330bdcd8170SKalle Valo 1331bdcd8170SKalle Valo if (!test_bit(WMI_ENABLED, &ar->flag)) { 1332bdcd8170SKalle Valo if (EPPING_ALIGNMENT_PAD > 0) 1333bdcd8170SKalle Valo skb_pull(skb, EPPING_ALIGNMENT_PAD); 133428ae58ddSVasanthakumar Thiagarajan ath6kl_deliver_frames_to_nw_stack(vif->ndev, skb); 1335bdcd8170SKalle Valo return; 1336bdcd8170SKalle Valo } 1337bdcd8170SKalle Valo 1338a918fb3cSRaja Mani ath6kl_check_wow_status(ar); 1339a918fb3cSRaja Mani 1340bdcd8170SKalle Valo if (ept == ar->ctrl_ep) { 1341bdcd8170SKalle Valo ath6kl_wmi_control_rx(ar->wmi, skb); 1342bdcd8170SKalle Valo return; 1343bdcd8170SKalle Valo } 1344bdcd8170SKalle Valo 134567f9178fSVasanthakumar Thiagarajan min_hdr_len = sizeof(struct ethhdr) + sizeof(struct wmi_data_hdr) + 1346bdcd8170SKalle Valo sizeof(struct ath6kl_llc_snap_hdr); 1347bdcd8170SKalle Valo 1348bdcd8170SKalle Valo dhdr = (struct wmi_data_hdr *) skb->data; 1349bdcd8170SKalle Valo 1350bdcd8170SKalle Valo /* 1351bdcd8170SKalle Valo * In the case of AP mode we may receive NULL data frames 1352bdcd8170SKalle Valo * that do not have LLC hdr. They are 16 bytes in size. 1353bdcd8170SKalle Valo * Allow these frames in the AP mode. 1354bdcd8170SKalle Valo */ 1355f5938f24SVasanthakumar Thiagarajan if (vif->nw_type != AP_NETWORK && 1356bdcd8170SKalle Valo ((packet->act_len < min_hdr_len) || 1357bdcd8170SKalle Valo (packet->act_len > WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH))) { 1358bdcd8170SKalle Valo ath6kl_info("frame len is too short or too long\n"); 1359b95907a7SVasanthakumar Thiagarajan vif->net_stats.rx_errors++; 1360b95907a7SVasanthakumar Thiagarajan vif->net_stats.rx_length_errors++; 1361bdcd8170SKalle Valo dev_kfree_skb(skb); 1362bdcd8170SKalle Valo return; 1363bdcd8170SKalle Valo } 1364bdcd8170SKalle Valo 1365bdcd8170SKalle Valo /* Get the Power save state of the STA */ 1366f5938f24SVasanthakumar Thiagarajan if (vif->nw_type == AP_NETWORK) { 1367bdcd8170SKalle Valo meta_type = wmi_data_hdr_get_meta(dhdr); 1368bdcd8170SKalle Valo 1369bdcd8170SKalle Valo ps_state = !!((dhdr->info >> WMI_DATA_HDR_PS_SHIFT) & 1370bdcd8170SKalle Valo WMI_DATA_HDR_PS_MASK); 1371bdcd8170SKalle Valo 1372bdcd8170SKalle Valo offset = sizeof(struct wmi_data_hdr); 1373c1762a3fSThirumalai Pachamuthu trig_state = !!(le16_to_cpu(dhdr->info3) & WMI_DATA_HDR_TRIG); 1374bdcd8170SKalle Valo 1375bdcd8170SKalle Valo switch (meta_type) { 1376bdcd8170SKalle Valo case 0: 1377bdcd8170SKalle Valo break; 1378bdcd8170SKalle Valo case WMI_META_VERSION_1: 1379bdcd8170SKalle Valo offset += sizeof(struct wmi_rx_meta_v1); 1380bdcd8170SKalle Valo break; 1381bdcd8170SKalle Valo case WMI_META_VERSION_2: 1382bdcd8170SKalle Valo offset += sizeof(struct wmi_rx_meta_v2); 1383bdcd8170SKalle Valo break; 1384bdcd8170SKalle Valo default: 1385bdcd8170SKalle Valo break; 1386bdcd8170SKalle Valo } 1387bdcd8170SKalle Valo 1388bdcd8170SKalle Valo datap = (struct ethhdr *) (skb->data + offset); 13896765d0aaSVasanthakumar Thiagarajan conn = ath6kl_find_sta(vif, datap->h_source); 1390bdcd8170SKalle Valo 1391bdcd8170SKalle Valo if (!conn) { 1392bdcd8170SKalle Valo dev_kfree_skb(skb); 1393bdcd8170SKalle Valo return; 1394bdcd8170SKalle Valo } 1395bdcd8170SKalle Valo 1396bdcd8170SKalle Valo /* 1397bdcd8170SKalle Valo * If there is a change in PS state of the STA, 1398bdcd8170SKalle Valo * take appropriate steps: 1399bdcd8170SKalle Valo * 1400bdcd8170SKalle Valo * 1. If Sleep-->Awake, flush the psq for the STA 1401bdcd8170SKalle Valo * Clear the PVB for the STA. 1402bdcd8170SKalle Valo * 2. If Awake-->Sleep, Starting queueing frames 1403bdcd8170SKalle Valo * the STA. 1404bdcd8170SKalle Valo */ 1405bdcd8170SKalle Valo prev_ps = !!(conn->sta_flags & STA_PS_SLEEP); 1406bdcd8170SKalle Valo 1407bdcd8170SKalle Valo if (ps_state) 1408bdcd8170SKalle Valo conn->sta_flags |= STA_PS_SLEEP; 1409bdcd8170SKalle Valo else 1410bdcd8170SKalle Valo conn->sta_flags &= ~STA_PS_SLEEP; 1411bdcd8170SKalle Valo 1412c1762a3fSThirumalai Pachamuthu /* Accept trigger only when the station is in sleep */ 1413c1762a3fSThirumalai Pachamuthu if ((conn->sta_flags & STA_PS_SLEEP) && trig_state) 1414c1762a3fSThirumalai Pachamuthu ath6kl_uapsd_trigger_frame_rx(vif, conn); 1415c1762a3fSThirumalai Pachamuthu 1416bdcd8170SKalle Valo if (prev_ps ^ !!(conn->sta_flags & STA_PS_SLEEP)) { 1417bdcd8170SKalle Valo if (!(conn->sta_flags & STA_PS_SLEEP)) { 1418bdcd8170SKalle Valo struct sk_buff *skbuff = NULL; 1419c1762a3fSThirumalai Pachamuthu bool is_apsdq_empty; 1420bdcd8170SKalle Valo 1421bdcd8170SKalle Valo spin_lock_bh(&conn->psq_lock); 1422c1762a3fSThirumalai Pachamuthu while ((skbuff = skb_dequeue(&conn->psq))) { 1423c1762a3fSThirumalai Pachamuthu spin_unlock_bh(&conn->psq_lock); 1424c1762a3fSThirumalai Pachamuthu ath6kl_data_tx(skbuff, vif->ndev); 1425c1762a3fSThirumalai Pachamuthu spin_lock_bh(&conn->psq_lock); 1426c1762a3fSThirumalai Pachamuthu } 1427c1762a3fSThirumalai Pachamuthu 1428c1762a3fSThirumalai Pachamuthu is_apsdq_empty = skb_queue_empty(&conn->apsdq); 1429c1762a3fSThirumalai Pachamuthu while ((skbuff = skb_dequeue(&conn->apsdq))) { 1430bdcd8170SKalle Valo spin_unlock_bh(&conn->psq_lock); 143128ae58ddSVasanthakumar Thiagarajan ath6kl_data_tx(skbuff, vif->ndev); 1432bdcd8170SKalle Valo spin_lock_bh(&conn->psq_lock); 1433bdcd8170SKalle Valo } 1434bdcd8170SKalle Valo spin_unlock_bh(&conn->psq_lock); 1435c1762a3fSThirumalai Pachamuthu 1436c1762a3fSThirumalai Pachamuthu if (!is_apsdq_empty) 1437c1762a3fSThirumalai Pachamuthu ath6kl_wmi_set_apsd_bfrd_traf( 1438c1762a3fSThirumalai Pachamuthu ar->wmi, 1439c1762a3fSThirumalai Pachamuthu vif->fw_vif_idx, 1440c1762a3fSThirumalai Pachamuthu conn->aid, 0, 0); 1441c1762a3fSThirumalai Pachamuthu 1442bdcd8170SKalle Valo /* Clear the PVB for this STA */ 1443334234b5SVasanthakumar Thiagarajan ath6kl_wmi_set_pvb_cmd(ar->wmi, vif->fw_vif_idx, 1444334234b5SVasanthakumar Thiagarajan conn->aid, 0); 1445bdcd8170SKalle Valo } 1446bdcd8170SKalle Valo } 1447bdcd8170SKalle Valo 1448bdcd8170SKalle Valo /* drop NULL data frames here */ 1449bdcd8170SKalle Valo if ((packet->act_len < min_hdr_len) || 1450bdcd8170SKalle Valo (packet->act_len > 1451bdcd8170SKalle Valo WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH)) { 1452bdcd8170SKalle Valo dev_kfree_skb(skb); 1453bdcd8170SKalle Valo return; 1454bdcd8170SKalle Valo } 1455bdcd8170SKalle Valo } 1456bdcd8170SKalle Valo 1457bdcd8170SKalle Valo is_amsdu = wmi_data_hdr_is_amsdu(dhdr) ? true : false; 1458bdcd8170SKalle Valo tid = wmi_data_hdr_get_up(dhdr); 1459bdcd8170SKalle Valo seq_no = wmi_data_hdr_get_seqno(dhdr); 1460bdcd8170SKalle Valo meta_type = wmi_data_hdr_get_meta(dhdr); 1461bdcd8170SKalle Valo dot11_hdr = wmi_data_hdr_get_dot11(dhdr); 1462594a0bc8SVasanthakumar Thiagarajan skb_pull(skb, sizeof(struct wmi_data_hdr)); 1463bdcd8170SKalle Valo 1464bdcd8170SKalle Valo switch (meta_type) { 1465bdcd8170SKalle Valo case WMI_META_VERSION_1: 1466bdcd8170SKalle Valo skb_pull(skb, sizeof(struct wmi_rx_meta_v1)); 1467bdcd8170SKalle Valo break; 1468bdcd8170SKalle Valo case WMI_META_VERSION_2: 1469bdcd8170SKalle Valo meta = (struct wmi_rx_meta_v2 *) skb->data; 1470bdcd8170SKalle Valo if (meta->csum_flags & 0x1) { 1471bdcd8170SKalle Valo skb->ip_summed = CHECKSUM_COMPLETE; 1472bdcd8170SKalle Valo skb->csum = (__force __wsum) meta->csum; 1473bdcd8170SKalle Valo } 1474bdcd8170SKalle Valo skb_pull(skb, sizeof(struct wmi_rx_meta_v2)); 1475bdcd8170SKalle Valo break; 1476bdcd8170SKalle Valo default: 1477bdcd8170SKalle Valo break; 1478bdcd8170SKalle Valo } 1479bdcd8170SKalle Valo 1480bdcd8170SKalle Valo if (dot11_hdr) 1481bdcd8170SKalle Valo status = ath6kl_wmi_dot11_hdr_remove(ar->wmi, skb); 1482bdcd8170SKalle Valo else if (!is_amsdu) 1483bdcd8170SKalle Valo status = ath6kl_wmi_dot3_2_dix(skb); 1484bdcd8170SKalle Valo 1485bdcd8170SKalle Valo if (status) { 1486bdcd8170SKalle Valo /* 1487bdcd8170SKalle Valo * Drop frames that could not be processed (lack of 1488bdcd8170SKalle Valo * memory, etc.) 1489bdcd8170SKalle Valo */ 1490bdcd8170SKalle Valo dev_kfree_skb(skb); 1491bdcd8170SKalle Valo return; 1492bdcd8170SKalle Valo } 1493bdcd8170SKalle Valo 149428ae58ddSVasanthakumar Thiagarajan if (!(vif->ndev->flags & IFF_UP)) { 1495bdcd8170SKalle Valo dev_kfree_skb(skb); 1496bdcd8170SKalle Valo return; 1497bdcd8170SKalle Valo } 1498bdcd8170SKalle Valo 1499f5938f24SVasanthakumar Thiagarajan if (vif->nw_type == AP_NETWORK) { 1500bdcd8170SKalle Valo datap = (struct ethhdr *) skb->data; 1501bdcd8170SKalle Valo if (is_multicast_ether_addr(datap->h_dest)) 1502bdcd8170SKalle Valo /* 1503bdcd8170SKalle Valo * Bcast/Mcast frames should be sent to the 1504bdcd8170SKalle Valo * OS stack as well as on the air. 1505bdcd8170SKalle Valo */ 1506bdcd8170SKalle Valo skb1 = skb_copy(skb, GFP_ATOMIC); 1507bdcd8170SKalle Valo else { 1508bdcd8170SKalle Valo /* 1509bdcd8170SKalle Valo * Search for a connected STA with dstMac 1510bdcd8170SKalle Valo * as the Mac address. If found send the 1511bdcd8170SKalle Valo * frame to it on the air else send the 1512bdcd8170SKalle Valo * frame up the stack. 1513bdcd8170SKalle Valo */ 15146765d0aaSVasanthakumar Thiagarajan conn = ath6kl_find_sta(vif, datap->h_dest); 1515bdcd8170SKalle Valo 1516bdcd8170SKalle Valo if (conn && ar->intra_bss) { 1517bdcd8170SKalle Valo skb1 = skb; 1518bdcd8170SKalle Valo skb = NULL; 1519bdcd8170SKalle Valo } else if (conn && !ar->intra_bss) { 1520bdcd8170SKalle Valo dev_kfree_skb(skb); 1521bdcd8170SKalle Valo skb = NULL; 1522bdcd8170SKalle Valo } 1523bdcd8170SKalle Valo } 1524bdcd8170SKalle Valo if (skb1) 152528ae58ddSVasanthakumar Thiagarajan ath6kl_data_tx(skb1, vif->ndev); 1526ad3f78b9SKalle Valo 1527ad3f78b9SKalle Valo if (skb == NULL) { 1528ad3f78b9SKalle Valo /* nothing to deliver up the stack */ 1529ad3f78b9SKalle Valo return; 1530ad3f78b9SKalle Valo } 1531bdcd8170SKalle Valo } 1532bdcd8170SKalle Valo 15335694f962SKalle Valo datap = (struct ethhdr *) skb->data; 15345694f962SKalle Valo 15351d2a4456SVasanthakumar Thiagarajan if (is_unicast_ether_addr(datap->h_dest)) { 15361d2a4456SVasanthakumar Thiagarajan if (vif->nw_type == AP_NETWORK) { 15371d2a4456SVasanthakumar Thiagarajan conn = ath6kl_find_sta(vif, datap->h_source); 15381d2a4456SVasanthakumar Thiagarajan if (!conn) 15391d2a4456SVasanthakumar Thiagarajan return; 15401d2a4456SVasanthakumar Thiagarajan aggr_conn = conn->aggr_conn; 15411d2a4456SVasanthakumar Thiagarajan } else 15421d2a4456SVasanthakumar Thiagarajan aggr_conn = vif->aggr_cntxt->aggr_conn; 15431d2a4456SVasanthakumar Thiagarajan 15441d2a4456SVasanthakumar Thiagarajan if (aggr_process_recv_frm(aggr_conn, tid, seq_no, 15451d2a4456SVasanthakumar Thiagarajan is_amsdu, skb)) { 15465694f962SKalle Valo /* aggregation code will handle the skb */ 15475694f962SKalle Valo return; 15481d2a4456SVasanthakumar Thiagarajan } 15491d2a4456SVasanthakumar Thiagarajan } 15505694f962SKalle Valo 155128ae58ddSVasanthakumar Thiagarajan ath6kl_deliver_frames_to_nw_stack(vif->ndev, skb); 1552bdcd8170SKalle Valo } 1553bdcd8170SKalle Valo 1554bdcd8170SKalle Valo static void aggr_timeout(unsigned long arg) 1555bdcd8170SKalle Valo { 1556bdcd8170SKalle Valo u8 i, j; 15577baef812SVasanthakumar Thiagarajan struct aggr_info_conn *aggr_conn = (struct aggr_info_conn *) arg; 1558bdcd8170SKalle Valo struct rxtid *rxtid; 1559bdcd8170SKalle Valo struct rxtid_stats *stats; 1560bdcd8170SKalle Valo 1561bdcd8170SKalle Valo for (i = 0; i < NUM_OF_TIDS; i++) { 15627baef812SVasanthakumar Thiagarajan rxtid = &aggr_conn->rx_tid[i]; 15637baef812SVasanthakumar Thiagarajan stats = &aggr_conn->stat[i]; 1564bdcd8170SKalle Valo 1565bdcd8170SKalle Valo if (!rxtid->aggr || !rxtid->timer_mon || rxtid->progress) 1566bdcd8170SKalle Valo continue; 1567bdcd8170SKalle Valo 1568bdcd8170SKalle Valo stats->num_timeouts++; 156937ca6335SKalle Valo ath6kl_dbg(ATH6KL_DBG_AGGR, 157037ca6335SKalle Valo "aggr timeout (st %d end %d)\n", 1571bdcd8170SKalle Valo rxtid->seq_next, 1572bdcd8170SKalle Valo ((rxtid->seq_next + rxtid->hold_q_sz-1) & 1573bdcd8170SKalle Valo ATH6KL_MAX_SEQ_NO)); 15741d2a4456SVasanthakumar Thiagarajan aggr_deque_frms(aggr_conn, i, 0, 0); 1575bdcd8170SKalle Valo } 1576bdcd8170SKalle Valo 15777baef812SVasanthakumar Thiagarajan aggr_conn->timer_scheduled = false; 1578bdcd8170SKalle Valo 1579bdcd8170SKalle Valo for (i = 0; i < NUM_OF_TIDS; i++) { 15807baef812SVasanthakumar Thiagarajan rxtid = &aggr_conn->rx_tid[i]; 1581bdcd8170SKalle Valo 1582bdcd8170SKalle Valo if (rxtid->aggr && rxtid->hold_q) { 1583bdcd8170SKalle Valo for (j = 0; j < rxtid->hold_q_sz; j++) { 1584bdcd8170SKalle Valo if (rxtid->hold_q[j].skb) { 15857baef812SVasanthakumar Thiagarajan aggr_conn->timer_scheduled = true; 1586bdcd8170SKalle Valo rxtid->timer_mon = true; 1587bdcd8170SKalle Valo rxtid->progress = false; 1588bdcd8170SKalle Valo break; 1589bdcd8170SKalle Valo } 1590bdcd8170SKalle Valo } 1591bdcd8170SKalle Valo 1592bdcd8170SKalle Valo if (j >= rxtid->hold_q_sz) 1593bdcd8170SKalle Valo rxtid->timer_mon = false; 1594bdcd8170SKalle Valo } 1595bdcd8170SKalle Valo } 1596bdcd8170SKalle Valo 15977baef812SVasanthakumar Thiagarajan if (aggr_conn->timer_scheduled) 15987baef812SVasanthakumar Thiagarajan mod_timer(&aggr_conn->timer, 1599bdcd8170SKalle Valo jiffies + msecs_to_jiffies(AGGR_RX_TIMEOUT)); 1600bdcd8170SKalle Valo } 1601bdcd8170SKalle Valo 16027baef812SVasanthakumar Thiagarajan static void aggr_delete_tid_state(struct aggr_info_conn *aggr_conn, u8 tid) 1603bdcd8170SKalle Valo { 1604bdcd8170SKalle Valo struct rxtid *rxtid; 1605bdcd8170SKalle Valo struct rxtid_stats *stats; 1606bdcd8170SKalle Valo 16077baef812SVasanthakumar Thiagarajan if (!aggr_conn || tid >= NUM_OF_TIDS) 1608bdcd8170SKalle Valo return; 1609bdcd8170SKalle Valo 16107baef812SVasanthakumar Thiagarajan rxtid = &aggr_conn->rx_tid[tid]; 16117baef812SVasanthakumar Thiagarajan stats = &aggr_conn->stat[tid]; 1612bdcd8170SKalle Valo 1613bdcd8170SKalle Valo if (rxtid->aggr) 16141d2a4456SVasanthakumar Thiagarajan aggr_deque_frms(aggr_conn, tid, 0, 0); 1615bdcd8170SKalle Valo 1616bdcd8170SKalle Valo rxtid->aggr = false; 1617bdcd8170SKalle Valo rxtid->progress = false; 1618bdcd8170SKalle Valo rxtid->timer_mon = false; 1619bdcd8170SKalle Valo rxtid->win_sz = 0; 1620bdcd8170SKalle Valo rxtid->seq_next = 0; 1621bdcd8170SKalle Valo rxtid->hold_q_sz = 0; 1622bdcd8170SKalle Valo 1623bdcd8170SKalle Valo kfree(rxtid->hold_q); 1624bdcd8170SKalle Valo rxtid->hold_q = NULL; 1625bdcd8170SKalle Valo 1626bdcd8170SKalle Valo memset(stats, 0, sizeof(struct rxtid_stats)); 1627bdcd8170SKalle Valo } 1628bdcd8170SKalle Valo 16293fdc0991SVasanthakumar Thiagarajan void aggr_recv_addba_req_evt(struct ath6kl_vif *vif, u8 tid_mux, u16 seq_no, 1630240d2799SVasanthakumar Thiagarajan u8 win_sz) 1631bdcd8170SKalle Valo { 16321d2a4456SVasanthakumar Thiagarajan struct ath6kl_sta *sta; 16331d2a4456SVasanthakumar Thiagarajan struct aggr_info_conn *aggr_conn = NULL; 1634bdcd8170SKalle Valo struct rxtid *rxtid; 1635bdcd8170SKalle Valo struct rxtid_stats *stats; 1636bdcd8170SKalle Valo u16 hold_q_size; 16371d2a4456SVasanthakumar Thiagarajan u8 tid, aid; 1638bdcd8170SKalle Valo 16391d2a4456SVasanthakumar Thiagarajan if (vif->nw_type == AP_NETWORK) { 16401d2a4456SVasanthakumar Thiagarajan aid = ath6kl_get_aid(tid_mux); 16411d2a4456SVasanthakumar Thiagarajan sta = ath6kl_find_sta_by_aid(vif->ar, aid); 16421d2a4456SVasanthakumar Thiagarajan if (sta) 16431d2a4456SVasanthakumar Thiagarajan aggr_conn = sta->aggr_conn; 16441d2a4456SVasanthakumar Thiagarajan } else 16451d2a4456SVasanthakumar Thiagarajan aggr_conn = vif->aggr_cntxt->aggr_conn; 16461d2a4456SVasanthakumar Thiagarajan 16471d2a4456SVasanthakumar Thiagarajan if (!aggr_conn) 1648bdcd8170SKalle Valo return; 1649bdcd8170SKalle Valo 16503fdc0991SVasanthakumar Thiagarajan tid = ath6kl_get_tid(tid_mux); 16513fdc0991SVasanthakumar Thiagarajan if (tid >= NUM_OF_TIDS) 16523fdc0991SVasanthakumar Thiagarajan return; 16533fdc0991SVasanthakumar Thiagarajan 16547baef812SVasanthakumar Thiagarajan rxtid = &aggr_conn->rx_tid[tid]; 16557baef812SVasanthakumar Thiagarajan stats = &aggr_conn->stat[tid]; 1656bdcd8170SKalle Valo 1657bdcd8170SKalle Valo if (win_sz < AGGR_WIN_SZ_MIN || win_sz > AGGR_WIN_SZ_MAX) 1658bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_WLAN_RX, "%s: win_sz %d, tid %d\n", 1659bdcd8170SKalle Valo __func__, win_sz, tid); 1660bdcd8170SKalle Valo 1661bdcd8170SKalle Valo if (rxtid->aggr) 16627baef812SVasanthakumar Thiagarajan aggr_delete_tid_state(aggr_conn, tid); 1663bdcd8170SKalle Valo 1664bdcd8170SKalle Valo rxtid->seq_next = seq_no; 1665bdcd8170SKalle Valo hold_q_size = TID_WINDOW_SZ(win_sz) * sizeof(struct skb_hold_q); 1666bdcd8170SKalle Valo rxtid->hold_q = kzalloc(hold_q_size, GFP_KERNEL); 1667bdcd8170SKalle Valo if (!rxtid->hold_q) 1668bdcd8170SKalle Valo return; 1669bdcd8170SKalle Valo 1670bdcd8170SKalle Valo rxtid->win_sz = win_sz; 1671bdcd8170SKalle Valo rxtid->hold_q_sz = TID_WINDOW_SZ(win_sz); 1672bdcd8170SKalle Valo if (!skb_queue_empty(&rxtid->q)) 1673bdcd8170SKalle Valo return; 1674bdcd8170SKalle Valo 1675bdcd8170SKalle Valo rxtid->aggr = true; 1676bdcd8170SKalle Valo } 1677bdcd8170SKalle Valo 1678c8651541SVasanthakumar Thiagarajan void aggr_conn_init(struct ath6kl_vif *vif, struct aggr_info *aggr_info, 1679c8651541SVasanthakumar Thiagarajan struct aggr_info_conn *aggr_conn) 1680bdcd8170SKalle Valo { 1681bdcd8170SKalle Valo struct rxtid *rxtid; 1682bdcd8170SKalle Valo u8 i; 1683bdcd8170SKalle Valo 16847baef812SVasanthakumar Thiagarajan aggr_conn->aggr_sz = AGGR_SZ_DEFAULT; 16857baef812SVasanthakumar Thiagarajan aggr_conn->dev = vif->ndev; 16867baef812SVasanthakumar Thiagarajan init_timer(&aggr_conn->timer); 16877baef812SVasanthakumar Thiagarajan aggr_conn->timer.function = aggr_timeout; 16887baef812SVasanthakumar Thiagarajan aggr_conn->timer.data = (unsigned long) aggr_conn; 1689c8651541SVasanthakumar Thiagarajan aggr_conn->aggr_info = aggr_info; 16907baef812SVasanthakumar Thiagarajan 16917baef812SVasanthakumar Thiagarajan aggr_conn->timer_scheduled = false; 16927baef812SVasanthakumar Thiagarajan 16937baef812SVasanthakumar Thiagarajan for (i = 0; i < NUM_OF_TIDS; i++) { 16947baef812SVasanthakumar Thiagarajan rxtid = &aggr_conn->rx_tid[i]; 16957baef812SVasanthakumar Thiagarajan rxtid->aggr = false; 16967baef812SVasanthakumar Thiagarajan rxtid->progress = false; 16977baef812SVasanthakumar Thiagarajan rxtid->timer_mon = false; 16987baef812SVasanthakumar Thiagarajan skb_queue_head_init(&rxtid->q); 16997baef812SVasanthakumar Thiagarajan spin_lock_init(&rxtid->lock); 17007baef812SVasanthakumar Thiagarajan } 17017baef812SVasanthakumar Thiagarajan 17027baef812SVasanthakumar Thiagarajan } 17037baef812SVasanthakumar Thiagarajan 17047baef812SVasanthakumar Thiagarajan struct aggr_info *aggr_init(struct ath6kl_vif *vif) 17057baef812SVasanthakumar Thiagarajan { 17067baef812SVasanthakumar Thiagarajan struct aggr_info *p_aggr = NULL; 17077baef812SVasanthakumar Thiagarajan 1708bdcd8170SKalle Valo p_aggr = kzalloc(sizeof(struct aggr_info), GFP_KERNEL); 1709bdcd8170SKalle Valo if (!p_aggr) { 1710bdcd8170SKalle Valo ath6kl_err("failed to alloc memory for aggr_node\n"); 1711bdcd8170SKalle Valo return NULL; 1712bdcd8170SKalle Valo } 1713bdcd8170SKalle Valo 17147baef812SVasanthakumar Thiagarajan p_aggr->aggr_conn = kzalloc(sizeof(struct aggr_info_conn), GFP_KERNEL); 17157baef812SVasanthakumar Thiagarajan if (!p_aggr->aggr_conn) { 17167baef812SVasanthakumar Thiagarajan ath6kl_err("failed to alloc memory for connection specific aggr info\n"); 17177baef812SVasanthakumar Thiagarajan kfree(p_aggr); 17187baef812SVasanthakumar Thiagarajan return NULL; 1719bdcd8170SKalle Valo } 1720bdcd8170SKalle Valo 1721c8651541SVasanthakumar Thiagarajan aggr_conn_init(vif, p_aggr, p_aggr->aggr_conn); 17227baef812SVasanthakumar Thiagarajan 17237baef812SVasanthakumar Thiagarajan skb_queue_head_init(&p_aggr->rx_amsdu_freeq); 17247baef812SVasanthakumar Thiagarajan ath6kl_alloc_netbufs(&p_aggr->rx_amsdu_freeq, AGGR_NUM_OF_FREE_NETBUFS); 17257baef812SVasanthakumar Thiagarajan 1726bdcd8170SKalle Valo return p_aggr; 1727bdcd8170SKalle Valo } 1728bdcd8170SKalle Valo 17293fdc0991SVasanthakumar Thiagarajan void aggr_recv_delba_req_evt(struct ath6kl_vif *vif, u8 tid_mux) 1730bdcd8170SKalle Valo { 17311d2a4456SVasanthakumar Thiagarajan struct ath6kl_sta *sta; 1732bdcd8170SKalle Valo struct rxtid *rxtid; 17331d2a4456SVasanthakumar Thiagarajan struct aggr_info_conn *aggr_conn = NULL; 17341d2a4456SVasanthakumar Thiagarajan u8 tid, aid; 1735bdcd8170SKalle Valo 17361d2a4456SVasanthakumar Thiagarajan if (vif->nw_type == AP_NETWORK) { 17371d2a4456SVasanthakumar Thiagarajan aid = ath6kl_get_aid(tid_mux); 17381d2a4456SVasanthakumar Thiagarajan sta = ath6kl_find_sta_by_aid(vif->ar, aid); 17391d2a4456SVasanthakumar Thiagarajan if (sta) 17401d2a4456SVasanthakumar Thiagarajan aggr_conn = sta->aggr_conn; 17411d2a4456SVasanthakumar Thiagarajan } else 17421d2a4456SVasanthakumar Thiagarajan aggr_conn = vif->aggr_cntxt->aggr_conn; 17431d2a4456SVasanthakumar Thiagarajan 17441d2a4456SVasanthakumar Thiagarajan if (!aggr_conn) 1745bdcd8170SKalle Valo return; 1746bdcd8170SKalle Valo 17473fdc0991SVasanthakumar Thiagarajan tid = ath6kl_get_tid(tid_mux); 17483fdc0991SVasanthakumar Thiagarajan if (tid >= NUM_OF_TIDS) 17493fdc0991SVasanthakumar Thiagarajan return; 17503fdc0991SVasanthakumar Thiagarajan 17517baef812SVasanthakumar Thiagarajan rxtid = &aggr_conn->rx_tid[tid]; 1752bdcd8170SKalle Valo 1753bdcd8170SKalle Valo if (rxtid->aggr) 17547baef812SVasanthakumar Thiagarajan aggr_delete_tid_state(aggr_conn, tid); 1755bdcd8170SKalle Valo } 1756bdcd8170SKalle Valo 17571d2a4456SVasanthakumar Thiagarajan void aggr_reset_state(struct aggr_info_conn *aggr_conn) 1758bdcd8170SKalle Valo { 1759bdcd8170SKalle Valo u8 tid; 1760bdcd8170SKalle Valo 17611d2a4456SVasanthakumar Thiagarajan if (!aggr_conn) 17627baef812SVasanthakumar Thiagarajan return; 17637baef812SVasanthakumar Thiagarajan 17641d2a4456SVasanthakumar Thiagarajan if (aggr_conn->timer_scheduled) { 17651d2a4456SVasanthakumar Thiagarajan del_timer(&aggr_conn->timer); 17661d2a4456SVasanthakumar Thiagarajan aggr_conn->timer_scheduled = false; 17677a950ea8SVasanthakumar Thiagarajan } 17687a950ea8SVasanthakumar Thiagarajan 1769bdcd8170SKalle Valo for (tid = 0; tid < NUM_OF_TIDS; tid++) 17701d2a4456SVasanthakumar Thiagarajan aggr_delete_tid_state(aggr_conn, tid); 1771bdcd8170SKalle Valo } 1772bdcd8170SKalle Valo 1773bdcd8170SKalle Valo /* clean up our amsdu buffer list */ 1774bdcd8170SKalle Valo void ath6kl_cleanup_amsdu_rxbufs(struct ath6kl *ar) 1775bdcd8170SKalle Valo { 1776bdcd8170SKalle Valo struct htc_packet *packet, *tmp_pkt; 1777bdcd8170SKalle Valo 1778bdcd8170SKalle Valo spin_lock_bh(&ar->lock); 1779bdcd8170SKalle Valo if (list_empty(&ar->amsdu_rx_buffer_queue)) { 1780bdcd8170SKalle Valo spin_unlock_bh(&ar->lock); 1781bdcd8170SKalle Valo return; 1782bdcd8170SKalle Valo } 1783bdcd8170SKalle Valo 1784bdcd8170SKalle Valo list_for_each_entry_safe(packet, tmp_pkt, &ar->amsdu_rx_buffer_queue, 1785bdcd8170SKalle Valo list) { 1786bdcd8170SKalle Valo list_del(&packet->list); 1787bdcd8170SKalle Valo spin_unlock_bh(&ar->lock); 1788bdcd8170SKalle Valo dev_kfree_skb(packet->pkt_cntxt); 1789bdcd8170SKalle Valo spin_lock_bh(&ar->lock); 1790bdcd8170SKalle Valo } 1791bdcd8170SKalle Valo 1792bdcd8170SKalle Valo spin_unlock_bh(&ar->lock); 1793bdcd8170SKalle Valo } 1794bdcd8170SKalle Valo 1795bdcd8170SKalle Valo void aggr_module_destroy(struct aggr_info *aggr_info) 1796bdcd8170SKalle Valo { 17971d2a4456SVasanthakumar Thiagarajan if (!aggr_info) 1798bdcd8170SKalle Valo return; 1799bdcd8170SKalle Valo 18001d2a4456SVasanthakumar Thiagarajan aggr_reset_state(aggr_info->aggr_conn); 18017baef812SVasanthakumar Thiagarajan skb_queue_purge(&aggr_info->rx_amsdu_freeq); 18027baef812SVasanthakumar Thiagarajan kfree(aggr_info->aggr_conn); 1803bdcd8170SKalle Valo kfree(aggr_info); 1804bdcd8170SKalle Valo } 1805