1*d8899132SKalle Valo /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2*d8899132SKalle Valo /* 3*d8899132SKalle Valo * Copyright (c) 2019-2021 The Linux Foundation. All rights reserved. 4*d8899132SKalle Valo * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. 5*d8899132SKalle Valo */ 6*d8899132SKalle Valo 7*d8899132SKalle Valo #ifndef ATH12K_REG_H 8*d8899132SKalle Valo #define ATH12K_REG_H 9*d8899132SKalle Valo 10*d8899132SKalle Valo #include <linux/kernel.h> 11*d8899132SKalle Valo #include <net/regulatory.h> 12*d8899132SKalle Valo 13*d8899132SKalle Valo struct ath12k_base; 14*d8899132SKalle Valo struct ath12k; 15*d8899132SKalle Valo 16*d8899132SKalle Valo /* DFS regdomains supported by Firmware */ 17*d8899132SKalle Valo enum ath12k_dfs_region { 18*d8899132SKalle Valo ATH12K_DFS_REG_UNSET, 19*d8899132SKalle Valo ATH12K_DFS_REG_FCC, 20*d8899132SKalle Valo ATH12K_DFS_REG_ETSI, 21*d8899132SKalle Valo ATH12K_DFS_REG_MKK, 22*d8899132SKalle Valo ATH12K_DFS_REG_CN, 23*d8899132SKalle Valo ATH12K_DFS_REG_KR, 24*d8899132SKalle Valo ATH12K_DFS_REG_MKK_N, 25*d8899132SKalle Valo ATH12K_DFS_REG_UNDEF, 26*d8899132SKalle Valo }; 27*d8899132SKalle Valo 28*d8899132SKalle Valo enum ath12k_reg_cc_code { 29*d8899132SKalle Valo REG_SET_CC_STATUS_PASS = 0, 30*d8899132SKalle Valo REG_CURRENT_ALPHA2_NOT_FOUND = 1, 31*d8899132SKalle Valo REG_INIT_ALPHA2_NOT_FOUND = 2, 32*d8899132SKalle Valo REG_SET_CC_CHANGE_NOT_ALLOWED = 3, 33*d8899132SKalle Valo REG_SET_CC_STATUS_NO_MEMORY = 4, 34*d8899132SKalle Valo REG_SET_CC_STATUS_FAIL = 5, 35*d8899132SKalle Valo }; 36*d8899132SKalle Valo 37*d8899132SKalle Valo struct ath12k_reg_rule { 38*d8899132SKalle Valo u16 start_freq; 39*d8899132SKalle Valo u16 end_freq; 40*d8899132SKalle Valo u16 max_bw; 41*d8899132SKalle Valo u8 reg_power; 42*d8899132SKalle Valo u8 ant_gain; 43*d8899132SKalle Valo u16 flags; 44*d8899132SKalle Valo bool psd_flag; 45*d8899132SKalle Valo u16 psd_eirp; 46*d8899132SKalle Valo }; 47*d8899132SKalle Valo 48*d8899132SKalle Valo struct ath12k_reg_info { 49*d8899132SKalle Valo enum ath12k_reg_cc_code status_code; 50*d8899132SKalle Valo u8 num_phy; 51*d8899132SKalle Valo u8 phy_id; 52*d8899132SKalle Valo u16 reg_dmn_pair; 53*d8899132SKalle Valo u16 ctry_code; 54*d8899132SKalle Valo u8 alpha2[REG_ALPHA2_LEN + 1]; 55*d8899132SKalle Valo u32 dfs_region; 56*d8899132SKalle Valo u32 phybitmap; 57*d8899132SKalle Valo bool is_ext_reg_event; 58*d8899132SKalle Valo u32 min_bw_2g; 59*d8899132SKalle Valo u32 max_bw_2g; 60*d8899132SKalle Valo u32 min_bw_5g; 61*d8899132SKalle Valo u32 max_bw_5g; 62*d8899132SKalle Valo u32 num_2g_reg_rules; 63*d8899132SKalle Valo u32 num_5g_reg_rules; 64*d8899132SKalle Valo struct ath12k_reg_rule *reg_rules_2g_ptr; 65*d8899132SKalle Valo struct ath12k_reg_rule *reg_rules_5g_ptr; 66*d8899132SKalle Valo enum wmi_reg_6g_client_type client_type; 67*d8899132SKalle Valo bool rnr_tpe_usable; 68*d8899132SKalle Valo bool unspecified_ap_usable; 69*d8899132SKalle Valo /* TODO: All 6G related info can be stored only for required 70*d8899132SKalle Valo * combination instead of all types, to optimize memory usage. 71*d8899132SKalle Valo */ 72*d8899132SKalle Valo u8 domain_code_6g_ap[WMI_REG_CURRENT_MAX_AP_TYPE]; 73*d8899132SKalle Valo u8 domain_code_6g_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE]; 74*d8899132SKalle Valo u32 domain_code_6g_super_id; 75*d8899132SKalle Valo u32 min_bw_6g_ap[WMI_REG_CURRENT_MAX_AP_TYPE]; 76*d8899132SKalle Valo u32 max_bw_6g_ap[WMI_REG_CURRENT_MAX_AP_TYPE]; 77*d8899132SKalle Valo u32 min_bw_6g_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE]; 78*d8899132SKalle Valo u32 max_bw_6g_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE]; 79*d8899132SKalle Valo u32 num_6g_reg_rules_ap[WMI_REG_CURRENT_MAX_AP_TYPE]; 80*d8899132SKalle Valo u32 num_6g_reg_rules_cl[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE]; 81*d8899132SKalle Valo struct ath12k_reg_rule *reg_rules_6g_ap_ptr[WMI_REG_CURRENT_MAX_AP_TYPE]; 82*d8899132SKalle Valo struct ath12k_reg_rule *reg_rules_6g_client_ptr 83*d8899132SKalle Valo [WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE]; 84*d8899132SKalle Valo }; 85*d8899132SKalle Valo 86*d8899132SKalle Valo void ath12k_reg_init(struct ath12k *ar); 87*d8899132SKalle Valo void ath12k_reg_free(struct ath12k_base *ab); 88*d8899132SKalle Valo void ath12k_regd_update_work(struct work_struct *work); 89*d8899132SKalle Valo struct ieee80211_regdomain *ath12k_reg_build_regd(struct ath12k_base *ab, 90*d8899132SKalle Valo struct ath12k_reg_info *reg_info, 91*d8899132SKalle Valo bool intersect); 92*d8899132SKalle Valo int ath12k_regd_update(struct ath12k *ar, bool init); 93*d8899132SKalle Valo int ath12k_reg_update_chan_list(struct ath12k *ar); 94*d8899132SKalle Valo 95*d8899132SKalle Valo #endif 96