1d8899132SKalle Valo /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2d8899132SKalle Valo /* 3d8899132SKalle Valo * Copyright (c) 2019-2021 The Linux Foundation. All rights reserved. 4*bc3bfb63SJeff Johnson * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. 5d8899132SKalle Valo */ 6d8899132SKalle Valo 7d8899132SKalle Valo #ifndef ATH12K_REG_H 8d8899132SKalle Valo #define ATH12K_REG_H 9d8899132SKalle Valo 10d8899132SKalle Valo #include <linux/kernel.h> 11d8899132SKalle Valo #include <net/regulatory.h> 12d8899132SKalle Valo 13d8899132SKalle Valo struct ath12k_base; 14d8899132SKalle Valo struct ath12k; 15d8899132SKalle Valo 16d8899132SKalle Valo /* DFS regdomains supported by Firmware */ 17d8899132SKalle Valo enum ath12k_dfs_region { 18d8899132SKalle Valo ATH12K_DFS_REG_UNSET, 19d8899132SKalle Valo ATH12K_DFS_REG_FCC, 20d8899132SKalle Valo ATH12K_DFS_REG_ETSI, 21d8899132SKalle Valo ATH12K_DFS_REG_MKK, 22d8899132SKalle Valo ATH12K_DFS_REG_CN, 23d8899132SKalle Valo ATH12K_DFS_REG_KR, 24d8899132SKalle Valo ATH12K_DFS_REG_MKK_N, 25d8899132SKalle Valo ATH12K_DFS_REG_UNDEF, 26d8899132SKalle Valo }; 27d8899132SKalle Valo 28d8899132SKalle Valo enum ath12k_reg_cc_code { 29d8899132SKalle Valo REG_SET_CC_STATUS_PASS = 0, 30d8899132SKalle Valo REG_CURRENT_ALPHA2_NOT_FOUND = 1, 31d8899132SKalle Valo REG_INIT_ALPHA2_NOT_FOUND = 2, 32d8899132SKalle Valo REG_SET_CC_CHANGE_NOT_ALLOWED = 3, 33d8899132SKalle Valo REG_SET_CC_STATUS_NO_MEMORY = 4, 34d8899132SKalle Valo REG_SET_CC_STATUS_FAIL = 5, 35d8899132SKalle Valo }; 36d8899132SKalle Valo 37d8899132SKalle Valo struct ath12k_reg_rule { 38d8899132SKalle Valo u16 start_freq; 39d8899132SKalle Valo u16 end_freq; 40d8899132SKalle Valo u16 max_bw; 41d8899132SKalle Valo u8 reg_power; 42d8899132SKalle Valo u8 ant_gain; 43d8899132SKalle Valo u16 flags; 44d8899132SKalle Valo bool psd_flag; 45d8899132SKalle Valo u16 psd_eirp; 46d8899132SKalle Valo }; 47d8899132SKalle Valo 48d8899132SKalle Valo struct ath12k_reg_info { 49d8899132SKalle Valo enum ath12k_reg_cc_code status_code; 50d8899132SKalle Valo u8 num_phy; 51d8899132SKalle Valo u8 phy_id; 52d8899132SKalle Valo u16 reg_dmn_pair; 53d8899132SKalle Valo u16 ctry_code; 54d8899132SKalle Valo u8 alpha2[REG_ALPHA2_LEN + 1]; 55d8899132SKalle Valo u32 dfs_region; 56d8899132SKalle Valo u32 phybitmap; 57d8899132SKalle Valo bool is_ext_reg_event; 58d8899132SKalle Valo u32 min_bw_2g; 59d8899132SKalle Valo u32 max_bw_2g; 60d8899132SKalle Valo u32 min_bw_5g; 61d8899132SKalle Valo u32 max_bw_5g; 62d8899132SKalle Valo u32 num_2g_reg_rules; 63d8899132SKalle Valo u32 num_5g_reg_rules; 64d8899132SKalle Valo struct ath12k_reg_rule *reg_rules_2g_ptr; 65d8899132SKalle Valo struct ath12k_reg_rule *reg_rules_5g_ptr; 66d8899132SKalle Valo enum wmi_reg_6g_client_type client_type; 67d8899132SKalle Valo bool rnr_tpe_usable; 68d8899132SKalle Valo bool unspecified_ap_usable; 69d8899132SKalle Valo /* TODO: All 6G related info can be stored only for required 70d8899132SKalle Valo * combination instead of all types, to optimize memory usage. 71d8899132SKalle Valo */ 72d8899132SKalle Valo u8 domain_code_6g_ap[WMI_REG_CURRENT_MAX_AP_TYPE]; 73d8899132SKalle Valo u8 domain_code_6g_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE]; 74d8899132SKalle Valo u32 domain_code_6g_super_id; 75d8899132SKalle Valo u32 min_bw_6g_ap[WMI_REG_CURRENT_MAX_AP_TYPE]; 76d8899132SKalle Valo u32 max_bw_6g_ap[WMI_REG_CURRENT_MAX_AP_TYPE]; 77d8899132SKalle Valo u32 min_bw_6g_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE]; 78d8899132SKalle Valo u32 max_bw_6g_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE]; 79d8899132SKalle Valo u32 num_6g_reg_rules_ap[WMI_REG_CURRENT_MAX_AP_TYPE]; 80d8899132SKalle Valo u32 num_6g_reg_rules_cl[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE]; 81d8899132SKalle Valo struct ath12k_reg_rule *reg_rules_6g_ap_ptr[WMI_REG_CURRENT_MAX_AP_TYPE]; 82d8899132SKalle Valo struct ath12k_reg_rule *reg_rules_6g_client_ptr 83d8899132SKalle Valo [WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE]; 84d8899132SKalle Valo }; 85d8899132SKalle Valo 86d8899132SKalle Valo void ath12k_reg_init(struct ath12k *ar); 87d8899132SKalle Valo void ath12k_reg_free(struct ath12k_base *ab); 88d8899132SKalle Valo void ath12k_regd_update_work(struct work_struct *work); 89d8899132SKalle Valo struct ieee80211_regdomain *ath12k_reg_build_regd(struct ath12k_base *ab, 90d8899132SKalle Valo struct ath12k_reg_info *reg_info, 91d8899132SKalle Valo bool intersect); 92d8899132SKalle Valo int ath12k_regd_update(struct ath12k *ar, bool init); 93d8899132SKalle Valo int ath12k_reg_update_chan_list(struct ath12k *ar); 94d8899132SKalle Valo 95d8899132SKalle Valo #endif 96