xref: /openbmc/linux/drivers/net/usb/smsc95xx.c (revision bc02ff95fe4ebd3e5ee7455c0aa6f76ebe39ebca)
12f7ca802SSteve Glendinning  /***************************************************************************
22f7ca802SSteve Glendinning  *
32f7ca802SSteve Glendinning  * Copyright (C) 2007-2008 SMSC
42f7ca802SSteve Glendinning  *
52f7ca802SSteve Glendinning  * This program is free software; you can redistribute it and/or
62f7ca802SSteve Glendinning  * modify it under the terms of the GNU General Public License
72f7ca802SSteve Glendinning  * as published by the Free Software Foundation; either version 2
82f7ca802SSteve Glendinning  * of the License, or (at your option) any later version.
92f7ca802SSteve Glendinning  *
102f7ca802SSteve Glendinning  * This program is distributed in the hope that it will be useful,
112f7ca802SSteve Glendinning  * but WITHOUT ANY WARRANTY; without even the implied warranty of
122f7ca802SSteve Glendinning  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
132f7ca802SSteve Glendinning  * GNU General Public License for more details.
142f7ca802SSteve Glendinning  *
152f7ca802SSteve Glendinning  * You should have received a copy of the GNU General Public License
162f7ca802SSteve Glendinning  * along with this program; if not, write to the Free Software
172f7ca802SSteve Glendinning  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
182f7ca802SSteve Glendinning  *
192f7ca802SSteve Glendinning  *****************************************************************************/
202f7ca802SSteve Glendinning 
212f7ca802SSteve Glendinning #include <linux/module.h>
222f7ca802SSteve Glendinning #include <linux/kmod.h>
232f7ca802SSteve Glendinning #include <linux/init.h>
242f7ca802SSteve Glendinning #include <linux/netdevice.h>
252f7ca802SSteve Glendinning #include <linux/etherdevice.h>
262f7ca802SSteve Glendinning #include <linux/ethtool.h>
272f7ca802SSteve Glendinning #include <linux/mii.h>
282f7ca802SSteve Glendinning #include <linux/usb.h>
292f7ca802SSteve Glendinning #include <linux/crc32.h>
302f7ca802SSteve Glendinning #include <linux/usb/usbnet.h>
312f7ca802SSteve Glendinning #include "smsc95xx.h"
322f7ca802SSteve Glendinning 
332f7ca802SSteve Glendinning #define SMSC_CHIPNAME			"smsc95xx"
34f7b29271SSteve Glendinning #define SMSC_DRIVER_VERSION		"1.0.4"
352f7ca802SSteve Glendinning #define HS_USB_PKT_SIZE			(512)
362f7ca802SSteve Glendinning #define FS_USB_PKT_SIZE			(64)
372f7ca802SSteve Glendinning #define DEFAULT_HS_BURST_CAP_SIZE	(16 * 1024 + 5 * HS_USB_PKT_SIZE)
382f7ca802SSteve Glendinning #define DEFAULT_FS_BURST_CAP_SIZE	(6 * 1024 + 33 * FS_USB_PKT_SIZE)
392f7ca802SSteve Glendinning #define DEFAULT_BULK_IN_DELAY		(0x00002000)
402f7ca802SSteve Glendinning #define MAX_SINGLE_PACKET_SIZE		(2048)
412f7ca802SSteve Glendinning #define LAN95XX_EEPROM_MAGIC		(0x9500)
422f7ca802SSteve Glendinning #define EEPROM_MAC_OFFSET		(0x01)
43f7b29271SSteve Glendinning #define DEFAULT_TX_CSUM_ENABLE		(true)
442f7ca802SSteve Glendinning #define DEFAULT_RX_CSUM_ENABLE		(true)
452f7ca802SSteve Glendinning #define SMSC95XX_INTERNAL_PHY_ID	(1)
462f7ca802SSteve Glendinning #define SMSC95XX_TX_OVERHEAD		(8)
47f7b29271SSteve Glendinning #define SMSC95XX_TX_OVERHEAD_CSUM	(12)
482f7ca802SSteve Glendinning 
492f7ca802SSteve Glendinning struct smsc95xx_priv {
502f7ca802SSteve Glendinning 	u32 mac_cr;
512f7ca802SSteve Glendinning 	spinlock_t mac_cr_lock;
52f7b29271SSteve Glendinning 	bool use_tx_csum;
532f7ca802SSteve Glendinning 	bool use_rx_csum;
542f7ca802SSteve Glendinning };
552f7ca802SSteve Glendinning 
562f7ca802SSteve Glendinning struct usb_context {
572f7ca802SSteve Glendinning 	struct usb_ctrlrequest req;
582f7ca802SSteve Glendinning 	struct completion notify;
592f7ca802SSteve Glendinning 	struct usbnet *dev;
602f7ca802SSteve Glendinning };
612f7ca802SSteve Glendinning 
622f7ca802SSteve Glendinning int turbo_mode = true;
632f7ca802SSteve Glendinning module_param(turbo_mode, bool, 0644);
642f7ca802SSteve Glendinning MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
652f7ca802SSteve Glendinning 
662f7ca802SSteve Glendinning static int smsc95xx_read_reg(struct usbnet *dev, u32 index, u32 *data)
672f7ca802SSteve Glendinning {
682f7ca802SSteve Glendinning 	u32 *buf = kmalloc(4, GFP_KERNEL);
692f7ca802SSteve Glendinning 	int ret;
702f7ca802SSteve Glendinning 
712f7ca802SSteve Glendinning 	BUG_ON(!dev);
722f7ca802SSteve Glendinning 
732f7ca802SSteve Glendinning 	if (!buf)
742f7ca802SSteve Glendinning 		return -ENOMEM;
752f7ca802SSteve Glendinning 
762f7ca802SSteve Glendinning 	ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0),
772f7ca802SSteve Glendinning 		USB_VENDOR_REQUEST_READ_REGISTER,
782f7ca802SSteve Glendinning 		USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
792f7ca802SSteve Glendinning 		00, index, buf, 4, USB_CTRL_GET_TIMEOUT);
802f7ca802SSteve Glendinning 
812f7ca802SSteve Glendinning 	if (unlikely(ret < 0))
822f7ca802SSteve Glendinning 		devwarn(dev, "Failed to read register index 0x%08x", index);
832f7ca802SSteve Glendinning 
842f7ca802SSteve Glendinning 	le32_to_cpus(buf);
852f7ca802SSteve Glendinning 	*data = *buf;
862f7ca802SSteve Glendinning 	kfree(buf);
872f7ca802SSteve Glendinning 
882f7ca802SSteve Glendinning 	return ret;
892f7ca802SSteve Glendinning }
902f7ca802SSteve Glendinning 
912f7ca802SSteve Glendinning static int smsc95xx_write_reg(struct usbnet *dev, u32 index, u32 data)
922f7ca802SSteve Glendinning {
932f7ca802SSteve Glendinning 	u32 *buf = kmalloc(4, GFP_KERNEL);
942f7ca802SSteve Glendinning 	int ret;
952f7ca802SSteve Glendinning 
962f7ca802SSteve Glendinning 	BUG_ON(!dev);
972f7ca802SSteve Glendinning 
982f7ca802SSteve Glendinning 	if (!buf)
992f7ca802SSteve Glendinning 		return -ENOMEM;
1002f7ca802SSteve Glendinning 
1012f7ca802SSteve Glendinning 	*buf = data;
1022f7ca802SSteve Glendinning 	cpu_to_le32s(buf);
1032f7ca802SSteve Glendinning 
1042f7ca802SSteve Glendinning 	ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
1052f7ca802SSteve Glendinning 		USB_VENDOR_REQUEST_WRITE_REGISTER,
1062f7ca802SSteve Glendinning 		USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1072f7ca802SSteve Glendinning 		00, index, buf, 4, USB_CTRL_SET_TIMEOUT);
1082f7ca802SSteve Glendinning 
1092f7ca802SSteve Glendinning 	if (unlikely(ret < 0))
1102f7ca802SSteve Glendinning 		devwarn(dev, "Failed to write register index 0x%08x", index);
1112f7ca802SSteve Glendinning 
1122f7ca802SSteve Glendinning 	kfree(buf);
1132f7ca802SSteve Glendinning 
1142f7ca802SSteve Glendinning 	return ret;
1152f7ca802SSteve Glendinning }
1162f7ca802SSteve Glendinning 
1172f7ca802SSteve Glendinning /* Loop until the read is completed with timeout
1182f7ca802SSteve Glendinning  * called with phy_mutex held */
1192f7ca802SSteve Glendinning static int smsc95xx_phy_wait_not_busy(struct usbnet *dev)
1202f7ca802SSteve Glendinning {
1212f7ca802SSteve Glendinning 	unsigned long start_time = jiffies;
1222f7ca802SSteve Glendinning 	u32 val;
1232f7ca802SSteve Glendinning 
1242f7ca802SSteve Glendinning 	do {
1252f7ca802SSteve Glendinning 		smsc95xx_read_reg(dev, MII_ADDR, &val);
1262f7ca802SSteve Glendinning 		if (!(val & MII_BUSY_))
1272f7ca802SSteve Glendinning 			return 0;
1282f7ca802SSteve Glendinning 	} while (!time_after(jiffies, start_time + HZ));
1292f7ca802SSteve Glendinning 
1302f7ca802SSteve Glendinning 	return -EIO;
1312f7ca802SSteve Glendinning }
1322f7ca802SSteve Glendinning 
1332f7ca802SSteve Glendinning static int smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx)
1342f7ca802SSteve Glendinning {
1352f7ca802SSteve Glendinning 	struct usbnet *dev = netdev_priv(netdev);
1362f7ca802SSteve Glendinning 	u32 val, addr;
1372f7ca802SSteve Glendinning 
1382f7ca802SSteve Glendinning 	mutex_lock(&dev->phy_mutex);
1392f7ca802SSteve Glendinning 
1402f7ca802SSteve Glendinning 	/* confirm MII not busy */
1412f7ca802SSteve Glendinning 	if (smsc95xx_phy_wait_not_busy(dev)) {
1422f7ca802SSteve Glendinning 		devwarn(dev, "MII is busy in smsc95xx_mdio_read");
1432f7ca802SSteve Glendinning 		mutex_unlock(&dev->phy_mutex);
1442f7ca802SSteve Glendinning 		return -EIO;
1452f7ca802SSteve Glendinning 	}
1462f7ca802SSteve Glendinning 
1472f7ca802SSteve Glendinning 	/* set the address, index & direction (read from PHY) */
1482f7ca802SSteve Glendinning 	phy_id &= dev->mii.phy_id_mask;
1492f7ca802SSteve Glendinning 	idx &= dev->mii.reg_num_mask;
1502f7ca802SSteve Glendinning 	addr = (phy_id << 11) | (idx << 6) | MII_READ_;
1512f7ca802SSteve Glendinning 	smsc95xx_write_reg(dev, MII_ADDR, addr);
1522f7ca802SSteve Glendinning 
1532f7ca802SSteve Glendinning 	if (smsc95xx_phy_wait_not_busy(dev)) {
1542f7ca802SSteve Glendinning 		devwarn(dev, "Timed out reading MII reg %02X", idx);
1552f7ca802SSteve Glendinning 		mutex_unlock(&dev->phy_mutex);
1562f7ca802SSteve Glendinning 		return -EIO;
1572f7ca802SSteve Glendinning 	}
1582f7ca802SSteve Glendinning 
1592f7ca802SSteve Glendinning 	smsc95xx_read_reg(dev, MII_DATA, &val);
1602f7ca802SSteve Glendinning 
1612f7ca802SSteve Glendinning 	mutex_unlock(&dev->phy_mutex);
1622f7ca802SSteve Glendinning 
1632f7ca802SSteve Glendinning 	return (u16)(val & 0xFFFF);
1642f7ca802SSteve Glendinning }
1652f7ca802SSteve Glendinning 
1662f7ca802SSteve Glendinning static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx,
1672f7ca802SSteve Glendinning 				int regval)
1682f7ca802SSteve Glendinning {
1692f7ca802SSteve Glendinning 	struct usbnet *dev = netdev_priv(netdev);
1702f7ca802SSteve Glendinning 	u32 val, addr;
1712f7ca802SSteve Glendinning 
1722f7ca802SSteve Glendinning 	mutex_lock(&dev->phy_mutex);
1732f7ca802SSteve Glendinning 
1742f7ca802SSteve Glendinning 	/* confirm MII not busy */
1752f7ca802SSteve Glendinning 	if (smsc95xx_phy_wait_not_busy(dev)) {
1762f7ca802SSteve Glendinning 		devwarn(dev, "MII is busy in smsc95xx_mdio_write");
1772f7ca802SSteve Glendinning 		mutex_unlock(&dev->phy_mutex);
1782f7ca802SSteve Glendinning 		return;
1792f7ca802SSteve Glendinning 	}
1802f7ca802SSteve Glendinning 
1812f7ca802SSteve Glendinning 	val = regval;
1822f7ca802SSteve Glendinning 	smsc95xx_write_reg(dev, MII_DATA, val);
1832f7ca802SSteve Glendinning 
1842f7ca802SSteve Glendinning 	/* set the address, index & direction (write to PHY) */
1852f7ca802SSteve Glendinning 	phy_id &= dev->mii.phy_id_mask;
1862f7ca802SSteve Glendinning 	idx &= dev->mii.reg_num_mask;
1872f7ca802SSteve Glendinning 	addr = (phy_id << 11) | (idx << 6) | MII_WRITE_;
1882f7ca802SSteve Glendinning 	smsc95xx_write_reg(dev, MII_ADDR, addr);
1892f7ca802SSteve Glendinning 
1902f7ca802SSteve Glendinning 	if (smsc95xx_phy_wait_not_busy(dev))
1912f7ca802SSteve Glendinning 		devwarn(dev, "Timed out writing MII reg %02X", idx);
1922f7ca802SSteve Glendinning 
1932f7ca802SSteve Glendinning 	mutex_unlock(&dev->phy_mutex);
1942f7ca802SSteve Glendinning }
1952f7ca802SSteve Glendinning 
1962f7ca802SSteve Glendinning static int smsc95xx_wait_eeprom(struct usbnet *dev)
1972f7ca802SSteve Glendinning {
1982f7ca802SSteve Glendinning 	unsigned long start_time = jiffies;
1992f7ca802SSteve Glendinning 	u32 val;
2002f7ca802SSteve Glendinning 
2012f7ca802SSteve Glendinning 	do {
2022f7ca802SSteve Glendinning 		smsc95xx_read_reg(dev, E2P_CMD, &val);
2032f7ca802SSteve Glendinning 		if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_))
2042f7ca802SSteve Glendinning 			break;
2052f7ca802SSteve Glendinning 		udelay(40);
2062f7ca802SSteve Glendinning 	} while (!time_after(jiffies, start_time + HZ));
2072f7ca802SSteve Glendinning 
2082f7ca802SSteve Glendinning 	if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) {
2092f7ca802SSteve Glendinning 		devwarn(dev, "EEPROM read operation timeout");
2102f7ca802SSteve Glendinning 		return -EIO;
2112f7ca802SSteve Glendinning 	}
2122f7ca802SSteve Glendinning 
2132f7ca802SSteve Glendinning 	return 0;
2142f7ca802SSteve Glendinning }
2152f7ca802SSteve Glendinning 
2162f7ca802SSteve Glendinning static int smsc95xx_eeprom_confirm_not_busy(struct usbnet *dev)
2172f7ca802SSteve Glendinning {
2182f7ca802SSteve Glendinning 	unsigned long start_time = jiffies;
2192f7ca802SSteve Glendinning 	u32 val;
2202f7ca802SSteve Glendinning 
2212f7ca802SSteve Glendinning 	do {
2222f7ca802SSteve Glendinning 		smsc95xx_read_reg(dev, E2P_CMD, &val);
2232f7ca802SSteve Glendinning 
2242f7ca802SSteve Glendinning 		if (!(val & E2P_CMD_LOADED_)) {
2252f7ca802SSteve Glendinning 			devwarn(dev, "No EEPROM present");
2262f7ca802SSteve Glendinning 			return -EIO;
2272f7ca802SSteve Glendinning 		}
2282f7ca802SSteve Glendinning 
2292f7ca802SSteve Glendinning 		if (!(val & E2P_CMD_BUSY_))
2302f7ca802SSteve Glendinning 			return 0;
2312f7ca802SSteve Glendinning 
2322f7ca802SSteve Glendinning 		udelay(40);
2332f7ca802SSteve Glendinning 	} while (!time_after(jiffies, start_time + HZ));
2342f7ca802SSteve Glendinning 
2352f7ca802SSteve Glendinning 	devwarn(dev, "EEPROM is busy");
2362f7ca802SSteve Glendinning 	return -EIO;
2372f7ca802SSteve Glendinning }
2382f7ca802SSteve Glendinning 
2392f7ca802SSteve Glendinning static int smsc95xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length,
2402f7ca802SSteve Glendinning 				u8 *data)
2412f7ca802SSteve Glendinning {
2422f7ca802SSteve Glendinning 	u32 val;
2432f7ca802SSteve Glendinning 	int i, ret;
2442f7ca802SSteve Glendinning 
2452f7ca802SSteve Glendinning 	BUG_ON(!dev);
2462f7ca802SSteve Glendinning 	BUG_ON(!data);
2472f7ca802SSteve Glendinning 
2482f7ca802SSteve Glendinning 	ret = smsc95xx_eeprom_confirm_not_busy(dev);
2492f7ca802SSteve Glendinning 	if (ret)
2502f7ca802SSteve Glendinning 		return ret;
2512f7ca802SSteve Glendinning 
2522f7ca802SSteve Glendinning 	for (i = 0; i < length; i++) {
2532f7ca802SSteve Glendinning 		val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_);
2542f7ca802SSteve Glendinning 		smsc95xx_write_reg(dev, E2P_CMD, val);
2552f7ca802SSteve Glendinning 
2562f7ca802SSteve Glendinning 		ret = smsc95xx_wait_eeprom(dev);
2572f7ca802SSteve Glendinning 		if (ret < 0)
2582f7ca802SSteve Glendinning 			return ret;
2592f7ca802SSteve Glendinning 
2602f7ca802SSteve Glendinning 		smsc95xx_read_reg(dev, E2P_DATA, &val);
2612f7ca802SSteve Glendinning 
2622f7ca802SSteve Glendinning 		data[i] = val & 0xFF;
2632f7ca802SSteve Glendinning 		offset++;
2642f7ca802SSteve Glendinning 	}
2652f7ca802SSteve Glendinning 
2662f7ca802SSteve Glendinning 	return 0;
2672f7ca802SSteve Glendinning }
2682f7ca802SSteve Glendinning 
2692f7ca802SSteve Glendinning static int smsc95xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length,
2702f7ca802SSteve Glendinning 				 u8 *data)
2712f7ca802SSteve Glendinning {
2722f7ca802SSteve Glendinning 	u32 val;
2732f7ca802SSteve Glendinning 	int i, ret;
2742f7ca802SSteve Glendinning 
2752f7ca802SSteve Glendinning 	BUG_ON(!dev);
2762f7ca802SSteve Glendinning 	BUG_ON(!data);
2772f7ca802SSteve Glendinning 
2782f7ca802SSteve Glendinning 	ret = smsc95xx_eeprom_confirm_not_busy(dev);
2792f7ca802SSteve Glendinning 	if (ret)
2802f7ca802SSteve Glendinning 		return ret;
2812f7ca802SSteve Glendinning 
2822f7ca802SSteve Glendinning 	/* Issue write/erase enable command */
2832f7ca802SSteve Glendinning 	val = E2P_CMD_BUSY_ | E2P_CMD_EWEN_;
2842f7ca802SSteve Glendinning 	smsc95xx_write_reg(dev, E2P_CMD, val);
2852f7ca802SSteve Glendinning 
2862f7ca802SSteve Glendinning 	ret = smsc95xx_wait_eeprom(dev);
2872f7ca802SSteve Glendinning 	if (ret < 0)
2882f7ca802SSteve Glendinning 		return ret;
2892f7ca802SSteve Glendinning 
2902f7ca802SSteve Glendinning 	for (i = 0; i < length; i++) {
2912f7ca802SSteve Glendinning 
2922f7ca802SSteve Glendinning 		/* Fill data register */
2932f7ca802SSteve Glendinning 		val = data[i];
2942f7ca802SSteve Glendinning 		smsc95xx_write_reg(dev, E2P_DATA, val);
2952f7ca802SSteve Glendinning 
2962f7ca802SSteve Glendinning 		/* Send "write" command */
2972f7ca802SSteve Glendinning 		val = E2P_CMD_BUSY_ | E2P_CMD_WRITE_ | (offset & E2P_CMD_ADDR_);
2982f7ca802SSteve Glendinning 		smsc95xx_write_reg(dev, E2P_CMD, val);
2992f7ca802SSteve Glendinning 
3002f7ca802SSteve Glendinning 		ret = smsc95xx_wait_eeprom(dev);
3012f7ca802SSteve Glendinning 		if (ret < 0)
3022f7ca802SSteve Glendinning 			return ret;
3032f7ca802SSteve Glendinning 
3042f7ca802SSteve Glendinning 		offset++;
3052f7ca802SSteve Glendinning 	}
3062f7ca802SSteve Glendinning 
3072f7ca802SSteve Glendinning 	return 0;
3082f7ca802SSteve Glendinning }
3092f7ca802SSteve Glendinning 
3102f7ca802SSteve Glendinning static void smsc95xx_async_cmd_callback(struct urb *urb, struct pt_regs *regs)
3112f7ca802SSteve Glendinning {
3122f7ca802SSteve Glendinning 	struct usb_context *usb_context = urb->context;
3132f7ca802SSteve Glendinning 	struct usbnet *dev = usb_context->dev;
3142f7ca802SSteve Glendinning 
3152f7ca802SSteve Glendinning 	if (urb->status < 0)
3162f7ca802SSteve Glendinning 		devwarn(dev, "async callback failed with %d", urb->status);
3172f7ca802SSteve Glendinning 
3182f7ca802SSteve Glendinning 	complete(&usb_context->notify);
3192f7ca802SSteve Glendinning 
3202f7ca802SSteve Glendinning 	kfree(usb_context);
3212f7ca802SSteve Glendinning 	usb_free_urb(urb);
3222f7ca802SSteve Glendinning }
3232f7ca802SSteve Glendinning 
3241d74a6bdSSteve Glendinning static int smsc95xx_write_reg_async(struct usbnet *dev, u16 index, u32 *data)
3252f7ca802SSteve Glendinning {
3262f7ca802SSteve Glendinning 	struct usb_context *usb_context;
3272f7ca802SSteve Glendinning 	int status;
3282f7ca802SSteve Glendinning 	struct urb *urb;
3291d74a6bdSSteve Glendinning 	const u16 size = 4;
3302f7ca802SSteve Glendinning 
3312f7ca802SSteve Glendinning 	urb = usb_alloc_urb(0, GFP_ATOMIC);
3322f7ca802SSteve Glendinning 	if (!urb) {
3332f7ca802SSteve Glendinning 		devwarn(dev, "Error allocating URB");
3342f7ca802SSteve Glendinning 		return -ENOMEM;
3352f7ca802SSteve Glendinning 	}
3362f7ca802SSteve Glendinning 
3372f7ca802SSteve Glendinning 	usb_context = kmalloc(sizeof(struct usb_context), GFP_ATOMIC);
3382f7ca802SSteve Glendinning 	if (usb_context == NULL) {
3392f7ca802SSteve Glendinning 		devwarn(dev, "Error allocating control msg");
3402f7ca802SSteve Glendinning 		usb_free_urb(urb);
3412f7ca802SSteve Glendinning 		return -ENOMEM;
3422f7ca802SSteve Glendinning 	}
3432f7ca802SSteve Glendinning 
3442f7ca802SSteve Glendinning 	usb_context->req.bRequestType =
3452f7ca802SSteve Glendinning 		USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE;
3462f7ca802SSteve Glendinning 	usb_context->req.bRequest = USB_VENDOR_REQUEST_WRITE_REGISTER;
3472f7ca802SSteve Glendinning 	usb_context->req.wValue = 00;
3481d74a6bdSSteve Glendinning 	usb_context->req.wIndex = cpu_to_le16(index);
3491d74a6bdSSteve Glendinning 	usb_context->req.wLength = cpu_to_le16(size);
3502f7ca802SSteve Glendinning 	init_completion(&usb_context->notify);
3512f7ca802SSteve Glendinning 
3522f7ca802SSteve Glendinning 	usb_fill_control_urb(urb, dev->udev, usb_sndctrlpipe(dev->udev, 0),
3532f7ca802SSteve Glendinning 		(void *)&usb_context->req, data, size,
3542f7ca802SSteve Glendinning 		(usb_complete_t)smsc95xx_async_cmd_callback,
3552f7ca802SSteve Glendinning 		(void *)usb_context);
3562f7ca802SSteve Glendinning 
3572f7ca802SSteve Glendinning 	status = usb_submit_urb(urb, GFP_ATOMIC);
3582f7ca802SSteve Glendinning 	if (status < 0) {
3592f7ca802SSteve Glendinning 		devwarn(dev, "Error submitting control msg, sts=%d", status);
3602f7ca802SSteve Glendinning 		kfree(usb_context);
3612f7ca802SSteve Glendinning 		usb_free_urb(urb);
3622f7ca802SSteve Glendinning 	}
3632f7ca802SSteve Glendinning 
3642f7ca802SSteve Glendinning 	return status;
3652f7ca802SSteve Glendinning }
3662f7ca802SSteve Glendinning 
3672f7ca802SSteve Glendinning /* returns hash bit number for given MAC address
3682f7ca802SSteve Glendinning  * example:
3692f7ca802SSteve Glendinning  * 01 00 5E 00 00 01 -> returns bit number 31 */
3702f7ca802SSteve Glendinning static unsigned int smsc95xx_hash(char addr[ETH_ALEN])
3712f7ca802SSteve Glendinning {
3722f7ca802SSteve Glendinning 	return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
3732f7ca802SSteve Glendinning }
3742f7ca802SSteve Glendinning 
3752f7ca802SSteve Glendinning static void smsc95xx_set_multicast(struct net_device *netdev)
3762f7ca802SSteve Glendinning {
3772f7ca802SSteve Glendinning 	struct usbnet *dev = netdev_priv(netdev);
3782f7ca802SSteve Glendinning 	struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
3792f7ca802SSteve Glendinning 	u32 hash_hi = 0;
3802f7ca802SSteve Glendinning 	u32 hash_lo = 0;
3812f7ca802SSteve Glendinning 	unsigned long flags;
3822f7ca802SSteve Glendinning 
3832f7ca802SSteve Glendinning 	spin_lock_irqsave(&pdata->mac_cr_lock, flags);
3842f7ca802SSteve Glendinning 
3852f7ca802SSteve Glendinning 	if (dev->net->flags & IFF_PROMISC) {
3862f7ca802SSteve Glendinning 		if (netif_msg_drv(dev))
3872f7ca802SSteve Glendinning 			devdbg(dev, "promiscuous mode enabled");
3882f7ca802SSteve Glendinning 		pdata->mac_cr |= MAC_CR_PRMS_;
3892f7ca802SSteve Glendinning 		pdata->mac_cr &= ~(MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
3902f7ca802SSteve Glendinning 	} else if (dev->net->flags & IFF_ALLMULTI) {
3912f7ca802SSteve Glendinning 		if (netif_msg_drv(dev))
3922f7ca802SSteve Glendinning 			devdbg(dev, "receive all multicast enabled");
3932f7ca802SSteve Glendinning 		pdata->mac_cr |= MAC_CR_MCPAS_;
3942f7ca802SSteve Glendinning 		pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_HPFILT_);
3952f7ca802SSteve Glendinning 	} else if (dev->net->mc_count > 0) {
3962f7ca802SSteve Glendinning 		struct dev_mc_list *mc_list = dev->net->mc_list;
3972f7ca802SSteve Glendinning 		int count = 0;
3982f7ca802SSteve Glendinning 
3992f7ca802SSteve Glendinning 		pdata->mac_cr |= MAC_CR_HPFILT_;
4002f7ca802SSteve Glendinning 		pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
4012f7ca802SSteve Glendinning 
4022f7ca802SSteve Glendinning 		while (mc_list) {
4032f7ca802SSteve Glendinning 			count++;
4042f7ca802SSteve Glendinning 			if (mc_list->dmi_addrlen == ETH_ALEN) {
4052f7ca802SSteve Glendinning 				u32 bitnum = smsc95xx_hash(mc_list->dmi_addr);
4062f7ca802SSteve Glendinning 				u32 mask = 0x01 << (bitnum & 0x1F);
4072f7ca802SSteve Glendinning 				if (bitnum & 0x20)
4082f7ca802SSteve Glendinning 					hash_hi |= mask;
4092f7ca802SSteve Glendinning 				else
4102f7ca802SSteve Glendinning 					hash_lo |= mask;
4112f7ca802SSteve Glendinning 			} else {
4122f7ca802SSteve Glendinning 				devwarn(dev, "dmi_addrlen != 6");
4132f7ca802SSteve Glendinning 			}
4142f7ca802SSteve Glendinning 			mc_list = mc_list->next;
4152f7ca802SSteve Glendinning 		}
4162f7ca802SSteve Glendinning 
4172f7ca802SSteve Glendinning 		if (count != ((u32)dev->net->mc_count))
4182f7ca802SSteve Glendinning 			devwarn(dev, "mc_count != dev->mc_count");
4192f7ca802SSteve Glendinning 
4202f7ca802SSteve Glendinning 		if (netif_msg_drv(dev))
4212f7ca802SSteve Glendinning 			devdbg(dev, "HASHH=0x%08X, HASHL=0x%08X", hash_hi,
4222f7ca802SSteve Glendinning 				hash_lo);
4232f7ca802SSteve Glendinning 	} else {
4242f7ca802SSteve Glendinning 		if (netif_msg_drv(dev))
4252f7ca802SSteve Glendinning 			devdbg(dev, "receive own packets only");
4262f7ca802SSteve Glendinning 		pdata->mac_cr &=
4272f7ca802SSteve Glendinning 			~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
4282f7ca802SSteve Glendinning 	}
4292f7ca802SSteve Glendinning 
4302f7ca802SSteve Glendinning 	spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
4312f7ca802SSteve Glendinning 
4322f7ca802SSteve Glendinning 	/* Initiate async writes, as we can't wait for completion here */
4332f7ca802SSteve Glendinning 	smsc95xx_write_reg_async(dev, HASHH, &hash_hi);
4342f7ca802SSteve Glendinning 	smsc95xx_write_reg_async(dev, HASHL, &hash_lo);
4352f7ca802SSteve Glendinning 	smsc95xx_write_reg_async(dev, MAC_CR, &pdata->mac_cr);
4362f7ca802SSteve Glendinning }
4372f7ca802SSteve Glendinning 
4382f7ca802SSteve Glendinning static void smsc95xx_phy_update_flowcontrol(struct usbnet *dev, u8 duplex,
4392f7ca802SSteve Glendinning 					    u16 lcladv, u16 rmtadv)
4402f7ca802SSteve Glendinning {
4412f7ca802SSteve Glendinning 	u32 flow, afc_cfg = 0;
4422f7ca802SSteve Glendinning 
4432f7ca802SSteve Glendinning 	int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg);
4442f7ca802SSteve Glendinning 	if (ret < 0) {
4452f7ca802SSteve Glendinning 		devwarn(dev, "error reading AFC_CFG");
4462f7ca802SSteve Glendinning 		return;
4472f7ca802SSteve Glendinning 	}
4482f7ca802SSteve Glendinning 
4492f7ca802SSteve Glendinning 	if (duplex == DUPLEX_FULL) {
450*bc02ff95SSteve Glendinning 		u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
4512f7ca802SSteve Glendinning 
4522f7ca802SSteve Glendinning 		if (cap & FLOW_CTRL_RX)
4532f7ca802SSteve Glendinning 			flow = 0xFFFF0002;
4542f7ca802SSteve Glendinning 		else
4552f7ca802SSteve Glendinning 			flow = 0;
4562f7ca802SSteve Glendinning 
4572f7ca802SSteve Glendinning 		if (cap & FLOW_CTRL_TX)
4582f7ca802SSteve Glendinning 			afc_cfg |= 0xF;
4592f7ca802SSteve Glendinning 		else
4602f7ca802SSteve Glendinning 			afc_cfg &= ~0xF;
4612f7ca802SSteve Glendinning 
4622f7ca802SSteve Glendinning 		if (netif_msg_link(dev))
4632f7ca802SSteve Glendinning 			devdbg(dev, "rx pause %s, tx pause %s",
4642f7ca802SSteve Glendinning 				(cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
4652f7ca802SSteve Glendinning 				(cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
4662f7ca802SSteve Glendinning 	} else {
4672f7ca802SSteve Glendinning 		if (netif_msg_link(dev))
4682f7ca802SSteve Glendinning 			devdbg(dev, "half duplex");
4692f7ca802SSteve Glendinning 		flow = 0;
4702f7ca802SSteve Glendinning 		afc_cfg |= 0xF;
4712f7ca802SSteve Glendinning 	}
4722f7ca802SSteve Glendinning 
4732f7ca802SSteve Glendinning 	smsc95xx_write_reg(dev, FLOW, flow);
4742f7ca802SSteve Glendinning 	smsc95xx_write_reg(dev,	AFC_CFG, afc_cfg);
4752f7ca802SSteve Glendinning }
4762f7ca802SSteve Glendinning 
4772f7ca802SSteve Glendinning static int smsc95xx_link_reset(struct usbnet *dev)
4782f7ca802SSteve Glendinning {
4792f7ca802SSteve Glendinning 	struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
4802f7ca802SSteve Glendinning 	struct mii_if_info *mii = &dev->mii;
4812f7ca802SSteve Glendinning 	struct ethtool_cmd ecmd;
4822f7ca802SSteve Glendinning 	unsigned long flags;
4832f7ca802SSteve Glendinning 	u16 lcladv, rmtadv;
4842f7ca802SSteve Glendinning 	u32 intdata;
4852f7ca802SSteve Glendinning 
4862f7ca802SSteve Glendinning 	/* clear interrupt status */
4872f7ca802SSteve Glendinning 	smsc95xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC);
4882f7ca802SSteve Glendinning 	intdata = 0xFFFFFFFF;
4892f7ca802SSteve Glendinning 	smsc95xx_write_reg(dev, INT_STS, intdata);
4902f7ca802SSteve Glendinning 
4912f7ca802SSteve Glendinning 	mii_check_media(mii, 1, 1);
4922f7ca802SSteve Glendinning 	mii_ethtool_gset(&dev->mii, &ecmd);
4932f7ca802SSteve Glendinning 	lcladv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE);
4942f7ca802SSteve Glendinning 	rmtadv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_LPA);
4952f7ca802SSteve Glendinning 
4962f7ca802SSteve Glendinning 	if (netif_msg_link(dev))
4972f7ca802SSteve Glendinning 		devdbg(dev, "speed: %d duplex: %d lcladv: %04x rmtadv: %04x",
4982f7ca802SSteve Glendinning 			ecmd.speed, ecmd.duplex, lcladv, rmtadv);
4992f7ca802SSteve Glendinning 
5002f7ca802SSteve Glendinning 	spin_lock_irqsave(&pdata->mac_cr_lock, flags);
5012f7ca802SSteve Glendinning 	if (ecmd.duplex != DUPLEX_FULL) {
5022f7ca802SSteve Glendinning 		pdata->mac_cr &= ~MAC_CR_FDPX_;
5032f7ca802SSteve Glendinning 		pdata->mac_cr |= MAC_CR_RCVOWN_;
5042f7ca802SSteve Glendinning 	} else {
5052f7ca802SSteve Glendinning 		pdata->mac_cr &= ~MAC_CR_RCVOWN_;
5062f7ca802SSteve Glendinning 		pdata->mac_cr |= MAC_CR_FDPX_;
5072f7ca802SSteve Glendinning 	}
5082f7ca802SSteve Glendinning 	spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
5092f7ca802SSteve Glendinning 
5102f7ca802SSteve Glendinning 	smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
5112f7ca802SSteve Glendinning 
5122f7ca802SSteve Glendinning 	smsc95xx_phy_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv);
5132f7ca802SSteve Glendinning 
5142f7ca802SSteve Glendinning 	return 0;
5152f7ca802SSteve Glendinning }
5162f7ca802SSteve Glendinning 
5172f7ca802SSteve Glendinning static void smsc95xx_status(struct usbnet *dev, struct urb *urb)
5182f7ca802SSteve Glendinning {
5192f7ca802SSteve Glendinning 	u32 intdata;
5202f7ca802SSteve Glendinning 
5212f7ca802SSteve Glendinning 	if (urb->actual_length != 4) {
5222f7ca802SSteve Glendinning 		devwarn(dev, "unexpected urb length %d", urb->actual_length);
5232f7ca802SSteve Glendinning 		return;
5242f7ca802SSteve Glendinning 	}
5252f7ca802SSteve Glendinning 
5262f7ca802SSteve Glendinning 	memcpy(&intdata, urb->transfer_buffer, 4);
5271d74a6bdSSteve Glendinning 	le32_to_cpus(&intdata);
5282f7ca802SSteve Glendinning 
5292f7ca802SSteve Glendinning 	if (netif_msg_link(dev))
5302f7ca802SSteve Glendinning 		devdbg(dev, "intdata: 0x%08X", intdata);
5312f7ca802SSteve Glendinning 
5322f7ca802SSteve Glendinning 	if (intdata & INT_ENP_PHY_INT_)
5332f7ca802SSteve Glendinning 		usbnet_defer_kevent(dev, EVENT_LINK_RESET);
5342f7ca802SSteve Glendinning 	else
5352f7ca802SSteve Glendinning 		devwarn(dev, "unexpected interrupt, intdata=0x%08X", intdata);
5362f7ca802SSteve Glendinning }
5372f7ca802SSteve Glendinning 
538f7b29271SSteve Glendinning /* Enable or disable Tx & Rx checksum offload engines */
539f7b29271SSteve Glendinning static int smsc95xx_set_csums(struct usbnet *dev)
5402f7ca802SSteve Glendinning {
541f7b29271SSteve Glendinning 	struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
5422f7ca802SSteve Glendinning 	u32 read_buf;
5432f7ca802SSteve Glendinning 	int ret = smsc95xx_read_reg(dev, COE_CR, &read_buf);
5442f7ca802SSteve Glendinning 	if (ret < 0) {
5452f7ca802SSteve Glendinning 		devwarn(dev, "Failed to read COE_CR: %d", ret);
5462f7ca802SSteve Glendinning 		return ret;
5472f7ca802SSteve Glendinning 	}
5482f7ca802SSteve Glendinning 
549f7b29271SSteve Glendinning 	if (pdata->use_tx_csum)
550f7b29271SSteve Glendinning 		read_buf |= Tx_COE_EN_;
551f7b29271SSteve Glendinning 	else
552f7b29271SSteve Glendinning 		read_buf &= ~Tx_COE_EN_;
553f7b29271SSteve Glendinning 
554f7b29271SSteve Glendinning 	if (pdata->use_rx_csum)
5552f7ca802SSteve Glendinning 		read_buf |= Rx_COE_EN_;
5562f7ca802SSteve Glendinning 	else
5572f7ca802SSteve Glendinning 		read_buf &= ~Rx_COE_EN_;
5582f7ca802SSteve Glendinning 
5592f7ca802SSteve Glendinning 	ret = smsc95xx_write_reg(dev, COE_CR, read_buf);
5602f7ca802SSteve Glendinning 	if (ret < 0) {
5612f7ca802SSteve Glendinning 		devwarn(dev, "Failed to write COE_CR: %d", ret);
5622f7ca802SSteve Glendinning 		return ret;
5632f7ca802SSteve Glendinning 	}
5642f7ca802SSteve Glendinning 
5652f7ca802SSteve Glendinning 	if (netif_msg_hw(dev))
5662f7ca802SSteve Glendinning 		devdbg(dev, "COE_CR = 0x%08x", read_buf);
5672f7ca802SSteve Glendinning 	return 0;
5682f7ca802SSteve Glendinning }
5692f7ca802SSteve Glendinning 
5702f7ca802SSteve Glendinning static int smsc95xx_ethtool_get_eeprom_len(struct net_device *net)
5712f7ca802SSteve Glendinning {
5722f7ca802SSteve Glendinning 	return MAX_EEPROM_SIZE;
5732f7ca802SSteve Glendinning }
5742f7ca802SSteve Glendinning 
5752f7ca802SSteve Glendinning static int smsc95xx_ethtool_get_eeprom(struct net_device *netdev,
5762f7ca802SSteve Glendinning 				       struct ethtool_eeprom *ee, u8 *data)
5772f7ca802SSteve Glendinning {
5782f7ca802SSteve Glendinning 	struct usbnet *dev = netdev_priv(netdev);
5792f7ca802SSteve Glendinning 
5802f7ca802SSteve Glendinning 	ee->magic = LAN95XX_EEPROM_MAGIC;
5812f7ca802SSteve Glendinning 
5822f7ca802SSteve Glendinning 	return smsc95xx_read_eeprom(dev, ee->offset, ee->len, data);
5832f7ca802SSteve Glendinning }
5842f7ca802SSteve Glendinning 
5852f7ca802SSteve Glendinning static int smsc95xx_ethtool_set_eeprom(struct net_device *netdev,
5862f7ca802SSteve Glendinning 				       struct ethtool_eeprom *ee, u8 *data)
5872f7ca802SSteve Glendinning {
5882f7ca802SSteve Glendinning 	struct usbnet *dev = netdev_priv(netdev);
5892f7ca802SSteve Glendinning 
5902f7ca802SSteve Glendinning 	if (ee->magic != LAN95XX_EEPROM_MAGIC) {
5912f7ca802SSteve Glendinning 		devwarn(dev, "EEPROM: magic value mismatch, magic = 0x%x",
5922f7ca802SSteve Glendinning 			ee->magic);
5932f7ca802SSteve Glendinning 		return -EINVAL;
5942f7ca802SSteve Glendinning 	}
5952f7ca802SSteve Glendinning 
5962f7ca802SSteve Glendinning 	return smsc95xx_write_eeprom(dev, ee->offset, ee->len, data);
5972f7ca802SSteve Glendinning }
5982f7ca802SSteve Glendinning 
5992f7ca802SSteve Glendinning static u32 smsc95xx_ethtool_get_rx_csum(struct net_device *netdev)
6002f7ca802SSteve Glendinning {
6012f7ca802SSteve Glendinning 	struct usbnet *dev = netdev_priv(netdev);
6022f7ca802SSteve Glendinning 	struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
6032f7ca802SSteve Glendinning 
6042f7ca802SSteve Glendinning 	return pdata->use_rx_csum;
6052f7ca802SSteve Glendinning }
6062f7ca802SSteve Glendinning 
6072f7ca802SSteve Glendinning static int smsc95xx_ethtool_set_rx_csum(struct net_device *netdev, u32 val)
6082f7ca802SSteve Glendinning {
6092f7ca802SSteve Glendinning 	struct usbnet *dev = netdev_priv(netdev);
6102f7ca802SSteve Glendinning 	struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
6112f7ca802SSteve Glendinning 
6122f7ca802SSteve Glendinning 	pdata->use_rx_csum = !!val;
6132f7ca802SSteve Glendinning 
614f7b29271SSteve Glendinning 	return smsc95xx_set_csums(dev);
615f7b29271SSteve Glendinning }
616f7b29271SSteve Glendinning 
617f7b29271SSteve Glendinning static u32 smsc95xx_ethtool_get_tx_csum(struct net_device *netdev)
618f7b29271SSteve Glendinning {
619f7b29271SSteve Glendinning 	struct usbnet *dev = netdev_priv(netdev);
620f7b29271SSteve Glendinning 	struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
621f7b29271SSteve Glendinning 
622f7b29271SSteve Glendinning 	return pdata->use_tx_csum;
623f7b29271SSteve Glendinning }
624f7b29271SSteve Glendinning 
625f7b29271SSteve Glendinning static int smsc95xx_ethtool_set_tx_csum(struct net_device *netdev, u32 val)
626f7b29271SSteve Glendinning {
627f7b29271SSteve Glendinning 	struct usbnet *dev = netdev_priv(netdev);
628f7b29271SSteve Glendinning 	struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
629f7b29271SSteve Glendinning 
630f7b29271SSteve Glendinning 	pdata->use_tx_csum = !!val;
631f7b29271SSteve Glendinning 
632f7b29271SSteve Glendinning 	ethtool_op_set_tx_hw_csum(netdev, pdata->use_tx_csum);
633f7b29271SSteve Glendinning 	return smsc95xx_set_csums(dev);
6342f7ca802SSteve Glendinning }
6352f7ca802SSteve Glendinning 
6362f7ca802SSteve Glendinning static struct ethtool_ops smsc95xx_ethtool_ops = {
6372f7ca802SSteve Glendinning 	.get_link	= usbnet_get_link,
6382f7ca802SSteve Glendinning 	.nway_reset	= usbnet_nway_reset,
6392f7ca802SSteve Glendinning 	.get_drvinfo	= usbnet_get_drvinfo,
6402f7ca802SSteve Glendinning 	.get_msglevel	= usbnet_get_msglevel,
6412f7ca802SSteve Glendinning 	.set_msglevel	= usbnet_set_msglevel,
6422f7ca802SSteve Glendinning 	.get_settings	= usbnet_get_settings,
6432f7ca802SSteve Glendinning 	.set_settings	= usbnet_set_settings,
6442f7ca802SSteve Glendinning 	.get_eeprom_len	= smsc95xx_ethtool_get_eeprom_len,
6452f7ca802SSteve Glendinning 	.get_eeprom	= smsc95xx_ethtool_get_eeprom,
6462f7ca802SSteve Glendinning 	.set_eeprom	= smsc95xx_ethtool_set_eeprom,
647f7b29271SSteve Glendinning 	.get_tx_csum	= smsc95xx_ethtool_get_tx_csum,
648f7b29271SSteve Glendinning 	.set_tx_csum	= smsc95xx_ethtool_set_tx_csum,
6492f7ca802SSteve Glendinning 	.get_rx_csum	= smsc95xx_ethtool_get_rx_csum,
6502f7ca802SSteve Glendinning 	.set_rx_csum	= smsc95xx_ethtool_set_rx_csum,
6512f7ca802SSteve Glendinning };
6522f7ca802SSteve Glendinning 
6532f7ca802SSteve Glendinning static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
6542f7ca802SSteve Glendinning {
6552f7ca802SSteve Glendinning 	struct usbnet *dev = netdev_priv(netdev);
6562f7ca802SSteve Glendinning 
6572f7ca802SSteve Glendinning 	if (!netif_running(netdev))
6582f7ca802SSteve Glendinning 		return -EINVAL;
6592f7ca802SSteve Glendinning 
6602f7ca802SSteve Glendinning 	return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
6612f7ca802SSteve Glendinning }
6622f7ca802SSteve Glendinning 
6632f7ca802SSteve Glendinning static void smsc95xx_init_mac_address(struct usbnet *dev)
6642f7ca802SSteve Glendinning {
6652f7ca802SSteve Glendinning 	/* try reading mac address from EEPROM */
6662f7ca802SSteve Glendinning 	if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
6672f7ca802SSteve Glendinning 			dev->net->dev_addr) == 0) {
6682f7ca802SSteve Glendinning 		if (is_valid_ether_addr(dev->net->dev_addr)) {
6692f7ca802SSteve Glendinning 			/* eeprom values are valid so use them */
6702f7ca802SSteve Glendinning 			if (netif_msg_ifup(dev))
6712f7ca802SSteve Glendinning 				devdbg(dev, "MAC address read from EEPROM");
6722f7ca802SSteve Glendinning 			return;
6732f7ca802SSteve Glendinning 		}
6742f7ca802SSteve Glendinning 	}
6752f7ca802SSteve Glendinning 
6762f7ca802SSteve Glendinning 	/* no eeprom, or eeprom values are invalid. generate random MAC */
6772f7ca802SSteve Glendinning 	random_ether_addr(dev->net->dev_addr);
6782f7ca802SSteve Glendinning 	if (netif_msg_ifup(dev))
6792f7ca802SSteve Glendinning 		devdbg(dev, "MAC address set to random_ether_addr");
6802f7ca802SSteve Glendinning }
6812f7ca802SSteve Glendinning 
6822f7ca802SSteve Glendinning static int smsc95xx_set_mac_address(struct usbnet *dev)
6832f7ca802SSteve Glendinning {
6842f7ca802SSteve Glendinning 	u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 |
6852f7ca802SSteve Glendinning 		dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24;
6862f7ca802SSteve Glendinning 	u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8;
6872f7ca802SSteve Glendinning 	int ret;
6882f7ca802SSteve Glendinning 
6892f7ca802SSteve Glendinning 	ret = smsc95xx_write_reg(dev, ADDRL, addr_lo);
6902f7ca802SSteve Glendinning 	if (ret < 0) {
6912f7ca802SSteve Glendinning 		devwarn(dev, "Failed to write ADDRL: %d", ret);
6922f7ca802SSteve Glendinning 		return ret;
6932f7ca802SSteve Glendinning 	}
6942f7ca802SSteve Glendinning 
6952f7ca802SSteve Glendinning 	ret = smsc95xx_write_reg(dev, ADDRH, addr_hi);
6962f7ca802SSteve Glendinning 	if (ret < 0) {
6972f7ca802SSteve Glendinning 		devwarn(dev, "Failed to write ADDRH: %d", ret);
6982f7ca802SSteve Glendinning 		return ret;
6992f7ca802SSteve Glendinning 	}
7002f7ca802SSteve Glendinning 
7012f7ca802SSteve Glendinning 	return 0;
7022f7ca802SSteve Glendinning }
7032f7ca802SSteve Glendinning 
7042f7ca802SSteve Glendinning /* starts the TX path */
7052f7ca802SSteve Glendinning static void smsc95xx_start_tx_path(struct usbnet *dev)
7062f7ca802SSteve Glendinning {
7072f7ca802SSteve Glendinning 	struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
7082f7ca802SSteve Glendinning 	unsigned long flags;
7092f7ca802SSteve Glendinning 	u32 reg_val;
7102f7ca802SSteve Glendinning 
7112f7ca802SSteve Glendinning 	/* Enable Tx at MAC */
7122f7ca802SSteve Glendinning 	spin_lock_irqsave(&pdata->mac_cr_lock, flags);
7132f7ca802SSteve Glendinning 	pdata->mac_cr |= MAC_CR_TXEN_;
7142f7ca802SSteve Glendinning 	spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
7152f7ca802SSteve Glendinning 
7162f7ca802SSteve Glendinning 	smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
7172f7ca802SSteve Glendinning 
7182f7ca802SSteve Glendinning 	/* Enable Tx at SCSRs */
7192f7ca802SSteve Glendinning 	reg_val = TX_CFG_ON_;
7202f7ca802SSteve Glendinning 	smsc95xx_write_reg(dev, TX_CFG, reg_val);
7212f7ca802SSteve Glendinning }
7222f7ca802SSteve Glendinning 
7232f7ca802SSteve Glendinning /* Starts the Receive path */
7242f7ca802SSteve Glendinning static void smsc95xx_start_rx_path(struct usbnet *dev)
7252f7ca802SSteve Glendinning {
7262f7ca802SSteve Glendinning 	struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
7272f7ca802SSteve Glendinning 	unsigned long flags;
7282f7ca802SSteve Glendinning 
7292f7ca802SSteve Glendinning 	spin_lock_irqsave(&pdata->mac_cr_lock, flags);
7302f7ca802SSteve Glendinning 	pdata->mac_cr |= MAC_CR_RXEN_;
7312f7ca802SSteve Glendinning 	spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
7322f7ca802SSteve Glendinning 
7332f7ca802SSteve Glendinning 	smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
7342f7ca802SSteve Glendinning }
7352f7ca802SSteve Glendinning 
7362f7ca802SSteve Glendinning static int smsc95xx_phy_initialize(struct usbnet *dev)
7372f7ca802SSteve Glendinning {
7382f7ca802SSteve Glendinning 	/* Initialize MII structure */
7392f7ca802SSteve Glendinning 	dev->mii.dev = dev->net;
7402f7ca802SSteve Glendinning 	dev->mii.mdio_read = smsc95xx_mdio_read;
7412f7ca802SSteve Glendinning 	dev->mii.mdio_write = smsc95xx_mdio_write;
7422f7ca802SSteve Glendinning 	dev->mii.phy_id_mask = 0x1f;
7432f7ca802SSteve Glendinning 	dev->mii.reg_num_mask = 0x1f;
7442f7ca802SSteve Glendinning 	dev->mii.phy_id = SMSC95XX_INTERNAL_PHY_ID;
7452f7ca802SSteve Glendinning 
7462f7ca802SSteve Glendinning 	smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
7472f7ca802SSteve Glendinning 	smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
7482f7ca802SSteve Glendinning 		ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
7492f7ca802SSteve Glendinning 		ADVERTISE_PAUSE_ASYM);
7502f7ca802SSteve Glendinning 
7512f7ca802SSteve Glendinning 	/* read to clear */
7522f7ca802SSteve Glendinning 	smsc95xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC);
7532f7ca802SSteve Glendinning 
7542f7ca802SSteve Glendinning 	smsc95xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK,
7552f7ca802SSteve Glendinning 		PHY_INT_MASK_DEFAULT_);
7562f7ca802SSteve Glendinning 	mii_nway_restart(&dev->mii);
7572f7ca802SSteve Glendinning 
7582f7ca802SSteve Glendinning 	if (netif_msg_ifup(dev))
7592f7ca802SSteve Glendinning 		devdbg(dev, "phy initialised succesfully");
7602f7ca802SSteve Glendinning 	return 0;
7612f7ca802SSteve Glendinning }
7622f7ca802SSteve Glendinning 
7632f7ca802SSteve Glendinning static int smsc95xx_reset(struct usbnet *dev)
7642f7ca802SSteve Glendinning {
7652f7ca802SSteve Glendinning 	struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
766f7b29271SSteve Glendinning 	struct net_device *netdev = dev->net;
7672f7ca802SSteve Glendinning 	u32 read_buf, write_buf, burst_cap;
7682f7ca802SSteve Glendinning 	int ret = 0, timeout;
7692f7ca802SSteve Glendinning 
7702f7ca802SSteve Glendinning 	if (netif_msg_ifup(dev))
7712f7ca802SSteve Glendinning 		devdbg(dev, "entering smsc95xx_reset");
7722f7ca802SSteve Glendinning 
7732f7ca802SSteve Glendinning 	write_buf = HW_CFG_LRST_;
7742f7ca802SSteve Glendinning 	ret = smsc95xx_write_reg(dev, HW_CFG, write_buf);
7752f7ca802SSteve Glendinning 	if (ret < 0) {
7762f7ca802SSteve Glendinning 		devwarn(dev, "Failed to write HW_CFG_LRST_ bit in HW_CFG "
7772f7ca802SSteve Glendinning 			"register, ret = %d", ret);
7782f7ca802SSteve Glendinning 		return ret;
7792f7ca802SSteve Glendinning 	}
7802f7ca802SSteve Glendinning 
7812f7ca802SSteve Glendinning 	timeout = 0;
7822f7ca802SSteve Glendinning 	do {
7832f7ca802SSteve Glendinning 		ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
7842f7ca802SSteve Glendinning 		if (ret < 0) {
7852f7ca802SSteve Glendinning 			devwarn(dev, "Failed to read HW_CFG: %d", ret);
7862f7ca802SSteve Glendinning 			return ret;
7872f7ca802SSteve Glendinning 		}
7882f7ca802SSteve Glendinning 		msleep(10);
7892f7ca802SSteve Glendinning 		timeout++;
7902f7ca802SSteve Glendinning 	} while ((read_buf & HW_CFG_LRST_) && (timeout < 100));
7912f7ca802SSteve Glendinning 
7922f7ca802SSteve Glendinning 	if (timeout >= 100) {
7932f7ca802SSteve Glendinning 		devwarn(dev, "timeout waiting for completion of Lite Reset");
7942f7ca802SSteve Glendinning 		return ret;
7952f7ca802SSteve Glendinning 	}
7962f7ca802SSteve Glendinning 
7972f7ca802SSteve Glendinning 	write_buf = PM_CTL_PHY_RST_;
7982f7ca802SSteve Glendinning 	ret = smsc95xx_write_reg(dev, PM_CTRL, write_buf);
7992f7ca802SSteve Glendinning 	if (ret < 0) {
8002f7ca802SSteve Glendinning 		devwarn(dev, "Failed to write PM_CTRL: %d", ret);
8012f7ca802SSteve Glendinning 		return ret;
8022f7ca802SSteve Glendinning 	}
8032f7ca802SSteve Glendinning 
8042f7ca802SSteve Glendinning 	timeout = 0;
8052f7ca802SSteve Glendinning 	do {
8062f7ca802SSteve Glendinning 		ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf);
8072f7ca802SSteve Glendinning 		if (ret < 0) {
8082f7ca802SSteve Glendinning 			devwarn(dev, "Failed to read PM_CTRL: %d", ret);
8092f7ca802SSteve Glendinning 			return ret;
8102f7ca802SSteve Glendinning 		}
8112f7ca802SSteve Glendinning 		msleep(10);
8122f7ca802SSteve Glendinning 		timeout++;
8132f7ca802SSteve Glendinning 	} while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100));
8142f7ca802SSteve Glendinning 
8152f7ca802SSteve Glendinning 	if (timeout >= 100) {
8162f7ca802SSteve Glendinning 		devwarn(dev, "timeout waiting for PHY Reset");
8172f7ca802SSteve Glendinning 		return ret;
8182f7ca802SSteve Glendinning 	}
8192f7ca802SSteve Glendinning 
8202f7ca802SSteve Glendinning 	smsc95xx_init_mac_address(dev);
8212f7ca802SSteve Glendinning 
8222f7ca802SSteve Glendinning 	ret = smsc95xx_set_mac_address(dev);
8232f7ca802SSteve Glendinning 	if (ret < 0)
8242f7ca802SSteve Glendinning 		return ret;
8252f7ca802SSteve Glendinning 
8262f7ca802SSteve Glendinning 	if (netif_msg_ifup(dev))
827e174961cSJohannes Berg 		devdbg(dev, "MAC Address: %pM", dev->net->dev_addr);
8282f7ca802SSteve Glendinning 
8292f7ca802SSteve Glendinning 	ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
8302f7ca802SSteve Glendinning 	if (ret < 0) {
8312f7ca802SSteve Glendinning 		devwarn(dev, "Failed to read HW_CFG: %d", ret);
8322f7ca802SSteve Glendinning 		return ret;
8332f7ca802SSteve Glendinning 	}
8342f7ca802SSteve Glendinning 
8352f7ca802SSteve Glendinning 	if (netif_msg_ifup(dev))
8362f7ca802SSteve Glendinning 		devdbg(dev, "Read Value from HW_CFG : 0x%08x", read_buf);
8372f7ca802SSteve Glendinning 
8382f7ca802SSteve Glendinning 	read_buf |= HW_CFG_BIR_;
8392f7ca802SSteve Glendinning 
8402f7ca802SSteve Glendinning 	ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
8412f7ca802SSteve Glendinning 	if (ret < 0) {
8422f7ca802SSteve Glendinning 		devwarn(dev, "Failed to write HW_CFG_BIR_ bit in HW_CFG "
8432f7ca802SSteve Glendinning 			"register, ret = %d", ret);
8442f7ca802SSteve Glendinning 		return ret;
8452f7ca802SSteve Glendinning 	}
8462f7ca802SSteve Glendinning 
8472f7ca802SSteve Glendinning 	ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
8482f7ca802SSteve Glendinning 	if (ret < 0) {
8492f7ca802SSteve Glendinning 		devwarn(dev, "Failed to read HW_CFG: %d", ret);
8502f7ca802SSteve Glendinning 		return ret;
8512f7ca802SSteve Glendinning 	}
8522f7ca802SSteve Glendinning 	if (netif_msg_ifup(dev))
8532f7ca802SSteve Glendinning 		devdbg(dev, "Read Value from HW_CFG after writing "
8542f7ca802SSteve Glendinning 			"HW_CFG_BIR_: 0x%08x", read_buf);
8552f7ca802SSteve Glendinning 
8562f7ca802SSteve Glendinning 	if (!turbo_mode) {
8572f7ca802SSteve Glendinning 		burst_cap = 0;
8582f7ca802SSteve Glendinning 		dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
8592f7ca802SSteve Glendinning 	} else if (dev->udev->speed == USB_SPEED_HIGH) {
8602f7ca802SSteve Glendinning 		burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
8612f7ca802SSteve Glendinning 		dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
8622f7ca802SSteve Glendinning 	} else {
8632f7ca802SSteve Glendinning 		burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
8642f7ca802SSteve Glendinning 		dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
8652f7ca802SSteve Glendinning 	}
8662f7ca802SSteve Glendinning 
8672f7ca802SSteve Glendinning 	if (netif_msg_ifup(dev))
8682f7ca802SSteve Glendinning 		devdbg(dev, "rx_urb_size=%ld", (ulong)dev->rx_urb_size);
8692f7ca802SSteve Glendinning 
8702f7ca802SSteve Glendinning 	ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap);
8712f7ca802SSteve Glendinning 	if (ret < 0) {
8722f7ca802SSteve Glendinning 		devwarn(dev, "Failed to write BURST_CAP: %d", ret);
8732f7ca802SSteve Glendinning 		return ret;
8742f7ca802SSteve Glendinning 	}
8752f7ca802SSteve Glendinning 
8762f7ca802SSteve Glendinning 	ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf);
8772f7ca802SSteve Glendinning 	if (ret < 0) {
8782f7ca802SSteve Glendinning 		devwarn(dev, "Failed to read BURST_CAP: %d", ret);
8792f7ca802SSteve Glendinning 		return ret;
8802f7ca802SSteve Glendinning 	}
8812f7ca802SSteve Glendinning 	if (netif_msg_ifup(dev))
8822f7ca802SSteve Glendinning 		devdbg(dev, "Read Value from BURST_CAP after writing: 0x%08x",
8832f7ca802SSteve Glendinning 			read_buf);
8842f7ca802SSteve Glendinning 
8852f7ca802SSteve Glendinning 	read_buf = DEFAULT_BULK_IN_DELAY;
8862f7ca802SSteve Glendinning 	ret = smsc95xx_write_reg(dev, BULK_IN_DLY, read_buf);
8872f7ca802SSteve Glendinning 	if (ret < 0) {
8882f7ca802SSteve Glendinning 		devwarn(dev, "ret = %d", ret);
8892f7ca802SSteve Glendinning 		return ret;
8902f7ca802SSteve Glendinning 	}
8912f7ca802SSteve Glendinning 
8922f7ca802SSteve Glendinning 	ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf);
8932f7ca802SSteve Glendinning 	if (ret < 0) {
8942f7ca802SSteve Glendinning 		devwarn(dev, "Failed to read BULK_IN_DLY: %d", ret);
8952f7ca802SSteve Glendinning 		return ret;
8962f7ca802SSteve Glendinning 	}
8972f7ca802SSteve Glendinning 	if (netif_msg_ifup(dev))
8982f7ca802SSteve Glendinning 		devdbg(dev, "Read Value from BULK_IN_DLY after writing: "
8992f7ca802SSteve Glendinning 			"0x%08x", read_buf);
9002f7ca802SSteve Glendinning 
9012f7ca802SSteve Glendinning 	ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
9022f7ca802SSteve Glendinning 	if (ret < 0) {
9032f7ca802SSteve Glendinning 		devwarn(dev, "Failed to read HW_CFG: %d", ret);
9042f7ca802SSteve Glendinning 		return ret;
9052f7ca802SSteve Glendinning 	}
9062f7ca802SSteve Glendinning 	if (netif_msg_ifup(dev))
9072f7ca802SSteve Glendinning 		devdbg(dev, "Read Value from HW_CFG: 0x%08x", read_buf);
9082f7ca802SSteve Glendinning 
9092f7ca802SSteve Glendinning 	if (turbo_mode)
9102f7ca802SSteve Glendinning 		read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_);
9112f7ca802SSteve Glendinning 
9122f7ca802SSteve Glendinning 	read_buf &= ~HW_CFG_RXDOFF_;
9132f7ca802SSteve Glendinning 
9142f7ca802SSteve Glendinning 	/* set Rx data offset=2, Make IP header aligns on word boundary. */
9152f7ca802SSteve Glendinning 	read_buf |= NET_IP_ALIGN << 9;
9162f7ca802SSteve Glendinning 
9172f7ca802SSteve Glendinning 	ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
9182f7ca802SSteve Glendinning 	if (ret < 0) {
9192f7ca802SSteve Glendinning 		devwarn(dev, "Failed to write HW_CFG register, ret=%d", ret);
9202f7ca802SSteve Glendinning 		return ret;
9212f7ca802SSteve Glendinning 	}
9222f7ca802SSteve Glendinning 
9232f7ca802SSteve Glendinning 	ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
9242f7ca802SSteve Glendinning 	if (ret < 0) {
9252f7ca802SSteve Glendinning 		devwarn(dev, "Failed to read HW_CFG: %d", ret);
9262f7ca802SSteve Glendinning 		return ret;
9272f7ca802SSteve Glendinning 	}
9282f7ca802SSteve Glendinning 	if (netif_msg_ifup(dev))
9292f7ca802SSteve Glendinning 		devdbg(dev, "Read Value from HW_CFG after writing: 0x%08x",
9302f7ca802SSteve Glendinning 			read_buf);
9312f7ca802SSteve Glendinning 
9322f7ca802SSteve Glendinning 	write_buf = 0xFFFFFFFF;
9332f7ca802SSteve Glendinning 	ret = smsc95xx_write_reg(dev, INT_STS, write_buf);
9342f7ca802SSteve Glendinning 	if (ret < 0) {
9352f7ca802SSteve Glendinning 		devwarn(dev, "Failed to write INT_STS register, ret=%d", ret);
9362f7ca802SSteve Glendinning 		return ret;
9372f7ca802SSteve Glendinning 	}
9382f7ca802SSteve Glendinning 
9392f7ca802SSteve Glendinning 	ret = smsc95xx_read_reg(dev, ID_REV, &read_buf);
9402f7ca802SSteve Glendinning 	if (ret < 0) {
9412f7ca802SSteve Glendinning 		devwarn(dev, "Failed to read ID_REV: %d", ret);
9422f7ca802SSteve Glendinning 		return ret;
9432f7ca802SSteve Glendinning 	}
9442f7ca802SSteve Glendinning 	if (netif_msg_ifup(dev))
9452f7ca802SSteve Glendinning 		devdbg(dev, "ID_REV = 0x%08x", read_buf);
9462f7ca802SSteve Glendinning 
9472f7ca802SSteve Glendinning 	/* Init Tx */
9482f7ca802SSteve Glendinning 	write_buf = 0;
9492f7ca802SSteve Glendinning 	ret = smsc95xx_write_reg(dev, FLOW, write_buf);
9502f7ca802SSteve Glendinning 	if (ret < 0) {
9512f7ca802SSteve Glendinning 		devwarn(dev, "Failed to write FLOW: %d", ret);
9522f7ca802SSteve Glendinning 		return ret;
9532f7ca802SSteve Glendinning 	}
9542f7ca802SSteve Glendinning 
9552f7ca802SSteve Glendinning 	read_buf = AFC_CFG_DEFAULT;
9562f7ca802SSteve Glendinning 	ret = smsc95xx_write_reg(dev, AFC_CFG, read_buf);
9572f7ca802SSteve Glendinning 	if (ret < 0) {
9582f7ca802SSteve Glendinning 		devwarn(dev, "Failed to write AFC_CFG: %d", ret);
9592f7ca802SSteve Glendinning 		return ret;
9602f7ca802SSteve Glendinning 	}
9612f7ca802SSteve Glendinning 
9622f7ca802SSteve Glendinning 	/* Don't need mac_cr_lock during initialisation */
9632f7ca802SSteve Glendinning 	ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr);
9642f7ca802SSteve Glendinning 	if (ret < 0) {
9652f7ca802SSteve Glendinning 		devwarn(dev, "Failed to read MAC_CR: %d", ret);
9662f7ca802SSteve Glendinning 		return ret;
9672f7ca802SSteve Glendinning 	}
9682f7ca802SSteve Glendinning 
9692f7ca802SSteve Glendinning 	/* Init Rx */
9702f7ca802SSteve Glendinning 	/* Set Vlan */
9712f7ca802SSteve Glendinning 	write_buf = (u32)ETH_P_8021Q;
9722f7ca802SSteve Glendinning 	ret = smsc95xx_write_reg(dev, VLAN1, write_buf);
9732f7ca802SSteve Glendinning 	if (ret < 0) {
9742f7ca802SSteve Glendinning 		devwarn(dev, "Failed to write VAN1: %d", ret);
9752f7ca802SSteve Glendinning 		return ret;
9762f7ca802SSteve Glendinning 	}
9772f7ca802SSteve Glendinning 
978f7b29271SSteve Glendinning 	/* Enable or disable checksum offload engines */
979f7b29271SSteve Glendinning 	ethtool_op_set_tx_hw_csum(netdev, pdata->use_tx_csum);
980f7b29271SSteve Glendinning 	ret = smsc95xx_set_csums(dev);
9812f7ca802SSteve Glendinning 	if (ret < 0) {
982f7b29271SSteve Glendinning 		devwarn(dev, "Failed to set csum offload: %d", ret);
9832f7ca802SSteve Glendinning 		return ret;
9842f7ca802SSteve Glendinning 	}
9852f7ca802SSteve Glendinning 
9862f7ca802SSteve Glendinning 	smsc95xx_set_multicast(dev->net);
9872f7ca802SSteve Glendinning 
9882f7ca802SSteve Glendinning 	if (smsc95xx_phy_initialize(dev) < 0)
9892f7ca802SSteve Glendinning 		return -EIO;
9902f7ca802SSteve Glendinning 
9912f7ca802SSteve Glendinning 	ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf);
9922f7ca802SSteve Glendinning 	if (ret < 0) {
9932f7ca802SSteve Glendinning 		devwarn(dev, "Failed to read INT_EP_CTL: %d", ret);
9942f7ca802SSteve Glendinning 		return ret;
9952f7ca802SSteve Glendinning 	}
9962f7ca802SSteve Glendinning 
9972f7ca802SSteve Glendinning 	/* enable PHY interrupts */
9982f7ca802SSteve Glendinning 	read_buf |= INT_EP_CTL_PHY_INT_;
9992f7ca802SSteve Glendinning 
10002f7ca802SSteve Glendinning 	ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf);
10012f7ca802SSteve Glendinning 	if (ret < 0) {
10022f7ca802SSteve Glendinning 		devwarn(dev, "Failed to write INT_EP_CTL: %d", ret);
10032f7ca802SSteve Glendinning 		return ret;
10042f7ca802SSteve Glendinning 	}
10052f7ca802SSteve Glendinning 
10062f7ca802SSteve Glendinning 	smsc95xx_start_tx_path(dev);
10072f7ca802SSteve Glendinning 	smsc95xx_start_rx_path(dev);
10082f7ca802SSteve Glendinning 
10092f7ca802SSteve Glendinning 	if (netif_msg_ifup(dev))
10102f7ca802SSteve Glendinning 		devdbg(dev, "smsc95xx_reset, return 0");
10112f7ca802SSteve Glendinning 	return 0;
10122f7ca802SSteve Glendinning }
10132f7ca802SSteve Glendinning 
10142f7ca802SSteve Glendinning static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf)
10152f7ca802SSteve Glendinning {
10162f7ca802SSteve Glendinning 	struct smsc95xx_priv *pdata = NULL;
10172f7ca802SSteve Glendinning 	int ret;
10182f7ca802SSteve Glendinning 
10192f7ca802SSteve Glendinning 	printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n");
10202f7ca802SSteve Glendinning 
10212f7ca802SSteve Glendinning 	ret = usbnet_get_endpoints(dev, intf);
10222f7ca802SSteve Glendinning 	if (ret < 0) {
10232f7ca802SSteve Glendinning 		devwarn(dev, "usbnet_get_endpoints failed: %d", ret);
10242f7ca802SSteve Glendinning 		return ret;
10252f7ca802SSteve Glendinning 	}
10262f7ca802SSteve Glendinning 
10272f7ca802SSteve Glendinning 	dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc95xx_priv),
10282f7ca802SSteve Glendinning 		GFP_KERNEL);
10292f7ca802SSteve Glendinning 
10302f7ca802SSteve Glendinning 	pdata = (struct smsc95xx_priv *)(dev->data[0]);
10312f7ca802SSteve Glendinning 	if (!pdata) {
10322f7ca802SSteve Glendinning 		devwarn(dev, "Unable to allocate struct smsc95xx_priv");
10332f7ca802SSteve Glendinning 		return -ENOMEM;
10342f7ca802SSteve Glendinning 	}
10352f7ca802SSteve Glendinning 
10362f7ca802SSteve Glendinning 	spin_lock_init(&pdata->mac_cr_lock);
10372f7ca802SSteve Glendinning 
1038f7b29271SSteve Glendinning 	pdata->use_tx_csum = DEFAULT_TX_CSUM_ENABLE;
10392f7ca802SSteve Glendinning 	pdata->use_rx_csum = DEFAULT_RX_CSUM_ENABLE;
10402f7ca802SSteve Glendinning 
10412f7ca802SSteve Glendinning 	/* Init all registers */
10422f7ca802SSteve Glendinning 	ret = smsc95xx_reset(dev);
10432f7ca802SSteve Glendinning 
10442f7ca802SSteve Glendinning 	dev->net->do_ioctl = smsc95xx_ioctl;
10452f7ca802SSteve Glendinning 	dev->net->ethtool_ops = &smsc95xx_ethtool_ops;
10462f7ca802SSteve Glendinning 	dev->net->set_multicast_list = smsc95xx_set_multicast;
10472f7ca802SSteve Glendinning 	dev->net->flags |= IFF_MULTICAST;
10482f7ca802SSteve Glendinning 	dev->net->hard_header_len += SMSC95XX_TX_OVERHEAD;
10492f7ca802SSteve Glendinning 	return 0;
10502f7ca802SSteve Glendinning }
10512f7ca802SSteve Glendinning 
10522f7ca802SSteve Glendinning static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf)
10532f7ca802SSteve Glendinning {
10542f7ca802SSteve Glendinning 	struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
10552f7ca802SSteve Glendinning 	if (pdata) {
10562f7ca802SSteve Glendinning 		if (netif_msg_ifdown(dev))
10572f7ca802SSteve Glendinning 			devdbg(dev, "free pdata");
10582f7ca802SSteve Glendinning 		kfree(pdata);
10592f7ca802SSteve Glendinning 		pdata = NULL;
10602f7ca802SSteve Glendinning 		dev->data[0] = 0;
10612f7ca802SSteve Glendinning 	}
10622f7ca802SSteve Glendinning }
10632f7ca802SSteve Glendinning 
10642f7ca802SSteve Glendinning static void smsc95xx_rx_csum_offload(struct sk_buff *skb)
10652f7ca802SSteve Glendinning {
10662f7ca802SSteve Glendinning 	skb->csum = *(u16 *)(skb_tail_pointer(skb) - 2);
10672f7ca802SSteve Glendinning 	skb->ip_summed = CHECKSUM_COMPLETE;
10682f7ca802SSteve Glendinning 	skb_trim(skb, skb->len - 2);
10692f7ca802SSteve Glendinning }
10702f7ca802SSteve Glendinning 
10712f7ca802SSteve Glendinning static int smsc95xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
10722f7ca802SSteve Glendinning {
10732f7ca802SSteve Glendinning 	struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
10742f7ca802SSteve Glendinning 
10752f7ca802SSteve Glendinning 	while (skb->len > 0) {
10762f7ca802SSteve Glendinning 		u32 header, align_count;
10772f7ca802SSteve Glendinning 		struct sk_buff *ax_skb;
10782f7ca802SSteve Glendinning 		unsigned char *packet;
10792f7ca802SSteve Glendinning 		u16 size;
10802f7ca802SSteve Glendinning 
10812f7ca802SSteve Glendinning 		memcpy(&header, skb->data, sizeof(header));
10822f7ca802SSteve Glendinning 		le32_to_cpus(&header);
10832f7ca802SSteve Glendinning 		skb_pull(skb, 4 + NET_IP_ALIGN);
10842f7ca802SSteve Glendinning 		packet = skb->data;
10852f7ca802SSteve Glendinning 
10862f7ca802SSteve Glendinning 		/* get the packet length */
10872f7ca802SSteve Glendinning 		size = (u16)((header & RX_STS_FL_) >> 16);
10882f7ca802SSteve Glendinning 		align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4;
10892f7ca802SSteve Glendinning 
10902f7ca802SSteve Glendinning 		if (unlikely(header & RX_STS_ES_)) {
10912f7ca802SSteve Glendinning 			if (netif_msg_rx_err(dev))
10922f7ca802SSteve Glendinning 				devdbg(dev, "Error header=0x%08x", header);
10932f7ca802SSteve Glendinning 			dev->stats.rx_errors++;
10942f7ca802SSteve Glendinning 			dev->stats.rx_dropped++;
10952f7ca802SSteve Glendinning 
10962f7ca802SSteve Glendinning 			if (header & RX_STS_CRC_) {
10972f7ca802SSteve Glendinning 				dev->stats.rx_crc_errors++;
10982f7ca802SSteve Glendinning 			} else {
10992f7ca802SSteve Glendinning 				if (header & (RX_STS_TL_ | RX_STS_RF_))
11002f7ca802SSteve Glendinning 					dev->stats.rx_frame_errors++;
11012f7ca802SSteve Glendinning 
11022f7ca802SSteve Glendinning 				if ((header & RX_STS_LE_) &&
11032f7ca802SSteve Glendinning 					(!(header & RX_STS_FT_)))
11042f7ca802SSteve Glendinning 					dev->stats.rx_length_errors++;
11052f7ca802SSteve Glendinning 			}
11062f7ca802SSteve Glendinning 		} else {
11072f7ca802SSteve Glendinning 			/* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */
11082f7ca802SSteve Glendinning 			if (unlikely(size > (ETH_FRAME_LEN + 12))) {
11092f7ca802SSteve Glendinning 				if (netif_msg_rx_err(dev))
11102f7ca802SSteve Glendinning 					devdbg(dev, "size err header=0x%08x",
11112f7ca802SSteve Glendinning 						header);
11122f7ca802SSteve Glendinning 				return 0;
11132f7ca802SSteve Glendinning 			}
11142f7ca802SSteve Glendinning 
11152f7ca802SSteve Glendinning 			/* last frame in this batch */
11162f7ca802SSteve Glendinning 			if (skb->len == size) {
11172f7ca802SSteve Glendinning 				if (pdata->use_rx_csum)
11182f7ca802SSteve Glendinning 					smsc95xx_rx_csum_offload(skb);
11192f7ca802SSteve Glendinning 
11202f7ca802SSteve Glendinning 				skb->truesize = size + sizeof(struct sk_buff);
11212f7ca802SSteve Glendinning 
11222f7ca802SSteve Glendinning 				return 1;
11232f7ca802SSteve Glendinning 			}
11242f7ca802SSteve Glendinning 
11252f7ca802SSteve Glendinning 			ax_skb = skb_clone(skb, GFP_ATOMIC);
11262f7ca802SSteve Glendinning 			if (unlikely(!ax_skb)) {
11272f7ca802SSteve Glendinning 				devwarn(dev, "Error allocating skb");
11282f7ca802SSteve Glendinning 				return 0;
11292f7ca802SSteve Glendinning 			}
11302f7ca802SSteve Glendinning 
11312f7ca802SSteve Glendinning 			ax_skb->len = size;
11322f7ca802SSteve Glendinning 			ax_skb->data = packet;
11332f7ca802SSteve Glendinning 			skb_set_tail_pointer(ax_skb, size);
11342f7ca802SSteve Glendinning 
11352f7ca802SSteve Glendinning 			if (pdata->use_rx_csum)
11362f7ca802SSteve Glendinning 				smsc95xx_rx_csum_offload(ax_skb);
11372f7ca802SSteve Glendinning 
11382f7ca802SSteve Glendinning 			ax_skb->truesize = size + sizeof(struct sk_buff);
11392f7ca802SSteve Glendinning 
11402f7ca802SSteve Glendinning 			usbnet_skb_return(dev, ax_skb);
11412f7ca802SSteve Glendinning 		}
11422f7ca802SSteve Glendinning 
11432f7ca802SSteve Glendinning 		skb_pull(skb, size);
11442f7ca802SSteve Glendinning 
11452f7ca802SSteve Glendinning 		/* padding bytes before the next frame starts */
11462f7ca802SSteve Glendinning 		if (skb->len)
11472f7ca802SSteve Glendinning 			skb_pull(skb, align_count);
11482f7ca802SSteve Glendinning 	}
11492f7ca802SSteve Glendinning 
11502f7ca802SSteve Glendinning 	if (unlikely(skb->len < 0)) {
11512f7ca802SSteve Glendinning 		devwarn(dev, "invalid rx length<0 %d", skb->len);
11522f7ca802SSteve Glendinning 		return 0;
11532f7ca802SSteve Glendinning 	}
11542f7ca802SSteve Glendinning 
11552f7ca802SSteve Glendinning 	return 1;
11562f7ca802SSteve Glendinning }
11572f7ca802SSteve Glendinning 
1158f7b29271SSteve Glendinning static u32 smsc95xx_calc_csum_preamble(struct sk_buff *skb)
1159f7b29271SSteve Glendinning {
1160f7b29271SSteve Glendinning 	int len = skb->data - skb->head;
1161f7b29271SSteve Glendinning 	u16 high_16 = (u16)(skb->csum_offset + skb->csum_start - len);
1162f7b29271SSteve Glendinning 	u16 low_16 = (u16)(skb->csum_start - len);
1163f7b29271SSteve Glendinning 	return (high_16 << 16) | low_16;
1164f7b29271SSteve Glendinning }
1165f7b29271SSteve Glendinning 
11662f7ca802SSteve Glendinning static struct sk_buff *smsc95xx_tx_fixup(struct usbnet *dev,
11672f7ca802SSteve Glendinning 					 struct sk_buff *skb, gfp_t flags)
11682f7ca802SSteve Glendinning {
1169f7b29271SSteve Glendinning 	struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1170f7b29271SSteve Glendinning 	bool csum = pdata->use_tx_csum && (skb->ip_summed == CHECKSUM_PARTIAL);
1171f7b29271SSteve Glendinning 	int overhead = csum ? SMSC95XX_TX_OVERHEAD_CSUM : SMSC95XX_TX_OVERHEAD;
11722f7ca802SSteve Glendinning 	u32 tx_cmd_a, tx_cmd_b;
11732f7ca802SSteve Glendinning 
1174f7b29271SSteve Glendinning 	/* We do not advertise SG, so skbs should be already linearized */
1175f7b29271SSteve Glendinning 	BUG_ON(skb_shinfo(skb)->nr_frags);
1176f7b29271SSteve Glendinning 
1177f7b29271SSteve Glendinning 	if (skb_headroom(skb) < overhead) {
11782f7ca802SSteve Glendinning 		struct sk_buff *skb2 = skb_copy_expand(skb,
1179f7b29271SSteve Glendinning 			overhead, 0, flags);
11802f7ca802SSteve Glendinning 		dev_kfree_skb_any(skb);
11812f7ca802SSteve Glendinning 		skb = skb2;
11822f7ca802SSteve Glendinning 		if (!skb)
11832f7ca802SSteve Glendinning 			return NULL;
11842f7ca802SSteve Glendinning 	}
11852f7ca802SSteve Glendinning 
1186f7b29271SSteve Glendinning 	if (csum) {
1187f7b29271SSteve Glendinning 		u32 csum_preamble = smsc95xx_calc_csum_preamble(skb);
1188f7b29271SSteve Glendinning 		skb_push(skb, 4);
1189f7b29271SSteve Glendinning 		memcpy(skb->data, &csum_preamble, 4);
1190f7b29271SSteve Glendinning 	}
1191f7b29271SSteve Glendinning 
11922f7ca802SSteve Glendinning 	skb_push(skb, 4);
11932f7ca802SSteve Glendinning 	tx_cmd_b = (u32)(skb->len - 4);
1194f7b29271SSteve Glendinning 	if (csum)
1195f7b29271SSteve Glendinning 		tx_cmd_b |= TX_CMD_B_CSUM_ENABLE;
11962f7ca802SSteve Glendinning 	cpu_to_le32s(&tx_cmd_b);
11972f7ca802SSteve Glendinning 	memcpy(skb->data, &tx_cmd_b, 4);
11982f7ca802SSteve Glendinning 
11992f7ca802SSteve Glendinning 	skb_push(skb, 4);
12002f7ca802SSteve Glendinning 	tx_cmd_a = (u32)(skb->len - 8) | TX_CMD_A_FIRST_SEG_ |
12012f7ca802SSteve Glendinning 		TX_CMD_A_LAST_SEG_;
12022f7ca802SSteve Glendinning 	cpu_to_le32s(&tx_cmd_a);
12032f7ca802SSteve Glendinning 	memcpy(skb->data, &tx_cmd_a, 4);
12042f7ca802SSteve Glendinning 
12052f7ca802SSteve Glendinning 	return skb;
12062f7ca802SSteve Glendinning }
12072f7ca802SSteve Glendinning 
12082f7ca802SSteve Glendinning static const struct driver_info smsc95xx_info = {
12092f7ca802SSteve Glendinning 	.description	= "smsc95xx USB 2.0 Ethernet",
12102f7ca802SSteve Glendinning 	.bind		= smsc95xx_bind,
12112f7ca802SSteve Glendinning 	.unbind		= smsc95xx_unbind,
12122f7ca802SSteve Glendinning 	.link_reset	= smsc95xx_link_reset,
12132f7ca802SSteve Glendinning 	.reset		= smsc95xx_reset,
12142f7ca802SSteve Glendinning 	.rx_fixup	= smsc95xx_rx_fixup,
12152f7ca802SSteve Glendinning 	.tx_fixup	= smsc95xx_tx_fixup,
12162f7ca802SSteve Glendinning 	.status		= smsc95xx_status,
12172f7ca802SSteve Glendinning 	.flags		= FLAG_ETHER,
12182f7ca802SSteve Glendinning };
12192f7ca802SSteve Glendinning 
12202f7ca802SSteve Glendinning static const struct usb_device_id products[] = {
12212f7ca802SSteve Glendinning 	{
12222f7ca802SSteve Glendinning 		/* SMSC9500 USB Ethernet Device */
12232f7ca802SSteve Glendinning 		USB_DEVICE(0x0424, 0x9500),
12242f7ca802SSteve Glendinning 		.driver_info = (unsigned long) &smsc95xx_info,
12252f7ca802SSteve Glendinning 	},
12262f7ca802SSteve Glendinning 	{ },		/* END */
12272f7ca802SSteve Glendinning };
12282f7ca802SSteve Glendinning MODULE_DEVICE_TABLE(usb, products);
12292f7ca802SSteve Glendinning 
12302f7ca802SSteve Glendinning static struct usb_driver smsc95xx_driver = {
12312f7ca802SSteve Glendinning 	.name		= "smsc95xx",
12322f7ca802SSteve Glendinning 	.id_table	= products,
12332f7ca802SSteve Glendinning 	.probe		= usbnet_probe,
12342f7ca802SSteve Glendinning 	.suspend	= usbnet_suspend,
12352f7ca802SSteve Glendinning 	.resume		= usbnet_resume,
12362f7ca802SSteve Glendinning 	.disconnect	= usbnet_disconnect,
12372f7ca802SSteve Glendinning };
12382f7ca802SSteve Glendinning 
12392f7ca802SSteve Glendinning static int __init smsc95xx_init(void)
12402f7ca802SSteve Glendinning {
12412f7ca802SSteve Glendinning 	return usb_register(&smsc95xx_driver);
12422f7ca802SSteve Glendinning }
12432f7ca802SSteve Glendinning module_init(smsc95xx_init);
12442f7ca802SSteve Glendinning 
12452f7ca802SSteve Glendinning static void __exit smsc95xx_exit(void)
12462f7ca802SSteve Glendinning {
12472f7ca802SSteve Glendinning 	usb_deregister(&smsc95xx_driver);
12482f7ca802SSteve Glendinning }
12492f7ca802SSteve Glendinning module_exit(smsc95xx_exit);
12502f7ca802SSteve Glendinning 
12512f7ca802SSteve Glendinning MODULE_AUTHOR("Nancy Lin");
12522f7ca802SSteve Glendinning MODULE_AUTHOR("Steve Glendinning <steve.glendinning@smsc.com>");
12532f7ca802SSteve Glendinning MODULE_DESCRIPTION("SMSC95XX USB 2.0 Ethernet Devices");
12542f7ca802SSteve Glendinning MODULE_LICENSE("GPL");
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