14621bf12SDavid S. Miller /* 24621bf12SDavid S. Miller * drivers/net/phy/national.c 34621bf12SDavid S. Miller * 44621bf12SDavid S. Miller * Driver for National Semiconductor PHYs 54621bf12SDavid S. Miller * 64621bf12SDavid S. Miller * Author: Stuart Menefy <stuart.menefy@st.com> 74621bf12SDavid S. Miller * Maintainer: Giuseppe Cavallaro <peppe.cavallaro@st.com> 84621bf12SDavid S. Miller * 94621bf12SDavid S. Miller * Copyright (c) 2008 STMicroelectronics Limited 104621bf12SDavid S. Miller * 114621bf12SDavid S. Miller * This program is free software; you can redistribute it and/or modify it 124621bf12SDavid S. Miller * under the terms of the GNU General Public License as published by the 134621bf12SDavid S. Miller * Free Software Foundation; either version 2 of the License, or (at your 144621bf12SDavid S. Miller * option) any later version. 154621bf12SDavid S. Miller * 164621bf12SDavid S. Miller */ 174621bf12SDavid S. Miller 184621bf12SDavid S. Miller #include <linux/kernel.h> 194621bf12SDavid S. Miller #include <linux/module.h> 204621bf12SDavid S. Miller #include <linux/mii.h> 214621bf12SDavid S. Miller #include <linux/ethtool.h> 224621bf12SDavid S. Miller #include <linux/phy.h> 234621bf12SDavid S. Miller #include <linux/netdevice.h> 244621bf12SDavid S. Miller 254621bf12SDavid S. Miller /* DP83865 phy identifier values */ 264621bf12SDavid S. Miller #define DP83865_PHY_ID 0x20005c7a 274621bf12SDavid S. Miller 28*6e6f400fSGiuseppe CAVALLARO #define DP83865_INT_STATUS 0x14 29*6e6f400fSGiuseppe CAVALLARO #define DP83865_INT_MASK 0x15 30*6e6f400fSGiuseppe CAVALLARO #define DP83865_INT_CLEAR 0x17 314621bf12SDavid S. Miller 324621bf12SDavid S. Miller #define DP83865_INT_REMOTE_FAULT 0x0008 334621bf12SDavid S. Miller #define DP83865_INT_ANE_COMPLETED 0x0010 344621bf12SDavid S. Miller #define DP83865_INT_LINK_CHANGE 0xe000 354621bf12SDavid S. Miller #define DP83865_INT_MASK_DEFAULT (DP83865_INT_REMOTE_FAULT | \ 364621bf12SDavid S. Miller DP83865_INT_ANE_COMPLETED | \ 374621bf12SDavid S. Miller DP83865_INT_LINK_CHANGE) 384621bf12SDavid S. Miller 394621bf12SDavid S. Miller /* Advanced proprietary configuration */ 404621bf12SDavid S. Miller #define NS_EXP_MEM_CTL 0x16 414621bf12SDavid S. Miller #define NS_EXP_MEM_DATA 0x1d 424621bf12SDavid S. Miller #define NS_EXP_MEM_ADD 0x1e 434621bf12SDavid S. Miller 444621bf12SDavid S. Miller #define LED_CTRL_REG 0x13 454621bf12SDavid S. Miller #define AN_FALLBACK_AN 0x0001 464621bf12SDavid S. Miller #define AN_FALLBACK_CRC 0x0002 474621bf12SDavid S. Miller #define AN_FALLBACK_IE 0x0004 484621bf12SDavid S. Miller #define ALL_FALLBACK_ON (AN_FALLBACK_AN | AN_FALLBACK_CRC | AN_FALLBACK_IE) 494621bf12SDavid S. Miller 504621bf12SDavid S. Miller enum hdx_loopback { 514621bf12SDavid S. Miller hdx_loopback_on = 0, 524621bf12SDavid S. Miller hdx_loopback_off = 1, 534621bf12SDavid S. Miller }; 544621bf12SDavid S. Miller 554621bf12SDavid S. Miller static u8 ns_exp_read(struct phy_device *phydev, u16 reg) 564621bf12SDavid S. Miller { 574621bf12SDavid S. Miller phy_write(phydev, NS_EXP_MEM_ADD, reg); 584621bf12SDavid S. Miller return phy_read(phydev, NS_EXP_MEM_DATA); 594621bf12SDavid S. Miller } 604621bf12SDavid S. Miller 614621bf12SDavid S. Miller static void ns_exp_write(struct phy_device *phydev, u16 reg, u8 data) 624621bf12SDavid S. Miller { 634621bf12SDavid S. Miller phy_write(phydev, NS_EXP_MEM_ADD, reg); 644621bf12SDavid S. Miller phy_write(phydev, NS_EXP_MEM_DATA, data); 654621bf12SDavid S. Miller } 664621bf12SDavid S. Miller 674621bf12SDavid S. Miller static int ns_config_intr(struct phy_device *phydev) 684621bf12SDavid S. Miller { 694621bf12SDavid S. Miller int err; 704621bf12SDavid S. Miller 714621bf12SDavid S. Miller if (phydev->interrupts == PHY_INTERRUPT_ENABLED) 72*6e6f400fSGiuseppe CAVALLARO err = phy_write(phydev, DP83865_INT_MASK, 734621bf12SDavid S. Miller DP83865_INT_MASK_DEFAULT); 744621bf12SDavid S. Miller else 75*6e6f400fSGiuseppe CAVALLARO err = phy_write(phydev, DP83865_INT_MASK, 0); 764621bf12SDavid S. Miller 774621bf12SDavid S. Miller return err; 784621bf12SDavid S. Miller } 794621bf12SDavid S. Miller 804621bf12SDavid S. Miller static int ns_ack_interrupt(struct phy_device *phydev) 814621bf12SDavid S. Miller { 82*6e6f400fSGiuseppe CAVALLARO int ret = phy_read(phydev, DP83865_INT_STATUS); 834621bf12SDavid S. Miller if (ret < 0) 844621bf12SDavid S. Miller return ret; 854621bf12SDavid S. Miller 86*6e6f400fSGiuseppe CAVALLARO /* Clear the interrupt status bit by writing a “1” 87*6e6f400fSGiuseppe CAVALLARO * to the corresponding bit in INT_CLEAR (2:0 are reserved) */ 88*6e6f400fSGiuseppe CAVALLARO ret = phy_write(phydev, DP83865_INT_CLEAR, ret & ~0x7); 89*6e6f400fSGiuseppe CAVALLARO 90*6e6f400fSGiuseppe CAVALLARO return ret; 914621bf12SDavid S. Miller } 924621bf12SDavid S. Miller 934621bf12SDavid S. Miller static void ns_giga_speed_fallback(struct phy_device *phydev, int mode) 944621bf12SDavid S. Miller { 954621bf12SDavid S. Miller int bmcr = phy_read(phydev, MII_BMCR); 964621bf12SDavid S. Miller 974621bf12SDavid S. Miller phy_write(phydev, MII_BMCR, (bmcr | BMCR_PDOWN)); 984621bf12SDavid S. Miller 994621bf12SDavid S. Miller /* Enable 8 bit expended memory read/write (no auto increment) */ 1004621bf12SDavid S. Miller phy_write(phydev, NS_EXP_MEM_CTL, 0); 1014621bf12SDavid S. Miller phy_write(phydev, NS_EXP_MEM_ADD, 0x1C0); 1024621bf12SDavid S. Miller phy_write(phydev, NS_EXP_MEM_DATA, 0x0008); 1034621bf12SDavid S. Miller phy_write(phydev, MII_BMCR, (bmcr & ~BMCR_PDOWN)); 1044621bf12SDavid S. Miller phy_write(phydev, LED_CTRL_REG, mode); 1054621bf12SDavid S. Miller } 1064621bf12SDavid S. Miller 1074621bf12SDavid S. Miller static void ns_10_base_t_hdx_loopack(struct phy_device *phydev, int disable) 1084621bf12SDavid S. Miller { 1094621bf12SDavid S. Miller if (disable) 1104621bf12SDavid S. Miller ns_exp_write(phydev, 0x1c0, ns_exp_read(phydev, 0x1c0) | 1); 1114621bf12SDavid S. Miller else 1124621bf12SDavid S. Miller ns_exp_write(phydev, 0x1c0, 1134621bf12SDavid S. Miller ns_exp_read(phydev, 0x1c0) & 0xfffe); 1144621bf12SDavid S. Miller 1154621bf12SDavid S. Miller printk(KERN_DEBUG "DP83865 PHY: 10BASE-T HDX loopback %s\n", 1164621bf12SDavid S. Miller (ns_exp_read(phydev, 0x1c0) & 0x0001) ? "off" : "on"); 1174621bf12SDavid S. Miller } 1184621bf12SDavid S. Miller 1194621bf12SDavid S. Miller static int ns_config_init(struct phy_device *phydev) 1204621bf12SDavid S. Miller { 1214621bf12SDavid S. Miller ns_giga_speed_fallback(phydev, ALL_FALLBACK_ON); 1224621bf12SDavid S. Miller /* In the latest MAC or switches design, the 10 Mbps loopback 1234621bf12SDavid S. Miller is desired to be turned off. */ 1244621bf12SDavid S. Miller ns_10_base_t_hdx_loopack(phydev, hdx_loopback_off); 1254621bf12SDavid S. Miller return ns_ack_interrupt(phydev); 1264621bf12SDavid S. Miller } 1274621bf12SDavid S. Miller 1284621bf12SDavid S. Miller static struct phy_driver dp83865_driver = { 1294621bf12SDavid S. Miller .phy_id = DP83865_PHY_ID, 1304621bf12SDavid S. Miller .phy_id_mask = 0xfffffff0, 1314621bf12SDavid S. Miller .name = "NatSemi DP83865", 1324621bf12SDavid S. Miller .features = PHY_GBIT_FEATURES | SUPPORTED_Pause | SUPPORTED_Asym_Pause, 1334621bf12SDavid S. Miller .flags = PHY_HAS_INTERRUPT, 1344621bf12SDavid S. Miller .config_init = ns_config_init, 1354621bf12SDavid S. Miller .config_aneg = genphy_config_aneg, 1364621bf12SDavid S. Miller .read_status = genphy_read_status, 1374621bf12SDavid S. Miller .ack_interrupt = ns_ack_interrupt, 1384621bf12SDavid S. Miller .config_intr = ns_config_intr, 1394621bf12SDavid S. Miller .driver = {.owner = THIS_MODULE,} 1404621bf12SDavid S. Miller }; 1414621bf12SDavid S. Miller 1424621bf12SDavid S. Miller static int __init ns_init(void) 1434621bf12SDavid S. Miller { 1444621bf12SDavid S. Miller return phy_driver_register(&dp83865_driver); 1454621bf12SDavid S. Miller } 1464621bf12SDavid S. Miller 1474621bf12SDavid S. Miller static void __exit ns_exit(void) 1484621bf12SDavid S. Miller { 1494621bf12SDavid S. Miller phy_driver_unregister(&dp83865_driver); 1504621bf12SDavid S. Miller } 1514621bf12SDavid S. Miller 1524621bf12SDavid S. Miller MODULE_DESCRIPTION("NatSemi PHY driver"); 1534621bf12SDavid S. Miller MODULE_AUTHOR("Stuart Menefy"); 1544621bf12SDavid S. Miller MODULE_LICENSE("GPL"); 1554621bf12SDavid S. Miller 1564621bf12SDavid S. Miller module_init(ns_init); 1574621bf12SDavid S. Miller module_exit(ns_exit); 1584e4f10f6SDavid Woodhouse 159cf93c945SUwe Kleine-König static struct mdio_device_id __maybe_unused ns_tbl[] = { 1604e4f10f6SDavid Woodhouse { DP83865_PHY_ID, 0xfffffff0 }, 1614e4f10f6SDavid Woodhouse { } 1624e4f10f6SDavid Woodhouse }; 1634e4f10f6SDavid Woodhouse 1644e4f10f6SDavid Woodhouse MODULE_DEVICE_TABLE(mdio, ns_tbl); 165