1*4621bf12SDavid S. Miller /* 2*4621bf12SDavid S. Miller * drivers/net/phy/national.c 3*4621bf12SDavid S. Miller * 4*4621bf12SDavid S. Miller * Driver for National Semiconductor PHYs 5*4621bf12SDavid S. Miller * 6*4621bf12SDavid S. Miller * Author: Stuart Menefy <stuart.menefy@st.com> 7*4621bf12SDavid S. Miller * Maintainer: Giuseppe Cavallaro <peppe.cavallaro@st.com> 8*4621bf12SDavid S. Miller * 9*4621bf12SDavid S. Miller * Copyright (c) 2008 STMicroelectronics Limited 10*4621bf12SDavid S. Miller * 11*4621bf12SDavid S. Miller * This program is free software; you can redistribute it and/or modify it 12*4621bf12SDavid S. Miller * under the terms of the GNU General Public License as published by the 13*4621bf12SDavid S. Miller * Free Software Foundation; either version 2 of the License, or (at your 14*4621bf12SDavid S. Miller * option) any later version. 15*4621bf12SDavid S. Miller * 16*4621bf12SDavid S. Miller */ 17*4621bf12SDavid S. Miller 18*4621bf12SDavid S. Miller #include <linux/kernel.h> 19*4621bf12SDavid S. Miller #include <linux/module.h> 20*4621bf12SDavid S. Miller #include <linux/mii.h> 21*4621bf12SDavid S. Miller #include <linux/ethtool.h> 22*4621bf12SDavid S. Miller #include <linux/phy.h> 23*4621bf12SDavid S. Miller #include <linux/netdevice.h> 24*4621bf12SDavid S. Miller 25*4621bf12SDavid S. Miller /* DP83865 phy identifier values */ 26*4621bf12SDavid S. Miller #define DP83865_PHY_ID 0x20005c7a 27*4621bf12SDavid S. Miller 28*4621bf12SDavid S. Miller #define DP83865_INT_MASK_REG 0x15 29*4621bf12SDavid S. Miller #define DP83865_INT_MASK_STATUS 0x14 30*4621bf12SDavid S. Miller 31*4621bf12SDavid S. Miller #define DP83865_INT_REMOTE_FAULT 0x0008 32*4621bf12SDavid S. Miller #define DP83865_INT_ANE_COMPLETED 0x0010 33*4621bf12SDavid S. Miller #define DP83865_INT_LINK_CHANGE 0xe000 34*4621bf12SDavid S. Miller #define DP83865_INT_MASK_DEFAULT (DP83865_INT_REMOTE_FAULT | \ 35*4621bf12SDavid S. Miller DP83865_INT_ANE_COMPLETED | \ 36*4621bf12SDavid S. Miller DP83865_INT_LINK_CHANGE) 37*4621bf12SDavid S. Miller 38*4621bf12SDavid S. Miller /* Advanced proprietary configuration */ 39*4621bf12SDavid S. Miller #define NS_EXP_MEM_CTL 0x16 40*4621bf12SDavid S. Miller #define NS_EXP_MEM_DATA 0x1d 41*4621bf12SDavid S. Miller #define NS_EXP_MEM_ADD 0x1e 42*4621bf12SDavid S. Miller 43*4621bf12SDavid S. Miller #define LED_CTRL_REG 0x13 44*4621bf12SDavid S. Miller #define AN_FALLBACK_AN 0x0001 45*4621bf12SDavid S. Miller #define AN_FALLBACK_CRC 0x0002 46*4621bf12SDavid S. Miller #define AN_FALLBACK_IE 0x0004 47*4621bf12SDavid S. Miller #define ALL_FALLBACK_ON (AN_FALLBACK_AN | AN_FALLBACK_CRC | AN_FALLBACK_IE) 48*4621bf12SDavid S. Miller 49*4621bf12SDavid S. Miller enum hdx_loopback { 50*4621bf12SDavid S. Miller hdx_loopback_on = 0, 51*4621bf12SDavid S. Miller hdx_loopback_off = 1, 52*4621bf12SDavid S. Miller }; 53*4621bf12SDavid S. Miller 54*4621bf12SDavid S. Miller static u8 ns_exp_read(struct phy_device *phydev, u16 reg) 55*4621bf12SDavid S. Miller { 56*4621bf12SDavid S. Miller phy_write(phydev, NS_EXP_MEM_ADD, reg); 57*4621bf12SDavid S. Miller return phy_read(phydev, NS_EXP_MEM_DATA); 58*4621bf12SDavid S. Miller } 59*4621bf12SDavid S. Miller 60*4621bf12SDavid S. Miller static void ns_exp_write(struct phy_device *phydev, u16 reg, u8 data) 61*4621bf12SDavid S. Miller { 62*4621bf12SDavid S. Miller phy_write(phydev, NS_EXP_MEM_ADD, reg); 63*4621bf12SDavid S. Miller phy_write(phydev, NS_EXP_MEM_DATA, data); 64*4621bf12SDavid S. Miller } 65*4621bf12SDavid S. Miller 66*4621bf12SDavid S. Miller static int ns_config_intr(struct phy_device *phydev) 67*4621bf12SDavid S. Miller { 68*4621bf12SDavid S. Miller int err; 69*4621bf12SDavid S. Miller 70*4621bf12SDavid S. Miller if (phydev->interrupts == PHY_INTERRUPT_ENABLED) 71*4621bf12SDavid S. Miller err = phy_write(phydev, DP83865_INT_MASK_REG, 72*4621bf12SDavid S. Miller DP83865_INT_MASK_DEFAULT); 73*4621bf12SDavid S. Miller else 74*4621bf12SDavid S. Miller err = phy_write(phydev, DP83865_INT_MASK_REG, 0); 75*4621bf12SDavid S. Miller 76*4621bf12SDavid S. Miller return err; 77*4621bf12SDavid S. Miller } 78*4621bf12SDavid S. Miller 79*4621bf12SDavid S. Miller static int ns_ack_interrupt(struct phy_device *phydev) 80*4621bf12SDavid S. Miller { 81*4621bf12SDavid S. Miller int ret = phy_read(phydev, DP83865_INT_MASK_STATUS); 82*4621bf12SDavid S. Miller if (ret < 0) 83*4621bf12SDavid S. Miller return ret; 84*4621bf12SDavid S. Miller 85*4621bf12SDavid S. Miller return 0; 86*4621bf12SDavid S. Miller } 87*4621bf12SDavid S. Miller 88*4621bf12SDavid S. Miller static void ns_giga_speed_fallback(struct phy_device *phydev, int mode) 89*4621bf12SDavid S. Miller { 90*4621bf12SDavid S. Miller int bmcr = phy_read(phydev, MII_BMCR); 91*4621bf12SDavid S. Miller 92*4621bf12SDavid S. Miller phy_write(phydev, MII_BMCR, (bmcr | BMCR_PDOWN)); 93*4621bf12SDavid S. Miller 94*4621bf12SDavid S. Miller /* Enable 8 bit expended memory read/write (no auto increment) */ 95*4621bf12SDavid S. Miller phy_write(phydev, NS_EXP_MEM_CTL, 0); 96*4621bf12SDavid S. Miller phy_write(phydev, NS_EXP_MEM_ADD, 0x1C0); 97*4621bf12SDavid S. Miller phy_write(phydev, NS_EXP_MEM_DATA, 0x0008); 98*4621bf12SDavid S. Miller phy_write(phydev, MII_BMCR, (bmcr & ~BMCR_PDOWN)); 99*4621bf12SDavid S. Miller phy_write(phydev, LED_CTRL_REG, mode); 100*4621bf12SDavid S. Miller return; 101*4621bf12SDavid S. Miller } 102*4621bf12SDavid S. Miller 103*4621bf12SDavid S. Miller static void ns_10_base_t_hdx_loopack(struct phy_device *phydev, int disable) 104*4621bf12SDavid S. Miller { 105*4621bf12SDavid S. Miller if (disable) 106*4621bf12SDavid S. Miller ns_exp_write(phydev, 0x1c0, ns_exp_read(phydev, 0x1c0) | 1); 107*4621bf12SDavid S. Miller else 108*4621bf12SDavid S. Miller ns_exp_write(phydev, 0x1c0, 109*4621bf12SDavid S. Miller ns_exp_read(phydev, 0x1c0) & 0xfffe); 110*4621bf12SDavid S. Miller 111*4621bf12SDavid S. Miller printk(KERN_DEBUG "DP83865 PHY: 10BASE-T HDX loopback %s\n", 112*4621bf12SDavid S. Miller (ns_exp_read(phydev, 0x1c0) & 0x0001) ? "off" : "on"); 113*4621bf12SDavid S. Miller 114*4621bf12SDavid S. Miller return; 115*4621bf12SDavid S. Miller } 116*4621bf12SDavid S. Miller 117*4621bf12SDavid S. Miller static int ns_config_init(struct phy_device *phydev) 118*4621bf12SDavid S. Miller { 119*4621bf12SDavid S. Miller ns_giga_speed_fallback(phydev, ALL_FALLBACK_ON); 120*4621bf12SDavid S. Miller /* In the latest MAC or switches design, the 10 Mbps loopback 121*4621bf12SDavid S. Miller is desired to be turned off. */ 122*4621bf12SDavid S. Miller ns_10_base_t_hdx_loopack(phydev, hdx_loopback_off); 123*4621bf12SDavid S. Miller return ns_ack_interrupt(phydev); 124*4621bf12SDavid S. Miller } 125*4621bf12SDavid S. Miller 126*4621bf12SDavid S. Miller static struct phy_driver dp83865_driver = { 127*4621bf12SDavid S. Miller .phy_id = DP83865_PHY_ID, 128*4621bf12SDavid S. Miller .phy_id_mask = 0xfffffff0, 129*4621bf12SDavid S. Miller .name = "NatSemi DP83865", 130*4621bf12SDavid S. Miller .features = PHY_GBIT_FEATURES | SUPPORTED_Pause | SUPPORTED_Asym_Pause, 131*4621bf12SDavid S. Miller .flags = PHY_HAS_INTERRUPT, 132*4621bf12SDavid S. Miller .config_init = ns_config_init, 133*4621bf12SDavid S. Miller .config_aneg = genphy_config_aneg, 134*4621bf12SDavid S. Miller .read_status = genphy_read_status, 135*4621bf12SDavid S. Miller .ack_interrupt = ns_ack_interrupt, 136*4621bf12SDavid S. Miller .config_intr = ns_config_intr, 137*4621bf12SDavid S. Miller .driver = {.owner = THIS_MODULE,} 138*4621bf12SDavid S. Miller }; 139*4621bf12SDavid S. Miller 140*4621bf12SDavid S. Miller static int __init ns_init(void) 141*4621bf12SDavid S. Miller { 142*4621bf12SDavid S. Miller return phy_driver_register(&dp83865_driver); 143*4621bf12SDavid S. Miller } 144*4621bf12SDavid S. Miller 145*4621bf12SDavid S. Miller static void __exit ns_exit(void) 146*4621bf12SDavid S. Miller { 147*4621bf12SDavid S. Miller phy_driver_unregister(&dp83865_driver); 148*4621bf12SDavid S. Miller } 149*4621bf12SDavid S. Miller 150*4621bf12SDavid S. Miller MODULE_DESCRIPTION("NatSemi PHY driver"); 151*4621bf12SDavid S. Miller MODULE_AUTHOR("Stuart Menefy"); 152*4621bf12SDavid S. Miller MODULE_LICENSE("GPL"); 153*4621bf12SDavid S. Miller 154*4621bf12SDavid S. Miller module_init(ns_init); 155*4621bf12SDavid S. Miller module_exit(ns_exit); 156