1d0507009SDavid J. Choi /* 2d0507009SDavid J. Choi * drivers/net/phy/micrel.c 3d0507009SDavid J. Choi * 4d0507009SDavid J. Choi * Driver for Micrel PHYs 5d0507009SDavid J. Choi * 6d0507009SDavid J. Choi * Author: David J. Choi 7d0507009SDavid J. Choi * 8d0507009SDavid J. Choi * Copyright (c) 2010 Micrel, Inc. 9d0507009SDavid J. Choi * 10d0507009SDavid J. Choi * This program is free software; you can redistribute it and/or modify it 11d0507009SDavid J. Choi * under the terms of the GNU General Public License as published by the 12d0507009SDavid J. Choi * Free Software Foundation; either version 2 of the License, or (at your 13d0507009SDavid J. Choi * option) any later version. 14d0507009SDavid J. Choi * 1551f932c4SChoi, David * Support : ksz9021 1000/100/10 phy from Micrel 1651f932c4SChoi, David * ks8001, ks8737, ks8721, ks8041, ks8051 100/10 phy 17d0507009SDavid J. Choi */ 18d0507009SDavid J. Choi 19d0507009SDavid J. Choi #include <linux/kernel.h> 20d0507009SDavid J. Choi #include <linux/module.h> 21d0507009SDavid J. Choi #include <linux/phy.h> 22d606ef3fSBaruch Siach #include <linux/micrel_phy.h> 23d0507009SDavid J. Choi 2451f932c4SChoi, David /* general Interrupt control/status reg in vendor specific block. */ 2551f932c4SChoi, David #define MII_KSZPHY_INTCS 0x1B 2651f932c4SChoi, David #define KSZPHY_INTCS_JABBER (1 << 15) 2751f932c4SChoi, David #define KSZPHY_INTCS_RECEIVE_ERR (1 << 14) 2851f932c4SChoi, David #define KSZPHY_INTCS_PAGE_RECEIVE (1 << 13) 2951f932c4SChoi, David #define KSZPHY_INTCS_PARELLEL (1 << 12) 3051f932c4SChoi, David #define KSZPHY_INTCS_LINK_PARTNER_ACK (1 << 11) 3151f932c4SChoi, David #define KSZPHY_INTCS_LINK_DOWN (1 << 10) 3251f932c4SChoi, David #define KSZPHY_INTCS_REMOTE_FAULT (1 << 9) 3351f932c4SChoi, David #define KSZPHY_INTCS_LINK_UP (1 << 8) 3451f932c4SChoi, David #define KSZPHY_INTCS_ALL (KSZPHY_INTCS_LINK_UP |\ 3551f932c4SChoi, David KSZPHY_INTCS_LINK_DOWN) 3651f932c4SChoi, David 3751f932c4SChoi, David /* general PHY control reg in vendor specific block. */ 3851f932c4SChoi, David #define MII_KSZPHY_CTRL 0x1F 3951f932c4SChoi, David /* bitmap of PHY register to set interrupt mode */ 4051f932c4SChoi, David #define KSZPHY_CTRL_INT_ACTIVE_HIGH (1 << 9) 4151f932c4SChoi, David #define KSZ9021_CTRL_INT_ACTIVE_HIGH (1 << 14) 4251f932c4SChoi, David #define KS8737_CTRL_INT_ACTIVE_HIGH (1 << 14) 43d606ef3fSBaruch Siach #define KSZ8051_RMII_50MHZ_CLK (1 << 7) 4451f932c4SChoi, David 4551f932c4SChoi, David static int kszphy_ack_interrupt(struct phy_device *phydev) 4651f932c4SChoi, David { 4751f932c4SChoi, David /* bit[7..0] int status, which is a read and clear register. */ 4851f932c4SChoi, David int rc; 4951f932c4SChoi, David 5051f932c4SChoi, David rc = phy_read(phydev, MII_KSZPHY_INTCS); 5151f932c4SChoi, David 5251f932c4SChoi, David return (rc < 0) ? rc : 0; 5351f932c4SChoi, David } 5451f932c4SChoi, David 5551f932c4SChoi, David static int kszphy_set_interrupt(struct phy_device *phydev) 5651f932c4SChoi, David { 5751f932c4SChoi, David int temp; 5851f932c4SChoi, David temp = (PHY_INTERRUPT_ENABLED == phydev->interrupts) ? 5951f932c4SChoi, David KSZPHY_INTCS_ALL : 0; 6051f932c4SChoi, David return phy_write(phydev, MII_KSZPHY_INTCS, temp); 6151f932c4SChoi, David } 6251f932c4SChoi, David 6351f932c4SChoi, David static int kszphy_config_intr(struct phy_device *phydev) 6451f932c4SChoi, David { 6551f932c4SChoi, David int temp, rc; 6651f932c4SChoi, David 6751f932c4SChoi, David /* set the interrupt pin active low */ 6851f932c4SChoi, David temp = phy_read(phydev, MII_KSZPHY_CTRL); 6951f932c4SChoi, David temp &= ~KSZPHY_CTRL_INT_ACTIVE_HIGH; 7051f932c4SChoi, David phy_write(phydev, MII_KSZPHY_CTRL, temp); 7151f932c4SChoi, David rc = kszphy_set_interrupt(phydev); 7251f932c4SChoi, David return rc < 0 ? rc : 0; 7351f932c4SChoi, David } 7451f932c4SChoi, David 7551f932c4SChoi, David static int ksz9021_config_intr(struct phy_device *phydev) 7651f932c4SChoi, David { 7751f932c4SChoi, David int temp, rc; 7851f932c4SChoi, David 7951f932c4SChoi, David /* set the interrupt pin active low */ 8051f932c4SChoi, David temp = phy_read(phydev, MII_KSZPHY_CTRL); 8151f932c4SChoi, David temp &= ~KSZ9021_CTRL_INT_ACTIVE_HIGH; 8251f932c4SChoi, David phy_write(phydev, MII_KSZPHY_CTRL, temp); 8351f932c4SChoi, David rc = kszphy_set_interrupt(phydev); 8451f932c4SChoi, David return rc < 0 ? rc : 0; 8551f932c4SChoi, David } 8651f932c4SChoi, David 8751f932c4SChoi, David static int ks8737_config_intr(struct phy_device *phydev) 8851f932c4SChoi, David { 8951f932c4SChoi, David int temp, rc; 9051f932c4SChoi, David 9151f932c4SChoi, David /* set the interrupt pin active low */ 9251f932c4SChoi, David temp = phy_read(phydev, MII_KSZPHY_CTRL); 9351f932c4SChoi, David temp &= ~KS8737_CTRL_INT_ACTIVE_HIGH; 9451f932c4SChoi, David phy_write(phydev, MII_KSZPHY_CTRL, temp); 9551f932c4SChoi, David rc = kszphy_set_interrupt(phydev); 9651f932c4SChoi, David return rc < 0 ? rc : 0; 9751f932c4SChoi, David } 98d0507009SDavid J. Choi 99d0507009SDavid J. Choi static int kszphy_config_init(struct phy_device *phydev) 100d0507009SDavid J. Choi { 101d0507009SDavid J. Choi return 0; 102d0507009SDavid J. Choi } 103d0507009SDavid J. Choi 104d606ef3fSBaruch Siach static int ks8051_config_init(struct phy_device *phydev) 105d606ef3fSBaruch Siach { 106d606ef3fSBaruch Siach int regval; 107d606ef3fSBaruch Siach 108d606ef3fSBaruch Siach if (phydev->dev_flags & MICREL_PHY_50MHZ_CLK) { 109d606ef3fSBaruch Siach regval = phy_read(phydev, MII_KSZPHY_CTRL); 110d606ef3fSBaruch Siach regval |= KSZ8051_RMII_50MHZ_CLK; 111d606ef3fSBaruch Siach phy_write(phydev, MII_KSZPHY_CTRL, regval); 112d606ef3fSBaruch Siach } 113d606ef3fSBaruch Siach 114d606ef3fSBaruch Siach return 0; 115d606ef3fSBaruch Siach } 116d606ef3fSBaruch Siach 117*d5bf9071SChristian Hohnstaedt static struct phy_driver ksphy_driver[] = { 118*d5bf9071SChristian Hohnstaedt { 11951f932c4SChoi, David .phy_id = PHY_ID_KS8737, 120d0507009SDavid J. Choi .phy_id_mask = 0x00fffff0, 12151f932c4SChoi, David .name = "Micrel KS8737", 12251f932c4SChoi, David .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause), 12351f932c4SChoi, David .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, 124d0507009SDavid J. Choi .config_init = kszphy_config_init, 125d0507009SDavid J. Choi .config_aneg = genphy_config_aneg, 126d0507009SDavid J. Choi .read_status = genphy_read_status, 12751f932c4SChoi, David .ack_interrupt = kszphy_ack_interrupt, 12851f932c4SChoi, David .config_intr = ks8737_config_intr, 129d0507009SDavid J. Choi .driver = { .owner = THIS_MODULE,}, 130*d5bf9071SChristian Hohnstaedt }, { 13151f932c4SChoi, David .phy_id = PHY_ID_KS8041, 132d0507009SDavid J. Choi .phy_id_mask = 0x00fffff0, 13351f932c4SChoi, David .name = "Micrel KS8041", 13451f932c4SChoi, David .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause 13551f932c4SChoi, David | SUPPORTED_Asym_Pause), 13651f932c4SChoi, David .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, 137d0507009SDavid J. Choi .config_init = kszphy_config_init, 138d0507009SDavid J. Choi .config_aneg = genphy_config_aneg, 139d0507009SDavid J. Choi .read_status = genphy_read_status, 14051f932c4SChoi, David .ack_interrupt = kszphy_ack_interrupt, 14151f932c4SChoi, David .config_intr = kszphy_config_intr, 14251f932c4SChoi, David .driver = { .owner = THIS_MODULE,}, 143*d5bf9071SChristian Hohnstaedt }, { 14451f932c4SChoi, David .phy_id = PHY_ID_KS8051, 14551f932c4SChoi, David .phy_id_mask = 0x00fffff0, 14651f932c4SChoi, David .name = "Micrel KS8051", 14751f932c4SChoi, David .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause 14851f932c4SChoi, David | SUPPORTED_Asym_Pause), 14951f932c4SChoi, David .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, 150d606ef3fSBaruch Siach .config_init = ks8051_config_init, 15151f932c4SChoi, David .config_aneg = genphy_config_aneg, 15251f932c4SChoi, David .read_status = genphy_read_status, 15351f932c4SChoi, David .ack_interrupt = kszphy_ack_interrupt, 15451f932c4SChoi, David .config_intr = kszphy_config_intr, 15551f932c4SChoi, David .driver = { .owner = THIS_MODULE,}, 156*d5bf9071SChristian Hohnstaedt }, { 15751f932c4SChoi, David .phy_id = PHY_ID_KS8001, 15851f932c4SChoi, David .name = "Micrel KS8001 or KS8721", 15948d7d0adSJason Wang .phy_id_mask = 0x00ffffff, 16051f932c4SChoi, David .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause), 16151f932c4SChoi, David .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, 16251f932c4SChoi, David .config_init = kszphy_config_init, 16351f932c4SChoi, David .config_aneg = genphy_config_aneg, 16451f932c4SChoi, David .read_status = genphy_read_status, 16551f932c4SChoi, David .ack_interrupt = kszphy_ack_interrupt, 16651f932c4SChoi, David .config_intr = kszphy_config_intr, 167d0507009SDavid J. Choi .driver = { .owner = THIS_MODULE,}, 168*d5bf9071SChristian Hohnstaedt }, { 169d0507009SDavid J. Choi .phy_id = PHY_ID_KSZ9021, 17048d7d0adSJason Wang .phy_id_mask = 0x000ffffe, 171d0507009SDavid J. Choi .name = "Micrel KSZ9021 Gigabit PHY", 17251f932c4SChoi, David .features = (PHY_GBIT_FEATURES | SUPPORTED_Pause 17351f932c4SChoi, David | SUPPORTED_Asym_Pause), 17451f932c4SChoi, David .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, 175d0507009SDavid J. Choi .config_init = kszphy_config_init, 176d0507009SDavid J. Choi .config_aneg = genphy_config_aneg, 177d0507009SDavid J. Choi .read_status = genphy_read_status, 17851f932c4SChoi, David .ack_interrupt = kszphy_ack_interrupt, 17951f932c4SChoi, David .config_intr = ksz9021_config_intr, 180d0507009SDavid J. Choi .driver = { .owner = THIS_MODULE, }, 181*d5bf9071SChristian Hohnstaedt } }; 182d0507009SDavid J. Choi 183d0507009SDavid J. Choi static int __init ksphy_init(void) 184d0507009SDavid J. Choi { 185*d5bf9071SChristian Hohnstaedt return phy_drivers_register(ksphy_driver, 186*d5bf9071SChristian Hohnstaedt ARRAY_SIZE(ksphy_driver)); 187d0507009SDavid J. Choi } 188d0507009SDavid J. Choi 189d0507009SDavid J. Choi static void __exit ksphy_exit(void) 190d0507009SDavid J. Choi { 191*d5bf9071SChristian Hohnstaedt phy_drivers_unregister(ksphy_driver, 192*d5bf9071SChristian Hohnstaedt ARRAY_SIZE(ksphy_driver)); 193d0507009SDavid J. Choi } 194d0507009SDavid J. Choi 195d0507009SDavid J. Choi module_init(ksphy_init); 196d0507009SDavid J. Choi module_exit(ksphy_exit); 197d0507009SDavid J. Choi 198d0507009SDavid J. Choi MODULE_DESCRIPTION("Micrel PHY driver"); 199d0507009SDavid J. Choi MODULE_AUTHOR("David J. Choi"); 200d0507009SDavid J. Choi MODULE_LICENSE("GPL"); 20152a60ed2SDavid S. Miller 202cf93c945SUwe Kleine-König static struct mdio_device_id __maybe_unused micrel_tbl[] = { 20348d7d0adSJason Wang { PHY_ID_KSZ9021, 0x000ffffe }, 20448d7d0adSJason Wang { PHY_ID_KS8001, 0x00ffffff }, 20551f932c4SChoi, David { PHY_ID_KS8737, 0x00fffff0 }, 20651f932c4SChoi, David { PHY_ID_KS8041, 0x00fffff0 }, 20751f932c4SChoi, David { PHY_ID_KS8051, 0x00fffff0 }, 20852a60ed2SDavid S. Miller { } 20952a60ed2SDavid S. Miller }; 21052a60ed2SDavid S. Miller 21152a60ed2SDavid S. Miller MODULE_DEVICE_TABLE(mdio, micrel_tbl); 212