1d0507009SDavid J. Choi /* 2d0507009SDavid J. Choi * drivers/net/phy/micrel.c 3d0507009SDavid J. Choi * 4d0507009SDavid J. Choi * Driver for Micrel PHYs 5d0507009SDavid J. Choi * 6d0507009SDavid J. Choi * Author: David J. Choi 7d0507009SDavid J. Choi * 8d0507009SDavid J. Choi * Copyright (c) 2010 Micrel, Inc. 9d0507009SDavid J. Choi * 10d0507009SDavid J. Choi * This program is free software; you can redistribute it and/or modify it 11d0507009SDavid J. Choi * under the terms of the GNU General Public License as published by the 12d0507009SDavid J. Choi * Free Software Foundation; either version 2 of the License, or (at your 13d0507009SDavid J. Choi * option) any later version. 14d0507009SDavid J. Choi * 15*51f932c4SChoi, David * Support : ksz9021 1000/100/10 phy from Micrel 16*51f932c4SChoi, David * ks8001, ks8737, ks8721, ks8041, ks8051 100/10 phy 17d0507009SDavid J. Choi */ 18d0507009SDavid J. Choi 19d0507009SDavid J. Choi #include <linux/kernel.h> 20d0507009SDavid J. Choi #include <linux/module.h> 21d0507009SDavid J. Choi #include <linux/phy.h> 22d0507009SDavid J. Choi 23d0507009SDavid J. Choi #define PHY_ID_KSZ9021 0x00221611 24*51f932c4SChoi, David #define PHY_ID_KS8737 0x00221720 25*51f932c4SChoi, David #define PHY_ID_KS8041 0x00221510 26*51f932c4SChoi, David #define PHY_ID_KS8051 0x00221550 27*51f932c4SChoi, David /* both for ks8001 Rev. A/B, and for ks8721 Rev 3. */ 28d0507009SDavid J. Choi #define PHY_ID_KS8001 0x0022161A 29d0507009SDavid J. Choi 30*51f932c4SChoi, David /* general Interrupt control/status reg in vendor specific block. */ 31*51f932c4SChoi, David #define MII_KSZPHY_INTCS 0x1B 32*51f932c4SChoi, David #define KSZPHY_INTCS_JABBER (1 << 15) 33*51f932c4SChoi, David #define KSZPHY_INTCS_RECEIVE_ERR (1 << 14) 34*51f932c4SChoi, David #define KSZPHY_INTCS_PAGE_RECEIVE (1 << 13) 35*51f932c4SChoi, David #define KSZPHY_INTCS_PARELLEL (1 << 12) 36*51f932c4SChoi, David #define KSZPHY_INTCS_LINK_PARTNER_ACK (1 << 11) 37*51f932c4SChoi, David #define KSZPHY_INTCS_LINK_DOWN (1 << 10) 38*51f932c4SChoi, David #define KSZPHY_INTCS_REMOTE_FAULT (1 << 9) 39*51f932c4SChoi, David #define KSZPHY_INTCS_LINK_UP (1 << 8) 40*51f932c4SChoi, David #define KSZPHY_INTCS_ALL (KSZPHY_INTCS_LINK_UP |\ 41*51f932c4SChoi, David KSZPHY_INTCS_LINK_DOWN) 42*51f932c4SChoi, David 43*51f932c4SChoi, David /* general PHY control reg in vendor specific block. */ 44*51f932c4SChoi, David #define MII_KSZPHY_CTRL 0x1F 45*51f932c4SChoi, David /* bitmap of PHY register to set interrupt mode */ 46*51f932c4SChoi, David #define KSZPHY_CTRL_INT_ACTIVE_HIGH (1 << 9) 47*51f932c4SChoi, David #define KSZ9021_CTRL_INT_ACTIVE_HIGH (1 << 14) 48*51f932c4SChoi, David #define KS8737_CTRL_INT_ACTIVE_HIGH (1 << 14) 49*51f932c4SChoi, David 50*51f932c4SChoi, David static int kszphy_ack_interrupt(struct phy_device *phydev) 51*51f932c4SChoi, David { 52*51f932c4SChoi, David /* bit[7..0] int status, which is a read and clear register. */ 53*51f932c4SChoi, David int rc; 54*51f932c4SChoi, David 55*51f932c4SChoi, David rc = phy_read(phydev, MII_KSZPHY_INTCS); 56*51f932c4SChoi, David 57*51f932c4SChoi, David return (rc < 0) ? rc : 0; 58*51f932c4SChoi, David } 59*51f932c4SChoi, David 60*51f932c4SChoi, David static int kszphy_set_interrupt(struct phy_device *phydev) 61*51f932c4SChoi, David { 62*51f932c4SChoi, David int temp; 63*51f932c4SChoi, David temp = (PHY_INTERRUPT_ENABLED == phydev->interrupts) ? 64*51f932c4SChoi, David KSZPHY_INTCS_ALL : 0; 65*51f932c4SChoi, David return phy_write(phydev, MII_KSZPHY_INTCS, temp); 66*51f932c4SChoi, David } 67*51f932c4SChoi, David 68*51f932c4SChoi, David static int kszphy_config_intr(struct phy_device *phydev) 69*51f932c4SChoi, David { 70*51f932c4SChoi, David int temp, rc; 71*51f932c4SChoi, David 72*51f932c4SChoi, David /* set the interrupt pin active low */ 73*51f932c4SChoi, David temp = phy_read(phydev, MII_KSZPHY_CTRL); 74*51f932c4SChoi, David temp &= ~KSZPHY_CTRL_INT_ACTIVE_HIGH; 75*51f932c4SChoi, David phy_write(phydev, MII_KSZPHY_CTRL, temp); 76*51f932c4SChoi, David rc = kszphy_set_interrupt(phydev); 77*51f932c4SChoi, David return rc < 0 ? rc : 0; 78*51f932c4SChoi, David } 79*51f932c4SChoi, David 80*51f932c4SChoi, David static int ksz9021_config_intr(struct phy_device *phydev) 81*51f932c4SChoi, David { 82*51f932c4SChoi, David int temp, rc; 83*51f932c4SChoi, David 84*51f932c4SChoi, David /* set the interrupt pin active low */ 85*51f932c4SChoi, David temp = phy_read(phydev, MII_KSZPHY_CTRL); 86*51f932c4SChoi, David temp &= ~KSZ9021_CTRL_INT_ACTIVE_HIGH; 87*51f932c4SChoi, David phy_write(phydev, MII_KSZPHY_CTRL, temp); 88*51f932c4SChoi, David rc = kszphy_set_interrupt(phydev); 89*51f932c4SChoi, David return rc < 0 ? rc : 0; 90*51f932c4SChoi, David } 91*51f932c4SChoi, David 92*51f932c4SChoi, David static int ks8737_config_intr(struct phy_device *phydev) 93*51f932c4SChoi, David { 94*51f932c4SChoi, David int temp, rc; 95*51f932c4SChoi, David 96*51f932c4SChoi, David /* set the interrupt pin active low */ 97*51f932c4SChoi, David temp = phy_read(phydev, MII_KSZPHY_CTRL); 98*51f932c4SChoi, David temp &= ~KS8737_CTRL_INT_ACTIVE_HIGH; 99*51f932c4SChoi, David phy_write(phydev, MII_KSZPHY_CTRL, temp); 100*51f932c4SChoi, David rc = kszphy_set_interrupt(phydev); 101*51f932c4SChoi, David return rc < 0 ? rc : 0; 102*51f932c4SChoi, David } 103d0507009SDavid J. Choi 104d0507009SDavid J. Choi static int kszphy_config_init(struct phy_device *phydev) 105d0507009SDavid J. Choi { 106d0507009SDavid J. Choi return 0; 107d0507009SDavid J. Choi } 108d0507009SDavid J. Choi 109*51f932c4SChoi, David static struct phy_driver ks8737_driver = { 110*51f932c4SChoi, David .phy_id = PHY_ID_KS8737, 111d0507009SDavid J. Choi .phy_id_mask = 0x00fffff0, 112*51f932c4SChoi, David .name = "Micrel KS8737", 113*51f932c4SChoi, David .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause), 114*51f932c4SChoi, David .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, 115d0507009SDavid J. Choi .config_init = kszphy_config_init, 116d0507009SDavid J. Choi .config_aneg = genphy_config_aneg, 117d0507009SDavid J. Choi .read_status = genphy_read_status, 118*51f932c4SChoi, David .ack_interrupt = kszphy_ack_interrupt, 119*51f932c4SChoi, David .config_intr = ks8737_config_intr, 120d0507009SDavid J. Choi .driver = { .owner = THIS_MODULE,}, 121d0507009SDavid J. Choi }; 122d0507009SDavid J. Choi 123*51f932c4SChoi, David static struct phy_driver ks8041_driver = { 124*51f932c4SChoi, David .phy_id = PHY_ID_KS8041, 125d0507009SDavid J. Choi .phy_id_mask = 0x00fffff0, 126*51f932c4SChoi, David .name = "Micrel KS8041", 127*51f932c4SChoi, David .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause 128*51f932c4SChoi, David | SUPPORTED_Asym_Pause), 129*51f932c4SChoi, David .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, 130d0507009SDavid J. Choi .config_init = kszphy_config_init, 131d0507009SDavid J. Choi .config_aneg = genphy_config_aneg, 132d0507009SDavid J. Choi .read_status = genphy_read_status, 133*51f932c4SChoi, David .ack_interrupt = kszphy_ack_interrupt, 134*51f932c4SChoi, David .config_intr = kszphy_config_intr, 135*51f932c4SChoi, David .driver = { .owner = THIS_MODULE,}, 136*51f932c4SChoi, David }; 137*51f932c4SChoi, David 138*51f932c4SChoi, David static struct phy_driver ks8051_driver = { 139*51f932c4SChoi, David .phy_id = PHY_ID_KS8051, 140*51f932c4SChoi, David .phy_id_mask = 0x00fffff0, 141*51f932c4SChoi, David .name = "Micrel KS8051", 142*51f932c4SChoi, David .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause 143*51f932c4SChoi, David | SUPPORTED_Asym_Pause), 144*51f932c4SChoi, David .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, 145*51f932c4SChoi, David .config_init = kszphy_config_init, 146*51f932c4SChoi, David .config_aneg = genphy_config_aneg, 147*51f932c4SChoi, David .read_status = genphy_read_status, 148*51f932c4SChoi, David .ack_interrupt = kszphy_ack_interrupt, 149*51f932c4SChoi, David .config_intr = kszphy_config_intr, 150*51f932c4SChoi, David .driver = { .owner = THIS_MODULE,}, 151*51f932c4SChoi, David }; 152*51f932c4SChoi, David 153*51f932c4SChoi, David static struct phy_driver ks8001_driver = { 154*51f932c4SChoi, David .phy_id = PHY_ID_KS8001, 155*51f932c4SChoi, David .name = "Micrel KS8001 or KS8721", 156*51f932c4SChoi, David .phy_id_mask = 0x00fffff0, 157*51f932c4SChoi, David .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause), 158*51f932c4SChoi, David .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, 159*51f932c4SChoi, David .config_init = kszphy_config_init, 160*51f932c4SChoi, David .config_aneg = genphy_config_aneg, 161*51f932c4SChoi, David .read_status = genphy_read_status, 162*51f932c4SChoi, David .ack_interrupt = kszphy_ack_interrupt, 163*51f932c4SChoi, David .config_intr = kszphy_config_intr, 164d0507009SDavid J. Choi .driver = { .owner = THIS_MODULE,}, 165d0507009SDavid J. Choi }; 166d0507009SDavid J. Choi 167d0507009SDavid J. Choi static struct phy_driver ksz9021_driver = { 168d0507009SDavid J. Choi .phy_id = PHY_ID_KSZ9021, 169d0507009SDavid J. Choi .phy_id_mask = 0x000fff10, 170d0507009SDavid J. Choi .name = "Micrel KSZ9021 Gigabit PHY", 171*51f932c4SChoi, David .features = (PHY_GBIT_FEATURES | SUPPORTED_Pause 172*51f932c4SChoi, David | SUPPORTED_Asym_Pause), 173*51f932c4SChoi, David .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, 174d0507009SDavid J. Choi .config_init = kszphy_config_init, 175d0507009SDavid J. Choi .config_aneg = genphy_config_aneg, 176d0507009SDavid J. Choi .read_status = genphy_read_status, 177*51f932c4SChoi, David .ack_interrupt = kszphy_ack_interrupt, 178*51f932c4SChoi, David .config_intr = ksz9021_config_intr, 179d0507009SDavid J. Choi .driver = { .owner = THIS_MODULE, }, 180d0507009SDavid J. Choi }; 181d0507009SDavid J. Choi 182d0507009SDavid J. Choi static int __init ksphy_init(void) 183d0507009SDavid J. Choi { 184d0507009SDavid J. Choi int ret; 185d0507009SDavid J. Choi 186d0507009SDavid J. Choi ret = phy_driver_register(&ks8001_driver); 187d0507009SDavid J. Choi if (ret) 188d0507009SDavid J. Choi goto err1; 189d0507009SDavid J. Choi 190d0507009SDavid J. Choi ret = phy_driver_register(&ksz9021_driver); 191d0507009SDavid J. Choi if (ret) 192*51f932c4SChoi, David goto err2; 193*51f932c4SChoi, David 194*51f932c4SChoi, David ret = phy_driver_register(&ks8737_driver); 195*51f932c4SChoi, David if (ret) 196d0507009SDavid J. Choi goto err3; 197*51f932c4SChoi, David ret = phy_driver_register(&ks8041_driver); 198*51f932c4SChoi, David if (ret) 199*51f932c4SChoi, David goto err4; 200*51f932c4SChoi, David ret = phy_driver_register(&ks8051_driver); 201*51f932c4SChoi, David if (ret) 202*51f932c4SChoi, David goto err5; 203*51f932c4SChoi, David 204d0507009SDavid J. Choi return 0; 205d0507009SDavid J. Choi 206*51f932c4SChoi, David err5: 207*51f932c4SChoi, David phy_driver_unregister(&ks8041_driver); 208*51f932c4SChoi, David err4: 209*51f932c4SChoi, David phy_driver_unregister(&ks8737_driver); 210d0507009SDavid J. Choi err3: 211*51f932c4SChoi, David phy_driver_unregister(&ksz9021_driver); 212d0507009SDavid J. Choi err2: 213d0507009SDavid J. Choi phy_driver_unregister(&ks8001_driver); 214d0507009SDavid J. Choi err1: 215d0507009SDavid J. Choi return ret; 216d0507009SDavid J. Choi } 217d0507009SDavid J. Choi 218d0507009SDavid J. Choi static void __exit ksphy_exit(void) 219d0507009SDavid J. Choi { 220d0507009SDavid J. Choi phy_driver_unregister(&ks8001_driver); 221*51f932c4SChoi, David phy_driver_unregister(&ks8737_driver); 222d0507009SDavid J. Choi phy_driver_unregister(&ksz9021_driver); 223*51f932c4SChoi, David phy_driver_unregister(&ks8041_driver); 224*51f932c4SChoi, David phy_driver_unregister(&ks8051_driver); 225d0507009SDavid J. Choi } 226d0507009SDavid J. Choi 227d0507009SDavid J. Choi module_init(ksphy_init); 228d0507009SDavid J. Choi module_exit(ksphy_exit); 229d0507009SDavid J. Choi 230d0507009SDavid J. Choi MODULE_DESCRIPTION("Micrel PHY driver"); 231d0507009SDavid J. Choi MODULE_AUTHOR("David J. Choi"); 232d0507009SDavid J. Choi MODULE_LICENSE("GPL"); 23352a60ed2SDavid S. Miller 23452a60ed2SDavid S. Miller static struct mdio_device_id micrel_tbl[] = { 23552a60ed2SDavid S. Miller { PHY_ID_KSZ9021, 0x000fff10 }, 23652a60ed2SDavid S. Miller { PHY_ID_KS8001, 0x00fffff0 }, 237*51f932c4SChoi, David { PHY_ID_KS8737, 0x00fffff0 }, 238*51f932c4SChoi, David { PHY_ID_KS8041, 0x00fffff0 }, 239*51f932c4SChoi, David { PHY_ID_KS8051, 0x00fffff0 }, 24052a60ed2SDavid S. Miller { } 24152a60ed2SDavid S. Miller }; 24252a60ed2SDavid S. Miller 24352a60ed2SDavid S. Miller MODULE_DEVICE_TABLE(mdio, micrel_tbl); 244