1d0507009SDavid J. Choi /* 2d0507009SDavid J. Choi * drivers/net/phy/micrel.c 3d0507009SDavid J. Choi * 4d0507009SDavid J. Choi * Driver for Micrel PHYs 5d0507009SDavid J. Choi * 6d0507009SDavid J. Choi * Author: David J. Choi 7d0507009SDavid J. Choi * 8d0507009SDavid J. Choi * Copyright (c) 2010 Micrel, Inc. 9d0507009SDavid J. Choi * 10d0507009SDavid J. Choi * This program is free software; you can redistribute it and/or modify it 11d0507009SDavid J. Choi * under the terms of the GNU General Public License as published by the 12d0507009SDavid J. Choi * Free Software Foundation; either version 2 of the License, or (at your 13d0507009SDavid J. Choi * option) any later version. 14d0507009SDavid J. Choi * 1551f932c4SChoi, David * Support : ksz9021 1000/100/10 phy from Micrel 1651f932c4SChoi, David * ks8001, ks8737, ks8721, ks8041, ks8051 100/10 phy 17d0507009SDavid J. Choi */ 18d0507009SDavid J. Choi 19d0507009SDavid J. Choi #include <linux/kernel.h> 20d0507009SDavid J. Choi #include <linux/module.h> 21d0507009SDavid J. Choi #include <linux/phy.h> 22d606ef3fSBaruch Siach #include <linux/micrel_phy.h> 23d0507009SDavid J. Choi 24212ea99aSMarek Vasut /* Operation Mode Strap Override */ 25212ea99aSMarek Vasut #define MII_KSZPHY_OMSO 0x16 26212ea99aSMarek Vasut #define KSZPHY_OMSO_B_CAST_OFF (1 << 9) 27212ea99aSMarek Vasut #define KSZPHY_OMSO_RMII_OVERRIDE (1 << 1) 28212ea99aSMarek Vasut #define KSZPHY_OMSO_MII_OVERRIDE (1 << 0) 29212ea99aSMarek Vasut 3051f932c4SChoi, David /* general Interrupt control/status reg in vendor specific block. */ 3151f932c4SChoi, David #define MII_KSZPHY_INTCS 0x1B 3251f932c4SChoi, David #define KSZPHY_INTCS_JABBER (1 << 15) 3351f932c4SChoi, David #define KSZPHY_INTCS_RECEIVE_ERR (1 << 14) 3451f932c4SChoi, David #define KSZPHY_INTCS_PAGE_RECEIVE (1 << 13) 3551f932c4SChoi, David #define KSZPHY_INTCS_PARELLEL (1 << 12) 3651f932c4SChoi, David #define KSZPHY_INTCS_LINK_PARTNER_ACK (1 << 11) 3751f932c4SChoi, David #define KSZPHY_INTCS_LINK_DOWN (1 << 10) 3851f932c4SChoi, David #define KSZPHY_INTCS_REMOTE_FAULT (1 << 9) 3951f932c4SChoi, David #define KSZPHY_INTCS_LINK_UP (1 << 8) 4051f932c4SChoi, David #define KSZPHY_INTCS_ALL (KSZPHY_INTCS_LINK_UP |\ 4151f932c4SChoi, David KSZPHY_INTCS_LINK_DOWN) 4251f932c4SChoi, David 4351f932c4SChoi, David /* general PHY control reg in vendor specific block. */ 4451f932c4SChoi, David #define MII_KSZPHY_CTRL 0x1F 4551f932c4SChoi, David /* bitmap of PHY register to set interrupt mode */ 4651f932c4SChoi, David #define KSZPHY_CTRL_INT_ACTIVE_HIGH (1 << 9) 4751f932c4SChoi, David #define KSZ9021_CTRL_INT_ACTIVE_HIGH (1 << 14) 4851f932c4SChoi, David #define KS8737_CTRL_INT_ACTIVE_HIGH (1 << 14) 49d606ef3fSBaruch Siach #define KSZ8051_RMII_50MHZ_CLK (1 << 7) 5051f932c4SChoi, David 5151f932c4SChoi, David static int kszphy_ack_interrupt(struct phy_device *phydev) 5251f932c4SChoi, David { 5351f932c4SChoi, David /* bit[7..0] int status, which is a read and clear register. */ 5451f932c4SChoi, David int rc; 5551f932c4SChoi, David 5651f932c4SChoi, David rc = phy_read(phydev, MII_KSZPHY_INTCS); 5751f932c4SChoi, David 5851f932c4SChoi, David return (rc < 0) ? rc : 0; 5951f932c4SChoi, David } 6051f932c4SChoi, David 6151f932c4SChoi, David static int kszphy_set_interrupt(struct phy_device *phydev) 6251f932c4SChoi, David { 6351f932c4SChoi, David int temp; 6451f932c4SChoi, David temp = (PHY_INTERRUPT_ENABLED == phydev->interrupts) ? 6551f932c4SChoi, David KSZPHY_INTCS_ALL : 0; 6651f932c4SChoi, David return phy_write(phydev, MII_KSZPHY_INTCS, temp); 6751f932c4SChoi, David } 6851f932c4SChoi, David 6951f932c4SChoi, David static int kszphy_config_intr(struct phy_device *phydev) 7051f932c4SChoi, David { 7151f932c4SChoi, David int temp, rc; 7251f932c4SChoi, David 7351f932c4SChoi, David /* set the interrupt pin active low */ 7451f932c4SChoi, David temp = phy_read(phydev, MII_KSZPHY_CTRL); 7551f932c4SChoi, David temp &= ~KSZPHY_CTRL_INT_ACTIVE_HIGH; 7651f932c4SChoi, David phy_write(phydev, MII_KSZPHY_CTRL, temp); 7751f932c4SChoi, David rc = kszphy_set_interrupt(phydev); 7851f932c4SChoi, David return rc < 0 ? rc : 0; 7951f932c4SChoi, David } 8051f932c4SChoi, David 8151f932c4SChoi, David static int ksz9021_config_intr(struct phy_device *phydev) 8251f932c4SChoi, David { 8351f932c4SChoi, David int temp, rc; 8451f932c4SChoi, David 8551f932c4SChoi, David /* set the interrupt pin active low */ 8651f932c4SChoi, David temp = phy_read(phydev, MII_KSZPHY_CTRL); 8751f932c4SChoi, David temp &= ~KSZ9021_CTRL_INT_ACTIVE_HIGH; 8851f932c4SChoi, David phy_write(phydev, MII_KSZPHY_CTRL, temp); 8951f932c4SChoi, David rc = kszphy_set_interrupt(phydev); 9051f932c4SChoi, David return rc < 0 ? rc : 0; 9151f932c4SChoi, David } 9251f932c4SChoi, David 9351f932c4SChoi, David static int ks8737_config_intr(struct phy_device *phydev) 9451f932c4SChoi, David { 9551f932c4SChoi, David int temp, rc; 9651f932c4SChoi, David 9751f932c4SChoi, David /* set the interrupt pin active low */ 9851f932c4SChoi, David temp = phy_read(phydev, MII_KSZPHY_CTRL); 9951f932c4SChoi, David temp &= ~KS8737_CTRL_INT_ACTIVE_HIGH; 10051f932c4SChoi, David phy_write(phydev, MII_KSZPHY_CTRL, temp); 10151f932c4SChoi, David rc = kszphy_set_interrupt(phydev); 10251f932c4SChoi, David return rc < 0 ? rc : 0; 10351f932c4SChoi, David } 104d0507009SDavid J. Choi 105d0507009SDavid J. Choi static int kszphy_config_init(struct phy_device *phydev) 106d0507009SDavid J. Choi { 107d0507009SDavid J. Choi return 0; 108d0507009SDavid J. Choi } 109d0507009SDavid J. Choi 110212ea99aSMarek Vasut static int ksz8021_config_init(struct phy_device *phydev) 111212ea99aSMarek Vasut { 112212ea99aSMarek Vasut const u16 val = KSZPHY_OMSO_B_CAST_OFF | KSZPHY_OMSO_RMII_OVERRIDE; 113212ea99aSMarek Vasut phy_write(phydev, MII_KSZPHY_OMSO, val); 114212ea99aSMarek Vasut return 0; 115212ea99aSMarek Vasut } 116212ea99aSMarek Vasut 117d606ef3fSBaruch Siach static int ks8051_config_init(struct phy_device *phydev) 118d606ef3fSBaruch Siach { 119d606ef3fSBaruch Siach int regval; 120d606ef3fSBaruch Siach 121d606ef3fSBaruch Siach if (phydev->dev_flags & MICREL_PHY_50MHZ_CLK) { 122d606ef3fSBaruch Siach regval = phy_read(phydev, MII_KSZPHY_CTRL); 123d606ef3fSBaruch Siach regval |= KSZ8051_RMII_50MHZ_CLK; 124d606ef3fSBaruch Siach phy_write(phydev, MII_KSZPHY_CTRL, regval); 125d606ef3fSBaruch Siach } 126d606ef3fSBaruch Siach 127d606ef3fSBaruch Siach return 0; 128d606ef3fSBaruch Siach } 129d606ef3fSBaruch Siach 130d5bf9071SChristian Hohnstaedt static struct phy_driver ksphy_driver[] = { 131d5bf9071SChristian Hohnstaedt { 13251f932c4SChoi, David .phy_id = PHY_ID_KS8737, 133d0507009SDavid J. Choi .phy_id_mask = 0x00fffff0, 13451f932c4SChoi, David .name = "Micrel KS8737", 13551f932c4SChoi, David .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause), 13651f932c4SChoi, David .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, 137d0507009SDavid J. Choi .config_init = kszphy_config_init, 138d0507009SDavid J. Choi .config_aneg = genphy_config_aneg, 139d0507009SDavid J. Choi .read_status = genphy_read_status, 14051f932c4SChoi, David .ack_interrupt = kszphy_ack_interrupt, 14151f932c4SChoi, David .config_intr = ks8737_config_intr, 142d0507009SDavid J. Choi .driver = { .owner = THIS_MODULE,}, 143d5bf9071SChristian Hohnstaedt }, { 144212ea99aSMarek Vasut .phy_id = PHY_ID_KSZ8021, 145212ea99aSMarek Vasut .phy_id_mask = 0x00ffffff, 146212ea99aSMarek Vasut .name = "Micrel KSZ8021", 147212ea99aSMarek Vasut .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause | 148212ea99aSMarek Vasut SUPPORTED_Asym_Pause), 149212ea99aSMarek Vasut .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, 150212ea99aSMarek Vasut .config_init = ksz8021_config_init, 151212ea99aSMarek Vasut .config_aneg = genphy_config_aneg, 152212ea99aSMarek Vasut .read_status = genphy_read_status, 153212ea99aSMarek Vasut .ack_interrupt = kszphy_ack_interrupt, 154212ea99aSMarek Vasut .config_intr = kszphy_config_intr, 155212ea99aSMarek Vasut .driver = { .owner = THIS_MODULE,}, 156212ea99aSMarek Vasut }, { 157*510d573fSMarek Vasut .phy_id = PHY_ID_KSZ8041, 158d0507009SDavid J. Choi .phy_id_mask = 0x00fffff0, 159*510d573fSMarek Vasut .name = "Micrel KSZ8041", 16051f932c4SChoi, David .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause 16151f932c4SChoi, David | SUPPORTED_Asym_Pause), 16251f932c4SChoi, David .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, 163d0507009SDavid J. Choi .config_init = kszphy_config_init, 164d0507009SDavid J. Choi .config_aneg = genphy_config_aneg, 165d0507009SDavid J. Choi .read_status = genphy_read_status, 16651f932c4SChoi, David .ack_interrupt = kszphy_ack_interrupt, 16751f932c4SChoi, David .config_intr = kszphy_config_intr, 16851f932c4SChoi, David .driver = { .owner = THIS_MODULE,}, 169d5bf9071SChristian Hohnstaedt }, { 170*510d573fSMarek Vasut .phy_id = PHY_ID_KSZ8051, 17151f932c4SChoi, David .phy_id_mask = 0x00fffff0, 172*510d573fSMarek Vasut .name = "Micrel KSZ8051", 17351f932c4SChoi, David .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause 17451f932c4SChoi, David | SUPPORTED_Asym_Pause), 17551f932c4SChoi, David .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, 176d606ef3fSBaruch Siach .config_init = ks8051_config_init, 17751f932c4SChoi, David .config_aneg = genphy_config_aneg, 17851f932c4SChoi, David .read_status = genphy_read_status, 17951f932c4SChoi, David .ack_interrupt = kszphy_ack_interrupt, 18051f932c4SChoi, David .config_intr = kszphy_config_intr, 18151f932c4SChoi, David .driver = { .owner = THIS_MODULE,}, 182d5bf9071SChristian Hohnstaedt }, { 183*510d573fSMarek Vasut .phy_id = PHY_ID_KSZ8001, 184*510d573fSMarek Vasut .name = "Micrel KSZ8001 or KS8721", 18548d7d0adSJason Wang .phy_id_mask = 0x00ffffff, 18651f932c4SChoi, David .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause), 18751f932c4SChoi, David .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, 18851f932c4SChoi, David .config_init = kszphy_config_init, 18951f932c4SChoi, David .config_aneg = genphy_config_aneg, 19051f932c4SChoi, David .read_status = genphy_read_status, 19151f932c4SChoi, David .ack_interrupt = kszphy_ack_interrupt, 19251f932c4SChoi, David .config_intr = kszphy_config_intr, 193d0507009SDavid J. Choi .driver = { .owner = THIS_MODULE,}, 194d5bf9071SChristian Hohnstaedt }, { 195d0507009SDavid J. Choi .phy_id = PHY_ID_KSZ9021, 19648d7d0adSJason Wang .phy_id_mask = 0x000ffffe, 197d0507009SDavid J. Choi .name = "Micrel KSZ9021 Gigabit PHY", 19851f932c4SChoi, David .features = (PHY_GBIT_FEATURES | SUPPORTED_Pause 19951f932c4SChoi, David | SUPPORTED_Asym_Pause), 20051f932c4SChoi, David .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, 201d0507009SDavid J. Choi .config_init = kszphy_config_init, 202d0507009SDavid J. Choi .config_aneg = genphy_config_aneg, 203d0507009SDavid J. Choi .read_status = genphy_read_status, 20451f932c4SChoi, David .ack_interrupt = kszphy_ack_interrupt, 20551f932c4SChoi, David .config_intr = ksz9021_config_intr, 206d0507009SDavid J. Choi .driver = { .owner = THIS_MODULE, }, 207d5bf9071SChristian Hohnstaedt } }; 208d0507009SDavid J. Choi 209d0507009SDavid J. Choi static int __init ksphy_init(void) 210d0507009SDavid J. Choi { 211d5bf9071SChristian Hohnstaedt return phy_drivers_register(ksphy_driver, 212d5bf9071SChristian Hohnstaedt ARRAY_SIZE(ksphy_driver)); 213d0507009SDavid J. Choi } 214d0507009SDavid J. Choi 215d0507009SDavid J. Choi static void __exit ksphy_exit(void) 216d0507009SDavid J. Choi { 217d5bf9071SChristian Hohnstaedt phy_drivers_unregister(ksphy_driver, 218d5bf9071SChristian Hohnstaedt ARRAY_SIZE(ksphy_driver)); 219d0507009SDavid J. Choi } 220d0507009SDavid J. Choi 221d0507009SDavid J. Choi module_init(ksphy_init); 222d0507009SDavid J. Choi module_exit(ksphy_exit); 223d0507009SDavid J. Choi 224d0507009SDavid J. Choi MODULE_DESCRIPTION("Micrel PHY driver"); 225d0507009SDavid J. Choi MODULE_AUTHOR("David J. Choi"); 226d0507009SDavid J. Choi MODULE_LICENSE("GPL"); 22752a60ed2SDavid S. Miller 228cf93c945SUwe Kleine-König static struct mdio_device_id __maybe_unused micrel_tbl[] = { 22948d7d0adSJason Wang { PHY_ID_KSZ9021, 0x000ffffe }, 230*510d573fSMarek Vasut { PHY_ID_KSZ8001, 0x00ffffff }, 23151f932c4SChoi, David { PHY_ID_KS8737, 0x00fffff0 }, 232212ea99aSMarek Vasut { PHY_ID_KSZ8021, 0x00ffffff }, 233*510d573fSMarek Vasut { PHY_ID_KSZ8041, 0x00fffff0 }, 234*510d573fSMarek Vasut { PHY_ID_KSZ8051, 0x00fffff0 }, 23552a60ed2SDavid S. Miller { } 23652a60ed2SDavid S. Miller }; 23752a60ed2SDavid S. Miller 23852a60ed2SDavid S. Miller MODULE_DEVICE_TABLE(mdio, micrel_tbl); 239