1 /* 2 * drivers/net/phy/marvell.c 3 * 4 * Driver for Marvell PHYs 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 * 10 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de> 11 * 12 * This program is free software; you can redistribute it and/or modify it 13 * under the terms of the GNU General Public License as published by the 14 * Free Software Foundation; either version 2 of the License, or (at your 15 * option) any later version. 16 * 17 */ 18 #include <linux/kernel.h> 19 #include <linux/string.h> 20 #include <linux/ctype.h> 21 #include <linux/errno.h> 22 #include <linux/unistd.h> 23 #include <linux/hwmon.h> 24 #include <linux/interrupt.h> 25 #include <linux/init.h> 26 #include <linux/delay.h> 27 #include <linux/netdevice.h> 28 #include <linux/etherdevice.h> 29 #include <linux/skbuff.h> 30 #include <linux/spinlock.h> 31 #include <linux/mm.h> 32 #include <linux/module.h> 33 #include <linux/mii.h> 34 #include <linux/ethtool.h> 35 #include <linux/phy.h> 36 #include <linux/marvell_phy.h> 37 #include <linux/of.h> 38 39 #include <linux/io.h> 40 #include <asm/irq.h> 41 #include <linux/uaccess.h> 42 43 #define MII_MARVELL_PHY_PAGE 22 44 #define MII_MARVELL_COPPER_PAGE 0x00 45 #define MII_MARVELL_FIBER_PAGE 0x01 46 #define MII_MARVELL_MSCR_PAGE 0x02 47 #define MII_MARVELL_LED_PAGE 0x03 48 #define MII_MARVELL_MISC_TEST_PAGE 0x06 49 #define MII_MARVELL_WOL_PAGE 0x11 50 51 #define MII_M1011_IEVENT 0x13 52 #define MII_M1011_IEVENT_CLEAR 0x0000 53 54 #define MII_M1011_IMASK 0x12 55 #define MII_M1011_IMASK_INIT 0x6400 56 #define MII_M1011_IMASK_CLEAR 0x0000 57 58 #define MII_M1011_PHY_SCR 0x10 59 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11) 60 #define MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT 12 61 #define MII_M1011_PHY_SRC_DOWNSHIFT_MASK 0x7800 62 #define MII_M1011_PHY_SCR_MDI (0x0 << 5) 63 #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5) 64 #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5) 65 66 #define MII_M1111_PHY_LED_CONTROL 0x18 67 #define MII_M1111_PHY_LED_DIRECT 0x4100 68 #define MII_M1111_PHY_LED_COMBINE 0x411c 69 #define MII_M1111_PHY_EXT_CR 0x14 70 #define MII_M1111_RGMII_RX_DELAY BIT(7) 71 #define MII_M1111_RGMII_TX_DELAY BIT(1) 72 #define MII_M1111_PHY_EXT_SR 0x1b 73 74 #define MII_M1111_HWCFG_MODE_MASK 0xf 75 #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3 76 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4 77 #define MII_M1111_HWCFG_MODE_RTBI 0x7 78 #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9 79 #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb 80 #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13) 81 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15) 82 83 #define MII_88E1121_PHY_MSCR_REG 21 84 #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5) 85 #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4) 86 #define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4)) 87 88 #define MII_88E1121_MISC_TEST 0x1a 89 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00 90 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8 91 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7) 92 #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6) 93 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5) 94 #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f 95 96 #define MII_88E1510_TEMP_SENSOR 0x1b 97 #define MII_88E1510_TEMP_SENSOR_MASK 0xff 98 99 #define MII_88E6390_MISC_TEST 0x1b 100 #define MII_88E6390_MISC_TEST_SAMPLE_1S 0 101 #define MII_88E6390_MISC_TEST_SAMPLE_10MS BIT(14) 102 #define MII_88E6390_MISC_TEST_SAMPLE_DISABLE BIT(15) 103 #define MII_88E6390_MISC_TEST_SAMPLE_ENABLE 0 104 #define MII_88E6390_MISC_TEST_SAMPLE_MASK (0x3 << 14) 105 106 #define MII_88E6390_TEMP_SENSOR 0x1c 107 #define MII_88E6390_TEMP_SENSOR_MASK 0xff 108 #define MII_88E6390_TEMP_SENSOR_SAMPLES 10 109 110 #define MII_88E1318S_PHY_MSCR1_REG 16 111 #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6) 112 113 /* Copper Specific Interrupt Enable Register */ 114 #define MII_88E1318S_PHY_CSIER 0x12 115 /* WOL Event Interrupt Enable */ 116 #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7) 117 118 /* LED Timer Control Register */ 119 #define MII_88E1318S_PHY_LED_TCR 0x12 120 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15) 121 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7) 122 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11) 123 124 /* Magic Packet MAC address registers */ 125 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17 126 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18 127 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19 128 129 #define MII_88E1318S_PHY_WOL_CTRL 0x10 130 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12) 131 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14) 132 133 #define MII_PHY_LED_CTRL 16 134 #define MII_88E1121_PHY_LED_DEF 0x0030 135 #define MII_88E1510_PHY_LED_DEF 0x1177 136 137 #define MII_M1011_PHY_STATUS 0x11 138 #define MII_M1011_PHY_STATUS_1000 0x8000 139 #define MII_M1011_PHY_STATUS_100 0x4000 140 #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000 141 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000 142 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800 143 #define MII_M1011_PHY_STATUS_LINK 0x0400 144 145 #define MII_88E3016_PHY_SPEC_CTRL 0x10 146 #define MII_88E3016_DISABLE_SCRAMBLER 0x0200 147 #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030 148 149 #define MII_88E1510_GEN_CTRL_REG_1 0x14 150 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7 151 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */ 152 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */ 153 154 #define LPA_FIBER_1000HALF 0x40 155 #define LPA_FIBER_1000FULL 0x20 156 157 #define LPA_PAUSE_FIBER 0x180 158 #define LPA_PAUSE_ASYM_FIBER 0x100 159 160 #define ADVERTISE_FIBER_1000HALF 0x40 161 #define ADVERTISE_FIBER_1000FULL 0x20 162 163 #define ADVERTISE_PAUSE_FIBER 0x180 164 #define ADVERTISE_PAUSE_ASYM_FIBER 0x100 165 166 #define REGISTER_LINK_STATUS 0x400 167 #define NB_FIBER_STATS 1 168 169 MODULE_DESCRIPTION("Marvell PHY driver"); 170 MODULE_AUTHOR("Andy Fleming"); 171 MODULE_LICENSE("GPL"); 172 173 struct marvell_hw_stat { 174 const char *string; 175 u8 page; 176 u8 reg; 177 u8 bits; 178 }; 179 180 static struct marvell_hw_stat marvell_hw_stats[] = { 181 { "phy_receive_errors_copper", 0, 21, 16}, 182 { "phy_idle_errors", 0, 10, 8 }, 183 { "phy_receive_errors_fiber", 1, 21, 16}, 184 }; 185 186 struct marvell_priv { 187 u64 stats[ARRAY_SIZE(marvell_hw_stats)]; 188 char *hwmon_name; 189 struct device *hwmon_dev; 190 }; 191 192 static int marvell_read_page(struct phy_device *phydev) 193 { 194 return __phy_read(phydev, MII_MARVELL_PHY_PAGE); 195 } 196 197 static int marvell_write_page(struct phy_device *phydev, int page) 198 { 199 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page); 200 } 201 202 static int marvell_set_page(struct phy_device *phydev, int page) 203 { 204 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page); 205 } 206 207 static int marvell_ack_interrupt(struct phy_device *phydev) 208 { 209 int err; 210 211 /* Clear the interrupts by reading the reg */ 212 err = phy_read(phydev, MII_M1011_IEVENT); 213 214 if (err < 0) 215 return err; 216 217 return 0; 218 } 219 220 static int marvell_config_intr(struct phy_device *phydev) 221 { 222 int err; 223 224 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) 225 err = phy_write(phydev, MII_M1011_IMASK, 226 MII_M1011_IMASK_INIT); 227 else 228 err = phy_write(phydev, MII_M1011_IMASK, 229 MII_M1011_IMASK_CLEAR); 230 231 return err; 232 } 233 234 static int marvell_set_polarity(struct phy_device *phydev, int polarity) 235 { 236 int reg; 237 int err; 238 int val; 239 240 /* get the current settings */ 241 reg = phy_read(phydev, MII_M1011_PHY_SCR); 242 if (reg < 0) 243 return reg; 244 245 val = reg; 246 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS; 247 switch (polarity) { 248 case ETH_TP_MDI: 249 val |= MII_M1011_PHY_SCR_MDI; 250 break; 251 case ETH_TP_MDI_X: 252 val |= MII_M1011_PHY_SCR_MDI_X; 253 break; 254 case ETH_TP_MDI_AUTO: 255 case ETH_TP_MDI_INVALID: 256 default: 257 val |= MII_M1011_PHY_SCR_AUTO_CROSS; 258 break; 259 } 260 261 if (val != reg) { 262 /* Set the new polarity value in the register */ 263 err = phy_write(phydev, MII_M1011_PHY_SCR, val); 264 if (err) 265 return err; 266 } 267 268 return val != reg; 269 } 270 271 static int marvell_set_downshift(struct phy_device *phydev, bool enable, 272 u8 retries) 273 { 274 int reg; 275 276 reg = phy_read(phydev, MII_M1011_PHY_SCR); 277 if (reg < 0) 278 return reg; 279 280 reg &= MII_M1011_PHY_SRC_DOWNSHIFT_MASK; 281 reg |= ((retries - 1) << MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT); 282 if (enable) 283 reg |= MII_M1011_PHY_SCR_DOWNSHIFT_EN; 284 285 return phy_write(phydev, MII_M1011_PHY_SCR, reg); 286 } 287 288 static int marvell_config_aneg(struct phy_device *phydev) 289 { 290 int changed = 0; 291 int err; 292 293 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 294 if (err < 0) 295 return err; 296 297 changed = err; 298 299 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL, 300 MII_M1111_PHY_LED_DIRECT); 301 if (err < 0) 302 return err; 303 304 err = genphy_config_aneg(phydev); 305 if (err < 0) 306 return err; 307 308 if (phydev->autoneg != AUTONEG_ENABLE || changed) { 309 /* A write to speed/duplex bits (that is performed by 310 * genphy_config_aneg() call above) must be followed by 311 * a software reset. Otherwise, the write has no effect. 312 */ 313 err = genphy_soft_reset(phydev); 314 if (err < 0) 315 return err; 316 } 317 318 return 0; 319 } 320 321 static int m88e1101_config_aneg(struct phy_device *phydev) 322 { 323 int err; 324 325 /* This Marvell PHY has an errata which requires 326 * that certain registers get written in order 327 * to restart autonegotiation 328 */ 329 err = genphy_soft_reset(phydev); 330 if (err < 0) 331 return err; 332 333 err = phy_write(phydev, 0x1d, 0x1f); 334 if (err < 0) 335 return err; 336 337 err = phy_write(phydev, 0x1e, 0x200c); 338 if (err < 0) 339 return err; 340 341 err = phy_write(phydev, 0x1d, 0x5); 342 if (err < 0) 343 return err; 344 345 err = phy_write(phydev, 0x1e, 0); 346 if (err < 0) 347 return err; 348 349 err = phy_write(phydev, 0x1e, 0x100); 350 if (err < 0) 351 return err; 352 353 return marvell_config_aneg(phydev); 354 } 355 356 #ifdef CONFIG_OF_MDIO 357 /* Set and/or override some configuration registers based on the 358 * marvell,reg-init property stored in the of_node for the phydev. 359 * 360 * marvell,reg-init = <reg-page reg mask value>,...; 361 * 362 * There may be one or more sets of <reg-page reg mask value>: 363 * 364 * reg-page: which register bank to use. 365 * reg: the register. 366 * mask: if non-zero, ANDed with existing register value. 367 * value: ORed with the masked value and written to the regiser. 368 * 369 */ 370 static int marvell_of_reg_init(struct phy_device *phydev) 371 { 372 const __be32 *paddr; 373 int len, i, saved_page, current_page, ret = 0; 374 375 if (!phydev->mdio.dev.of_node) 376 return 0; 377 378 paddr = of_get_property(phydev->mdio.dev.of_node, 379 "marvell,reg-init", &len); 380 if (!paddr || len < (4 * sizeof(*paddr))) 381 return 0; 382 383 saved_page = phy_save_page(phydev); 384 if (saved_page < 0) 385 goto err; 386 current_page = saved_page; 387 388 len /= sizeof(*paddr); 389 for (i = 0; i < len - 3; i += 4) { 390 u16 page = be32_to_cpup(paddr + i); 391 u16 reg = be32_to_cpup(paddr + i + 1); 392 u16 mask = be32_to_cpup(paddr + i + 2); 393 u16 val_bits = be32_to_cpup(paddr + i + 3); 394 int val; 395 396 if (page != current_page) { 397 current_page = page; 398 ret = marvell_write_page(phydev, page); 399 if (ret < 0) 400 goto err; 401 } 402 403 val = 0; 404 if (mask) { 405 val = __phy_read(phydev, reg); 406 if (val < 0) { 407 ret = val; 408 goto err; 409 } 410 val &= mask; 411 } 412 val |= val_bits; 413 414 ret = __phy_write(phydev, reg, val); 415 if (ret < 0) 416 goto err; 417 } 418 err: 419 return phy_restore_page(phydev, saved_page, ret); 420 } 421 #else 422 static int marvell_of_reg_init(struct phy_device *phydev) 423 { 424 return 0; 425 } 426 #endif /* CONFIG_OF_MDIO */ 427 428 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev) 429 { 430 int mscr; 431 432 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) 433 mscr = MII_88E1121_PHY_MSCR_RX_DELAY | 434 MII_88E1121_PHY_MSCR_TX_DELAY; 435 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) 436 mscr = MII_88E1121_PHY_MSCR_RX_DELAY; 437 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) 438 mscr = MII_88E1121_PHY_MSCR_TX_DELAY; 439 else 440 mscr = 0; 441 442 return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, 443 MII_88E1121_PHY_MSCR_REG, 444 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr); 445 } 446 447 static int m88e1121_config_aneg(struct phy_device *phydev) 448 { 449 int changed = 0; 450 int err = 0; 451 452 if (phy_interface_is_rgmii(phydev)) { 453 err = m88e1121_config_aneg_rgmii_delays(phydev); 454 if (err < 0) 455 return err; 456 } 457 458 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 459 if (err < 0) 460 return err; 461 462 changed = err; 463 464 err = genphy_config_aneg(phydev); 465 if (err < 0) 466 return err; 467 468 if (phydev->autoneg != AUTONEG_ENABLE || changed) { 469 /* A software reset is used to ensure a "commit" of the 470 * changes is done. 471 */ 472 err = genphy_soft_reset(phydev); 473 if (err < 0) 474 return err; 475 } 476 477 return 0; 478 } 479 480 static int m88e1318_config_aneg(struct phy_device *phydev) 481 { 482 int err; 483 484 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, 485 MII_88E1318S_PHY_MSCR1_REG, 486 0, MII_88E1318S_PHY_MSCR1_PAD_ODD); 487 if (err < 0) 488 return err; 489 490 return m88e1121_config_aneg(phydev); 491 } 492 493 /** 494 * linkmode_adv_to_fiber_adv_t 495 * @advertise: the linkmode advertisement settings 496 * 497 * A small helper function that translates linkmode advertisement 498 * settings to phy autonegotiation advertisements for the MII_ADV 499 * register for fiber link. 500 */ 501 static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise) 502 { 503 u32 result = 0; 504 505 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise)) 506 result |= ADVERTISE_FIBER_1000HALF; 507 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise)) 508 result |= ADVERTISE_FIBER_1000FULL; 509 510 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) && 511 linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise)) 512 result |= LPA_PAUSE_ASYM_FIBER; 513 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise)) 514 result |= (ADVERTISE_PAUSE_FIBER 515 & (~ADVERTISE_PAUSE_ASYM_FIBER)); 516 517 return result; 518 } 519 520 /** 521 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR 522 * @phydev: target phy_device struct 523 * 524 * Description: If auto-negotiation is enabled, we configure the 525 * advertising, and then restart auto-negotiation. If it is not 526 * enabled, then we write the BMCR. Adapted for fiber link in 527 * some Marvell's devices. 528 */ 529 static int marvell_config_aneg_fiber(struct phy_device *phydev) 530 { 531 int changed = 0; 532 int err; 533 int adv, oldadv; 534 535 if (phydev->autoneg != AUTONEG_ENABLE) 536 return genphy_setup_forced(phydev); 537 538 /* Only allow advertising what this PHY supports */ 539 linkmode_and(phydev->advertising, phydev->advertising, 540 phydev->supported); 541 542 /* Setup fiber advertisement */ 543 adv = phy_read(phydev, MII_ADVERTISE); 544 if (adv < 0) 545 return adv; 546 547 oldadv = adv; 548 adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL 549 | LPA_PAUSE_FIBER); 550 adv |= linkmode_adv_to_fiber_adv_t(phydev->advertising); 551 552 if (adv != oldadv) { 553 err = phy_write(phydev, MII_ADVERTISE, adv); 554 if (err < 0) 555 return err; 556 557 changed = 1; 558 } 559 560 if (changed == 0) { 561 /* Advertisement hasn't changed, but maybe aneg was never on to 562 * begin with? Or maybe phy was isolated? 563 */ 564 int ctl = phy_read(phydev, MII_BMCR); 565 566 if (ctl < 0) 567 return ctl; 568 569 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE)) 570 changed = 1; /* do restart aneg */ 571 } 572 573 /* Only restart aneg if we are advertising something different 574 * than we were before. 575 */ 576 if (changed > 0) 577 changed = genphy_restart_aneg(phydev); 578 579 return changed; 580 } 581 582 static int m88e1510_config_aneg(struct phy_device *phydev) 583 { 584 int err; 585 586 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 587 if (err < 0) 588 goto error; 589 590 /* Configure the copper link first */ 591 err = m88e1318_config_aneg(phydev); 592 if (err < 0) 593 goto error; 594 595 /* Do not touch the fiber page if we're in copper->sgmii mode */ 596 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) 597 return 0; 598 599 /* Then the fiber link */ 600 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 601 if (err < 0) 602 goto error; 603 604 err = marvell_config_aneg_fiber(phydev); 605 if (err < 0) 606 goto error; 607 608 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 609 610 error: 611 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 612 return err; 613 } 614 615 static void marvell_config_led(struct phy_device *phydev) 616 { 617 u16 def_config; 618 int err; 619 620 switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) { 621 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */ 622 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R): 623 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S): 624 def_config = MII_88E1121_PHY_LED_DEF; 625 break; 626 /* Default PHY LED config: 627 * LED[0] .. 1000Mbps Link 628 * LED[1] .. 100Mbps Link 629 * LED[2] .. Blink, Activity 630 */ 631 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510): 632 def_config = MII_88E1510_PHY_LED_DEF; 633 break; 634 default: 635 return; 636 } 637 638 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL, 639 def_config); 640 if (err < 0) 641 phydev_warn(phydev, "Fail to config marvell phy LED.\n"); 642 } 643 644 static int marvell_config_init(struct phy_device *phydev) 645 { 646 /* Set defalut LED */ 647 marvell_config_led(phydev); 648 649 /* Set registers from marvell,reg-init DT property */ 650 return marvell_of_reg_init(phydev); 651 } 652 653 static int m88e1116r_config_init(struct phy_device *phydev) 654 { 655 int err; 656 657 err = genphy_soft_reset(phydev); 658 if (err < 0) 659 return err; 660 661 msleep(500); 662 663 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 664 if (err < 0) 665 return err; 666 667 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 668 if (err < 0) 669 return err; 670 671 err = marvell_set_downshift(phydev, true, 8); 672 if (err < 0) 673 return err; 674 675 if (phy_interface_is_rgmii(phydev)) { 676 err = m88e1121_config_aneg_rgmii_delays(phydev); 677 if (err < 0) 678 return err; 679 } 680 681 err = genphy_soft_reset(phydev); 682 if (err < 0) 683 return err; 684 685 return marvell_config_init(phydev); 686 } 687 688 static int m88e3016_config_init(struct phy_device *phydev) 689 { 690 int ret; 691 692 /* Enable Scrambler and Auto-Crossover */ 693 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL, 694 MII_88E3016_DISABLE_SCRAMBLER, 695 MII_88E3016_AUTO_MDIX_CROSSOVER); 696 if (ret < 0) 697 return ret; 698 699 return marvell_config_init(phydev); 700 } 701 702 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev, 703 u16 mode, 704 int fibre_copper_auto) 705 { 706 if (fibre_copper_auto) 707 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO; 708 709 return phy_modify(phydev, MII_M1111_PHY_EXT_SR, 710 MII_M1111_HWCFG_MODE_MASK | 711 MII_M1111_HWCFG_FIBER_COPPER_AUTO | 712 MII_M1111_HWCFG_FIBER_COPPER_RES, 713 mode); 714 } 715 716 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev) 717 { 718 int delay; 719 720 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { 721 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY; 722 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) { 723 delay = MII_M1111_RGMII_RX_DELAY; 724 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) { 725 delay = MII_M1111_RGMII_TX_DELAY; 726 } else { 727 delay = 0; 728 } 729 730 return phy_modify(phydev, MII_M1111_PHY_EXT_CR, 731 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY, 732 delay); 733 } 734 735 static int m88e1111_config_init_rgmii(struct phy_device *phydev) 736 { 737 int temp; 738 int err; 739 740 err = m88e1111_config_init_rgmii_delays(phydev); 741 if (err < 0) 742 return err; 743 744 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); 745 if (temp < 0) 746 return temp; 747 748 temp &= ~(MII_M1111_HWCFG_MODE_MASK); 749 750 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES) 751 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII; 752 else 753 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII; 754 755 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp); 756 } 757 758 static int m88e1111_config_init_sgmii(struct phy_device *phydev) 759 { 760 int err; 761 762 err = m88e1111_config_init_hwcfg_mode( 763 phydev, 764 MII_M1111_HWCFG_MODE_SGMII_NO_CLK, 765 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 766 if (err < 0) 767 return err; 768 769 /* make sure copper is selected */ 770 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 771 } 772 773 static int m88e1111_config_init_rtbi(struct phy_device *phydev) 774 { 775 int err; 776 777 err = m88e1111_config_init_rgmii_delays(phydev); 778 if (err < 0) 779 return err; 780 781 err = m88e1111_config_init_hwcfg_mode( 782 phydev, 783 MII_M1111_HWCFG_MODE_RTBI, 784 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 785 if (err < 0) 786 return err; 787 788 /* soft reset */ 789 err = genphy_soft_reset(phydev); 790 if (err < 0) 791 return err; 792 793 return m88e1111_config_init_hwcfg_mode( 794 phydev, 795 MII_M1111_HWCFG_MODE_RTBI, 796 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 797 } 798 799 static int m88e1111_config_init(struct phy_device *phydev) 800 { 801 int err; 802 803 if (phy_interface_is_rgmii(phydev)) { 804 err = m88e1111_config_init_rgmii(phydev); 805 if (err < 0) 806 return err; 807 } 808 809 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 810 err = m88e1111_config_init_sgmii(phydev); 811 if (err < 0) 812 return err; 813 } 814 815 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) { 816 err = m88e1111_config_init_rtbi(phydev); 817 if (err < 0) 818 return err; 819 } 820 821 err = marvell_of_reg_init(phydev); 822 if (err < 0) 823 return err; 824 825 return genphy_soft_reset(phydev); 826 } 827 828 static int m88e1318_config_init(struct phy_device *phydev) 829 { 830 if (phy_interrupt_is_valid(phydev)) { 831 int err = phy_modify_paged( 832 phydev, MII_MARVELL_LED_PAGE, 833 MII_88E1318S_PHY_LED_TCR, 834 MII_88E1318S_PHY_LED_TCR_FORCE_INT, 835 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE | 836 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW); 837 if (err < 0) 838 return err; 839 } 840 841 return marvell_config_init(phydev); 842 } 843 844 static int m88e1510_config_init(struct phy_device *phydev) 845 { 846 int err; 847 848 /* SGMII-to-Copper mode initialization */ 849 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 850 u32 pause; 851 852 /* Select page 18 */ 853 err = marvell_set_page(phydev, 18); 854 if (err < 0) 855 return err; 856 857 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */ 858 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 859 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, 860 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII); 861 if (err < 0) 862 return err; 863 864 /* PHY reset is necessary after changing MODE[2:0] */ 865 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0, 866 MII_88E1510_GEN_CTRL_REG_1_RESET); 867 if (err < 0) 868 return err; 869 870 /* Reset page selection */ 871 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 872 if (err < 0) 873 return err; 874 875 /* There appears to be a bug in the 88e1512 when used in 876 * SGMII to copper mode, where the AN advertisement register 877 * clears the pause bits each time a negotiation occurs. 878 * This means we can never be truely sure what was advertised, 879 * so disable Pause support. 880 */ 881 pause = SUPPORTED_Pause | SUPPORTED_Asym_Pause; 882 linkmode_clear_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 883 phydev->supported); 884 linkmode_clear_bit(ETHTOOL_LINK_MODE_Pause_BIT, 885 phydev->supported); 886 linkmode_clear_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 887 phydev->advertising); 888 linkmode_clear_bit(ETHTOOL_LINK_MODE_Pause_BIT, 889 phydev->advertising); 890 } 891 892 return m88e1318_config_init(phydev); 893 } 894 895 static int m88e1118_config_aneg(struct phy_device *phydev) 896 { 897 int err; 898 899 err = genphy_soft_reset(phydev); 900 if (err < 0) 901 return err; 902 903 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 904 if (err < 0) 905 return err; 906 907 err = genphy_config_aneg(phydev); 908 return 0; 909 } 910 911 static int m88e1118_config_init(struct phy_device *phydev) 912 { 913 int err; 914 915 /* Change address */ 916 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); 917 if (err < 0) 918 return err; 919 920 /* Enable 1000 Mbit */ 921 err = phy_write(phydev, 0x15, 0x1070); 922 if (err < 0) 923 return err; 924 925 /* Change address */ 926 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE); 927 if (err < 0) 928 return err; 929 930 /* Adjust LED Control */ 931 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS) 932 err = phy_write(phydev, 0x10, 0x1100); 933 else 934 err = phy_write(phydev, 0x10, 0x021e); 935 if (err < 0) 936 return err; 937 938 err = marvell_of_reg_init(phydev); 939 if (err < 0) 940 return err; 941 942 /* Reset address */ 943 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 944 if (err < 0) 945 return err; 946 947 return genphy_soft_reset(phydev); 948 } 949 950 static int m88e1149_config_init(struct phy_device *phydev) 951 { 952 int err; 953 954 /* Change address */ 955 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); 956 if (err < 0) 957 return err; 958 959 /* Enable 1000 Mbit */ 960 err = phy_write(phydev, 0x15, 0x1048); 961 if (err < 0) 962 return err; 963 964 err = marvell_of_reg_init(phydev); 965 if (err < 0) 966 return err; 967 968 /* Reset address */ 969 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 970 if (err < 0) 971 return err; 972 973 return genphy_soft_reset(phydev); 974 } 975 976 static int m88e1145_config_init_rgmii(struct phy_device *phydev) 977 { 978 int err; 979 980 err = m88e1111_config_init_rgmii_delays(phydev); 981 if (err < 0) 982 return err; 983 984 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) { 985 err = phy_write(phydev, 0x1d, 0x0012); 986 if (err < 0) 987 return err; 988 989 err = phy_modify(phydev, 0x1e, 0x0fc0, 990 2 << 9 | /* 36 ohm */ 991 2 << 6); /* 39 ohm */ 992 if (err < 0) 993 return err; 994 995 err = phy_write(phydev, 0x1d, 0x3); 996 if (err < 0) 997 return err; 998 999 err = phy_write(phydev, 0x1e, 0x8000); 1000 } 1001 return err; 1002 } 1003 1004 static int m88e1145_config_init_sgmii(struct phy_device *phydev) 1005 { 1006 return m88e1111_config_init_hwcfg_mode( 1007 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK, 1008 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 1009 } 1010 1011 static int m88e1145_config_init(struct phy_device *phydev) 1012 { 1013 int err; 1014 1015 /* Take care of errata E0 & E1 */ 1016 err = phy_write(phydev, 0x1d, 0x001b); 1017 if (err < 0) 1018 return err; 1019 1020 err = phy_write(phydev, 0x1e, 0x418f); 1021 if (err < 0) 1022 return err; 1023 1024 err = phy_write(phydev, 0x1d, 0x0016); 1025 if (err < 0) 1026 return err; 1027 1028 err = phy_write(phydev, 0x1e, 0xa2da); 1029 if (err < 0) 1030 return err; 1031 1032 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { 1033 err = m88e1145_config_init_rgmii(phydev); 1034 if (err < 0) 1035 return err; 1036 } 1037 1038 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 1039 err = m88e1145_config_init_sgmii(phydev); 1040 if (err < 0) 1041 return err; 1042 } 1043 1044 err = marvell_of_reg_init(phydev); 1045 if (err < 0) 1046 return err; 1047 1048 return 0; 1049 } 1050 1051 /** 1052 * fiber_lpa_to_linkmode_lpa_t 1053 * @advertising: the linkmode advertisement settings 1054 * @lpa: value of the MII_LPA register for fiber link 1055 * 1056 * A small helper function that translates MII_LPA 1057 * bits to linkmode LP advertisement settings. 1058 */ 1059 static void fiber_lpa_to_linkmode_lpa_t(unsigned long *advertising, u32 lpa) 1060 { 1061 if (lpa & LPA_FIBER_1000HALF) 1062 linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, 1063 advertising); 1064 if (lpa & LPA_FIBER_1000FULL) 1065 linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, 1066 advertising); 1067 } 1068 1069 /** 1070 * marvell_update_link - update link status in real time in @phydev 1071 * @phydev: target phy_device struct 1072 * 1073 * Description: Update the value in phydev->link to reflect the 1074 * current link value. 1075 */ 1076 static int marvell_update_link(struct phy_device *phydev, int fiber) 1077 { 1078 int status; 1079 1080 /* Use the generic register for copper link, or specific 1081 * register for fiber case 1082 */ 1083 if (fiber) { 1084 status = phy_read(phydev, MII_M1011_PHY_STATUS); 1085 if (status < 0) 1086 return status; 1087 1088 if ((status & REGISTER_LINK_STATUS) == 0) 1089 phydev->link = 0; 1090 else 1091 phydev->link = 1; 1092 } else { 1093 return genphy_update_link(phydev); 1094 } 1095 1096 return 0; 1097 } 1098 1099 static int marvell_read_status_page_an(struct phy_device *phydev, 1100 int fiber) 1101 { 1102 int status; 1103 int lpa; 1104 int lpagb; 1105 1106 status = phy_read(phydev, MII_M1011_PHY_STATUS); 1107 if (status < 0) 1108 return status; 1109 1110 lpa = phy_read(phydev, MII_LPA); 1111 if (lpa < 0) 1112 return lpa; 1113 1114 lpagb = phy_read(phydev, MII_STAT1000); 1115 if (lpagb < 0) 1116 return lpagb; 1117 1118 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX) 1119 phydev->duplex = DUPLEX_FULL; 1120 else 1121 phydev->duplex = DUPLEX_HALF; 1122 1123 status = status & MII_M1011_PHY_STATUS_SPD_MASK; 1124 phydev->pause = 0; 1125 phydev->asym_pause = 0; 1126 1127 switch (status) { 1128 case MII_M1011_PHY_STATUS_1000: 1129 phydev->speed = SPEED_1000; 1130 break; 1131 1132 case MII_M1011_PHY_STATUS_100: 1133 phydev->speed = SPEED_100; 1134 break; 1135 1136 default: 1137 phydev->speed = SPEED_10; 1138 break; 1139 } 1140 1141 if (!fiber) { 1142 mii_lpa_to_linkmode_lpa_t(phydev->lp_advertising, lpa); 1143 mii_stat1000_to_linkmode_lpa_t(phydev->lp_advertising, lpagb); 1144 1145 if (phydev->duplex == DUPLEX_FULL) { 1146 phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0; 1147 phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0; 1148 } 1149 } else { 1150 /* The fiber link is only 1000M capable */ 1151 fiber_lpa_to_linkmode_lpa_t(phydev->lp_advertising, lpa); 1152 1153 if (phydev->duplex == DUPLEX_FULL) { 1154 if (!(lpa & LPA_PAUSE_FIBER)) { 1155 phydev->pause = 0; 1156 phydev->asym_pause = 0; 1157 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) { 1158 phydev->pause = 1; 1159 phydev->asym_pause = 1; 1160 } else { 1161 phydev->pause = 1; 1162 phydev->asym_pause = 0; 1163 } 1164 } 1165 } 1166 return 0; 1167 } 1168 1169 static int marvell_read_status_page_fixed(struct phy_device *phydev) 1170 { 1171 int bmcr = phy_read(phydev, MII_BMCR); 1172 1173 if (bmcr < 0) 1174 return bmcr; 1175 1176 if (bmcr & BMCR_FULLDPLX) 1177 phydev->duplex = DUPLEX_FULL; 1178 else 1179 phydev->duplex = DUPLEX_HALF; 1180 1181 if (bmcr & BMCR_SPEED1000) 1182 phydev->speed = SPEED_1000; 1183 else if (bmcr & BMCR_SPEED100) 1184 phydev->speed = SPEED_100; 1185 else 1186 phydev->speed = SPEED_10; 1187 1188 phydev->pause = 0; 1189 phydev->asym_pause = 0; 1190 linkmode_zero(phydev->lp_advertising); 1191 1192 return 0; 1193 } 1194 1195 /* marvell_read_status_page 1196 * 1197 * Description: 1198 * Check the link, then figure out the current state 1199 * by comparing what we advertise with what the link partner 1200 * advertises. Start by checking the gigabit possibilities, 1201 * then move on to 10/100. 1202 */ 1203 static int marvell_read_status_page(struct phy_device *phydev, int page) 1204 { 1205 int fiber; 1206 int err; 1207 1208 /* Detect and update the link, but return if there 1209 * was an error 1210 */ 1211 if (page == MII_MARVELL_FIBER_PAGE) 1212 fiber = 1; 1213 else 1214 fiber = 0; 1215 1216 err = marvell_update_link(phydev, fiber); 1217 if (err) 1218 return err; 1219 1220 if (phydev->autoneg == AUTONEG_ENABLE) 1221 err = marvell_read_status_page_an(phydev, fiber); 1222 else 1223 err = marvell_read_status_page_fixed(phydev); 1224 1225 return err; 1226 } 1227 1228 /* marvell_read_status 1229 * 1230 * Some Marvell's phys have two modes: fiber and copper. 1231 * Both need status checked. 1232 * Description: 1233 * First, check the fiber link and status. 1234 * If the fiber link is down, check the copper link and status which 1235 * will be the default value if both link are down. 1236 */ 1237 static int marvell_read_status(struct phy_device *phydev) 1238 { 1239 int err; 1240 1241 /* Check the fiber mode first */ 1242 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1243 phydev->supported) && 1244 phydev->interface != PHY_INTERFACE_MODE_SGMII) { 1245 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1246 if (err < 0) 1247 goto error; 1248 1249 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE); 1250 if (err < 0) 1251 goto error; 1252 1253 /* If the fiber link is up, it is the selected and 1254 * used link. In this case, we need to stay in the 1255 * fiber page. Please to be careful about that, avoid 1256 * to restore Copper page in other functions which 1257 * could break the behaviour for some fiber phy like 1258 * 88E1512. 1259 */ 1260 if (phydev->link) 1261 return 0; 1262 1263 /* If fiber link is down, check and save copper mode state */ 1264 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1265 if (err < 0) 1266 goto error; 1267 } 1268 1269 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE); 1270 1271 error: 1272 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1273 return err; 1274 } 1275 1276 /* marvell_suspend 1277 * 1278 * Some Marvell's phys have two modes: fiber and copper. 1279 * Both need to be suspended 1280 */ 1281 static int marvell_suspend(struct phy_device *phydev) 1282 { 1283 int err; 1284 1285 /* Suspend the fiber mode first */ 1286 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1287 phydev->supported)) { 1288 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1289 if (err < 0) 1290 goto error; 1291 1292 /* With the page set, use the generic suspend */ 1293 err = genphy_suspend(phydev); 1294 if (err < 0) 1295 goto error; 1296 1297 /* Then, the copper link */ 1298 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1299 if (err < 0) 1300 goto error; 1301 } 1302 1303 /* With the page set, use the generic suspend */ 1304 return genphy_suspend(phydev); 1305 1306 error: 1307 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1308 return err; 1309 } 1310 1311 /* marvell_resume 1312 * 1313 * Some Marvell's phys have two modes: fiber and copper. 1314 * Both need to be resumed 1315 */ 1316 static int marvell_resume(struct phy_device *phydev) 1317 { 1318 int err; 1319 1320 /* Resume the fiber mode first */ 1321 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1322 phydev->supported)) { 1323 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1324 if (err < 0) 1325 goto error; 1326 1327 /* With the page set, use the generic resume */ 1328 err = genphy_resume(phydev); 1329 if (err < 0) 1330 goto error; 1331 1332 /* Then, the copper link */ 1333 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1334 if (err < 0) 1335 goto error; 1336 } 1337 1338 /* With the page set, use the generic resume */ 1339 return genphy_resume(phydev); 1340 1341 error: 1342 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1343 return err; 1344 } 1345 1346 static int marvell_aneg_done(struct phy_device *phydev) 1347 { 1348 int retval = phy_read(phydev, MII_M1011_PHY_STATUS); 1349 1350 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED); 1351 } 1352 1353 static int m88e1121_did_interrupt(struct phy_device *phydev) 1354 { 1355 int imask; 1356 1357 imask = phy_read(phydev, MII_M1011_IEVENT); 1358 1359 if (imask & MII_M1011_IMASK_INIT) 1360 return 1; 1361 1362 return 0; 1363 } 1364 1365 static void m88e1318_get_wol(struct phy_device *phydev, 1366 struct ethtool_wolinfo *wol) 1367 { 1368 int oldpage, ret = 0; 1369 1370 wol->supported = WAKE_MAGIC; 1371 wol->wolopts = 0; 1372 1373 oldpage = phy_select_page(phydev, MII_MARVELL_WOL_PAGE); 1374 if (oldpage < 0) 1375 goto error; 1376 1377 ret = __phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL); 1378 if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE) 1379 wol->wolopts |= WAKE_MAGIC; 1380 1381 error: 1382 phy_restore_page(phydev, oldpage, ret); 1383 } 1384 1385 static int m88e1318_set_wol(struct phy_device *phydev, 1386 struct ethtool_wolinfo *wol) 1387 { 1388 int err = 0, oldpage; 1389 1390 oldpage = phy_save_page(phydev); 1391 if (oldpage < 0) 1392 goto error; 1393 1394 if (wol->wolopts & WAKE_MAGIC) { 1395 /* Explicitly switch to page 0x00, just to be sure */ 1396 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE); 1397 if (err < 0) 1398 goto error; 1399 1400 /* If WOL event happened once, the LED[2] interrupt pin 1401 * will not be cleared unless we reading the interrupt status 1402 * register. If interrupts are in use, the normal interrupt 1403 * handling will clear the WOL event. Clear the WOL event 1404 * before enabling it if !phy_interrupt_is_valid() 1405 */ 1406 if (!phy_interrupt_is_valid(phydev)) 1407 phy_read(phydev, MII_M1011_IEVENT); 1408 1409 /* Enable the WOL interrupt */ 1410 err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0, 1411 MII_88E1318S_PHY_CSIER_WOL_EIE); 1412 if (err < 0) 1413 goto error; 1414 1415 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE); 1416 if (err < 0) 1417 goto error; 1418 1419 /* Setup LED[2] as interrupt pin (active low) */ 1420 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR, 1421 MII_88E1318S_PHY_LED_TCR_FORCE_INT, 1422 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE | 1423 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW); 1424 if (err < 0) 1425 goto error; 1426 1427 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 1428 if (err < 0) 1429 goto error; 1430 1431 /* Store the device address for the magic packet */ 1432 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2, 1433 ((phydev->attached_dev->dev_addr[5] << 8) | 1434 phydev->attached_dev->dev_addr[4])); 1435 if (err < 0) 1436 goto error; 1437 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1, 1438 ((phydev->attached_dev->dev_addr[3] << 8) | 1439 phydev->attached_dev->dev_addr[2])); 1440 if (err < 0) 1441 goto error; 1442 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0, 1443 ((phydev->attached_dev->dev_addr[1] << 8) | 1444 phydev->attached_dev->dev_addr[0])); 1445 if (err < 0) 1446 goto error; 1447 1448 /* Clear WOL status and enable magic packet matching */ 1449 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0, 1450 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS | 1451 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE); 1452 if (err < 0) 1453 goto error; 1454 } else { 1455 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 1456 if (err < 0) 1457 goto error; 1458 1459 /* Clear WOL status and disable magic packet matching */ 1460 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 1461 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE, 1462 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS); 1463 if (err < 0) 1464 goto error; 1465 } 1466 1467 error: 1468 return phy_restore_page(phydev, oldpage, err); 1469 } 1470 1471 static int marvell_get_sset_count(struct phy_device *phydev) 1472 { 1473 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1474 phydev->supported)) 1475 return ARRAY_SIZE(marvell_hw_stats); 1476 else 1477 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS; 1478 } 1479 1480 static void marvell_get_strings(struct phy_device *phydev, u8 *data) 1481 { 1482 int i; 1483 1484 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) { 1485 strlcpy(data + i * ETH_GSTRING_LEN, 1486 marvell_hw_stats[i].string, ETH_GSTRING_LEN); 1487 } 1488 } 1489 1490 static u64 marvell_get_stat(struct phy_device *phydev, int i) 1491 { 1492 struct marvell_hw_stat stat = marvell_hw_stats[i]; 1493 struct marvell_priv *priv = phydev->priv; 1494 int val; 1495 u64 ret; 1496 1497 val = phy_read_paged(phydev, stat.page, stat.reg); 1498 if (val < 0) { 1499 ret = U64_MAX; 1500 } else { 1501 val = val & ((1 << stat.bits) - 1); 1502 priv->stats[i] += val; 1503 ret = priv->stats[i]; 1504 } 1505 1506 return ret; 1507 } 1508 1509 static void marvell_get_stats(struct phy_device *phydev, 1510 struct ethtool_stats *stats, u64 *data) 1511 { 1512 int i; 1513 1514 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) 1515 data[i] = marvell_get_stat(phydev, i); 1516 } 1517 1518 #ifdef CONFIG_HWMON 1519 static int m88e1121_get_temp(struct phy_device *phydev, long *temp) 1520 { 1521 int oldpage; 1522 int ret = 0; 1523 int val; 1524 1525 *temp = 0; 1526 1527 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 1528 if (oldpage < 0) 1529 goto error; 1530 1531 /* Enable temperature sensor */ 1532 ret = __phy_read(phydev, MII_88E1121_MISC_TEST); 1533 if (ret < 0) 1534 goto error; 1535 1536 ret = __phy_write(phydev, MII_88E1121_MISC_TEST, 1537 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); 1538 if (ret < 0) 1539 goto error; 1540 1541 /* Wait for temperature to stabilize */ 1542 usleep_range(10000, 12000); 1543 1544 val = __phy_read(phydev, MII_88E1121_MISC_TEST); 1545 if (val < 0) { 1546 ret = val; 1547 goto error; 1548 } 1549 1550 /* Disable temperature sensor */ 1551 ret = __phy_write(phydev, MII_88E1121_MISC_TEST, 1552 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); 1553 if (ret < 0) 1554 goto error; 1555 1556 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000; 1557 1558 error: 1559 return phy_restore_page(phydev, oldpage, ret); 1560 } 1561 1562 static int m88e1121_hwmon_read(struct device *dev, 1563 enum hwmon_sensor_types type, 1564 u32 attr, int channel, long *temp) 1565 { 1566 struct phy_device *phydev = dev_get_drvdata(dev); 1567 int err; 1568 1569 switch (attr) { 1570 case hwmon_temp_input: 1571 err = m88e1121_get_temp(phydev, temp); 1572 break; 1573 default: 1574 return -EOPNOTSUPP; 1575 } 1576 1577 return err; 1578 } 1579 1580 static umode_t m88e1121_hwmon_is_visible(const void *data, 1581 enum hwmon_sensor_types type, 1582 u32 attr, int channel) 1583 { 1584 if (type != hwmon_temp) 1585 return 0; 1586 1587 switch (attr) { 1588 case hwmon_temp_input: 1589 return 0444; 1590 default: 1591 return 0; 1592 } 1593 } 1594 1595 static u32 m88e1121_hwmon_chip_config[] = { 1596 HWMON_C_REGISTER_TZ, 1597 0 1598 }; 1599 1600 static const struct hwmon_channel_info m88e1121_hwmon_chip = { 1601 .type = hwmon_chip, 1602 .config = m88e1121_hwmon_chip_config, 1603 }; 1604 1605 static u32 m88e1121_hwmon_temp_config[] = { 1606 HWMON_T_INPUT, 1607 0 1608 }; 1609 1610 static const struct hwmon_channel_info m88e1121_hwmon_temp = { 1611 .type = hwmon_temp, 1612 .config = m88e1121_hwmon_temp_config, 1613 }; 1614 1615 static const struct hwmon_channel_info *m88e1121_hwmon_info[] = { 1616 &m88e1121_hwmon_chip, 1617 &m88e1121_hwmon_temp, 1618 NULL 1619 }; 1620 1621 static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = { 1622 .is_visible = m88e1121_hwmon_is_visible, 1623 .read = m88e1121_hwmon_read, 1624 }; 1625 1626 static const struct hwmon_chip_info m88e1121_hwmon_chip_info = { 1627 .ops = &m88e1121_hwmon_hwmon_ops, 1628 .info = m88e1121_hwmon_info, 1629 }; 1630 1631 static int m88e1510_get_temp(struct phy_device *phydev, long *temp) 1632 { 1633 int ret; 1634 1635 *temp = 0; 1636 1637 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1638 MII_88E1510_TEMP_SENSOR); 1639 if (ret < 0) 1640 return ret; 1641 1642 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000; 1643 1644 return 0; 1645 } 1646 1647 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp) 1648 { 1649 int ret; 1650 1651 *temp = 0; 1652 1653 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1654 MII_88E1121_MISC_TEST); 1655 if (ret < 0) 1656 return ret; 1657 1658 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >> 1659 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25; 1660 /* convert to mC */ 1661 *temp *= 1000; 1662 1663 return 0; 1664 } 1665 1666 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp) 1667 { 1668 temp = temp / 1000; 1669 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f); 1670 1671 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1672 MII_88E1121_MISC_TEST, 1673 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK, 1674 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT); 1675 } 1676 1677 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm) 1678 { 1679 int ret; 1680 1681 *alarm = false; 1682 1683 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1684 MII_88E1121_MISC_TEST); 1685 if (ret < 0) 1686 return ret; 1687 1688 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ); 1689 1690 return 0; 1691 } 1692 1693 static int m88e1510_hwmon_read(struct device *dev, 1694 enum hwmon_sensor_types type, 1695 u32 attr, int channel, long *temp) 1696 { 1697 struct phy_device *phydev = dev_get_drvdata(dev); 1698 int err; 1699 1700 switch (attr) { 1701 case hwmon_temp_input: 1702 err = m88e1510_get_temp(phydev, temp); 1703 break; 1704 case hwmon_temp_crit: 1705 err = m88e1510_get_temp_critical(phydev, temp); 1706 break; 1707 case hwmon_temp_max_alarm: 1708 err = m88e1510_get_temp_alarm(phydev, temp); 1709 break; 1710 default: 1711 return -EOPNOTSUPP; 1712 } 1713 1714 return err; 1715 } 1716 1717 static int m88e1510_hwmon_write(struct device *dev, 1718 enum hwmon_sensor_types type, 1719 u32 attr, int channel, long temp) 1720 { 1721 struct phy_device *phydev = dev_get_drvdata(dev); 1722 int err; 1723 1724 switch (attr) { 1725 case hwmon_temp_crit: 1726 err = m88e1510_set_temp_critical(phydev, temp); 1727 break; 1728 default: 1729 return -EOPNOTSUPP; 1730 } 1731 return err; 1732 } 1733 1734 static umode_t m88e1510_hwmon_is_visible(const void *data, 1735 enum hwmon_sensor_types type, 1736 u32 attr, int channel) 1737 { 1738 if (type != hwmon_temp) 1739 return 0; 1740 1741 switch (attr) { 1742 case hwmon_temp_input: 1743 case hwmon_temp_max_alarm: 1744 return 0444; 1745 case hwmon_temp_crit: 1746 return 0644; 1747 default: 1748 return 0; 1749 } 1750 } 1751 1752 static u32 m88e1510_hwmon_temp_config[] = { 1753 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM, 1754 0 1755 }; 1756 1757 static const struct hwmon_channel_info m88e1510_hwmon_temp = { 1758 .type = hwmon_temp, 1759 .config = m88e1510_hwmon_temp_config, 1760 }; 1761 1762 static const struct hwmon_channel_info *m88e1510_hwmon_info[] = { 1763 &m88e1121_hwmon_chip, 1764 &m88e1510_hwmon_temp, 1765 NULL 1766 }; 1767 1768 static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = { 1769 .is_visible = m88e1510_hwmon_is_visible, 1770 .read = m88e1510_hwmon_read, 1771 .write = m88e1510_hwmon_write, 1772 }; 1773 1774 static const struct hwmon_chip_info m88e1510_hwmon_chip_info = { 1775 .ops = &m88e1510_hwmon_hwmon_ops, 1776 .info = m88e1510_hwmon_info, 1777 }; 1778 1779 static int m88e6390_get_temp(struct phy_device *phydev, long *temp) 1780 { 1781 int sum = 0; 1782 int oldpage; 1783 int ret = 0; 1784 int i; 1785 1786 *temp = 0; 1787 1788 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 1789 if (oldpage < 0) 1790 goto error; 1791 1792 /* Enable temperature sensor */ 1793 ret = __phy_read(phydev, MII_88E6390_MISC_TEST); 1794 if (ret < 0) 1795 goto error; 1796 1797 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK; 1798 ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE | 1799 MII_88E6390_MISC_TEST_SAMPLE_1S; 1800 1801 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); 1802 if (ret < 0) 1803 goto error; 1804 1805 /* Wait for temperature to stabilize */ 1806 usleep_range(10000, 12000); 1807 1808 /* Reading the temperature sense has an errata. You need to read 1809 * a number of times and take an average. 1810 */ 1811 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) { 1812 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR); 1813 if (ret < 0) 1814 goto error; 1815 sum += ret & MII_88E6390_TEMP_SENSOR_MASK; 1816 } 1817 1818 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES; 1819 *temp = (sum - 75) * 1000; 1820 1821 /* Disable temperature sensor */ 1822 ret = __phy_read(phydev, MII_88E6390_MISC_TEST); 1823 if (ret < 0) 1824 goto error; 1825 1826 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK; 1827 ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE; 1828 1829 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); 1830 1831 error: 1832 phy_restore_page(phydev, oldpage, ret); 1833 1834 return ret; 1835 } 1836 1837 static int m88e6390_hwmon_read(struct device *dev, 1838 enum hwmon_sensor_types type, 1839 u32 attr, int channel, long *temp) 1840 { 1841 struct phy_device *phydev = dev_get_drvdata(dev); 1842 int err; 1843 1844 switch (attr) { 1845 case hwmon_temp_input: 1846 err = m88e6390_get_temp(phydev, temp); 1847 break; 1848 default: 1849 return -EOPNOTSUPP; 1850 } 1851 1852 return err; 1853 } 1854 1855 static umode_t m88e6390_hwmon_is_visible(const void *data, 1856 enum hwmon_sensor_types type, 1857 u32 attr, int channel) 1858 { 1859 if (type != hwmon_temp) 1860 return 0; 1861 1862 switch (attr) { 1863 case hwmon_temp_input: 1864 return 0444; 1865 default: 1866 return 0; 1867 } 1868 } 1869 1870 static u32 m88e6390_hwmon_temp_config[] = { 1871 HWMON_T_INPUT, 1872 0 1873 }; 1874 1875 static const struct hwmon_channel_info m88e6390_hwmon_temp = { 1876 .type = hwmon_temp, 1877 .config = m88e6390_hwmon_temp_config, 1878 }; 1879 1880 static const struct hwmon_channel_info *m88e6390_hwmon_info[] = { 1881 &m88e1121_hwmon_chip, 1882 &m88e6390_hwmon_temp, 1883 NULL 1884 }; 1885 1886 static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = { 1887 .is_visible = m88e6390_hwmon_is_visible, 1888 .read = m88e6390_hwmon_read, 1889 }; 1890 1891 static const struct hwmon_chip_info m88e6390_hwmon_chip_info = { 1892 .ops = &m88e6390_hwmon_hwmon_ops, 1893 .info = m88e6390_hwmon_info, 1894 }; 1895 1896 static int marvell_hwmon_name(struct phy_device *phydev) 1897 { 1898 struct marvell_priv *priv = phydev->priv; 1899 struct device *dev = &phydev->mdio.dev; 1900 const char *devname = dev_name(dev); 1901 size_t len = strlen(devname); 1902 int i, j; 1903 1904 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL); 1905 if (!priv->hwmon_name) 1906 return -ENOMEM; 1907 1908 for (i = j = 0; i < len && devname[i]; i++) { 1909 if (isalnum(devname[i])) 1910 priv->hwmon_name[j++] = devname[i]; 1911 } 1912 1913 return 0; 1914 } 1915 1916 static int marvell_hwmon_probe(struct phy_device *phydev, 1917 const struct hwmon_chip_info *chip) 1918 { 1919 struct marvell_priv *priv = phydev->priv; 1920 struct device *dev = &phydev->mdio.dev; 1921 int err; 1922 1923 err = marvell_hwmon_name(phydev); 1924 if (err) 1925 return err; 1926 1927 priv->hwmon_dev = devm_hwmon_device_register_with_info( 1928 dev, priv->hwmon_name, phydev, chip, NULL); 1929 1930 return PTR_ERR_OR_ZERO(priv->hwmon_dev); 1931 } 1932 1933 static int m88e1121_hwmon_probe(struct phy_device *phydev) 1934 { 1935 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info); 1936 } 1937 1938 static int m88e1510_hwmon_probe(struct phy_device *phydev) 1939 { 1940 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info); 1941 } 1942 1943 static int m88e6390_hwmon_probe(struct phy_device *phydev) 1944 { 1945 return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info); 1946 } 1947 #else 1948 static int m88e1121_hwmon_probe(struct phy_device *phydev) 1949 { 1950 return 0; 1951 } 1952 1953 static int m88e1510_hwmon_probe(struct phy_device *phydev) 1954 { 1955 return 0; 1956 } 1957 1958 static int m88e6390_hwmon_probe(struct phy_device *phydev) 1959 { 1960 return 0; 1961 } 1962 #endif 1963 1964 static int marvell_probe(struct phy_device *phydev) 1965 { 1966 struct marvell_priv *priv; 1967 1968 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL); 1969 if (!priv) 1970 return -ENOMEM; 1971 1972 phydev->priv = priv; 1973 1974 return 0; 1975 } 1976 1977 static int m88e1121_probe(struct phy_device *phydev) 1978 { 1979 int err; 1980 1981 err = marvell_probe(phydev); 1982 if (err) 1983 return err; 1984 1985 return m88e1121_hwmon_probe(phydev); 1986 } 1987 1988 static int m88e1510_probe(struct phy_device *phydev) 1989 { 1990 int err; 1991 1992 err = marvell_probe(phydev); 1993 if (err) 1994 return err; 1995 1996 return m88e1510_hwmon_probe(phydev); 1997 } 1998 1999 static int m88e6390_probe(struct phy_device *phydev) 2000 { 2001 int err; 2002 2003 err = marvell_probe(phydev); 2004 if (err) 2005 return err; 2006 2007 return m88e6390_hwmon_probe(phydev); 2008 } 2009 2010 static struct phy_driver marvell_drivers[] = { 2011 { 2012 .phy_id = MARVELL_PHY_ID_88E1101, 2013 .phy_id_mask = MARVELL_PHY_ID_MASK, 2014 .name = "Marvell 88E1101", 2015 .features = PHY_GBIT_FEATURES, 2016 .probe = marvell_probe, 2017 .config_init = &marvell_config_init, 2018 .config_aneg = &m88e1101_config_aneg, 2019 .ack_interrupt = &marvell_ack_interrupt, 2020 .config_intr = &marvell_config_intr, 2021 .resume = &genphy_resume, 2022 .suspend = &genphy_suspend, 2023 .read_page = marvell_read_page, 2024 .write_page = marvell_write_page, 2025 .get_sset_count = marvell_get_sset_count, 2026 .get_strings = marvell_get_strings, 2027 .get_stats = marvell_get_stats, 2028 }, 2029 { 2030 .phy_id = MARVELL_PHY_ID_88E1112, 2031 .phy_id_mask = MARVELL_PHY_ID_MASK, 2032 .name = "Marvell 88E1112", 2033 .features = PHY_GBIT_FEATURES, 2034 .probe = marvell_probe, 2035 .config_init = &m88e1111_config_init, 2036 .config_aneg = &marvell_config_aneg, 2037 .ack_interrupt = &marvell_ack_interrupt, 2038 .config_intr = &marvell_config_intr, 2039 .resume = &genphy_resume, 2040 .suspend = &genphy_suspend, 2041 .read_page = marvell_read_page, 2042 .write_page = marvell_write_page, 2043 .get_sset_count = marvell_get_sset_count, 2044 .get_strings = marvell_get_strings, 2045 .get_stats = marvell_get_stats, 2046 }, 2047 { 2048 .phy_id = MARVELL_PHY_ID_88E1111, 2049 .phy_id_mask = MARVELL_PHY_ID_MASK, 2050 .name = "Marvell 88E1111", 2051 .features = PHY_GBIT_FEATURES, 2052 .probe = marvell_probe, 2053 .config_init = &m88e1111_config_init, 2054 .config_aneg = &marvell_config_aneg, 2055 .read_status = &marvell_read_status, 2056 .ack_interrupt = &marvell_ack_interrupt, 2057 .config_intr = &marvell_config_intr, 2058 .resume = &genphy_resume, 2059 .suspend = &genphy_suspend, 2060 .read_page = marvell_read_page, 2061 .write_page = marvell_write_page, 2062 .get_sset_count = marvell_get_sset_count, 2063 .get_strings = marvell_get_strings, 2064 .get_stats = marvell_get_stats, 2065 }, 2066 { 2067 .phy_id = MARVELL_PHY_ID_88E1118, 2068 .phy_id_mask = MARVELL_PHY_ID_MASK, 2069 .name = "Marvell 88E1118", 2070 .features = PHY_GBIT_FEATURES, 2071 .probe = marvell_probe, 2072 .config_init = &m88e1118_config_init, 2073 .config_aneg = &m88e1118_config_aneg, 2074 .ack_interrupt = &marvell_ack_interrupt, 2075 .config_intr = &marvell_config_intr, 2076 .resume = &genphy_resume, 2077 .suspend = &genphy_suspend, 2078 .read_page = marvell_read_page, 2079 .write_page = marvell_write_page, 2080 .get_sset_count = marvell_get_sset_count, 2081 .get_strings = marvell_get_strings, 2082 .get_stats = marvell_get_stats, 2083 }, 2084 { 2085 .phy_id = MARVELL_PHY_ID_88E1121R, 2086 .phy_id_mask = MARVELL_PHY_ID_MASK, 2087 .name = "Marvell 88E1121R", 2088 .features = PHY_GBIT_FEATURES, 2089 .probe = &m88e1121_probe, 2090 .config_init = &marvell_config_init, 2091 .config_aneg = &m88e1121_config_aneg, 2092 .read_status = &marvell_read_status, 2093 .ack_interrupt = &marvell_ack_interrupt, 2094 .config_intr = &marvell_config_intr, 2095 .did_interrupt = &m88e1121_did_interrupt, 2096 .resume = &genphy_resume, 2097 .suspend = &genphy_suspend, 2098 .read_page = marvell_read_page, 2099 .write_page = marvell_write_page, 2100 .get_sset_count = marvell_get_sset_count, 2101 .get_strings = marvell_get_strings, 2102 .get_stats = marvell_get_stats, 2103 }, 2104 { 2105 .phy_id = MARVELL_PHY_ID_88E1318S, 2106 .phy_id_mask = MARVELL_PHY_ID_MASK, 2107 .name = "Marvell 88E1318S", 2108 .features = PHY_GBIT_FEATURES, 2109 .probe = marvell_probe, 2110 .config_init = &m88e1318_config_init, 2111 .config_aneg = &m88e1318_config_aneg, 2112 .read_status = &marvell_read_status, 2113 .ack_interrupt = &marvell_ack_interrupt, 2114 .config_intr = &marvell_config_intr, 2115 .did_interrupt = &m88e1121_did_interrupt, 2116 .get_wol = &m88e1318_get_wol, 2117 .set_wol = &m88e1318_set_wol, 2118 .resume = &genphy_resume, 2119 .suspend = &genphy_suspend, 2120 .read_page = marvell_read_page, 2121 .write_page = marvell_write_page, 2122 .get_sset_count = marvell_get_sset_count, 2123 .get_strings = marvell_get_strings, 2124 .get_stats = marvell_get_stats, 2125 }, 2126 { 2127 .phy_id = MARVELL_PHY_ID_88E1145, 2128 .phy_id_mask = MARVELL_PHY_ID_MASK, 2129 .name = "Marvell 88E1145", 2130 .features = PHY_GBIT_FEATURES, 2131 .probe = marvell_probe, 2132 .config_init = &m88e1145_config_init, 2133 .config_aneg = &m88e1101_config_aneg, 2134 .read_status = &genphy_read_status, 2135 .ack_interrupt = &marvell_ack_interrupt, 2136 .config_intr = &marvell_config_intr, 2137 .resume = &genphy_resume, 2138 .suspend = &genphy_suspend, 2139 .read_page = marvell_read_page, 2140 .write_page = marvell_write_page, 2141 .get_sset_count = marvell_get_sset_count, 2142 .get_strings = marvell_get_strings, 2143 .get_stats = marvell_get_stats, 2144 }, 2145 { 2146 .phy_id = MARVELL_PHY_ID_88E1149R, 2147 .phy_id_mask = MARVELL_PHY_ID_MASK, 2148 .name = "Marvell 88E1149R", 2149 .features = PHY_GBIT_FEATURES, 2150 .probe = marvell_probe, 2151 .config_init = &m88e1149_config_init, 2152 .config_aneg = &m88e1118_config_aneg, 2153 .ack_interrupt = &marvell_ack_interrupt, 2154 .config_intr = &marvell_config_intr, 2155 .resume = &genphy_resume, 2156 .suspend = &genphy_suspend, 2157 .read_page = marvell_read_page, 2158 .write_page = marvell_write_page, 2159 .get_sset_count = marvell_get_sset_count, 2160 .get_strings = marvell_get_strings, 2161 .get_stats = marvell_get_stats, 2162 }, 2163 { 2164 .phy_id = MARVELL_PHY_ID_88E1240, 2165 .phy_id_mask = MARVELL_PHY_ID_MASK, 2166 .name = "Marvell 88E1240", 2167 .features = PHY_GBIT_FEATURES, 2168 .probe = marvell_probe, 2169 .config_init = &m88e1111_config_init, 2170 .config_aneg = &marvell_config_aneg, 2171 .ack_interrupt = &marvell_ack_interrupt, 2172 .config_intr = &marvell_config_intr, 2173 .resume = &genphy_resume, 2174 .suspend = &genphy_suspend, 2175 .read_page = marvell_read_page, 2176 .write_page = marvell_write_page, 2177 .get_sset_count = marvell_get_sset_count, 2178 .get_strings = marvell_get_strings, 2179 .get_stats = marvell_get_stats, 2180 }, 2181 { 2182 .phy_id = MARVELL_PHY_ID_88E1116R, 2183 .phy_id_mask = MARVELL_PHY_ID_MASK, 2184 .name = "Marvell 88E1116R", 2185 .features = PHY_GBIT_FEATURES, 2186 .probe = marvell_probe, 2187 .config_init = &m88e1116r_config_init, 2188 .ack_interrupt = &marvell_ack_interrupt, 2189 .config_intr = &marvell_config_intr, 2190 .resume = &genphy_resume, 2191 .suspend = &genphy_suspend, 2192 .read_page = marvell_read_page, 2193 .write_page = marvell_write_page, 2194 .get_sset_count = marvell_get_sset_count, 2195 .get_strings = marvell_get_strings, 2196 .get_stats = marvell_get_stats, 2197 }, 2198 { 2199 .phy_id = MARVELL_PHY_ID_88E1510, 2200 .phy_id_mask = MARVELL_PHY_ID_MASK, 2201 .name = "Marvell 88E1510", 2202 .features = PHY_GBIT_FIBRE_FEATURES, 2203 .probe = &m88e1510_probe, 2204 .config_init = &m88e1510_config_init, 2205 .config_aneg = &m88e1510_config_aneg, 2206 .read_status = &marvell_read_status, 2207 .ack_interrupt = &marvell_ack_interrupt, 2208 .config_intr = &marvell_config_intr, 2209 .did_interrupt = &m88e1121_did_interrupt, 2210 .get_wol = &m88e1318_get_wol, 2211 .set_wol = &m88e1318_set_wol, 2212 .resume = &marvell_resume, 2213 .suspend = &marvell_suspend, 2214 .read_page = marvell_read_page, 2215 .write_page = marvell_write_page, 2216 .get_sset_count = marvell_get_sset_count, 2217 .get_strings = marvell_get_strings, 2218 .get_stats = marvell_get_stats, 2219 .set_loopback = genphy_loopback, 2220 }, 2221 { 2222 .phy_id = MARVELL_PHY_ID_88E1540, 2223 .phy_id_mask = MARVELL_PHY_ID_MASK, 2224 .name = "Marvell 88E1540", 2225 .features = PHY_GBIT_FEATURES, 2226 .probe = m88e1510_probe, 2227 .config_init = &marvell_config_init, 2228 .config_aneg = &m88e1510_config_aneg, 2229 .read_status = &marvell_read_status, 2230 .ack_interrupt = &marvell_ack_interrupt, 2231 .config_intr = &marvell_config_intr, 2232 .did_interrupt = &m88e1121_did_interrupt, 2233 .resume = &genphy_resume, 2234 .suspend = &genphy_suspend, 2235 .read_page = marvell_read_page, 2236 .write_page = marvell_write_page, 2237 .get_sset_count = marvell_get_sset_count, 2238 .get_strings = marvell_get_strings, 2239 .get_stats = marvell_get_stats, 2240 }, 2241 { 2242 .phy_id = MARVELL_PHY_ID_88E1545, 2243 .phy_id_mask = MARVELL_PHY_ID_MASK, 2244 .name = "Marvell 88E1545", 2245 .probe = m88e1510_probe, 2246 .features = PHY_GBIT_FEATURES, 2247 .config_init = &marvell_config_init, 2248 .config_aneg = &m88e1510_config_aneg, 2249 .read_status = &marvell_read_status, 2250 .ack_interrupt = &marvell_ack_interrupt, 2251 .config_intr = &marvell_config_intr, 2252 .did_interrupt = &m88e1121_did_interrupt, 2253 .resume = &genphy_resume, 2254 .suspend = &genphy_suspend, 2255 .read_page = marvell_read_page, 2256 .write_page = marvell_write_page, 2257 .get_sset_count = marvell_get_sset_count, 2258 .get_strings = marvell_get_strings, 2259 .get_stats = marvell_get_stats, 2260 }, 2261 { 2262 .phy_id = MARVELL_PHY_ID_88E3016, 2263 .phy_id_mask = MARVELL_PHY_ID_MASK, 2264 .name = "Marvell 88E3016", 2265 .features = PHY_BASIC_FEATURES, 2266 .probe = marvell_probe, 2267 .config_init = &m88e3016_config_init, 2268 .aneg_done = &marvell_aneg_done, 2269 .read_status = &marvell_read_status, 2270 .ack_interrupt = &marvell_ack_interrupt, 2271 .config_intr = &marvell_config_intr, 2272 .did_interrupt = &m88e1121_did_interrupt, 2273 .resume = &genphy_resume, 2274 .suspend = &genphy_suspend, 2275 .read_page = marvell_read_page, 2276 .write_page = marvell_write_page, 2277 .get_sset_count = marvell_get_sset_count, 2278 .get_strings = marvell_get_strings, 2279 .get_stats = marvell_get_stats, 2280 }, 2281 { 2282 .phy_id = MARVELL_PHY_ID_88E6390, 2283 .phy_id_mask = MARVELL_PHY_ID_MASK, 2284 .name = "Marvell 88E6390", 2285 .features = PHY_GBIT_FEATURES, 2286 .probe = m88e6390_probe, 2287 .config_init = &marvell_config_init, 2288 .config_aneg = &m88e1510_config_aneg, 2289 .read_status = &marvell_read_status, 2290 .ack_interrupt = &marvell_ack_interrupt, 2291 .config_intr = &marvell_config_intr, 2292 .did_interrupt = &m88e1121_did_interrupt, 2293 .resume = &genphy_resume, 2294 .suspend = &genphy_suspend, 2295 .read_page = marvell_read_page, 2296 .write_page = marvell_write_page, 2297 .get_sset_count = marvell_get_sset_count, 2298 .get_strings = marvell_get_strings, 2299 .get_stats = marvell_get_stats, 2300 }, 2301 }; 2302 2303 module_phy_driver(marvell_drivers); 2304 2305 static struct mdio_device_id __maybe_unused marvell_tbl[] = { 2306 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK }, 2307 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK }, 2308 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK }, 2309 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK }, 2310 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK }, 2311 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK }, 2312 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK }, 2313 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK }, 2314 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK }, 2315 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK }, 2316 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK }, 2317 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK }, 2318 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK }, 2319 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK }, 2320 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK }, 2321 { } 2322 }; 2323 2324 MODULE_DEVICE_TABLE(mdio, marvell_tbl); 2325