1 /* 2 * drivers/net/phy/marvell.c 3 * 4 * Driver for Marvell PHYs 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 * 10 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de> 11 * 12 * This program is free software; you can redistribute it and/or modify it 13 * under the terms of the GNU General Public License as published by the 14 * Free Software Foundation; either version 2 of the License, or (at your 15 * option) any later version. 16 * 17 */ 18 #include <linux/kernel.h> 19 #include <linux/string.h> 20 #include <linux/ctype.h> 21 #include <linux/errno.h> 22 #include <linux/unistd.h> 23 #include <linux/hwmon.h> 24 #include <linux/interrupt.h> 25 #include <linux/init.h> 26 #include <linux/delay.h> 27 #include <linux/netdevice.h> 28 #include <linux/etherdevice.h> 29 #include <linux/skbuff.h> 30 #include <linux/spinlock.h> 31 #include <linux/mm.h> 32 #include <linux/module.h> 33 #include <linux/mii.h> 34 #include <linux/ethtool.h> 35 #include <linux/phy.h> 36 #include <linux/marvell_phy.h> 37 #include <linux/of.h> 38 39 #include <linux/io.h> 40 #include <asm/irq.h> 41 #include <linux/uaccess.h> 42 43 #define MII_MARVELL_PHY_PAGE 22 44 #define MII_MARVELL_COPPER_PAGE 0x00 45 #define MII_MARVELL_FIBER_PAGE 0x01 46 #define MII_MARVELL_MSCR_PAGE 0x02 47 #define MII_MARVELL_LED_PAGE 0x03 48 #define MII_MARVELL_MISC_TEST_PAGE 0x06 49 #define MII_MARVELL_WOL_PAGE 0x11 50 51 #define MII_M1011_IEVENT 0x13 52 #define MII_M1011_IEVENT_CLEAR 0x0000 53 54 #define MII_M1011_IMASK 0x12 55 #define MII_M1011_IMASK_INIT 0x6400 56 #define MII_M1011_IMASK_CLEAR 0x0000 57 58 #define MII_M1011_PHY_SCR 0x10 59 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11) 60 #define MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT 12 61 #define MII_M1011_PHY_SRC_DOWNSHIFT_MASK 0x7800 62 #define MII_M1011_PHY_SCR_MDI (0x0 << 5) 63 #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5) 64 #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5) 65 66 #define MII_M1111_PHY_LED_CONTROL 0x18 67 #define MII_M1111_PHY_LED_DIRECT 0x4100 68 #define MII_M1111_PHY_LED_COMBINE 0x411c 69 #define MII_M1111_PHY_EXT_CR 0x14 70 #define MII_M1111_RGMII_RX_DELAY BIT(7) 71 #define MII_M1111_RGMII_TX_DELAY BIT(1) 72 #define MII_M1111_PHY_EXT_SR 0x1b 73 74 #define MII_M1111_HWCFG_MODE_MASK 0xf 75 #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3 76 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4 77 #define MII_M1111_HWCFG_MODE_RTBI 0x7 78 #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9 79 #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb 80 #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13) 81 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15) 82 83 #define MII_88E1121_PHY_MSCR_REG 21 84 #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5) 85 #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4) 86 #define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4)) 87 88 #define MII_88E1121_MISC_TEST 0x1a 89 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00 90 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8 91 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7) 92 #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6) 93 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5) 94 #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f 95 96 #define MII_88E1510_TEMP_SENSOR 0x1b 97 #define MII_88E1510_TEMP_SENSOR_MASK 0xff 98 99 #define MII_88E6390_MISC_TEST 0x1b 100 #define MII_88E6390_MISC_TEST_SAMPLE_1S 0 101 #define MII_88E6390_MISC_TEST_SAMPLE_10MS BIT(14) 102 #define MII_88E6390_MISC_TEST_SAMPLE_DISABLE BIT(15) 103 #define MII_88E6390_MISC_TEST_SAMPLE_ENABLE 0 104 #define MII_88E6390_MISC_TEST_SAMPLE_MASK (0x3 << 14) 105 106 #define MII_88E6390_TEMP_SENSOR 0x1c 107 #define MII_88E6390_TEMP_SENSOR_MASK 0xff 108 #define MII_88E6390_TEMP_SENSOR_SAMPLES 10 109 110 #define MII_88E1318S_PHY_MSCR1_REG 16 111 #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6) 112 113 /* Copper Specific Interrupt Enable Register */ 114 #define MII_88E1318S_PHY_CSIER 0x12 115 /* WOL Event Interrupt Enable */ 116 #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7) 117 118 /* LED Timer Control Register */ 119 #define MII_88E1318S_PHY_LED_TCR 0x12 120 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15) 121 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7) 122 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11) 123 124 /* Magic Packet MAC address registers */ 125 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17 126 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18 127 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19 128 129 #define MII_88E1318S_PHY_WOL_CTRL 0x10 130 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12) 131 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14) 132 133 #define MII_PHY_LED_CTRL 16 134 #define MII_88E1121_PHY_LED_DEF 0x0030 135 #define MII_88E1510_PHY_LED_DEF 0x1177 136 137 #define MII_M1011_PHY_STATUS 0x11 138 #define MII_M1011_PHY_STATUS_1000 0x8000 139 #define MII_M1011_PHY_STATUS_100 0x4000 140 #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000 141 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000 142 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800 143 #define MII_M1011_PHY_STATUS_LINK 0x0400 144 145 #define MII_88E3016_PHY_SPEC_CTRL 0x10 146 #define MII_88E3016_DISABLE_SCRAMBLER 0x0200 147 #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030 148 149 #define MII_88E1510_GEN_CTRL_REG_1 0x14 150 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7 151 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */ 152 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */ 153 154 #define LPA_FIBER_1000HALF 0x40 155 #define LPA_FIBER_1000FULL 0x20 156 157 #define LPA_PAUSE_FIBER 0x180 158 #define LPA_PAUSE_ASYM_FIBER 0x100 159 160 #define ADVERTISE_FIBER_1000HALF 0x40 161 #define ADVERTISE_FIBER_1000FULL 0x20 162 163 #define ADVERTISE_PAUSE_FIBER 0x180 164 #define ADVERTISE_PAUSE_ASYM_FIBER 0x100 165 166 #define REGISTER_LINK_STATUS 0x400 167 #define NB_FIBER_STATS 1 168 169 MODULE_DESCRIPTION("Marvell PHY driver"); 170 MODULE_AUTHOR("Andy Fleming"); 171 MODULE_LICENSE("GPL"); 172 173 struct marvell_hw_stat { 174 const char *string; 175 u8 page; 176 u8 reg; 177 u8 bits; 178 }; 179 180 static struct marvell_hw_stat marvell_hw_stats[] = { 181 { "phy_receive_errors_copper", 0, 21, 16}, 182 { "phy_idle_errors", 0, 10, 8 }, 183 { "phy_receive_errors_fiber", 1, 21, 16}, 184 }; 185 186 struct marvell_priv { 187 u64 stats[ARRAY_SIZE(marvell_hw_stats)]; 188 char *hwmon_name; 189 struct device *hwmon_dev; 190 }; 191 192 static int marvell_read_page(struct phy_device *phydev) 193 { 194 return __phy_read(phydev, MII_MARVELL_PHY_PAGE); 195 } 196 197 static int marvell_write_page(struct phy_device *phydev, int page) 198 { 199 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page); 200 } 201 202 static int marvell_set_page(struct phy_device *phydev, int page) 203 { 204 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page); 205 } 206 207 static int marvell_ack_interrupt(struct phy_device *phydev) 208 { 209 int err; 210 211 /* Clear the interrupts by reading the reg */ 212 err = phy_read(phydev, MII_M1011_IEVENT); 213 214 if (err < 0) 215 return err; 216 217 return 0; 218 } 219 220 static int marvell_config_intr(struct phy_device *phydev) 221 { 222 int err; 223 224 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) 225 err = phy_write(phydev, MII_M1011_IMASK, 226 MII_M1011_IMASK_INIT); 227 else 228 err = phy_write(phydev, MII_M1011_IMASK, 229 MII_M1011_IMASK_CLEAR); 230 231 return err; 232 } 233 234 static int marvell_set_polarity(struct phy_device *phydev, int polarity) 235 { 236 int reg; 237 int err; 238 int val; 239 240 /* get the current settings */ 241 reg = phy_read(phydev, MII_M1011_PHY_SCR); 242 if (reg < 0) 243 return reg; 244 245 val = reg; 246 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS; 247 switch (polarity) { 248 case ETH_TP_MDI: 249 val |= MII_M1011_PHY_SCR_MDI; 250 break; 251 case ETH_TP_MDI_X: 252 val |= MII_M1011_PHY_SCR_MDI_X; 253 break; 254 case ETH_TP_MDI_AUTO: 255 case ETH_TP_MDI_INVALID: 256 default: 257 val |= MII_M1011_PHY_SCR_AUTO_CROSS; 258 break; 259 } 260 261 if (val != reg) { 262 /* Set the new polarity value in the register */ 263 err = phy_write(phydev, MII_M1011_PHY_SCR, val); 264 if (err) 265 return err; 266 } 267 268 return val != reg; 269 } 270 271 static int marvell_set_downshift(struct phy_device *phydev, bool enable, 272 u8 retries) 273 { 274 int reg; 275 276 reg = phy_read(phydev, MII_M1011_PHY_SCR); 277 if (reg < 0) 278 return reg; 279 280 reg &= MII_M1011_PHY_SRC_DOWNSHIFT_MASK; 281 reg |= ((retries - 1) << MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT); 282 if (enable) 283 reg |= MII_M1011_PHY_SCR_DOWNSHIFT_EN; 284 285 return phy_write(phydev, MII_M1011_PHY_SCR, reg); 286 } 287 288 static int marvell_config_aneg(struct phy_device *phydev) 289 { 290 int changed = 0; 291 int err; 292 293 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 294 if (err < 0) 295 return err; 296 297 changed = err; 298 299 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL, 300 MII_M1111_PHY_LED_DIRECT); 301 if (err < 0) 302 return err; 303 304 err = genphy_config_aneg(phydev); 305 if (err < 0) 306 return err; 307 308 if (phydev->autoneg != AUTONEG_ENABLE || changed) { 309 /* A write to speed/duplex bits (that is performed by 310 * genphy_config_aneg() call above) must be followed by 311 * a software reset. Otherwise, the write has no effect. 312 */ 313 err = genphy_soft_reset(phydev); 314 if (err < 0) 315 return err; 316 } 317 318 return 0; 319 } 320 321 static int m88e1101_config_aneg(struct phy_device *phydev) 322 { 323 int err; 324 325 /* This Marvell PHY has an errata which requires 326 * that certain registers get written in order 327 * to restart autonegotiation 328 */ 329 err = genphy_soft_reset(phydev); 330 if (err < 0) 331 return err; 332 333 err = phy_write(phydev, 0x1d, 0x1f); 334 if (err < 0) 335 return err; 336 337 err = phy_write(phydev, 0x1e, 0x200c); 338 if (err < 0) 339 return err; 340 341 err = phy_write(phydev, 0x1d, 0x5); 342 if (err < 0) 343 return err; 344 345 err = phy_write(phydev, 0x1e, 0); 346 if (err < 0) 347 return err; 348 349 err = phy_write(phydev, 0x1e, 0x100); 350 if (err < 0) 351 return err; 352 353 return marvell_config_aneg(phydev); 354 } 355 356 #ifdef CONFIG_OF_MDIO 357 /* Set and/or override some configuration registers based on the 358 * marvell,reg-init property stored in the of_node for the phydev. 359 * 360 * marvell,reg-init = <reg-page reg mask value>,...; 361 * 362 * There may be one or more sets of <reg-page reg mask value>: 363 * 364 * reg-page: which register bank to use. 365 * reg: the register. 366 * mask: if non-zero, ANDed with existing register value. 367 * value: ORed with the masked value and written to the regiser. 368 * 369 */ 370 static int marvell_of_reg_init(struct phy_device *phydev) 371 { 372 const __be32 *paddr; 373 int len, i, saved_page, current_page, ret = 0; 374 375 if (!phydev->mdio.dev.of_node) 376 return 0; 377 378 paddr = of_get_property(phydev->mdio.dev.of_node, 379 "marvell,reg-init", &len); 380 if (!paddr || len < (4 * sizeof(*paddr))) 381 return 0; 382 383 saved_page = phy_save_page(phydev); 384 if (saved_page < 0) 385 goto err; 386 current_page = saved_page; 387 388 len /= sizeof(*paddr); 389 for (i = 0; i < len - 3; i += 4) { 390 u16 page = be32_to_cpup(paddr + i); 391 u16 reg = be32_to_cpup(paddr + i + 1); 392 u16 mask = be32_to_cpup(paddr + i + 2); 393 u16 val_bits = be32_to_cpup(paddr + i + 3); 394 int val; 395 396 if (page != current_page) { 397 current_page = page; 398 ret = marvell_write_page(phydev, page); 399 if (ret < 0) 400 goto err; 401 } 402 403 val = 0; 404 if (mask) { 405 val = __phy_read(phydev, reg); 406 if (val < 0) { 407 ret = val; 408 goto err; 409 } 410 val &= mask; 411 } 412 val |= val_bits; 413 414 ret = __phy_write(phydev, reg, val); 415 if (ret < 0) 416 goto err; 417 } 418 err: 419 return phy_restore_page(phydev, saved_page, ret); 420 } 421 #else 422 static int marvell_of_reg_init(struct phy_device *phydev) 423 { 424 return 0; 425 } 426 #endif /* CONFIG_OF_MDIO */ 427 428 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev) 429 { 430 int mscr; 431 432 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) 433 mscr = MII_88E1121_PHY_MSCR_RX_DELAY | 434 MII_88E1121_PHY_MSCR_TX_DELAY; 435 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) 436 mscr = MII_88E1121_PHY_MSCR_RX_DELAY; 437 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) 438 mscr = MII_88E1121_PHY_MSCR_TX_DELAY; 439 else 440 mscr = 0; 441 442 return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, 443 MII_88E1121_PHY_MSCR_REG, 444 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr); 445 } 446 447 static int m88e1121_config_aneg(struct phy_device *phydev) 448 { 449 int changed = 0; 450 int err = 0; 451 452 if (phy_interface_is_rgmii(phydev)) { 453 err = m88e1121_config_aneg_rgmii_delays(phydev); 454 if (err < 0) 455 return err; 456 } 457 458 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 459 if (err < 0) 460 return err; 461 462 changed = err; 463 464 err = genphy_config_aneg(phydev); 465 if (err < 0) 466 return err; 467 468 if (phydev->autoneg != AUTONEG_ENABLE || changed) { 469 /* A software reset is used to ensure a "commit" of the 470 * changes is done. 471 */ 472 err = genphy_soft_reset(phydev); 473 if (err < 0) 474 return err; 475 } 476 477 return 0; 478 } 479 480 static int m88e1318_config_aneg(struct phy_device *phydev) 481 { 482 int err; 483 484 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, 485 MII_88E1318S_PHY_MSCR1_REG, 486 0, MII_88E1318S_PHY_MSCR1_PAD_ODD); 487 if (err < 0) 488 return err; 489 490 return m88e1121_config_aneg(phydev); 491 } 492 493 /** 494 * linkmode_adv_to_fiber_adv_t 495 * @advertise: the linkmode advertisement settings 496 * 497 * A small helper function that translates linkmode advertisement 498 * settings to phy autonegotiation advertisements for the MII_ADV 499 * register for fiber link. 500 */ 501 static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise) 502 { 503 u32 result = 0; 504 505 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise)) 506 result |= ADVERTISE_FIBER_1000HALF; 507 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise)) 508 result |= ADVERTISE_FIBER_1000FULL; 509 510 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) && 511 linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise)) 512 result |= LPA_PAUSE_ASYM_FIBER; 513 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise)) 514 result |= (ADVERTISE_PAUSE_FIBER 515 & (~ADVERTISE_PAUSE_ASYM_FIBER)); 516 517 return result; 518 } 519 520 /** 521 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR 522 * @phydev: target phy_device struct 523 * 524 * Description: If auto-negotiation is enabled, we configure the 525 * advertising, and then restart auto-negotiation. If it is not 526 * enabled, then we write the BMCR. Adapted for fiber link in 527 * some Marvell's devices. 528 */ 529 static int marvell_config_aneg_fiber(struct phy_device *phydev) 530 { 531 int changed = 0; 532 int err; 533 int adv, oldadv; 534 535 if (phydev->autoneg != AUTONEG_ENABLE) 536 return genphy_setup_forced(phydev); 537 538 /* Only allow advertising what this PHY supports */ 539 linkmode_and(phydev->advertising, phydev->advertising, 540 phydev->supported); 541 542 /* Setup fiber advertisement */ 543 adv = phy_read(phydev, MII_ADVERTISE); 544 if (adv < 0) 545 return adv; 546 547 oldadv = adv; 548 adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL 549 | LPA_PAUSE_FIBER); 550 adv |= linkmode_adv_to_fiber_adv_t(phydev->advertising); 551 552 if (adv != oldadv) { 553 err = phy_write(phydev, MII_ADVERTISE, adv); 554 if (err < 0) 555 return err; 556 557 changed = 1; 558 } 559 560 if (changed == 0) { 561 /* Advertisement hasn't changed, but maybe aneg was never on to 562 * begin with? Or maybe phy was isolated? 563 */ 564 int ctl = phy_read(phydev, MII_BMCR); 565 566 if (ctl < 0) 567 return ctl; 568 569 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE)) 570 changed = 1; /* do restart aneg */ 571 } 572 573 /* Only restart aneg if we are advertising something different 574 * than we were before. 575 */ 576 if (changed > 0) 577 changed = genphy_restart_aneg(phydev); 578 579 return changed; 580 } 581 582 static int m88e1510_config_aneg(struct phy_device *phydev) 583 { 584 int err; 585 586 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 587 if (err < 0) 588 goto error; 589 590 /* Configure the copper link first */ 591 err = m88e1318_config_aneg(phydev); 592 if (err < 0) 593 goto error; 594 595 /* Do not touch the fiber page if we're in copper->sgmii mode */ 596 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) 597 return 0; 598 599 /* Then the fiber link */ 600 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 601 if (err < 0) 602 goto error; 603 604 err = marvell_config_aneg_fiber(phydev); 605 if (err < 0) 606 goto error; 607 608 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 609 610 error: 611 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 612 return err; 613 } 614 615 static void marvell_config_led(struct phy_device *phydev) 616 { 617 u16 def_config; 618 int err; 619 620 switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) { 621 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */ 622 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R): 623 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S): 624 def_config = MII_88E1121_PHY_LED_DEF; 625 break; 626 /* Default PHY LED config: 627 * LED[0] .. 1000Mbps Link 628 * LED[1] .. 100Mbps Link 629 * LED[2] .. Blink, Activity 630 */ 631 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510): 632 def_config = MII_88E1510_PHY_LED_DEF; 633 break; 634 default: 635 return; 636 } 637 638 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL, 639 def_config); 640 if (err < 0) 641 phydev_warn(phydev, "Fail to config marvell phy LED.\n"); 642 } 643 644 static int marvell_config_init(struct phy_device *phydev) 645 { 646 /* Set defalut LED */ 647 marvell_config_led(phydev); 648 649 /* Set registers from marvell,reg-init DT property */ 650 return marvell_of_reg_init(phydev); 651 } 652 653 static int m88e1116r_config_init(struct phy_device *phydev) 654 { 655 int err; 656 657 err = genphy_soft_reset(phydev); 658 if (err < 0) 659 return err; 660 661 msleep(500); 662 663 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 664 if (err < 0) 665 return err; 666 667 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 668 if (err < 0) 669 return err; 670 671 err = marvell_set_downshift(phydev, true, 8); 672 if (err < 0) 673 return err; 674 675 if (phy_interface_is_rgmii(phydev)) { 676 err = m88e1121_config_aneg_rgmii_delays(phydev); 677 if (err < 0) 678 return err; 679 } 680 681 err = genphy_soft_reset(phydev); 682 if (err < 0) 683 return err; 684 685 return marvell_config_init(phydev); 686 } 687 688 static int m88e3016_config_init(struct phy_device *phydev) 689 { 690 int ret; 691 692 /* Enable Scrambler and Auto-Crossover */ 693 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL, 694 MII_88E3016_DISABLE_SCRAMBLER, 695 MII_88E3016_AUTO_MDIX_CROSSOVER); 696 if (ret < 0) 697 return ret; 698 699 return marvell_config_init(phydev); 700 } 701 702 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev, 703 u16 mode, 704 int fibre_copper_auto) 705 { 706 if (fibre_copper_auto) 707 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO; 708 709 return phy_modify(phydev, MII_M1111_PHY_EXT_SR, 710 MII_M1111_HWCFG_MODE_MASK | 711 MII_M1111_HWCFG_FIBER_COPPER_AUTO | 712 MII_M1111_HWCFG_FIBER_COPPER_RES, 713 mode); 714 } 715 716 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev) 717 { 718 int delay; 719 720 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { 721 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY; 722 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) { 723 delay = MII_M1111_RGMII_RX_DELAY; 724 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) { 725 delay = MII_M1111_RGMII_TX_DELAY; 726 } else { 727 delay = 0; 728 } 729 730 return phy_modify(phydev, MII_M1111_PHY_EXT_CR, 731 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY, 732 delay); 733 } 734 735 static int m88e1111_config_init_rgmii(struct phy_device *phydev) 736 { 737 int temp; 738 int err; 739 740 err = m88e1111_config_init_rgmii_delays(phydev); 741 if (err < 0) 742 return err; 743 744 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); 745 if (temp < 0) 746 return temp; 747 748 temp &= ~(MII_M1111_HWCFG_MODE_MASK); 749 750 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES) 751 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII; 752 else 753 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII; 754 755 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp); 756 } 757 758 static int m88e1111_config_init_sgmii(struct phy_device *phydev) 759 { 760 int err; 761 762 err = m88e1111_config_init_hwcfg_mode( 763 phydev, 764 MII_M1111_HWCFG_MODE_SGMII_NO_CLK, 765 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 766 if (err < 0) 767 return err; 768 769 /* make sure copper is selected */ 770 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 771 } 772 773 static int m88e1111_config_init_rtbi(struct phy_device *phydev) 774 { 775 int err; 776 777 err = m88e1111_config_init_rgmii_delays(phydev); 778 if (err < 0) 779 return err; 780 781 err = m88e1111_config_init_hwcfg_mode( 782 phydev, 783 MII_M1111_HWCFG_MODE_RTBI, 784 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 785 if (err < 0) 786 return err; 787 788 /* soft reset */ 789 err = genphy_soft_reset(phydev); 790 if (err < 0) 791 return err; 792 793 return m88e1111_config_init_hwcfg_mode( 794 phydev, 795 MII_M1111_HWCFG_MODE_RTBI, 796 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 797 } 798 799 static int m88e1111_config_init(struct phy_device *phydev) 800 { 801 int err; 802 803 if (phy_interface_is_rgmii(phydev)) { 804 err = m88e1111_config_init_rgmii(phydev); 805 if (err < 0) 806 return err; 807 } 808 809 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 810 err = m88e1111_config_init_sgmii(phydev); 811 if (err < 0) 812 return err; 813 } 814 815 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) { 816 err = m88e1111_config_init_rtbi(phydev); 817 if (err < 0) 818 return err; 819 } 820 821 err = marvell_of_reg_init(phydev); 822 if (err < 0) 823 return err; 824 825 return genphy_soft_reset(phydev); 826 } 827 828 static int m88e1318_config_init(struct phy_device *phydev) 829 { 830 if (phy_interrupt_is_valid(phydev)) { 831 int err = phy_modify_paged( 832 phydev, MII_MARVELL_LED_PAGE, 833 MII_88E1318S_PHY_LED_TCR, 834 MII_88E1318S_PHY_LED_TCR_FORCE_INT, 835 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE | 836 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW); 837 if (err < 0) 838 return err; 839 } 840 841 return marvell_config_init(phydev); 842 } 843 844 static int m88e1510_config_init(struct phy_device *phydev) 845 { 846 int err; 847 848 /* SGMII-to-Copper mode initialization */ 849 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 850 u32 pause; 851 852 /* Select page 18 */ 853 err = marvell_set_page(phydev, 18); 854 if (err < 0) 855 return err; 856 857 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */ 858 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 859 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, 860 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII); 861 if (err < 0) 862 return err; 863 864 /* PHY reset is necessary after changing MODE[2:0] */ 865 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0, 866 MII_88E1510_GEN_CTRL_REG_1_RESET); 867 if (err < 0) 868 return err; 869 870 /* Reset page selection */ 871 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 872 if (err < 0) 873 return err; 874 875 /* There appears to be a bug in the 88e1512 when used in 876 * SGMII to copper mode, where the AN advertisement register 877 * clears the pause bits each time a negotiation occurs. 878 * This means we can never be truely sure what was advertised, 879 * so disable Pause support. 880 */ 881 pause = SUPPORTED_Pause | SUPPORTED_Asym_Pause; 882 linkmode_clear_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 883 phydev->supported); 884 linkmode_clear_bit(ETHTOOL_LINK_MODE_Pause_BIT, 885 phydev->supported); 886 linkmode_clear_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 887 phydev->advertising); 888 linkmode_clear_bit(ETHTOOL_LINK_MODE_Pause_BIT, 889 phydev->advertising); 890 } 891 892 return m88e1318_config_init(phydev); 893 } 894 895 static int m88e1118_config_aneg(struct phy_device *phydev) 896 { 897 int err; 898 899 err = genphy_soft_reset(phydev); 900 if (err < 0) 901 return err; 902 903 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 904 if (err < 0) 905 return err; 906 907 err = genphy_config_aneg(phydev); 908 return 0; 909 } 910 911 static int m88e1118_config_init(struct phy_device *phydev) 912 { 913 int err; 914 915 /* Change address */ 916 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); 917 if (err < 0) 918 return err; 919 920 /* Enable 1000 Mbit */ 921 err = phy_write(phydev, 0x15, 0x1070); 922 if (err < 0) 923 return err; 924 925 /* Change address */ 926 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE); 927 if (err < 0) 928 return err; 929 930 /* Adjust LED Control */ 931 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS) 932 err = phy_write(phydev, 0x10, 0x1100); 933 else 934 err = phy_write(phydev, 0x10, 0x021e); 935 if (err < 0) 936 return err; 937 938 err = marvell_of_reg_init(phydev); 939 if (err < 0) 940 return err; 941 942 /* Reset address */ 943 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 944 if (err < 0) 945 return err; 946 947 return genphy_soft_reset(phydev); 948 } 949 950 static int m88e1149_config_init(struct phy_device *phydev) 951 { 952 int err; 953 954 /* Change address */ 955 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); 956 if (err < 0) 957 return err; 958 959 /* Enable 1000 Mbit */ 960 err = phy_write(phydev, 0x15, 0x1048); 961 if (err < 0) 962 return err; 963 964 err = marvell_of_reg_init(phydev); 965 if (err < 0) 966 return err; 967 968 /* Reset address */ 969 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 970 if (err < 0) 971 return err; 972 973 return genphy_soft_reset(phydev); 974 } 975 976 static int m88e1145_config_init_rgmii(struct phy_device *phydev) 977 { 978 int err; 979 980 err = m88e1111_config_init_rgmii_delays(phydev); 981 if (err < 0) 982 return err; 983 984 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) { 985 err = phy_write(phydev, 0x1d, 0x0012); 986 if (err < 0) 987 return err; 988 989 err = phy_modify(phydev, 0x1e, 0x0fc0, 990 2 << 9 | /* 36 ohm */ 991 2 << 6); /* 39 ohm */ 992 if (err < 0) 993 return err; 994 995 err = phy_write(phydev, 0x1d, 0x3); 996 if (err < 0) 997 return err; 998 999 err = phy_write(phydev, 0x1e, 0x8000); 1000 } 1001 return err; 1002 } 1003 1004 static int m88e1145_config_init_sgmii(struct phy_device *phydev) 1005 { 1006 return m88e1111_config_init_hwcfg_mode( 1007 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK, 1008 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 1009 } 1010 1011 static int m88e1145_config_init(struct phy_device *phydev) 1012 { 1013 int err; 1014 1015 /* Take care of errata E0 & E1 */ 1016 err = phy_write(phydev, 0x1d, 0x001b); 1017 if (err < 0) 1018 return err; 1019 1020 err = phy_write(phydev, 0x1e, 0x418f); 1021 if (err < 0) 1022 return err; 1023 1024 err = phy_write(phydev, 0x1d, 0x0016); 1025 if (err < 0) 1026 return err; 1027 1028 err = phy_write(phydev, 0x1e, 0xa2da); 1029 if (err < 0) 1030 return err; 1031 1032 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { 1033 err = m88e1145_config_init_rgmii(phydev); 1034 if (err < 0) 1035 return err; 1036 } 1037 1038 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 1039 err = m88e1145_config_init_sgmii(phydev); 1040 if (err < 0) 1041 return err; 1042 } 1043 1044 err = marvell_of_reg_init(phydev); 1045 if (err < 0) 1046 return err; 1047 1048 return 0; 1049 } 1050 1051 /** 1052 * fiber_lpa_to_ethtool_lpa_t 1053 * @lpa: value of the MII_LPA register for fiber link 1054 * 1055 * A small helper function that translates MII_LPA 1056 * bits to ethtool LP advertisement settings. 1057 */ 1058 static u32 fiber_lpa_to_ethtool_lpa_t(u32 lpa) 1059 { 1060 u32 result = 0; 1061 1062 if (lpa & LPA_FIBER_1000HALF) 1063 result |= ADVERTISED_1000baseT_Half; 1064 if (lpa & LPA_FIBER_1000FULL) 1065 result |= ADVERTISED_1000baseT_Full; 1066 1067 return result; 1068 } 1069 1070 /** 1071 * marvell_update_link - update link status in real time in @phydev 1072 * @phydev: target phy_device struct 1073 * 1074 * Description: Update the value in phydev->link to reflect the 1075 * current link value. 1076 */ 1077 static int marvell_update_link(struct phy_device *phydev, int fiber) 1078 { 1079 int status; 1080 1081 /* Use the generic register for copper link, or specific 1082 * register for fiber case 1083 */ 1084 if (fiber) { 1085 status = phy_read(phydev, MII_M1011_PHY_STATUS); 1086 if (status < 0) 1087 return status; 1088 1089 if ((status & REGISTER_LINK_STATUS) == 0) 1090 phydev->link = 0; 1091 else 1092 phydev->link = 1; 1093 } else { 1094 return genphy_update_link(phydev); 1095 } 1096 1097 return 0; 1098 } 1099 1100 static int marvell_read_status_page_an(struct phy_device *phydev, 1101 int fiber) 1102 { 1103 int status; 1104 int lpa; 1105 int lpagb; 1106 1107 status = phy_read(phydev, MII_M1011_PHY_STATUS); 1108 if (status < 0) 1109 return status; 1110 1111 lpa = phy_read(phydev, MII_LPA); 1112 if (lpa < 0) 1113 return lpa; 1114 1115 lpagb = phy_read(phydev, MII_STAT1000); 1116 if (lpagb < 0) 1117 return lpagb; 1118 1119 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX) 1120 phydev->duplex = DUPLEX_FULL; 1121 else 1122 phydev->duplex = DUPLEX_HALF; 1123 1124 status = status & MII_M1011_PHY_STATUS_SPD_MASK; 1125 phydev->pause = 0; 1126 phydev->asym_pause = 0; 1127 1128 switch (status) { 1129 case MII_M1011_PHY_STATUS_1000: 1130 phydev->speed = SPEED_1000; 1131 break; 1132 1133 case MII_M1011_PHY_STATUS_100: 1134 phydev->speed = SPEED_100; 1135 break; 1136 1137 default: 1138 phydev->speed = SPEED_10; 1139 break; 1140 } 1141 1142 if (!fiber) { 1143 phydev->lp_advertising = 1144 mii_stat1000_to_ethtool_lpa_t(lpagb) | 1145 mii_lpa_to_ethtool_lpa_t(lpa); 1146 1147 if (phydev->duplex == DUPLEX_FULL) { 1148 phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0; 1149 phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0; 1150 } 1151 } else { 1152 /* The fiber link is only 1000M capable */ 1153 phydev->lp_advertising = fiber_lpa_to_ethtool_lpa_t(lpa); 1154 1155 if (phydev->duplex == DUPLEX_FULL) { 1156 if (!(lpa & LPA_PAUSE_FIBER)) { 1157 phydev->pause = 0; 1158 phydev->asym_pause = 0; 1159 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) { 1160 phydev->pause = 1; 1161 phydev->asym_pause = 1; 1162 } else { 1163 phydev->pause = 1; 1164 phydev->asym_pause = 0; 1165 } 1166 } 1167 } 1168 return 0; 1169 } 1170 1171 static int marvell_read_status_page_fixed(struct phy_device *phydev) 1172 { 1173 int bmcr = phy_read(phydev, MII_BMCR); 1174 1175 if (bmcr < 0) 1176 return bmcr; 1177 1178 if (bmcr & BMCR_FULLDPLX) 1179 phydev->duplex = DUPLEX_FULL; 1180 else 1181 phydev->duplex = DUPLEX_HALF; 1182 1183 if (bmcr & BMCR_SPEED1000) 1184 phydev->speed = SPEED_1000; 1185 else if (bmcr & BMCR_SPEED100) 1186 phydev->speed = SPEED_100; 1187 else 1188 phydev->speed = SPEED_10; 1189 1190 phydev->pause = 0; 1191 phydev->asym_pause = 0; 1192 phydev->lp_advertising = 0; 1193 1194 return 0; 1195 } 1196 1197 /* marvell_read_status_page 1198 * 1199 * Description: 1200 * Check the link, then figure out the current state 1201 * by comparing what we advertise with what the link partner 1202 * advertises. Start by checking the gigabit possibilities, 1203 * then move on to 10/100. 1204 */ 1205 static int marvell_read_status_page(struct phy_device *phydev, int page) 1206 { 1207 int fiber; 1208 int err; 1209 1210 /* Detect and update the link, but return if there 1211 * was an error 1212 */ 1213 if (page == MII_MARVELL_FIBER_PAGE) 1214 fiber = 1; 1215 else 1216 fiber = 0; 1217 1218 err = marvell_update_link(phydev, fiber); 1219 if (err) 1220 return err; 1221 1222 if (phydev->autoneg == AUTONEG_ENABLE) 1223 err = marvell_read_status_page_an(phydev, fiber); 1224 else 1225 err = marvell_read_status_page_fixed(phydev); 1226 1227 return err; 1228 } 1229 1230 /* marvell_read_status 1231 * 1232 * Some Marvell's phys have two modes: fiber and copper. 1233 * Both need status checked. 1234 * Description: 1235 * First, check the fiber link and status. 1236 * If the fiber link is down, check the copper link and status which 1237 * will be the default value if both link are down. 1238 */ 1239 static int marvell_read_status(struct phy_device *phydev) 1240 { 1241 int err; 1242 1243 /* Check the fiber mode first */ 1244 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1245 phydev->supported) && 1246 phydev->interface != PHY_INTERFACE_MODE_SGMII) { 1247 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1248 if (err < 0) 1249 goto error; 1250 1251 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE); 1252 if (err < 0) 1253 goto error; 1254 1255 /* If the fiber link is up, it is the selected and 1256 * used link. In this case, we need to stay in the 1257 * fiber page. Please to be careful about that, avoid 1258 * to restore Copper page in other functions which 1259 * could break the behaviour for some fiber phy like 1260 * 88E1512. 1261 */ 1262 if (phydev->link) 1263 return 0; 1264 1265 /* If fiber link is down, check and save copper mode state */ 1266 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1267 if (err < 0) 1268 goto error; 1269 } 1270 1271 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE); 1272 1273 error: 1274 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1275 return err; 1276 } 1277 1278 /* marvell_suspend 1279 * 1280 * Some Marvell's phys have two modes: fiber and copper. 1281 * Both need to be suspended 1282 */ 1283 static int marvell_suspend(struct phy_device *phydev) 1284 { 1285 int err; 1286 1287 /* Suspend the fiber mode first */ 1288 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1289 phydev->supported)) { 1290 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1291 if (err < 0) 1292 goto error; 1293 1294 /* With the page set, use the generic suspend */ 1295 err = genphy_suspend(phydev); 1296 if (err < 0) 1297 goto error; 1298 1299 /* Then, the copper link */ 1300 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1301 if (err < 0) 1302 goto error; 1303 } 1304 1305 /* With the page set, use the generic suspend */ 1306 return genphy_suspend(phydev); 1307 1308 error: 1309 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1310 return err; 1311 } 1312 1313 /* marvell_resume 1314 * 1315 * Some Marvell's phys have two modes: fiber and copper. 1316 * Both need to be resumed 1317 */ 1318 static int marvell_resume(struct phy_device *phydev) 1319 { 1320 int err; 1321 1322 /* Resume the fiber mode first */ 1323 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1324 phydev->supported)) { 1325 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1326 if (err < 0) 1327 goto error; 1328 1329 /* With the page set, use the generic resume */ 1330 err = genphy_resume(phydev); 1331 if (err < 0) 1332 goto error; 1333 1334 /* Then, the copper link */ 1335 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1336 if (err < 0) 1337 goto error; 1338 } 1339 1340 /* With the page set, use the generic resume */ 1341 return genphy_resume(phydev); 1342 1343 error: 1344 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1345 return err; 1346 } 1347 1348 static int marvell_aneg_done(struct phy_device *phydev) 1349 { 1350 int retval = phy_read(phydev, MII_M1011_PHY_STATUS); 1351 1352 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED); 1353 } 1354 1355 static int m88e1121_did_interrupt(struct phy_device *phydev) 1356 { 1357 int imask; 1358 1359 imask = phy_read(phydev, MII_M1011_IEVENT); 1360 1361 if (imask & MII_M1011_IMASK_INIT) 1362 return 1; 1363 1364 return 0; 1365 } 1366 1367 static void m88e1318_get_wol(struct phy_device *phydev, 1368 struct ethtool_wolinfo *wol) 1369 { 1370 int oldpage, ret = 0; 1371 1372 wol->supported = WAKE_MAGIC; 1373 wol->wolopts = 0; 1374 1375 oldpage = phy_select_page(phydev, MII_MARVELL_WOL_PAGE); 1376 if (oldpage < 0) 1377 goto error; 1378 1379 ret = __phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL); 1380 if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE) 1381 wol->wolopts |= WAKE_MAGIC; 1382 1383 error: 1384 phy_restore_page(phydev, oldpage, ret); 1385 } 1386 1387 static int m88e1318_set_wol(struct phy_device *phydev, 1388 struct ethtool_wolinfo *wol) 1389 { 1390 int err = 0, oldpage; 1391 1392 oldpage = phy_save_page(phydev); 1393 if (oldpage < 0) 1394 goto error; 1395 1396 if (wol->wolopts & WAKE_MAGIC) { 1397 /* Explicitly switch to page 0x00, just to be sure */ 1398 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE); 1399 if (err < 0) 1400 goto error; 1401 1402 /* If WOL event happened once, the LED[2] interrupt pin 1403 * will not be cleared unless we reading the interrupt status 1404 * register. If interrupts are in use, the normal interrupt 1405 * handling will clear the WOL event. Clear the WOL event 1406 * before enabling it if !phy_interrupt_is_valid() 1407 */ 1408 if (!phy_interrupt_is_valid(phydev)) 1409 phy_read(phydev, MII_M1011_IEVENT); 1410 1411 /* Enable the WOL interrupt */ 1412 err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0, 1413 MII_88E1318S_PHY_CSIER_WOL_EIE); 1414 if (err < 0) 1415 goto error; 1416 1417 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE); 1418 if (err < 0) 1419 goto error; 1420 1421 /* Setup LED[2] as interrupt pin (active low) */ 1422 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR, 1423 MII_88E1318S_PHY_LED_TCR_FORCE_INT, 1424 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE | 1425 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW); 1426 if (err < 0) 1427 goto error; 1428 1429 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 1430 if (err < 0) 1431 goto error; 1432 1433 /* Store the device address for the magic packet */ 1434 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2, 1435 ((phydev->attached_dev->dev_addr[5] << 8) | 1436 phydev->attached_dev->dev_addr[4])); 1437 if (err < 0) 1438 goto error; 1439 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1, 1440 ((phydev->attached_dev->dev_addr[3] << 8) | 1441 phydev->attached_dev->dev_addr[2])); 1442 if (err < 0) 1443 goto error; 1444 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0, 1445 ((phydev->attached_dev->dev_addr[1] << 8) | 1446 phydev->attached_dev->dev_addr[0])); 1447 if (err < 0) 1448 goto error; 1449 1450 /* Clear WOL status and enable magic packet matching */ 1451 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0, 1452 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS | 1453 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE); 1454 if (err < 0) 1455 goto error; 1456 } else { 1457 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 1458 if (err < 0) 1459 goto error; 1460 1461 /* Clear WOL status and disable magic packet matching */ 1462 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 1463 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE, 1464 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS); 1465 if (err < 0) 1466 goto error; 1467 } 1468 1469 error: 1470 return phy_restore_page(phydev, oldpage, err); 1471 } 1472 1473 static int marvell_get_sset_count(struct phy_device *phydev) 1474 { 1475 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1476 phydev->supported)) 1477 return ARRAY_SIZE(marvell_hw_stats); 1478 else 1479 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS; 1480 } 1481 1482 static void marvell_get_strings(struct phy_device *phydev, u8 *data) 1483 { 1484 int i; 1485 1486 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) { 1487 strlcpy(data + i * ETH_GSTRING_LEN, 1488 marvell_hw_stats[i].string, ETH_GSTRING_LEN); 1489 } 1490 } 1491 1492 static u64 marvell_get_stat(struct phy_device *phydev, int i) 1493 { 1494 struct marvell_hw_stat stat = marvell_hw_stats[i]; 1495 struct marvell_priv *priv = phydev->priv; 1496 int val; 1497 u64 ret; 1498 1499 val = phy_read_paged(phydev, stat.page, stat.reg); 1500 if (val < 0) { 1501 ret = U64_MAX; 1502 } else { 1503 val = val & ((1 << stat.bits) - 1); 1504 priv->stats[i] += val; 1505 ret = priv->stats[i]; 1506 } 1507 1508 return ret; 1509 } 1510 1511 static void marvell_get_stats(struct phy_device *phydev, 1512 struct ethtool_stats *stats, u64 *data) 1513 { 1514 int i; 1515 1516 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) 1517 data[i] = marvell_get_stat(phydev, i); 1518 } 1519 1520 #ifdef CONFIG_HWMON 1521 static int m88e1121_get_temp(struct phy_device *phydev, long *temp) 1522 { 1523 int oldpage; 1524 int ret = 0; 1525 int val; 1526 1527 *temp = 0; 1528 1529 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 1530 if (oldpage < 0) 1531 goto error; 1532 1533 /* Enable temperature sensor */ 1534 ret = __phy_read(phydev, MII_88E1121_MISC_TEST); 1535 if (ret < 0) 1536 goto error; 1537 1538 ret = __phy_write(phydev, MII_88E1121_MISC_TEST, 1539 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); 1540 if (ret < 0) 1541 goto error; 1542 1543 /* Wait for temperature to stabilize */ 1544 usleep_range(10000, 12000); 1545 1546 val = __phy_read(phydev, MII_88E1121_MISC_TEST); 1547 if (val < 0) { 1548 ret = val; 1549 goto error; 1550 } 1551 1552 /* Disable temperature sensor */ 1553 ret = __phy_write(phydev, MII_88E1121_MISC_TEST, 1554 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); 1555 if (ret < 0) 1556 goto error; 1557 1558 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000; 1559 1560 error: 1561 return phy_restore_page(phydev, oldpage, ret); 1562 } 1563 1564 static int m88e1121_hwmon_read(struct device *dev, 1565 enum hwmon_sensor_types type, 1566 u32 attr, int channel, long *temp) 1567 { 1568 struct phy_device *phydev = dev_get_drvdata(dev); 1569 int err; 1570 1571 switch (attr) { 1572 case hwmon_temp_input: 1573 err = m88e1121_get_temp(phydev, temp); 1574 break; 1575 default: 1576 return -EOPNOTSUPP; 1577 } 1578 1579 return err; 1580 } 1581 1582 static umode_t m88e1121_hwmon_is_visible(const void *data, 1583 enum hwmon_sensor_types type, 1584 u32 attr, int channel) 1585 { 1586 if (type != hwmon_temp) 1587 return 0; 1588 1589 switch (attr) { 1590 case hwmon_temp_input: 1591 return 0444; 1592 default: 1593 return 0; 1594 } 1595 } 1596 1597 static u32 m88e1121_hwmon_chip_config[] = { 1598 HWMON_C_REGISTER_TZ, 1599 0 1600 }; 1601 1602 static const struct hwmon_channel_info m88e1121_hwmon_chip = { 1603 .type = hwmon_chip, 1604 .config = m88e1121_hwmon_chip_config, 1605 }; 1606 1607 static u32 m88e1121_hwmon_temp_config[] = { 1608 HWMON_T_INPUT, 1609 0 1610 }; 1611 1612 static const struct hwmon_channel_info m88e1121_hwmon_temp = { 1613 .type = hwmon_temp, 1614 .config = m88e1121_hwmon_temp_config, 1615 }; 1616 1617 static const struct hwmon_channel_info *m88e1121_hwmon_info[] = { 1618 &m88e1121_hwmon_chip, 1619 &m88e1121_hwmon_temp, 1620 NULL 1621 }; 1622 1623 static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = { 1624 .is_visible = m88e1121_hwmon_is_visible, 1625 .read = m88e1121_hwmon_read, 1626 }; 1627 1628 static const struct hwmon_chip_info m88e1121_hwmon_chip_info = { 1629 .ops = &m88e1121_hwmon_hwmon_ops, 1630 .info = m88e1121_hwmon_info, 1631 }; 1632 1633 static int m88e1510_get_temp(struct phy_device *phydev, long *temp) 1634 { 1635 int ret; 1636 1637 *temp = 0; 1638 1639 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1640 MII_88E1510_TEMP_SENSOR); 1641 if (ret < 0) 1642 return ret; 1643 1644 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000; 1645 1646 return 0; 1647 } 1648 1649 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp) 1650 { 1651 int ret; 1652 1653 *temp = 0; 1654 1655 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1656 MII_88E1121_MISC_TEST); 1657 if (ret < 0) 1658 return ret; 1659 1660 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >> 1661 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25; 1662 /* convert to mC */ 1663 *temp *= 1000; 1664 1665 return 0; 1666 } 1667 1668 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp) 1669 { 1670 temp = temp / 1000; 1671 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f); 1672 1673 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1674 MII_88E1121_MISC_TEST, 1675 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK, 1676 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT); 1677 } 1678 1679 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm) 1680 { 1681 int ret; 1682 1683 *alarm = false; 1684 1685 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1686 MII_88E1121_MISC_TEST); 1687 if (ret < 0) 1688 return ret; 1689 1690 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ); 1691 1692 return 0; 1693 } 1694 1695 static int m88e1510_hwmon_read(struct device *dev, 1696 enum hwmon_sensor_types type, 1697 u32 attr, int channel, long *temp) 1698 { 1699 struct phy_device *phydev = dev_get_drvdata(dev); 1700 int err; 1701 1702 switch (attr) { 1703 case hwmon_temp_input: 1704 err = m88e1510_get_temp(phydev, temp); 1705 break; 1706 case hwmon_temp_crit: 1707 err = m88e1510_get_temp_critical(phydev, temp); 1708 break; 1709 case hwmon_temp_max_alarm: 1710 err = m88e1510_get_temp_alarm(phydev, temp); 1711 break; 1712 default: 1713 return -EOPNOTSUPP; 1714 } 1715 1716 return err; 1717 } 1718 1719 static int m88e1510_hwmon_write(struct device *dev, 1720 enum hwmon_sensor_types type, 1721 u32 attr, int channel, long temp) 1722 { 1723 struct phy_device *phydev = dev_get_drvdata(dev); 1724 int err; 1725 1726 switch (attr) { 1727 case hwmon_temp_crit: 1728 err = m88e1510_set_temp_critical(phydev, temp); 1729 break; 1730 default: 1731 return -EOPNOTSUPP; 1732 } 1733 return err; 1734 } 1735 1736 static umode_t m88e1510_hwmon_is_visible(const void *data, 1737 enum hwmon_sensor_types type, 1738 u32 attr, int channel) 1739 { 1740 if (type != hwmon_temp) 1741 return 0; 1742 1743 switch (attr) { 1744 case hwmon_temp_input: 1745 case hwmon_temp_max_alarm: 1746 return 0444; 1747 case hwmon_temp_crit: 1748 return 0644; 1749 default: 1750 return 0; 1751 } 1752 } 1753 1754 static u32 m88e1510_hwmon_temp_config[] = { 1755 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM, 1756 0 1757 }; 1758 1759 static const struct hwmon_channel_info m88e1510_hwmon_temp = { 1760 .type = hwmon_temp, 1761 .config = m88e1510_hwmon_temp_config, 1762 }; 1763 1764 static const struct hwmon_channel_info *m88e1510_hwmon_info[] = { 1765 &m88e1121_hwmon_chip, 1766 &m88e1510_hwmon_temp, 1767 NULL 1768 }; 1769 1770 static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = { 1771 .is_visible = m88e1510_hwmon_is_visible, 1772 .read = m88e1510_hwmon_read, 1773 .write = m88e1510_hwmon_write, 1774 }; 1775 1776 static const struct hwmon_chip_info m88e1510_hwmon_chip_info = { 1777 .ops = &m88e1510_hwmon_hwmon_ops, 1778 .info = m88e1510_hwmon_info, 1779 }; 1780 1781 static int m88e6390_get_temp(struct phy_device *phydev, long *temp) 1782 { 1783 int sum = 0; 1784 int oldpage; 1785 int ret = 0; 1786 int i; 1787 1788 *temp = 0; 1789 1790 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 1791 if (oldpage < 0) 1792 goto error; 1793 1794 /* Enable temperature sensor */ 1795 ret = __phy_read(phydev, MII_88E6390_MISC_TEST); 1796 if (ret < 0) 1797 goto error; 1798 1799 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK; 1800 ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE | 1801 MII_88E6390_MISC_TEST_SAMPLE_1S; 1802 1803 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); 1804 if (ret < 0) 1805 goto error; 1806 1807 /* Wait for temperature to stabilize */ 1808 usleep_range(10000, 12000); 1809 1810 /* Reading the temperature sense has an errata. You need to read 1811 * a number of times and take an average. 1812 */ 1813 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) { 1814 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR); 1815 if (ret < 0) 1816 goto error; 1817 sum += ret & MII_88E6390_TEMP_SENSOR_MASK; 1818 } 1819 1820 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES; 1821 *temp = (sum - 75) * 1000; 1822 1823 /* Disable temperature sensor */ 1824 ret = __phy_read(phydev, MII_88E6390_MISC_TEST); 1825 if (ret < 0) 1826 goto error; 1827 1828 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK; 1829 ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE; 1830 1831 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); 1832 1833 error: 1834 phy_restore_page(phydev, oldpage, ret); 1835 1836 return ret; 1837 } 1838 1839 static int m88e6390_hwmon_read(struct device *dev, 1840 enum hwmon_sensor_types type, 1841 u32 attr, int channel, long *temp) 1842 { 1843 struct phy_device *phydev = dev_get_drvdata(dev); 1844 int err; 1845 1846 switch (attr) { 1847 case hwmon_temp_input: 1848 err = m88e6390_get_temp(phydev, temp); 1849 break; 1850 default: 1851 return -EOPNOTSUPP; 1852 } 1853 1854 return err; 1855 } 1856 1857 static umode_t m88e6390_hwmon_is_visible(const void *data, 1858 enum hwmon_sensor_types type, 1859 u32 attr, int channel) 1860 { 1861 if (type != hwmon_temp) 1862 return 0; 1863 1864 switch (attr) { 1865 case hwmon_temp_input: 1866 return 0444; 1867 default: 1868 return 0; 1869 } 1870 } 1871 1872 static u32 m88e6390_hwmon_temp_config[] = { 1873 HWMON_T_INPUT, 1874 0 1875 }; 1876 1877 static const struct hwmon_channel_info m88e6390_hwmon_temp = { 1878 .type = hwmon_temp, 1879 .config = m88e6390_hwmon_temp_config, 1880 }; 1881 1882 static const struct hwmon_channel_info *m88e6390_hwmon_info[] = { 1883 &m88e1121_hwmon_chip, 1884 &m88e6390_hwmon_temp, 1885 NULL 1886 }; 1887 1888 static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = { 1889 .is_visible = m88e6390_hwmon_is_visible, 1890 .read = m88e6390_hwmon_read, 1891 }; 1892 1893 static const struct hwmon_chip_info m88e6390_hwmon_chip_info = { 1894 .ops = &m88e6390_hwmon_hwmon_ops, 1895 .info = m88e6390_hwmon_info, 1896 }; 1897 1898 static int marvell_hwmon_name(struct phy_device *phydev) 1899 { 1900 struct marvell_priv *priv = phydev->priv; 1901 struct device *dev = &phydev->mdio.dev; 1902 const char *devname = dev_name(dev); 1903 size_t len = strlen(devname); 1904 int i, j; 1905 1906 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL); 1907 if (!priv->hwmon_name) 1908 return -ENOMEM; 1909 1910 for (i = j = 0; i < len && devname[i]; i++) { 1911 if (isalnum(devname[i])) 1912 priv->hwmon_name[j++] = devname[i]; 1913 } 1914 1915 return 0; 1916 } 1917 1918 static int marvell_hwmon_probe(struct phy_device *phydev, 1919 const struct hwmon_chip_info *chip) 1920 { 1921 struct marvell_priv *priv = phydev->priv; 1922 struct device *dev = &phydev->mdio.dev; 1923 int err; 1924 1925 err = marvell_hwmon_name(phydev); 1926 if (err) 1927 return err; 1928 1929 priv->hwmon_dev = devm_hwmon_device_register_with_info( 1930 dev, priv->hwmon_name, phydev, chip, NULL); 1931 1932 return PTR_ERR_OR_ZERO(priv->hwmon_dev); 1933 } 1934 1935 static int m88e1121_hwmon_probe(struct phy_device *phydev) 1936 { 1937 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info); 1938 } 1939 1940 static int m88e1510_hwmon_probe(struct phy_device *phydev) 1941 { 1942 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info); 1943 } 1944 1945 static int m88e6390_hwmon_probe(struct phy_device *phydev) 1946 { 1947 return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info); 1948 } 1949 #else 1950 static int m88e1121_hwmon_probe(struct phy_device *phydev) 1951 { 1952 return 0; 1953 } 1954 1955 static int m88e1510_hwmon_probe(struct phy_device *phydev) 1956 { 1957 return 0; 1958 } 1959 1960 static int m88e6390_hwmon_probe(struct phy_device *phydev) 1961 { 1962 return 0; 1963 } 1964 #endif 1965 1966 static int marvell_probe(struct phy_device *phydev) 1967 { 1968 struct marvell_priv *priv; 1969 1970 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL); 1971 if (!priv) 1972 return -ENOMEM; 1973 1974 phydev->priv = priv; 1975 1976 return 0; 1977 } 1978 1979 static int m88e1121_probe(struct phy_device *phydev) 1980 { 1981 int err; 1982 1983 err = marvell_probe(phydev); 1984 if (err) 1985 return err; 1986 1987 return m88e1121_hwmon_probe(phydev); 1988 } 1989 1990 static int m88e1510_probe(struct phy_device *phydev) 1991 { 1992 int err; 1993 1994 err = marvell_probe(phydev); 1995 if (err) 1996 return err; 1997 1998 return m88e1510_hwmon_probe(phydev); 1999 } 2000 2001 static int m88e6390_probe(struct phy_device *phydev) 2002 { 2003 int err; 2004 2005 err = marvell_probe(phydev); 2006 if (err) 2007 return err; 2008 2009 return m88e6390_hwmon_probe(phydev); 2010 } 2011 2012 static struct phy_driver marvell_drivers[] = { 2013 { 2014 .phy_id = MARVELL_PHY_ID_88E1101, 2015 .phy_id_mask = MARVELL_PHY_ID_MASK, 2016 .name = "Marvell 88E1101", 2017 .features = PHY_GBIT_FEATURES, 2018 .probe = marvell_probe, 2019 .config_init = &marvell_config_init, 2020 .config_aneg = &m88e1101_config_aneg, 2021 .ack_interrupt = &marvell_ack_interrupt, 2022 .config_intr = &marvell_config_intr, 2023 .resume = &genphy_resume, 2024 .suspend = &genphy_suspend, 2025 .read_page = marvell_read_page, 2026 .write_page = marvell_write_page, 2027 .get_sset_count = marvell_get_sset_count, 2028 .get_strings = marvell_get_strings, 2029 .get_stats = marvell_get_stats, 2030 }, 2031 { 2032 .phy_id = MARVELL_PHY_ID_88E1112, 2033 .phy_id_mask = MARVELL_PHY_ID_MASK, 2034 .name = "Marvell 88E1112", 2035 .features = PHY_GBIT_FEATURES, 2036 .probe = marvell_probe, 2037 .config_init = &m88e1111_config_init, 2038 .config_aneg = &marvell_config_aneg, 2039 .ack_interrupt = &marvell_ack_interrupt, 2040 .config_intr = &marvell_config_intr, 2041 .resume = &genphy_resume, 2042 .suspend = &genphy_suspend, 2043 .read_page = marvell_read_page, 2044 .write_page = marvell_write_page, 2045 .get_sset_count = marvell_get_sset_count, 2046 .get_strings = marvell_get_strings, 2047 .get_stats = marvell_get_stats, 2048 }, 2049 { 2050 .phy_id = MARVELL_PHY_ID_88E1111, 2051 .phy_id_mask = MARVELL_PHY_ID_MASK, 2052 .name = "Marvell 88E1111", 2053 .features = PHY_GBIT_FEATURES, 2054 .probe = marvell_probe, 2055 .config_init = &m88e1111_config_init, 2056 .config_aneg = &marvell_config_aneg, 2057 .read_status = &marvell_read_status, 2058 .ack_interrupt = &marvell_ack_interrupt, 2059 .config_intr = &marvell_config_intr, 2060 .resume = &genphy_resume, 2061 .suspend = &genphy_suspend, 2062 .read_page = marvell_read_page, 2063 .write_page = marvell_write_page, 2064 .get_sset_count = marvell_get_sset_count, 2065 .get_strings = marvell_get_strings, 2066 .get_stats = marvell_get_stats, 2067 }, 2068 { 2069 .phy_id = MARVELL_PHY_ID_88E1118, 2070 .phy_id_mask = MARVELL_PHY_ID_MASK, 2071 .name = "Marvell 88E1118", 2072 .features = PHY_GBIT_FEATURES, 2073 .probe = marvell_probe, 2074 .config_init = &m88e1118_config_init, 2075 .config_aneg = &m88e1118_config_aneg, 2076 .ack_interrupt = &marvell_ack_interrupt, 2077 .config_intr = &marvell_config_intr, 2078 .resume = &genphy_resume, 2079 .suspend = &genphy_suspend, 2080 .read_page = marvell_read_page, 2081 .write_page = marvell_write_page, 2082 .get_sset_count = marvell_get_sset_count, 2083 .get_strings = marvell_get_strings, 2084 .get_stats = marvell_get_stats, 2085 }, 2086 { 2087 .phy_id = MARVELL_PHY_ID_88E1121R, 2088 .phy_id_mask = MARVELL_PHY_ID_MASK, 2089 .name = "Marvell 88E1121R", 2090 .features = PHY_GBIT_FEATURES, 2091 .probe = &m88e1121_probe, 2092 .config_init = &marvell_config_init, 2093 .config_aneg = &m88e1121_config_aneg, 2094 .read_status = &marvell_read_status, 2095 .ack_interrupt = &marvell_ack_interrupt, 2096 .config_intr = &marvell_config_intr, 2097 .did_interrupt = &m88e1121_did_interrupt, 2098 .resume = &genphy_resume, 2099 .suspend = &genphy_suspend, 2100 .read_page = marvell_read_page, 2101 .write_page = marvell_write_page, 2102 .get_sset_count = marvell_get_sset_count, 2103 .get_strings = marvell_get_strings, 2104 .get_stats = marvell_get_stats, 2105 }, 2106 { 2107 .phy_id = MARVELL_PHY_ID_88E1318S, 2108 .phy_id_mask = MARVELL_PHY_ID_MASK, 2109 .name = "Marvell 88E1318S", 2110 .features = PHY_GBIT_FEATURES, 2111 .probe = marvell_probe, 2112 .config_init = &m88e1318_config_init, 2113 .config_aneg = &m88e1318_config_aneg, 2114 .read_status = &marvell_read_status, 2115 .ack_interrupt = &marvell_ack_interrupt, 2116 .config_intr = &marvell_config_intr, 2117 .did_interrupt = &m88e1121_did_interrupt, 2118 .get_wol = &m88e1318_get_wol, 2119 .set_wol = &m88e1318_set_wol, 2120 .resume = &genphy_resume, 2121 .suspend = &genphy_suspend, 2122 .read_page = marvell_read_page, 2123 .write_page = marvell_write_page, 2124 .get_sset_count = marvell_get_sset_count, 2125 .get_strings = marvell_get_strings, 2126 .get_stats = marvell_get_stats, 2127 }, 2128 { 2129 .phy_id = MARVELL_PHY_ID_88E1145, 2130 .phy_id_mask = MARVELL_PHY_ID_MASK, 2131 .name = "Marvell 88E1145", 2132 .features = PHY_GBIT_FEATURES, 2133 .probe = marvell_probe, 2134 .config_init = &m88e1145_config_init, 2135 .config_aneg = &m88e1101_config_aneg, 2136 .read_status = &genphy_read_status, 2137 .ack_interrupt = &marvell_ack_interrupt, 2138 .config_intr = &marvell_config_intr, 2139 .resume = &genphy_resume, 2140 .suspend = &genphy_suspend, 2141 .read_page = marvell_read_page, 2142 .write_page = marvell_write_page, 2143 .get_sset_count = marvell_get_sset_count, 2144 .get_strings = marvell_get_strings, 2145 .get_stats = marvell_get_stats, 2146 }, 2147 { 2148 .phy_id = MARVELL_PHY_ID_88E1149R, 2149 .phy_id_mask = MARVELL_PHY_ID_MASK, 2150 .name = "Marvell 88E1149R", 2151 .features = PHY_GBIT_FEATURES, 2152 .probe = marvell_probe, 2153 .config_init = &m88e1149_config_init, 2154 .config_aneg = &m88e1118_config_aneg, 2155 .ack_interrupt = &marvell_ack_interrupt, 2156 .config_intr = &marvell_config_intr, 2157 .resume = &genphy_resume, 2158 .suspend = &genphy_suspend, 2159 .read_page = marvell_read_page, 2160 .write_page = marvell_write_page, 2161 .get_sset_count = marvell_get_sset_count, 2162 .get_strings = marvell_get_strings, 2163 .get_stats = marvell_get_stats, 2164 }, 2165 { 2166 .phy_id = MARVELL_PHY_ID_88E1240, 2167 .phy_id_mask = MARVELL_PHY_ID_MASK, 2168 .name = "Marvell 88E1240", 2169 .features = PHY_GBIT_FEATURES, 2170 .probe = marvell_probe, 2171 .config_init = &m88e1111_config_init, 2172 .config_aneg = &marvell_config_aneg, 2173 .ack_interrupt = &marvell_ack_interrupt, 2174 .config_intr = &marvell_config_intr, 2175 .resume = &genphy_resume, 2176 .suspend = &genphy_suspend, 2177 .read_page = marvell_read_page, 2178 .write_page = marvell_write_page, 2179 .get_sset_count = marvell_get_sset_count, 2180 .get_strings = marvell_get_strings, 2181 .get_stats = marvell_get_stats, 2182 }, 2183 { 2184 .phy_id = MARVELL_PHY_ID_88E1116R, 2185 .phy_id_mask = MARVELL_PHY_ID_MASK, 2186 .name = "Marvell 88E1116R", 2187 .features = PHY_GBIT_FEATURES, 2188 .probe = marvell_probe, 2189 .config_init = &m88e1116r_config_init, 2190 .ack_interrupt = &marvell_ack_interrupt, 2191 .config_intr = &marvell_config_intr, 2192 .resume = &genphy_resume, 2193 .suspend = &genphy_suspend, 2194 .read_page = marvell_read_page, 2195 .write_page = marvell_write_page, 2196 .get_sset_count = marvell_get_sset_count, 2197 .get_strings = marvell_get_strings, 2198 .get_stats = marvell_get_stats, 2199 }, 2200 { 2201 .phy_id = MARVELL_PHY_ID_88E1510, 2202 .phy_id_mask = MARVELL_PHY_ID_MASK, 2203 .name = "Marvell 88E1510", 2204 .features = PHY_GBIT_FIBRE_FEATURES, 2205 .probe = &m88e1510_probe, 2206 .config_init = &m88e1510_config_init, 2207 .config_aneg = &m88e1510_config_aneg, 2208 .read_status = &marvell_read_status, 2209 .ack_interrupt = &marvell_ack_interrupt, 2210 .config_intr = &marvell_config_intr, 2211 .did_interrupt = &m88e1121_did_interrupt, 2212 .get_wol = &m88e1318_get_wol, 2213 .set_wol = &m88e1318_set_wol, 2214 .resume = &marvell_resume, 2215 .suspend = &marvell_suspend, 2216 .read_page = marvell_read_page, 2217 .write_page = marvell_write_page, 2218 .get_sset_count = marvell_get_sset_count, 2219 .get_strings = marvell_get_strings, 2220 .get_stats = marvell_get_stats, 2221 .set_loopback = genphy_loopback, 2222 }, 2223 { 2224 .phy_id = MARVELL_PHY_ID_88E1540, 2225 .phy_id_mask = MARVELL_PHY_ID_MASK, 2226 .name = "Marvell 88E1540", 2227 .features = PHY_GBIT_FEATURES, 2228 .probe = m88e1510_probe, 2229 .config_init = &marvell_config_init, 2230 .config_aneg = &m88e1510_config_aneg, 2231 .read_status = &marvell_read_status, 2232 .ack_interrupt = &marvell_ack_interrupt, 2233 .config_intr = &marvell_config_intr, 2234 .did_interrupt = &m88e1121_did_interrupt, 2235 .resume = &genphy_resume, 2236 .suspend = &genphy_suspend, 2237 .read_page = marvell_read_page, 2238 .write_page = marvell_write_page, 2239 .get_sset_count = marvell_get_sset_count, 2240 .get_strings = marvell_get_strings, 2241 .get_stats = marvell_get_stats, 2242 }, 2243 { 2244 .phy_id = MARVELL_PHY_ID_88E1545, 2245 .phy_id_mask = MARVELL_PHY_ID_MASK, 2246 .name = "Marvell 88E1545", 2247 .probe = m88e1510_probe, 2248 .features = PHY_GBIT_FEATURES, 2249 .config_init = &marvell_config_init, 2250 .config_aneg = &m88e1510_config_aneg, 2251 .read_status = &marvell_read_status, 2252 .ack_interrupt = &marvell_ack_interrupt, 2253 .config_intr = &marvell_config_intr, 2254 .did_interrupt = &m88e1121_did_interrupt, 2255 .resume = &genphy_resume, 2256 .suspend = &genphy_suspend, 2257 .read_page = marvell_read_page, 2258 .write_page = marvell_write_page, 2259 .get_sset_count = marvell_get_sset_count, 2260 .get_strings = marvell_get_strings, 2261 .get_stats = marvell_get_stats, 2262 }, 2263 { 2264 .phy_id = MARVELL_PHY_ID_88E3016, 2265 .phy_id_mask = MARVELL_PHY_ID_MASK, 2266 .name = "Marvell 88E3016", 2267 .features = PHY_BASIC_FEATURES, 2268 .probe = marvell_probe, 2269 .config_init = &m88e3016_config_init, 2270 .aneg_done = &marvell_aneg_done, 2271 .read_status = &marvell_read_status, 2272 .ack_interrupt = &marvell_ack_interrupt, 2273 .config_intr = &marvell_config_intr, 2274 .did_interrupt = &m88e1121_did_interrupt, 2275 .resume = &genphy_resume, 2276 .suspend = &genphy_suspend, 2277 .read_page = marvell_read_page, 2278 .write_page = marvell_write_page, 2279 .get_sset_count = marvell_get_sset_count, 2280 .get_strings = marvell_get_strings, 2281 .get_stats = marvell_get_stats, 2282 }, 2283 { 2284 .phy_id = MARVELL_PHY_ID_88E6390, 2285 .phy_id_mask = MARVELL_PHY_ID_MASK, 2286 .name = "Marvell 88E6390", 2287 .features = PHY_GBIT_FEATURES, 2288 .probe = m88e6390_probe, 2289 .config_init = &marvell_config_init, 2290 .config_aneg = &m88e1510_config_aneg, 2291 .read_status = &marvell_read_status, 2292 .ack_interrupt = &marvell_ack_interrupt, 2293 .config_intr = &marvell_config_intr, 2294 .did_interrupt = &m88e1121_did_interrupt, 2295 .resume = &genphy_resume, 2296 .suspend = &genphy_suspend, 2297 .read_page = marvell_read_page, 2298 .write_page = marvell_write_page, 2299 .get_sset_count = marvell_get_sset_count, 2300 .get_strings = marvell_get_strings, 2301 .get_stats = marvell_get_stats, 2302 }, 2303 }; 2304 2305 module_phy_driver(marvell_drivers); 2306 2307 static struct mdio_device_id __maybe_unused marvell_tbl[] = { 2308 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK }, 2309 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK }, 2310 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK }, 2311 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK }, 2312 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK }, 2313 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK }, 2314 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK }, 2315 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK }, 2316 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK }, 2317 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK }, 2318 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK }, 2319 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK }, 2320 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK }, 2321 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK }, 2322 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK }, 2323 { } 2324 }; 2325 2326 MODULE_DEVICE_TABLE(mdio, marvell_tbl); 2327