xref: /openbmc/linux/drivers/net/mdio/mdio-moxart.c (revision d0034a7a4ac7fae708146ac0059b9c47a1543f0d)
1a9770eacSAndrew Lunn // SPDX-License-Identifier: GPL-2.0
2a9770eacSAndrew Lunn /* MOXA ART Ethernet (RTL8201CP) MDIO interface driver
3a9770eacSAndrew Lunn  *
4a9770eacSAndrew Lunn  * Copyright (C) 2013 Jonas Jensen <jonas.jensen@gmail.com>
5a9770eacSAndrew Lunn  */
6a9770eacSAndrew Lunn 
7a9770eacSAndrew Lunn #include <linux/delay.h>
8a9770eacSAndrew Lunn #include <linux/kernel.h>
9a9770eacSAndrew Lunn #include <linux/module.h>
10a9770eacSAndrew Lunn #include <linux/mutex.h>
11a9770eacSAndrew Lunn #include <linux/of_address.h>
12a9770eacSAndrew Lunn #include <linux/of_mdio.h>
13a9770eacSAndrew Lunn #include <linux/phy.h>
14a9770eacSAndrew Lunn #include <linux/platform_device.h>
15a9770eacSAndrew Lunn 
16a9770eacSAndrew Lunn #define REG_PHY_CTRL            0
17a9770eacSAndrew Lunn #define REG_PHY_WRITE_DATA      4
18a9770eacSAndrew Lunn 
19a9770eacSAndrew Lunn /* REG_PHY_CTRL */
20a9770eacSAndrew Lunn #define MIIWR                   BIT(27) /* init write sequence (auto cleared)*/
21a9770eacSAndrew Lunn #define MIIRD                   BIT(26)
22a9770eacSAndrew Lunn #define REGAD_MASK              0x3e00000
23a9770eacSAndrew Lunn #define PHYAD_MASK              0x1f0000
24a9770eacSAndrew Lunn #define MIIRDATA_MASK           0xffff
25a9770eacSAndrew Lunn 
26a9770eacSAndrew Lunn /* REG_PHY_WRITE_DATA */
27a9770eacSAndrew Lunn #define MIIWDATA_MASK           0xffff
28a9770eacSAndrew Lunn 
29a9770eacSAndrew Lunn struct moxart_mdio_data {
30a9770eacSAndrew Lunn 	void __iomem		*base;
31a9770eacSAndrew Lunn };
32a9770eacSAndrew Lunn 
moxart_mdio_read(struct mii_bus * bus,int mii_id,int regnum)33a9770eacSAndrew Lunn static int moxart_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
34a9770eacSAndrew Lunn {
35a9770eacSAndrew Lunn 	struct moxart_mdio_data *data = bus->priv;
36a9770eacSAndrew Lunn 	u32 ctrl = 0;
37a9770eacSAndrew Lunn 	unsigned int count = 5;
38a9770eacSAndrew Lunn 
39a9770eacSAndrew Lunn 	dev_dbg(&bus->dev, "%s\n", __func__);
40a9770eacSAndrew Lunn 
41a9770eacSAndrew Lunn 	ctrl |= MIIRD | ((mii_id << 16) & PHYAD_MASK) |
42a9770eacSAndrew Lunn 		((regnum << 21) & REGAD_MASK);
43a9770eacSAndrew Lunn 
44a9770eacSAndrew Lunn 	writel(ctrl, data->base + REG_PHY_CTRL);
45a9770eacSAndrew Lunn 
46a9770eacSAndrew Lunn 	do {
47a9770eacSAndrew Lunn 		ctrl = readl(data->base + REG_PHY_CTRL);
48a9770eacSAndrew Lunn 
49a9770eacSAndrew Lunn 		if (!(ctrl & MIIRD))
50a9770eacSAndrew Lunn 			return ctrl & MIIRDATA_MASK;
51a9770eacSAndrew Lunn 
52a9770eacSAndrew Lunn 		mdelay(10);
53a9770eacSAndrew Lunn 		count--;
54a9770eacSAndrew Lunn 	} while (count > 0);
55a9770eacSAndrew Lunn 
56a9770eacSAndrew Lunn 	dev_dbg(&bus->dev, "%s timed out\n", __func__);
57a9770eacSAndrew Lunn 
58a9770eacSAndrew Lunn 	return -ETIMEDOUT;
59a9770eacSAndrew Lunn }
60a9770eacSAndrew Lunn 
moxart_mdio_write(struct mii_bus * bus,int mii_id,int regnum,u16 value)61a9770eacSAndrew Lunn static int moxart_mdio_write(struct mii_bus *bus, int mii_id,
62a9770eacSAndrew Lunn 			     int regnum, u16 value)
63a9770eacSAndrew Lunn {
64a9770eacSAndrew Lunn 	struct moxart_mdio_data *data = bus->priv;
65a9770eacSAndrew Lunn 	u32 ctrl = 0;
66a9770eacSAndrew Lunn 	unsigned int count = 5;
67a9770eacSAndrew Lunn 
68a9770eacSAndrew Lunn 	dev_dbg(&bus->dev, "%s\n", __func__);
69a9770eacSAndrew Lunn 
70a9770eacSAndrew Lunn 	ctrl |= MIIWR | ((mii_id << 16) & PHYAD_MASK) |
71a9770eacSAndrew Lunn 		((regnum << 21) & REGAD_MASK);
72a9770eacSAndrew Lunn 
73a9770eacSAndrew Lunn 	value &= MIIWDATA_MASK;
74a9770eacSAndrew Lunn 
75a9770eacSAndrew Lunn 	writel(value, data->base + REG_PHY_WRITE_DATA);
76a9770eacSAndrew Lunn 	writel(ctrl, data->base + REG_PHY_CTRL);
77a9770eacSAndrew Lunn 
78a9770eacSAndrew Lunn 	do {
79a9770eacSAndrew Lunn 		ctrl = readl(data->base + REG_PHY_CTRL);
80a9770eacSAndrew Lunn 
81a9770eacSAndrew Lunn 		if (!(ctrl & MIIWR))
82a9770eacSAndrew Lunn 			return 0;
83a9770eacSAndrew Lunn 
84a9770eacSAndrew Lunn 		mdelay(10);
85a9770eacSAndrew Lunn 		count--;
86a9770eacSAndrew Lunn 	} while (count > 0);
87a9770eacSAndrew Lunn 
88a9770eacSAndrew Lunn 	dev_dbg(&bus->dev, "%s timed out\n", __func__);
89a9770eacSAndrew Lunn 
90a9770eacSAndrew Lunn 	return -ETIMEDOUT;
91a9770eacSAndrew Lunn }
92a9770eacSAndrew Lunn 
moxart_mdio_reset(struct mii_bus * bus)93a9770eacSAndrew Lunn static int moxart_mdio_reset(struct mii_bus *bus)
94a9770eacSAndrew Lunn {
95a9770eacSAndrew Lunn 	int data, i;
96a9770eacSAndrew Lunn 
97a9770eacSAndrew Lunn 	for (i = 0; i < PHY_MAX_ADDR; i++) {
98a9770eacSAndrew Lunn 		data = moxart_mdio_read(bus, i, MII_BMCR);
99a9770eacSAndrew Lunn 		if (data < 0)
100a9770eacSAndrew Lunn 			continue;
101a9770eacSAndrew Lunn 
102a9770eacSAndrew Lunn 		data |= BMCR_RESET;
103a9770eacSAndrew Lunn 		if (moxart_mdio_write(bus, i, MII_BMCR, data) < 0)
104a9770eacSAndrew Lunn 			continue;
105a9770eacSAndrew Lunn 	}
106a9770eacSAndrew Lunn 
107a9770eacSAndrew Lunn 	return 0;
108a9770eacSAndrew Lunn }
109a9770eacSAndrew Lunn 
moxart_mdio_probe(struct platform_device * pdev)110a9770eacSAndrew Lunn static int moxart_mdio_probe(struct platform_device *pdev)
111a9770eacSAndrew Lunn {
112a9770eacSAndrew Lunn 	struct device_node *np = pdev->dev.of_node;
113a9770eacSAndrew Lunn 	struct mii_bus *bus;
114a9770eacSAndrew Lunn 	struct moxart_mdio_data *data;
115a9770eacSAndrew Lunn 	int ret, i;
116a9770eacSAndrew Lunn 
117a9770eacSAndrew Lunn 	bus = mdiobus_alloc_size(sizeof(*data));
118a9770eacSAndrew Lunn 	if (!bus)
119a9770eacSAndrew Lunn 		return -ENOMEM;
120a9770eacSAndrew Lunn 
121a9770eacSAndrew Lunn 	bus->name = "MOXA ART Ethernet MII";
122a9770eacSAndrew Lunn 	bus->read = &moxart_mdio_read;
123a9770eacSAndrew Lunn 	bus->write = &moxart_mdio_write;
124a9770eacSAndrew Lunn 	bus->reset = &moxart_mdio_reset;
125a9770eacSAndrew Lunn 	snprintf(bus->id, MII_BUS_ID_SIZE, "%s-%d-mii", pdev->name, pdev->id);
126a9770eacSAndrew Lunn 	bus->parent = &pdev->dev;
127a9770eacSAndrew Lunn 
128*93e8990cSHeiner Kallweit 	/* Setting PHY_MAC_INTERRUPT here even if it has no effect,
129a9770eacSAndrew Lunn 	 * of_mdiobus_register() sets these PHY_POLL.
130a9770eacSAndrew Lunn 	 * Ideally, the interrupt from MAC controller could be used to
131a9770eacSAndrew Lunn 	 * detect link state changes, not polling, i.e. if there was
132a9770eacSAndrew Lunn 	 * a way phy_driver could set PHY_HAS_INTERRUPT but have that
133a9770eacSAndrew Lunn 	 * interrupt handled in ethernet drivercode.
134a9770eacSAndrew Lunn 	 */
135a9770eacSAndrew Lunn 	for (i = 0; i < PHY_MAX_ADDR; i++)
136*93e8990cSHeiner Kallweit 		bus->irq[i] = PHY_MAC_INTERRUPT;
137a9770eacSAndrew Lunn 
138a9770eacSAndrew Lunn 	data = bus->priv;
139a9770eacSAndrew Lunn 	data->base = devm_platform_ioremap_resource(pdev, 0);
140a9770eacSAndrew Lunn 	if (IS_ERR(data->base)) {
141a9770eacSAndrew Lunn 		ret = PTR_ERR(data->base);
142a9770eacSAndrew Lunn 		goto err_out_free_mdiobus;
143a9770eacSAndrew Lunn 	}
144a9770eacSAndrew Lunn 
145a9770eacSAndrew Lunn 	ret = of_mdiobus_register(bus, np);
146a9770eacSAndrew Lunn 	if (ret < 0)
147a9770eacSAndrew Lunn 		goto err_out_free_mdiobus;
148a9770eacSAndrew Lunn 
149a9770eacSAndrew Lunn 	platform_set_drvdata(pdev, bus);
150a9770eacSAndrew Lunn 
151a9770eacSAndrew Lunn 	return 0;
152a9770eacSAndrew Lunn 
153a9770eacSAndrew Lunn err_out_free_mdiobus:
154a9770eacSAndrew Lunn 	mdiobus_free(bus);
155a9770eacSAndrew Lunn 	return ret;
156a9770eacSAndrew Lunn }
157a9770eacSAndrew Lunn 
moxart_mdio_remove(struct platform_device * pdev)158a9770eacSAndrew Lunn static int moxart_mdio_remove(struct platform_device *pdev)
159a9770eacSAndrew Lunn {
160a9770eacSAndrew Lunn 	struct mii_bus *bus = platform_get_drvdata(pdev);
161a9770eacSAndrew Lunn 
162a9770eacSAndrew Lunn 	mdiobus_unregister(bus);
163a9770eacSAndrew Lunn 	mdiobus_free(bus);
164a9770eacSAndrew Lunn 
165a9770eacSAndrew Lunn 	return 0;
166a9770eacSAndrew Lunn }
167a9770eacSAndrew Lunn 
168a9770eacSAndrew Lunn static const struct of_device_id moxart_mdio_dt_ids[] = {
169a9770eacSAndrew Lunn 	{ .compatible = "moxa,moxart-mdio" },
170a9770eacSAndrew Lunn 	{ }
171a9770eacSAndrew Lunn };
172a9770eacSAndrew Lunn MODULE_DEVICE_TABLE(of, moxart_mdio_dt_ids);
173a9770eacSAndrew Lunn 
174a9770eacSAndrew Lunn static struct platform_driver moxart_mdio_driver = {
175a9770eacSAndrew Lunn 	.probe = moxart_mdio_probe,
176a9770eacSAndrew Lunn 	.remove = moxart_mdio_remove,
177a9770eacSAndrew Lunn 	.driver = {
178a9770eacSAndrew Lunn 		.name = "moxart-mdio",
179a9770eacSAndrew Lunn 		.of_match_table = moxart_mdio_dt_ids,
180a9770eacSAndrew Lunn 	},
181a9770eacSAndrew Lunn };
182a9770eacSAndrew Lunn 
183a9770eacSAndrew Lunn module_platform_driver(moxart_mdio_driver);
184a9770eacSAndrew Lunn 
185a9770eacSAndrew Lunn MODULE_DESCRIPTION("MOXA ART MDIO interface driver");
186a9770eacSAndrew Lunn MODULE_AUTHOR("Jonas Jensen <jonas.jensen@gmail.com>");
187a9770eacSAndrew Lunn MODULE_LICENSE("GPL v2");
188