1 // SPDX-License-Identifier: GPL-2.0 2 3 /* Copyright (C) 2023 Linaro Ltd. */ 4 5 #include <linux/types.h> 6 7 #include "../gsi.h" 8 #include "../reg.h" 9 #include "../gsi_reg.h" 10 11 /* The inter-EE IRQ registers are relative to gsi->virt_raw (IPA v3.5+) */ 12 13 REG(INTER_EE_SRC_CH_IRQ_MSK, inter_ee_src_ch_irq_msk, 14 0x0000c020 + 0x1000 * GSI_EE_AP); 15 16 REG(INTER_EE_SRC_EV_CH_IRQ_MSK, inter_ee_src_ev_ch_irq_msk, 17 0x0000c024 + 0x1000 * GSI_EE_AP); 18 19 /* All other register offsets are relative to gsi->virt */ 20 21 REG_STRIDE(CH_C_CNTXT_0, ch_c_cntxt_0, 0x0001c000 + 0x4000 * GSI_EE_AP, 0x80); 22 23 REG_STRIDE(CH_C_CNTXT_1, ch_c_cntxt_1, 0x0001c004 + 0x4000 * GSI_EE_AP, 0x80); 24 25 REG_STRIDE(CH_C_CNTXT_2, ch_c_cntxt_2, 0x0001c008 + 0x4000 * GSI_EE_AP, 0x80); 26 27 REG_STRIDE(CH_C_CNTXT_3, ch_c_cntxt_3, 0x0001c00c + 0x4000 * GSI_EE_AP, 0x80); 28 29 REG_STRIDE(CH_C_QOS, ch_c_qos, 0x0001c05c + 0x4000 * GSI_EE_AP, 0x80); 30 31 REG_STRIDE(CH_C_SCRATCH_0, ch_c_scratch_0, 32 0x0001c060 + 0x4000 * GSI_EE_AP, 0x80); 33 34 REG_STRIDE(CH_C_SCRATCH_1, ch_c_scratch_1, 35 0x0001c064 + 0x4000 * GSI_EE_AP, 0x80); 36 37 REG_STRIDE(CH_C_SCRATCH_2, ch_c_scratch_2, 38 0x0001c068 + 0x4000 * GSI_EE_AP, 0x80); 39 40 REG_STRIDE(CH_C_SCRATCH_3, ch_c_scratch_3, 41 0x0001c06c + 0x4000 * GSI_EE_AP, 0x80); 42 43 REG_STRIDE(EV_CH_E_CNTXT_0, ev_ch_e_cntxt_0, 44 0x0001d000 + 0x4000 * GSI_EE_AP, 0x80); 45 46 REG_STRIDE(EV_CH_E_CNTXT_1, ev_ch_e_cntxt_1, 47 0x0001d004 + 0x4000 * GSI_EE_AP, 0x80); 48 49 REG_STRIDE(EV_CH_E_CNTXT_2, ev_ch_e_cntxt_2, 50 0x0001d008 + 0x4000 * GSI_EE_AP, 0x80); 51 52 REG_STRIDE(EV_CH_E_CNTXT_3, ev_ch_e_cntxt_3, 53 0x0001d00c + 0x4000 * GSI_EE_AP, 0x80); 54 55 REG_STRIDE(EV_CH_E_CNTXT_4, ev_ch_e_cntxt_4, 56 0x0001d010 + 0x4000 * GSI_EE_AP, 0x80); 57 58 REG_STRIDE(EV_CH_E_CNTXT_8, ev_ch_e_cntxt_8, 59 0x0001d020 + 0x4000 * GSI_EE_AP, 0x80); 60 61 REG_STRIDE(EV_CH_E_CNTXT_9, ev_ch_e_cntxt_9, 62 0x0001d024 + 0x4000 * GSI_EE_AP, 0x80); 63 64 REG_STRIDE(EV_CH_E_CNTXT_10, ev_ch_e_cntxt_10, 65 0x0001d028 + 0x4000 * GSI_EE_AP, 0x80); 66 67 REG_STRIDE(EV_CH_E_CNTXT_11, ev_ch_e_cntxt_11, 68 0x0001d02c + 0x4000 * GSI_EE_AP, 0x80); 69 70 REG_STRIDE(EV_CH_E_CNTXT_12, ev_ch_e_cntxt_12, 71 0x0001d030 + 0x4000 * GSI_EE_AP, 0x80); 72 73 REG_STRIDE(EV_CH_E_CNTXT_13, ev_ch_e_cntxt_13, 74 0x0001d034 + 0x4000 * GSI_EE_AP, 0x80); 75 76 REG_STRIDE(EV_CH_E_SCRATCH_0, ev_ch_e_scratch_0, 77 0x0001d048 + 0x4000 * GSI_EE_AP, 0x80); 78 79 REG_STRIDE(EV_CH_E_SCRATCH_1, ev_ch_e_scratch_1, 80 0x0001d04c + 0x4000 * GSI_EE_AP, 0x80); 81 82 REG_STRIDE(CH_C_DOORBELL_0, ch_c_doorbell_0, 83 0x0001e000 + 0x4000 * GSI_EE_AP, 0x08); 84 85 REG_STRIDE(EV_CH_E_DOORBELL_0, ev_ch_e_doorbell_0, 86 0x0001e100 + 0x4000 * GSI_EE_AP, 0x08); 87 88 REG(CNTXT_TYPE_IRQ, cntxt_type_irq, 0x0001f080 + 0x4000 * GSI_EE_AP); 89 90 REG(CNTXT_TYPE_IRQ_MSK, cntxt_type_irq_msk, 0x0001f088 + 0x4000 * GSI_EE_AP); 91 92 REG(CNTXT_SRC_CH_IRQ, cntxt_src_ch_irq, 0x0001f090 + 0x4000 * GSI_EE_AP); 93 94 REG(CNTXT_SRC_EV_CH_IRQ, cntxt_src_ev_ch_irq, 0x0001f094 + 0x4000 * GSI_EE_AP); 95 96 REG(CNTXT_SRC_CH_IRQ_MSK, cntxt_src_ch_irq_msk, 97 0x0001f098 + 0x4000 * GSI_EE_AP); 98 99 REG(CNTXT_SRC_EV_CH_IRQ_MSK, cntxt_src_ev_ch_irq_msk, 100 0x0001f09c + 0x4000 * GSI_EE_AP); 101 102 REG(CNTXT_SRC_CH_IRQ_CLR, cntxt_src_ch_irq_clr, 103 0x0001f0a0 + 0x4000 * GSI_EE_AP); 104 105 REG(CNTXT_SRC_EV_CH_IRQ_CLR, cntxt_src_ev_ch_irq_clr, 106 0x0001f0a4 + 0x4000 * GSI_EE_AP); 107 108 REG(CNTXT_SRC_IEOB_IRQ, cntxt_src_ieob_irq, 0x0001f0b0 + 0x4000 * GSI_EE_AP); 109 110 REG(CNTXT_SRC_IEOB_IRQ_MSK, cntxt_src_ieob_irq_msk, 111 0x0001f0b8 + 0x4000 * GSI_EE_AP); 112 113 REG(CNTXT_SRC_IEOB_IRQ_CLR, cntxt_src_ieob_irq_clr, 114 0x0001f0c0 + 0x4000 * GSI_EE_AP); 115 116 REG(CNTXT_GLOB_IRQ_STTS, cntxt_glob_irq_stts, 0x0001f100 + 0x4000 * GSI_EE_AP); 117 118 REG(CNTXT_GLOB_IRQ_EN, cntxt_glob_irq_en, 0x0001f108 + 0x4000 * GSI_EE_AP); 119 120 REG(CNTXT_GLOB_IRQ_CLR, cntxt_glob_irq_clr, 0x0001f110 + 0x4000 * GSI_EE_AP); 121 122 REG(CNTXT_GSI_IRQ_STTS, cntxt_gsi_irq_stts, 0x0001f118 + 0x4000 * GSI_EE_AP); 123 124 REG(CNTXT_GSI_IRQ_EN, cntxt_gsi_irq_en, 0x0001f120 + 0x4000 * GSI_EE_AP); 125 126 REG(CNTXT_GSI_IRQ_CLR, cntxt_gsi_irq_clr, 0x0001f128 + 0x4000 * GSI_EE_AP); 127 128 REG(CNTXT_INTSET, cntxt_intset, 0x0001f180 + 0x4000 * GSI_EE_AP); 129 130 REG(CNTXT_SCRATCH_0, cntxt_scratch_0, 0x0001f400 + 0x4000 * GSI_EE_AP); 131 132 static const struct reg *reg_array[] = { 133 [INTER_EE_SRC_CH_IRQ_MSK] = ®_inter_ee_src_ch_irq_msk, 134 [INTER_EE_SRC_EV_CH_IRQ_MSK] = ®_inter_ee_src_ev_ch_irq_msk, 135 [CH_C_CNTXT_0] = ®_ch_c_cntxt_0, 136 [CH_C_CNTXT_1] = ®_ch_c_cntxt_1, 137 [CH_C_CNTXT_2] = ®_ch_c_cntxt_2, 138 [CH_C_CNTXT_3] = ®_ch_c_cntxt_3, 139 [CH_C_QOS] = ®_ch_c_qos, 140 [CH_C_SCRATCH_0] = ®_ch_c_scratch_0, 141 [CH_C_SCRATCH_1] = ®_ch_c_scratch_1, 142 [CH_C_SCRATCH_2] = ®_ch_c_scratch_2, 143 [CH_C_SCRATCH_3] = ®_ch_c_scratch_3, 144 [EV_CH_E_CNTXT_0] = ®_ev_ch_e_cntxt_0, 145 [EV_CH_E_CNTXT_1] = ®_ev_ch_e_cntxt_1, 146 [EV_CH_E_CNTXT_2] = ®_ev_ch_e_cntxt_2, 147 [EV_CH_E_CNTXT_3] = ®_ev_ch_e_cntxt_3, 148 [EV_CH_E_CNTXT_4] = ®_ev_ch_e_cntxt_4, 149 [EV_CH_E_CNTXT_8] = ®_ev_ch_e_cntxt_8, 150 [EV_CH_E_CNTXT_9] = ®_ev_ch_e_cntxt_9, 151 [EV_CH_E_CNTXT_10] = ®_ev_ch_e_cntxt_10, 152 [EV_CH_E_CNTXT_11] = ®_ev_ch_e_cntxt_11, 153 [EV_CH_E_CNTXT_12] = ®_ev_ch_e_cntxt_12, 154 [EV_CH_E_CNTXT_13] = ®_ev_ch_e_cntxt_13, 155 [EV_CH_E_SCRATCH_0] = ®_ev_ch_e_scratch_0, 156 [EV_CH_E_SCRATCH_1] = ®_ev_ch_e_scratch_1, 157 [CH_C_DOORBELL_0] = ®_ch_c_doorbell_0, 158 [EV_CH_E_DOORBELL_0] = ®_ev_ch_e_doorbell_0, 159 [CNTXT_TYPE_IRQ] = ®_cntxt_type_irq, 160 [CNTXT_TYPE_IRQ_MSK] = ®_cntxt_type_irq_msk, 161 [CNTXT_SRC_CH_IRQ] = ®_cntxt_src_ch_irq, 162 [CNTXT_SRC_EV_CH_IRQ] = ®_cntxt_src_ev_ch_irq, 163 [CNTXT_SRC_CH_IRQ_MSK] = ®_cntxt_src_ch_irq_msk, 164 [CNTXT_SRC_EV_CH_IRQ_MSK] = ®_cntxt_src_ev_ch_irq_msk, 165 [CNTXT_SRC_CH_IRQ_CLR] = ®_cntxt_src_ch_irq_clr, 166 [CNTXT_SRC_EV_CH_IRQ_CLR] = ®_cntxt_src_ev_ch_irq_clr, 167 [CNTXT_SRC_IEOB_IRQ] = ®_cntxt_src_ieob_irq, 168 [CNTXT_SRC_IEOB_IRQ_MSK] = ®_cntxt_src_ieob_irq_msk, 169 [CNTXT_SRC_IEOB_IRQ_CLR] = ®_cntxt_src_ieob_irq_clr, 170 [CNTXT_GLOB_IRQ_STTS] = ®_cntxt_glob_irq_stts, 171 [CNTXT_GLOB_IRQ_EN] = ®_cntxt_glob_irq_en, 172 [CNTXT_GLOB_IRQ_CLR] = ®_cntxt_glob_irq_clr, 173 [CNTXT_GSI_IRQ_STTS] = ®_cntxt_gsi_irq_stts, 174 [CNTXT_GSI_IRQ_EN] = ®_cntxt_gsi_irq_en, 175 [CNTXT_GSI_IRQ_CLR] = ®_cntxt_gsi_irq_clr, 176 [CNTXT_INTSET] = ®_cntxt_intset, 177 [CNTXT_SCRATCH_0] = ®_cntxt_scratch_0, 178 }; 179 180 const struct regs gsi_regs_v3_1 = { 181 .reg_count = ARRAY_SIZE(reg_array), 182 .reg = reg_array, 183 }; 184