1 // SPDX-License-Identifier: GPL-2.0 2 3 /* Copyright (C) 2023 Linaro Ltd. */ 4 5 #include <linux/types.h> 6 7 #include "../gsi.h" 8 #include "../reg.h" 9 #include "../gsi_reg.h" 10 11 /* The inter-EE IRQ registers are relative to gsi->virt_raw (IPA v3.5+) */ 12 13 REG(INTER_EE_SRC_CH_IRQ_MSK, inter_ee_src_ch_irq_msk, 14 0x0000c020 + 0x1000 * GSI_EE_AP); 15 16 REG(INTER_EE_SRC_EV_CH_IRQ_MSK, inter_ee_src_ev_ch_irq_msk, 17 0x0000c024 + 0x1000 * GSI_EE_AP); 18 19 /* All other register offsets are relative to gsi->virt */ 20 21 REG_STRIDE(CH_C_CNTXT_0, ch_c_cntxt_0, 0x0001c000 + 0x4000 * GSI_EE_AP, 0x80); 22 23 REG_STRIDE(CH_C_CNTXT_1, ch_c_cntxt_1, 0x0001c004 + 0x4000 * GSI_EE_AP, 0x80); 24 25 REG_STRIDE(CH_C_CNTXT_2, ch_c_cntxt_2, 0x0001c008 + 0x4000 * GSI_EE_AP, 0x80); 26 27 REG_STRIDE(CH_C_CNTXT_3, ch_c_cntxt_3, 0x0001c00c + 0x4000 * GSI_EE_AP, 0x80); 28 29 REG_STRIDE(CH_C_QOS, ch_c_qos, 0x0001c05c + 0x4000 * GSI_EE_AP, 0x80); 30 31 REG(ERROR_LOG, error_log, 0x0001f200 + 0x4000 * GSI_EE_AP); 32 33 REG(ERROR_LOG_CLR, error_log_clr, 0x0001f210 + 0x4000 * GSI_EE_AP); 34 35 REG_STRIDE(CH_C_SCRATCH_0, ch_c_scratch_0, 36 0x0001c060 + 0x4000 * GSI_EE_AP, 0x80); 37 38 REG_STRIDE(CH_C_SCRATCH_1, ch_c_scratch_1, 39 0x0001c064 + 0x4000 * GSI_EE_AP, 0x80); 40 41 REG_STRIDE(CH_C_SCRATCH_2, ch_c_scratch_2, 42 0x0001c068 + 0x4000 * GSI_EE_AP, 0x80); 43 44 REG_STRIDE(CH_C_SCRATCH_3, ch_c_scratch_3, 45 0x0001c06c + 0x4000 * GSI_EE_AP, 0x80); 46 47 REG_STRIDE(EV_CH_E_CNTXT_0, ev_ch_e_cntxt_0, 48 0x0001d000 + 0x4000 * GSI_EE_AP, 0x80); 49 50 REG_STRIDE(EV_CH_E_CNTXT_1, ev_ch_e_cntxt_1, 51 0x0001d004 + 0x4000 * GSI_EE_AP, 0x80); 52 53 REG_STRIDE(EV_CH_E_CNTXT_2, ev_ch_e_cntxt_2, 54 0x0001d008 + 0x4000 * GSI_EE_AP, 0x80); 55 56 REG_STRIDE(EV_CH_E_CNTXT_3, ev_ch_e_cntxt_3, 57 0x0001d00c + 0x4000 * GSI_EE_AP, 0x80); 58 59 REG_STRIDE(EV_CH_E_CNTXT_4, ev_ch_e_cntxt_4, 60 0x0001d010 + 0x4000 * GSI_EE_AP, 0x80); 61 62 REG_STRIDE(EV_CH_E_CNTXT_8, ev_ch_e_cntxt_8, 63 0x0001d020 + 0x4000 * GSI_EE_AP, 0x80); 64 65 REG_STRIDE(EV_CH_E_CNTXT_9, ev_ch_e_cntxt_9, 66 0x0001d024 + 0x4000 * GSI_EE_AP, 0x80); 67 68 REG_STRIDE(EV_CH_E_CNTXT_10, ev_ch_e_cntxt_10, 69 0x0001d028 + 0x4000 * GSI_EE_AP, 0x80); 70 71 REG_STRIDE(EV_CH_E_CNTXT_11, ev_ch_e_cntxt_11, 72 0x0001d02c + 0x4000 * GSI_EE_AP, 0x80); 73 74 REG_STRIDE(EV_CH_E_CNTXT_12, ev_ch_e_cntxt_12, 75 0x0001d030 + 0x4000 * GSI_EE_AP, 0x80); 76 77 REG_STRIDE(EV_CH_E_CNTXT_13, ev_ch_e_cntxt_13, 78 0x0001d034 + 0x4000 * GSI_EE_AP, 0x80); 79 80 REG_STRIDE(EV_CH_E_SCRATCH_0, ev_ch_e_scratch_0, 81 0x0001d048 + 0x4000 * GSI_EE_AP, 0x80); 82 83 REG_STRIDE(EV_CH_E_SCRATCH_1, ev_ch_e_scratch_1, 84 0x0001d04c + 0x4000 * GSI_EE_AP, 0x80); 85 86 REG_STRIDE(CH_C_DOORBELL_0, ch_c_doorbell_0, 87 0x0001e000 + 0x4000 * GSI_EE_AP, 0x08); 88 89 REG_STRIDE(EV_CH_E_DOORBELL_0, ev_ch_e_doorbell_0, 90 0x0001e100 + 0x4000 * GSI_EE_AP, 0x08); 91 92 REG(GSI_STATUS, gsi_status, 0x0001f000 + 0x4000 * GSI_EE_AP); 93 94 REG(CH_CMD, ch_cmd, 0x0001f008 + 0x4000 * GSI_EE_AP); 95 96 REG(EV_CH_CMD, ev_ch_cmd, 0x0001f010 + 0x4000 * GSI_EE_AP); 97 98 REG(GENERIC_CMD, generic_cmd, 0x0001f018 + 0x4000 * GSI_EE_AP); 99 100 REG(CNTXT_TYPE_IRQ, cntxt_type_irq, 0x0001f080 + 0x4000 * GSI_EE_AP); 101 102 REG(CNTXT_TYPE_IRQ_MSK, cntxt_type_irq_msk, 0x0001f088 + 0x4000 * GSI_EE_AP); 103 104 REG(CNTXT_SRC_CH_IRQ, cntxt_src_ch_irq, 0x0001f090 + 0x4000 * GSI_EE_AP); 105 106 REG(CNTXT_SRC_EV_CH_IRQ, cntxt_src_ev_ch_irq, 0x0001f094 + 0x4000 * GSI_EE_AP); 107 108 REG(CNTXT_SRC_CH_IRQ_MSK, cntxt_src_ch_irq_msk, 109 0x0001f098 + 0x4000 * GSI_EE_AP); 110 111 REG(CNTXT_SRC_EV_CH_IRQ_MSK, cntxt_src_ev_ch_irq_msk, 112 0x0001f09c + 0x4000 * GSI_EE_AP); 113 114 REG(CNTXT_SRC_CH_IRQ_CLR, cntxt_src_ch_irq_clr, 115 0x0001f0a0 + 0x4000 * GSI_EE_AP); 116 117 REG(CNTXT_SRC_EV_CH_IRQ_CLR, cntxt_src_ev_ch_irq_clr, 118 0x0001f0a4 + 0x4000 * GSI_EE_AP); 119 120 REG(CNTXT_SRC_IEOB_IRQ, cntxt_src_ieob_irq, 0x0001f0b0 + 0x4000 * GSI_EE_AP); 121 122 REG(CNTXT_SRC_IEOB_IRQ_MSK, cntxt_src_ieob_irq_msk, 123 0x0001f0b8 + 0x4000 * GSI_EE_AP); 124 125 REG(CNTXT_SRC_IEOB_IRQ_CLR, cntxt_src_ieob_irq_clr, 126 0x0001f0c0 + 0x4000 * GSI_EE_AP); 127 128 REG(CNTXT_GLOB_IRQ_STTS, cntxt_glob_irq_stts, 0x0001f100 + 0x4000 * GSI_EE_AP); 129 130 REG(CNTXT_GLOB_IRQ_EN, cntxt_glob_irq_en, 0x0001f108 + 0x4000 * GSI_EE_AP); 131 132 REG(CNTXT_GLOB_IRQ_CLR, cntxt_glob_irq_clr, 0x0001f110 + 0x4000 * GSI_EE_AP); 133 134 REG(CNTXT_GSI_IRQ_STTS, cntxt_gsi_irq_stts, 0x0001f118 + 0x4000 * GSI_EE_AP); 135 136 REG(CNTXT_GSI_IRQ_EN, cntxt_gsi_irq_en, 0x0001f120 + 0x4000 * GSI_EE_AP); 137 138 REG(CNTXT_GSI_IRQ_CLR, cntxt_gsi_irq_clr, 0x0001f128 + 0x4000 * GSI_EE_AP); 139 140 REG(CNTXT_INTSET, cntxt_intset, 0x0001f180 + 0x4000 * GSI_EE_AP); 141 142 REG(CNTXT_SCRATCH_0, cntxt_scratch_0, 0x0001f400 + 0x4000 * GSI_EE_AP); 143 144 static const struct reg *reg_array[] = { 145 [INTER_EE_SRC_CH_IRQ_MSK] = ®_inter_ee_src_ch_irq_msk, 146 [INTER_EE_SRC_EV_CH_IRQ_MSK] = ®_inter_ee_src_ev_ch_irq_msk, 147 [CH_C_CNTXT_0] = ®_ch_c_cntxt_0, 148 [CH_C_CNTXT_1] = ®_ch_c_cntxt_1, 149 [CH_C_CNTXT_2] = ®_ch_c_cntxt_2, 150 [CH_C_CNTXT_3] = ®_ch_c_cntxt_3, 151 [CH_C_QOS] = ®_ch_c_qos, 152 [CH_C_SCRATCH_0] = ®_ch_c_scratch_0, 153 [CH_C_SCRATCH_1] = ®_ch_c_scratch_1, 154 [CH_C_SCRATCH_2] = ®_ch_c_scratch_2, 155 [CH_C_SCRATCH_3] = ®_ch_c_scratch_3, 156 [EV_CH_E_CNTXT_0] = ®_ev_ch_e_cntxt_0, 157 [EV_CH_E_CNTXT_1] = ®_ev_ch_e_cntxt_1, 158 [EV_CH_E_CNTXT_2] = ®_ev_ch_e_cntxt_2, 159 [EV_CH_E_CNTXT_3] = ®_ev_ch_e_cntxt_3, 160 [EV_CH_E_CNTXT_4] = ®_ev_ch_e_cntxt_4, 161 [EV_CH_E_CNTXT_8] = ®_ev_ch_e_cntxt_8, 162 [EV_CH_E_CNTXT_9] = ®_ev_ch_e_cntxt_9, 163 [EV_CH_E_CNTXT_10] = ®_ev_ch_e_cntxt_10, 164 [EV_CH_E_CNTXT_11] = ®_ev_ch_e_cntxt_11, 165 [EV_CH_E_CNTXT_12] = ®_ev_ch_e_cntxt_12, 166 [EV_CH_E_CNTXT_13] = ®_ev_ch_e_cntxt_13, 167 [EV_CH_E_SCRATCH_0] = ®_ev_ch_e_scratch_0, 168 [EV_CH_E_SCRATCH_1] = ®_ev_ch_e_scratch_1, 169 [CH_C_DOORBELL_0] = ®_ch_c_doorbell_0, 170 [EV_CH_E_DOORBELL_0] = ®_ev_ch_e_doorbell_0, 171 [GSI_STATUS] = ®_gsi_status, 172 [CH_CMD] = ®_ch_cmd, 173 [EV_CH_CMD] = ®_ev_ch_cmd, 174 [GENERIC_CMD] = ®_generic_cmd, 175 [CNTXT_TYPE_IRQ] = ®_cntxt_type_irq, 176 [CNTXT_TYPE_IRQ_MSK] = ®_cntxt_type_irq_msk, 177 [CNTXT_SRC_CH_IRQ] = ®_cntxt_src_ch_irq, 178 [CNTXT_SRC_EV_CH_IRQ] = ®_cntxt_src_ev_ch_irq, 179 [CNTXT_SRC_CH_IRQ_MSK] = ®_cntxt_src_ch_irq_msk, 180 [CNTXT_SRC_EV_CH_IRQ_MSK] = ®_cntxt_src_ev_ch_irq_msk, 181 [CNTXT_SRC_CH_IRQ_CLR] = ®_cntxt_src_ch_irq_clr, 182 [CNTXT_SRC_EV_CH_IRQ_CLR] = ®_cntxt_src_ev_ch_irq_clr, 183 [CNTXT_SRC_IEOB_IRQ] = ®_cntxt_src_ieob_irq, 184 [CNTXT_SRC_IEOB_IRQ_MSK] = ®_cntxt_src_ieob_irq_msk, 185 [CNTXT_SRC_IEOB_IRQ_CLR] = ®_cntxt_src_ieob_irq_clr, 186 [CNTXT_GLOB_IRQ_STTS] = ®_cntxt_glob_irq_stts, 187 [CNTXT_GLOB_IRQ_EN] = ®_cntxt_glob_irq_en, 188 [CNTXT_GLOB_IRQ_CLR] = ®_cntxt_glob_irq_clr, 189 [CNTXT_GSI_IRQ_STTS] = ®_cntxt_gsi_irq_stts, 190 [CNTXT_GSI_IRQ_EN] = ®_cntxt_gsi_irq_en, 191 [CNTXT_GSI_IRQ_CLR] = ®_cntxt_gsi_irq_clr, 192 [CNTXT_INTSET] = ®_cntxt_intset, 193 [ERROR_LOG] = ®_error_log, 194 [ERROR_LOG_CLR] = ®_error_log_clr, 195 [CNTXT_SCRATCH_0] = ®_cntxt_scratch_0, 196 }; 197 198 const struct regs gsi_regs_v3_1 = { 199 .reg_count = ARRAY_SIZE(reg_array), 200 .reg = reg_array, 201 }; 202