xref: /openbmc/linux/drivers/net/ipa/ipa_uc.c (revision 722208ea3e2a19f927cd507366547b2546444697)
1a646d6ecSAlex Elder // SPDX-License-Identifier: GPL-2.0
2a646d6ecSAlex Elder 
3a646d6ecSAlex Elder /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
4a646d6ecSAlex Elder  * Copyright (C) 2018-2020 Linaro Ltd.
5a646d6ecSAlex Elder  */
6a646d6ecSAlex Elder 
7a646d6ecSAlex Elder #include <linux/types.h>
8a646d6ecSAlex Elder #include <linux/io.h>
9a646d6ecSAlex Elder #include <linux/delay.h>
10a646d6ecSAlex Elder 
11a646d6ecSAlex Elder #include "ipa.h"
12a646d6ecSAlex Elder #include "ipa_clock.h"
13a646d6ecSAlex Elder #include "ipa_uc.h"
14a646d6ecSAlex Elder 
15a646d6ecSAlex Elder /**
16a646d6ecSAlex Elder  * DOC:  The IPA embedded microcontroller
17a646d6ecSAlex Elder  *
18a646d6ecSAlex Elder  * The IPA incorporates a microcontroller that is able to do some additional
19a646d6ecSAlex Elder  * handling/offloading of network activity.  The current code makes
20a646d6ecSAlex Elder  * essentially no use of the microcontroller, but it still requires some
21a646d6ecSAlex Elder  * initialization.  It needs to be notified in the event the AP crashes.
22a646d6ecSAlex Elder  *
23a646d6ecSAlex Elder  * The microcontroller can generate two interrupts to the AP.  One interrupt
24a646d6ecSAlex Elder  * is used to indicate that a response to a request from the AP is available.
25a646d6ecSAlex Elder  * The other is used to notify the AP of the occurrence of an event.  In
26a646d6ecSAlex Elder  * addition, the AP can interrupt the microcontroller by writing a register.
27a646d6ecSAlex Elder  *
28a646d6ecSAlex Elder  * A 128 byte block of structured memory within the IPA SRAM is used together
29a646d6ecSAlex Elder  * with these interrupts to implement the communication interface between the
30a646d6ecSAlex Elder  * AP and the IPA microcontroller.  Each side writes data to the shared area
31a646d6ecSAlex Elder  * before interrupting its peer, which will read the written data in response
32a646d6ecSAlex Elder  * to the interrupt.  Some information found in the shared area is currently
33a646d6ecSAlex Elder  * unused.  All remaining space in the shared area is reserved, and must not
34a646d6ecSAlex Elder  * be read or written by the AP.
35a646d6ecSAlex Elder  */
36a646d6ecSAlex Elder /* Supports hardware interface version 0x2000 */
37a646d6ecSAlex Elder 
38a646d6ecSAlex Elder /* Delay to allow a the microcontroller to save state when crashing */
39a646d6ecSAlex Elder #define IPA_SEND_DELAY		100	/* microseconds */
40a646d6ecSAlex Elder 
41a646d6ecSAlex Elder /**
42a646d6ecSAlex Elder  * struct ipa_uc_mem_area - AP/microcontroller shared memory area
43a646d6ecSAlex Elder  * @command:		command code (AP->microcontroller)
44a646d6ecSAlex Elder  * @command_param:	low 32 bits of command parameter (AP->microcontroller)
45a646d6ecSAlex Elder  * @command_param_hi:	high 32 bits of command parameter (AP->microcontroller)
46a646d6ecSAlex Elder  *
47a646d6ecSAlex Elder  * @response:		response code (microcontroller->AP)
48a646d6ecSAlex Elder  * @response_param:	response parameter (microcontroller->AP)
49a646d6ecSAlex Elder  *
50a646d6ecSAlex Elder  * @event:		event code (microcontroller->AP)
51a646d6ecSAlex Elder  * @event_param:	event parameter (microcontroller->AP)
52a646d6ecSAlex Elder  *
53a646d6ecSAlex Elder  * @first_error_address: address of first error-source on SNOC
54a646d6ecSAlex Elder  * @hw_state:		state of hardware (including error type information)
55a646d6ecSAlex Elder  * @warning_counter:	counter of non-fatal hardware errors
56a646d6ecSAlex Elder  * @interface_version:	hardware-reported interface version
57*722208eaSAlex Elder  *
58*722208eaSAlex Elder  * A shared memory area at the base of IPA resident memory is used for
59*722208eaSAlex Elder  * communication with the microcontroller.  The region is 128 bytes in
60*722208eaSAlex Elder  * size, but only the first 40 bytes (structured this way) are used.
61a646d6ecSAlex Elder  */
62a646d6ecSAlex Elder struct ipa_uc_mem_area {
63a646d6ecSAlex Elder 	u8 command;		/* enum ipa_uc_command */
64a646d6ecSAlex Elder 	u8 reserved0[3];
65a646d6ecSAlex Elder 	__le32 command_param;
66a646d6ecSAlex Elder 	__le32 command_param_hi;
67a646d6ecSAlex Elder 	u8 response;		/* enum ipa_uc_response */
68a646d6ecSAlex Elder 	u8 reserved1[3];
69a646d6ecSAlex Elder 	__le32 response_param;
70a646d6ecSAlex Elder 	u8 event;		/* enum ipa_uc_event */
71a646d6ecSAlex Elder 	u8 reserved2[3];
72a646d6ecSAlex Elder 
73a646d6ecSAlex Elder 	__le32 event_param;
74a646d6ecSAlex Elder 	__le32 first_error_address;
75a646d6ecSAlex Elder 	u8 hw_state;
76a646d6ecSAlex Elder 	u8 warning_counter;
77a646d6ecSAlex Elder 	__le16 reserved3;
78a646d6ecSAlex Elder 	__le16 interface_version;
79a646d6ecSAlex Elder 	__le16 reserved4;
80a646d6ecSAlex Elder };
81a646d6ecSAlex Elder 
82a646d6ecSAlex Elder /** enum ipa_uc_command - commands from the AP to the microcontroller */
83a646d6ecSAlex Elder enum ipa_uc_command {
84a646d6ecSAlex Elder 	IPA_UC_COMMAND_NO_OP		= 0,
85a646d6ecSAlex Elder 	IPA_UC_COMMAND_UPDATE_FLAGS	= 1,
86a646d6ecSAlex Elder 	IPA_UC_COMMAND_DEBUG_RUN_TEST	= 2,
87a646d6ecSAlex Elder 	IPA_UC_COMMAND_DEBUG_GET_INFO	= 3,
88a646d6ecSAlex Elder 	IPA_UC_COMMAND_ERR_FATAL	= 4,
89a646d6ecSAlex Elder 	IPA_UC_COMMAND_CLK_GATE		= 5,
90a646d6ecSAlex Elder 	IPA_UC_COMMAND_CLK_UNGATE	= 6,
91a646d6ecSAlex Elder 	IPA_UC_COMMAND_MEMCPY		= 7,
92a646d6ecSAlex Elder 	IPA_UC_COMMAND_RESET_PIPE	= 8,
93a646d6ecSAlex Elder 	IPA_UC_COMMAND_REG_WRITE	= 9,
94a646d6ecSAlex Elder 	IPA_UC_COMMAND_GSI_CH_EMPTY	= 10,
95a646d6ecSAlex Elder };
96a646d6ecSAlex Elder 
97a646d6ecSAlex Elder /** enum ipa_uc_response - microcontroller response codes */
98a646d6ecSAlex Elder enum ipa_uc_response {
99a646d6ecSAlex Elder 	IPA_UC_RESPONSE_NO_OP		= 0,
100a646d6ecSAlex Elder 	IPA_UC_RESPONSE_INIT_COMPLETED	= 1,
101a646d6ecSAlex Elder 	IPA_UC_RESPONSE_CMD_COMPLETED	= 2,
102a646d6ecSAlex Elder 	IPA_UC_RESPONSE_DEBUG_GET_INFO	= 3,
103a646d6ecSAlex Elder };
104a646d6ecSAlex Elder 
105a646d6ecSAlex Elder /** enum ipa_uc_event - common cpu events reported by the microcontroller */
106a646d6ecSAlex Elder enum ipa_uc_event {
107a646d6ecSAlex Elder 	IPA_UC_EVENT_NO_OP     = 0,
108a646d6ecSAlex Elder 	IPA_UC_EVENT_ERROR     = 1,
109a646d6ecSAlex Elder 	IPA_UC_EVENT_LOG_INFO  = 2,
110a646d6ecSAlex Elder };
111a646d6ecSAlex Elder 
112a646d6ecSAlex Elder static struct ipa_uc_mem_area *ipa_uc_shared(struct ipa *ipa)
113a646d6ecSAlex Elder {
114a646d6ecSAlex Elder 	u32 offset = ipa->mem_offset + ipa->mem[IPA_MEM_UC_SHARED].offset;
115a646d6ecSAlex Elder 
116a646d6ecSAlex Elder 	return ipa->mem_virt + offset;
117a646d6ecSAlex Elder }
118a646d6ecSAlex Elder 
119a646d6ecSAlex Elder /* Microcontroller event IPA interrupt handler */
120a646d6ecSAlex Elder static void ipa_uc_event_handler(struct ipa *ipa, enum ipa_irq_id irq_id)
121a646d6ecSAlex Elder {
122a646d6ecSAlex Elder 	struct ipa_uc_mem_area *shared = ipa_uc_shared(ipa);
123a646d6ecSAlex Elder 	struct device *dev = &ipa->pdev->dev;
124a646d6ecSAlex Elder 
125a646d6ecSAlex Elder 	if (shared->event == IPA_UC_EVENT_ERROR)
126a646d6ecSAlex Elder 		dev_err(dev, "microcontroller error event\n");
127a646d6ecSAlex Elder 	else
128a646d6ecSAlex Elder 		dev_err(dev, "unsupported microcontroller event %hhu\n",
129a646d6ecSAlex Elder 			shared->event);
130a646d6ecSAlex Elder }
131a646d6ecSAlex Elder 
132a646d6ecSAlex Elder /* Microcontroller response IPA interrupt handler */
133a646d6ecSAlex Elder static void ipa_uc_response_hdlr(struct ipa *ipa, enum ipa_irq_id irq_id)
134a646d6ecSAlex Elder {
135a646d6ecSAlex Elder 	struct ipa_uc_mem_area *shared = ipa_uc_shared(ipa);
136a646d6ecSAlex Elder 
137a646d6ecSAlex Elder 	/* An INIT_COMPLETED response message is sent to the AP by the
138a646d6ecSAlex Elder 	 * microcontroller when it is operational.  Other than this, the AP
139a646d6ecSAlex Elder 	 * should only receive responses from the microcontroller when it has
140a646d6ecSAlex Elder 	 * sent it a request message.
141a646d6ecSAlex Elder 	 *
142a646d6ecSAlex Elder 	 * We can drop the clock reference taken in ipa_uc_init() once we
143a646d6ecSAlex Elder 	 * know the microcontroller has finished its initialization.
144a646d6ecSAlex Elder 	 */
145a646d6ecSAlex Elder 	switch (shared->response) {
146a646d6ecSAlex Elder 	case IPA_UC_RESPONSE_INIT_COMPLETED:
147a646d6ecSAlex Elder 		ipa->uc_loaded = true;
148a646d6ecSAlex Elder 		ipa_clock_put(ipa);
149a646d6ecSAlex Elder 		break;
150a646d6ecSAlex Elder 	default:
151a646d6ecSAlex Elder 		dev_warn(&ipa->pdev->dev,
152a646d6ecSAlex Elder 			 "unsupported microcontroller response %hhu\n",
153a646d6ecSAlex Elder 			 shared->response);
154a646d6ecSAlex Elder 		break;
155a646d6ecSAlex Elder 	}
156a646d6ecSAlex Elder }
157a646d6ecSAlex Elder 
158a646d6ecSAlex Elder /* ipa_uc_setup() - Set up the microcontroller */
159a646d6ecSAlex Elder void ipa_uc_setup(struct ipa *ipa)
160a646d6ecSAlex Elder {
161a646d6ecSAlex Elder 	/* The microcontroller needs the IPA clock running until it has
162a646d6ecSAlex Elder 	 * completed its initialization.  It signals this by sending an
163a646d6ecSAlex Elder 	 * INIT_COMPLETED response message to the AP.  This could occur after
164a646d6ecSAlex Elder 	 * we have finished doing the rest of the IPA initialization, so we
165a646d6ecSAlex Elder 	 * need to take an extra "proxy" reference, and hold it until we've
166a646d6ecSAlex Elder 	 * received that signal.  (This reference is dropped in
167a646d6ecSAlex Elder 	 * ipa_uc_response_hdlr(), above.)
168a646d6ecSAlex Elder 	 */
169a646d6ecSAlex Elder 	ipa_clock_get(ipa);
170a646d6ecSAlex Elder 
171a646d6ecSAlex Elder 	ipa->uc_loaded = false;
172a646d6ecSAlex Elder 	ipa_interrupt_add(ipa->interrupt, IPA_IRQ_UC_0, ipa_uc_event_handler);
173a646d6ecSAlex Elder 	ipa_interrupt_add(ipa->interrupt, IPA_IRQ_UC_1, ipa_uc_response_hdlr);
174a646d6ecSAlex Elder }
175a646d6ecSAlex Elder 
176a646d6ecSAlex Elder /* Inverse of ipa_uc_setup() */
177a646d6ecSAlex Elder void ipa_uc_teardown(struct ipa *ipa)
178a646d6ecSAlex Elder {
179a646d6ecSAlex Elder 	ipa_interrupt_remove(ipa->interrupt, IPA_IRQ_UC_1);
180a646d6ecSAlex Elder 	ipa_interrupt_remove(ipa->interrupt, IPA_IRQ_UC_0);
181a646d6ecSAlex Elder 	if (!ipa->uc_loaded)
182a646d6ecSAlex Elder 		ipa_clock_put(ipa);
183a646d6ecSAlex Elder }
184a646d6ecSAlex Elder 
185a646d6ecSAlex Elder /* Send a command to the microcontroller */
186a646d6ecSAlex Elder static void send_uc_command(struct ipa *ipa, u32 command, u32 command_param)
187a646d6ecSAlex Elder {
188a646d6ecSAlex Elder 	struct ipa_uc_mem_area *shared = ipa_uc_shared(ipa);
189a646d6ecSAlex Elder 
190a646d6ecSAlex Elder 	shared->command = command;
191a646d6ecSAlex Elder 	shared->command_param = cpu_to_le32(command_param);
192a646d6ecSAlex Elder 	shared->command_param_hi = 0;
193a646d6ecSAlex Elder 	shared->response = 0;
194a646d6ecSAlex Elder 	shared->response_param = 0;
195a646d6ecSAlex Elder 
196a646d6ecSAlex Elder 	iowrite32(1, ipa->reg_virt + IPA_REG_IRQ_UC_OFFSET);
197a646d6ecSAlex Elder }
198a646d6ecSAlex Elder 
199a646d6ecSAlex Elder /* Tell the microcontroller the AP is shutting down */
200a646d6ecSAlex Elder void ipa_uc_panic_notifier(struct ipa *ipa)
201a646d6ecSAlex Elder {
202a646d6ecSAlex Elder 	if (!ipa->uc_loaded)
203a646d6ecSAlex Elder 		return;
204a646d6ecSAlex Elder 
205a646d6ecSAlex Elder 	send_uc_command(ipa, IPA_UC_COMMAND_ERR_FATAL, 0);
206a646d6ecSAlex Elder 
207a646d6ecSAlex Elder 	/* give uc enough time to save state */
208a646d6ecSAlex Elder 	udelay(IPA_SEND_DELAY);
209a646d6ecSAlex Elder }
210