xref: /openbmc/linux/drivers/net/ieee802154/ca8210.c (revision d32fd6bb9f2bc8178cdd65ebec1ad670a8bfa241)
1ded845a7SHarry Morris /*
2ded845a7SHarry Morris  * http://www.cascoda.com/products/ca-821x/
3ded845a7SHarry Morris  * Copyright (c) 2016, Cascoda, Ltd.
4ded845a7SHarry Morris  * All rights reserved.
5ded845a7SHarry Morris  *
6ded845a7SHarry Morris  * This code is dual-licensed under both GPLv2 and 3-clause BSD. What follows is
7ded845a7SHarry Morris  * the license notice for both respectively.
8ded845a7SHarry Morris  *
9ded845a7SHarry Morris  *******************************************************************************
10ded845a7SHarry Morris  *
11ded845a7SHarry Morris  * This program is free software; you can redistribute it and/or
12ded845a7SHarry Morris  * modify it under the terms of the GNU General Public License
13ded845a7SHarry Morris  * as published by the Free Software Foundation; either version 2
14ded845a7SHarry Morris  * of the License, or (at your option) any later version.
15ded845a7SHarry Morris  *
16ded845a7SHarry Morris  * This program is distributed in the hope that it will be useful,
17ded845a7SHarry Morris  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18ded845a7SHarry Morris  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19ded845a7SHarry Morris  * GNU General Public License for more details.
20ded845a7SHarry Morris  *
21ded845a7SHarry Morris  *******************************************************************************
22ded845a7SHarry Morris  *
23ded845a7SHarry Morris  * Redistribution and use in source and binary forms, with or without
24ded845a7SHarry Morris  * modification, are permitted provided that the following conditions are met:
25ded845a7SHarry Morris  *
26ded845a7SHarry Morris  * 1. Redistributions of source code must retain the above copyright notice,
27ded845a7SHarry Morris  * this list of conditions and the following disclaimer.
28ded845a7SHarry Morris  *
29ded845a7SHarry Morris  * 2. Redistributions in binary form must reproduce the above copyright notice,
30ded845a7SHarry Morris  * this list of conditions and the following disclaimer in the documentation
31ded845a7SHarry Morris  * and/or other materials provided with the distribution.
32ded845a7SHarry Morris  *
33ded845a7SHarry Morris  * 3. Neither the name of the copyright holder nor the names of its contributors
34ded845a7SHarry Morris  * may be used to endorse or promote products derived from this software without
35ded845a7SHarry Morris  * specific prior written permission.
36ded845a7SHarry Morris  *
37ded845a7SHarry Morris  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
38ded845a7SHarry Morris  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
39ded845a7SHarry Morris  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
40ded845a7SHarry Morris  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
41ded845a7SHarry Morris  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
42ded845a7SHarry Morris  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
43ded845a7SHarry Morris  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
44ded845a7SHarry Morris  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
45ded845a7SHarry Morris  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
46ded845a7SHarry Morris  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
47ded845a7SHarry Morris  * POSSIBILITY OF SUCH DAMAGE.
48ded845a7SHarry Morris  */
49ded845a7SHarry Morris 
50ded845a7SHarry Morris #include <linux/cdev.h>
51ded845a7SHarry Morris #include <linux/clk-provider.h>
52ded845a7SHarry Morris #include <linux/debugfs.h>
53ded845a7SHarry Morris #include <linux/delay.h>
54d74e3166SArnd Bergmann #include <linux/gpio/consumer.h>
55ded845a7SHarry Morris #include <linux/gpio.h>
56ded845a7SHarry Morris #include <linux/ieee802154.h>
5762e59c4eSStephen Boyd #include <linux/io.h>
58ded845a7SHarry Morris #include <linux/kfifo.h>
59ded845a7SHarry Morris #include <linux/of.h>
60ded845a7SHarry Morris #include <linux/of_gpio.h>
61ded845a7SHarry Morris #include <linux/module.h>
62ded845a7SHarry Morris #include <linux/mutex.h>
63ded845a7SHarry Morris #include <linux/poll.h>
64ded845a7SHarry Morris #include <linux/skbuff.h>
65ded845a7SHarry Morris #include <linux/slab.h>
66ded845a7SHarry Morris #include <linux/spi/spi.h>
67ded845a7SHarry Morris #include <linux/spinlock.h>
68ded845a7SHarry Morris #include <linux/string.h>
69ded845a7SHarry Morris #include <linux/workqueue.h>
700ab10314SFlorian Westphal #include <linux/interrupt.h>
71ded845a7SHarry Morris 
72ded845a7SHarry Morris #include <net/ieee802154_netdev.h>
73ded845a7SHarry Morris #include <net/mac802154.h>
74ded845a7SHarry Morris 
75ded845a7SHarry Morris #define DRIVER_NAME "ca8210"
76ded845a7SHarry Morris 
77ded845a7SHarry Morris /* external clock frequencies */
78ded845a7SHarry Morris #define ONE_MHZ      1000000
79ded845a7SHarry Morris #define TWO_MHZ      (2 * ONE_MHZ)
80ded845a7SHarry Morris #define FOUR_MHZ     (4 * ONE_MHZ)
81ded845a7SHarry Morris #define EIGHT_MHZ    (8 * ONE_MHZ)
82ded845a7SHarry Morris #define SIXTEEN_MHZ  (16 * ONE_MHZ)
83ded845a7SHarry Morris 
84ded845a7SHarry Morris /* spi constants */
85ded845a7SHarry Morris #define CA8210_SPI_BUF_SIZE 256
86ded845a7SHarry Morris #define CA8210_SYNC_TIMEOUT 1000     /* Timeout for synchronous commands [ms] */
87ded845a7SHarry Morris 
88ded845a7SHarry Morris /* test interface constants */
89ded845a7SHarry Morris #define CA8210_TEST_INT_FILE_NAME "ca8210_test"
90ded845a7SHarry Morris #define CA8210_TEST_INT_FIFO_SIZE 256
91ded845a7SHarry Morris 
92ded845a7SHarry Morris /* HWME attribute IDs */
93ded845a7SHarry Morris #define HWME_EDTHRESHOLD       (0x04)
94ded845a7SHarry Morris #define HWME_EDVALUE           (0x06)
95ded845a7SHarry Morris #define HWME_SYSCLKOUT         (0x0F)
96ded845a7SHarry Morris #define HWME_LQILIMIT          (0x11)
97ded845a7SHarry Morris 
98ded845a7SHarry Morris /* TDME attribute IDs */
99ded845a7SHarry Morris #define TDME_CHANNEL          (0x00)
100ded845a7SHarry Morris #define TDME_ATM_CONFIG       (0x06)
101ded845a7SHarry Morris 
102ded845a7SHarry Morris #define MAX_HWME_ATTRIBUTE_SIZE  16
103ded845a7SHarry Morris #define MAX_TDME_ATTRIBUTE_SIZE  2
104ded845a7SHarry Morris 
105ded845a7SHarry Morris /* PHY/MAC PIB Attribute Enumerations */
106ded845a7SHarry Morris #define PHY_CURRENT_CHANNEL               (0x00)
107ded845a7SHarry Morris #define PHY_TRANSMIT_POWER                (0x02)
108ded845a7SHarry Morris #define PHY_CCA_MODE                      (0x03)
109ded845a7SHarry Morris #define MAC_ASSOCIATION_PERMIT            (0x41)
110ded845a7SHarry Morris #define MAC_AUTO_REQUEST                  (0x42)
111ded845a7SHarry Morris #define MAC_BATT_LIFE_EXT                 (0x43)
112ded845a7SHarry Morris #define MAC_BATT_LIFE_EXT_PERIODS         (0x44)
113ded845a7SHarry Morris #define MAC_BEACON_PAYLOAD                (0x45)
114ded845a7SHarry Morris #define MAC_BEACON_PAYLOAD_LENGTH         (0x46)
115ded845a7SHarry Morris #define MAC_BEACON_ORDER                  (0x47)
116ded845a7SHarry Morris #define MAC_GTS_PERMIT                    (0x4d)
117ded845a7SHarry Morris #define MAC_MAX_CSMA_BACKOFFS             (0x4e)
118ded845a7SHarry Morris #define MAC_MIN_BE                        (0x4f)
119ded845a7SHarry Morris #define MAC_PAN_ID                        (0x50)
120ded845a7SHarry Morris #define MAC_PROMISCUOUS_MODE              (0x51)
121ded845a7SHarry Morris #define MAC_RX_ON_WHEN_IDLE               (0x52)
122ded845a7SHarry Morris #define MAC_SHORT_ADDRESS                 (0x53)
123ded845a7SHarry Morris #define MAC_SUPERFRAME_ORDER              (0x54)
124ded845a7SHarry Morris #define MAC_ASSOCIATED_PAN_COORD          (0x56)
125ded845a7SHarry Morris #define MAC_MAX_BE                        (0x57)
126ded845a7SHarry Morris #define MAC_MAX_FRAME_RETRIES             (0x59)
127ded845a7SHarry Morris #define MAC_RESPONSE_WAIT_TIME            (0x5A)
128ded845a7SHarry Morris #define MAC_SECURITY_ENABLED              (0x5D)
129ded845a7SHarry Morris 
130ded845a7SHarry Morris #define MAC_AUTO_REQUEST_SECURITY_LEVEL   (0x78)
131ded845a7SHarry Morris #define MAC_AUTO_REQUEST_KEY_ID_MODE      (0x79)
132ded845a7SHarry Morris 
133ded845a7SHarry Morris #define NS_IEEE_ADDRESS                   (0xFF) /* Non-standard IEEE address */
134ded845a7SHarry Morris 
135ded845a7SHarry Morris /* MAC Address Mode Definitions */
136ded845a7SHarry Morris #define MAC_MODE_NO_ADDR                (0x00)
137ded845a7SHarry Morris #define MAC_MODE_SHORT_ADDR             (0x02)
138ded845a7SHarry Morris #define MAC_MODE_LONG_ADDR              (0x03)
139ded845a7SHarry Morris 
140ded845a7SHarry Morris /* MAC constants */
141ded845a7SHarry Morris #define MAX_BEACON_OVERHEAD        (75)
142ded845a7SHarry Morris #define MAX_BEACON_PAYLOAD_LENGTH  (IEEE802154_MTU - MAX_BEACON_OVERHEAD)
143ded845a7SHarry Morris 
144ded845a7SHarry Morris #define MAX_ATTRIBUTE_SIZE              (122)
145ded845a7SHarry Morris #define MAX_DATA_SIZE                   (114)
146ded845a7SHarry Morris 
147ded845a7SHarry Morris #define CA8210_VALID_CHANNELS                 (0x07FFF800)
148ded845a7SHarry Morris 
149ded845a7SHarry Morris /* MAC workarounds for V1.1 and MPW silicon (V0.x) */
150ded845a7SHarry Morris #define CA8210_MAC_WORKAROUNDS (0)
151ded845a7SHarry Morris #define CA8210_MAC_MPW         (0)
152ded845a7SHarry Morris 
153ded845a7SHarry Morris /* memory manipulation macros */
154ded845a7SHarry Morris #define LS_BYTE(x)     ((u8)((x) & 0xFF))
155ded845a7SHarry Morris #define MS_BYTE(x)     ((u8)(((x) >> 8) & 0xFF))
156ded845a7SHarry Morris 
157ded845a7SHarry Morris /* message ID codes in SPI commands */
158ded845a7SHarry Morris /* downstream */
159ded845a7SHarry Morris #define MCPS_DATA_REQUEST                     (0x00)
160ded845a7SHarry Morris #define MLME_ASSOCIATE_REQUEST                (0x02)
161ded845a7SHarry Morris #define MLME_ASSOCIATE_RESPONSE               (0x03)
162ded845a7SHarry Morris #define MLME_DISASSOCIATE_REQUEST             (0x04)
163ded845a7SHarry Morris #define MLME_GET_REQUEST                      (0x05)
164ded845a7SHarry Morris #define MLME_ORPHAN_RESPONSE                  (0x06)
165ded845a7SHarry Morris #define MLME_RESET_REQUEST                    (0x07)
166ded845a7SHarry Morris #define MLME_RX_ENABLE_REQUEST                (0x08)
167ded845a7SHarry Morris #define MLME_SCAN_REQUEST                     (0x09)
168ded845a7SHarry Morris #define MLME_SET_REQUEST                      (0x0A)
169ded845a7SHarry Morris #define MLME_START_REQUEST                    (0x0B)
170ded845a7SHarry Morris #define MLME_POLL_REQUEST                     (0x0D)
171ded845a7SHarry Morris #define HWME_SET_REQUEST                      (0x0E)
172ded845a7SHarry Morris #define HWME_GET_REQUEST                      (0x0F)
173ded845a7SHarry Morris #define TDME_SETSFR_REQUEST                   (0x11)
174ded845a7SHarry Morris #define TDME_GETSFR_REQUEST                   (0x12)
175ded845a7SHarry Morris #define TDME_SET_REQUEST                      (0x14)
176ded845a7SHarry Morris /* upstream */
177ded845a7SHarry Morris #define MCPS_DATA_INDICATION                  (0x00)
178ded845a7SHarry Morris #define MCPS_DATA_CONFIRM                     (0x01)
179ded845a7SHarry Morris #define MLME_RESET_CONFIRM                    (0x0A)
180ded845a7SHarry Morris #define MLME_SET_CONFIRM                      (0x0E)
181ded845a7SHarry Morris #define MLME_START_CONFIRM                    (0x0F)
182ded845a7SHarry Morris #define HWME_SET_CONFIRM                      (0x12)
183ded845a7SHarry Morris #define HWME_GET_CONFIRM                      (0x13)
184ded845a7SHarry Morris #define HWME_WAKEUP_INDICATION		      (0x15)
185ded845a7SHarry Morris #define TDME_SETSFR_CONFIRM                   (0x17)
186ded845a7SHarry Morris 
187ded845a7SHarry Morris /* SPI command IDs */
188ded845a7SHarry Morris /* bit indicating a confirm or indication from slave to master */
189ded845a7SHarry Morris #define SPI_S2M                            (0x20)
190ded845a7SHarry Morris /* bit indicating a synchronous message */
191ded845a7SHarry Morris #define SPI_SYN                            (0x40)
192ded845a7SHarry Morris 
193ded845a7SHarry Morris /* SPI command definitions */
194ded845a7SHarry Morris #define SPI_IDLE                           (0xFF)
195ded845a7SHarry Morris #define SPI_NACK                           (0xF0)
196ded845a7SHarry Morris 
197ded845a7SHarry Morris #define SPI_MCPS_DATA_REQUEST          (MCPS_DATA_REQUEST)
198ded845a7SHarry Morris #define SPI_MCPS_DATA_INDICATION       (MCPS_DATA_INDICATION + SPI_S2M)
199ded845a7SHarry Morris #define SPI_MCPS_DATA_CONFIRM          (MCPS_DATA_CONFIRM + SPI_S2M)
200ded845a7SHarry Morris 
201ded845a7SHarry Morris #define SPI_MLME_ASSOCIATE_REQUEST     (MLME_ASSOCIATE_REQUEST)
202ded845a7SHarry Morris #define SPI_MLME_RESET_REQUEST         (MLME_RESET_REQUEST + SPI_SYN)
203ded845a7SHarry Morris #define SPI_MLME_SET_REQUEST           (MLME_SET_REQUEST + SPI_SYN)
204ded845a7SHarry Morris #define SPI_MLME_START_REQUEST         (MLME_START_REQUEST + SPI_SYN)
205ded845a7SHarry Morris #define SPI_MLME_RESET_CONFIRM         (MLME_RESET_CONFIRM + SPI_S2M + SPI_SYN)
206ded845a7SHarry Morris #define SPI_MLME_SET_CONFIRM           (MLME_SET_CONFIRM + SPI_S2M + SPI_SYN)
207ded845a7SHarry Morris #define SPI_MLME_START_CONFIRM         (MLME_START_CONFIRM + SPI_S2M + SPI_SYN)
208ded845a7SHarry Morris 
209ded845a7SHarry Morris #define SPI_HWME_SET_REQUEST           (HWME_SET_REQUEST + SPI_SYN)
210ded845a7SHarry Morris #define SPI_HWME_GET_REQUEST           (HWME_GET_REQUEST + SPI_SYN)
211ded845a7SHarry Morris #define SPI_HWME_SET_CONFIRM           (HWME_SET_CONFIRM + SPI_S2M + SPI_SYN)
212ded845a7SHarry Morris #define SPI_HWME_GET_CONFIRM           (HWME_GET_CONFIRM + SPI_S2M + SPI_SYN)
213ded845a7SHarry Morris #define SPI_HWME_WAKEUP_INDICATION     (HWME_WAKEUP_INDICATION + SPI_S2M)
214ded845a7SHarry Morris 
215ded845a7SHarry Morris #define SPI_TDME_SETSFR_REQUEST        (TDME_SETSFR_REQUEST + SPI_SYN)
216ded845a7SHarry Morris #define SPI_TDME_SET_REQUEST           (TDME_SET_REQUEST + SPI_SYN)
217ded845a7SHarry Morris #define SPI_TDME_SETSFR_CONFIRM        (TDME_SETSFR_CONFIRM + SPI_S2M + SPI_SYN)
218ded845a7SHarry Morris 
219ded845a7SHarry Morris /* TDME SFR addresses */
220ded845a7SHarry Morris /* Page 0 */
221ded845a7SHarry Morris #define CA8210_SFR_PACFG                   (0xB1)
222ded845a7SHarry Morris #define CA8210_SFR_MACCON                  (0xD8)
223ded845a7SHarry Morris #define CA8210_SFR_PACFGIB                 (0xFE)
224ded845a7SHarry Morris /* Page 1 */
225ded845a7SHarry Morris #define CA8210_SFR_LOTXCAL                 (0xBF)
226ded845a7SHarry Morris #define CA8210_SFR_PTHRH                   (0xD1)
227ded845a7SHarry Morris #define CA8210_SFR_PRECFG                  (0xD3)
228ded845a7SHarry Morris #define CA8210_SFR_LNAGX40                 (0xE1)
229ded845a7SHarry Morris #define CA8210_SFR_LNAGX41                 (0xE2)
230ded845a7SHarry Morris #define CA8210_SFR_LNAGX42                 (0xE3)
231ded845a7SHarry Morris #define CA8210_SFR_LNAGX43                 (0xE4)
232ded845a7SHarry Morris #define CA8210_SFR_LNAGX44                 (0xE5)
233ded845a7SHarry Morris #define CA8210_SFR_LNAGX45                 (0xE6)
234ded845a7SHarry Morris #define CA8210_SFR_LNAGX46                 (0xE7)
235ded845a7SHarry Morris #define CA8210_SFR_LNAGX47                 (0xE9)
236ded845a7SHarry Morris 
237ded845a7SHarry Morris #define PACFGIB_DEFAULT_CURRENT            (0x3F)
238ded845a7SHarry Morris #define PTHRH_DEFAULT_THRESHOLD            (0x5A)
239ded845a7SHarry Morris #define LNAGX40_DEFAULT_GAIN               (0x29) /* 10dB */
240ded845a7SHarry Morris #define LNAGX41_DEFAULT_GAIN               (0x54) /* 21dB */
241ded845a7SHarry Morris #define LNAGX42_DEFAULT_GAIN               (0x6C) /* 27dB */
242ded845a7SHarry Morris #define LNAGX43_DEFAULT_GAIN               (0x7A) /* 30dB */
243ded845a7SHarry Morris #define LNAGX44_DEFAULT_GAIN               (0x84) /* 33dB */
244ded845a7SHarry Morris #define LNAGX45_DEFAULT_GAIN               (0x8B) /* 34dB */
245ded845a7SHarry Morris #define LNAGX46_DEFAULT_GAIN               (0x92) /* 36dB */
246ded845a7SHarry Morris #define LNAGX47_DEFAULT_GAIN               (0x96) /* 37dB */
247ded845a7SHarry Morris 
248ded845a7SHarry Morris #define CA8210_IOCTL_HARD_RESET            (0x00)
249ded845a7SHarry Morris 
250ded845a7SHarry Morris /* Structs/Enums */
251ded845a7SHarry Morris 
252ded845a7SHarry Morris /**
253ded845a7SHarry Morris  * struct cas_control - spi transfer structure
254ded845a7SHarry Morris  * @msg:                  spi_message for each exchange
255ded845a7SHarry Morris  * @transfer:             spi_transfer for each exchange
256ded845a7SHarry Morris  * @tx_buf:               source array for transmission
257ded845a7SHarry Morris  * @tx_in_buf:            array storing bytes received during transmission
258ded845a7SHarry Morris  * @priv:                 pointer to private data
259ded845a7SHarry Morris  *
260ded845a7SHarry Morris  * This structure stores all the necessary data passed around during a single
261ded845a7SHarry Morris  * spi exchange.
262ded845a7SHarry Morris  */
263ded845a7SHarry Morris struct cas_control {
264ded845a7SHarry Morris 	struct spi_message msg;
265ded845a7SHarry Morris 	struct spi_transfer transfer;
266ded845a7SHarry Morris 
267ded845a7SHarry Morris 	u8 tx_buf[CA8210_SPI_BUF_SIZE];
268ded845a7SHarry Morris 	u8 tx_in_buf[CA8210_SPI_BUF_SIZE];
269ded845a7SHarry Morris 
270ded845a7SHarry Morris 	struct ca8210_priv *priv;
271ded845a7SHarry Morris };
272ded845a7SHarry Morris 
273ded845a7SHarry Morris /**
274ded845a7SHarry Morris  * struct ca8210_test - ca8210 test interface structure
275ded845a7SHarry Morris  * @ca8210_dfs_spi_int: pointer to the entry in the debug fs for this device
276ded845a7SHarry Morris  * @up_fifo:            fifo for upstream messages
277c8f638b7SLee Jones  * @readq:              read wait queue
278ded845a7SHarry Morris  *
279ded845a7SHarry Morris  * This structure stores all the data pertaining to the debug interface
280ded845a7SHarry Morris  */
281ded845a7SHarry Morris struct ca8210_test {
282ded845a7SHarry Morris 	struct dentry *ca8210_dfs_spi_int;
283ded845a7SHarry Morris 	struct kfifo up_fifo;
284ded845a7SHarry Morris 	wait_queue_head_t readq;
285ded845a7SHarry Morris };
286ded845a7SHarry Morris 
287ded845a7SHarry Morris /**
288ded845a7SHarry Morris  * struct ca8210_priv - ca8210 private data structure
289ded845a7SHarry Morris  * @spi:                    pointer to the ca8210 spi device object
290ded845a7SHarry Morris  * @hw:                     pointer to the ca8210 ieee802154_hw object
291ded845a7SHarry Morris  * @hw_registered:          true if hw has been registered with ieee802154
292ded845a7SHarry Morris  * @lock:                   spinlock protecting the private data area
293ded845a7SHarry Morris  * @mlme_workqueue:           workqueue for triggering MLME Reset
294ded845a7SHarry Morris  * @irq_workqueue:          workqueue for irq processing
295ded845a7SHarry Morris  * @tx_skb:                 current socket buffer to transmit
296ded845a7SHarry Morris  * @nextmsduhandle:         msdu handle to pass to the 15.4 MAC layer for the
297ded845a7SHarry Morris  *                           next transmission
298ded845a7SHarry Morris  * @clk:                    external clock provided by the ca8210
299ded845a7SHarry Morris  * @last_dsn:               sequence number of last data packet received, for
300ded845a7SHarry Morris  *                           resend detection
301ded845a7SHarry Morris  * @test:                   test interface data section for this instance
302ded845a7SHarry Morris  * @async_tx_pending:       true if an asynchronous transmission was started and
303ded845a7SHarry Morris  *                           is not complete
304ded845a7SHarry Morris  * @sync_command_response:  pointer to buffer to fill with sync response
305ded845a7SHarry Morris  * @ca8210_is_awake:        nonzero if ca8210 is initialised, ready for comms
306ded845a7SHarry Morris  * @sync_down:              counts number of downstream synchronous commands
307ded845a7SHarry Morris  * @sync_up:                counts number of upstream synchronous commands
308c8f638b7SLee Jones  * @spi_transfer_complete:  completion object for a single spi_transfer
309c8f638b7SLee Jones  * @sync_exchange_complete: completion object for a complete synchronous API
310ded845a7SHarry Morris  *                          exchange
311c8f638b7SLee Jones  * @promiscuous:            whether the ca8210 is in promiscuous mode or not
312ded845a7SHarry Morris  * @retries:                records how many times the current pending spi
313ded845a7SHarry Morris  *                          transfer has been retried
314ded845a7SHarry Morris  */
315ded845a7SHarry Morris struct ca8210_priv {
316ded845a7SHarry Morris 	struct spi_device *spi;
317ded845a7SHarry Morris 	struct ieee802154_hw *hw;
318ded845a7SHarry Morris 	bool hw_registered;
319ded845a7SHarry Morris 	spinlock_t lock;
320ded845a7SHarry Morris 	struct workqueue_struct *mlme_workqueue;
321ded845a7SHarry Morris 	struct workqueue_struct *irq_workqueue;
322ded845a7SHarry Morris 	struct sk_buff *tx_skb;
323ded845a7SHarry Morris 	u8 nextmsduhandle;
324ded845a7SHarry Morris 	struct clk *clk;
325ded845a7SHarry Morris 	int last_dsn;
326ded845a7SHarry Morris 	struct ca8210_test test;
327ded845a7SHarry Morris 	bool async_tx_pending;
328ded845a7SHarry Morris 	u8 *sync_command_response;
329ded845a7SHarry Morris 	struct completion ca8210_is_awake;
330ded845a7SHarry Morris 	int sync_down, sync_up;
331ded845a7SHarry Morris 	struct completion spi_transfer_complete, sync_exchange_complete;
332ded845a7SHarry Morris 	bool promiscuous;
333ded845a7SHarry Morris 	int retries;
334ded845a7SHarry Morris };
335ded845a7SHarry Morris 
336ded845a7SHarry Morris /**
337ded845a7SHarry Morris  * struct work_priv_container - link between a work object and the relevant
338ded845a7SHarry Morris  *                              device's private data
339ded845a7SHarry Morris  * @work: work object being executed
340ded845a7SHarry Morris  * @priv: device's private data section
341ded845a7SHarry Morris  *
342ded845a7SHarry Morris  */
343ded845a7SHarry Morris struct work_priv_container {
344ded845a7SHarry Morris 	struct work_struct work;
345ded845a7SHarry Morris 	struct ca8210_priv *priv;
346ded845a7SHarry Morris };
347ded845a7SHarry Morris 
348ded845a7SHarry Morris /**
349ded845a7SHarry Morris  * struct ca8210_platform_data - ca8210 platform data structure
350ded845a7SHarry Morris  * @extclockenable: true if the external clock is to be enabled
351ded845a7SHarry Morris  * @extclockfreq:   frequency of the external clock
352ded845a7SHarry Morris  * @extclockgpio:   ca8210 output gpio of the external clock
353ded845a7SHarry Morris  * @gpio_reset:     gpio number of ca8210 reset line
354ded845a7SHarry Morris  * @gpio_irq:       gpio number of ca8210 interrupt line
355ded845a7SHarry Morris  * @irq_id:         identifier for the ca8210 irq
356ded845a7SHarry Morris  *
357ded845a7SHarry Morris  */
358ded845a7SHarry Morris struct ca8210_platform_data {
359ded845a7SHarry Morris 	bool extclockenable;
360ded845a7SHarry Morris 	unsigned int extclockfreq;
361ded845a7SHarry Morris 	unsigned int extclockgpio;
362ded845a7SHarry Morris 	int gpio_reset;
363ded845a7SHarry Morris 	int gpio_irq;
364ded845a7SHarry Morris 	int irq_id;
365ded845a7SHarry Morris };
366ded845a7SHarry Morris 
367ded845a7SHarry Morris /**
368ded845a7SHarry Morris  * struct fulladdr - full MAC addressing information structure
369ded845a7SHarry Morris  * @mode:    address mode (none, short, extended)
370ded845a7SHarry Morris  * @pan_id:  16-bit LE pan id
371ded845a7SHarry Morris  * @address: LE address, variable length as specified by mode
372ded845a7SHarry Morris  *
373ded845a7SHarry Morris  */
374ded845a7SHarry Morris struct fulladdr {
375ded845a7SHarry Morris 	u8         mode;
376ded845a7SHarry Morris 	u8         pan_id[2];
377ded845a7SHarry Morris 	u8         address[8];
378ded845a7SHarry Morris };
379ded845a7SHarry Morris 
380ded845a7SHarry Morris /**
381ded845a7SHarry Morris  * union macaddr: generic MAC address container
382c8f638b7SLee Jones  * @short_address: 16-bit short address
383ded845a7SHarry Morris  * @ieee_address:  64-bit extended address as LE byte array
384ded845a7SHarry Morris  *
385ded845a7SHarry Morris  */
386ded845a7SHarry Morris union macaddr {
387ded845a7SHarry Morris 	u16        short_address;
388ded845a7SHarry Morris 	u8         ieee_address[8];
389ded845a7SHarry Morris };
390ded845a7SHarry Morris 
391ded845a7SHarry Morris /**
392ded845a7SHarry Morris  * struct secspec: security specification for SAP commands
393ded845a7SHarry Morris  * @security_level: 0-7, controls level of authentication & encryption
394ded845a7SHarry Morris  * @key_id_mode:    0-3, specifies how to obtain key
395ded845a7SHarry Morris  * @key_source:     extended key retrieval data
396ded845a7SHarry Morris  * @key_index:      single-byte key identifier
397ded845a7SHarry Morris  *
398ded845a7SHarry Morris  */
399ded845a7SHarry Morris struct secspec {
400ded845a7SHarry Morris 	u8         security_level;
401ded845a7SHarry Morris 	u8         key_id_mode;
402ded845a7SHarry Morris 	u8         key_source[8];
403ded845a7SHarry Morris 	u8         key_index;
404ded845a7SHarry Morris };
405ded845a7SHarry Morris 
406ded845a7SHarry Morris /* downlink functions parameter set definitions */
407ded845a7SHarry Morris struct mcps_data_request_pset {
408ded845a7SHarry Morris 	u8              src_addr_mode;
409ded845a7SHarry Morris 	struct fulladdr dst;
410ded845a7SHarry Morris 	u8              msdu_length;
411ded845a7SHarry Morris 	u8              msdu_handle;
412ded845a7SHarry Morris 	u8              tx_options;
413ded845a7SHarry Morris 	u8              msdu[MAX_DATA_SIZE];
414ded845a7SHarry Morris };
415ded845a7SHarry Morris 
416ded845a7SHarry Morris struct mlme_set_request_pset {
417ded845a7SHarry Morris 	u8         pib_attribute;
418ded845a7SHarry Morris 	u8         pib_attribute_index;
419ded845a7SHarry Morris 	u8         pib_attribute_length;
420ded845a7SHarry Morris 	u8         pib_attribute_value[MAX_ATTRIBUTE_SIZE];
421ded845a7SHarry Morris };
422ded845a7SHarry Morris 
423ded845a7SHarry Morris struct hwme_set_request_pset {
424ded845a7SHarry Morris 	u8         hw_attribute;
425ded845a7SHarry Morris 	u8         hw_attribute_length;
426ded845a7SHarry Morris 	u8         hw_attribute_value[MAX_HWME_ATTRIBUTE_SIZE];
427ded845a7SHarry Morris };
428ded845a7SHarry Morris 
429ded845a7SHarry Morris struct hwme_get_request_pset {
430ded845a7SHarry Morris 	u8         hw_attribute;
431ded845a7SHarry Morris };
432ded845a7SHarry Morris 
433ded845a7SHarry Morris struct tdme_setsfr_request_pset {
434ded845a7SHarry Morris 	u8         sfr_page;
435ded845a7SHarry Morris 	u8         sfr_address;
436ded845a7SHarry Morris 	u8         sfr_value;
437ded845a7SHarry Morris };
438ded845a7SHarry Morris 
439ded845a7SHarry Morris /* uplink functions parameter set definitions */
440ded845a7SHarry Morris struct hwme_set_confirm_pset {
441ded845a7SHarry Morris 	u8         status;
442ded845a7SHarry Morris 	u8         hw_attribute;
443ded845a7SHarry Morris };
444ded845a7SHarry Morris 
445ded845a7SHarry Morris struct hwme_get_confirm_pset {
446ded845a7SHarry Morris 	u8         status;
447ded845a7SHarry Morris 	u8         hw_attribute;
448ded845a7SHarry Morris 	u8         hw_attribute_length;
449ded845a7SHarry Morris 	u8         hw_attribute_value[MAX_HWME_ATTRIBUTE_SIZE];
450ded845a7SHarry Morris };
451ded845a7SHarry Morris 
452ded845a7SHarry Morris struct tdme_setsfr_confirm_pset {
453ded845a7SHarry Morris 	u8         status;
454ded845a7SHarry Morris 	u8         sfr_page;
455ded845a7SHarry Morris 	u8         sfr_address;
456ded845a7SHarry Morris };
457ded845a7SHarry Morris 
458ded845a7SHarry Morris struct mac_message {
459ded845a7SHarry Morris 	u8      command_id;
460ded845a7SHarry Morris 	u8      length;
461ded845a7SHarry Morris 	union {
462ded845a7SHarry Morris 		struct mcps_data_request_pset       data_req;
463ded845a7SHarry Morris 		struct mlme_set_request_pset        set_req;
464ded845a7SHarry Morris 		struct hwme_set_request_pset        hwme_set_req;
465ded845a7SHarry Morris 		struct hwme_get_request_pset        hwme_get_req;
466ded845a7SHarry Morris 		struct tdme_setsfr_request_pset     tdme_set_sfr_req;
467ded845a7SHarry Morris 		struct hwme_set_confirm_pset        hwme_set_cnf;
468ded845a7SHarry Morris 		struct hwme_get_confirm_pset        hwme_get_cnf;
469ded845a7SHarry Morris 		struct tdme_setsfr_confirm_pset     tdme_set_sfr_cnf;
470ded845a7SHarry Morris 		u8                                  u8param;
471ded845a7SHarry Morris 		u8                                  status;
472ded845a7SHarry Morris 		u8                                  payload[148];
473ded845a7SHarry Morris 	} pdata;
474ded845a7SHarry Morris };
475ded845a7SHarry Morris 
476ded845a7SHarry Morris union pa_cfg_sfr {
477ded845a7SHarry Morris 	struct {
478ded845a7SHarry Morris 		u8 bias_current_trim     : 3;
479ded845a7SHarry Morris 		u8 /* reserved */        : 1;
480ded845a7SHarry Morris 		u8 buffer_capacitor_trim : 3;
481ded845a7SHarry Morris 		u8 boost                 : 1;
482ded845a7SHarry Morris 	};
483ded845a7SHarry Morris 	u8 paib;
484ded845a7SHarry Morris };
485ded845a7SHarry Morris 
486ded845a7SHarry Morris struct preamble_cfg_sfr {
487ded845a7SHarry Morris 	u8 timeout_symbols      : 3;
488ded845a7SHarry Morris 	u8 acquisition_symbols  : 3;
489ded845a7SHarry Morris 	u8 search_symbols       : 2;
490ded845a7SHarry Morris };
491ded845a7SHarry Morris 
492ded845a7SHarry Morris static int (*cascoda_api_upstream)(
493ded845a7SHarry Morris 	const u8 *buf,
494ded845a7SHarry Morris 	size_t len,
495ded845a7SHarry Morris 	void *device_ref
496ded845a7SHarry Morris );
497ded845a7SHarry Morris 
498ded845a7SHarry Morris /**
499ded845a7SHarry Morris  * link_to_linux_err() - Translates an 802.15.4 return code into the closest
500ded845a7SHarry Morris  *                       linux error
501ded845a7SHarry Morris  * @link_status:  802.15.4 status code
502ded845a7SHarry Morris  *
503ded845a7SHarry Morris  * Return: 0 or Linux error code
504ded845a7SHarry Morris  */
link_to_linux_err(int link_status)505ded845a7SHarry Morris static int link_to_linux_err(int link_status)
506ded845a7SHarry Morris {
507ded845a7SHarry Morris 	if (link_status < 0) {
508ded845a7SHarry Morris 		/* status is already a Linux code */
509ded845a7SHarry Morris 		return link_status;
510ded845a7SHarry Morris 	}
511ded845a7SHarry Morris 	switch (link_status) {
512ab191c1cSMiquel Raynal 	case IEEE802154_SUCCESS:
513ab191c1cSMiquel Raynal 	case IEEE802154_REALIGNMENT:
514ded845a7SHarry Morris 		return 0;
515ab191c1cSMiquel Raynal 	case IEEE802154_IMPROPER_KEY_TYPE:
516ded845a7SHarry Morris 		return -EKEYREJECTED;
517ab191c1cSMiquel Raynal 	case IEEE802154_IMPROPER_SECURITY_LEVEL:
518ab191c1cSMiquel Raynal 	case IEEE802154_UNSUPPORTED_LEGACY:
519ab191c1cSMiquel Raynal 	case IEEE802154_DENIED:
520ded845a7SHarry Morris 		return -EACCES;
521ab191c1cSMiquel Raynal 	case IEEE802154_BEACON_LOST:
522ab191c1cSMiquel Raynal 	case IEEE802154_NO_ACK:
523ab191c1cSMiquel Raynal 	case IEEE802154_NO_BEACON:
524ded845a7SHarry Morris 		return -ENETUNREACH;
525ab191c1cSMiquel Raynal 	case IEEE802154_CHANNEL_ACCESS_FAILURE:
526ab191c1cSMiquel Raynal 	case IEEE802154_TX_ACTIVE:
527ab191c1cSMiquel Raynal 	case IEEE802154_SCAN_IN_PROGRESS:
528ded845a7SHarry Morris 		return -EBUSY;
529ab191c1cSMiquel Raynal 	case IEEE802154_DISABLE_TRX_FAILURE:
530ab191c1cSMiquel Raynal 	case IEEE802154_OUT_OF_CAP:
531ded845a7SHarry Morris 		return -EAGAIN;
532ab191c1cSMiquel Raynal 	case IEEE802154_FRAME_TOO_LONG:
533ded845a7SHarry Morris 		return -EMSGSIZE;
534ab191c1cSMiquel Raynal 	case IEEE802154_INVALID_GTS:
535ab191c1cSMiquel Raynal 	case IEEE802154_PAST_TIME:
536ded845a7SHarry Morris 		return -EBADSLT;
537ab191c1cSMiquel Raynal 	case IEEE802154_INVALID_HANDLE:
538ded845a7SHarry Morris 		return -EBADMSG;
539ab191c1cSMiquel Raynal 	case IEEE802154_INVALID_PARAMETER:
540ab191c1cSMiquel Raynal 	case IEEE802154_UNSUPPORTED_ATTRIBUTE:
541ab191c1cSMiquel Raynal 	case IEEE802154_ON_TIME_TOO_LONG:
542ab191c1cSMiquel Raynal 	case IEEE802154_INVALID_INDEX:
543ded845a7SHarry Morris 		return -EINVAL;
544ab191c1cSMiquel Raynal 	case IEEE802154_NO_DATA:
545ded845a7SHarry Morris 		return -ENODATA;
546ab191c1cSMiquel Raynal 	case IEEE802154_NO_SHORT_ADDRESS:
547ded845a7SHarry Morris 		return -EFAULT;
548ab191c1cSMiquel Raynal 	case IEEE802154_PAN_ID_CONFLICT:
549ded845a7SHarry Morris 		return -EADDRINUSE;
550ab191c1cSMiquel Raynal 	case IEEE802154_TRANSACTION_EXPIRED:
551ded845a7SHarry Morris 		return -ETIME;
552ab191c1cSMiquel Raynal 	case IEEE802154_TRANSACTION_OVERFLOW:
553ded845a7SHarry Morris 		return -ENOBUFS;
554ab191c1cSMiquel Raynal 	case IEEE802154_UNAVAILABLE_KEY:
555ded845a7SHarry Morris 		return -ENOKEY;
556ab191c1cSMiquel Raynal 	case IEEE802154_INVALID_ADDRESS:
557ded845a7SHarry Morris 		return -ENXIO;
558ab191c1cSMiquel Raynal 	case IEEE802154_TRACKING_OFF:
559ab191c1cSMiquel Raynal 	case IEEE802154_SUPERFRAME_OVERLAP:
560ded845a7SHarry Morris 		return -EREMOTEIO;
561ab191c1cSMiquel Raynal 	case IEEE802154_LIMIT_REACHED:
562ded845a7SHarry Morris 		return -EDQUOT;
563ab191c1cSMiquel Raynal 	case IEEE802154_READ_ONLY:
564ded845a7SHarry Morris 		return -EROFS;
565ded845a7SHarry Morris 	default:
566ded845a7SHarry Morris 		return -EPROTO;
567ded845a7SHarry Morris 	}
568ded845a7SHarry Morris }
569ded845a7SHarry Morris 
570ded845a7SHarry Morris /**
571ded845a7SHarry Morris  * ca8210_test_int_driver_write() - Writes a message to the test interface to be
572ded845a7SHarry Morris  *                                  read by the userspace
573ded845a7SHarry Morris  * @buf:  Buffer containing upstream message
574ded845a7SHarry Morris  * @len:  length of message to write
575ded845a7SHarry Morris  * @spi:  SPI device of message originator
576ded845a7SHarry Morris  *
577ded845a7SHarry Morris  * Return: 0 or linux error code
578ded845a7SHarry Morris  */
ca8210_test_int_driver_write(const u8 * buf,size_t len,void * spi)579ded845a7SHarry Morris static int ca8210_test_int_driver_write(
580ded845a7SHarry Morris 	const u8       *buf,
581ded845a7SHarry Morris 	size_t          len,
582ded845a7SHarry Morris 	void           *spi
583ded845a7SHarry Morris )
584ded845a7SHarry Morris {
585ded845a7SHarry Morris 	struct ca8210_priv *priv = spi_get_drvdata(spi);
586ded845a7SHarry Morris 	struct ca8210_test *test = &priv->test;
587ded845a7SHarry Morris 	char *fifo_buffer;
588ded845a7SHarry Morris 	int i;
589ded845a7SHarry Morris 
590ded845a7SHarry Morris 	dev_dbg(
591ded845a7SHarry Morris 		&priv->spi->dev,
592ded845a7SHarry Morris 		"test_interface: Buffering upstream message:\n"
593ded845a7SHarry Morris 	);
594ded845a7SHarry Morris 	for (i = 0; i < len; i++)
595ded845a7SHarry Morris 		dev_dbg(&priv->spi->dev, "%#03x\n", buf[i]);
596ded845a7SHarry Morris 
5975b3686c7SYueHaibing 	fifo_buffer = kmemdup(buf, len, GFP_KERNEL);
598941825e1SColin Ian King 	if (!fifo_buffer)
599941825e1SColin Ian King 		return -ENOMEM;
600ded845a7SHarry Morris 	kfifo_in(&test->up_fifo, &fifo_buffer, 4);
601ded845a7SHarry Morris 	wake_up_interruptible(&priv->test.readq);
602ded845a7SHarry Morris 
603ded845a7SHarry Morris 	return 0;
604ded845a7SHarry Morris }
605ded845a7SHarry Morris 
606ded845a7SHarry Morris /* SPI Operation */
607ded845a7SHarry Morris 
608ded845a7SHarry Morris static int ca8210_net_rx(
609ded845a7SHarry Morris 	struct ieee802154_hw  *hw,
610ded845a7SHarry Morris 	u8                    *command,
611ded845a7SHarry Morris 	size_t                 len
612ded845a7SHarry Morris );
613ded845a7SHarry Morris static u8 mlme_reset_request_sync(
614ded845a7SHarry Morris 	u8       set_default_pib,
615ded845a7SHarry Morris 	void    *device_ref
616ded845a7SHarry Morris );
617ded845a7SHarry Morris static int ca8210_spi_transfer(
618ded845a7SHarry Morris 	struct spi_device *spi,
619ded845a7SHarry Morris 	const u8          *buf,
620ded845a7SHarry Morris 	size_t             len
621ded845a7SHarry Morris );
622ded845a7SHarry Morris 
623ded845a7SHarry Morris /**
624ded845a7SHarry Morris  * ca8210_reset_send() - Hard resets the ca8210 for a given time
625ded845a7SHarry Morris  * @spi:  Pointer to target ca8210 spi device
626ded845a7SHarry Morris  * @ms:   Milliseconds to hold the reset line low for
627ded845a7SHarry Morris  */
ca8210_reset_send(struct spi_device * spi,unsigned int ms)628ded845a7SHarry Morris static void ca8210_reset_send(struct spi_device *spi, unsigned int ms)
629ded845a7SHarry Morris {
630ded845a7SHarry Morris 	struct ca8210_platform_data *pdata = spi->dev.platform_data;
631ded845a7SHarry Morris 	struct ca8210_priv *priv = spi_get_drvdata(spi);
632ded845a7SHarry Morris 	long status;
633ded845a7SHarry Morris 
634ded845a7SHarry Morris 	gpio_set_value(pdata->gpio_reset, 0);
635ded845a7SHarry Morris 	reinit_completion(&priv->ca8210_is_awake);
636ded845a7SHarry Morris 	msleep(ms);
637ded845a7SHarry Morris 	gpio_set_value(pdata->gpio_reset, 1);
638ded845a7SHarry Morris 	priv->promiscuous = false;
639ded845a7SHarry Morris 
640ded845a7SHarry Morris 	/* Wait until wakeup indication seen */
641ded845a7SHarry Morris 	status = wait_for_completion_interruptible_timeout(
642ded845a7SHarry Morris 		&priv->ca8210_is_awake,
643ded845a7SHarry Morris 		msecs_to_jiffies(CA8210_SYNC_TIMEOUT)
644ded845a7SHarry Morris 	);
645ded845a7SHarry Morris 	if (status == 0) {
646ded845a7SHarry Morris 		dev_crit(
647ded845a7SHarry Morris 			&spi->dev,
648ded845a7SHarry Morris 			"Fatal: No wakeup from ca8210 after reset!\n"
649ded845a7SHarry Morris 		);
650ded845a7SHarry Morris 	}
651ded845a7SHarry Morris 
652ded845a7SHarry Morris 	dev_dbg(&spi->dev, "Reset the device\n");
653ded845a7SHarry Morris }
654ded845a7SHarry Morris 
655ded845a7SHarry Morris /**
656ded845a7SHarry Morris  * ca8210_mlme_reset_worker() - Resets the MLME, Called when the MAC OVERFLOW
657ded845a7SHarry Morris  *                              condition happens.
658ded845a7SHarry Morris  * @work:  Pointer to work being executed
659ded845a7SHarry Morris  */
ca8210_mlme_reset_worker(struct work_struct * work)660ded845a7SHarry Morris static void ca8210_mlme_reset_worker(struct work_struct *work)
661ded845a7SHarry Morris {
662ded845a7SHarry Morris 	struct work_priv_container *wpc = container_of(
663ded845a7SHarry Morris 		work,
664ded845a7SHarry Morris 		struct work_priv_container,
665ded845a7SHarry Morris 		work
666ded845a7SHarry Morris 	);
667ded845a7SHarry Morris 	struct ca8210_priv *priv = wpc->priv;
668ded845a7SHarry Morris 
669ded845a7SHarry Morris 	mlme_reset_request_sync(0, priv->spi);
670ded845a7SHarry Morris 	kfree(wpc);
671ded845a7SHarry Morris }
672ded845a7SHarry Morris 
673ded845a7SHarry Morris /**
674ded845a7SHarry Morris  * ca8210_rx_done() - Calls various message dispatches responding to a received
675ded845a7SHarry Morris  *                    command
676800a328bSLee Jones  * @cas_ctl: Pointer to the cas_control object for the relevant spi transfer
677ded845a7SHarry Morris  *
678ded845a7SHarry Morris  * Presents a received SAP command from the ca8210 to the Cascoda EVBME, test
679ded845a7SHarry Morris  * interface and network driver.
680ded845a7SHarry Morris  */
ca8210_rx_done(struct cas_control * cas_ctl)681ded845a7SHarry Morris static void ca8210_rx_done(struct cas_control *cas_ctl)
682ded845a7SHarry Morris {
683ded845a7SHarry Morris 	u8 *buf;
6848e41cae6SYueHaibing 	unsigned int len;
685ded845a7SHarry Morris 	struct work_priv_container *mlme_reset_wpc;
686ded845a7SHarry Morris 	struct ca8210_priv *priv = cas_ctl->priv;
687ded845a7SHarry Morris 
688ded845a7SHarry Morris 	buf = cas_ctl->tx_in_buf;
689ded845a7SHarry Morris 	len = buf[1] + 2;
690ded845a7SHarry Morris 	if (len > CA8210_SPI_BUF_SIZE) {
691ded845a7SHarry Morris 		dev_crit(
692ded845a7SHarry Morris 			&priv->spi->dev,
6938e41cae6SYueHaibing 			"Received packet len (%u) erroneously long\n",
694ded845a7SHarry Morris 			len
695ded845a7SHarry Morris 		);
696ded845a7SHarry Morris 		goto finish;
697ded845a7SHarry Morris 	}
698ded845a7SHarry Morris 
699ded845a7SHarry Morris 	if (buf[0] & SPI_SYN) {
700ded845a7SHarry Morris 		if (priv->sync_command_response) {
701ded845a7SHarry Morris 			memcpy(priv->sync_command_response, buf, len);
702ded845a7SHarry Morris 			complete(&priv->sync_exchange_complete);
703ded845a7SHarry Morris 		} else {
704ded845a7SHarry Morris 			if (cascoda_api_upstream)
705ded845a7SHarry Morris 				cascoda_api_upstream(buf, len, priv->spi);
706ded845a7SHarry Morris 			priv->sync_up++;
707ded845a7SHarry Morris 		}
708ded845a7SHarry Morris 	} else {
709ded845a7SHarry Morris 		if (cascoda_api_upstream)
710ded845a7SHarry Morris 			cascoda_api_upstream(buf, len, priv->spi);
711ded845a7SHarry Morris 	}
712ded845a7SHarry Morris 
713ded845a7SHarry Morris 	ca8210_net_rx(priv->hw, buf, len);
714ded845a7SHarry Morris 	if (buf[0] == SPI_MCPS_DATA_CONFIRM) {
715ab191c1cSMiquel Raynal 		if (buf[3] == IEEE802154_TRANSACTION_OVERFLOW) {
716ded845a7SHarry Morris 			dev_info(
717ded845a7SHarry Morris 				&priv->spi->dev,
718ded845a7SHarry Morris 				"Waiting for transaction overflow to stabilise...\n");
719ded845a7SHarry Morris 			msleep(2000);
720ded845a7SHarry Morris 			dev_info(
721ded845a7SHarry Morris 				&priv->spi->dev,
722ded845a7SHarry Morris 				"Resetting MAC...\n");
723ded845a7SHarry Morris 
724941825e1SColin Ian King 			mlme_reset_wpc = kmalloc(sizeof(*mlme_reset_wpc),
725941825e1SColin Ian King 						 GFP_KERNEL);
726941825e1SColin Ian King 			if (!mlme_reset_wpc)
727941825e1SColin Ian King 				goto finish;
728ded845a7SHarry Morris 			INIT_WORK(
729ded845a7SHarry Morris 				&mlme_reset_wpc->work,
730ded845a7SHarry Morris 				ca8210_mlme_reset_worker
731ded845a7SHarry Morris 			);
732ded845a7SHarry Morris 			mlme_reset_wpc->priv = priv;
733ded845a7SHarry Morris 			queue_work(priv->mlme_workqueue, &mlme_reset_wpc->work);
734ded845a7SHarry Morris 		}
735ded845a7SHarry Morris 	} else if (buf[0] == SPI_HWME_WAKEUP_INDICATION) {
736ded845a7SHarry Morris 		dev_notice(
737ded845a7SHarry Morris 			&priv->spi->dev,
738ded845a7SHarry Morris 			"Wakeup indication received, reason:\n"
739ded845a7SHarry Morris 		);
740ded845a7SHarry Morris 		switch (buf[2]) {
741ded845a7SHarry Morris 		case 0:
742ded845a7SHarry Morris 			dev_notice(
743ded845a7SHarry Morris 				&priv->spi->dev,
744ded845a7SHarry Morris 				"Transceiver woken up from Power Up / System Reset\n"
745ded845a7SHarry Morris 			);
746ded845a7SHarry Morris 			break;
747ded845a7SHarry Morris 		case 1:
748ded845a7SHarry Morris 			dev_notice(
749ded845a7SHarry Morris 				&priv->spi->dev,
750ded845a7SHarry Morris 				"Watchdog Timer Time-Out\n"
751ded845a7SHarry Morris 			);
752ded845a7SHarry Morris 			break;
753ded845a7SHarry Morris 		case 2:
754ded845a7SHarry Morris 			dev_notice(
755ded845a7SHarry Morris 				&priv->spi->dev,
756ded845a7SHarry Morris 				"Transceiver woken up from Power-Off by Sleep Timer Time-Out\n");
757ded845a7SHarry Morris 			break;
758ded845a7SHarry Morris 		case 3:
759ded845a7SHarry Morris 			dev_notice(
760ded845a7SHarry Morris 				&priv->spi->dev,
761ded845a7SHarry Morris 				"Transceiver woken up from Power-Off by GPIO Activity\n"
762ded845a7SHarry Morris 			);
763ded845a7SHarry Morris 			break;
764ded845a7SHarry Morris 		case 4:
765ded845a7SHarry Morris 			dev_notice(
766ded845a7SHarry Morris 				&priv->spi->dev,
767ded845a7SHarry Morris 				"Transceiver woken up from Standby by Sleep Timer Time-Out\n"
768ded845a7SHarry Morris 			);
769ded845a7SHarry Morris 			break;
770ded845a7SHarry Morris 		case 5:
771ded845a7SHarry Morris 			dev_notice(
772ded845a7SHarry Morris 				&priv->spi->dev,
773ded845a7SHarry Morris 				"Transceiver woken up from Standby by GPIO Activity\n"
774ded845a7SHarry Morris 			);
775ded845a7SHarry Morris 			break;
776ded845a7SHarry Morris 		case 6:
777ded845a7SHarry Morris 			dev_notice(
778ded845a7SHarry Morris 				&priv->spi->dev,
779ded845a7SHarry Morris 				"Sleep-Timer Time-Out in Active Mode\n"
780ded845a7SHarry Morris 			);
781ded845a7SHarry Morris 			break;
782ded845a7SHarry Morris 		default:
783ded845a7SHarry Morris 			dev_warn(&priv->spi->dev, "Wakeup reason unknown\n");
784ded845a7SHarry Morris 			break;
785ded845a7SHarry Morris 		}
786ded845a7SHarry Morris 		complete(&priv->ca8210_is_awake);
787ded845a7SHarry Morris 	}
788ded845a7SHarry Morris 
789ded845a7SHarry Morris finish:;
790ded845a7SHarry Morris }
791ded845a7SHarry Morris 
792a0386bbaSUwe Kleine-König static void ca8210_remove(struct spi_device *spi_device);
793ded845a7SHarry Morris 
794ded845a7SHarry Morris /**
795ded845a7SHarry Morris  * ca8210_spi_transfer_complete() - Called when a single spi transfer has
796ded845a7SHarry Morris  *                                  completed
797ded845a7SHarry Morris  * @context:  Pointer to the cas_control object for the finished transfer
798ded845a7SHarry Morris  */
ca8210_spi_transfer_complete(void * context)799ded845a7SHarry Morris static void ca8210_spi_transfer_complete(void *context)
800ded845a7SHarry Morris {
801ded845a7SHarry Morris 	struct cas_control *cas_ctl = context;
802ded845a7SHarry Morris 	struct ca8210_priv *priv = cas_ctl->priv;
803ded845a7SHarry Morris 	bool duplex_rx = false;
804ded845a7SHarry Morris 	int i;
805ded845a7SHarry Morris 	u8 retry_buffer[CA8210_SPI_BUF_SIZE];
806ded845a7SHarry Morris 
807ded845a7SHarry Morris 	if (
808ded845a7SHarry Morris 		cas_ctl->tx_in_buf[0] == SPI_NACK ||
809ded845a7SHarry Morris 		(cas_ctl->tx_in_buf[0] == SPI_IDLE &&
810ded845a7SHarry Morris 		cas_ctl->tx_in_buf[1] == SPI_NACK)
811ded845a7SHarry Morris 	) {
812ded845a7SHarry Morris 		/* ca8210 is busy */
813ded845a7SHarry Morris 		dev_info(&priv->spi->dev, "ca8210 was busy during attempted write\n");
814ded845a7SHarry Morris 		if (cas_ctl->tx_buf[0] == SPI_IDLE) {
815ded845a7SHarry Morris 			dev_warn(
816ded845a7SHarry Morris 				&priv->spi->dev,
817ded845a7SHarry Morris 				"IRQ servicing NACKd, dropping transfer\n"
818ded845a7SHarry Morris 			);
819ded845a7SHarry Morris 			kfree(cas_ctl);
820ded845a7SHarry Morris 			return;
821ded845a7SHarry Morris 		}
822ded845a7SHarry Morris 		if (priv->retries > 3) {
823ded845a7SHarry Morris 			dev_err(&priv->spi->dev, "too many retries!\n");
824ded845a7SHarry Morris 			kfree(cas_ctl);
825ded845a7SHarry Morris 			ca8210_remove(priv->spi);
826ded845a7SHarry Morris 			return;
827ded845a7SHarry Morris 		}
828ded845a7SHarry Morris 		memcpy(retry_buffer, cas_ctl->tx_buf, CA8210_SPI_BUF_SIZE);
829ded845a7SHarry Morris 		kfree(cas_ctl);
830ded845a7SHarry Morris 		ca8210_spi_transfer(
831ded845a7SHarry Morris 			priv->spi,
832ded845a7SHarry Morris 			retry_buffer,
833ded845a7SHarry Morris 			CA8210_SPI_BUF_SIZE
834ded845a7SHarry Morris 		);
835ded845a7SHarry Morris 		priv->retries++;
836ded845a7SHarry Morris 		dev_info(&priv->spi->dev, "retried spi write\n");
837ded845a7SHarry Morris 		return;
838ded845a7SHarry Morris 	} else if (
839ded845a7SHarry Morris 			cas_ctl->tx_in_buf[0] != SPI_IDLE &&
840ded845a7SHarry Morris 			cas_ctl->tx_in_buf[0] != SPI_NACK
841ded845a7SHarry Morris 		) {
842ded845a7SHarry Morris 		duplex_rx = true;
843ded845a7SHarry Morris 	}
844ded845a7SHarry Morris 
845ded845a7SHarry Morris 	if (duplex_rx) {
846ded845a7SHarry Morris 		dev_dbg(&priv->spi->dev, "READ CMD DURING TX\n");
847ded845a7SHarry Morris 		for (i = 0; i < cas_ctl->tx_in_buf[1] + 2; i++)
848ded845a7SHarry Morris 			dev_dbg(
849ded845a7SHarry Morris 				&priv->spi->dev,
850ded845a7SHarry Morris 				"%#03x\n",
851ded845a7SHarry Morris 				cas_ctl->tx_in_buf[i]
852ded845a7SHarry Morris 			);
853ded845a7SHarry Morris 		ca8210_rx_done(cas_ctl);
854ded845a7SHarry Morris 	}
855ded845a7SHarry Morris 	complete(&priv->spi_transfer_complete);
856ded845a7SHarry Morris 	kfree(cas_ctl);
857ded845a7SHarry Morris 	priv->retries = 0;
858ded845a7SHarry Morris }
859ded845a7SHarry Morris 
860ded845a7SHarry Morris /**
861ded845a7SHarry Morris  * ca8210_spi_transfer() - Initiate duplex spi transfer with ca8210
862ded845a7SHarry Morris  * @spi: Pointer to spi device for transfer
863ded845a7SHarry Morris  * @buf: Octet array to send
864ded845a7SHarry Morris  * @len: length of the buffer being sent
865ded845a7SHarry Morris  *
866ded845a7SHarry Morris  * Return: 0 or linux error code
867ded845a7SHarry Morris  */
ca8210_spi_transfer(struct spi_device * spi,const u8 * buf,size_t len)868ded845a7SHarry Morris static int ca8210_spi_transfer(
869ded845a7SHarry Morris 	struct spi_device  *spi,
870ded845a7SHarry Morris 	const u8           *buf,
871ded845a7SHarry Morris 	size_t              len
872ded845a7SHarry Morris )
873ded845a7SHarry Morris {
874ded845a7SHarry Morris 	int i, status = 0;
8757dab5467SGustavo A. R. Silva 	struct ca8210_priv *priv;
876ded845a7SHarry Morris 	struct cas_control *cas_ctl;
877ded845a7SHarry Morris 
878ded845a7SHarry Morris 	if (!spi) {
879f00c2987SChristophe JAILLET 		pr_crit("NULL spi device passed to %s\n", __func__);
880ded845a7SHarry Morris 		return -ENODEV;
881ded845a7SHarry Morris 	}
882ded845a7SHarry Morris 
8837dab5467SGustavo A. R. Silva 	priv = spi_get_drvdata(spi);
884ded845a7SHarry Morris 	reinit_completion(&priv->spi_transfer_complete);
885ded845a7SHarry Morris 
8867558bd50SStefan Schmidt 	dev_dbg(&spi->dev, "%s called\n", __func__);
887ded845a7SHarry Morris 
8881e24c54dSHauke Mehrtens 	cas_ctl = kzalloc(sizeof(*cas_ctl), GFP_ATOMIC);
889941825e1SColin Ian King 	if (!cas_ctl)
890941825e1SColin Ian King 		return -ENOMEM;
891941825e1SColin Ian King 
892ded845a7SHarry Morris 	cas_ctl->priv = priv;
893ded845a7SHarry Morris 	memset(cas_ctl->tx_buf, SPI_IDLE, CA8210_SPI_BUF_SIZE);
894ded845a7SHarry Morris 	memset(cas_ctl->tx_in_buf, SPI_IDLE, CA8210_SPI_BUF_SIZE);
895ded845a7SHarry Morris 	memcpy(cas_ctl->tx_buf, buf, len);
896ded845a7SHarry Morris 
897ded845a7SHarry Morris 	for (i = 0; i < len; i++)
898ded845a7SHarry Morris 		dev_dbg(&spi->dev, "%#03x\n", cas_ctl->tx_buf[i]);
899ded845a7SHarry Morris 
900ded845a7SHarry Morris 	spi_message_init(&cas_ctl->msg);
901ded845a7SHarry Morris 
902ded845a7SHarry Morris 	cas_ctl->transfer.tx_nbits = 1; /* 1 MOSI line */
903ded845a7SHarry Morris 	cas_ctl->transfer.rx_nbits = 1; /* 1 MISO line */
904ded845a7SHarry Morris 	cas_ctl->transfer.speed_hz = 0; /* Use device setting */
905ded845a7SHarry Morris 	cas_ctl->transfer.bits_per_word = 0; /* Use device setting */
906ded845a7SHarry Morris 	cas_ctl->transfer.tx_buf = cas_ctl->tx_buf;
907ded845a7SHarry Morris 	cas_ctl->transfer.rx_buf = cas_ctl->tx_in_buf;
9085b5c328fSSergiu Cuciurean 	cas_ctl->transfer.delay.value = 0;
9095b5c328fSSergiu Cuciurean 	cas_ctl->transfer.delay.unit = SPI_DELAY_UNIT_USECS;
910ded845a7SHarry Morris 	cas_ctl->transfer.cs_change = 0;
911ded845a7SHarry Morris 	cas_ctl->transfer.len = sizeof(struct mac_message);
912ded845a7SHarry Morris 	cas_ctl->msg.complete = ca8210_spi_transfer_complete;
913ded845a7SHarry Morris 	cas_ctl->msg.context = cas_ctl;
914ded845a7SHarry Morris 
915ded845a7SHarry Morris 	spi_message_add_tail(
916ded845a7SHarry Morris 		&cas_ctl->transfer,
917ded845a7SHarry Morris 		&cas_ctl->msg
918ded845a7SHarry Morris 	);
919ded845a7SHarry Morris 
920ded845a7SHarry Morris 	status = spi_async(spi, &cas_ctl->msg);
921ded845a7SHarry Morris 	if (status < 0) {
922ded845a7SHarry Morris 		dev_crit(
923ded845a7SHarry Morris 			&spi->dev,
924ded845a7SHarry Morris 			"status %d from spi_sync in write\n",
925ded845a7SHarry Morris 			status
926ded845a7SHarry Morris 		);
927ded845a7SHarry Morris 	}
928ded845a7SHarry Morris 
929ded845a7SHarry Morris 	return status;
930ded845a7SHarry Morris }
931ded845a7SHarry Morris 
932ded845a7SHarry Morris /**
933ded845a7SHarry Morris  * ca8210_spi_exchange() - Exchange API/SAP commands with the radio
934ded845a7SHarry Morris  * @buf:         Octet array of command being sent downstream
935ded845a7SHarry Morris  * @len:         length of buf
936ded845a7SHarry Morris  * @response:    buffer for storing synchronous response
937ded845a7SHarry Morris  * @device_ref:  spi_device pointer for ca8210
938ded845a7SHarry Morris  *
939ded845a7SHarry Morris  * Effectively calls ca8210_spi_transfer to write buf[] to the spi, then for
940ded845a7SHarry Morris  * synchronous commands waits for the corresponding response to be read from
941ded845a7SHarry Morris  * the spi before returning. The response is written to the response parameter.
942ded845a7SHarry Morris  *
943ded845a7SHarry Morris  * Return: 0 or linux error code
944ded845a7SHarry Morris  */
ca8210_spi_exchange(const u8 * buf,size_t len,u8 * response,void * device_ref)945ded845a7SHarry Morris static int ca8210_spi_exchange(
946ded845a7SHarry Morris 	const u8 *buf,
947ded845a7SHarry Morris 	size_t len,
948ded845a7SHarry Morris 	u8 *response,
949ded845a7SHarry Morris 	void *device_ref
950ded845a7SHarry Morris )
951ded845a7SHarry Morris {
952ded845a7SHarry Morris 	int status = 0;
953ded845a7SHarry Morris 	struct spi_device *spi = device_ref;
954ded845a7SHarry Morris 	struct ca8210_priv *priv = spi->dev.driver_data;
955ded845a7SHarry Morris 	long wait_remaining;
956ded845a7SHarry Morris 
957ded845a7SHarry Morris 	if ((buf[0] & SPI_SYN) && response) { /* if sync wait for confirm */
958ded845a7SHarry Morris 		reinit_completion(&priv->sync_exchange_complete);
959ded845a7SHarry Morris 		priv->sync_command_response = response;
960ded845a7SHarry Morris 	}
961ded845a7SHarry Morris 
962ded845a7SHarry Morris 	do {
963ded845a7SHarry Morris 		reinit_completion(&priv->spi_transfer_complete);
964ded845a7SHarry Morris 		status = ca8210_spi_transfer(priv->spi, buf, len);
965ded845a7SHarry Morris 		if (status) {
966ded845a7SHarry Morris 			dev_warn(
967ded845a7SHarry Morris 				&spi->dev,
968ded845a7SHarry Morris 				"spi write failed, returned %d\n",
969ded845a7SHarry Morris 				status
970ded845a7SHarry Morris 			);
971ded845a7SHarry Morris 			if (status == -EBUSY)
972ded845a7SHarry Morris 				continue;
973ded845a7SHarry Morris 			if (((buf[0] & SPI_SYN) && response))
974ded845a7SHarry Morris 				complete(&priv->sync_exchange_complete);
975ded845a7SHarry Morris 			goto cleanup;
976ded845a7SHarry Morris 		}
977ded845a7SHarry Morris 
978ded845a7SHarry Morris 		wait_remaining = wait_for_completion_interruptible_timeout(
979ded845a7SHarry Morris 			&priv->spi_transfer_complete,
980ded845a7SHarry Morris 			msecs_to_jiffies(1000)
981ded845a7SHarry Morris 		);
982ded845a7SHarry Morris 		if (wait_remaining == -ERESTARTSYS) {
983ded845a7SHarry Morris 			status = -ERESTARTSYS;
984ded845a7SHarry Morris 		} else if (wait_remaining == 0) {
985ded845a7SHarry Morris 			dev_err(
986ded845a7SHarry Morris 				&spi->dev,
987ded845a7SHarry Morris 				"SPI downstream transfer timed out!\n"
988ded845a7SHarry Morris 			);
989ded845a7SHarry Morris 			status = -ETIME;
990ded845a7SHarry Morris 			goto cleanup;
991ded845a7SHarry Morris 		}
992ded845a7SHarry Morris 	} while (status < 0);
993ded845a7SHarry Morris 
994ded845a7SHarry Morris 	if (!((buf[0] & SPI_SYN) && response))
995ded845a7SHarry Morris 		goto cleanup;
996ded845a7SHarry Morris 
997ded845a7SHarry Morris 	wait_remaining = wait_for_completion_interruptible_timeout(
998ded845a7SHarry Morris 		&priv->sync_exchange_complete,
999ded845a7SHarry Morris 		msecs_to_jiffies(CA8210_SYNC_TIMEOUT)
1000ded845a7SHarry Morris 	);
1001ded845a7SHarry Morris 	if (wait_remaining == -ERESTARTSYS) {
1002ded845a7SHarry Morris 		status = -ERESTARTSYS;
1003ded845a7SHarry Morris 	} else if (wait_remaining == 0) {
1004ded845a7SHarry Morris 		dev_err(
1005ded845a7SHarry Morris 			&spi->dev,
1006ded845a7SHarry Morris 			"Synchronous confirm timeout\n"
1007ded845a7SHarry Morris 		);
1008ded845a7SHarry Morris 		status = -ETIME;
1009ded845a7SHarry Morris 	}
1010ded845a7SHarry Morris 
1011ded845a7SHarry Morris cleanup:
1012ded845a7SHarry Morris 	priv->sync_command_response = NULL;
1013ded845a7SHarry Morris 	return status;
1014ded845a7SHarry Morris }
1015ded845a7SHarry Morris 
1016ded845a7SHarry Morris /**
1017ded845a7SHarry Morris  * ca8210_interrupt_handler() - Called when an irq is received from the ca8210
1018ded845a7SHarry Morris  * @irq:     Id of the irq being handled
1019ded845a7SHarry Morris  * @dev_id:  Pointer passed by the system, pointing to the ca8210's private data
1020ded845a7SHarry Morris  *
1021ded845a7SHarry Morris  * This function is called when the irq line from the ca8210 is asserted,
1022ded845a7SHarry Morris  * signifying that the ca8210 has a message to send upstream to us. Starts the
1023ded845a7SHarry Morris  * asynchronous spi read.
1024ded845a7SHarry Morris  *
1025ded845a7SHarry Morris  * Return: irq return code
1026ded845a7SHarry Morris  */
ca8210_interrupt_handler(int irq,void * dev_id)1027ded845a7SHarry Morris static irqreturn_t ca8210_interrupt_handler(int irq, void *dev_id)
1028ded845a7SHarry Morris {
1029ded845a7SHarry Morris 	struct ca8210_priv *priv = dev_id;
1030ded845a7SHarry Morris 	int status;
1031ded845a7SHarry Morris 
1032ded845a7SHarry Morris 	dev_dbg(&priv->spi->dev, "irq: Interrupt occurred\n");
1033ded845a7SHarry Morris 	do {
1034ded845a7SHarry Morris 		status = ca8210_spi_transfer(priv->spi, NULL, 0);
1035ded845a7SHarry Morris 		if (status && (status != -EBUSY)) {
1036ded845a7SHarry Morris 			dev_warn(
1037ded845a7SHarry Morris 				&priv->spi->dev,
1038ded845a7SHarry Morris 				"spi read failed, returned %d\n",
1039ded845a7SHarry Morris 				status
1040ded845a7SHarry Morris 			);
1041ded845a7SHarry Morris 		}
1042ded845a7SHarry Morris 	} while (status == -EBUSY);
1043ded845a7SHarry Morris 	return IRQ_HANDLED;
1044ded845a7SHarry Morris }
1045ded845a7SHarry Morris 
1046ded845a7SHarry Morris static int (*cascoda_api_downstream)(
1047ded845a7SHarry Morris 	const u8 *buf,
1048ded845a7SHarry Morris 	size_t len,
1049ded845a7SHarry Morris 	u8 *response,
1050ded845a7SHarry Morris 	void *device_ref
1051ded845a7SHarry Morris ) = ca8210_spi_exchange;
1052ded845a7SHarry Morris 
1053ded845a7SHarry Morris /* Cascoda API / 15.4 SAP Primitives */
1054ded845a7SHarry Morris 
1055ded845a7SHarry Morris /**
1056ded845a7SHarry Morris  * tdme_setsfr_request_sync() - TDME_SETSFR_request/confirm according to API
1057ded845a7SHarry Morris  * @sfr_page:    SFR Page
1058ded845a7SHarry Morris  * @sfr_address: SFR Address
1059ded845a7SHarry Morris  * @sfr_value:   SFR Value
1060ded845a7SHarry Morris  * @device_ref:  Nondescript pointer to target device
1061ded845a7SHarry Morris  *
1062ded845a7SHarry Morris  * Return: 802.15.4 status code of TDME-SETSFR.confirm
1063ded845a7SHarry Morris  */
tdme_setsfr_request_sync(u8 sfr_page,u8 sfr_address,u8 sfr_value,void * device_ref)1064ded845a7SHarry Morris static u8 tdme_setsfr_request_sync(
1065ded845a7SHarry Morris 	u8            sfr_page,
1066ded845a7SHarry Morris 	u8            sfr_address,
1067ded845a7SHarry Morris 	u8            sfr_value,
1068ded845a7SHarry Morris 	void         *device_ref
1069ded845a7SHarry Morris )
1070ded845a7SHarry Morris {
1071ded845a7SHarry Morris 	int ret;
1072ded845a7SHarry Morris 	struct mac_message command, response;
1073ded845a7SHarry Morris 	struct spi_device *spi = device_ref;
1074ded845a7SHarry Morris 
1075ded845a7SHarry Morris 	command.command_id = SPI_TDME_SETSFR_REQUEST;
1076ded845a7SHarry Morris 	command.length = 3;
1077ded845a7SHarry Morris 	command.pdata.tdme_set_sfr_req.sfr_page    = sfr_page;
1078ded845a7SHarry Morris 	command.pdata.tdme_set_sfr_req.sfr_address = sfr_address;
1079ded845a7SHarry Morris 	command.pdata.tdme_set_sfr_req.sfr_value   = sfr_value;
1080ded845a7SHarry Morris 	response.command_id = SPI_IDLE;
1081ded845a7SHarry Morris 	ret = cascoda_api_downstream(
1082ded845a7SHarry Morris 		&command.command_id,
1083ded845a7SHarry Morris 		command.length + 2,
1084ded845a7SHarry Morris 		&response.command_id,
1085ded845a7SHarry Morris 		device_ref
1086ded845a7SHarry Morris 	);
1087ded845a7SHarry Morris 	if (ret) {
1088ded845a7SHarry Morris 		dev_crit(&spi->dev, "cascoda_api_downstream returned %d", ret);
1089ab191c1cSMiquel Raynal 		return IEEE802154_SYSTEM_ERROR;
1090ded845a7SHarry Morris 	}
1091ded845a7SHarry Morris 
1092ded845a7SHarry Morris 	if (response.command_id != SPI_TDME_SETSFR_CONFIRM) {
1093ded845a7SHarry Morris 		dev_crit(
1094ded845a7SHarry Morris 			&spi->dev,
1095ded845a7SHarry Morris 			"sync response to SPI_TDME_SETSFR_REQUEST was not SPI_TDME_SETSFR_CONFIRM, it was %d\n",
1096ded845a7SHarry Morris 			response.command_id
1097ded845a7SHarry Morris 		);
1098ab191c1cSMiquel Raynal 		return IEEE802154_SYSTEM_ERROR;
1099ded845a7SHarry Morris 	}
1100ded845a7SHarry Morris 
1101ded845a7SHarry Morris 	return response.pdata.tdme_set_sfr_cnf.status;
1102ded845a7SHarry Morris }
1103ded845a7SHarry Morris 
1104ded845a7SHarry Morris /**
1105ded845a7SHarry Morris  * tdme_chipinit() - TDME Chip Register Default Initialisation Macro
1106ded845a7SHarry Morris  * @device_ref: Nondescript pointer to target device
1107ded845a7SHarry Morris  *
1108ded845a7SHarry Morris  * Return: 802.15.4 status code of API calls
1109ded845a7SHarry Morris  */
tdme_chipinit(void * device_ref)1110ded845a7SHarry Morris static u8 tdme_chipinit(void *device_ref)
1111ded845a7SHarry Morris {
1112ab191c1cSMiquel Raynal 	u8 status = IEEE802154_SUCCESS;
1113ded845a7SHarry Morris 	u8 sfr_address;
1114ded845a7SHarry Morris 	struct spi_device *spi = device_ref;
1115ded845a7SHarry Morris 	struct preamble_cfg_sfr pre_cfg_value = {
1116ded845a7SHarry Morris 		.timeout_symbols     = 3,
1117ded845a7SHarry Morris 		.acquisition_symbols = 3,
1118ded845a7SHarry Morris 		.search_symbols      = 1,
1119ded845a7SHarry Morris 	};
1120ded845a7SHarry Morris 	/* LNA Gain Settings */
1121ded845a7SHarry Morris 	status = tdme_setsfr_request_sync(
1122ded845a7SHarry Morris 		1, (sfr_address = CA8210_SFR_LNAGX40),
1123ded845a7SHarry Morris 		LNAGX40_DEFAULT_GAIN, device_ref);
1124ded845a7SHarry Morris 	if (status)
1125ded845a7SHarry Morris 		goto finish;
1126ded845a7SHarry Morris 	status = tdme_setsfr_request_sync(
1127ded845a7SHarry Morris 		1, (sfr_address = CA8210_SFR_LNAGX41),
1128ded845a7SHarry Morris 		LNAGX41_DEFAULT_GAIN, device_ref);
1129ded845a7SHarry Morris 	if (status)
1130ded845a7SHarry Morris 		goto finish;
1131ded845a7SHarry Morris 	status = tdme_setsfr_request_sync(
1132ded845a7SHarry Morris 		1, (sfr_address = CA8210_SFR_LNAGX42),
1133ded845a7SHarry Morris 		LNAGX42_DEFAULT_GAIN, device_ref);
1134ded845a7SHarry Morris 	if (status)
1135ded845a7SHarry Morris 		goto finish;
1136ded845a7SHarry Morris 	status = tdme_setsfr_request_sync(
1137ded845a7SHarry Morris 		1, (sfr_address = CA8210_SFR_LNAGX43),
1138ded845a7SHarry Morris 		LNAGX43_DEFAULT_GAIN, device_ref);
1139ded845a7SHarry Morris 	if (status)
1140ded845a7SHarry Morris 		goto finish;
1141ded845a7SHarry Morris 	status = tdme_setsfr_request_sync(
1142ded845a7SHarry Morris 		1, (sfr_address = CA8210_SFR_LNAGX44),
1143ded845a7SHarry Morris 		LNAGX44_DEFAULT_GAIN, device_ref);
1144ded845a7SHarry Morris 	if (status)
1145ded845a7SHarry Morris 		goto finish;
1146ded845a7SHarry Morris 	status = tdme_setsfr_request_sync(
1147ded845a7SHarry Morris 		1, (sfr_address = CA8210_SFR_LNAGX45),
1148ded845a7SHarry Morris 		LNAGX45_DEFAULT_GAIN, device_ref);
1149ded845a7SHarry Morris 	if (status)
1150ded845a7SHarry Morris 		goto finish;
1151ded845a7SHarry Morris 	status = tdme_setsfr_request_sync(
1152ded845a7SHarry Morris 		1, (sfr_address = CA8210_SFR_LNAGX46),
1153ded845a7SHarry Morris 		LNAGX46_DEFAULT_GAIN, device_ref);
1154ded845a7SHarry Morris 	if (status)
1155ded845a7SHarry Morris 		goto finish;
1156ded845a7SHarry Morris 	status = tdme_setsfr_request_sync(
1157ded845a7SHarry Morris 		1, (sfr_address = CA8210_SFR_LNAGX47),
1158ded845a7SHarry Morris 		LNAGX47_DEFAULT_GAIN, device_ref);
1159ded845a7SHarry Morris 	if (status)
1160ded845a7SHarry Morris 		goto finish;
1161ded845a7SHarry Morris 	/* Preamble Timing Config */
1162ded845a7SHarry Morris 	status = tdme_setsfr_request_sync(
1163ded845a7SHarry Morris 		1, (sfr_address = CA8210_SFR_PRECFG),
1164ded845a7SHarry Morris 		*((u8 *)&pre_cfg_value), device_ref);
1165ded845a7SHarry Morris 	if (status)
1166ded845a7SHarry Morris 		goto finish;
1167ded845a7SHarry Morris 	/* Preamble Threshold High */
1168ded845a7SHarry Morris 	status = tdme_setsfr_request_sync(
1169ded845a7SHarry Morris 		1, (sfr_address = CA8210_SFR_PTHRH),
1170ded845a7SHarry Morris 		PTHRH_DEFAULT_THRESHOLD, device_ref);
1171ded845a7SHarry Morris 	if (status)
1172ded845a7SHarry Morris 		goto finish;
1173ded845a7SHarry Morris 	/* Tx Output Power 8 dBm */
1174ded845a7SHarry Morris 	status = tdme_setsfr_request_sync(
1175ded845a7SHarry Morris 		0, (sfr_address = CA8210_SFR_PACFGIB),
1176ded845a7SHarry Morris 		PACFGIB_DEFAULT_CURRENT, device_ref);
1177ded845a7SHarry Morris 	if (status)
1178ded845a7SHarry Morris 		goto finish;
1179ded845a7SHarry Morris 
1180ded845a7SHarry Morris finish:
1181ab191c1cSMiquel Raynal 	if (status != IEEE802154_SUCCESS) {
1182ded845a7SHarry Morris 		dev_err(
1183ded845a7SHarry Morris 			&spi->dev,
1184ded845a7SHarry Morris 			"failed to set sfr at %#03x, status = %#03x\n",
1185ded845a7SHarry Morris 			sfr_address,
1186ded845a7SHarry Morris 			status
1187ded845a7SHarry Morris 		);
1188ded845a7SHarry Morris 	}
1189ded845a7SHarry Morris 	return status;
1190ded845a7SHarry Morris }
1191ded845a7SHarry Morris 
1192ded845a7SHarry Morris /**
1193ded845a7SHarry Morris  * tdme_channelinit() - TDME Channel Register Default Initialisation Macro (Tx)
1194ded845a7SHarry Morris  * @channel:    802.15.4 channel to initialise chip for
1195ded845a7SHarry Morris  * @device_ref: Nondescript pointer to target device
1196ded845a7SHarry Morris  *
1197ded845a7SHarry Morris  * Return: 802.15.4 status code of API calls
1198ded845a7SHarry Morris  */
tdme_channelinit(u8 channel,void * device_ref)1199ded845a7SHarry Morris static u8 tdme_channelinit(u8 channel, void *device_ref)
1200ded845a7SHarry Morris {
1201ded845a7SHarry Morris 	/* Transceiver front-end local oscillator tx two-point calibration
1202ded845a7SHarry Morris 	 * value. Tuned for the hardware.
1203ded845a7SHarry Morris 	 */
1204ded845a7SHarry Morris 	u8 txcalval;
1205ded845a7SHarry Morris 
1206ded845a7SHarry Morris 	if (channel >= 25)
1207ded845a7SHarry Morris 		txcalval = 0xA7;
1208ded845a7SHarry Morris 	else if (channel >= 23)
1209ded845a7SHarry Morris 		txcalval = 0xA8;
1210ded845a7SHarry Morris 	else if (channel >= 22)
1211ded845a7SHarry Morris 		txcalval = 0xA9;
1212ded845a7SHarry Morris 	else if (channel >= 20)
1213ded845a7SHarry Morris 		txcalval = 0xAA;
1214ded845a7SHarry Morris 	else if (channel >= 17)
1215ded845a7SHarry Morris 		txcalval = 0xAB;
1216ded845a7SHarry Morris 	else if (channel >= 16)
1217ded845a7SHarry Morris 		txcalval = 0xAC;
1218ded845a7SHarry Morris 	else if (channel >= 14)
1219ded845a7SHarry Morris 		txcalval = 0xAD;
1220ded845a7SHarry Morris 	else if (channel >= 12)
1221ded845a7SHarry Morris 		txcalval = 0xAE;
1222ded845a7SHarry Morris 	else
1223ded845a7SHarry Morris 		txcalval = 0xAF;
1224ded845a7SHarry Morris 
1225ded845a7SHarry Morris 	return tdme_setsfr_request_sync(
1226ded845a7SHarry Morris 		1,
1227ded845a7SHarry Morris 		CA8210_SFR_LOTXCAL,
1228ded845a7SHarry Morris 		txcalval,
1229ded845a7SHarry Morris 		device_ref
1230ded845a7SHarry Morris 	);  /* LO Tx Cal */
1231ded845a7SHarry Morris }
1232ded845a7SHarry Morris 
1233ded845a7SHarry Morris /**
1234ded845a7SHarry Morris  * tdme_checkpibattribute() - Checks Attribute Values that are not checked in
1235ded845a7SHarry Morris  *                            MAC
1236ded845a7SHarry Morris  * @pib_attribute:        Attribute Number
1237ded845a7SHarry Morris  * @pib_attribute_length: Attribute length
1238ded845a7SHarry Morris  * @pib_attribute_value:  Pointer to Attribute Value
1239ded845a7SHarry Morris  *
1240ded845a7SHarry Morris  * Return: 802.15.4 status code of checks
1241ded845a7SHarry Morris  */
tdme_checkpibattribute(u8 pib_attribute,u8 pib_attribute_length,const void * pib_attribute_value)1242ded845a7SHarry Morris static u8 tdme_checkpibattribute(
1243ded845a7SHarry Morris 	u8            pib_attribute,
1244ded845a7SHarry Morris 	u8            pib_attribute_length,
1245ded845a7SHarry Morris 	const void   *pib_attribute_value
1246ded845a7SHarry Morris )
1247ded845a7SHarry Morris {
1248ab191c1cSMiquel Raynal 	u8 status = IEEE802154_SUCCESS;
1249ded845a7SHarry Morris 	u8 value;
1250ded845a7SHarry Morris 
1251ded845a7SHarry Morris 	value  = *((u8 *)pib_attribute_value);
1252ded845a7SHarry Morris 
1253ded845a7SHarry Morris 	switch (pib_attribute) {
1254ded845a7SHarry Morris 	/* PHY */
1255ded845a7SHarry Morris 	case PHY_TRANSMIT_POWER:
1256ded845a7SHarry Morris 		if (value > 0x3F)
1257ab191c1cSMiquel Raynal 			status = IEEE802154_INVALID_PARAMETER;
1258ded845a7SHarry Morris 		break;
1259ded845a7SHarry Morris 	case PHY_CCA_MODE:
1260ded845a7SHarry Morris 		if (value > 0x03)
1261ab191c1cSMiquel Raynal 			status = IEEE802154_INVALID_PARAMETER;
1262ded845a7SHarry Morris 		break;
1263ded845a7SHarry Morris 	/* MAC */
1264ded845a7SHarry Morris 	case MAC_BATT_LIFE_EXT_PERIODS:
1265dc1281e1SStefan Schmidt 		if (value < 6 || value > 41)
1266ab191c1cSMiquel Raynal 			status = IEEE802154_INVALID_PARAMETER;
1267ded845a7SHarry Morris 		break;
1268ded845a7SHarry Morris 	case MAC_BEACON_PAYLOAD:
1269ded845a7SHarry Morris 		if (pib_attribute_length > MAX_BEACON_PAYLOAD_LENGTH)
1270ab191c1cSMiquel Raynal 			status = IEEE802154_INVALID_PARAMETER;
1271ded845a7SHarry Morris 		break;
1272ded845a7SHarry Morris 	case MAC_BEACON_PAYLOAD_LENGTH:
1273ded845a7SHarry Morris 		if (value > MAX_BEACON_PAYLOAD_LENGTH)
1274ab191c1cSMiquel Raynal 			status = IEEE802154_INVALID_PARAMETER;
1275ded845a7SHarry Morris 		break;
1276ded845a7SHarry Morris 	case MAC_BEACON_ORDER:
1277ded845a7SHarry Morris 		if (value > 15)
1278ab191c1cSMiquel Raynal 			status = IEEE802154_INVALID_PARAMETER;
1279ded845a7SHarry Morris 		break;
1280ded845a7SHarry Morris 	case MAC_MAX_BE:
1281dc1281e1SStefan Schmidt 		if (value < 3 || value > 8)
1282ab191c1cSMiquel Raynal 			status = IEEE802154_INVALID_PARAMETER;
1283ded845a7SHarry Morris 		break;
1284ded845a7SHarry Morris 	case MAC_MAX_CSMA_BACKOFFS:
1285ded845a7SHarry Morris 		if (value > 5)
1286ab191c1cSMiquel Raynal 			status = IEEE802154_INVALID_PARAMETER;
1287ded845a7SHarry Morris 		break;
1288ded845a7SHarry Morris 	case MAC_MAX_FRAME_RETRIES:
1289ded845a7SHarry Morris 		if (value > 7)
1290ab191c1cSMiquel Raynal 			status = IEEE802154_INVALID_PARAMETER;
1291ded845a7SHarry Morris 		break;
1292ded845a7SHarry Morris 	case MAC_MIN_BE:
1293ded845a7SHarry Morris 		if (value > 8)
1294ab191c1cSMiquel Raynal 			status = IEEE802154_INVALID_PARAMETER;
1295ded845a7SHarry Morris 		break;
1296ded845a7SHarry Morris 	case MAC_RESPONSE_WAIT_TIME:
1297dc1281e1SStefan Schmidt 		if (value < 2 || value > 64)
1298ab191c1cSMiquel Raynal 			status = IEEE802154_INVALID_PARAMETER;
1299ded845a7SHarry Morris 		break;
1300ded845a7SHarry Morris 	case MAC_SUPERFRAME_ORDER:
1301ded845a7SHarry Morris 		if (value > 15)
1302ab191c1cSMiquel Raynal 			status = IEEE802154_INVALID_PARAMETER;
1303ded845a7SHarry Morris 		break;
1304ded845a7SHarry Morris 	/* boolean */
1305ded845a7SHarry Morris 	case MAC_ASSOCIATED_PAN_COORD:
1306ded845a7SHarry Morris 	case MAC_ASSOCIATION_PERMIT:
1307ded845a7SHarry Morris 	case MAC_AUTO_REQUEST:
1308ded845a7SHarry Morris 	case MAC_BATT_LIFE_EXT:
1309ded845a7SHarry Morris 	case MAC_GTS_PERMIT:
1310ded845a7SHarry Morris 	case MAC_PROMISCUOUS_MODE:
1311ded845a7SHarry Morris 	case MAC_RX_ON_WHEN_IDLE:
1312ded845a7SHarry Morris 	case MAC_SECURITY_ENABLED:
1313ded845a7SHarry Morris 		if (value > 1)
1314ab191c1cSMiquel Raynal 			status = IEEE802154_INVALID_PARAMETER;
1315ded845a7SHarry Morris 		break;
1316ded845a7SHarry Morris 	/* MAC SEC */
1317ded845a7SHarry Morris 	case MAC_AUTO_REQUEST_SECURITY_LEVEL:
1318ded845a7SHarry Morris 		if (value > 7)
1319ab191c1cSMiquel Raynal 			status = IEEE802154_INVALID_PARAMETER;
1320ded845a7SHarry Morris 		break;
1321ded845a7SHarry Morris 	case MAC_AUTO_REQUEST_KEY_ID_MODE:
1322ded845a7SHarry Morris 		if (value > 3)
1323ab191c1cSMiquel Raynal 			status = IEEE802154_INVALID_PARAMETER;
1324ded845a7SHarry Morris 		break;
1325ded845a7SHarry Morris 	default:
1326ded845a7SHarry Morris 		break;
1327ded845a7SHarry Morris 	}
1328ded845a7SHarry Morris 
1329ded845a7SHarry Morris 	return status;
1330ded845a7SHarry Morris }
1331ded845a7SHarry Morris 
1332ded845a7SHarry Morris /**
1333ded845a7SHarry Morris  * tdme_settxpower() - Sets the tx power for MLME_SET phyTransmitPower
1334ded845a7SHarry Morris  * @txp:        Transmit Power
1335ded845a7SHarry Morris  * @device_ref: Nondescript pointer to target device
1336ded845a7SHarry Morris  *
1337ded845a7SHarry Morris  * Normalised to 802.15.4 Definition (6-bit, signed):
1338ded845a7SHarry Morris  * Bit 7-6: not used
1339ded845a7SHarry Morris  * Bit 5-0: tx power (-32 - +31 dB)
1340ded845a7SHarry Morris  *
1341ded845a7SHarry Morris  * Return: 802.15.4 status code of api calls
1342ded845a7SHarry Morris  */
tdme_settxpower(u8 txp,void * device_ref)1343ded845a7SHarry Morris static u8 tdme_settxpower(u8 txp, void *device_ref)
1344ded845a7SHarry Morris {
1345ded845a7SHarry Morris 	u8 status;
1346ded845a7SHarry Morris 	s8 txp_val;
1347ded845a7SHarry Morris 	u8 txp_ext;
1348ded845a7SHarry Morris 	union pa_cfg_sfr pa_cfg_val;
1349ded845a7SHarry Morris 
1350ded845a7SHarry Morris 	/* extend from 6 to 8 bit */
1351ded845a7SHarry Morris 	txp_ext = 0x3F & txp;
1352ded845a7SHarry Morris 	if (txp_ext & 0x20)
1353ded845a7SHarry Morris 		txp_ext += 0xC0;
1354ded845a7SHarry Morris 	txp_val = (s8)txp_ext;
1355ded845a7SHarry Morris 
1356ded845a7SHarry Morris 	if (CA8210_MAC_MPW) {
1357ded845a7SHarry Morris 		if (txp_val > 0) {
1358ded845a7SHarry Morris 			/* 8 dBm: ptrim = 5, itrim = +3 => +4 dBm */
1359ded845a7SHarry Morris 			pa_cfg_val.bias_current_trim     = 3;
1360ded845a7SHarry Morris 			pa_cfg_val.buffer_capacitor_trim = 5;
1361ded845a7SHarry Morris 			pa_cfg_val.boost                 = 1;
1362ded845a7SHarry Morris 		} else {
1363ded845a7SHarry Morris 			/* 0 dBm: ptrim = 7, itrim = +3 => -6 dBm */
1364ded845a7SHarry Morris 			pa_cfg_val.bias_current_trim     = 3;
1365ded845a7SHarry Morris 			pa_cfg_val.buffer_capacitor_trim = 7;
1366ded845a7SHarry Morris 			pa_cfg_val.boost                 = 0;
1367ded845a7SHarry Morris 		}
1368ded845a7SHarry Morris 		/* write PACFG */
1369ded845a7SHarry Morris 		status = tdme_setsfr_request_sync(
1370ded845a7SHarry Morris 			0,
1371ded845a7SHarry Morris 			CA8210_SFR_PACFG,
1372ded845a7SHarry Morris 			pa_cfg_val.paib,
1373ded845a7SHarry Morris 			device_ref
1374ded845a7SHarry Morris 		);
1375ded845a7SHarry Morris 	} else {
1376ded845a7SHarry Morris 		/* Look-Up Table for Setting Current and Frequency Trim values
1377ded845a7SHarry Morris 		 * for desired Output Power
1378ded845a7SHarry Morris 		 */
1379ded845a7SHarry Morris 		if (txp_val > 8) {
1380ded845a7SHarry Morris 			pa_cfg_val.paib = 0x3F;
1381ded845a7SHarry Morris 		} else if (txp_val == 8) {
1382ded845a7SHarry Morris 			pa_cfg_val.paib = 0x32;
1383ded845a7SHarry Morris 		} else if (txp_val == 7) {
1384ded845a7SHarry Morris 			pa_cfg_val.paib = 0x22;
1385ded845a7SHarry Morris 		} else if (txp_val == 6) {
1386ded845a7SHarry Morris 			pa_cfg_val.paib = 0x18;
1387ded845a7SHarry Morris 		} else if (txp_val == 5) {
1388ded845a7SHarry Morris 			pa_cfg_val.paib = 0x10;
1389ded845a7SHarry Morris 		} else if (txp_val == 4) {
1390ded845a7SHarry Morris 			pa_cfg_val.paib = 0x0C;
1391ded845a7SHarry Morris 		} else if (txp_val == 3) {
1392ded845a7SHarry Morris 			pa_cfg_val.paib = 0x08;
1393ded845a7SHarry Morris 		} else if (txp_val == 2) {
1394ded845a7SHarry Morris 			pa_cfg_val.paib = 0x05;
1395ded845a7SHarry Morris 		} else if (txp_val == 1) {
1396ded845a7SHarry Morris 			pa_cfg_val.paib = 0x03;
1397ded845a7SHarry Morris 		} else if (txp_val == 0) {
1398ded845a7SHarry Morris 			pa_cfg_val.paib = 0x01;
1399ded845a7SHarry Morris 		} else { /* < 0 */
1400ded845a7SHarry Morris 			pa_cfg_val.paib = 0x00;
1401ded845a7SHarry Morris 		}
1402ded845a7SHarry Morris 		/* write PACFGIB */
1403ded845a7SHarry Morris 		status = tdme_setsfr_request_sync(
1404ded845a7SHarry Morris 			0,
1405ded845a7SHarry Morris 			CA8210_SFR_PACFGIB,
1406ded845a7SHarry Morris 			pa_cfg_val.paib,
1407ded845a7SHarry Morris 			device_ref
1408ded845a7SHarry Morris 		);
1409ded845a7SHarry Morris 	}
1410ded845a7SHarry Morris 
1411ded845a7SHarry Morris 	return status;
1412ded845a7SHarry Morris }
1413ded845a7SHarry Morris 
1414ded845a7SHarry Morris /**
1415ded845a7SHarry Morris  * mcps_data_request() - mcps_data_request (Send Data) according to API Spec
1416ded845a7SHarry Morris  * @src_addr_mode:    Source Addressing Mode
1417ded845a7SHarry Morris  * @dst_address_mode: Destination Addressing Mode
1418ded845a7SHarry Morris  * @dst_pan_id:       Destination PAN ID
1419ded845a7SHarry Morris  * @dst_addr:         Pointer to Destination Address
1420ded845a7SHarry Morris  * @msdu_length:      length of Data
1421ded845a7SHarry Morris  * @msdu:             Pointer to Data
1422ded845a7SHarry Morris  * @msdu_handle:      Handle of Data
1423ded845a7SHarry Morris  * @tx_options:       Tx Options Bit Field
1424ded845a7SHarry Morris  * @security:         Pointer to Security Structure or NULL
1425ded845a7SHarry Morris  * @device_ref:       Nondescript pointer to target device
1426ded845a7SHarry Morris  *
1427ded845a7SHarry Morris  * Return: 802.15.4 status code of action
1428ded845a7SHarry Morris  */
mcps_data_request(u8 src_addr_mode,u8 dst_address_mode,u16 dst_pan_id,union macaddr * dst_addr,u8 msdu_length,u8 * msdu,u8 msdu_handle,u8 tx_options,struct secspec * security,void * device_ref)1429ded845a7SHarry Morris static u8 mcps_data_request(
1430ded845a7SHarry Morris 	u8               src_addr_mode,
1431ded845a7SHarry Morris 	u8               dst_address_mode,
1432ded845a7SHarry Morris 	u16              dst_pan_id,
1433ded845a7SHarry Morris 	union macaddr   *dst_addr,
1434ded845a7SHarry Morris 	u8               msdu_length,
1435ded845a7SHarry Morris 	u8              *msdu,
1436ded845a7SHarry Morris 	u8               msdu_handle,
1437ded845a7SHarry Morris 	u8               tx_options,
1438ded845a7SHarry Morris 	struct secspec  *security,
1439ded845a7SHarry Morris 	void            *device_ref
1440ded845a7SHarry Morris )
1441ded845a7SHarry Morris {
1442ded845a7SHarry Morris 	struct secspec *psec;
1443ded845a7SHarry Morris 	struct mac_message command;
1444ded845a7SHarry Morris 
1445ded845a7SHarry Morris 	command.command_id = SPI_MCPS_DATA_REQUEST;
1446ded845a7SHarry Morris 	command.pdata.data_req.src_addr_mode = src_addr_mode;
1447ded845a7SHarry Morris 	command.pdata.data_req.dst.mode = dst_address_mode;
1448ded845a7SHarry Morris 	if (dst_address_mode != MAC_MODE_NO_ADDR) {
1449ded845a7SHarry Morris 		command.pdata.data_req.dst.pan_id[0] = LS_BYTE(dst_pan_id);
1450ded845a7SHarry Morris 		command.pdata.data_req.dst.pan_id[1] = MS_BYTE(dst_pan_id);
1451ded845a7SHarry Morris 		if (dst_address_mode == MAC_MODE_SHORT_ADDR) {
1452ded845a7SHarry Morris 			command.pdata.data_req.dst.address[0] = LS_BYTE(
1453ded845a7SHarry Morris 				dst_addr->short_address
1454ded845a7SHarry Morris 			);
1455ded845a7SHarry Morris 			command.pdata.data_req.dst.address[1] = MS_BYTE(
1456ded845a7SHarry Morris 				dst_addr->short_address
1457ded845a7SHarry Morris 			);
1458ded845a7SHarry Morris 		} else {   /* MAC_MODE_LONG_ADDR*/
1459ded845a7SHarry Morris 			memcpy(
1460ded845a7SHarry Morris 				command.pdata.data_req.dst.address,
1461ded845a7SHarry Morris 				dst_addr->ieee_address,
1462ded845a7SHarry Morris 				8
1463ded845a7SHarry Morris 			);
1464ded845a7SHarry Morris 		}
1465ded845a7SHarry Morris 	}
1466ded845a7SHarry Morris 	command.pdata.data_req.msdu_length = msdu_length;
1467ded845a7SHarry Morris 	command.pdata.data_req.msdu_handle = msdu_handle;
1468ded845a7SHarry Morris 	command.pdata.data_req.tx_options = tx_options;
1469ded845a7SHarry Morris 	memcpy(command.pdata.data_req.msdu, msdu, msdu_length);
1470ded845a7SHarry Morris 	psec = (struct secspec *)(command.pdata.data_req.msdu + msdu_length);
1471ded845a7SHarry Morris 	command.length = sizeof(struct mcps_data_request_pset) -
1472ded845a7SHarry Morris 		MAX_DATA_SIZE + msdu_length;
1473dc1281e1SStefan Schmidt 	if (!security || security->security_level == 0) {
1474ded845a7SHarry Morris 		psec->security_level = 0;
1475ded845a7SHarry Morris 		command.length += 1;
1476ded845a7SHarry Morris 	} else {
1477ded845a7SHarry Morris 		*psec = *security;
1478ded845a7SHarry Morris 		command.length += sizeof(struct secspec);
1479ded845a7SHarry Morris 	}
1480ded845a7SHarry Morris 
1481ded845a7SHarry Morris 	if (ca8210_spi_transfer(device_ref, &command.command_id,
1482ded845a7SHarry Morris 				command.length + 2))
1483ab191c1cSMiquel Raynal 		return IEEE802154_SYSTEM_ERROR;
1484ded845a7SHarry Morris 
1485ab191c1cSMiquel Raynal 	return IEEE802154_SUCCESS;
1486ded845a7SHarry Morris }
1487ded845a7SHarry Morris 
1488ded845a7SHarry Morris /**
1489ded845a7SHarry Morris  * mlme_reset_request_sync() - MLME_RESET_request/confirm according to API Spec
1490ded845a7SHarry Morris  * @set_default_pib: Set defaults in PIB
1491ded845a7SHarry Morris  * @device_ref:      Nondescript pointer to target device
1492ded845a7SHarry Morris  *
1493ded845a7SHarry Morris  * Return: 802.15.4 status code of MLME-RESET.confirm
1494ded845a7SHarry Morris  */
mlme_reset_request_sync(u8 set_default_pib,void * device_ref)1495ded845a7SHarry Morris static u8 mlme_reset_request_sync(
1496ded845a7SHarry Morris 	u8    set_default_pib,
1497ded845a7SHarry Morris 	void *device_ref
1498ded845a7SHarry Morris )
1499ded845a7SHarry Morris {
1500ded845a7SHarry Morris 	u8 status;
1501ded845a7SHarry Morris 	struct mac_message command, response;
1502ded845a7SHarry Morris 	struct spi_device *spi = device_ref;
1503ded845a7SHarry Morris 
1504ded845a7SHarry Morris 	command.command_id = SPI_MLME_RESET_REQUEST;
1505ded845a7SHarry Morris 	command.length = 1;
1506ded845a7SHarry Morris 	command.pdata.u8param = set_default_pib;
1507ded845a7SHarry Morris 
1508ded845a7SHarry Morris 	if (cascoda_api_downstream(
1509ded845a7SHarry Morris 		&command.command_id,
1510ded845a7SHarry Morris 		command.length + 2,
1511ded845a7SHarry Morris 		&response.command_id,
1512ded845a7SHarry Morris 		device_ref)) {
1513ded845a7SHarry Morris 		dev_err(&spi->dev, "cascoda_api_downstream failed\n");
1514ab191c1cSMiquel Raynal 		return IEEE802154_SYSTEM_ERROR;
1515ded845a7SHarry Morris 	}
1516ded845a7SHarry Morris 
1517ded845a7SHarry Morris 	if (response.command_id != SPI_MLME_RESET_CONFIRM)
1518ab191c1cSMiquel Raynal 		return IEEE802154_SYSTEM_ERROR;
1519ded845a7SHarry Morris 
1520ded845a7SHarry Morris 	status = response.pdata.status;
1521ded845a7SHarry Morris 
1522ded845a7SHarry Morris 	/* reset COORD Bit for Channel Filtering as Coordinator */
1523dc1281e1SStefan Schmidt 	if (CA8210_MAC_WORKAROUNDS && set_default_pib && !status) {
1524ded845a7SHarry Morris 		status = tdme_setsfr_request_sync(
1525ded845a7SHarry Morris 			0,
1526ded845a7SHarry Morris 			CA8210_SFR_MACCON,
1527ded845a7SHarry Morris 			0,
1528ded845a7SHarry Morris 			device_ref
1529ded845a7SHarry Morris 		);
1530ded845a7SHarry Morris 	}
1531ded845a7SHarry Morris 
1532ded845a7SHarry Morris 	return status;
1533ded845a7SHarry Morris }
1534ded845a7SHarry Morris 
1535ded845a7SHarry Morris /**
1536ded845a7SHarry Morris  * mlme_set_request_sync() - MLME_SET_request/confirm according to API Spec
1537ded845a7SHarry Morris  * @pib_attribute:        Attribute Number
1538ded845a7SHarry Morris  * @pib_attribute_index:  Index within Attribute if an Array
1539ded845a7SHarry Morris  * @pib_attribute_length: Attribute length
1540ded845a7SHarry Morris  * @pib_attribute_value:  Pointer to Attribute Value
1541ded845a7SHarry Morris  * @device_ref:           Nondescript pointer to target device
1542ded845a7SHarry Morris  *
1543ded845a7SHarry Morris  * Return: 802.15.4 status code of MLME-SET.confirm
1544ded845a7SHarry Morris  */
mlme_set_request_sync(u8 pib_attribute,u8 pib_attribute_index,u8 pib_attribute_length,const void * pib_attribute_value,void * device_ref)1545ded845a7SHarry Morris static u8 mlme_set_request_sync(
1546ded845a7SHarry Morris 	u8            pib_attribute,
1547ded845a7SHarry Morris 	u8            pib_attribute_index,
1548ded845a7SHarry Morris 	u8            pib_attribute_length,
1549ded845a7SHarry Morris 	const void   *pib_attribute_value,
1550ded845a7SHarry Morris 	void         *device_ref
1551ded845a7SHarry Morris )
1552ded845a7SHarry Morris {
1553ded845a7SHarry Morris 	u8 status;
1554ded845a7SHarry Morris 	struct mac_message command, response;
1555ded845a7SHarry Morris 
1556ded845a7SHarry Morris 	/* pre-check the validity of pib_attribute values that are not checked
1557ded845a7SHarry Morris 	 * in MAC
1558ded845a7SHarry Morris 	 */
1559ded845a7SHarry Morris 	if (tdme_checkpibattribute(
1560ded845a7SHarry Morris 		pib_attribute, pib_attribute_length, pib_attribute_value)) {
1561ab191c1cSMiquel Raynal 		return IEEE802154_INVALID_PARAMETER;
1562ded845a7SHarry Morris 	}
1563ded845a7SHarry Morris 
1564ded845a7SHarry Morris 	if (pib_attribute == PHY_CURRENT_CHANNEL) {
1565ded845a7SHarry Morris 		status = tdme_channelinit(
1566ded845a7SHarry Morris 			*((u8 *)pib_attribute_value),
1567ded845a7SHarry Morris 			device_ref
1568ded845a7SHarry Morris 		);
1569ded845a7SHarry Morris 		if (status)
1570ded845a7SHarry Morris 			return status;
1571ded845a7SHarry Morris 	}
1572ded845a7SHarry Morris 
1573ded845a7SHarry Morris 	if (pib_attribute == PHY_TRANSMIT_POWER) {
1574ded845a7SHarry Morris 		return tdme_settxpower(
1575ded845a7SHarry Morris 			*((u8 *)pib_attribute_value),
1576ded845a7SHarry Morris 			device_ref
1577ded845a7SHarry Morris 		);
1578ded845a7SHarry Morris 	}
1579ded845a7SHarry Morris 
1580ded845a7SHarry Morris 	command.command_id = SPI_MLME_SET_REQUEST;
1581ded845a7SHarry Morris 	command.length = sizeof(struct mlme_set_request_pset) -
1582ded845a7SHarry Morris 		MAX_ATTRIBUTE_SIZE + pib_attribute_length;
1583ded845a7SHarry Morris 	command.pdata.set_req.pib_attribute = pib_attribute;
1584ded845a7SHarry Morris 	command.pdata.set_req.pib_attribute_index = pib_attribute_index;
1585ded845a7SHarry Morris 	command.pdata.set_req.pib_attribute_length = pib_attribute_length;
1586ded845a7SHarry Morris 	memcpy(
1587ded845a7SHarry Morris 		command.pdata.set_req.pib_attribute_value,
1588ded845a7SHarry Morris 		pib_attribute_value,
1589ded845a7SHarry Morris 		pib_attribute_length
1590ded845a7SHarry Morris 	);
1591ded845a7SHarry Morris 
1592ded845a7SHarry Morris 	if (cascoda_api_downstream(
1593ded845a7SHarry Morris 		&command.command_id,
1594ded845a7SHarry Morris 		command.length + 2,
1595ded845a7SHarry Morris 		&response.command_id,
1596ded845a7SHarry Morris 		device_ref)) {
1597ab191c1cSMiquel Raynal 		return IEEE802154_SYSTEM_ERROR;
1598ded845a7SHarry Morris 	}
1599ded845a7SHarry Morris 
1600ded845a7SHarry Morris 	if (response.command_id != SPI_MLME_SET_CONFIRM)
1601ab191c1cSMiquel Raynal 		return IEEE802154_SYSTEM_ERROR;
1602ded845a7SHarry Morris 
1603ded845a7SHarry Morris 	return response.pdata.status;
1604ded845a7SHarry Morris }
1605ded845a7SHarry Morris 
1606ded845a7SHarry Morris /**
1607ded845a7SHarry Morris  * hwme_set_request_sync() - HWME_SET_request/confirm according to API Spec
1608ded845a7SHarry Morris  * @hw_attribute:        Attribute Number
1609ded845a7SHarry Morris  * @hw_attribute_length: Attribute length
1610ded845a7SHarry Morris  * @hw_attribute_value:  Pointer to Attribute Value
1611ded845a7SHarry Morris  * @device_ref:          Nondescript pointer to target device
1612ded845a7SHarry Morris  *
1613ded845a7SHarry Morris  * Return: 802.15.4 status code of HWME-SET.confirm
1614ded845a7SHarry Morris  */
hwme_set_request_sync(u8 hw_attribute,u8 hw_attribute_length,u8 * hw_attribute_value,void * device_ref)1615ded845a7SHarry Morris static u8 hwme_set_request_sync(
1616ded845a7SHarry Morris 	u8           hw_attribute,
1617ded845a7SHarry Morris 	u8           hw_attribute_length,
1618ded845a7SHarry Morris 	u8          *hw_attribute_value,
1619ded845a7SHarry Morris 	void        *device_ref
1620ded845a7SHarry Morris )
1621ded845a7SHarry Morris {
1622ded845a7SHarry Morris 	struct mac_message command, response;
1623ded845a7SHarry Morris 
1624ded845a7SHarry Morris 	command.command_id = SPI_HWME_SET_REQUEST;
1625ded845a7SHarry Morris 	command.length = 2 + hw_attribute_length;
1626ded845a7SHarry Morris 	command.pdata.hwme_set_req.hw_attribute = hw_attribute;
1627ded845a7SHarry Morris 	command.pdata.hwme_set_req.hw_attribute_length = hw_attribute_length;
1628ded845a7SHarry Morris 	memcpy(
1629ded845a7SHarry Morris 		command.pdata.hwme_set_req.hw_attribute_value,
1630ded845a7SHarry Morris 		hw_attribute_value,
1631ded845a7SHarry Morris 		hw_attribute_length
1632ded845a7SHarry Morris 	);
1633ded845a7SHarry Morris 
1634ded845a7SHarry Morris 	if (cascoda_api_downstream(
1635ded845a7SHarry Morris 		&command.command_id,
1636ded845a7SHarry Morris 		command.length + 2,
1637ded845a7SHarry Morris 		&response.command_id,
1638ded845a7SHarry Morris 		device_ref)) {
1639ab191c1cSMiquel Raynal 		return IEEE802154_SYSTEM_ERROR;
1640ded845a7SHarry Morris 	}
1641ded845a7SHarry Morris 
1642ded845a7SHarry Morris 	if (response.command_id != SPI_HWME_SET_CONFIRM)
1643ab191c1cSMiquel Raynal 		return IEEE802154_SYSTEM_ERROR;
1644ded845a7SHarry Morris 
1645ded845a7SHarry Morris 	return response.pdata.hwme_set_cnf.status;
1646ded845a7SHarry Morris }
1647ded845a7SHarry Morris 
1648ded845a7SHarry Morris /**
1649ded845a7SHarry Morris  * hwme_get_request_sync() - HWME_GET_request/confirm according to API Spec
1650ded845a7SHarry Morris  * @hw_attribute:        Attribute Number
1651ded845a7SHarry Morris  * @hw_attribute_length: Attribute length
1652ded845a7SHarry Morris  * @hw_attribute_value:  Pointer to Attribute Value
1653ded845a7SHarry Morris  * @device_ref:          Nondescript pointer to target device
1654ded845a7SHarry Morris  *
1655ded845a7SHarry Morris  * Return: 802.15.4 status code of HWME-GET.confirm
1656ded845a7SHarry Morris  */
hwme_get_request_sync(u8 hw_attribute,u8 * hw_attribute_length,u8 * hw_attribute_value,void * device_ref)1657ded845a7SHarry Morris static u8 hwme_get_request_sync(
1658ded845a7SHarry Morris 	u8           hw_attribute,
1659ded845a7SHarry Morris 	u8          *hw_attribute_length,
1660ded845a7SHarry Morris 	u8          *hw_attribute_value,
1661ded845a7SHarry Morris 	void        *device_ref
1662ded845a7SHarry Morris )
1663ded845a7SHarry Morris {
1664ded845a7SHarry Morris 	struct mac_message command, response;
1665ded845a7SHarry Morris 
1666ded845a7SHarry Morris 	command.command_id = SPI_HWME_GET_REQUEST;
1667ded845a7SHarry Morris 	command.length = 1;
1668ded845a7SHarry Morris 	command.pdata.hwme_get_req.hw_attribute = hw_attribute;
1669ded845a7SHarry Morris 
1670ded845a7SHarry Morris 	if (cascoda_api_downstream(
1671ded845a7SHarry Morris 		&command.command_id,
1672ded845a7SHarry Morris 		command.length + 2,
1673ded845a7SHarry Morris 		&response.command_id,
1674ded845a7SHarry Morris 		device_ref)) {
1675ab191c1cSMiquel Raynal 		return IEEE802154_SYSTEM_ERROR;
1676ded845a7SHarry Morris 	}
1677ded845a7SHarry Morris 
1678ded845a7SHarry Morris 	if (response.command_id != SPI_HWME_GET_CONFIRM)
1679ab191c1cSMiquel Raynal 		return IEEE802154_SYSTEM_ERROR;
1680ded845a7SHarry Morris 
1681ab191c1cSMiquel Raynal 	if (response.pdata.hwme_get_cnf.status == IEEE802154_SUCCESS) {
1682ded845a7SHarry Morris 		*hw_attribute_length =
1683ded845a7SHarry Morris 			response.pdata.hwme_get_cnf.hw_attribute_length;
1684ded845a7SHarry Morris 		memcpy(
1685ded845a7SHarry Morris 			hw_attribute_value,
1686ded845a7SHarry Morris 			response.pdata.hwme_get_cnf.hw_attribute_value,
1687ded845a7SHarry Morris 			*hw_attribute_length
1688ded845a7SHarry Morris 		);
1689ded845a7SHarry Morris 	}
1690ded845a7SHarry Morris 
1691ded845a7SHarry Morris 	return response.pdata.hwme_get_cnf.status;
1692ded845a7SHarry Morris }
1693ded845a7SHarry Morris 
1694ded845a7SHarry Morris /* Network driver operation */
1695ded845a7SHarry Morris 
1696ded845a7SHarry Morris /**
1697ded845a7SHarry Morris  * ca8210_async_xmit_complete() - Called to announce that an asynchronous
1698ded845a7SHarry Morris  *                                transmission has finished
1699ded845a7SHarry Morris  * @hw:          ieee802154_hw of ca8210 that has finished exchange
1700ded845a7SHarry Morris  * @msduhandle:  Identifier of transmission that has completed
1701ded845a7SHarry Morris  * @status:      Returned 802.15.4 status code of the transmission
1702ded845a7SHarry Morris  *
1703ded845a7SHarry Morris  * Return: 0 or linux error code
1704ded845a7SHarry Morris  */
ca8210_async_xmit_complete(struct ieee802154_hw * hw,u8 msduhandle,u8 status)1705ded845a7SHarry Morris static int ca8210_async_xmit_complete(
1706ded845a7SHarry Morris 	struct ieee802154_hw  *hw,
1707ded845a7SHarry Morris 	u8                     msduhandle,
1708ded845a7SHarry Morris 	u8                     status)
1709ded845a7SHarry Morris {
1710ded845a7SHarry Morris 	struct ca8210_priv *priv = hw->priv;
1711ded845a7SHarry Morris 
1712ded845a7SHarry Morris 	if (priv->nextmsduhandle != msduhandle) {
1713ded845a7SHarry Morris 		dev_err(
1714ded845a7SHarry Morris 			&priv->spi->dev,
1715ded845a7SHarry Morris 			"Unexpected msdu_handle on data confirm, Expected %d, got %d\n",
1716ded845a7SHarry Morris 			priv->nextmsduhandle,
1717ded845a7SHarry Morris 			msduhandle
1718ded845a7SHarry Morris 		);
1719ded845a7SHarry Morris 		return -EIO;
1720ded845a7SHarry Morris 	}
1721ded845a7SHarry Morris 
1722ded845a7SHarry Morris 	priv->async_tx_pending = false;
1723ded845a7SHarry Morris 	priv->nextmsduhandle++;
1724ded845a7SHarry Morris 
1725ded845a7SHarry Morris 	if (status) {
1726ded845a7SHarry Morris 		dev_err(
1727ded845a7SHarry Morris 			&priv->spi->dev,
1728ded845a7SHarry Morris 			"Link transmission unsuccessful, status = %d\n",
1729ded845a7SHarry Morris 			status
1730ded845a7SHarry Morris 		);
1731ab191c1cSMiquel Raynal 		if (status != IEEE802154_TRANSACTION_OVERFLOW) {
1732510ce586SMiquel Raynal 			ieee802154_xmit_error(priv->hw, priv->tx_skb, status);
1733ded845a7SHarry Morris 			return 0;
1734ded845a7SHarry Morris 		}
1735ded845a7SHarry Morris 	}
1736ded845a7SHarry Morris 	ieee802154_xmit_complete(priv->hw, priv->tx_skb, true);
1737ded845a7SHarry Morris 
1738ded845a7SHarry Morris 	return 0;
1739ded845a7SHarry Morris }
1740ded845a7SHarry Morris 
1741ded845a7SHarry Morris /**
1742ded845a7SHarry Morris  * ca8210_skb_rx() - Contructs a properly framed socket buffer from a received
1743ded845a7SHarry Morris  *                   MCPS_DATA_indication
1744ded845a7SHarry Morris  * @hw:        ieee802154_hw that MCPS_DATA_indication was received by
1745ded845a7SHarry Morris  * @len:       length of MCPS_DATA_indication
1746ded845a7SHarry Morris  * @data_ind:  Octet array of MCPS_DATA_indication
1747ded845a7SHarry Morris  *
1748ded845a7SHarry Morris  * Called by the spi driver whenever a SAP command is received, this function
1749ded845a7SHarry Morris  * will ascertain whether the command is of interest to the network driver and
1750ded845a7SHarry Morris  * take necessary action.
1751ded845a7SHarry Morris  *
1752ded845a7SHarry Morris  * Return: 0 or linux error code
1753ded845a7SHarry Morris  */
ca8210_skb_rx(struct ieee802154_hw * hw,size_t len,u8 * data_ind)1754ded845a7SHarry Morris static int ca8210_skb_rx(
1755ded845a7SHarry Morris 	struct ieee802154_hw  *hw,
1756ded845a7SHarry Morris 	size_t                 len,
1757ded845a7SHarry Morris 	u8                    *data_ind
1758ded845a7SHarry Morris )
1759ded845a7SHarry Morris {
1760ded845a7SHarry Morris 	struct ieee802154_hdr hdr;
1761ded845a7SHarry Morris 	int msdulen;
1762ded845a7SHarry Morris 	int hlen;
1763ded845a7SHarry Morris 	u8 mpdulinkquality = data_ind[23];
1764ded845a7SHarry Morris 	struct sk_buff *skb;
1765ded845a7SHarry Morris 	struct ca8210_priv *priv = hw->priv;
1766ded845a7SHarry Morris 
1767ded845a7SHarry Morris 	/* Allocate mtu size buffer for every rx packet */
1768ded845a7SHarry Morris 	skb = dev_alloc_skb(IEEE802154_MTU + sizeof(hdr));
17693a21bf58SMarkus Elfring 	if (!skb)
1770ded845a7SHarry Morris 		return -ENOMEM;
17713a21bf58SMarkus Elfring 
1772ded845a7SHarry Morris 	skb_reserve(skb, sizeof(hdr));
1773ded845a7SHarry Morris 
1774ded845a7SHarry Morris 	msdulen = data_ind[22]; /* msdu_length */
1775ded845a7SHarry Morris 	if (msdulen > IEEE802154_MTU) {
1776ded845a7SHarry Morris 		dev_err(
1777ded845a7SHarry Morris 			&priv->spi->dev,
1778ded845a7SHarry Morris 			"received erroneously large msdu length!\n"
1779ded845a7SHarry Morris 		);
1780ded845a7SHarry Morris 		kfree_skb(skb);
1781ded845a7SHarry Morris 		return -EMSGSIZE;
1782ded845a7SHarry Morris 	}
1783ded845a7SHarry Morris 	dev_dbg(&priv->spi->dev, "skb buffer length = %d\n", msdulen);
1784ded845a7SHarry Morris 
1785ded845a7SHarry Morris 	if (priv->promiscuous)
1786ded845a7SHarry Morris 		goto copy_payload;
1787ded845a7SHarry Morris 
1788ded845a7SHarry Morris 	/* Populate hdr */
1789ded845a7SHarry Morris 	hdr.sec.level = data_ind[29 + msdulen];
1790ded845a7SHarry Morris 	dev_dbg(&priv->spi->dev, "security level: %#03x\n", hdr.sec.level);
1791ded845a7SHarry Morris 	if (hdr.sec.level > 0) {
1792ded845a7SHarry Morris 		hdr.sec.key_id_mode = data_ind[30 + msdulen];
1793ded845a7SHarry Morris 		memcpy(&hdr.sec.extended_src, &data_ind[31 + msdulen], 8);
1794ded845a7SHarry Morris 		hdr.sec.key_id = data_ind[39 + msdulen];
1795ded845a7SHarry Morris 	}
1796ded845a7SHarry Morris 	hdr.source.mode = data_ind[0];
1797ded845a7SHarry Morris 	dev_dbg(&priv->spi->dev, "srcAddrMode: %#03x\n", hdr.source.mode);
1798ded845a7SHarry Morris 	hdr.source.pan_id = *(u16 *)&data_ind[1];
1799ded845a7SHarry Morris 	dev_dbg(&priv->spi->dev, "srcPanId: %#06x\n", hdr.source.pan_id);
1800ded845a7SHarry Morris 	memcpy(&hdr.source.extended_addr, &data_ind[3], 8);
1801ded845a7SHarry Morris 	hdr.dest.mode = data_ind[11];
1802ded845a7SHarry Morris 	dev_dbg(&priv->spi->dev, "dstAddrMode: %#03x\n", hdr.dest.mode);
1803ded845a7SHarry Morris 	hdr.dest.pan_id = *(u16 *)&data_ind[12];
1804ded845a7SHarry Morris 	dev_dbg(&priv->spi->dev, "dstPanId: %#06x\n", hdr.dest.pan_id);
1805ded845a7SHarry Morris 	memcpy(&hdr.dest.extended_addr, &data_ind[14], 8);
1806ded845a7SHarry Morris 
1807ded845a7SHarry Morris 	/* Fill in FC implicitly */
1808ded845a7SHarry Morris 	hdr.fc.type = 1; /* Data frame */
1809ded845a7SHarry Morris 	if (hdr.sec.level)
1810ded845a7SHarry Morris 		hdr.fc.security_enabled = 1;
1811ded845a7SHarry Morris 	else
1812ded845a7SHarry Morris 		hdr.fc.security_enabled = 0;
1813ded845a7SHarry Morris 	if (data_ind[1] != data_ind[12] || data_ind[2] != data_ind[13])
1814ded845a7SHarry Morris 		hdr.fc.intra_pan = 1;
1815ded845a7SHarry Morris 	else
1816ded845a7SHarry Morris 		hdr.fc.intra_pan = 0;
1817ded845a7SHarry Morris 	hdr.fc.dest_addr_mode = hdr.dest.mode;
1818ded845a7SHarry Morris 	hdr.fc.source_addr_mode = hdr.source.mode;
1819ded845a7SHarry Morris 
1820ded845a7SHarry Morris 	/* Add hdr to front of buffer */
1821ded845a7SHarry Morris 	hlen = ieee802154_hdr_push(skb, &hdr);
1822ded845a7SHarry Morris 
1823ded845a7SHarry Morris 	if (hlen < 0) {
1824ded845a7SHarry Morris 		dev_crit(&priv->spi->dev, "failed to push mac hdr onto skb!\n");
1825ded845a7SHarry Morris 		kfree_skb(skb);
1826ded845a7SHarry Morris 		return hlen;
1827ded845a7SHarry Morris 	}
1828ded845a7SHarry Morris 
1829ded845a7SHarry Morris 	skb_reset_mac_header(skb);
1830ded845a7SHarry Morris 	skb->mac_len = hlen;
1831ded845a7SHarry Morris 
1832ded845a7SHarry Morris copy_payload:
1833ded845a7SHarry Morris 	/* Add <msdulen> bytes of space to the back of the buffer */
1834ded845a7SHarry Morris 	/* Copy msdu to skb */
183559ae1d12SJohannes Berg 	skb_put_data(skb, &data_ind[29], msdulen);
1836ded845a7SHarry Morris 
1837ded845a7SHarry Morris 	ieee802154_rx_irqsafe(hw, skb, mpdulinkquality);
1838ded845a7SHarry Morris 	return 0;
1839ded845a7SHarry Morris }
1840ded845a7SHarry Morris 
1841ded845a7SHarry Morris /**
1842ded845a7SHarry Morris  * ca8210_net_rx() - Acts upon received SAP commands relevant to the network
1843ded845a7SHarry Morris  *                   driver
1844ded845a7SHarry Morris  * @hw:       ieee802154_hw that command was received by
1845ded845a7SHarry Morris  * @command:  Octet array of received command
1846ded845a7SHarry Morris  * @len:      length of the received command
1847ded845a7SHarry Morris  *
1848ded845a7SHarry Morris  * Called by the spi driver whenever a SAP command is received, this function
1849ded845a7SHarry Morris  * will ascertain whether the command is of interest to the network driver and
1850ded845a7SHarry Morris  * take necessary action.
1851ded845a7SHarry Morris  *
1852ded845a7SHarry Morris  * Return: 0 or linux error code
1853ded845a7SHarry Morris  */
ca8210_net_rx(struct ieee802154_hw * hw,u8 * command,size_t len)1854ded845a7SHarry Morris static int ca8210_net_rx(struct ieee802154_hw *hw, u8 *command, size_t len)
1855ded845a7SHarry Morris {
1856ded845a7SHarry Morris 	struct ca8210_priv *priv = hw->priv;
1857ded845a7SHarry Morris 	unsigned long flags;
1858ded845a7SHarry Morris 	u8 status;
1859ded845a7SHarry Morris 
18607558bd50SStefan Schmidt 	dev_dbg(&priv->spi->dev, "%s: CmdID = %d\n", __func__, command[0]);
1861ded845a7SHarry Morris 
1862ded845a7SHarry Morris 	if (command[0] == SPI_MCPS_DATA_INDICATION) {
1863ded845a7SHarry Morris 		/* Received data */
1864ded845a7SHarry Morris 		spin_lock_irqsave(&priv->lock, flags);
1865ded845a7SHarry Morris 		if (command[26] == priv->last_dsn) {
1866ded845a7SHarry Morris 			dev_dbg(
1867ded845a7SHarry Morris 				&priv->spi->dev,
1868ded845a7SHarry Morris 				"DSN %d resend received, ignoring...\n",
1869ded845a7SHarry Morris 				command[26]
1870ded845a7SHarry Morris 			);
1871ded845a7SHarry Morris 			spin_unlock_irqrestore(&priv->lock, flags);
1872ded845a7SHarry Morris 			return 0;
1873ded845a7SHarry Morris 		}
1874ded845a7SHarry Morris 		priv->last_dsn = command[26];
1875ded845a7SHarry Morris 		spin_unlock_irqrestore(&priv->lock, flags);
1876ded845a7SHarry Morris 		return ca8210_skb_rx(hw, len - 2, command + 2);
1877ded845a7SHarry Morris 	} else if (command[0] == SPI_MCPS_DATA_CONFIRM) {
1878ded845a7SHarry Morris 		status = command[3];
1879ded845a7SHarry Morris 		if (priv->async_tx_pending) {
1880ded845a7SHarry Morris 			return ca8210_async_xmit_complete(
1881ded845a7SHarry Morris 				hw,
1882ded845a7SHarry Morris 				command[2],
1883ded845a7SHarry Morris 				status
1884ded845a7SHarry Morris 			);
1885ded845a7SHarry Morris 		}
1886ded845a7SHarry Morris 	}
1887ded845a7SHarry Morris 
1888ded845a7SHarry Morris 	return 0;
1889ded845a7SHarry Morris }
1890ded845a7SHarry Morris 
1891ded845a7SHarry Morris /**
1892ded845a7SHarry Morris  * ca8210_skb_tx() - Transmits a given socket buffer using the ca8210
1893ded845a7SHarry Morris  * @skb:         Socket buffer to transmit
1894ded845a7SHarry Morris  * @msduhandle:  Data identifier to pass to the 802.15.4 MAC
1895ded845a7SHarry Morris  * @priv:        Pointer to private data section of target ca8210
1896ded845a7SHarry Morris  *
1897ded845a7SHarry Morris  * Return: 0 or linux error code
1898ded845a7SHarry Morris  */
ca8210_skb_tx(struct sk_buff * skb,u8 msduhandle,struct ca8210_priv * priv)1899ded845a7SHarry Morris static int ca8210_skb_tx(
1900ded845a7SHarry Morris 	struct sk_buff      *skb,
1901ded845a7SHarry Morris 	u8                   msduhandle,
1902ded845a7SHarry Morris 	struct ca8210_priv  *priv
1903ded845a7SHarry Morris )
1904ded845a7SHarry Morris {
1905753f5d91SArnd Bergmann 	struct ieee802154_hdr header = { };
1906ded845a7SHarry Morris 	struct secspec secspec;
1907748b2f5eSHarshit Mogalapalli 	int mac_len, status;
1908ded845a7SHarry Morris 
19097558bd50SStefan Schmidt 	dev_dbg(&priv->spi->dev, "%s called\n", __func__);
1910ded845a7SHarry Morris 
1911ded845a7SHarry Morris 	/* Get addressing info from skb - ieee802154 layer creates a full
1912ded845a7SHarry Morris 	 * packet
1913ded845a7SHarry Morris 	 */
1914ded845a7SHarry Morris 	mac_len = ieee802154_hdr_peek_addrs(skb, &header);
19156c993779SAlexander Aring 	if (mac_len < 0)
19166c993779SAlexander Aring 		return mac_len;
1917ded845a7SHarry Morris 
1918ded845a7SHarry Morris 	secspec.security_level = header.sec.level;
1919ded845a7SHarry Morris 	secspec.key_id_mode = header.sec.key_id_mode;
1920ded845a7SHarry Morris 	if (secspec.key_id_mode == 2)
1921ded845a7SHarry Morris 		memcpy(secspec.key_source, &header.sec.short_src, 4);
1922ded845a7SHarry Morris 	else if (secspec.key_id_mode == 3)
1923ded845a7SHarry Morris 		memcpy(secspec.key_source, &header.sec.extended_src, 8);
1924ded845a7SHarry Morris 	secspec.key_index = header.sec.key_id;
1925ded845a7SHarry Morris 
1926ded845a7SHarry Morris 	/* Pass to Cascoda API */
1927ded845a7SHarry Morris 	status =  mcps_data_request(
1928ded845a7SHarry Morris 		header.source.mode,
1929ded845a7SHarry Morris 		header.dest.mode,
1930ded845a7SHarry Morris 		header.dest.pan_id,
1931ded845a7SHarry Morris 		(union macaddr *)&header.dest.extended_addr,
1932ded845a7SHarry Morris 		skb->len - mac_len,
1933ded845a7SHarry Morris 		&skb->data[mac_len],
1934ded845a7SHarry Morris 		msduhandle,
1935ded845a7SHarry Morris 		header.fc.ack_request,
1936ded845a7SHarry Morris 		&secspec,
1937ded845a7SHarry Morris 		priv->spi
1938ded845a7SHarry Morris 	);
1939ded845a7SHarry Morris 	return link_to_linux_err(status);
1940ded845a7SHarry Morris }
1941ded845a7SHarry Morris 
1942ded845a7SHarry Morris /**
1943ded845a7SHarry Morris  * ca8210_start() - Starts the network driver
1944ded845a7SHarry Morris  * @hw:  ieee802154_hw of ca8210 being started
1945ded845a7SHarry Morris  *
1946ded845a7SHarry Morris  * Return: 0 or linux error code
1947ded845a7SHarry Morris  */
ca8210_start(struct ieee802154_hw * hw)1948ded845a7SHarry Morris static int ca8210_start(struct ieee802154_hw *hw)
1949ded845a7SHarry Morris {
1950ded845a7SHarry Morris 	int status;
1951ded845a7SHarry Morris 	u8 rx_on_when_idle;
1952ded845a7SHarry Morris 	u8 lqi_threshold = 0;
1953ded845a7SHarry Morris 	struct ca8210_priv *priv = hw->priv;
1954ded845a7SHarry Morris 
1955ded845a7SHarry Morris 	priv->last_dsn = -1;
1956ded845a7SHarry Morris 	/* Turn receiver on when idle for now just to test rx */
1957ded845a7SHarry Morris 	rx_on_when_idle = 1;
1958ded845a7SHarry Morris 	status = mlme_set_request_sync(
1959ded845a7SHarry Morris 		MAC_RX_ON_WHEN_IDLE,
1960ded845a7SHarry Morris 		0,
1961ded845a7SHarry Morris 		1,
1962ded845a7SHarry Morris 		&rx_on_when_idle,
1963ded845a7SHarry Morris 		priv->spi
1964ded845a7SHarry Morris 	);
1965ded845a7SHarry Morris 	if (status) {
1966ded845a7SHarry Morris 		dev_crit(
1967ded845a7SHarry Morris 			&priv->spi->dev,
1968ded845a7SHarry Morris 			"Setting rx_on_when_idle failed, status = %d\n",
1969ded845a7SHarry Morris 			status
1970ded845a7SHarry Morris 		);
1971ded845a7SHarry Morris 		return link_to_linux_err(status);
1972ded845a7SHarry Morris 	}
1973ded845a7SHarry Morris 	status = hwme_set_request_sync(
1974ded845a7SHarry Morris 		HWME_LQILIMIT,
1975ded845a7SHarry Morris 		1,
1976ded845a7SHarry Morris 		&lqi_threshold,
1977ded845a7SHarry Morris 		priv->spi
1978ded845a7SHarry Morris 	);
1979ded845a7SHarry Morris 	if (status) {
1980ded845a7SHarry Morris 		dev_crit(
1981ded845a7SHarry Morris 			&priv->spi->dev,
1982ded845a7SHarry Morris 			"Setting lqilimit failed, status = %d\n",
1983ded845a7SHarry Morris 			status
1984ded845a7SHarry Morris 		);
1985ded845a7SHarry Morris 		return link_to_linux_err(status);
1986ded845a7SHarry Morris 	}
1987ded845a7SHarry Morris 
1988ded845a7SHarry Morris 	return 0;
1989ded845a7SHarry Morris }
1990ded845a7SHarry Morris 
1991ded845a7SHarry Morris /**
1992ded845a7SHarry Morris  * ca8210_stop() - Stops the network driver
1993ded845a7SHarry Morris  * @hw:  ieee802154_hw of ca8210 being stopped
1994ded845a7SHarry Morris  *
1995ded845a7SHarry Morris  * Return: 0 or linux error code
1996ded845a7SHarry Morris  */
ca8210_stop(struct ieee802154_hw * hw)1997ded845a7SHarry Morris static void ca8210_stop(struct ieee802154_hw *hw)
1998ded845a7SHarry Morris {
1999ded845a7SHarry Morris }
2000ded845a7SHarry Morris 
2001ded845a7SHarry Morris /**
2002ded845a7SHarry Morris  * ca8210_xmit_async() - Asynchronously transmits a given socket buffer using
2003ded845a7SHarry Morris  *                       the ca8210
2004ded845a7SHarry Morris  * @hw:   ieee802154_hw of ca8210 to transmit from
2005ded845a7SHarry Morris  * @skb:  Socket buffer to transmit
2006ded845a7SHarry Morris  *
2007ded845a7SHarry Morris  * Return: 0 or linux error code
2008ded845a7SHarry Morris  */
ca8210_xmit_async(struct ieee802154_hw * hw,struct sk_buff * skb)2009ded845a7SHarry Morris static int ca8210_xmit_async(struct ieee802154_hw *hw, struct sk_buff *skb)
2010ded845a7SHarry Morris {
2011ded845a7SHarry Morris 	struct ca8210_priv *priv = hw->priv;
2012ded845a7SHarry Morris 	int status;
2013ded845a7SHarry Morris 
20147558bd50SStefan Schmidt 	dev_dbg(&priv->spi->dev, "calling %s\n", __func__);
2015ded845a7SHarry Morris 
2016ded845a7SHarry Morris 	priv->tx_skb = skb;
2017ded845a7SHarry Morris 	priv->async_tx_pending = true;
2018ded845a7SHarry Morris 	status = ca8210_skb_tx(skb, priv->nextmsduhandle, priv);
2019ded845a7SHarry Morris 	return status;
2020ded845a7SHarry Morris }
2021ded845a7SHarry Morris 
2022ded845a7SHarry Morris /**
2023ded845a7SHarry Morris  * ca8210_get_ed() - Returns the measured energy on the current channel at this
2024ded845a7SHarry Morris  *                   instant in time
2025ded845a7SHarry Morris  * @hw:     ieee802154_hw of target ca8210
2026ded845a7SHarry Morris  * @level:  Measured Energy Detect level
2027ded845a7SHarry Morris  *
2028ded845a7SHarry Morris  * Return: 0 or linux error code
2029ded845a7SHarry Morris  */
ca8210_get_ed(struct ieee802154_hw * hw,u8 * level)2030ded845a7SHarry Morris static int ca8210_get_ed(struct ieee802154_hw *hw, u8 *level)
2031ded845a7SHarry Morris {
2032ded845a7SHarry Morris 	u8 lenvar;
2033ded845a7SHarry Morris 	struct ca8210_priv *priv = hw->priv;
2034ded845a7SHarry Morris 
2035ded845a7SHarry Morris 	return link_to_linux_err(
2036ded845a7SHarry Morris 		hwme_get_request_sync(HWME_EDVALUE, &lenvar, level, priv->spi)
2037ded845a7SHarry Morris 	);
2038ded845a7SHarry Morris }
2039ded845a7SHarry Morris 
2040ded845a7SHarry Morris /**
2041ded845a7SHarry Morris  * ca8210_set_channel() - Sets the current operating 802.15.4 channel of the
2042ded845a7SHarry Morris  *                        ca8210
2043ded845a7SHarry Morris  * @hw:       ieee802154_hw of target ca8210
2044ded845a7SHarry Morris  * @page:     Channel page to set
2045ded845a7SHarry Morris  * @channel:  Channel number to set
2046ded845a7SHarry Morris  *
2047ded845a7SHarry Morris  * Return: 0 or linux error code
2048ded845a7SHarry Morris  */
ca8210_set_channel(struct ieee802154_hw * hw,u8 page,u8 channel)2049ded845a7SHarry Morris static int ca8210_set_channel(
2050ded845a7SHarry Morris 	struct ieee802154_hw  *hw,
2051ded845a7SHarry Morris 	u8                     page,
2052ded845a7SHarry Morris 	u8                     channel
2053ded845a7SHarry Morris )
2054ded845a7SHarry Morris {
2055ded845a7SHarry Morris 	u8 status;
2056ded845a7SHarry Morris 	struct ca8210_priv *priv = hw->priv;
2057ded845a7SHarry Morris 
2058ded845a7SHarry Morris 	status = mlme_set_request_sync(
2059ded845a7SHarry Morris 		PHY_CURRENT_CHANNEL,
2060ded845a7SHarry Morris 		0,
2061ded845a7SHarry Morris 		1,
2062ded845a7SHarry Morris 		&channel,
2063ded845a7SHarry Morris 		priv->spi
2064ded845a7SHarry Morris 	);
2065ded845a7SHarry Morris 	if (status) {
2066ded845a7SHarry Morris 		dev_err(
2067ded845a7SHarry Morris 			&priv->spi->dev,
2068ded845a7SHarry Morris 			"error setting channel, MLME-SET.confirm status = %d\n",
2069ded845a7SHarry Morris 			status
2070ded845a7SHarry Morris 		);
2071ded845a7SHarry Morris 	}
2072ded845a7SHarry Morris 	return link_to_linux_err(status);
2073ded845a7SHarry Morris }
2074ded845a7SHarry Morris 
2075ded845a7SHarry Morris /**
2076ded845a7SHarry Morris  * ca8210_set_hw_addr_filt() - Sets the address filtering parameters of the
2077ded845a7SHarry Morris  *                             ca8210
2078ded845a7SHarry Morris  * @hw:       ieee802154_hw of target ca8210
2079ded845a7SHarry Morris  * @filt:     Filtering parameters
2080ded845a7SHarry Morris  * @changed:  Bitmap representing which parameters to change
2081ded845a7SHarry Morris  *
2082ded845a7SHarry Morris  * Effectively just sets the actual addressing information identifying this node
2083ded845a7SHarry Morris  * as all filtering is performed by the ca8210 as detailed in the IEEE 802.15.4
2084ded845a7SHarry Morris  * 2006 specification.
2085ded845a7SHarry Morris  *
2086ded845a7SHarry Morris  * Return: 0 or linux error code
2087ded845a7SHarry Morris  */
ca8210_set_hw_addr_filt(struct ieee802154_hw * hw,struct ieee802154_hw_addr_filt * filt,unsigned long changed)2088ded845a7SHarry Morris static int ca8210_set_hw_addr_filt(
2089ded845a7SHarry Morris 	struct ieee802154_hw            *hw,
2090ded845a7SHarry Morris 	struct ieee802154_hw_addr_filt  *filt,
2091ded845a7SHarry Morris 	unsigned long                    changed
2092ded845a7SHarry Morris )
2093ded845a7SHarry Morris {
2094ded845a7SHarry Morris 	u8 status = 0;
2095ded845a7SHarry Morris 	struct ca8210_priv *priv = hw->priv;
2096ded845a7SHarry Morris 
2097ded845a7SHarry Morris 	if (changed & IEEE802154_AFILT_PANID_CHANGED) {
2098ded845a7SHarry Morris 		status = mlme_set_request_sync(
2099ded845a7SHarry Morris 			MAC_PAN_ID,
2100ded845a7SHarry Morris 			0,
2101ded845a7SHarry Morris 			2,
2102ded845a7SHarry Morris 			&filt->pan_id, priv->spi
2103ded845a7SHarry Morris 		);
2104ded845a7SHarry Morris 		if (status) {
2105ded845a7SHarry Morris 			dev_err(
2106ded845a7SHarry Morris 				&priv->spi->dev,
2107ded845a7SHarry Morris 				"error setting pan id, MLME-SET.confirm status = %d",
2108ded845a7SHarry Morris 				status
2109ded845a7SHarry Morris 			);
2110ded845a7SHarry Morris 			return link_to_linux_err(status);
2111ded845a7SHarry Morris 		}
2112ded845a7SHarry Morris 	}
2113ded845a7SHarry Morris 	if (changed & IEEE802154_AFILT_SADDR_CHANGED) {
2114ded845a7SHarry Morris 		status = mlme_set_request_sync(
2115ded845a7SHarry Morris 			MAC_SHORT_ADDRESS,
2116ded845a7SHarry Morris 			0,
2117ded845a7SHarry Morris 			2,
2118ded845a7SHarry Morris 			&filt->short_addr, priv->spi
2119ded845a7SHarry Morris 		);
2120ded845a7SHarry Morris 		if (status) {
2121ded845a7SHarry Morris 			dev_err(
2122ded845a7SHarry Morris 				&priv->spi->dev,
2123ded845a7SHarry Morris 				"error setting short address, MLME-SET.confirm status = %d",
2124ded845a7SHarry Morris 				status
2125ded845a7SHarry Morris 			);
2126ded845a7SHarry Morris 			return link_to_linux_err(status);
2127ded845a7SHarry Morris 		}
2128ded845a7SHarry Morris 	}
2129ded845a7SHarry Morris 	if (changed & IEEE802154_AFILT_IEEEADDR_CHANGED) {
2130ded845a7SHarry Morris 		status = mlme_set_request_sync(
2131ded845a7SHarry Morris 			NS_IEEE_ADDRESS,
2132ded845a7SHarry Morris 			0,
2133ded845a7SHarry Morris 			8,
2134ded845a7SHarry Morris 			&filt->ieee_addr,
2135ded845a7SHarry Morris 			priv->spi
2136ded845a7SHarry Morris 		);
2137ded845a7SHarry Morris 		if (status) {
2138ded845a7SHarry Morris 			dev_err(
2139ded845a7SHarry Morris 				&priv->spi->dev,
2140ded845a7SHarry Morris 				"error setting ieee address, MLME-SET.confirm status = %d",
2141ded845a7SHarry Morris 				status
2142ded845a7SHarry Morris 			);
2143ded845a7SHarry Morris 			return link_to_linux_err(status);
2144ded845a7SHarry Morris 		}
2145ded845a7SHarry Morris 	}
2146ded845a7SHarry Morris 	/* TODO: Should use MLME_START to set coord bit? */
2147ded845a7SHarry Morris 	return 0;
2148ded845a7SHarry Morris }
2149ded845a7SHarry Morris 
2150ded845a7SHarry Morris /**
2151ded845a7SHarry Morris  * ca8210_set_tx_power() - Sets the transmit power of the ca8210
2152ded845a7SHarry Morris  * @hw:   ieee802154_hw of target ca8210
2153ded845a7SHarry Morris  * @mbm:  Transmit power in mBm (dBm*100)
2154ded845a7SHarry Morris  *
2155ded845a7SHarry Morris  * Return: 0 or linux error code
2156ded845a7SHarry Morris  */
ca8210_set_tx_power(struct ieee802154_hw * hw,s32 mbm)2157ded845a7SHarry Morris static int ca8210_set_tx_power(struct ieee802154_hw *hw, s32 mbm)
2158ded845a7SHarry Morris {
2159ded845a7SHarry Morris 	struct ca8210_priv *priv = hw->priv;
2160ded845a7SHarry Morris 
2161ded845a7SHarry Morris 	mbm /= 100;
2162ded845a7SHarry Morris 	return link_to_linux_err(
2163ded845a7SHarry Morris 		mlme_set_request_sync(PHY_TRANSMIT_POWER, 0, 1, &mbm, priv->spi)
2164ded845a7SHarry Morris 	);
2165ded845a7SHarry Morris }
2166ded845a7SHarry Morris 
2167ded845a7SHarry Morris /**
2168ded845a7SHarry Morris  * ca8210_set_cca_mode() - Sets the clear channel assessment mode of the ca8210
2169ded845a7SHarry Morris  * @hw:   ieee802154_hw of target ca8210
2170ded845a7SHarry Morris  * @cca:  CCA mode to set
2171ded845a7SHarry Morris  *
2172ded845a7SHarry Morris  * Return: 0 or linux error code
2173ded845a7SHarry Morris  */
ca8210_set_cca_mode(struct ieee802154_hw * hw,const struct wpan_phy_cca * cca)2174ded845a7SHarry Morris static int ca8210_set_cca_mode(
2175ded845a7SHarry Morris 	struct ieee802154_hw       *hw,
2176ded845a7SHarry Morris 	const struct wpan_phy_cca  *cca
2177ded845a7SHarry Morris )
2178ded845a7SHarry Morris {
2179ded845a7SHarry Morris 	u8 status;
2180ded845a7SHarry Morris 	u8 cca_mode;
2181ded845a7SHarry Morris 	struct ca8210_priv *priv = hw->priv;
2182ded845a7SHarry Morris 
2183ded845a7SHarry Morris 	cca_mode = cca->mode & 3;
2184ded845a7SHarry Morris 	if (cca_mode == 3 && cca->opt == NL802154_CCA_OPT_ENERGY_CARRIER_OR) {
2185ded845a7SHarry Morris 		/* cca_mode 0 == CS OR ED, 3 == CS AND ED */
2186ded845a7SHarry Morris 		cca_mode = 0;
2187ded845a7SHarry Morris 	}
2188ded845a7SHarry Morris 	status = mlme_set_request_sync(
2189ded845a7SHarry Morris 		PHY_CCA_MODE,
2190ded845a7SHarry Morris 		0,
2191ded845a7SHarry Morris 		1,
2192ded845a7SHarry Morris 		&cca_mode,
2193ded845a7SHarry Morris 		priv->spi
2194ded845a7SHarry Morris 	);
2195ded845a7SHarry Morris 	if (status) {
2196ded845a7SHarry Morris 		dev_err(
2197ded845a7SHarry Morris 			&priv->spi->dev,
2198ded845a7SHarry Morris 			"error setting cca mode, MLME-SET.confirm status = %d",
2199ded845a7SHarry Morris 			status
2200ded845a7SHarry Morris 		);
2201ded845a7SHarry Morris 	}
2202ded845a7SHarry Morris 	return link_to_linux_err(status);
2203ded845a7SHarry Morris }
2204ded845a7SHarry Morris 
2205ded845a7SHarry Morris /**
2206ded845a7SHarry Morris  * ca8210_set_cca_ed_level() - Sets the CCA ED level of the ca8210
2207ded845a7SHarry Morris  * @hw:     ieee802154_hw of target ca8210
2208ded845a7SHarry Morris  * @level:  ED level to set (in mbm)
2209ded845a7SHarry Morris  *
2210ded845a7SHarry Morris  * Sets the minimum threshold of measured energy above which the ca8210 will
2211ded845a7SHarry Morris  * back off and retry a transmission.
2212ded845a7SHarry Morris  *
2213ded845a7SHarry Morris  * Return: 0 or linux error code
2214ded845a7SHarry Morris  */
ca8210_set_cca_ed_level(struct ieee802154_hw * hw,s32 level)2215ded845a7SHarry Morris static int ca8210_set_cca_ed_level(struct ieee802154_hw *hw, s32 level)
2216ded845a7SHarry Morris {
2217ded845a7SHarry Morris 	u8 status;
2218ded845a7SHarry Morris 	u8 ed_threshold = (level / 100) * 2 + 256;
2219ded845a7SHarry Morris 	struct ca8210_priv *priv = hw->priv;
2220ded845a7SHarry Morris 
2221ded845a7SHarry Morris 	status = hwme_set_request_sync(
2222ded845a7SHarry Morris 		HWME_EDTHRESHOLD,
2223ded845a7SHarry Morris 		1,
2224ded845a7SHarry Morris 		&ed_threshold,
2225ded845a7SHarry Morris 		priv->spi
2226ded845a7SHarry Morris 	);
2227ded845a7SHarry Morris 	if (status) {
2228ded845a7SHarry Morris 		dev_err(
2229ded845a7SHarry Morris 			&priv->spi->dev,
2230ded845a7SHarry Morris 			"error setting ed threshold, HWME-SET.confirm status = %d",
2231ded845a7SHarry Morris 			status
2232ded845a7SHarry Morris 		);
2233ded845a7SHarry Morris 	}
2234ded845a7SHarry Morris 	return link_to_linux_err(status);
2235ded845a7SHarry Morris }
2236ded845a7SHarry Morris 
2237ded845a7SHarry Morris /**
2238ded845a7SHarry Morris  * ca8210_set_csma_params() - Sets the CSMA parameters of the ca8210
2239ded845a7SHarry Morris  * @hw:       ieee802154_hw of target ca8210
2240ded845a7SHarry Morris  * @min_be:   Minimum backoff exponent when backing off a transmission
2241ded845a7SHarry Morris  * @max_be:   Maximum backoff exponent when backing off a transmission
2242ded845a7SHarry Morris  * @retries:  Number of times to retry after backing off
2243ded845a7SHarry Morris  *
2244ded845a7SHarry Morris  * Return: 0 or linux error code
2245ded845a7SHarry Morris  */
ca8210_set_csma_params(struct ieee802154_hw * hw,u8 min_be,u8 max_be,u8 retries)2246ded845a7SHarry Morris static int ca8210_set_csma_params(
2247ded845a7SHarry Morris 	struct ieee802154_hw  *hw,
2248ded845a7SHarry Morris 	u8                     min_be,
2249ded845a7SHarry Morris 	u8                     max_be,
2250ded845a7SHarry Morris 	u8                     retries
2251ded845a7SHarry Morris )
2252ded845a7SHarry Morris {
2253ded845a7SHarry Morris 	u8 status;
2254ded845a7SHarry Morris 	struct ca8210_priv *priv = hw->priv;
2255ded845a7SHarry Morris 
2256ded845a7SHarry Morris 	status = mlme_set_request_sync(MAC_MIN_BE, 0, 1, &min_be, priv->spi);
2257ded845a7SHarry Morris 	if (status) {
2258ded845a7SHarry Morris 		dev_err(
2259ded845a7SHarry Morris 			&priv->spi->dev,
2260ded845a7SHarry Morris 			"error setting min be, MLME-SET.confirm status = %d",
2261ded845a7SHarry Morris 			status
2262ded845a7SHarry Morris 		);
2263ded845a7SHarry Morris 		return link_to_linux_err(status);
2264ded845a7SHarry Morris 	}
2265ded845a7SHarry Morris 	status = mlme_set_request_sync(MAC_MAX_BE, 0, 1, &max_be, priv->spi);
2266ded845a7SHarry Morris 	if (status) {
2267ded845a7SHarry Morris 		dev_err(
2268ded845a7SHarry Morris 			&priv->spi->dev,
2269ded845a7SHarry Morris 			"error setting max be, MLME-SET.confirm status = %d",
2270ded845a7SHarry Morris 			status
2271ded845a7SHarry Morris 		);
2272ded845a7SHarry Morris 		return link_to_linux_err(status);
2273ded845a7SHarry Morris 	}
2274ded845a7SHarry Morris 	status = mlme_set_request_sync(
2275ded845a7SHarry Morris 		MAC_MAX_CSMA_BACKOFFS,
2276ded845a7SHarry Morris 		0,
2277ded845a7SHarry Morris 		1,
2278ded845a7SHarry Morris 		&retries,
2279ded845a7SHarry Morris 		priv->spi
2280ded845a7SHarry Morris 	);
2281ded845a7SHarry Morris 	if (status) {
2282ded845a7SHarry Morris 		dev_err(
2283ded845a7SHarry Morris 			&priv->spi->dev,
2284ded845a7SHarry Morris 			"error setting max csma backoffs, MLME-SET.confirm status = %d",
2285ded845a7SHarry Morris 			status
2286ded845a7SHarry Morris 		);
2287ded845a7SHarry Morris 	}
2288ded845a7SHarry Morris 	return link_to_linux_err(status);
2289ded845a7SHarry Morris }
2290ded845a7SHarry Morris 
2291ded845a7SHarry Morris /**
2292ded845a7SHarry Morris  * ca8210_set_frame_retries() - Sets the maximum frame retries of the ca8210
2293ded845a7SHarry Morris  * @hw:       ieee802154_hw of target ca8210
2294ded845a7SHarry Morris  * @retries:  Number of retries
2295ded845a7SHarry Morris  *
2296ded845a7SHarry Morris  * Sets the number of times to retry a transmission if no acknowledgment was
2297b5a99020SJilin Yuan  * received from the other end when one was requested.
2298ded845a7SHarry Morris  *
2299ded845a7SHarry Morris  * Return: 0 or linux error code
2300ded845a7SHarry Morris  */
ca8210_set_frame_retries(struct ieee802154_hw * hw,s8 retries)2301ded845a7SHarry Morris static int ca8210_set_frame_retries(struct ieee802154_hw *hw, s8 retries)
2302ded845a7SHarry Morris {
2303ded845a7SHarry Morris 	u8 status;
2304ded845a7SHarry Morris 	struct ca8210_priv *priv = hw->priv;
2305ded845a7SHarry Morris 
2306ded845a7SHarry Morris 	status = mlme_set_request_sync(
2307ded845a7SHarry Morris 		MAC_MAX_FRAME_RETRIES,
2308ded845a7SHarry Morris 		0,
2309ded845a7SHarry Morris 		1,
2310ded845a7SHarry Morris 		&retries,
2311ded845a7SHarry Morris 		priv->spi
2312ded845a7SHarry Morris 	);
2313ded845a7SHarry Morris 	if (status) {
2314ded845a7SHarry Morris 		dev_err(
2315ded845a7SHarry Morris 			&priv->spi->dev,
2316ded845a7SHarry Morris 			"error setting frame retries, MLME-SET.confirm status = %d",
2317ded845a7SHarry Morris 			status
2318ded845a7SHarry Morris 		);
2319ded845a7SHarry Morris 	}
2320ded845a7SHarry Morris 	return link_to_linux_err(status);
2321ded845a7SHarry Morris }
2322ded845a7SHarry Morris 
ca8210_set_promiscuous_mode(struct ieee802154_hw * hw,const bool on)2323ded845a7SHarry Morris static int ca8210_set_promiscuous_mode(struct ieee802154_hw *hw, const bool on)
2324ded845a7SHarry Morris {
2325ded845a7SHarry Morris 	u8 status;
2326ded845a7SHarry Morris 	struct ca8210_priv *priv = hw->priv;
2327ded845a7SHarry Morris 
2328ded845a7SHarry Morris 	status = mlme_set_request_sync(
2329ded845a7SHarry Morris 		MAC_PROMISCUOUS_MODE,
2330ded845a7SHarry Morris 		0,
2331ded845a7SHarry Morris 		1,
2332ded845a7SHarry Morris 		(const void *)&on,
2333ded845a7SHarry Morris 		priv->spi
2334ded845a7SHarry Morris 	);
2335ded845a7SHarry Morris 	if (status) {
2336ded845a7SHarry Morris 		dev_err(
2337ded845a7SHarry Morris 			&priv->spi->dev,
2338ded845a7SHarry Morris 			"error setting promiscuous mode, MLME-SET.confirm status = %d",
2339ded845a7SHarry Morris 			status
2340ded845a7SHarry Morris 		);
2341ded845a7SHarry Morris 	} else {
2342ded845a7SHarry Morris 		priv->promiscuous = on;
2343ded845a7SHarry Morris 	}
2344ded845a7SHarry Morris 	return link_to_linux_err(status);
2345ded845a7SHarry Morris }
2346ded845a7SHarry Morris 
2347ded845a7SHarry Morris static const struct ieee802154_ops ca8210_phy_ops = {
2348ded845a7SHarry Morris 	.start = ca8210_start,
2349ded845a7SHarry Morris 	.stop = ca8210_stop,
2350ded845a7SHarry Morris 	.xmit_async = ca8210_xmit_async,
2351ded845a7SHarry Morris 	.ed = ca8210_get_ed,
2352ded845a7SHarry Morris 	.set_channel = ca8210_set_channel,
2353ded845a7SHarry Morris 	.set_hw_addr_filt = ca8210_set_hw_addr_filt,
2354ded845a7SHarry Morris 	.set_txpower = ca8210_set_tx_power,
2355ded845a7SHarry Morris 	.set_cca_mode = ca8210_set_cca_mode,
2356ded845a7SHarry Morris 	.set_cca_ed_level = ca8210_set_cca_ed_level,
2357ded845a7SHarry Morris 	.set_csma_params = ca8210_set_csma_params,
2358ded845a7SHarry Morris 	.set_frame_retries = ca8210_set_frame_retries,
2359ded845a7SHarry Morris 	.set_promiscuous_mode = ca8210_set_promiscuous_mode
2360ded845a7SHarry Morris };
2361ded845a7SHarry Morris 
2362ded845a7SHarry Morris /* Test/EVBME Interface */
2363ded845a7SHarry Morris 
2364ded845a7SHarry Morris /**
2365ded845a7SHarry Morris  * ca8210_test_int_open() - Opens the test interface to the userspace
2366ded845a7SHarry Morris  * @inodp:  inode representation of file interface
2367ded845a7SHarry Morris  * @filp:   file interface
2368ded845a7SHarry Morris  *
2369ded845a7SHarry Morris  * Return: 0 or linux error code
2370ded845a7SHarry Morris  */
ca8210_test_int_open(struct inode * inodp,struct file * filp)2371ded845a7SHarry Morris static int ca8210_test_int_open(struct inode *inodp, struct file *filp)
2372ded845a7SHarry Morris {
2373ded845a7SHarry Morris 	struct ca8210_priv *priv = inodp->i_private;
2374ded845a7SHarry Morris 
2375ded845a7SHarry Morris 	filp->private_data = priv;
2376ded845a7SHarry Morris 	return 0;
2377ded845a7SHarry Morris }
2378ded845a7SHarry Morris 
2379ded845a7SHarry Morris /**
2380ded845a7SHarry Morris  * ca8210_test_check_upstream() - Checks a command received from the upstream
2381ded845a7SHarry Morris  *                                testing interface for required action
2382ded845a7SHarry Morris  * @buf:        Buffer containing command to check
2383ded845a7SHarry Morris  * @device_ref: Nondescript pointer to target device
2384ded845a7SHarry Morris  *
2385ded845a7SHarry Morris  * Return: 0 or linux error code
2386ded845a7SHarry Morris  */
ca8210_test_check_upstream(u8 * buf,void * device_ref)2387ded845a7SHarry Morris static int ca8210_test_check_upstream(u8 *buf, void *device_ref)
2388ded845a7SHarry Morris {
2389ded845a7SHarry Morris 	int ret;
2390ded845a7SHarry Morris 	u8 response[CA8210_SPI_BUF_SIZE];
2391ded845a7SHarry Morris 
2392ded845a7SHarry Morris 	if (buf[0] == SPI_MLME_SET_REQUEST) {
2393ded845a7SHarry Morris 		ret = tdme_checkpibattribute(buf[2], buf[4], buf + 5);
2394ded845a7SHarry Morris 		if (ret) {
2395ded845a7SHarry Morris 			response[0]  = SPI_MLME_SET_CONFIRM;
2396ded845a7SHarry Morris 			response[1] = 3;
2397ab191c1cSMiquel Raynal 			response[2] = IEEE802154_INVALID_PARAMETER;
2398ded845a7SHarry Morris 			response[3] = buf[2];
2399ded845a7SHarry Morris 			response[4] = buf[3];
2400ded845a7SHarry Morris 			if (cascoda_api_upstream)
2401ded845a7SHarry Morris 				cascoda_api_upstream(response, 5, device_ref);
2402ded845a7SHarry Morris 			return ret;
2403ded845a7SHarry Morris 		}
2404ded845a7SHarry Morris 	}
2405ded845a7SHarry Morris 	if (buf[0] == SPI_MLME_ASSOCIATE_REQUEST) {
2406ded845a7SHarry Morris 		return tdme_channelinit(buf[2], device_ref);
2407ded845a7SHarry Morris 	} else if (buf[0] == SPI_MLME_START_REQUEST) {
2408ded845a7SHarry Morris 		return tdme_channelinit(buf[4], device_ref);
2409ded845a7SHarry Morris 	} else if (
2410ded845a7SHarry Morris 		(buf[0] == SPI_MLME_SET_REQUEST) &&
2411ded845a7SHarry Morris 		(buf[2] == PHY_CURRENT_CHANNEL)
2412ded845a7SHarry Morris 	) {
2413ded845a7SHarry Morris 		return tdme_channelinit(buf[5], device_ref);
2414ded845a7SHarry Morris 	} else if (
2415ded845a7SHarry Morris 		(buf[0] == SPI_TDME_SET_REQUEST) &&
2416ded845a7SHarry Morris 		(buf[2] == TDME_CHANNEL)
2417ded845a7SHarry Morris 	) {
2418ded845a7SHarry Morris 		return tdme_channelinit(buf[4], device_ref);
2419ded845a7SHarry Morris 	} else if (
2420ded845a7SHarry Morris 		(CA8210_MAC_WORKAROUNDS) &&
2421ded845a7SHarry Morris 		(buf[0] == SPI_MLME_RESET_REQUEST) &&
2422ded845a7SHarry Morris 		(buf[2] == 1)
2423ded845a7SHarry Morris 	) {
2424ded845a7SHarry Morris 		/* reset COORD Bit for Channel Filtering as Coordinator */
2425ded845a7SHarry Morris 		return tdme_setsfr_request_sync(
2426ded845a7SHarry Morris 			0,
2427ded845a7SHarry Morris 			CA8210_SFR_MACCON,
2428ded845a7SHarry Morris 			0,
2429ded845a7SHarry Morris 			device_ref
2430ded845a7SHarry Morris 		);
2431ded845a7SHarry Morris 	}
2432ded845a7SHarry Morris 	return 0;
2433ded845a7SHarry Morris } /* End of EVBMECheckSerialCommand() */
2434ded845a7SHarry Morris 
2435ded845a7SHarry Morris /**
2436ded845a7SHarry Morris  * ca8210_test_int_user_write() - Called by a process in userspace to send a
2437ded845a7SHarry Morris  *                                message to the ca8210 drivers
2438ded845a7SHarry Morris  * @filp:    file interface
2439ded845a7SHarry Morris  * @in_buf:  Buffer containing message to write
2440ded845a7SHarry Morris  * @len:     length of message
2441ded845a7SHarry Morris  * @off:     file offset
2442ded845a7SHarry Morris  *
2443ded845a7SHarry Morris  * Return: 0 or linux error code
2444ded845a7SHarry Morris  */
ca8210_test_int_user_write(struct file * filp,const char __user * in_buf,size_t len,loff_t * off)2445ded845a7SHarry Morris static ssize_t ca8210_test_int_user_write(
2446ded845a7SHarry Morris 	struct file        *filp,
2447ded845a7SHarry Morris 	const char __user  *in_buf,
2448ded845a7SHarry Morris 	size_t              len,
2449ded845a7SHarry Morris 	loff_t             *off
2450ded845a7SHarry Morris )
2451ded845a7SHarry Morris {
2452ded845a7SHarry Morris 	int ret;
2453ded845a7SHarry Morris 	struct ca8210_priv *priv = filp->private_data;
2454ded845a7SHarry Morris 	u8 command[CA8210_SPI_BUF_SIZE];
2455ded845a7SHarry Morris 
245686674a97SHarry Morris 	memset(command, SPI_IDLE, 6);
245786674a97SHarry Morris 	if (len > CA8210_SPI_BUF_SIZE || len < 2) {
2458ded845a7SHarry Morris 		dev_warn(
2459ded845a7SHarry Morris 			&priv->spi->dev,
246086674a97SHarry Morris 			"userspace requested erroneous write length (%zu)\n",
2461ded845a7SHarry Morris 			len
2462ded845a7SHarry Morris 		);
246386674a97SHarry Morris 		return -EBADE;
2464ded845a7SHarry Morris 	}
2465ded845a7SHarry Morris 
2466ded845a7SHarry Morris 	ret = copy_from_user(command, in_buf, len);
2467ded845a7SHarry Morris 	if (ret) {
2468ded845a7SHarry Morris 		dev_err(
2469ded845a7SHarry Morris 			&priv->spi->dev,
2470ded845a7SHarry Morris 			"%d bytes could not be copied from userspace\n",
2471ded845a7SHarry Morris 			ret
2472ded845a7SHarry Morris 		);
2473ded845a7SHarry Morris 		return -EIO;
2474ded845a7SHarry Morris 	}
247586674a97SHarry Morris 	if (len != command[1] + 2) {
247686674a97SHarry Morris 		dev_err(
247786674a97SHarry Morris 			&priv->spi->dev,
247886674a97SHarry Morris 			"write len does not match packet length field\n"
247986674a97SHarry Morris 		);
248086674a97SHarry Morris 		return -EBADE;
248186674a97SHarry Morris 	}
2482ded845a7SHarry Morris 
2483ded845a7SHarry Morris 	ret = ca8210_test_check_upstream(command, priv->spi);
2484ded845a7SHarry Morris 	if (ret == 0) {
2485ded845a7SHarry Morris 		ret = ca8210_spi_exchange(
2486ded845a7SHarry Morris 			command,
2487ded845a7SHarry Morris 			command[1] + 2,
2488ded845a7SHarry Morris 			NULL,
2489ded845a7SHarry Morris 			priv->spi
2490ded845a7SHarry Morris 		);
2491ded845a7SHarry Morris 		if (ret < 0) {
2492ded845a7SHarry Morris 			/* effectively 0 bytes were written successfully */
2493ded845a7SHarry Morris 			dev_err(
2494ded845a7SHarry Morris 				&priv->spi->dev,
2495ded845a7SHarry Morris 				"spi exchange failed\n"
2496ded845a7SHarry Morris 			);
2497ded845a7SHarry Morris 			return ret;
2498ded845a7SHarry Morris 		}
2499ded845a7SHarry Morris 		if (command[0] & SPI_SYN)
2500ded845a7SHarry Morris 			priv->sync_down++;
2501ded845a7SHarry Morris 	}
2502ded845a7SHarry Morris 
2503ded845a7SHarry Morris 	return len;
2504ded845a7SHarry Morris }
2505ded845a7SHarry Morris 
2506ded845a7SHarry Morris /**
2507ded845a7SHarry Morris  * ca8210_test_int_user_read() - Called by a process in userspace to read a
2508ded845a7SHarry Morris  *                               message from the ca8210 drivers
2509ded845a7SHarry Morris  * @filp:  file interface
2510ded845a7SHarry Morris  * @buf:   Buffer to write message to
2511ded845a7SHarry Morris  * @len:   length of message to read (ignored)
2512ded845a7SHarry Morris  * @offp:  file offset
2513ded845a7SHarry Morris  *
2514ded845a7SHarry Morris  * If the O_NONBLOCK flag was set when opening the file then this function will
2515ded845a7SHarry Morris  * not block, i.e. it will return if the fifo is empty. Otherwise the function
2516ded845a7SHarry Morris  * will block, i.e. wait until new data arrives.
2517ded845a7SHarry Morris  *
2518ded845a7SHarry Morris  * Return: number of bytes read
2519ded845a7SHarry Morris  */
ca8210_test_int_user_read(struct file * filp,char __user * buf,size_t len,loff_t * offp)2520ded845a7SHarry Morris static ssize_t ca8210_test_int_user_read(
2521ded845a7SHarry Morris 	struct file  *filp,
2522ded845a7SHarry Morris 	char __user  *buf,
2523ded845a7SHarry Morris 	size_t        len,
2524ded845a7SHarry Morris 	loff_t       *offp
2525ded845a7SHarry Morris )
2526ded845a7SHarry Morris {
2527ded845a7SHarry Morris 	int i, cmdlen;
2528ded845a7SHarry Morris 	struct ca8210_priv *priv = filp->private_data;
2529ded845a7SHarry Morris 	unsigned char *fifo_buffer;
2530ded845a7SHarry Morris 	unsigned long bytes_not_copied;
2531ded845a7SHarry Morris 
2532ded845a7SHarry Morris 	if (filp->f_flags & O_NONBLOCK) {
2533ded845a7SHarry Morris 		/* Non-blocking mode */
2534ded845a7SHarry Morris 		if (kfifo_is_empty(&priv->test.up_fifo))
2535ded845a7SHarry Morris 			return 0;
2536ded845a7SHarry Morris 	} else {
2537ded845a7SHarry Morris 		/* Blocking mode */
2538ded845a7SHarry Morris 		wait_event_interruptible(
2539ded845a7SHarry Morris 			priv->test.readq,
2540ded845a7SHarry Morris 			!kfifo_is_empty(&priv->test.up_fifo)
2541ded845a7SHarry Morris 		);
2542ded845a7SHarry Morris 	}
2543ded845a7SHarry Morris 
2544ded845a7SHarry Morris 	if (kfifo_out(&priv->test.up_fifo, &fifo_buffer, 4) != 4) {
2545ded845a7SHarry Morris 		dev_err(
2546ded845a7SHarry Morris 			&priv->spi->dev,
2547ded845a7SHarry Morris 			"test_interface: Wrong number of elements popped from upstream fifo\n"
2548ded845a7SHarry Morris 		);
2549ded845a7SHarry Morris 		return 0;
2550ded845a7SHarry Morris 	}
2551ded845a7SHarry Morris 	cmdlen = fifo_buffer[1];
2552ded845a7SHarry Morris 	bytes_not_copied = cmdlen + 2;
2553ded845a7SHarry Morris 
2554ded845a7SHarry Morris 	bytes_not_copied = copy_to_user(buf, fifo_buffer, bytes_not_copied);
2555ded845a7SHarry Morris 	if (bytes_not_copied > 0) {
2556ded845a7SHarry Morris 		dev_err(
2557ded845a7SHarry Morris 			&priv->spi->dev,
2558ded845a7SHarry Morris 			"%lu bytes could not be copied to user space!\n",
2559ded845a7SHarry Morris 			bytes_not_copied
2560ded845a7SHarry Morris 		);
2561ded845a7SHarry Morris 	}
2562ded845a7SHarry Morris 
2563ded845a7SHarry Morris 	dev_dbg(&priv->spi->dev, "test_interface: Cmd len = %d\n", cmdlen);
2564ded845a7SHarry Morris 
2565ded845a7SHarry Morris 	dev_dbg(&priv->spi->dev, "test_interface: Read\n");
2566ded845a7SHarry Morris 	for (i = 0; i < cmdlen + 2; i++)
2567ded845a7SHarry Morris 		dev_dbg(&priv->spi->dev, "%#03x\n", fifo_buffer[i]);
2568ded845a7SHarry Morris 
2569ded845a7SHarry Morris 	kfree(fifo_buffer);
2570ded845a7SHarry Morris 
2571ded845a7SHarry Morris 	return cmdlen + 2;
2572ded845a7SHarry Morris }
2573ded845a7SHarry Morris 
2574ded845a7SHarry Morris /**
2575ded845a7SHarry Morris  * ca8210_test_int_ioctl() - Called by a process in userspace to enact an
2576ded845a7SHarry Morris  *                           arbitrary action
2577ded845a7SHarry Morris  * @filp:        file interface
2578ded845a7SHarry Morris  * @ioctl_num:   which action to enact
2579ded845a7SHarry Morris  * @ioctl_param: arbitrary parameter for the action
2580ded845a7SHarry Morris  *
2581ded845a7SHarry Morris  * Return: status
2582ded845a7SHarry Morris  */
ca8210_test_int_ioctl(struct file * filp,unsigned int ioctl_num,unsigned long ioctl_param)2583ded845a7SHarry Morris static long ca8210_test_int_ioctl(
2584ded845a7SHarry Morris 	struct file *filp,
2585ded845a7SHarry Morris 	unsigned int ioctl_num,
2586ded845a7SHarry Morris 	unsigned long ioctl_param
2587ded845a7SHarry Morris )
2588ded845a7SHarry Morris {
2589ded845a7SHarry Morris 	struct ca8210_priv *priv = filp->private_data;
2590ded845a7SHarry Morris 
2591ded845a7SHarry Morris 	switch (ioctl_num) {
2592ded845a7SHarry Morris 	case CA8210_IOCTL_HARD_RESET:
2593ded845a7SHarry Morris 		ca8210_reset_send(priv->spi, ioctl_param);
2594ded845a7SHarry Morris 		break;
2595ded845a7SHarry Morris 	default:
2596ded845a7SHarry Morris 		break;
2597ded845a7SHarry Morris 	}
2598ded845a7SHarry Morris 	return 0;
2599ded845a7SHarry Morris }
2600ded845a7SHarry Morris 
2601ded845a7SHarry Morris /**
2602ded845a7SHarry Morris  * ca8210_test_int_poll() - Called by a process in userspace to determine which
2603ded845a7SHarry Morris  *                          actions are currently possible for the file
2604ded845a7SHarry Morris  * @filp:   file interface
2605ded845a7SHarry Morris  * @ptable: poll table
2606ded845a7SHarry Morris  *
2607ded845a7SHarry Morris  * Return: set of poll return flags
2608ded845a7SHarry Morris  */
ca8210_test_int_poll(struct file * filp,struct poll_table_struct * ptable)2609afc9a42bSAl Viro static __poll_t ca8210_test_int_poll(
2610ded845a7SHarry Morris 	struct file *filp,
2611ded845a7SHarry Morris 	struct poll_table_struct *ptable
2612ded845a7SHarry Morris )
2613ded845a7SHarry Morris {
2614afc9a42bSAl Viro 	__poll_t return_flags = 0;
2615ded845a7SHarry Morris 	struct ca8210_priv *priv = filp->private_data;
2616ded845a7SHarry Morris 
2617ded845a7SHarry Morris 	poll_wait(filp, &priv->test.readq, ptable);
2618ded845a7SHarry Morris 	if (!kfifo_is_empty(&priv->test.up_fifo))
2619a9a08845SLinus Torvalds 		return_flags |= (EPOLLIN | EPOLLRDNORM);
2620ded845a7SHarry Morris 	if (wait_event_interruptible(
2621ded845a7SHarry Morris 		priv->test.readq,
2622ded845a7SHarry Morris 		!kfifo_is_empty(&priv->test.up_fifo))) {
2623a9a08845SLinus Torvalds 		return EPOLLERR;
2624ded845a7SHarry Morris 	}
2625ded845a7SHarry Morris 	return return_flags;
2626ded845a7SHarry Morris }
2627ded845a7SHarry Morris 
2628ded845a7SHarry Morris static const struct file_operations test_int_fops = {
2629ded845a7SHarry Morris 	.read =           ca8210_test_int_user_read,
2630ded845a7SHarry Morris 	.write =          ca8210_test_int_user_write,
2631ded845a7SHarry Morris 	.open =           ca8210_test_int_open,
2632ded845a7SHarry Morris 	.release =        NULL,
2633ded845a7SHarry Morris 	.unlocked_ioctl = ca8210_test_int_ioctl,
2634ded845a7SHarry Morris 	.poll =           ca8210_test_int_poll
2635ded845a7SHarry Morris };
2636ded845a7SHarry Morris 
2637ded845a7SHarry Morris /* Init/Deinit */
2638ded845a7SHarry Morris 
2639ded845a7SHarry Morris /**
2640ded845a7SHarry Morris  * ca8210_get_platform_data() - Populate a ca8210_platform_data object
2641ded845a7SHarry Morris  * @spi_device:  Pointer to ca8210 spi device object to get data for
2642ded845a7SHarry Morris  * @pdata:       Pointer to ca8210_platform_data object to populate
2643ded845a7SHarry Morris  *
2644ded845a7SHarry Morris  * Return: 0 or linux error code
2645ded845a7SHarry Morris  */
ca8210_get_platform_data(struct spi_device * spi_device,struct ca8210_platform_data * pdata)2646ded845a7SHarry Morris static int ca8210_get_platform_data(
2647ded845a7SHarry Morris 	struct spi_device *spi_device,
2648ded845a7SHarry Morris 	struct ca8210_platform_data *pdata
2649ded845a7SHarry Morris )
2650ded845a7SHarry Morris {
2651ded845a7SHarry Morris 	int ret = 0;
2652ded845a7SHarry Morris 
2653ded845a7SHarry Morris 	if (!spi_device->dev.of_node)
2654ded845a7SHarry Morris 		return -EINVAL;
2655ded845a7SHarry Morris 
2656ded845a7SHarry Morris 	pdata->extclockenable = of_property_read_bool(
2657ded845a7SHarry Morris 		spi_device->dev.of_node,
2658ded845a7SHarry Morris 		"extclock-enable"
2659ded845a7SHarry Morris 	);
2660ded845a7SHarry Morris 	if (pdata->extclockenable) {
2661ded845a7SHarry Morris 		ret = of_property_read_u32(
2662ded845a7SHarry Morris 			spi_device->dev.of_node,
2663ded845a7SHarry Morris 			"extclock-freq",
2664ded845a7SHarry Morris 			&pdata->extclockfreq
2665ded845a7SHarry Morris 		);
2666ded845a7SHarry Morris 		if (ret < 0)
2667ded845a7SHarry Morris 			return ret;
2668ded845a7SHarry Morris 
2669ded845a7SHarry Morris 		ret = of_property_read_u32(
2670ded845a7SHarry Morris 			spi_device->dev.of_node,
2671ded845a7SHarry Morris 			"extclock-gpio",
2672ded845a7SHarry Morris 			&pdata->extclockgpio
2673ded845a7SHarry Morris 		);
2674ded845a7SHarry Morris 	}
2675ded845a7SHarry Morris 
2676ded845a7SHarry Morris 	return ret;
2677ded845a7SHarry Morris }
2678ded845a7SHarry Morris 
2679ded845a7SHarry Morris /**
2680ded845a7SHarry Morris  * ca8210_config_extern_clk() - Configure the external clock provided by the
2681ded845a7SHarry Morris  *                              ca8210
2682ded845a7SHarry Morris  * @pdata:  Pointer to ca8210_platform_data containing clock parameters
2683ded845a7SHarry Morris  * @spi:    Pointer to target ca8210 spi device
2684ded845a7SHarry Morris  * @on:	    True to turn the clock on, false to turn off
2685ded845a7SHarry Morris  *
2686ded845a7SHarry Morris  * The external clock is configured with a frequency and output pin taken from
2687ded845a7SHarry Morris  * the platform data.
2688ded845a7SHarry Morris  *
2689ded845a7SHarry Morris  * Return: 0 or linux error code
2690ded845a7SHarry Morris  */
ca8210_config_extern_clk(struct ca8210_platform_data * pdata,struct spi_device * spi,bool on)2691ded845a7SHarry Morris static int ca8210_config_extern_clk(
2692ded845a7SHarry Morris 	struct ca8210_platform_data *pdata,
2693ded845a7SHarry Morris 	struct spi_device *spi,
2694ded845a7SHarry Morris 	bool on
2695ded845a7SHarry Morris )
2696ded845a7SHarry Morris {
2697ded845a7SHarry Morris 	u8 clkparam[2];
2698ded845a7SHarry Morris 
2699ded845a7SHarry Morris 	if (on) {
2700ded845a7SHarry Morris 		dev_info(&spi->dev, "Switching external clock on\n");
2701ded845a7SHarry Morris 		switch (pdata->extclockfreq) {
2702ded845a7SHarry Morris 		case SIXTEEN_MHZ:
2703ded845a7SHarry Morris 			clkparam[0] = 1;
2704ded845a7SHarry Morris 			break;
2705ded845a7SHarry Morris 		case EIGHT_MHZ:
2706ded845a7SHarry Morris 			clkparam[0] = 2;
2707ded845a7SHarry Morris 			break;
2708ded845a7SHarry Morris 		case FOUR_MHZ:
2709ded845a7SHarry Morris 			clkparam[0] = 3;
2710ded845a7SHarry Morris 			break;
2711ded845a7SHarry Morris 		case TWO_MHZ:
2712ded845a7SHarry Morris 			clkparam[0] = 4;
2713ded845a7SHarry Morris 			break;
2714ded845a7SHarry Morris 		case ONE_MHZ:
2715ded845a7SHarry Morris 			clkparam[0] = 5;
2716ded845a7SHarry Morris 			break;
2717ded845a7SHarry Morris 		default:
2718ded845a7SHarry Morris 			dev_crit(&spi->dev, "Invalid extclock-freq\n");
2719ded845a7SHarry Morris 			return -EINVAL;
2720ded845a7SHarry Morris 		}
2721ded845a7SHarry Morris 		clkparam[1] = pdata->extclockgpio;
2722ded845a7SHarry Morris 	} else {
2723ded845a7SHarry Morris 		dev_info(&spi->dev, "Switching external clock off\n");
2724ded845a7SHarry Morris 		clkparam[0] = 0; /* off */
2725ded845a7SHarry Morris 		clkparam[1] = 0;
2726ded845a7SHarry Morris 	}
2727ded845a7SHarry Morris 	return link_to_linux_err(
2728ded845a7SHarry Morris 		hwme_set_request_sync(HWME_SYSCLKOUT, 2, clkparam, spi)
2729ded845a7SHarry Morris 	);
2730ded845a7SHarry Morris }
2731ded845a7SHarry Morris 
2732ded845a7SHarry Morris /**
2733ded845a7SHarry Morris  * ca8210_register_ext_clock() - Register ca8210's external clock with kernel
2734ded845a7SHarry Morris  * @spi:  Pointer to target ca8210 spi device
2735ded845a7SHarry Morris  *
2736ded845a7SHarry Morris  * Return: 0 or linux error code
2737ded845a7SHarry Morris  */
ca8210_register_ext_clock(struct spi_device * spi)2738ded845a7SHarry Morris static int ca8210_register_ext_clock(struct spi_device *spi)
2739ded845a7SHarry Morris {
2740ded845a7SHarry Morris 	struct device_node *np = spi->dev.of_node;
2741ded845a7SHarry Morris 	struct ca8210_priv *priv = spi_get_drvdata(spi);
2742ded845a7SHarry Morris 	struct ca8210_platform_data *pdata = spi->dev.platform_data;
2743ded845a7SHarry Morris 
2744ded845a7SHarry Morris 	if (!np)
2745ded845a7SHarry Morris 		return -EFAULT;
2746ded845a7SHarry Morris 
2747ded845a7SHarry Morris 	priv->clk = clk_register_fixed_rate(
2748ded845a7SHarry Morris 		&spi->dev,
2749ded845a7SHarry Morris 		np->name,
2750ded845a7SHarry Morris 		NULL,
2751ded845a7SHarry Morris 		0,
2752ded845a7SHarry Morris 		pdata->extclockfreq
2753ded845a7SHarry Morris 	);
2754ded845a7SHarry Morris 
2755ded845a7SHarry Morris 	if (IS_ERR(priv->clk)) {
2756ded845a7SHarry Morris 		dev_crit(&spi->dev, "Failed to register external clk\n");
2757ded845a7SHarry Morris 		return PTR_ERR(priv->clk);
2758ded845a7SHarry Morris 	}
2759ded845a7SHarry Morris 
2760f990874bSDinghao Liu 	return of_clk_add_provider(np, of_clk_src_simple_get, priv->clk);
2761ded845a7SHarry Morris }
2762ded845a7SHarry Morris 
2763ded845a7SHarry Morris /**
2764ded845a7SHarry Morris  * ca8210_unregister_ext_clock() - Unregister ca8210's external clock with
2765ded845a7SHarry Morris  *                                 kernel
2766ded845a7SHarry Morris  * @spi:  Pointer to target ca8210 spi device
2767ded845a7SHarry Morris  */
ca8210_unregister_ext_clock(struct spi_device * spi)2768ded845a7SHarry Morris static void ca8210_unregister_ext_clock(struct spi_device *spi)
2769ded845a7SHarry Morris {
2770ded845a7SHarry Morris 	struct ca8210_priv *priv = spi_get_drvdata(spi);
2771ded845a7SHarry Morris 
2772f990874bSDinghao Liu 	if (IS_ERR_OR_NULL(priv->clk))
2773f990874bSDinghao Liu 		return;
2774ded845a7SHarry Morris 
2775ded845a7SHarry Morris 	of_clk_del_provider(spi->dev.of_node);
2776ded845a7SHarry Morris 	clk_unregister(priv->clk);
2777ded845a7SHarry Morris 	dev_info(&spi->dev, "External clock unregistered\n");
2778ded845a7SHarry Morris }
2779ded845a7SHarry Morris 
2780ded845a7SHarry Morris /**
2781ded845a7SHarry Morris  * ca8210_reset_init() - Initialise the reset input to the ca8210
2782ded845a7SHarry Morris  * @spi:  Pointer to target ca8210 spi device
2783ded845a7SHarry Morris  *
2784ded845a7SHarry Morris  * Return: 0 or linux error code
2785ded845a7SHarry Morris  */
ca8210_reset_init(struct spi_device * spi)2786ded845a7SHarry Morris static int ca8210_reset_init(struct spi_device *spi)
2787ded845a7SHarry Morris {
2788ded845a7SHarry Morris 	int ret;
2789ded845a7SHarry Morris 	struct ca8210_platform_data *pdata = spi->dev.platform_data;
2790ded845a7SHarry Morris 
2791ded845a7SHarry Morris 	pdata->gpio_reset = of_get_named_gpio(
2792ded845a7SHarry Morris 		spi->dev.of_node,
2793ded845a7SHarry Morris 		"reset-gpio",
2794ded845a7SHarry Morris 		0
2795ded845a7SHarry Morris 	);
2796ded845a7SHarry Morris 
2797ded845a7SHarry Morris 	ret = gpio_direction_output(pdata->gpio_reset, 1);
2798ded845a7SHarry Morris 	if (ret < 0) {
2799ded845a7SHarry Morris 		dev_crit(
2800ded845a7SHarry Morris 			&spi->dev,
2801ded845a7SHarry Morris 			"Reset GPIO %d did not set to output mode\n",
2802ded845a7SHarry Morris 			pdata->gpio_reset
2803ded845a7SHarry Morris 		);
2804ded845a7SHarry Morris 	}
2805ded845a7SHarry Morris 
2806ded845a7SHarry Morris 	return ret;
2807ded845a7SHarry Morris }
2808ded845a7SHarry Morris 
2809ded845a7SHarry Morris /**
2810ded845a7SHarry Morris  * ca8210_interrupt_init() - Initialise the irq output from the ca8210
2811ded845a7SHarry Morris  * @spi:  Pointer to target ca8210 spi device
2812ded845a7SHarry Morris  *
2813ded845a7SHarry Morris  * Return: 0 or linux error code
2814ded845a7SHarry Morris  */
ca8210_interrupt_init(struct spi_device * spi)2815ded845a7SHarry Morris static int ca8210_interrupt_init(struct spi_device *spi)
2816ded845a7SHarry Morris {
2817ded845a7SHarry Morris 	int ret;
2818ded845a7SHarry Morris 	struct ca8210_platform_data *pdata = spi->dev.platform_data;
2819ded845a7SHarry Morris 
2820ded845a7SHarry Morris 	pdata->gpio_irq = of_get_named_gpio(
2821ded845a7SHarry Morris 		spi->dev.of_node,
2822ded845a7SHarry Morris 		"irq-gpio",
2823ded845a7SHarry Morris 		0
2824ded845a7SHarry Morris 	);
2825ded845a7SHarry Morris 
2826ded845a7SHarry Morris 	pdata->irq_id = gpio_to_irq(pdata->gpio_irq);
2827ded845a7SHarry Morris 	if (pdata->irq_id < 0) {
2828ded845a7SHarry Morris 		dev_crit(
2829ded845a7SHarry Morris 			&spi->dev,
2830ded845a7SHarry Morris 			"Could not get irq for gpio pin %d\n",
2831ded845a7SHarry Morris 			pdata->gpio_irq
2832ded845a7SHarry Morris 		);
2833ded845a7SHarry Morris 		gpio_free(pdata->gpio_irq);
2834ded845a7SHarry Morris 		return pdata->irq_id;
2835ded845a7SHarry Morris 	}
2836ded845a7SHarry Morris 
2837ded845a7SHarry Morris 	ret = request_irq(
2838ded845a7SHarry Morris 		pdata->irq_id,
2839ded845a7SHarry Morris 		ca8210_interrupt_handler,
2840ded845a7SHarry Morris 		IRQF_TRIGGER_FALLING,
2841ded845a7SHarry Morris 		"ca8210-irq",
2842ded845a7SHarry Morris 		spi_get_drvdata(spi)
2843ded845a7SHarry Morris 	);
2844ded845a7SHarry Morris 	if (ret) {
2845ded845a7SHarry Morris 		dev_crit(&spi->dev, "request_irq %d failed\n", pdata->irq_id);
2846ded845a7SHarry Morris 		gpio_free(pdata->gpio_irq);
2847ded845a7SHarry Morris 	}
2848ded845a7SHarry Morris 
2849ded845a7SHarry Morris 	return ret;
2850ded845a7SHarry Morris }
2851ded845a7SHarry Morris 
2852ded845a7SHarry Morris /**
2853ded845a7SHarry Morris  * ca8210_dev_com_init() - Initialise the spi communication component
2854ded845a7SHarry Morris  * @priv:  Pointer to private data structure
2855ded845a7SHarry Morris  *
2856ded845a7SHarry Morris  * Return: 0 or linux error code
2857ded845a7SHarry Morris  */
ca8210_dev_com_init(struct ca8210_priv * priv)2858ded845a7SHarry Morris static int ca8210_dev_com_init(struct ca8210_priv *priv)
2859ded845a7SHarry Morris {
2860ded845a7SHarry Morris 	priv->mlme_workqueue = alloc_ordered_workqueue(
2861ded845a7SHarry Morris 		"MLME work queue",
2862ded845a7SHarry Morris 		WQ_UNBOUND
2863ded845a7SHarry Morris 	);
2864ded845a7SHarry Morris 	if (!priv->mlme_workqueue) {
2865ded845a7SHarry Morris 		dev_crit(&priv->spi->dev, "alloc of mlme_workqueue failed!\n");
2866ded845a7SHarry Morris 		return -ENOMEM;
2867ded845a7SHarry Morris 	}
2868ded845a7SHarry Morris 
2869ded845a7SHarry Morris 	priv->irq_workqueue = alloc_ordered_workqueue(
2870ded845a7SHarry Morris 		"ca8210 irq worker",
2871ded845a7SHarry Morris 		WQ_UNBOUND
2872ded845a7SHarry Morris 	);
2873ded845a7SHarry Morris 	if (!priv->irq_workqueue) {
2874ded845a7SHarry Morris 		dev_crit(&priv->spi->dev, "alloc of irq_workqueue failed!\n");
287588f46b3fSLiu Jian 		destroy_workqueue(priv->mlme_workqueue);
2876ded845a7SHarry Morris 		return -ENOMEM;
2877ded845a7SHarry Morris 	}
2878ded845a7SHarry Morris 
2879ded845a7SHarry Morris 	return 0;
2880ded845a7SHarry Morris }
2881ded845a7SHarry Morris 
2882ded845a7SHarry Morris /**
2883ded845a7SHarry Morris  * ca8210_dev_com_clear() - Deinitialise the spi communication component
2884ded845a7SHarry Morris  * @priv:  Pointer to private data structure
2885ded845a7SHarry Morris  */
ca8210_dev_com_clear(struct ca8210_priv * priv)2886ded845a7SHarry Morris static void ca8210_dev_com_clear(struct ca8210_priv *priv)
2887ded845a7SHarry Morris {
2888ded845a7SHarry Morris 	destroy_workqueue(priv->mlme_workqueue);
2889ded845a7SHarry Morris 	destroy_workqueue(priv->irq_workqueue);
2890ded845a7SHarry Morris }
2891ded845a7SHarry Morris 
2892ded845a7SHarry Morris #define CA8210_MAX_TX_POWERS (9)
2893ded845a7SHarry Morris static const s32 ca8210_tx_powers[CA8210_MAX_TX_POWERS] = {
2894ded845a7SHarry Morris 	800, 700, 600, 500, 400, 300, 200, 100, 0
2895ded845a7SHarry Morris };
2896ded845a7SHarry Morris 
2897ded845a7SHarry Morris #define CA8210_MAX_ED_LEVELS (21)
2898ded845a7SHarry Morris static const s32 ca8210_ed_levels[CA8210_MAX_ED_LEVELS] = {
2899ded845a7SHarry Morris 	-10300, -10250, -10200, -10150, -10100, -10050, -10000, -9950, -9900,
2900ded845a7SHarry Morris 	-9850, -9800, -9750, -9700, -9650, -9600, -9550, -9500, -9450, -9400,
2901ded845a7SHarry Morris 	-9350, -9300
2902ded845a7SHarry Morris };
2903ded845a7SHarry Morris 
2904ded845a7SHarry Morris /**
2905ded845a7SHarry Morris  * ca8210_hw_setup() - Populate the ieee802154_hw phy attributes with the
2906ded845a7SHarry Morris  *                     ca8210's defaults
2907ded845a7SHarry Morris  * @ca8210_hw:  Pointer to ieee802154_hw to populate
2908ded845a7SHarry Morris  */
ca8210_hw_setup(struct ieee802154_hw * ca8210_hw)2909ded845a7SHarry Morris static void ca8210_hw_setup(struct ieee802154_hw *ca8210_hw)
2910ded845a7SHarry Morris {
2911ded845a7SHarry Morris 	/* Support channels 11-26 */
2912ded845a7SHarry Morris 	ca8210_hw->phy->supported.channels[0] = CA8210_VALID_CHANNELS;
2913ded845a7SHarry Morris 	ca8210_hw->phy->supported.tx_powers_size = CA8210_MAX_TX_POWERS;
2914ded845a7SHarry Morris 	ca8210_hw->phy->supported.tx_powers = ca8210_tx_powers;
2915ded845a7SHarry Morris 	ca8210_hw->phy->supported.cca_ed_levels_size = CA8210_MAX_ED_LEVELS;
2916ded845a7SHarry Morris 	ca8210_hw->phy->supported.cca_ed_levels = ca8210_ed_levels;
2917ded845a7SHarry Morris 	ca8210_hw->phy->current_channel = 18;
2918ded845a7SHarry Morris 	ca8210_hw->phy->current_page = 0;
2919ded845a7SHarry Morris 	ca8210_hw->phy->transmit_power = 800;
2920ded845a7SHarry Morris 	ca8210_hw->phy->cca.mode = NL802154_CCA_ENERGY_CARRIER;
2921ded845a7SHarry Morris 	ca8210_hw->phy->cca.opt = NL802154_CCA_OPT_ENERGY_CARRIER_AND;
2922ded845a7SHarry Morris 	ca8210_hw->phy->cca_ed_level = -9800;
2923ded845a7SHarry Morris 	ca8210_hw->phy->symbol_duration = 16;
2924bdc120a2SMiquel Raynal 	ca8210_hw->phy->lifs_period = 40 * ca8210_hw->phy->symbol_duration;
2925bdc120a2SMiquel Raynal 	ca8210_hw->phy->sifs_period = 12 * ca8210_hw->phy->symbol_duration;
2926ded845a7SHarry Morris 	ca8210_hw->flags =
2927ded845a7SHarry Morris 		IEEE802154_HW_AFILT |
2928ded845a7SHarry Morris 		IEEE802154_HW_OMIT_CKSUM |
2929ded845a7SHarry Morris 		IEEE802154_HW_FRAME_RETRIES |
2930ded845a7SHarry Morris 		IEEE802154_HW_PROMISCUOUS |
2931ded845a7SHarry Morris 		IEEE802154_HW_CSMA_PARAMS;
2932ded845a7SHarry Morris 	ca8210_hw->phy->flags =
2933ded845a7SHarry Morris 		WPAN_PHY_FLAG_TXPOWER |
2934ded845a7SHarry Morris 		WPAN_PHY_FLAG_CCA_ED_LEVEL |
29351af3de62SMiquel Raynal 		WPAN_PHY_FLAG_CCA_MODE |
29361af3de62SMiquel Raynal 		WPAN_PHY_FLAG_DATAGRAMS_ONLY;
2937ded845a7SHarry Morris }
2938ded845a7SHarry Morris 
2939ded845a7SHarry Morris /**
2940ded845a7SHarry Morris  * ca8210_test_interface_init() - Initialise the test file interface
2941ded845a7SHarry Morris  * @priv:  Pointer to private data structure
2942ded845a7SHarry Morris  *
2943ded845a7SHarry Morris  * Provided as an alternative to the standard linux network interface, the test
2944ded845a7SHarry Morris  * interface exposes a file in the filesystem (ca8210_test) that allows
2945ded845a7SHarry Morris  * 802.15.4 SAP Commands and Cascoda EVBME commands to be sent directly to
2946ded845a7SHarry Morris  * the stack.
2947ded845a7SHarry Morris  *
2948ded845a7SHarry Morris  * Return: 0 or linux error code
2949ded845a7SHarry Morris  */
ca8210_test_interface_init(struct ca8210_priv * priv)2950ded845a7SHarry Morris static int ca8210_test_interface_init(struct ca8210_priv *priv)
2951ded845a7SHarry Morris {
2952ded845a7SHarry Morris 	struct ca8210_test *test = &priv->test;
2953ded845a7SHarry Morris 	char node_name[32];
2954ded845a7SHarry Morris 
2955ded845a7SHarry Morris 	snprintf(
2956ded845a7SHarry Morris 		node_name,
2957ded845a7SHarry Morris 		sizeof(node_name),
2958ded845a7SHarry Morris 		"ca8210@%d_%d",
2959ded845a7SHarry Morris 		priv->spi->master->bus_num,
296025fd0550SAmit Kumar Mahapatra 		spi_get_chipselect(priv->spi, 0)
2961ded845a7SHarry Morris 	);
2962ded845a7SHarry Morris 
2963ded845a7SHarry Morris 	test->ca8210_dfs_spi_int = debugfs_create_file(
2964ded845a7SHarry Morris 		node_name,
2965ded845a7SHarry Morris 		0600, /* S_IRUSR | S_IWUSR */
2966ded845a7SHarry Morris 		NULL,
2967ded845a7SHarry Morris 		priv,
2968ded845a7SHarry Morris 		&test_int_fops
2969ded845a7SHarry Morris 	);
29707e174a49SGreg Kroah-Hartman 
2971ded845a7SHarry Morris 	debugfs_create_symlink("ca8210", NULL, node_name);
2972ded845a7SHarry Morris 	init_waitqueue_head(&test->readq);
2973ded845a7SHarry Morris 	return kfifo_alloc(
2974ded845a7SHarry Morris 		&test->up_fifo,
2975ded845a7SHarry Morris 		CA8210_TEST_INT_FIFO_SIZE,
2976ded845a7SHarry Morris 		GFP_KERNEL
2977ded845a7SHarry Morris 	);
2978ded845a7SHarry Morris }
2979ded845a7SHarry Morris 
2980ded845a7SHarry Morris /**
2981ded845a7SHarry Morris  * ca8210_test_interface_clear() - Deinitialise the test file interface
2982ded845a7SHarry Morris  * @priv:  Pointer to private data structure
2983ded845a7SHarry Morris  */
ca8210_test_interface_clear(struct ca8210_priv * priv)2984ded845a7SHarry Morris static void ca8210_test_interface_clear(struct ca8210_priv *priv)
2985ded845a7SHarry Morris {
2986ded845a7SHarry Morris 	struct ca8210_test *test = &priv->test;
2987ded845a7SHarry Morris 
2988ded845a7SHarry Morris 	debugfs_remove(test->ca8210_dfs_spi_int);
2989ded845a7SHarry Morris 	kfifo_free(&test->up_fifo);
2990ded845a7SHarry Morris 	dev_info(&priv->spi->dev, "Test interface removed\n");
2991ded845a7SHarry Morris }
2992ded845a7SHarry Morris 
2993ded845a7SHarry Morris /**
2994ded845a7SHarry Morris  * ca8210_remove() - Shut down a ca8210 upon being disconnected
2995c8f638b7SLee Jones  * @spi_device:  Pointer to spi device data structure
2996ded845a7SHarry Morris  *
2997ded845a7SHarry Morris  * Return: 0 or linux error code
2998ded845a7SHarry Morris  */
ca8210_remove(struct spi_device * spi_device)2999a0386bbaSUwe Kleine-König static void ca8210_remove(struct spi_device *spi_device)
3000ded845a7SHarry Morris {
3001ded845a7SHarry Morris 	struct ca8210_priv *priv;
3002ded845a7SHarry Morris 	struct ca8210_platform_data *pdata;
3003ded845a7SHarry Morris 
3004ded845a7SHarry Morris 	dev_info(&spi_device->dev, "Removing ca8210\n");
3005ded845a7SHarry Morris 
3006ded845a7SHarry Morris 	pdata = spi_device->dev.platform_data;
3007ded845a7SHarry Morris 	if (pdata) {
3008ded845a7SHarry Morris 		if (pdata->extclockenable) {
3009ded845a7SHarry Morris 			ca8210_unregister_ext_clock(spi_device);
3010ded845a7SHarry Morris 			ca8210_config_extern_clk(pdata, spi_device, 0);
3011ded845a7SHarry Morris 		}
3012ded845a7SHarry Morris 		free_irq(pdata->irq_id, spi_device->dev.driver_data);
3013ded845a7SHarry Morris 		kfree(pdata);
3014ded845a7SHarry Morris 		spi_device->dev.platform_data = NULL;
3015ded845a7SHarry Morris 	}
3016ded845a7SHarry Morris 	/* get spi_device private data */
3017ded845a7SHarry Morris 	priv = spi_get_drvdata(spi_device);
3018ded845a7SHarry Morris 	if (priv) {
3019ded845a7SHarry Morris 		dev_info(
3020ded845a7SHarry Morris 			&spi_device->dev,
3021ded845a7SHarry Morris 			"sync_down = %d, sync_up = %d\n",
3022ded845a7SHarry Morris 			priv->sync_down,
3023ded845a7SHarry Morris 			priv->sync_up
3024ded845a7SHarry Morris 		);
3025ded845a7SHarry Morris 		ca8210_dev_com_clear(spi_device->dev.driver_data);
3026ded845a7SHarry Morris 		if (priv->hw) {
3027ded845a7SHarry Morris 			if (priv->hw_registered)
3028ded845a7SHarry Morris 				ieee802154_unregister_hw(priv->hw);
3029ded845a7SHarry Morris 			ieee802154_free_hw(priv->hw);
3030ded845a7SHarry Morris 			priv->hw = NULL;
3031ded845a7SHarry Morris 			dev_info(
3032ded845a7SHarry Morris 				&spi_device->dev,
3033ded845a7SHarry Morris 				"Unregistered & freed ieee802154_hw.\n"
3034ded845a7SHarry Morris 			);
3035ded845a7SHarry Morris 		}
3036ded845a7SHarry Morris 		if (IS_ENABLED(CONFIG_IEEE802154_CA8210_DEBUGFS))
3037ded845a7SHarry Morris 			ca8210_test_interface_clear(priv);
3038ded845a7SHarry Morris 	}
3039ded845a7SHarry Morris }
3040ded845a7SHarry Morris 
3041ded845a7SHarry Morris /**
3042ded845a7SHarry Morris  * ca8210_probe() - Set up a connected ca8210 upon being detected by the system
3043c8f638b7SLee Jones  * @spi_device:  Pointer to spi device data structure
3044ded845a7SHarry Morris  *
3045ded845a7SHarry Morris  * Return: 0 or linux error code
3046ded845a7SHarry Morris  */
ca8210_probe(struct spi_device * spi_device)3047ded845a7SHarry Morris static int ca8210_probe(struct spi_device *spi_device)
3048ded845a7SHarry Morris {
3049ded845a7SHarry Morris 	struct ca8210_priv *priv;
3050ded845a7SHarry Morris 	struct ieee802154_hw *hw;
3051ded845a7SHarry Morris 	struct ca8210_platform_data *pdata;
3052ded845a7SHarry Morris 	int ret;
3053ded845a7SHarry Morris 
3054ded845a7SHarry Morris 	dev_info(&spi_device->dev, "Inserting ca8210\n");
3055ded845a7SHarry Morris 
3056ded845a7SHarry Morris 	/* allocate ieee802154_hw and private data */
3057ded845a7SHarry Morris 	hw = ieee802154_alloc_hw(sizeof(struct ca8210_priv), &ca8210_phy_ops);
3058ded845a7SHarry Morris 	if (!hw) {
3059ded845a7SHarry Morris 		dev_crit(&spi_device->dev, "ieee802154_alloc_hw failed\n");
3060ded845a7SHarry Morris 		ret = -ENOMEM;
3061ded845a7SHarry Morris 		goto error;
3062ded845a7SHarry Morris 	}
3063ded845a7SHarry Morris 
3064ded845a7SHarry Morris 	priv = hw->priv;
3065ded845a7SHarry Morris 	priv->hw = hw;
3066ded845a7SHarry Morris 	priv->spi = spi_device;
3067ded845a7SHarry Morris 	hw->parent = &spi_device->dev;
3068ded845a7SHarry Morris 	spin_lock_init(&priv->lock);
3069ded845a7SHarry Morris 	priv->async_tx_pending = false;
3070ded845a7SHarry Morris 	priv->hw_registered = false;
3071ded845a7SHarry Morris 	priv->sync_up = 0;
3072ded845a7SHarry Morris 	priv->sync_down = 0;
3073ded845a7SHarry Morris 	priv->promiscuous = false;
3074ded845a7SHarry Morris 	priv->retries = 0;
3075ded845a7SHarry Morris 	init_completion(&priv->ca8210_is_awake);
3076ded845a7SHarry Morris 	init_completion(&priv->spi_transfer_complete);
3077ded845a7SHarry Morris 	init_completion(&priv->sync_exchange_complete);
3078ded845a7SHarry Morris 	spi_set_drvdata(priv->spi, priv);
3079ded845a7SHarry Morris 	if (IS_ENABLED(CONFIG_IEEE802154_CA8210_DEBUGFS)) {
3080ded845a7SHarry Morris 		cascoda_api_upstream = ca8210_test_int_driver_write;
3081*45ae076dSKeisuke Nishimura 		ret = ca8210_test_interface_init(priv);
3082*45ae076dSKeisuke Nishimura 		if (ret) {
3083*45ae076dSKeisuke Nishimura 			dev_crit(&spi_device->dev, "ca8210_test_interface_init failed\n");
3084*45ae076dSKeisuke Nishimura 			goto error;
3085*45ae076dSKeisuke Nishimura 		}
3086ded845a7SHarry Morris 	} else {
3087ded845a7SHarry Morris 		cascoda_api_upstream = NULL;
3088ded845a7SHarry Morris 	}
3089ded845a7SHarry Morris 	ca8210_hw_setup(hw);
3090ded845a7SHarry Morris 	ieee802154_random_extended_addr(&hw->phy->perm_extended_addr);
3091ded845a7SHarry Morris 
3092ded845a7SHarry Morris 	pdata = kmalloc(sizeof(*pdata), GFP_KERNEL);
3093ded845a7SHarry Morris 	if (!pdata) {
3094ded845a7SHarry Morris 		ret = -ENOMEM;
3095ded845a7SHarry Morris 		goto error;
3096ded845a7SHarry Morris 	}
3097ded845a7SHarry Morris 
30986402939eSNavid Emamdoost 	priv->spi->dev.platform_data = pdata;
3099ded845a7SHarry Morris 	ret = ca8210_get_platform_data(priv->spi, pdata);
3100ded845a7SHarry Morris 	if (ret) {
3101ded845a7SHarry Morris 		dev_crit(&spi_device->dev, "ca8210_get_platform_data failed\n");
3102ded845a7SHarry Morris 		goto error;
3103ded845a7SHarry Morris 	}
3104ded845a7SHarry Morris 
3105ded845a7SHarry Morris 	ret = ca8210_dev_com_init(priv);
3106ded845a7SHarry Morris 	if (ret) {
3107ded845a7SHarry Morris 		dev_crit(&spi_device->dev, "ca8210_dev_com_init failed\n");
3108ded845a7SHarry Morris 		goto error;
3109ded845a7SHarry Morris 	}
3110ded845a7SHarry Morris 	ret = ca8210_reset_init(priv->spi);
3111ded845a7SHarry Morris 	if (ret) {
3112ded845a7SHarry Morris 		dev_crit(&spi_device->dev, "ca8210_reset_init failed\n");
3113ded845a7SHarry Morris 		goto error;
3114ded845a7SHarry Morris 	}
3115ded845a7SHarry Morris 
3116ded845a7SHarry Morris 	ret = ca8210_interrupt_init(priv->spi);
3117ded845a7SHarry Morris 	if (ret) {
3118ded845a7SHarry Morris 		dev_crit(&spi_device->dev, "ca8210_interrupt_init failed\n");
3119ded845a7SHarry Morris 		goto error;
3120ded845a7SHarry Morris 	}
3121ded845a7SHarry Morris 
3122ded845a7SHarry Morris 	msleep(100);
3123ded845a7SHarry Morris 
3124ded845a7SHarry Morris 	ca8210_reset_send(priv->spi, 1);
3125ded845a7SHarry Morris 
3126ded845a7SHarry Morris 	ret = tdme_chipinit(priv->spi);
3127ded845a7SHarry Morris 	if (ret) {
3128ded845a7SHarry Morris 		dev_crit(&spi_device->dev, "tdme_chipinit failed\n");
3129ded845a7SHarry Morris 		goto error;
3130ded845a7SHarry Morris 	}
3131ded845a7SHarry Morris 
3132ded845a7SHarry Morris 	if (pdata->extclockenable) {
3133ded845a7SHarry Morris 		ret = ca8210_config_extern_clk(pdata, priv->spi, 1);
3134ded845a7SHarry Morris 		if (ret) {
3135ded845a7SHarry Morris 			dev_crit(
3136ded845a7SHarry Morris 				&spi_device->dev,
3137ded845a7SHarry Morris 				"ca8210_config_extern_clk failed\n"
3138ded845a7SHarry Morris 			);
3139ded845a7SHarry Morris 			goto error;
3140ded845a7SHarry Morris 		}
3141ded845a7SHarry Morris 		ret = ca8210_register_ext_clock(priv->spi);
3142ded845a7SHarry Morris 		if (ret) {
3143ded845a7SHarry Morris 			dev_crit(
3144ded845a7SHarry Morris 				&spi_device->dev,
3145ded845a7SHarry Morris 				"ca8210_register_ext_clock failed\n"
3146ded845a7SHarry Morris 			);
3147ded845a7SHarry Morris 			goto error;
3148ded845a7SHarry Morris 		}
3149ded845a7SHarry Morris 	}
3150ded845a7SHarry Morris 
3151ded845a7SHarry Morris 	ret = ieee802154_register_hw(hw);
3152ded845a7SHarry Morris 	if (ret) {
3153ded845a7SHarry Morris 		dev_crit(&spi_device->dev, "ieee802154_register_hw failed\n");
3154ded845a7SHarry Morris 		goto error;
3155ded845a7SHarry Morris 	}
3156ded845a7SHarry Morris 	priv->hw_registered = true;
3157ded845a7SHarry Morris 
3158ded845a7SHarry Morris 	return 0;
3159ded845a7SHarry Morris error:
3160ded845a7SHarry Morris 	msleep(100); /* wait for pending spi transfers to complete */
3161ded845a7SHarry Morris 	ca8210_remove(spi_device);
3162ded845a7SHarry Morris 	return link_to_linux_err(ret);
3163ded845a7SHarry Morris }
3164ded845a7SHarry Morris 
3165ded845a7SHarry Morris static const struct of_device_id ca8210_of_ids[] = {
3166ded845a7SHarry Morris 	{.compatible = "cascoda,ca8210", },
3167ded845a7SHarry Morris 	{},
3168ded845a7SHarry Morris };
3169ded845a7SHarry Morris MODULE_DEVICE_TABLE(of, ca8210_of_ids);
3170ded845a7SHarry Morris 
3171ded845a7SHarry Morris static struct spi_driver ca8210_spi_driver = {
3172ded845a7SHarry Morris 	.driver = {
3173ded845a7SHarry Morris 		.name =                 DRIVER_NAME,
3174cdfe4fc4SKrzysztof Kozlowski 		.of_match_table =       ca8210_of_ids,
3175ded845a7SHarry Morris 	},
3176ded845a7SHarry Morris 	.probe  =                       ca8210_probe,
3177ded845a7SHarry Morris 	.remove =                       ca8210_remove
3178ded845a7SHarry Morris };
3179ded845a7SHarry Morris 
3180ded845a7SHarry Morris module_spi_driver(ca8210_spi_driver);
3181ded845a7SHarry Morris 
3182ded845a7SHarry Morris MODULE_AUTHOR("Harry Morris <h.morris@cascoda.com>");
3183ded845a7SHarry Morris MODULE_DESCRIPTION("CA-8210 SoftMAC driver");
3184ded845a7SHarry Morris MODULE_LICENSE("Dual BSD/GPL");
3185ded845a7SHarry Morris MODULE_VERSION("1.0");
3186