1 /*****************************************************************************/ 2 3 /* 4 * baycom_epp.c -- baycom epp radio modem driver. 5 * 6 * Copyright (C) 1998-2000 7 * Thomas Sailer (sailer@ife.ee.ethz.ch) 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 22 * 23 * Please note that the GPL allows you to use the driver, NOT the radio. 24 * In order to use the radio, you need a license from the communications 25 * authority of your country. 26 * 27 * 28 * History: 29 * 0.1 xx.xx.1998 Initial version by Matthias Welwarsky (dg2fef) 30 * 0.2 21.04.1998 Massive rework by Thomas Sailer 31 * Integrated FPGA EPP modem configuration routines 32 * 0.3 11.05.1998 Took FPGA config out and moved it into a separate program 33 * 0.4 26.07.1999 Adapted to new lowlevel parport driver interface 34 * 0.5 03.08.1999 adapt to Linus' new __setup/__initcall 35 * removed some pre-2.2 kernel compatibility cruft 36 * 0.6 10.08.1999 Check if parport can do SPP and is safe to access during interrupt contexts 37 * 0.7 12.02.2000 adapted to softnet driver interface 38 * 39 */ 40 41 /*****************************************************************************/ 42 43 #include <linux/config.h> 44 #include <linux/module.h> 45 #include <linux/kernel.h> 46 #include <linux/init.h> 47 #include <linux/string.h> 48 #include <linux/workqueue.h> 49 #include <linux/fs.h> 50 #include <linux/parport.h> 51 #include <linux/smp_lock.h> 52 #include <asm/uaccess.h> 53 #include <linux/if_arp.h> 54 #include <linux/kmod.h> 55 #include <linux/hdlcdrv.h> 56 #include <linux/baycom.h> 57 #if defined(CONFIG_AX25) || defined(CONFIG_AX25_MODULE) 58 /* prototypes for ax25_encapsulate and ax25_rebuild_header */ 59 #include <net/ax25.h> 60 #endif /* CONFIG_AX25 || CONFIG_AX25_MODULE */ 61 #include <linux/crc-ccitt.h> 62 63 /* --------------------------------------------------------------------- */ 64 65 #define BAYCOM_DEBUG 66 #define BAYCOM_MAGIC 19730510 67 68 /* --------------------------------------------------------------------- */ 69 70 static const char paranoia_str[] = KERN_ERR 71 "baycom_epp: bad magic number for hdlcdrv_state struct in routine %s\n"; 72 73 static const char bc_drvname[] = "baycom_epp"; 74 static const char bc_drvinfo[] = KERN_INFO "baycom_epp: (C) 1998-2000 Thomas Sailer, HB9JNX/AE4WA\n" 75 KERN_INFO "baycom_epp: version 0.7 compiled " __TIME__ " " __DATE__ "\n"; 76 77 /* --------------------------------------------------------------------- */ 78 79 #define NR_PORTS 4 80 81 static struct net_device *baycom_device[NR_PORTS]; 82 83 /* --------------------------------------------------------------------- */ 84 85 /* EPP status register */ 86 #define EPP_DCDBIT 0x80 87 #define EPP_PTTBIT 0x08 88 #define EPP_NREF 0x01 89 #define EPP_NRAEF 0x02 90 #define EPP_NRHF 0x04 91 #define EPP_NTHF 0x20 92 #define EPP_NTAEF 0x10 93 #define EPP_NTEF EPP_PTTBIT 94 95 /* EPP control register */ 96 #define EPP_TX_FIFO_ENABLE 0x10 97 #define EPP_RX_FIFO_ENABLE 0x08 98 #define EPP_MODEM_ENABLE 0x20 99 #define EPP_LEDS 0xC0 100 #define EPP_IRQ_ENABLE 0x10 101 102 /* LPT registers */ 103 #define LPTREG_ECONTROL 0x402 104 #define LPTREG_CONFIGB 0x401 105 #define LPTREG_CONFIGA 0x400 106 #define LPTREG_EPPDATA 0x004 107 #define LPTREG_EPPADDR 0x003 108 #define LPTREG_CONTROL 0x002 109 #define LPTREG_STATUS 0x001 110 #define LPTREG_DATA 0x000 111 112 /* LPT control register */ 113 #define LPTCTRL_PROGRAM 0x04 /* 0 to reprogram */ 114 #define LPTCTRL_WRITE 0x01 115 #define LPTCTRL_ADDRSTB 0x08 116 #define LPTCTRL_DATASTB 0x02 117 #define LPTCTRL_INTEN 0x10 118 119 /* LPT status register */ 120 #define LPTSTAT_SHIFT_NINTR 6 121 #define LPTSTAT_WAIT 0x80 122 #define LPTSTAT_NINTR (1<<LPTSTAT_SHIFT_NINTR) 123 #define LPTSTAT_PE 0x20 124 #define LPTSTAT_DONE 0x10 125 #define LPTSTAT_NERROR 0x08 126 #define LPTSTAT_EPPTIMEOUT 0x01 127 128 /* LPT data register */ 129 #define LPTDATA_SHIFT_TDI 0 130 #define LPTDATA_SHIFT_TMS 2 131 #define LPTDATA_TDI (1<<LPTDATA_SHIFT_TDI) 132 #define LPTDATA_TCK 0x02 133 #define LPTDATA_TMS (1<<LPTDATA_SHIFT_TMS) 134 #define LPTDATA_INITBIAS 0x80 135 136 137 /* EPP modem config/status bits */ 138 #define EPP_DCDBIT 0x80 139 #define EPP_PTTBIT 0x08 140 #define EPP_RXEBIT 0x01 141 #define EPP_RXAEBIT 0x02 142 #define EPP_RXHFULL 0x04 143 144 #define EPP_NTHF 0x20 145 #define EPP_NTAEF 0x10 146 #define EPP_NTEF EPP_PTTBIT 147 148 #define EPP_TX_FIFO_ENABLE 0x10 149 #define EPP_RX_FIFO_ENABLE 0x08 150 #define EPP_MODEM_ENABLE 0x20 151 #define EPP_LEDS 0xC0 152 #define EPP_IRQ_ENABLE 0x10 153 154 /* Xilinx 4k JTAG instructions */ 155 #define XC4K_IRLENGTH 3 156 #define XC4K_EXTEST 0 157 #define XC4K_PRELOAD 1 158 #define XC4K_CONFIGURE 5 159 #define XC4K_BYPASS 7 160 161 #define EPP_CONVENTIONAL 0 162 #define EPP_FPGA 1 163 #define EPP_FPGAEXTSTATUS 2 164 165 #define TXBUFFER_SIZE ((HDLCDRV_MAXFLEN*6/5)+8) 166 167 /* ---------------------------------------------------------------------- */ 168 /* 169 * Information that need to be kept for each board. 170 */ 171 172 struct baycom_state { 173 int magic; 174 175 struct pardevice *pdev; 176 unsigned int work_running; 177 struct work_struct run_work; 178 unsigned int modem; 179 unsigned int bitrate; 180 unsigned char stat; 181 182 struct { 183 unsigned int intclk; 184 unsigned int fclk; 185 unsigned int bps; 186 unsigned int extmodem; 187 unsigned int loopback; 188 } cfg; 189 190 struct hdlcdrv_channel_params ch_params; 191 192 struct { 193 unsigned int bitbuf, bitstream, numbits, state; 194 unsigned char *bufptr; 195 int bufcnt; 196 unsigned char buf[TXBUFFER_SIZE]; 197 } hdlcrx; 198 199 struct { 200 int calibrate; 201 int slotcnt; 202 int flags; 203 enum { tx_idle = 0, tx_keyup, tx_data, tx_tail } state; 204 unsigned char *bufptr; 205 int bufcnt; 206 unsigned char buf[TXBUFFER_SIZE]; 207 } hdlctx; 208 209 struct net_device_stats stats; 210 unsigned int ptt_keyed; 211 struct sk_buff *skb; /* next transmit packet */ 212 213 #ifdef BAYCOM_DEBUG 214 struct debug_vals { 215 unsigned long last_jiffies; 216 unsigned cur_intcnt; 217 unsigned last_intcnt; 218 int cur_pllcorr; 219 int last_pllcorr; 220 unsigned int mod_cycles; 221 unsigned int demod_cycles; 222 } debug_vals; 223 #endif /* BAYCOM_DEBUG */ 224 }; 225 226 /* --------------------------------------------------------------------- */ 227 228 #define KISS_VERBOSE 229 230 /* --------------------------------------------------------------------- */ 231 232 #define PARAM_TXDELAY 1 233 #define PARAM_PERSIST 2 234 #define PARAM_SLOTTIME 3 235 #define PARAM_TXTAIL 4 236 #define PARAM_FULLDUP 5 237 #define PARAM_HARDWARE 6 238 #define PARAM_RETURN 255 239 240 /* --------------------------------------------------------------------- */ 241 /* 242 * the CRC routines are stolen from WAMPES 243 * by Dieter Deyke 244 */ 245 246 247 /*---------------------------------------------------------------------------*/ 248 249 #if 0 250 static inline void append_crc_ccitt(unsigned char *buffer, int len) 251 { 252 unsigned int crc = 0xffff; 253 254 for (;len>0;len--) 255 crc = (crc >> 8) ^ crc_ccitt_table[(crc ^ *buffer++) & 0xff]; 256 crc ^= 0xffff; 257 *buffer++ = crc; 258 *buffer++ = crc >> 8; 259 } 260 #endif 261 262 /*---------------------------------------------------------------------------*/ 263 264 static inline int check_crc_ccitt(const unsigned char *buf, int cnt) 265 { 266 return (crc_ccitt(0xffff, buf, cnt) & 0xffff) == 0xf0b8; 267 } 268 269 /*---------------------------------------------------------------------------*/ 270 271 static inline int calc_crc_ccitt(const unsigned char *buf, int cnt) 272 { 273 return (crc_ccitt(0xffff, buf, cnt) ^ 0xffff) & 0xffff; 274 } 275 276 /* ---------------------------------------------------------------------- */ 277 278 #define tenms_to_flags(bc,tenms) ((tenms * bc->bitrate) / 800) 279 280 /* --------------------------------------------------------------------- */ 281 282 static inline void baycom_int_freq(struct baycom_state *bc) 283 { 284 #ifdef BAYCOM_DEBUG 285 unsigned long cur_jiffies = jiffies; 286 /* 287 * measure the interrupt frequency 288 */ 289 bc->debug_vals.cur_intcnt++; 290 if ((cur_jiffies - bc->debug_vals.last_jiffies) >= HZ) { 291 bc->debug_vals.last_jiffies = cur_jiffies; 292 bc->debug_vals.last_intcnt = bc->debug_vals.cur_intcnt; 293 bc->debug_vals.cur_intcnt = 0; 294 bc->debug_vals.last_pllcorr = bc->debug_vals.cur_pllcorr; 295 bc->debug_vals.cur_pllcorr = 0; 296 } 297 #endif /* BAYCOM_DEBUG */ 298 } 299 300 /* ---------------------------------------------------------------------- */ 301 /* 302 * eppconfig_path should be setable via /proc/sys. 303 */ 304 305 static char eppconfig_path[256] = "/usr/sbin/eppfpga"; 306 307 static char *envp[] = { "HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL }; 308 309 /* eppconfig: called during ifconfig up to configure the modem */ 310 static int eppconfig(struct baycom_state *bc) 311 { 312 char modearg[256]; 313 char portarg[16]; 314 char *argv[] = { eppconfig_path, "-s", "-p", portarg, "-m", modearg, 315 NULL }; 316 317 /* set up arguments */ 318 sprintf(modearg, "%sclk,%smodem,fclk=%d,bps=%d,divider=%d%s,extstat", 319 bc->cfg.intclk ? "int" : "ext", 320 bc->cfg.extmodem ? "ext" : "int", bc->cfg.fclk, bc->cfg.bps, 321 (bc->cfg.fclk + 8 * bc->cfg.bps) / (16 * bc->cfg.bps), 322 bc->cfg.loopback ? ",loopback" : ""); 323 sprintf(portarg, "%ld", bc->pdev->port->base); 324 printk(KERN_DEBUG "%s: %s -s -p %s -m %s\n", bc_drvname, eppconfig_path, portarg, modearg); 325 326 return call_usermodehelper(eppconfig_path, argv, envp, 1); 327 } 328 329 /* ---------------------------------------------------------------------- */ 330 331 static void epp_interrupt(int irq, void *dev_id, struct pt_regs *regs) 332 { 333 } 334 335 /* ---------------------------------------------------------------------- */ 336 337 static inline void do_kiss_params(struct baycom_state *bc, 338 unsigned char *data, unsigned long len) 339 { 340 341 #ifdef KISS_VERBOSE 342 #define PKP(a,b) printk(KERN_INFO "baycomm_epp: channel params: " a "\n", b) 343 #else /* KISS_VERBOSE */ 344 #define PKP(a,b) 345 #endif /* KISS_VERBOSE */ 346 347 if (len < 2) 348 return; 349 switch(data[0]) { 350 case PARAM_TXDELAY: 351 bc->ch_params.tx_delay = data[1]; 352 PKP("TX delay = %ums", 10 * bc->ch_params.tx_delay); 353 break; 354 case PARAM_PERSIST: 355 bc->ch_params.ppersist = data[1]; 356 PKP("p persistence = %u", bc->ch_params.ppersist); 357 break; 358 case PARAM_SLOTTIME: 359 bc->ch_params.slottime = data[1]; 360 PKP("slot time = %ums", bc->ch_params.slottime); 361 break; 362 case PARAM_TXTAIL: 363 bc->ch_params.tx_tail = data[1]; 364 PKP("TX tail = %ums", bc->ch_params.tx_tail); 365 break; 366 case PARAM_FULLDUP: 367 bc->ch_params.fulldup = !!data[1]; 368 PKP("%s duplex", bc->ch_params.fulldup ? "full" : "half"); 369 break; 370 default: 371 break; 372 } 373 #undef PKP 374 } 375 376 /* --------------------------------------------------------------------- */ 377 /* 378 * high performance HDLC encoder 379 * yes, it's ugly, but generates pretty good code 380 */ 381 382 #define ENCODEITERA(j) \ 383 ({ \ 384 if (!(notbitstream & (0x1f0 << j))) \ 385 goto stuff##j; \ 386 encodeend##j: ; \ 387 }) 388 389 #define ENCODEITERB(j) \ 390 ({ \ 391 stuff##j: \ 392 bitstream &= ~(0x100 << j); \ 393 bitbuf = (bitbuf & (((2 << j) << numbit) - 1)) | \ 394 ((bitbuf & ~(((2 << j) << numbit) - 1)) << 1); \ 395 numbit++; \ 396 notbitstream = ~bitstream; \ 397 goto encodeend##j; \ 398 }) 399 400 401 static void encode_hdlc(struct baycom_state *bc) 402 { 403 struct sk_buff *skb; 404 unsigned char *wp, *bp; 405 int pkt_len; 406 unsigned bitstream, notbitstream, bitbuf, numbit, crc; 407 unsigned char crcarr[2]; 408 409 if (bc->hdlctx.bufcnt > 0) 410 return; 411 skb = bc->skb; 412 if (!skb) 413 return; 414 bc->skb = NULL; 415 pkt_len = skb->len-1; /* strip KISS byte */ 416 wp = bc->hdlctx.buf; 417 bp = skb->data+1; 418 crc = calc_crc_ccitt(bp, pkt_len); 419 crcarr[0] = crc; 420 crcarr[1] = crc >> 8; 421 *wp++ = 0x7e; 422 bitstream = bitbuf = numbit = 0; 423 while (pkt_len > -2) { 424 bitstream >>= 8; 425 bitstream |= ((unsigned int)*bp) << 8; 426 bitbuf |= ((unsigned int)*bp) << numbit; 427 notbitstream = ~bitstream; 428 bp++; 429 pkt_len--; 430 if (!pkt_len) 431 bp = crcarr; 432 ENCODEITERA(0); 433 ENCODEITERA(1); 434 ENCODEITERA(2); 435 ENCODEITERA(3); 436 ENCODEITERA(4); 437 ENCODEITERA(5); 438 ENCODEITERA(6); 439 ENCODEITERA(7); 440 goto enditer; 441 ENCODEITERB(0); 442 ENCODEITERB(1); 443 ENCODEITERB(2); 444 ENCODEITERB(3); 445 ENCODEITERB(4); 446 ENCODEITERB(5); 447 ENCODEITERB(6); 448 ENCODEITERB(7); 449 enditer: 450 numbit += 8; 451 while (numbit >= 8) { 452 *wp++ = bitbuf; 453 bitbuf >>= 8; 454 numbit -= 8; 455 } 456 } 457 bitbuf |= 0x7e7e << numbit; 458 numbit += 16; 459 while (numbit >= 8) { 460 *wp++ = bitbuf; 461 bitbuf >>= 8; 462 numbit -= 8; 463 } 464 bc->hdlctx.bufptr = bc->hdlctx.buf; 465 bc->hdlctx.bufcnt = wp - bc->hdlctx.buf; 466 dev_kfree_skb(skb); 467 bc->stats.tx_packets++; 468 } 469 470 /* ---------------------------------------------------------------------- */ 471 472 static unsigned short random_seed; 473 474 static inline unsigned short random_num(void) 475 { 476 random_seed = 28629 * random_seed + 157; 477 return random_seed; 478 } 479 480 /* ---------------------------------------------------------------------- */ 481 482 static int transmit(struct baycom_state *bc, int cnt, unsigned char stat) 483 { 484 struct parport *pp = bc->pdev->port; 485 unsigned char tmp[128]; 486 int i, j; 487 488 if (bc->hdlctx.state == tx_tail && !(stat & EPP_PTTBIT)) 489 bc->hdlctx.state = tx_idle; 490 if (bc->hdlctx.state == tx_idle && bc->hdlctx.calibrate <= 0) { 491 if (bc->hdlctx.bufcnt <= 0) 492 encode_hdlc(bc); 493 if (bc->hdlctx.bufcnt <= 0) 494 return 0; 495 if (!bc->ch_params.fulldup) { 496 if (!(stat & EPP_DCDBIT)) { 497 bc->hdlctx.slotcnt = bc->ch_params.slottime; 498 return 0; 499 } 500 if ((--bc->hdlctx.slotcnt) > 0) 501 return 0; 502 bc->hdlctx.slotcnt = bc->ch_params.slottime; 503 if ((random_num() % 256) > bc->ch_params.ppersist) 504 return 0; 505 } 506 } 507 if (bc->hdlctx.state == tx_idle && bc->hdlctx.bufcnt > 0) { 508 bc->hdlctx.state = tx_keyup; 509 bc->hdlctx.flags = tenms_to_flags(bc, bc->ch_params.tx_delay); 510 bc->ptt_keyed++; 511 } 512 while (cnt > 0) { 513 switch (bc->hdlctx.state) { 514 case tx_keyup: 515 i = min_t(int, cnt, bc->hdlctx.flags); 516 cnt -= i; 517 bc->hdlctx.flags -= i; 518 if (bc->hdlctx.flags <= 0) 519 bc->hdlctx.state = tx_data; 520 memset(tmp, 0x7e, sizeof(tmp)); 521 while (i > 0) { 522 j = (i > sizeof(tmp)) ? sizeof(tmp) : i; 523 if (j != pp->ops->epp_write_data(pp, tmp, j, 0)) 524 return -1; 525 i -= j; 526 } 527 break; 528 529 case tx_data: 530 if (bc->hdlctx.bufcnt <= 0) { 531 encode_hdlc(bc); 532 if (bc->hdlctx.bufcnt <= 0) { 533 bc->hdlctx.state = tx_tail; 534 bc->hdlctx.flags = tenms_to_flags(bc, bc->ch_params.tx_tail); 535 break; 536 } 537 } 538 i = min_t(int, cnt, bc->hdlctx.bufcnt); 539 bc->hdlctx.bufcnt -= i; 540 cnt -= i; 541 if (i != pp->ops->epp_write_data(pp, bc->hdlctx.bufptr, i, 0)) 542 return -1; 543 bc->hdlctx.bufptr += i; 544 break; 545 546 case tx_tail: 547 encode_hdlc(bc); 548 if (bc->hdlctx.bufcnt > 0) { 549 bc->hdlctx.state = tx_data; 550 break; 551 } 552 i = min_t(int, cnt, bc->hdlctx.flags); 553 if (i) { 554 cnt -= i; 555 bc->hdlctx.flags -= i; 556 memset(tmp, 0x7e, sizeof(tmp)); 557 while (i > 0) { 558 j = (i > sizeof(tmp)) ? sizeof(tmp) : i; 559 if (j != pp->ops->epp_write_data(pp, tmp, j, 0)) 560 return -1; 561 i -= j; 562 } 563 break; 564 } 565 566 default: /* fall through */ 567 if (bc->hdlctx.calibrate <= 0) 568 return 0; 569 i = min_t(int, cnt, bc->hdlctx.calibrate); 570 cnt -= i; 571 bc->hdlctx.calibrate -= i; 572 memset(tmp, 0, sizeof(tmp)); 573 while (i > 0) { 574 j = (i > sizeof(tmp)) ? sizeof(tmp) : i; 575 if (j != pp->ops->epp_write_data(pp, tmp, j, 0)) 576 return -1; 577 i -= j; 578 } 579 break; 580 } 581 } 582 return 0; 583 } 584 585 /* ---------------------------------------------------------------------- */ 586 587 static void do_rxpacket(struct net_device *dev) 588 { 589 struct baycom_state *bc = netdev_priv(dev); 590 struct sk_buff *skb; 591 unsigned char *cp; 592 unsigned pktlen; 593 594 if (bc->hdlcrx.bufcnt < 4) 595 return; 596 if (!check_crc_ccitt(bc->hdlcrx.buf, bc->hdlcrx.bufcnt)) 597 return; 598 pktlen = bc->hdlcrx.bufcnt-2+1; /* KISS kludge */ 599 if (!(skb = dev_alloc_skb(pktlen))) { 600 printk("%s: memory squeeze, dropping packet\n", dev->name); 601 bc->stats.rx_dropped++; 602 return; 603 } 604 skb->dev = dev; 605 cp = skb_put(skb, pktlen); 606 *cp++ = 0; /* KISS kludge */ 607 memcpy(cp, bc->hdlcrx.buf, pktlen - 1); 608 skb->protocol = htons(ETH_P_AX25); 609 skb->mac.raw = skb->data; 610 netif_rx(skb); 611 dev->last_rx = jiffies; 612 bc->stats.rx_packets++; 613 } 614 615 #define DECODEITERA(j) \ 616 ({ \ 617 if (!(notbitstream & (0x0fc << j))) /* flag or abort */ \ 618 goto flgabrt##j; \ 619 if ((bitstream & (0x1f8 << j)) == (0xf8 << j)) /* stuffed bit */ \ 620 goto stuff##j; \ 621 enditer##j: ; \ 622 }) 623 624 #define DECODEITERB(j) \ 625 ({ \ 626 flgabrt##j: \ 627 if (!(notbitstream & (0x1fc << j))) { /* abort received */ \ 628 state = 0; \ 629 goto enditer##j; \ 630 } \ 631 if ((bitstream & (0x1fe << j)) != (0x0fc << j)) /* flag received */ \ 632 goto enditer##j; \ 633 if (state) \ 634 do_rxpacket(dev); \ 635 bc->hdlcrx.bufcnt = 0; \ 636 bc->hdlcrx.bufptr = bc->hdlcrx.buf; \ 637 state = 1; \ 638 numbits = 7-j; \ 639 goto enditer##j; \ 640 stuff##j: \ 641 numbits--; \ 642 bitbuf = (bitbuf & ((~0xff) << j)) | ((bitbuf & ~((~0xff) << j)) << 1); \ 643 goto enditer##j; \ 644 }) 645 646 static int receive(struct net_device *dev, int cnt) 647 { 648 struct baycom_state *bc = netdev_priv(dev); 649 struct parport *pp = bc->pdev->port; 650 unsigned int bitbuf, notbitstream, bitstream, numbits, state; 651 unsigned char tmp[128]; 652 unsigned char *cp; 653 int cnt2, ret = 0; 654 655 numbits = bc->hdlcrx.numbits; 656 state = bc->hdlcrx.state; 657 bitstream = bc->hdlcrx.bitstream; 658 bitbuf = bc->hdlcrx.bitbuf; 659 while (cnt > 0) { 660 cnt2 = (cnt > sizeof(tmp)) ? sizeof(tmp) : cnt; 661 cnt -= cnt2; 662 if (cnt2 != pp->ops->epp_read_data(pp, tmp, cnt2, 0)) { 663 ret = -1; 664 break; 665 } 666 cp = tmp; 667 for (; cnt2 > 0; cnt2--, cp++) { 668 bitstream >>= 8; 669 bitstream |= (*cp) << 8; 670 bitbuf >>= 8; 671 bitbuf |= (*cp) << 8; 672 numbits += 8; 673 notbitstream = ~bitstream; 674 DECODEITERA(0); 675 DECODEITERA(1); 676 DECODEITERA(2); 677 DECODEITERA(3); 678 DECODEITERA(4); 679 DECODEITERA(5); 680 DECODEITERA(6); 681 DECODEITERA(7); 682 goto enddec; 683 DECODEITERB(0); 684 DECODEITERB(1); 685 DECODEITERB(2); 686 DECODEITERB(3); 687 DECODEITERB(4); 688 DECODEITERB(5); 689 DECODEITERB(6); 690 DECODEITERB(7); 691 enddec: 692 while (state && numbits >= 8) { 693 if (bc->hdlcrx.bufcnt >= TXBUFFER_SIZE) { 694 state = 0; 695 } else { 696 *(bc->hdlcrx.bufptr)++ = bitbuf >> (16-numbits); 697 bc->hdlcrx.bufcnt++; 698 numbits -= 8; 699 } 700 } 701 } 702 } 703 bc->hdlcrx.numbits = numbits; 704 bc->hdlcrx.state = state; 705 bc->hdlcrx.bitstream = bitstream; 706 bc->hdlcrx.bitbuf = bitbuf; 707 return ret; 708 } 709 710 /* --------------------------------------------------------------------- */ 711 712 #ifdef __i386__ 713 #include <asm/msr.h> 714 #define GETTICK(x) \ 715 ({ \ 716 if (cpu_has_tsc) \ 717 rdtscl(x); \ 718 }) 719 #else /* __i386__ */ 720 #define GETTICK(x) 721 #endif /* __i386__ */ 722 723 static void epp_bh(struct net_device *dev) 724 { 725 struct baycom_state *bc; 726 struct parport *pp; 727 unsigned char stat; 728 unsigned char tmp[2]; 729 unsigned int time1 = 0, time2 = 0, time3 = 0; 730 int cnt, cnt2; 731 732 bc = netdev_priv(dev); 733 if (!bc->work_running) 734 return; 735 baycom_int_freq(bc); 736 pp = bc->pdev->port; 737 /* update status */ 738 if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1) 739 goto epptimeout; 740 bc->stat = stat; 741 bc->debug_vals.last_pllcorr = stat; 742 GETTICK(time1); 743 if (bc->modem == EPP_FPGAEXTSTATUS) { 744 /* get input count */ 745 tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE|1; 746 if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1) 747 goto epptimeout; 748 if (pp->ops->epp_read_addr(pp, tmp, 2, 0) != 2) 749 goto epptimeout; 750 cnt = tmp[0] | (tmp[1] << 8); 751 cnt &= 0x7fff; 752 /* get output count */ 753 tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE|2; 754 if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1) 755 goto epptimeout; 756 if (pp->ops->epp_read_addr(pp, tmp, 2, 0) != 2) 757 goto epptimeout; 758 cnt2 = tmp[0] | (tmp[1] << 8); 759 cnt2 = 16384 - (cnt2 & 0x7fff); 760 /* return to normal */ 761 tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE; 762 if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1) 763 goto epptimeout; 764 if (transmit(bc, cnt2, stat)) 765 goto epptimeout; 766 GETTICK(time2); 767 if (receive(dev, cnt)) 768 goto epptimeout; 769 if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1) 770 goto epptimeout; 771 bc->stat = stat; 772 } else { 773 /* try to tx */ 774 switch (stat & (EPP_NTAEF|EPP_NTHF)) { 775 case EPP_NTHF: 776 cnt = 2048 - 256; 777 break; 778 779 case EPP_NTAEF: 780 cnt = 2048 - 1793; 781 break; 782 783 case 0: 784 cnt = 0; 785 break; 786 787 default: 788 cnt = 2048 - 1025; 789 break; 790 } 791 if (transmit(bc, cnt, stat)) 792 goto epptimeout; 793 GETTICK(time2); 794 /* do receiver */ 795 while ((stat & (EPP_NRAEF|EPP_NRHF)) != EPP_NRHF) { 796 switch (stat & (EPP_NRAEF|EPP_NRHF)) { 797 case EPP_NRAEF: 798 cnt = 1025; 799 break; 800 801 case 0: 802 cnt = 1793; 803 break; 804 805 default: 806 cnt = 256; 807 break; 808 } 809 if (receive(dev, cnt)) 810 goto epptimeout; 811 if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1) 812 goto epptimeout; 813 } 814 cnt = 0; 815 if (bc->bitrate < 50000) 816 cnt = 256; 817 else if (bc->bitrate < 100000) 818 cnt = 128; 819 while (cnt > 0 && stat & EPP_NREF) { 820 if (receive(dev, 1)) 821 goto epptimeout; 822 cnt--; 823 if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1) 824 goto epptimeout; 825 } 826 } 827 GETTICK(time3); 828 #ifdef BAYCOM_DEBUG 829 bc->debug_vals.mod_cycles = time2 - time1; 830 bc->debug_vals.demod_cycles = time3 - time2; 831 #endif /* BAYCOM_DEBUG */ 832 schedule_delayed_work(&bc->run_work, 1); 833 if (!bc->skb) 834 netif_wake_queue(dev); 835 return; 836 epptimeout: 837 printk(KERN_ERR "%s: EPP timeout!\n", bc_drvname); 838 } 839 840 /* ---------------------------------------------------------------------- */ 841 /* 842 * ===================== network driver interface ========================= 843 */ 844 845 static int baycom_send_packet(struct sk_buff *skb, struct net_device *dev) 846 { 847 struct baycom_state *bc = netdev_priv(dev); 848 849 if (skb->data[0] != 0) { 850 do_kiss_params(bc, skb->data, skb->len); 851 dev_kfree_skb(skb); 852 return 0; 853 } 854 if (bc->skb) 855 return -1; 856 /* strip KISS byte */ 857 if (skb->len >= HDLCDRV_MAXFLEN+1 || skb->len < 3) { 858 dev_kfree_skb(skb); 859 return 0; 860 } 861 netif_stop_queue(dev); 862 bc->skb = skb; 863 return 0; 864 } 865 866 /* --------------------------------------------------------------------- */ 867 868 static int baycom_set_mac_address(struct net_device *dev, void *addr) 869 { 870 struct sockaddr *sa = (struct sockaddr *)addr; 871 872 /* addr is an AX.25 shifted ASCII mac address */ 873 memcpy(dev->dev_addr, sa->sa_data, dev->addr_len); 874 return 0; 875 } 876 877 /* --------------------------------------------------------------------- */ 878 879 static struct net_device_stats *baycom_get_stats(struct net_device *dev) 880 { 881 struct baycom_state *bc = netdev_priv(dev); 882 883 /* 884 * Get the current statistics. This may be called with the 885 * card open or closed. 886 */ 887 return &bc->stats; 888 } 889 890 /* --------------------------------------------------------------------- */ 891 892 static void epp_wakeup(void *handle) 893 { 894 struct net_device *dev = (struct net_device *)handle; 895 struct baycom_state *bc = netdev_priv(dev); 896 897 printk(KERN_DEBUG "baycom_epp: %s: why am I being woken up?\n", dev->name); 898 if (!parport_claim(bc->pdev)) 899 printk(KERN_DEBUG "baycom_epp: %s: I'm broken.\n", dev->name); 900 } 901 902 /* --------------------------------------------------------------------- */ 903 904 /* 905 * Open/initialize the board. This is called (in the current kernel) 906 * sometime after booting when the 'ifconfig' program is run. 907 * 908 * This routine should set everything up anew at each open, even 909 * registers that "should" only need to be set once at boot, so that 910 * there is non-reboot way to recover if something goes wrong. 911 */ 912 913 static int epp_open(struct net_device *dev) 914 { 915 struct baycom_state *bc = netdev_priv(dev); 916 struct parport *pp = parport_find_base(dev->base_addr); 917 unsigned int i, j; 918 unsigned char tmp[128]; 919 unsigned char stat; 920 unsigned long tstart; 921 922 if (!pp) { 923 printk(KERN_ERR "%s: parport at 0x%lx unknown\n", bc_drvname, dev->base_addr); 924 return -ENXIO; 925 } 926 #if 0 927 if (pp->irq < 0) { 928 printk(KERN_ERR "%s: parport at 0x%lx has no irq\n", bc_drvname, pp->base); 929 parport_put_port(pp); 930 return -ENXIO; 931 } 932 #endif 933 if ((~pp->modes) & (PARPORT_MODE_TRISTATE | PARPORT_MODE_PCSPP | PARPORT_MODE_SAFEININT)) { 934 printk(KERN_ERR "%s: parport at 0x%lx cannot be used\n", 935 bc_drvname, pp->base); 936 parport_put_port(pp); 937 return -EIO; 938 } 939 memset(&bc->modem, 0, sizeof(bc->modem)); 940 bc->pdev = parport_register_device(pp, dev->name, NULL, epp_wakeup, 941 epp_interrupt, PARPORT_DEV_EXCL, dev); 942 parport_put_port(pp); 943 if (!bc->pdev) { 944 printk(KERN_ERR "%s: cannot register parport at 0x%lx\n", bc_drvname, pp->base); 945 return -ENXIO; 946 } 947 if (parport_claim(bc->pdev)) { 948 printk(KERN_ERR "%s: parport at 0x%lx busy\n", bc_drvname, pp->base); 949 parport_unregister_device(bc->pdev); 950 return -EBUSY; 951 } 952 dev->irq = /*pp->irq*/ 0; 953 INIT_WORK(&bc->run_work, (void *)(void *)epp_bh, dev); 954 bc->work_running = 1; 955 bc->modem = EPP_CONVENTIONAL; 956 if (eppconfig(bc)) 957 printk(KERN_INFO "%s: no FPGA detected, assuming conventional EPP modem\n", bc_drvname); 958 else 959 bc->modem = /*EPP_FPGA*/ EPP_FPGAEXTSTATUS; 960 parport_write_control(pp, LPTCTRL_PROGRAM); /* prepare EPP mode; we aren't using interrupts */ 961 /* reset the modem */ 962 tmp[0] = 0; 963 tmp[1] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE; 964 if (pp->ops->epp_write_addr(pp, tmp, 2, 0) != 2) 965 goto epptimeout; 966 /* autoprobe baud rate */ 967 tstart = jiffies; 968 i = 0; 969 while ((signed)(jiffies-tstart-HZ/3) < 0) { 970 if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1) 971 goto epptimeout; 972 if ((stat & (EPP_NRAEF|EPP_NRHF)) == EPP_NRHF) { 973 schedule(); 974 continue; 975 } 976 if (pp->ops->epp_read_data(pp, tmp, 128, 0) != 128) 977 goto epptimeout; 978 if (pp->ops->epp_read_data(pp, tmp, 128, 0) != 128) 979 goto epptimeout; 980 i += 256; 981 } 982 for (j = 0; j < 256; j++) { 983 if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1) 984 goto epptimeout; 985 if (!(stat & EPP_NREF)) 986 break; 987 if (pp->ops->epp_read_data(pp, tmp, 1, 0) != 1) 988 goto epptimeout; 989 i++; 990 } 991 tstart = jiffies - tstart; 992 bc->bitrate = i * (8 * HZ) / tstart; 993 j = 1; 994 i = bc->bitrate >> 3; 995 while (j < 7 && i > 150) { 996 j++; 997 i >>= 1; 998 } 999 printk(KERN_INFO "%s: autoprobed bitrate: %d int divider: %d int rate: %d\n", 1000 bc_drvname, bc->bitrate, j, bc->bitrate >> (j+2)); 1001 tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE/*|j*/; 1002 if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1) 1003 goto epptimeout; 1004 /* 1005 * initialise hdlc variables 1006 */ 1007 bc->hdlcrx.state = 0; 1008 bc->hdlcrx.numbits = 0; 1009 bc->hdlctx.state = tx_idle; 1010 bc->hdlctx.bufcnt = 0; 1011 bc->hdlctx.slotcnt = bc->ch_params.slottime; 1012 bc->hdlctx.calibrate = 0; 1013 /* start the bottom half stuff */ 1014 schedule_delayed_work(&bc->run_work, 1); 1015 netif_start_queue(dev); 1016 return 0; 1017 1018 epptimeout: 1019 printk(KERN_ERR "%s: epp timeout during bitrate probe\n", bc_drvname); 1020 parport_write_control(pp, 0); /* reset the adapter */ 1021 parport_release(bc->pdev); 1022 parport_unregister_device(bc->pdev); 1023 return -EIO; 1024 } 1025 1026 /* --------------------------------------------------------------------- */ 1027 1028 static int epp_close(struct net_device *dev) 1029 { 1030 struct baycom_state *bc = netdev_priv(dev); 1031 struct parport *pp = bc->pdev->port; 1032 unsigned char tmp[1]; 1033 1034 bc->work_running = 0; 1035 flush_scheduled_work(); 1036 bc->stat = EPP_DCDBIT; 1037 tmp[0] = 0; 1038 pp->ops->epp_write_addr(pp, tmp, 1, 0); 1039 parport_write_control(pp, 0); /* reset the adapter */ 1040 parport_release(bc->pdev); 1041 parport_unregister_device(bc->pdev); 1042 if (bc->skb) 1043 dev_kfree_skb(bc->skb); 1044 bc->skb = NULL; 1045 printk(KERN_INFO "%s: close epp at iobase 0x%lx irq %u\n", 1046 bc_drvname, dev->base_addr, dev->irq); 1047 return 0; 1048 } 1049 1050 /* --------------------------------------------------------------------- */ 1051 1052 static int baycom_setmode(struct baycom_state *bc, const char *modestr) 1053 { 1054 const char *cp; 1055 1056 if (strstr(modestr,"intclk")) 1057 bc->cfg.intclk = 1; 1058 if (strstr(modestr,"extclk")) 1059 bc->cfg.intclk = 0; 1060 if (strstr(modestr,"intmodem")) 1061 bc->cfg.extmodem = 0; 1062 if (strstr(modestr,"extmodem")) 1063 bc->cfg.extmodem = 1; 1064 if (strstr(modestr,"noloopback")) 1065 bc->cfg.loopback = 0; 1066 if (strstr(modestr,"loopback")) 1067 bc->cfg.loopback = 1; 1068 if ((cp = strstr(modestr,"fclk="))) { 1069 bc->cfg.fclk = simple_strtoul(cp+5, NULL, 0); 1070 if (bc->cfg.fclk < 1000000) 1071 bc->cfg.fclk = 1000000; 1072 if (bc->cfg.fclk > 25000000) 1073 bc->cfg.fclk = 25000000; 1074 } 1075 if ((cp = strstr(modestr,"bps="))) { 1076 bc->cfg.bps = simple_strtoul(cp+4, NULL, 0); 1077 if (bc->cfg.bps < 1000) 1078 bc->cfg.bps = 1000; 1079 if (bc->cfg.bps > 1500000) 1080 bc->cfg.bps = 1500000; 1081 } 1082 return 0; 1083 } 1084 1085 /* --------------------------------------------------------------------- */ 1086 1087 static int baycom_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) 1088 { 1089 struct baycom_state *bc = netdev_priv(dev); 1090 struct hdlcdrv_ioctl hi; 1091 1092 if (cmd != SIOCDEVPRIVATE) 1093 return -ENOIOCTLCMD; 1094 1095 if (copy_from_user(&hi, ifr->ifr_data, sizeof(hi))) 1096 return -EFAULT; 1097 switch (hi.cmd) { 1098 default: 1099 return -ENOIOCTLCMD; 1100 1101 case HDLCDRVCTL_GETCHANNELPAR: 1102 hi.data.cp.tx_delay = bc->ch_params.tx_delay; 1103 hi.data.cp.tx_tail = bc->ch_params.tx_tail; 1104 hi.data.cp.slottime = bc->ch_params.slottime; 1105 hi.data.cp.ppersist = bc->ch_params.ppersist; 1106 hi.data.cp.fulldup = bc->ch_params.fulldup; 1107 break; 1108 1109 case HDLCDRVCTL_SETCHANNELPAR: 1110 if (!capable(CAP_NET_ADMIN)) 1111 return -EACCES; 1112 bc->ch_params.tx_delay = hi.data.cp.tx_delay; 1113 bc->ch_params.tx_tail = hi.data.cp.tx_tail; 1114 bc->ch_params.slottime = hi.data.cp.slottime; 1115 bc->ch_params.ppersist = hi.data.cp.ppersist; 1116 bc->ch_params.fulldup = hi.data.cp.fulldup; 1117 bc->hdlctx.slotcnt = 1; 1118 return 0; 1119 1120 case HDLCDRVCTL_GETMODEMPAR: 1121 hi.data.mp.iobase = dev->base_addr; 1122 hi.data.mp.irq = dev->irq; 1123 hi.data.mp.dma = dev->dma; 1124 hi.data.mp.dma2 = 0; 1125 hi.data.mp.seriobase = 0; 1126 hi.data.mp.pariobase = 0; 1127 hi.data.mp.midiiobase = 0; 1128 break; 1129 1130 case HDLCDRVCTL_SETMODEMPAR: 1131 if ((!capable(CAP_SYS_RAWIO)) || netif_running(dev)) 1132 return -EACCES; 1133 dev->base_addr = hi.data.mp.iobase; 1134 dev->irq = /*hi.data.mp.irq*/0; 1135 dev->dma = /*hi.data.mp.dma*/0; 1136 return 0; 1137 1138 case HDLCDRVCTL_GETSTAT: 1139 hi.data.cs.ptt = !!(bc->stat & EPP_PTTBIT); 1140 hi.data.cs.dcd = !(bc->stat & EPP_DCDBIT); 1141 hi.data.cs.ptt_keyed = bc->ptt_keyed; 1142 hi.data.cs.tx_packets = bc->stats.tx_packets; 1143 hi.data.cs.tx_errors = bc->stats.tx_errors; 1144 hi.data.cs.rx_packets = bc->stats.rx_packets; 1145 hi.data.cs.rx_errors = bc->stats.rx_errors; 1146 break; 1147 1148 case HDLCDRVCTL_OLDGETSTAT: 1149 hi.data.ocs.ptt = !!(bc->stat & EPP_PTTBIT); 1150 hi.data.ocs.dcd = !(bc->stat & EPP_DCDBIT); 1151 hi.data.ocs.ptt_keyed = bc->ptt_keyed; 1152 break; 1153 1154 case HDLCDRVCTL_CALIBRATE: 1155 if (!capable(CAP_SYS_RAWIO)) 1156 return -EACCES; 1157 bc->hdlctx.calibrate = hi.data.calibrate * bc->bitrate / 8; 1158 return 0; 1159 1160 case HDLCDRVCTL_DRIVERNAME: 1161 strncpy(hi.data.drivername, "baycom_epp", sizeof(hi.data.drivername)); 1162 break; 1163 1164 case HDLCDRVCTL_GETMODE: 1165 sprintf(hi.data.modename, "%sclk,%smodem,fclk=%d,bps=%d%s", 1166 bc->cfg.intclk ? "int" : "ext", 1167 bc->cfg.extmodem ? "ext" : "int", bc->cfg.fclk, bc->cfg.bps, 1168 bc->cfg.loopback ? ",loopback" : ""); 1169 break; 1170 1171 case HDLCDRVCTL_SETMODE: 1172 if (!capable(CAP_NET_ADMIN) || netif_running(dev)) 1173 return -EACCES; 1174 hi.data.modename[sizeof(hi.data.modename)-1] = '\0'; 1175 return baycom_setmode(bc, hi.data.modename); 1176 1177 case HDLCDRVCTL_MODELIST: 1178 strncpy(hi.data.modename, "intclk,extclk,intmodem,extmodem,divider=x", 1179 sizeof(hi.data.modename)); 1180 break; 1181 1182 case HDLCDRVCTL_MODEMPARMASK: 1183 return HDLCDRV_PARMASK_IOBASE; 1184 1185 } 1186 if (copy_to_user(ifr->ifr_data, &hi, sizeof(hi))) 1187 return -EFAULT; 1188 return 0; 1189 } 1190 1191 /* --------------------------------------------------------------------- */ 1192 1193 /* 1194 * Check for a network adaptor of this type, and return '0' if one exists. 1195 * If dev->base_addr == 0, probe all likely locations. 1196 * If dev->base_addr == 1, always return failure. 1197 * If dev->base_addr == 2, allocate space for the device and return success 1198 * (detachable devices only). 1199 */ 1200 static void baycom_probe(struct net_device *dev) 1201 { 1202 static char ax25_bcast[AX25_ADDR_LEN] = { 1203 'Q' << 1, 'S' << 1, 'T' << 1, ' ' << 1, ' ' << 1, ' ' << 1, '0' << 1 1204 }; 1205 static char ax25_nocall[AX25_ADDR_LEN] = { 1206 'L' << 1, 'I' << 1, 'N' << 1, 'U' << 1, 'X' << 1, ' ' << 1, '1' << 1 1207 }; 1208 const struct hdlcdrv_channel_params dflt_ch_params = { 1209 20, 2, 10, 40, 0 1210 }; 1211 struct baycom_state *bc; 1212 1213 /* 1214 * not a real probe! only initialize data structures 1215 */ 1216 bc = netdev_priv(dev); 1217 /* 1218 * initialize the baycom_state struct 1219 */ 1220 bc->ch_params = dflt_ch_params; 1221 bc->ptt_keyed = 0; 1222 1223 /* 1224 * initialize the device struct 1225 */ 1226 dev->open = epp_open; 1227 dev->stop = epp_close; 1228 dev->do_ioctl = baycom_ioctl; 1229 dev->hard_start_xmit = baycom_send_packet; 1230 dev->get_stats = baycom_get_stats; 1231 1232 /* Fill in the fields of the device structure */ 1233 bc->skb = NULL; 1234 1235 #if defined(CONFIG_AX25) || defined(CONFIG_AX25_MODULE) 1236 dev->hard_header = ax25_encapsulate; 1237 dev->rebuild_header = ax25_rebuild_header; 1238 #else /* CONFIG_AX25 || CONFIG_AX25_MODULE */ 1239 dev->hard_header = NULL; 1240 dev->rebuild_header = NULL; 1241 #endif /* CONFIG_AX25 || CONFIG_AX25_MODULE */ 1242 dev->set_mac_address = baycom_set_mac_address; 1243 1244 dev->type = ARPHRD_AX25; /* AF_AX25 device */ 1245 dev->hard_header_len = AX25_MAX_HEADER_LEN + AX25_BPQ_HEADER_LEN; 1246 dev->mtu = AX25_DEF_PACLEN; /* eth_mtu is the default */ 1247 dev->addr_len = AX25_ADDR_LEN; /* sizeof an ax.25 address */ 1248 memcpy(dev->broadcast, ax25_bcast, AX25_ADDR_LEN); 1249 memcpy(dev->dev_addr, ax25_nocall, AX25_ADDR_LEN); 1250 dev->tx_queue_len = 16; 1251 1252 /* New style flags */ 1253 dev->flags = 0; 1254 } 1255 1256 /* --------------------------------------------------------------------- */ 1257 1258 /* 1259 * command line settable parameters 1260 */ 1261 static const char *mode[NR_PORTS] = { "", }; 1262 static int iobase[NR_PORTS] = { 0x378, }; 1263 1264 module_param_array(mode, charp, NULL, 0); 1265 MODULE_PARM_DESC(mode, "baycom operating mode"); 1266 module_param_array(iobase, int, NULL, 0); 1267 MODULE_PARM_DESC(iobase, "baycom io base address"); 1268 1269 MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu"); 1270 MODULE_DESCRIPTION("Baycom epp amateur radio modem driver"); 1271 MODULE_LICENSE("GPL"); 1272 1273 /* --------------------------------------------------------------------- */ 1274 1275 static void __init baycom_epp_dev_setup(struct net_device *dev) 1276 { 1277 struct baycom_state *bc = netdev_priv(dev); 1278 1279 /* 1280 * initialize part of the baycom_state struct 1281 */ 1282 bc->magic = BAYCOM_MAGIC; 1283 bc->cfg.fclk = 19666600; 1284 bc->cfg.bps = 9600; 1285 /* 1286 * initialize part of the device struct 1287 */ 1288 baycom_probe(dev); 1289 } 1290 1291 static int __init init_baycomepp(void) 1292 { 1293 int i, found = 0; 1294 char set_hw = 1; 1295 1296 printk(bc_drvinfo); 1297 /* 1298 * register net devices 1299 */ 1300 for (i = 0; i < NR_PORTS; i++) { 1301 struct net_device *dev; 1302 1303 dev = alloc_netdev(sizeof(struct baycom_state), "bce%d", 1304 baycom_epp_dev_setup); 1305 1306 if (!dev) { 1307 printk(KERN_WARNING "bce%d : out of memory\n", i); 1308 return found ? 0 : -ENOMEM; 1309 } 1310 1311 sprintf(dev->name, "bce%d", i); 1312 dev->base_addr = iobase[i]; 1313 1314 if (!mode[i]) 1315 set_hw = 0; 1316 if (!set_hw) 1317 iobase[i] = 0; 1318 1319 if (register_netdev(dev)) { 1320 printk(KERN_WARNING "%s: cannot register net device %s\n", bc_drvname, dev->name); 1321 free_netdev(dev); 1322 break; 1323 } 1324 if (set_hw && baycom_setmode(netdev_priv(dev), mode[i])) 1325 set_hw = 0; 1326 baycom_device[i] = dev; 1327 found++; 1328 } 1329 1330 return found ? 0 : -ENXIO; 1331 } 1332 1333 static void __exit cleanup_baycomepp(void) 1334 { 1335 int i; 1336 1337 for(i = 0; i < NR_PORTS; i++) { 1338 struct net_device *dev = baycom_device[i]; 1339 1340 if (dev) { 1341 struct baycom_state *bc = netdev_priv(dev); 1342 if (bc->magic == BAYCOM_MAGIC) { 1343 unregister_netdev(dev); 1344 free_netdev(dev); 1345 } else 1346 printk(paranoia_str, "cleanup_module"); 1347 } 1348 } 1349 } 1350 1351 module_init(init_baycomepp); 1352 module_exit(cleanup_baycomepp); 1353 1354 /* --------------------------------------------------------------------- */ 1355 1356 #ifndef MODULE 1357 1358 /* 1359 * format: baycom_epp=io,mode 1360 * mode: fpga config options 1361 */ 1362 1363 static int __init baycom_epp_setup(char *str) 1364 { 1365 static unsigned __initdata nr_dev = 0; 1366 int ints[2]; 1367 1368 if (nr_dev >= NR_PORTS) 1369 return 0; 1370 str = get_options(str, 2, ints); 1371 if (ints[0] < 1) 1372 return 0; 1373 mode[nr_dev] = str; 1374 iobase[nr_dev] = ints[1]; 1375 nr_dev++; 1376 return 1; 1377 } 1378 1379 __setup("baycom_epp=", baycom_epp_setup); 1380 1381 #endif /* MODULE */ 1382 /* --------------------------------------------------------------------- */ 1383