1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright (c) 2015 - 2023 Beijing WangXun Technology Co., Ltd. */ 3 4 #include <linux/gpio/machine.h> 5 #include <linux/gpio/driver.h> 6 #include <linux/gpio/property.h> 7 #include <linux/clk-provider.h> 8 #include <linux/clkdev.h> 9 #include <linux/i2c.h> 10 #include <linux/pci.h> 11 #include <linux/platform_device.h> 12 #include <linux/regmap.h> 13 14 #include "../libwx/wx_type.h" 15 #include "../libwx/wx_hw.h" 16 #include "txgbe_type.h" 17 #include "txgbe_phy.h" 18 19 static int txgbe_swnodes_register(struct txgbe *txgbe) 20 { 21 struct txgbe_nodes *nodes = &txgbe->nodes; 22 struct pci_dev *pdev = txgbe->wx->pdev; 23 struct software_node *swnodes; 24 u32 id; 25 26 id = (pdev->bus->number << 8) | pdev->devfn; 27 28 snprintf(nodes->gpio_name, sizeof(nodes->gpio_name), "txgbe_gpio-%x", id); 29 snprintf(nodes->i2c_name, sizeof(nodes->i2c_name), "txgbe_i2c-%x", id); 30 snprintf(nodes->sfp_name, sizeof(nodes->sfp_name), "txgbe_sfp-%x", id); 31 snprintf(nodes->phylink_name, sizeof(nodes->phylink_name), "txgbe_phylink-%x", id); 32 33 swnodes = nodes->swnodes; 34 35 /* GPIO 0: tx fault 36 * GPIO 1: tx disable 37 * GPIO 2: sfp module absent 38 * GPIO 3: rx signal lost 39 * GPIO 4: rate select, 1G(0) 10G(1) 40 * GPIO 5: rate select, 1G(0) 10G(1) 41 */ 42 nodes->gpio_props[0] = PROPERTY_ENTRY_STRING("pinctrl-names", "default"); 43 swnodes[SWNODE_GPIO] = NODE_PROP(nodes->gpio_name, nodes->gpio_props); 44 nodes->gpio0_ref[0] = SOFTWARE_NODE_REFERENCE(&swnodes[SWNODE_GPIO], 0, GPIO_ACTIVE_HIGH); 45 nodes->gpio1_ref[0] = SOFTWARE_NODE_REFERENCE(&swnodes[SWNODE_GPIO], 1, GPIO_ACTIVE_HIGH); 46 nodes->gpio2_ref[0] = SOFTWARE_NODE_REFERENCE(&swnodes[SWNODE_GPIO], 2, GPIO_ACTIVE_LOW); 47 nodes->gpio3_ref[0] = SOFTWARE_NODE_REFERENCE(&swnodes[SWNODE_GPIO], 3, GPIO_ACTIVE_HIGH); 48 nodes->gpio4_ref[0] = SOFTWARE_NODE_REFERENCE(&swnodes[SWNODE_GPIO], 4, GPIO_ACTIVE_HIGH); 49 nodes->gpio5_ref[0] = SOFTWARE_NODE_REFERENCE(&swnodes[SWNODE_GPIO], 5, GPIO_ACTIVE_HIGH); 50 51 nodes->i2c_props[0] = PROPERTY_ENTRY_STRING("compatible", "snps,designware-i2c"); 52 nodes->i2c_props[1] = PROPERTY_ENTRY_BOOL("wx,i2c-snps-model"); 53 nodes->i2c_props[2] = PROPERTY_ENTRY_U32("clock-frequency", I2C_MAX_STANDARD_MODE_FREQ); 54 swnodes[SWNODE_I2C] = NODE_PROP(nodes->i2c_name, nodes->i2c_props); 55 nodes->i2c_ref[0] = SOFTWARE_NODE_REFERENCE(&swnodes[SWNODE_I2C]); 56 57 nodes->sfp_props[0] = PROPERTY_ENTRY_STRING("compatible", "sff,sfp"); 58 nodes->sfp_props[1] = PROPERTY_ENTRY_REF_ARRAY("i2c-bus", nodes->i2c_ref); 59 nodes->sfp_props[2] = PROPERTY_ENTRY_REF_ARRAY("tx-fault-gpios", nodes->gpio0_ref); 60 nodes->sfp_props[3] = PROPERTY_ENTRY_REF_ARRAY("tx-disable-gpios", nodes->gpio1_ref); 61 nodes->sfp_props[4] = PROPERTY_ENTRY_REF_ARRAY("mod-def0-gpios", nodes->gpio2_ref); 62 nodes->sfp_props[5] = PROPERTY_ENTRY_REF_ARRAY("los-gpios", nodes->gpio3_ref); 63 nodes->sfp_props[6] = PROPERTY_ENTRY_REF_ARRAY("rate-select1-gpios", nodes->gpio4_ref); 64 nodes->sfp_props[7] = PROPERTY_ENTRY_REF_ARRAY("rate-select0-gpios", nodes->gpio5_ref); 65 swnodes[SWNODE_SFP] = NODE_PROP(nodes->sfp_name, nodes->sfp_props); 66 nodes->sfp_ref[0] = SOFTWARE_NODE_REFERENCE(&swnodes[SWNODE_SFP]); 67 68 nodes->phylink_props[0] = PROPERTY_ENTRY_STRING("managed", "in-band-status"); 69 nodes->phylink_props[1] = PROPERTY_ENTRY_REF_ARRAY("sfp", nodes->sfp_ref); 70 swnodes[SWNODE_PHYLINK] = NODE_PROP(nodes->phylink_name, nodes->phylink_props); 71 72 nodes->group[SWNODE_GPIO] = &swnodes[SWNODE_GPIO]; 73 nodes->group[SWNODE_I2C] = &swnodes[SWNODE_I2C]; 74 nodes->group[SWNODE_SFP] = &swnodes[SWNODE_SFP]; 75 nodes->group[SWNODE_PHYLINK] = &swnodes[SWNODE_PHYLINK]; 76 77 return software_node_register_node_group(nodes->group); 78 } 79 80 static int txgbe_gpio_get(struct gpio_chip *chip, unsigned int offset) 81 { 82 struct wx *wx = gpiochip_get_data(chip); 83 int val; 84 85 val = rd32m(wx, WX_GPIO_EXT, BIT(offset)); 86 87 return !!(val & BIT(offset)); 88 } 89 90 static int txgbe_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) 91 { 92 struct wx *wx = gpiochip_get_data(chip); 93 u32 val; 94 95 val = rd32(wx, WX_GPIO_DDR); 96 if (BIT(offset) & val) 97 return GPIO_LINE_DIRECTION_OUT; 98 99 return GPIO_LINE_DIRECTION_IN; 100 } 101 102 static int txgbe_gpio_direction_in(struct gpio_chip *chip, unsigned int offset) 103 { 104 struct wx *wx = gpiochip_get_data(chip); 105 unsigned long flags; 106 107 raw_spin_lock_irqsave(&wx->gpio_lock, flags); 108 wr32m(wx, WX_GPIO_DDR, BIT(offset), 0); 109 raw_spin_unlock_irqrestore(&wx->gpio_lock, flags); 110 111 return 0; 112 } 113 114 static int txgbe_gpio_direction_out(struct gpio_chip *chip, unsigned int offset, 115 int val) 116 { 117 struct wx *wx = gpiochip_get_data(chip); 118 unsigned long flags; 119 u32 set; 120 121 set = val ? BIT(offset) : 0; 122 123 raw_spin_lock_irqsave(&wx->gpio_lock, flags); 124 wr32m(wx, WX_GPIO_DR, BIT(offset), set); 125 wr32m(wx, WX_GPIO_DDR, BIT(offset), BIT(offset)); 126 raw_spin_unlock_irqrestore(&wx->gpio_lock, flags); 127 128 return 0; 129 } 130 131 static void txgbe_gpio_irq_ack(struct irq_data *d) 132 { 133 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 134 irq_hw_number_t hwirq = irqd_to_hwirq(d); 135 struct wx *wx = gpiochip_get_data(gc); 136 unsigned long flags; 137 138 raw_spin_lock_irqsave(&wx->gpio_lock, flags); 139 wr32(wx, WX_GPIO_EOI, BIT(hwirq)); 140 raw_spin_unlock_irqrestore(&wx->gpio_lock, flags); 141 } 142 143 static void txgbe_gpio_irq_mask(struct irq_data *d) 144 { 145 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 146 irq_hw_number_t hwirq = irqd_to_hwirq(d); 147 struct wx *wx = gpiochip_get_data(gc); 148 unsigned long flags; 149 150 gpiochip_disable_irq(gc, hwirq); 151 152 raw_spin_lock_irqsave(&wx->gpio_lock, flags); 153 wr32m(wx, WX_GPIO_INTMASK, BIT(hwirq), BIT(hwirq)); 154 raw_spin_unlock_irqrestore(&wx->gpio_lock, flags); 155 } 156 157 static void txgbe_gpio_irq_unmask(struct irq_data *d) 158 { 159 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 160 irq_hw_number_t hwirq = irqd_to_hwirq(d); 161 struct wx *wx = gpiochip_get_data(gc); 162 unsigned long flags; 163 164 gpiochip_enable_irq(gc, hwirq); 165 166 raw_spin_lock_irqsave(&wx->gpio_lock, flags); 167 wr32m(wx, WX_GPIO_INTMASK, BIT(hwirq), 0); 168 raw_spin_unlock_irqrestore(&wx->gpio_lock, flags); 169 } 170 171 static void txgbe_toggle_trigger(struct gpio_chip *gc, unsigned int offset) 172 { 173 struct wx *wx = gpiochip_get_data(gc); 174 u32 pol, val; 175 176 pol = rd32(wx, WX_GPIO_POLARITY); 177 val = rd32(wx, WX_GPIO_EXT); 178 179 if (val & BIT(offset)) 180 pol &= ~BIT(offset); 181 else 182 pol |= BIT(offset); 183 184 wr32(wx, WX_GPIO_POLARITY, pol); 185 } 186 187 static int txgbe_gpio_set_type(struct irq_data *d, unsigned int type) 188 { 189 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 190 irq_hw_number_t hwirq = irqd_to_hwirq(d); 191 struct wx *wx = gpiochip_get_data(gc); 192 u32 level, polarity, mask; 193 unsigned long flags; 194 195 mask = BIT(hwirq); 196 197 if (type & IRQ_TYPE_LEVEL_MASK) { 198 level = 0; 199 irq_set_handler_locked(d, handle_level_irq); 200 } else { 201 level = mask; 202 irq_set_handler_locked(d, handle_edge_irq); 203 } 204 205 if (type == IRQ_TYPE_EDGE_RISING || type == IRQ_TYPE_LEVEL_HIGH) 206 polarity = mask; 207 else 208 polarity = 0; 209 210 raw_spin_lock_irqsave(&wx->gpio_lock, flags); 211 212 wr32m(wx, WX_GPIO_INTEN, mask, mask); 213 wr32m(wx, WX_GPIO_INTTYPE_LEVEL, mask, level); 214 if (type == IRQ_TYPE_EDGE_BOTH) 215 txgbe_toggle_trigger(gc, hwirq); 216 else 217 wr32m(wx, WX_GPIO_POLARITY, mask, polarity); 218 219 raw_spin_unlock_irqrestore(&wx->gpio_lock, flags); 220 221 return 0; 222 } 223 224 static const struct irq_chip txgbe_gpio_irq_chip = { 225 .name = "txgbe_gpio_irq", 226 .irq_ack = txgbe_gpio_irq_ack, 227 .irq_mask = txgbe_gpio_irq_mask, 228 .irq_unmask = txgbe_gpio_irq_unmask, 229 .irq_set_type = txgbe_gpio_set_type, 230 .flags = IRQCHIP_IMMUTABLE, 231 GPIOCHIP_IRQ_RESOURCE_HELPERS, 232 }; 233 234 static void txgbe_irq_handler(struct irq_desc *desc) 235 { 236 struct irq_chip *chip = irq_desc_get_chip(desc); 237 struct wx *wx = irq_desc_get_handler_data(desc); 238 struct txgbe *txgbe = wx->priv; 239 irq_hw_number_t hwirq; 240 unsigned long gpioirq; 241 struct gpio_chip *gc; 242 unsigned long flags; 243 244 chained_irq_enter(chip, desc); 245 246 gpioirq = rd32(wx, WX_GPIO_INTSTATUS); 247 248 gc = txgbe->gpio; 249 for_each_set_bit(hwirq, &gpioirq, gc->ngpio) { 250 int gpio = irq_find_mapping(gc->irq.domain, hwirq); 251 u32 irq_type = irq_get_trigger_type(gpio); 252 253 generic_handle_domain_irq(gc->irq.domain, hwirq); 254 255 if ((irq_type & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) { 256 raw_spin_lock_irqsave(&wx->gpio_lock, flags); 257 txgbe_toggle_trigger(gc, hwirq); 258 raw_spin_unlock_irqrestore(&wx->gpio_lock, flags); 259 } 260 } 261 262 chained_irq_exit(chip, desc); 263 264 /* unmask interrupt */ 265 wx_intr_enable(wx, TXGBE_INTR_MISC(wx)); 266 } 267 268 static int txgbe_gpio_init(struct txgbe *txgbe) 269 { 270 struct gpio_irq_chip *girq; 271 struct gpio_chip *gc; 272 struct device *dev; 273 struct wx *wx; 274 int ret; 275 276 wx = txgbe->wx; 277 dev = &wx->pdev->dev; 278 279 raw_spin_lock_init(&wx->gpio_lock); 280 281 gc = devm_kzalloc(dev, sizeof(*gc), GFP_KERNEL); 282 if (!gc) 283 return -ENOMEM; 284 285 gc->label = devm_kasprintf(dev, GFP_KERNEL, "txgbe_gpio-%x", 286 (wx->pdev->bus->number << 8) | wx->pdev->devfn); 287 if (!gc->label) 288 return -ENOMEM; 289 290 gc->base = -1; 291 gc->ngpio = 6; 292 gc->owner = THIS_MODULE; 293 gc->parent = dev; 294 gc->fwnode = software_node_fwnode(txgbe->nodes.group[SWNODE_GPIO]); 295 gc->get = txgbe_gpio_get; 296 gc->get_direction = txgbe_gpio_get_direction; 297 gc->direction_input = txgbe_gpio_direction_in; 298 gc->direction_output = txgbe_gpio_direction_out; 299 300 girq = &gc->irq; 301 gpio_irq_chip_set_chip(girq, &txgbe_gpio_irq_chip); 302 girq->parent_handler = txgbe_irq_handler; 303 girq->parent_handler_data = wx; 304 girq->num_parents = 1; 305 girq->parents = devm_kcalloc(dev, girq->num_parents, 306 sizeof(*girq->parents), GFP_KERNEL); 307 if (!girq->parents) 308 return -ENOMEM; 309 girq->parents[0] = wx->msix_entries[wx->num_q_vectors].vector; 310 girq->default_type = IRQ_TYPE_NONE; 311 girq->handler = handle_bad_irq; 312 313 ret = devm_gpiochip_add_data(dev, gc, wx); 314 if (ret) 315 return ret; 316 317 txgbe->gpio = gc; 318 319 return 0; 320 } 321 322 static int txgbe_clock_register(struct txgbe *txgbe) 323 { 324 struct pci_dev *pdev = txgbe->wx->pdev; 325 struct clk_lookup *clock; 326 char clk_name[32]; 327 struct clk *clk; 328 329 snprintf(clk_name, sizeof(clk_name), "i2c_designware.%d", 330 (pdev->bus->number << 8) | pdev->devfn); 331 332 clk = clk_register_fixed_rate(NULL, clk_name, NULL, 0, 156250000); 333 if (IS_ERR(clk)) 334 return PTR_ERR(clk); 335 336 clock = clkdev_create(clk, NULL, clk_name); 337 if (!clock) { 338 clk_unregister(clk); 339 return -ENOMEM; 340 } 341 342 txgbe->clk = clk; 343 txgbe->clock = clock; 344 345 return 0; 346 } 347 348 static int txgbe_i2c_read(void *context, unsigned int reg, unsigned int *val) 349 { 350 struct wx *wx = context; 351 352 *val = rd32(wx, reg + TXGBE_I2C_BASE); 353 354 return 0; 355 } 356 357 static int txgbe_i2c_write(void *context, unsigned int reg, unsigned int val) 358 { 359 struct wx *wx = context; 360 361 wr32(wx, reg + TXGBE_I2C_BASE, val); 362 363 return 0; 364 } 365 366 static const struct regmap_config i2c_regmap_config = { 367 .reg_bits = 32, 368 .val_bits = 32, 369 .reg_read = txgbe_i2c_read, 370 .reg_write = txgbe_i2c_write, 371 .fast_io = true, 372 }; 373 374 static int txgbe_i2c_register(struct txgbe *txgbe) 375 { 376 struct platform_device_info info = {}; 377 struct platform_device *i2c_dev; 378 struct regmap *i2c_regmap; 379 struct pci_dev *pdev; 380 struct wx *wx; 381 382 wx = txgbe->wx; 383 pdev = wx->pdev; 384 i2c_regmap = devm_regmap_init(&pdev->dev, NULL, wx, &i2c_regmap_config); 385 if (IS_ERR(i2c_regmap)) { 386 wx_err(wx, "failed to init I2C regmap\n"); 387 return PTR_ERR(i2c_regmap); 388 } 389 390 info.parent = &pdev->dev; 391 info.fwnode = software_node_fwnode(txgbe->nodes.group[SWNODE_I2C]); 392 info.name = "i2c_designware"; 393 info.id = (pdev->bus->number << 8) | pdev->devfn; 394 395 info.res = &DEFINE_RES_IRQ(pdev->irq); 396 info.num_res = 1; 397 i2c_dev = platform_device_register_full(&info); 398 if (IS_ERR(i2c_dev)) 399 return PTR_ERR(i2c_dev); 400 401 txgbe->i2c_dev = i2c_dev; 402 403 return 0; 404 } 405 406 static int txgbe_sfp_register(struct txgbe *txgbe) 407 { 408 struct pci_dev *pdev = txgbe->wx->pdev; 409 struct platform_device_info info = {}; 410 struct platform_device *sfp_dev; 411 412 info.parent = &pdev->dev; 413 info.fwnode = software_node_fwnode(txgbe->nodes.group[SWNODE_SFP]); 414 info.name = "sfp"; 415 info.id = (pdev->bus->number << 8) | pdev->devfn; 416 sfp_dev = platform_device_register_full(&info); 417 if (IS_ERR(sfp_dev)) 418 return PTR_ERR(sfp_dev); 419 420 txgbe->sfp_dev = sfp_dev; 421 422 return 0; 423 } 424 425 int txgbe_init_phy(struct txgbe *txgbe) 426 { 427 int ret; 428 429 ret = txgbe_swnodes_register(txgbe); 430 if (ret) { 431 wx_err(txgbe->wx, "failed to register software nodes\n"); 432 return ret; 433 } 434 435 ret = txgbe_gpio_init(txgbe); 436 if (ret) { 437 wx_err(txgbe->wx, "failed to init gpio\n"); 438 goto err_unregister_swnode; 439 } 440 441 ret = txgbe_clock_register(txgbe); 442 if (ret) { 443 wx_err(txgbe->wx, "failed to register clock: %d\n", ret); 444 goto err_unregister_swnode; 445 } 446 447 ret = txgbe_i2c_register(txgbe); 448 if (ret) { 449 wx_err(txgbe->wx, "failed to init i2c interface: %d\n", ret); 450 goto err_unregister_clk; 451 } 452 453 ret = txgbe_sfp_register(txgbe); 454 if (ret) { 455 wx_err(txgbe->wx, "failed to register sfp\n"); 456 goto err_unregister_i2c; 457 } 458 459 return 0; 460 461 err_unregister_i2c: 462 platform_device_unregister(txgbe->i2c_dev); 463 err_unregister_clk: 464 clkdev_drop(txgbe->clock); 465 clk_unregister(txgbe->clk); 466 err_unregister_swnode: 467 software_node_unregister_node_group(txgbe->nodes.group); 468 469 return ret; 470 } 471 472 void txgbe_remove_phy(struct txgbe *txgbe) 473 { 474 platform_device_unregister(txgbe->sfp_dev); 475 platform_device_unregister(txgbe->i2c_dev); 476 clkdev_drop(txgbe->clock); 477 clk_unregister(txgbe->clk); 478 software_node_unregister_node_group(txgbe->nodes.group); 479 } 480