1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /**************************************************************************** 3 * Driver for Solarflare network controllers and boards 4 * Copyright 2019 Solarflare Communications Inc. 5 * Copyright 2020-2022 Xilinx Inc. 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License version 2 as published 9 * by the Free Software Foundation, incorporated herein by reference. 10 */ 11 12 #ifndef EFX_TC_H 13 #define EFX_TC_H 14 #include <net/flow_offload.h> 15 #include <linux/rhashtable.h> 16 #include "net_driver.h" 17 #include "tc_counters.h" 18 19 #define IS_ALL_ONES(v) (!(typeof (v))~(v)) 20 21 #ifdef CONFIG_IPV6 22 static inline bool efx_ipv6_addr_all_ones(struct in6_addr *addr) 23 { 24 return !memchr_inv(addr, 0xff, sizeof(*addr)); 25 } 26 #endif 27 28 struct efx_tc_encap_action; /* see tc_encap_actions.h */ 29 30 struct efx_tc_action_set { 31 u16 vlan_push:2; 32 u16 vlan_pop:2; 33 u16 decap:1; 34 u16 deliver:1; 35 __be16 vlan_tci[2]; /* TCIs for vlan_push */ 36 __be16 vlan_proto[2]; /* Ethertypes for vlan_push */ 37 struct efx_tc_counter_index *count; 38 struct efx_tc_encap_action *encap_md; /* entry in tc_encap_ht table */ 39 struct list_head encap_user; /* entry on encap_md->users list */ 40 struct efx_tc_action_set_list *user; /* Only populated if encap_md */ 41 struct list_head count_user; /* entry on counter->users list, if encap */ 42 u32 dest_mport; 43 u32 fw_id; /* index of this entry in firmware actions table */ 44 struct list_head list; 45 }; 46 47 struct efx_tc_match_fields { 48 /* L1 */ 49 u32 ingress_port; 50 u8 recirc_id; 51 /* L2 (inner when encap) */ 52 __be16 eth_proto; 53 __be16 vlan_tci[2], vlan_proto[2]; 54 u8 eth_saddr[ETH_ALEN], eth_daddr[ETH_ALEN]; 55 /* L3 (when IP) */ 56 u8 ip_proto, ip_tos, ip_ttl; 57 __be32 src_ip, dst_ip; 58 #ifdef CONFIG_IPV6 59 struct in6_addr src_ip6, dst_ip6; 60 #endif 61 bool ip_frag, ip_firstfrag; 62 /* L4 */ 63 __be16 l4_sport, l4_dport; /* Ports (UDP, TCP) */ 64 __be16 tcp_flags; 65 /* Encap. The following are *outer* fields. Note that there are no 66 * outer eth (L2) fields; this is because TC doesn't have them. 67 */ 68 __be32 enc_src_ip, enc_dst_ip; 69 struct in6_addr enc_src_ip6, enc_dst_ip6; 70 u8 enc_ip_tos, enc_ip_ttl; 71 __be16 enc_sport, enc_dport; 72 __be32 enc_keyid; /* e.g. VNI, VSID */ 73 }; 74 75 static inline bool efx_tc_match_is_encap(const struct efx_tc_match_fields *mask) 76 { 77 return mask->enc_src_ip || mask->enc_dst_ip || 78 !ipv6_addr_any(&mask->enc_src_ip6) || 79 !ipv6_addr_any(&mask->enc_dst_ip6) || mask->enc_ip_tos || 80 mask->enc_ip_ttl || mask->enc_sport || mask->enc_dport; 81 } 82 83 /** 84 * enum efx_tc_em_pseudo_type - &struct efx_tc_encap_match pseudo type 85 * 86 * These are used to classify "pseudo" encap matches, which don't refer 87 * to an entry in hardware but rather indicate that a section of the 88 * match space is in use by another Outer Rule. 89 * 90 * @EFX_TC_EM_DIRECT: real HW entry in Outer Rule table; not a pseudo. 91 * Hardware index in &struct efx_tc_encap_match.fw_id is valid. 92 * @EFX_TC_EM_PSEUDO_MASK: registered by an encap match which includes a 93 * match on an optional field (currently ip_tos and/or udp_sport), 94 * to prevent an overlapping encap match _without_ optional fields. 95 * The pseudo encap match may be referenced again by an encap match 96 * with different values for these fields, but all masks must match the 97 * first (stored in our child_* fields). 98 */ 99 enum efx_tc_em_pseudo_type { 100 EFX_TC_EM_DIRECT, 101 EFX_TC_EM_PSEUDO_MASK, 102 }; 103 104 struct efx_tc_encap_match { 105 __be32 src_ip, dst_ip; 106 struct in6_addr src_ip6, dst_ip6; 107 __be16 udp_dport; 108 __be16 udp_sport, udp_sport_mask; 109 u8 ip_tos, ip_tos_mask; 110 struct rhash_head linkage; 111 enum efx_encap_type tun_type; 112 u8 child_ip_tos_mask; 113 __be16 child_udp_sport_mask; 114 refcount_t ref; 115 enum efx_tc_em_pseudo_type type; 116 u32 fw_id; /* index of this entry in firmware encap match table */ 117 struct efx_tc_encap_match *pseudo; /* Referenced pseudo EM if needed */ 118 }; 119 120 struct efx_tc_match { 121 struct efx_tc_match_fields value; 122 struct efx_tc_match_fields mask; 123 struct efx_tc_encap_match *encap; 124 }; 125 126 struct efx_tc_action_set_list { 127 struct list_head list; 128 u32 fw_id; 129 }; 130 131 struct efx_tc_flow_rule { 132 unsigned long cookie; 133 struct rhash_head linkage; 134 struct efx_tc_match match; 135 struct efx_tc_action_set_list acts; 136 struct efx_tc_action_set_list *fallback; /* what to use when unready? */ 137 u32 fw_id; 138 }; 139 140 enum efx_tc_rule_prios { 141 EFX_TC_PRIO_TC, /* Rule inserted by TC */ 142 EFX_TC_PRIO_DFLT, /* Default switch rule; one of efx_tc_default_rules */ 143 EFX_TC_PRIO__NUM 144 }; 145 146 struct efx_tc_table_field_fmt { 147 u16 field_id; 148 u16 lbn; 149 u16 width; 150 u8 masking; 151 u8 scheme; 152 }; 153 154 struct efx_tc_table_desc { 155 u16 type; 156 u16 key_width; 157 u16 resp_width; 158 u16 n_keys; 159 u16 n_resps; 160 u16 n_prios; 161 u8 flags; 162 u8 scheme; 163 struct efx_tc_table_field_fmt *keys; 164 struct efx_tc_table_field_fmt *resps; 165 }; 166 167 struct efx_tc_table_ct { /* TABLE_ID_CONNTRACK_TABLE */ 168 struct efx_tc_table_desc desc; 169 bool hooked; 170 struct { /* indices of named fields within @desc.keys */ 171 u8 eth_proto_idx; 172 u8 ip_proto_idx; 173 u8 src_ip_idx; /* either v4 or v6 */ 174 u8 dst_ip_idx; 175 u8 l4_sport_idx; 176 u8 l4_dport_idx; 177 u8 zone_idx; /* for TABLE_FIELD_ID_DOMAIN */ 178 } keys; 179 struct { /* indices of named fields within @desc.resps */ 180 u8 dnat_idx; 181 u8 nat_ip_idx; 182 u8 l4_natport_idx; 183 u8 mark_idx; 184 u8 counter_id_idx; 185 } resps; 186 }; 187 188 /** 189 * struct efx_tc_state - control plane data for TC offload 190 * 191 * @caps: MAE capabilities reported by MCDI 192 * @block_list: List of &struct efx_tc_block_binding 193 * @mutex: Used to serialise operations on TC hashtables 194 * @counter_ht: Hashtable of TC counters (FW IDs and counter values) 195 * @counter_id_ht: Hashtable mapping TC counter cookies to counters 196 * @encap_ht: Hashtable of TC encap actions 197 * @encap_match_ht: Hashtable of TC encap matches 198 * @match_action_ht: Hashtable of TC match-action rules 199 * @neigh_ht: Hashtable of neighbour watches (&struct efx_neigh_binder) 200 * @meta_ct: MAE table layout for conntrack table 201 * @reps_mport_id: MAE port allocated for representor RX 202 * @reps_filter_uc: VNIC filter for representor unicast RX (promisc) 203 * @reps_filter_mc: VNIC filter for representor multicast RX (allmulti) 204 * @reps_mport_vport_id: vport_id for representor RX filters 205 * @flush_counters: counters have been stopped, waiting for drain 206 * @flush_gen: final generation count per type array as reported by 207 * MC_CMD_MAE_COUNTERS_STREAM_STOP 208 * @seen_gen: most recent generation count per type as seen by efx_tc_rx() 209 * @flush_wq: wait queue used by efx_mae_stop_counters() to wait for 210 * MAE counters RXQ to finish draining 211 * @dflt: Match-action rules for default switching; at priority 212 * %EFX_TC_PRIO_DFLT. Named by *ingress* port 213 * @dflt.pf: rule for traffic ingressing from PF (egresses to wire) 214 * @dflt.wire: rule for traffic ingressing from wire (egresses to PF) 215 * @facts: Fallback action-set-lists for unready rules. Named by *egress* port 216 * @facts.pf: action-set-list for unready rules on PF netdev, hence applying to 217 * traffic from wire, and egressing to PF 218 * @facts.reps: action-set-list for unready rules on representors, hence 219 * applying to traffic from representees, and egressing to the reps mport 220 * @up: have TC datastructures been set up? 221 */ 222 struct efx_tc_state { 223 struct mae_caps *caps; 224 struct list_head block_list; 225 struct mutex mutex; 226 struct rhashtable counter_ht; 227 struct rhashtable counter_id_ht; 228 struct rhashtable encap_ht; 229 struct rhashtable encap_match_ht; 230 struct rhashtable match_action_ht; 231 struct rhashtable neigh_ht; 232 struct efx_tc_table_ct meta_ct; 233 u32 reps_mport_id, reps_mport_vport_id; 234 s32 reps_filter_uc, reps_filter_mc; 235 bool flush_counters; 236 u32 flush_gen[EFX_TC_COUNTER_TYPE_MAX]; 237 u32 seen_gen[EFX_TC_COUNTER_TYPE_MAX]; 238 wait_queue_head_t flush_wq; 239 struct { 240 struct efx_tc_flow_rule pf; 241 struct efx_tc_flow_rule wire; 242 } dflt; 243 struct { 244 struct efx_tc_action_set_list pf; 245 struct efx_tc_action_set_list reps; 246 } facts; 247 bool up; 248 }; 249 250 struct efx_rep; 251 252 enum efx_encap_type efx_tc_indr_netdev_type(struct net_device *net_dev); 253 struct efx_rep *efx_tc_flower_lookup_efv(struct efx_nic *efx, 254 struct net_device *dev); 255 s64 efx_tc_flower_external_mport(struct efx_nic *efx, struct efx_rep *efv); 256 int efx_tc_configure_default_rule_rep(struct efx_rep *efv); 257 void efx_tc_deconfigure_default_rule(struct efx_nic *efx, 258 struct efx_tc_flow_rule *rule); 259 int efx_tc_flower(struct efx_nic *efx, struct net_device *net_dev, 260 struct flow_cls_offload *tc, struct efx_rep *efv); 261 262 int efx_tc_insert_rep_filters(struct efx_nic *efx); 263 void efx_tc_remove_rep_filters(struct efx_nic *efx); 264 265 int efx_init_tc(struct efx_nic *efx); 266 void efx_fini_tc(struct efx_nic *efx); 267 268 int efx_init_struct_tc(struct efx_nic *efx); 269 void efx_fini_struct_tc(struct efx_nic *efx); 270 271 #endif /* EFX_TC_H */ 272