167ab160eSEdward Cree /* SPDX-License-Identifier: GPL-2.0-only */ 267ab160eSEdward Cree /**************************************************************************** 367ab160eSEdward Cree * Driver for Solarflare network controllers and boards 467ab160eSEdward Cree * Copyright 2019 Solarflare Communications Inc. 567ab160eSEdward Cree * Copyright 2020-2022 Xilinx Inc. 667ab160eSEdward Cree * 767ab160eSEdward Cree * This program is free software; you can redistribute it and/or modify it 867ab160eSEdward Cree * under the terms of the GNU General Public License version 2 as published 967ab160eSEdward Cree * by the Free Software Foundation, incorporated herein by reference. 1067ab160eSEdward Cree */ 1167ab160eSEdward Cree 1267ab160eSEdward Cree #ifndef EFX_TC_H 1367ab160eSEdward Cree #define EFX_TC_H 149dc0cad2SEdward Cree #include <net/flow_offload.h> 15f54a28a2SEdward Cree #include <linux/rhashtable.h> 1667ab160eSEdward Cree #include "net_driver.h" 1767ab160eSEdward Cree 187c9d266dSEdward Cree /* Error reporting: convenience macros. For indicating why a given filter 197c9d266dSEdward Cree * insertion is not supported; errors in internal operation or in the 207c9d266dSEdward Cree * hardware should be netif_err()s instead. 217c9d266dSEdward Cree */ 227c9d266dSEdward Cree /* Used when error message is constant. */ 237c9d266dSEdward Cree #define EFX_TC_ERR_MSG(efx, extack, message) do { \ 247c9d266dSEdward Cree NL_SET_ERR_MSG_MOD(extack, message); \ 257c9d266dSEdward Cree if (efx->log_tc_errs) \ 267c9d266dSEdward Cree netif_info(efx, drv, efx->net_dev, "%s\n", message); \ 277c9d266dSEdward Cree } while (0) 287c9d266dSEdward Cree /* Used when error message is not constant; caller should also supply a 297c9d266dSEdward Cree * constant extack message with NL_SET_ERR_MSG_MOD(). 307c9d266dSEdward Cree */ 317c9d266dSEdward Cree #define efx_tc_err(efx, fmt, args...) do { \ 327c9d266dSEdward Cree if (efx->log_tc_errs) \ 337c9d266dSEdward Cree netif_info(efx, drv, efx->net_dev, fmt, ##args);\ 347c9d266dSEdward Cree } while (0) 357c9d266dSEdward Cree 3667ab160eSEdward Cree struct efx_tc_action_set { 3767ab160eSEdward Cree u16 deliver:1; 3867ab160eSEdward Cree u32 dest_mport; 3967ab160eSEdward Cree u32 fw_id; /* index of this entry in firmware actions table */ 4067ab160eSEdward Cree struct list_head list; 4167ab160eSEdward Cree }; 4267ab160eSEdward Cree 4367ab160eSEdward Cree struct efx_tc_match_fields { 4467ab160eSEdward Cree /* L1 */ 4567ab160eSEdward Cree u32 ingress_port; 46*d902e1a7SEdward Cree u8 recirc_id; 4767ab160eSEdward Cree }; 4867ab160eSEdward Cree 4967ab160eSEdward Cree struct efx_tc_match { 5067ab160eSEdward Cree struct efx_tc_match_fields value; 5167ab160eSEdward Cree struct efx_tc_match_fields mask; 5267ab160eSEdward Cree }; 5367ab160eSEdward Cree 5467ab160eSEdward Cree struct efx_tc_action_set_list { 5567ab160eSEdward Cree struct list_head list; 5667ab160eSEdward Cree u32 fw_id; 5767ab160eSEdward Cree }; 5867ab160eSEdward Cree 5967ab160eSEdward Cree struct efx_tc_flow_rule { 60f54a28a2SEdward Cree unsigned long cookie; 61f54a28a2SEdward Cree struct rhash_head linkage; 6267ab160eSEdward Cree struct efx_tc_match match; 6367ab160eSEdward Cree struct efx_tc_action_set_list acts; 6467ab160eSEdward Cree u32 fw_id; 6567ab160eSEdward Cree }; 6667ab160eSEdward Cree 6767ab160eSEdward Cree enum efx_tc_rule_prios { 68*d902e1a7SEdward Cree EFX_TC_PRIO_TC, /* Rule inserted by TC */ 6967ab160eSEdward Cree EFX_TC_PRIO_DFLT, /* Default switch rule; one of efx_tc_default_rules */ 7067ab160eSEdward Cree EFX_TC_PRIO__NUM 7167ab160eSEdward Cree }; 7267ab160eSEdward Cree 7367ab160eSEdward Cree /** 7467ab160eSEdward Cree * struct efx_tc_state - control plane data for TC offload 7567ab160eSEdward Cree * 767ce3e235SEdward Cree * @caps: MAE capabilities reported by MCDI 779dc0cad2SEdward Cree * @block_list: List of &struct efx_tc_block_binding 78f54a28a2SEdward Cree * @mutex: Used to serialise operations on TC hashtables 79f54a28a2SEdward Cree * @match_action_ht: Hashtable of TC match-action rules 80e37f3b15SEdward Cree * @reps_mport_id: MAE port allocated for representor RX 81e37f3b15SEdward Cree * @reps_filter_uc: VNIC filter for representor unicast RX (promisc) 82e37f3b15SEdward Cree * @reps_filter_mc: VNIC filter for representor multicast RX (allmulti) 83e37f3b15SEdward Cree * @reps_mport_vport_id: vport_id for representor RX filters 8467ab160eSEdward Cree * @dflt: Match-action rules for default switching; at priority 8567ab160eSEdward Cree * %EFX_TC_PRIO_DFLT. Named by *ingress* port 8667ab160eSEdward Cree * @dflt.pf: rule for traffic ingressing from PF (egresses to wire) 8767ab160eSEdward Cree * @dflt.wire: rule for traffic ingressing from wire (egresses to PF) 889dc0cad2SEdward Cree * @up: have TC datastructures been set up? 8967ab160eSEdward Cree */ 9067ab160eSEdward Cree struct efx_tc_state { 917ce3e235SEdward Cree struct mae_caps *caps; 929dc0cad2SEdward Cree struct list_head block_list; 93f54a28a2SEdward Cree struct mutex mutex; 94f54a28a2SEdward Cree struct rhashtable match_action_ht; 95e37f3b15SEdward Cree u32 reps_mport_id, reps_mport_vport_id; 96e37f3b15SEdward Cree s32 reps_filter_uc, reps_filter_mc; 9767ab160eSEdward Cree struct { 9867ab160eSEdward Cree struct efx_tc_flow_rule pf; 9967ab160eSEdward Cree struct efx_tc_flow_rule wire; 10067ab160eSEdward Cree } dflt; 1019dc0cad2SEdward Cree bool up; 10267ab160eSEdward Cree }; 10367ab160eSEdward Cree 10467ab160eSEdward Cree struct efx_rep; 10567ab160eSEdward Cree 10667ab160eSEdward Cree int efx_tc_configure_default_rule_rep(struct efx_rep *efv); 10767ab160eSEdward Cree void efx_tc_deconfigure_default_rule(struct efx_nic *efx, 10867ab160eSEdward Cree struct efx_tc_flow_rule *rule); 1099dc0cad2SEdward Cree int efx_tc_flower(struct efx_nic *efx, struct net_device *net_dev, 1109dc0cad2SEdward Cree struct flow_cls_offload *tc, struct efx_rep *efv); 11167ab160eSEdward Cree 112e37f3b15SEdward Cree int efx_tc_insert_rep_filters(struct efx_nic *efx); 113e37f3b15SEdward Cree void efx_tc_remove_rep_filters(struct efx_nic *efx); 114e37f3b15SEdward Cree 11567ab160eSEdward Cree int efx_init_tc(struct efx_nic *efx); 11667ab160eSEdward Cree void efx_fini_tc(struct efx_nic *efx); 11767ab160eSEdward Cree 11867ab160eSEdward Cree int efx_init_struct_tc(struct efx_nic *efx); 11967ab160eSEdward Cree void efx_fini_struct_tc(struct efx_nic *efx); 12067ab160eSEdward Cree 12167ab160eSEdward Cree #endif /* EFX_TC_H */ 122