11f4d4ed6SAlexander Lobakin /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ 2fe56b9e6SYuval Mintz /* QLogic qed NIC Driver 3e8f1cb50SMintz, Yuval * Copyright (c) 2015-2017 QLogic Corporation 4663eacd8SAlexander Lobakin * Copyright (c) 2019-2020 Marvell International Ltd. 5fe56b9e6SYuval Mintz */ 6fe56b9e6SYuval Mintz 7fe56b9e6SYuval Mintz #ifndef _QED_SP_H 8fe56b9e6SYuval Mintz #define _QED_SP_H 9fe56b9e6SYuval Mintz 10fe56b9e6SYuval Mintz #include <linux/types.h> 11fe56b9e6SYuval Mintz #include <linux/kernel.h> 12fe56b9e6SYuval Mintz #include <linux/list.h> 13fe56b9e6SYuval Mintz #include <linux/slab.h> 14fe56b9e6SYuval Mintz #include <linux/spinlock.h> 15fe56b9e6SYuval Mintz #include <linux/qed/qed_chain.h> 16fe56b9e6SYuval Mintz #include "qed.h" 17fe56b9e6SYuval Mintz #include "qed_hsi.h" 18fe56b9e6SYuval Mintz 19fe56b9e6SYuval Mintz enum spq_mode { 20fe56b9e6SYuval Mintz QED_SPQ_MODE_BLOCK, /* Client will poll a designated mem. address */ 21fe56b9e6SYuval Mintz QED_SPQ_MODE_CB, /* Client supplies a callback */ 22fe56b9e6SYuval Mintz QED_SPQ_MODE_EBLOCK, /* QED should block until completion */ 23fe56b9e6SYuval Mintz }; 24fe56b9e6SYuval Mintz 25fe56b9e6SYuval Mintz struct qed_spq_comp_cb { 26*fe40a830SPrabhakar Kushwaha void (*function)(struct qed_hwfn *p_hwfn, 27*fe40a830SPrabhakar Kushwaha void *cookie, 28*fe40a830SPrabhakar Kushwaha union event_ring_data *data, 29fe56b9e6SYuval Mintz u8 fw_return_code); 30fe56b9e6SYuval Mintz void *cookie; 31fe56b9e6SYuval Mintz }; 32fe56b9e6SYuval Mintz 33cee4d264SManish Chopra /** 3419198e4eSPrabhakar Kushwaha * qed_eth_cqe_completion(): handles the completion of a 3519198e4eSPrabhakar Kushwaha * ramrod on the cqe ring. 36cee4d264SManish Chopra * 3719198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 3819198e4eSPrabhakar Kushwaha * @cqe: CQE. 39cee4d264SManish Chopra * 4019198e4eSPrabhakar Kushwaha * Return: Int. 41cee4d264SManish Chopra */ 42cee4d264SManish Chopra int qed_eth_cqe_completion(struct qed_hwfn *p_hwfn, 43cee4d264SManish Chopra struct eth_slow_path_rx_cqe *cqe); 44cee4d264SManish Chopra 4519198e4eSPrabhakar Kushwaha /* QED Slow-hwfn queue interface */ 46fe56b9e6SYuval Mintz union ramrod_data { 47fe56b9e6SYuval Mintz struct pf_start_ramrod_data pf_start; 48464f6645SManish Chopra struct pf_update_ramrod_data pf_update; 49cee4d264SManish Chopra struct rx_queue_start_ramrod_data rx_queue_start; 50cee4d264SManish Chopra struct rx_queue_update_ramrod_data rx_queue_update; 51cee4d264SManish Chopra struct rx_queue_stop_ramrod_data rx_queue_stop; 52cee4d264SManish Chopra struct tx_queue_start_ramrod_data tx_queue_start; 53cee4d264SManish Chopra struct tx_queue_stop_ramrod_data tx_queue_stop; 54cee4d264SManish Chopra struct vport_start_ramrod_data vport_start; 55cee4d264SManish Chopra struct vport_stop_ramrod_data vport_stop; 56*fe40a830SPrabhakar Kushwaha struct rx_update_gft_filter_ramrod_data rx_update_gft; 57cee4d264SManish Chopra struct vport_update_ramrod_data vport_update; 580a7fb11cSYuval Mintz struct core_rx_start_ramrod_data core_rx_queue_start; 590a7fb11cSYuval Mintz struct core_rx_stop_ramrod_data core_rx_queue_stop; 600a7fb11cSYuval Mintz struct core_tx_start_ramrod_data core_tx_queue_start; 610a7fb11cSYuval Mintz struct core_tx_stop_ramrod_data core_tx_queue_stop; 62cee4d264SManish Chopra struct vport_filter_update_ramrod_data vport_filter_update; 631408cc1fSYuval Mintz 647a9b6b8fSYuval Mintz struct rdma_init_func_ramrod_data rdma_init_func; 657a9b6b8fSYuval Mintz struct rdma_close_func_ramrod_data rdma_close_func; 667a9b6b8fSYuval Mintz struct rdma_register_tid_ramrod_data rdma_register_tid; 677a9b6b8fSYuval Mintz struct rdma_deregister_tid_ramrod_data rdma_deregister_tid; 687a9b6b8fSYuval Mintz struct roce_create_qp_resp_ramrod_data roce_create_qp_resp; 697a9b6b8fSYuval Mintz struct roce_create_qp_req_ramrod_data roce_create_qp_req; 707a9b6b8fSYuval Mintz struct roce_modify_qp_resp_ramrod_data roce_modify_qp_resp; 717a9b6b8fSYuval Mintz struct roce_modify_qp_req_ramrod_data roce_modify_qp_req; 727a9b6b8fSYuval Mintz struct roce_query_qp_resp_ramrod_data roce_query_qp_resp; 737a9b6b8fSYuval Mintz struct roce_query_qp_req_ramrod_data roce_query_qp_req; 747a9b6b8fSYuval Mintz struct roce_destroy_qp_resp_ramrod_data roce_destroy_qp_resp; 757a9b6b8fSYuval Mintz struct roce_destroy_qp_req_ramrod_data roce_destroy_qp_req; 7667b40dccSKalderon, Michal struct roce_init_func_ramrod_data roce_init_func; 777a9b6b8fSYuval Mintz struct rdma_create_cq_ramrod_data rdma_create_cq; 787a9b6b8fSYuval Mintz struct rdma_destroy_cq_ramrod_data rdma_destroy_cq; 797a9b6b8fSYuval Mintz struct rdma_srq_create_ramrod_data rdma_create_srq; 807a9b6b8fSYuval Mintz struct rdma_srq_destroy_ramrod_data rdma_destroy_srq; 817a9b6b8fSYuval Mintz struct rdma_srq_modify_ramrod_data rdma_modify_srq; 8267b40dccSKalderon, Michal struct iwarp_create_qp_ramrod_data iwarp_create_qp; 83456a5849SKalderon, Michal struct iwarp_tcp_offload_ramrod_data iwarp_tcp_offload; 84456a5849SKalderon, Michal struct iwarp_mpa_offload_ramrod_data iwarp_mpa_offload; 8567b40dccSKalderon, Michal struct iwarp_modify_qp_ramrod_data iwarp_modify_qp; 8667b40dccSKalderon, Michal struct iwarp_init_func_ramrod_data iwarp_init_func; 871e128c81SArun Easi struct fcoe_init_ramrod_params fcoe_init; 881e128c81SArun Easi struct fcoe_conn_offload_ramrod_params fcoe_conn_ofld; 891e128c81SArun Easi struct fcoe_conn_terminate_ramrod_params fcoe_conn_terminate; 901e128c81SArun Easi struct fcoe_stat_ramrod_params fcoe_stat; 917a9b6b8fSYuval Mintz 927a9b6b8fSYuval Mintz struct iscsi_init_ramrod_params iscsi_init; 937a9b6b8fSYuval Mintz struct iscsi_spe_conn_offload iscsi_conn_offload; 947a9b6b8fSYuval Mintz struct iscsi_conn_update_ramrod_params iscsi_conn_update; 95dc4528e9SMintz, Yuval struct iscsi_spe_conn_mac_update iscsi_conn_mac_update; 967a9b6b8fSYuval Mintz struct iscsi_spe_conn_termination iscsi_conn_terminate; 977a9b6b8fSYuval Mintz 98897e87a1SShai Malin struct nvmetcp_init_ramrod_params nvmetcp_init; 9976684ab8SShai Malin struct nvmetcp_spe_conn_offload nvmetcp_conn_offload; 10076684ab8SShai Malin struct nvmetcp_conn_update_ramrod_params nvmetcp_conn_update; 10176684ab8SShai Malin struct nvmetcp_spe_conn_termination nvmetcp_conn_terminate; 102897e87a1SShai Malin 1031408cc1fSYuval Mintz struct vf_start_ramrod_data vf_start; 1040b55e27dSYuval Mintz struct vf_stop_ramrod_data vf_stop; 105fe56b9e6SYuval Mintz }; 106fe56b9e6SYuval Mintz 107fe56b9e6SYuval Mintz #define EQ_MAX_CREDIT 0xffffffff 108fe56b9e6SYuval Mintz 109fe56b9e6SYuval Mintz enum spq_priority { 110fe56b9e6SYuval Mintz QED_SPQ_PRIORITY_NORMAL, 111fe56b9e6SYuval Mintz QED_SPQ_PRIORITY_HIGH, 112fe56b9e6SYuval Mintz }; 113fe56b9e6SYuval Mintz 114fe56b9e6SYuval Mintz union qed_spq_req_comp { 115fe56b9e6SYuval Mintz struct qed_spq_comp_cb cb; 116fe56b9e6SYuval Mintz u64 *done_addr; 117fe56b9e6SYuval Mintz }; 118fe56b9e6SYuval Mintz 119fe56b9e6SYuval Mintz struct qed_spq_comp_done { 120d5df7688SManish Chopra unsigned int done; 121fe56b9e6SYuval Mintz u8 fw_return_code; 122fe56b9e6SYuval Mintz }; 123fe56b9e6SYuval Mintz 124fe56b9e6SYuval Mintz struct qed_spq_entry { 125fe56b9e6SYuval Mintz struct list_head list; 126fe56b9e6SYuval Mintz 127fe56b9e6SYuval Mintz u8 flags; 128fe56b9e6SYuval Mintz 129fe56b9e6SYuval Mintz /* HSI slow path element */ 130fe56b9e6SYuval Mintz struct slow_path_element elem; 131fe56b9e6SYuval Mintz 132fe56b9e6SYuval Mintz union ramrod_data ramrod; 133fe56b9e6SYuval Mintz 134fe56b9e6SYuval Mintz enum spq_priority priority; 135fe56b9e6SYuval Mintz 136fe56b9e6SYuval Mintz /* pending queue for this entry */ 137fe56b9e6SYuval Mintz struct list_head *queue; 138fe56b9e6SYuval Mintz 139fe56b9e6SYuval Mintz enum spq_mode comp_mode; 140fe56b9e6SYuval Mintz struct qed_spq_comp_cb comp_cb; 141fe56b9e6SYuval Mintz struct qed_spq_comp_done comp_done; /* SPQ_MODE_EBLOCK */ 1422632f22eSDenis Bolotin 1432632f22eSDenis Bolotin /* Posted entry for unlimited list entry in EBLOCK mode */ 1442632f22eSDenis Bolotin struct qed_spq_entry *post_ent; 145fe56b9e6SYuval Mintz }; 146fe56b9e6SYuval Mintz 147fe56b9e6SYuval Mintz struct qed_eq { 148fe56b9e6SYuval Mintz struct qed_chain chain; 149fe56b9e6SYuval Mintz u8 eq_sb_index; /* index within the SB */ 150fe56b9e6SYuval Mintz __le16 *p_fw_cons; /* ptr to index value */ 151fe56b9e6SYuval Mintz }; 152fe56b9e6SYuval Mintz 153fe56b9e6SYuval Mintz struct qed_consq { 154fe56b9e6SYuval Mintz struct qed_chain chain; 155fe56b9e6SYuval Mintz }; 156fe56b9e6SYuval Mintz 1571451e467SAlexander Lobakin typedef int (*qed_spq_async_comp_cb)(struct qed_hwfn *p_hwfn, u8 opcode, 1585ab90341SAlexander Lobakin __le16 echo, union event_ring_data *data, 1596c9e80eaSMichal Kalderon u8 fw_return_code); 1606c9e80eaSMichal Kalderon 1616c9e80eaSMichal Kalderon int 1626c9e80eaSMichal Kalderon qed_spq_register_async_cb(struct qed_hwfn *p_hwfn, 1636c9e80eaSMichal Kalderon enum protocol_type protocol_id, 1646c9e80eaSMichal Kalderon qed_spq_async_comp_cb cb); 1656c9e80eaSMichal Kalderon 1666c9e80eaSMichal Kalderon void 1676c9e80eaSMichal Kalderon qed_spq_unregister_async_cb(struct qed_hwfn *p_hwfn, 1686c9e80eaSMichal Kalderon enum protocol_type protocol_id); 1696c9e80eaSMichal Kalderon 170fe56b9e6SYuval Mintz struct qed_spq { 171fe56b9e6SYuval Mintz spinlock_t lock; /* SPQ lock */ 172fe56b9e6SYuval Mintz 173fe56b9e6SYuval Mintz struct list_head unlimited_pending; 174fe56b9e6SYuval Mintz struct list_head pending; 175fe56b9e6SYuval Mintz struct list_head completion_pending; 176fe56b9e6SYuval Mintz struct list_head free_pool; 177fe56b9e6SYuval Mintz 178fe56b9e6SYuval Mintz struct qed_chain chain; 179fe56b9e6SYuval Mintz 180fe56b9e6SYuval Mintz /* allocated dma-able memory for spq entries (+ramrod data) */ 181fe56b9e6SYuval Mintz dma_addr_t p_phys; 182fe56b9e6SYuval Mintz struct qed_spq_entry *p_virt; 183fe56b9e6SYuval Mintz 18476a9a364STomer Tayar #define SPQ_RING_SIZE \ 18576a9a364STomer Tayar (CORE_SPQE_PAGE_SIZE_BYTES / sizeof(struct slow_path_element)) 18676a9a364STomer Tayar 18776a9a364STomer Tayar /* Bitmap for handling out-of-order completions */ 18876a9a364STomer Tayar DECLARE_BITMAP(p_comp_bitmap, SPQ_RING_SIZE); 18976a9a364STomer Tayar u8 comp_bitmap_idx; 190fe56b9e6SYuval Mintz 191fe56b9e6SYuval Mintz /* Statistics */ 192fe56b9e6SYuval Mintz u32 unlimited_pending_count; 193fe56b9e6SYuval Mintz u32 normal_count; 194fe56b9e6SYuval Mintz u32 high_count; 195fe56b9e6SYuval Mintz u32 comp_sent_count; 196fe56b9e6SYuval Mintz u32 comp_count; 197fe56b9e6SYuval Mintz 198fe56b9e6SYuval Mintz u32 cid; 1999ecd8c3fSAriel Elior u32 db_addr_offset; 2009ecd8c3fSAriel Elior struct core_db_data db_data; 2016c9e80eaSMichal Kalderon qed_spq_async_comp_cb async_comp_cb[MAX_PROTOCOL_TYPE]; 202fe56b9e6SYuval Mintz }; 203fe56b9e6SYuval Mintz 204fe56b9e6SYuval Mintz /** 20519198e4eSPrabhakar Kushwaha * qed_spq_post(): Posts a Slow hwfn request to FW, or lacking that 206fe56b9e6SYuval Mintz * Pends it to the future list. 207fe56b9e6SYuval Mintz * 20819198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 20919198e4eSPrabhakar Kushwaha * @p_ent: Ent. 21019198e4eSPrabhakar Kushwaha * @fw_return_code: Return code from firmware. 211fe56b9e6SYuval Mintz * 21219198e4eSPrabhakar Kushwaha * Return: Int. 213fe56b9e6SYuval Mintz */ 214fe56b9e6SYuval Mintz int qed_spq_post(struct qed_hwfn *p_hwfn, 215fe56b9e6SYuval Mintz struct qed_spq_entry *p_ent, 216fe56b9e6SYuval Mintz u8 *fw_return_code); 217fe56b9e6SYuval Mintz 218fe56b9e6SYuval Mintz /** 21919198e4eSPrabhakar Kushwaha * qed_spq_alloc(): Alloocates & initializes the SPQ and EQ. 220fe56b9e6SYuval Mintz * 22119198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 222fe56b9e6SYuval Mintz * 22319198e4eSPrabhakar Kushwaha * Return: Int. 224fe56b9e6SYuval Mintz */ 225fe56b9e6SYuval Mintz int qed_spq_alloc(struct qed_hwfn *p_hwfn); 226fe56b9e6SYuval Mintz 227fe56b9e6SYuval Mintz /** 22819198e4eSPrabhakar Kushwaha * qed_spq_setup(): Reset the SPQ to its start state. 229fe56b9e6SYuval Mintz * 23019198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 23119198e4eSPrabhakar Kushwaha * 23219198e4eSPrabhakar Kushwaha * Return: Void. 233fe56b9e6SYuval Mintz */ 234fe56b9e6SYuval Mintz void qed_spq_setup(struct qed_hwfn *p_hwfn); 235fe56b9e6SYuval Mintz 236fe56b9e6SYuval Mintz /** 23719198e4eSPrabhakar Kushwaha * qed_spq_free(): Deallocates the given SPQ struct. 238fe56b9e6SYuval Mintz * 23919198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 24019198e4eSPrabhakar Kushwaha * 24119198e4eSPrabhakar Kushwaha * Return: Void. 242fe56b9e6SYuval Mintz */ 243fe56b9e6SYuval Mintz void qed_spq_free(struct qed_hwfn *p_hwfn); 244fe56b9e6SYuval Mintz 245fe56b9e6SYuval Mintz /** 24619198e4eSPrabhakar Kushwaha * qed_spq_get_entry(): Obtain an entrry from the spq 247fe56b9e6SYuval Mintz * free pool list. 248fe56b9e6SYuval Mintz * 24919198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 25019198e4eSPrabhakar Kushwaha * @pp_ent: PP ENT. 251fe56b9e6SYuval Mintz * 25219198e4eSPrabhakar Kushwaha * Return: Int. 253fe56b9e6SYuval Mintz */ 254fe56b9e6SYuval Mintz int 255fe56b9e6SYuval Mintz qed_spq_get_entry(struct qed_hwfn *p_hwfn, 256fe56b9e6SYuval Mintz struct qed_spq_entry **pp_ent); 257fe56b9e6SYuval Mintz 258fe56b9e6SYuval Mintz /** 25919198e4eSPrabhakar Kushwaha * qed_spq_return_entry(): Return an entry to spq free pool list. 260fe56b9e6SYuval Mintz * 26119198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 26219198e4eSPrabhakar Kushwaha * @p_ent: P ENT. 26319198e4eSPrabhakar Kushwaha * 26419198e4eSPrabhakar Kushwaha * Return: Void. 265fe56b9e6SYuval Mintz */ 266fe56b9e6SYuval Mintz void qed_spq_return_entry(struct qed_hwfn *p_hwfn, 267fe56b9e6SYuval Mintz struct qed_spq_entry *p_ent); 268fe56b9e6SYuval Mintz /** 26919198e4eSPrabhakar Kushwaha * qed_eq_alloc(): Allocates & initializes an EQ struct. 270fe56b9e6SYuval Mintz * 27119198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 27219198e4eSPrabhakar Kushwaha * @num_elem: number of elements in the eq. 273fe56b9e6SYuval Mintz * 27419198e4eSPrabhakar Kushwaha * Return: Int. 275fe56b9e6SYuval Mintz */ 2763587cb87STomer Tayar int qed_eq_alloc(struct qed_hwfn *p_hwfn, u16 num_elem); 277fe56b9e6SYuval Mintz 278fe56b9e6SYuval Mintz /** 27919198e4eSPrabhakar Kushwaha * qed_eq_setup(): Reset the EQ to its start state. 280fe56b9e6SYuval Mintz * 28119198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 28219198e4eSPrabhakar Kushwaha * 28319198e4eSPrabhakar Kushwaha * Return: Void. 284fe56b9e6SYuval Mintz */ 2853587cb87STomer Tayar void qed_eq_setup(struct qed_hwfn *p_hwfn); 286fe56b9e6SYuval Mintz 287fe56b9e6SYuval Mintz /** 28819198e4eSPrabhakar Kushwaha * qed_eq_free(): deallocates the given EQ struct. 289fe56b9e6SYuval Mintz * 29019198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 29119198e4eSPrabhakar Kushwaha * 29219198e4eSPrabhakar Kushwaha * Return: Void. 293fe56b9e6SYuval Mintz */ 2943587cb87STomer Tayar void qed_eq_free(struct qed_hwfn *p_hwfn); 295fe56b9e6SYuval Mintz 296fe56b9e6SYuval Mintz /** 29719198e4eSPrabhakar Kushwaha * qed_eq_prod_update(): update the FW with default EQ producer. 298fe56b9e6SYuval Mintz * 29919198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 30019198e4eSPrabhakar Kushwaha * @prod: Prod. 30119198e4eSPrabhakar Kushwaha * 30219198e4eSPrabhakar Kushwaha * Return: Void. 303fe56b9e6SYuval Mintz */ 304fe56b9e6SYuval Mintz void qed_eq_prod_update(struct qed_hwfn *p_hwfn, 305fe56b9e6SYuval Mintz u16 prod); 306fe56b9e6SYuval Mintz 307fe56b9e6SYuval Mintz /** 30819198e4eSPrabhakar Kushwaha * qed_eq_completion(): Completes currently pending EQ elements. 309fe56b9e6SYuval Mintz * 31019198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 31119198e4eSPrabhakar Kushwaha * @cookie: Cookie. 312fe56b9e6SYuval Mintz * 31319198e4eSPrabhakar Kushwaha * Return: Int. 314fe56b9e6SYuval Mintz */ 315fe56b9e6SYuval Mintz int qed_eq_completion(struct qed_hwfn *p_hwfn, 316fe56b9e6SYuval Mintz void *cookie); 317fe56b9e6SYuval Mintz 318fe56b9e6SYuval Mintz /** 31919198e4eSPrabhakar Kushwaha * qed_spq_completion(): Completes a single event. 320fe56b9e6SYuval Mintz * 32119198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 32219198e4eSPrabhakar Kushwaha * @echo: echo value from cookie (used for determining completion). 32319198e4eSPrabhakar Kushwaha * @fw_return_code: FW return code. 32419198e4eSPrabhakar Kushwaha * @p_data: data from cookie (used in callback function if applicable). 325fe56b9e6SYuval Mintz * 32619198e4eSPrabhakar Kushwaha * Return: Int. 327fe56b9e6SYuval Mintz */ 328fe56b9e6SYuval Mintz int qed_spq_completion(struct qed_hwfn *p_hwfn, 329fe56b9e6SYuval Mintz __le16 echo, 330fe56b9e6SYuval Mintz u8 fw_return_code, 331fe56b9e6SYuval Mintz union event_ring_data *p_data); 332fe56b9e6SYuval Mintz 333fe56b9e6SYuval Mintz /** 33419198e4eSPrabhakar Kushwaha * qed_spq_get_cid(): Given p_hwfn, return cid for the hwfn's SPQ. 335fe56b9e6SYuval Mintz * 33619198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 337fe56b9e6SYuval Mintz * 33819198e4eSPrabhakar Kushwaha * Return: u32 - SPQ CID. 339fe56b9e6SYuval Mintz */ 340fe56b9e6SYuval Mintz u32 qed_spq_get_cid(struct qed_hwfn *p_hwfn); 341fe56b9e6SYuval Mintz 342fe56b9e6SYuval Mintz /** 34319198e4eSPrabhakar Kushwaha * qed_consq_alloc(): Allocates & initializes an ConsQ struct. 344fe56b9e6SYuval Mintz * 34519198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 346fe56b9e6SYuval Mintz * 34719198e4eSPrabhakar Kushwaha * Return: Int. 348fe56b9e6SYuval Mintz */ 3493587cb87STomer Tayar int qed_consq_alloc(struct qed_hwfn *p_hwfn); 350fe56b9e6SYuval Mintz 351fe56b9e6SYuval Mintz /** 35219198e4eSPrabhakar Kushwaha * qed_consq_setup(): Reset the ConsQ to its start state. 353fe56b9e6SYuval Mintz * 35419198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 35519198e4eSPrabhakar Kushwaha * 35619198e4eSPrabhakar Kushwaha * Return Void. 357fe56b9e6SYuval Mintz */ 3583587cb87STomer Tayar void qed_consq_setup(struct qed_hwfn *p_hwfn); 359fe56b9e6SYuval Mintz 360fe56b9e6SYuval Mintz /** 36119198e4eSPrabhakar Kushwaha * qed_consq_free(): deallocates the given ConsQ struct. 362fe56b9e6SYuval Mintz * 36319198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 36419198e4eSPrabhakar Kushwaha * 36519198e4eSPrabhakar Kushwaha * Return Void. 366fe56b9e6SYuval Mintz */ 3673587cb87STomer Tayar void qed_consq_free(struct qed_hwfn *p_hwfn); 368660492bcSManish Chopra int qed_spq_pend_post(struct qed_hwfn *p_hwfn); 369fe56b9e6SYuval Mintz 37019198e4eSPrabhakar Kushwaha /* Slow-hwfn low-level commands (Ramrods) function definitions. */ 371fe56b9e6SYuval Mintz 372fe56b9e6SYuval Mintz #define QED_SP_EQ_COMPLETION 0x01 373fe56b9e6SYuval Mintz #define QED_SP_CQE_COMPLETION 0x02 374fe56b9e6SYuval Mintz 37506f56b81SYuval Mintz struct qed_sp_init_data { 37606f56b81SYuval Mintz u32 cid; 37706f56b81SYuval Mintz u16 opaque_fid; 37806f56b81SYuval Mintz 37906f56b81SYuval Mintz /* Information regarding operation upon sending & completion */ 380fe56b9e6SYuval Mintz enum spq_mode comp_mode; 381fe56b9e6SYuval Mintz struct qed_spq_comp_cb *p_comp_data; 382fe56b9e6SYuval Mintz }; 383fe56b9e6SYuval Mintz 384fb5e7438SDenis Bolotin /** 38519198e4eSPrabhakar Kushwaha * qed_sp_destroy_request(): Returns a SPQ entry to the pool / frees the 38619198e4eSPrabhakar Kushwaha * entry if allocated. Should be called on in error 38719198e4eSPrabhakar Kushwaha * flows after initializing the SPQ entry 388fb5e7438SDenis Bolotin * and before posting it. 389fb5e7438SDenis Bolotin * 39019198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 39119198e4eSPrabhakar Kushwaha * @p_ent: Ent. 39219198e4eSPrabhakar Kushwaha * 39319198e4eSPrabhakar Kushwaha * Return: Void. 394fb5e7438SDenis Bolotin */ 395fb5e7438SDenis Bolotin void qed_sp_destroy_request(struct qed_hwfn *p_hwfn, 396fb5e7438SDenis Bolotin struct qed_spq_entry *p_ent); 397fb5e7438SDenis Bolotin 398fe56b9e6SYuval Mintz int qed_sp_init_request(struct qed_hwfn *p_hwfn, 399fe56b9e6SYuval Mintz struct qed_spq_entry **pp_ent, 400fe56b9e6SYuval Mintz u8 cmd, 401fe56b9e6SYuval Mintz u8 protocol, 40206f56b81SYuval Mintz struct qed_sp_init_data *p_data); 403fe56b9e6SYuval Mintz 404fe56b9e6SYuval Mintz /** 40519198e4eSPrabhakar Kushwaha * qed_sp_pf_start(): PF Function Start Ramrod. 40619198e4eSPrabhakar Kushwaha * 40719198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 40819198e4eSPrabhakar Kushwaha * @p_ptt: P_ptt. 40919198e4eSPrabhakar Kushwaha * @p_tunn: P_tunn. 41019198e4eSPrabhakar Kushwaha * @allow_npar_tx_switch: Allow NPAR TX Switch. 41119198e4eSPrabhakar Kushwaha * 41219198e4eSPrabhakar Kushwaha * Return: Int. 413fe56b9e6SYuval Mintz * 414fe56b9e6SYuval Mintz * This ramrod is sent to initialize a physical function (PF). It will 415fe56b9e6SYuval Mintz * configure the function related parameters and write its completion to the 416fe56b9e6SYuval Mintz * event ring specified in the parameters. 417fe56b9e6SYuval Mintz * 418fe56b9e6SYuval Mintz * Ramrods complete on the common event ring for the PF. This ring is 419fe56b9e6SYuval Mintz * allocated by the driver on host memory and its parameters are written 420fe56b9e6SYuval Mintz * to the internal RAM of the UStorm by the Function Start Ramrod. 421fe56b9e6SYuval Mintz * 422fe56b9e6SYuval Mintz */ 423fe56b9e6SYuval Mintz 424fe56b9e6SYuval Mintz int qed_sp_pf_start(struct qed_hwfn *p_hwfn, 4254f64675fSManish Chopra struct qed_ptt *p_ptt, 42619968430SChopra, Manish struct qed_tunnel_info *p_tunn, 4270bc5fe85SSudarsana Reddy Kalluru bool allow_npar_tx_switch); 428fe56b9e6SYuval Mintz 429fe56b9e6SYuval Mintz /** 43019198e4eSPrabhakar Kushwaha * qed_sp_pf_update(): PF Function Update Ramrod. 43119198e4eSPrabhakar Kushwaha * 43219198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 43319198e4eSPrabhakar Kushwaha * 43419198e4eSPrabhakar Kushwaha * Return: Int. 43539651abdSSudarsana Reddy Kalluru * 43639651abdSSudarsana Reddy Kalluru * This ramrod updates function-related parameters. Every parameter can be 43739651abdSSudarsana Reddy Kalluru * updated independently, according to configuration flags. 43839651abdSSudarsana Reddy Kalluru */ 43939651abdSSudarsana Reddy Kalluru 44039651abdSSudarsana Reddy Kalluru int qed_sp_pf_update(struct qed_hwfn *p_hwfn); 44139651abdSSudarsana Reddy Kalluru 44239651abdSSudarsana Reddy Kalluru /** 44319198e4eSPrabhakar Kushwaha * qed_sp_pf_update_stag(): Update firmware of new outer tag. 4442a351fd9SMintz, Yuval * 44519198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 4462a351fd9SMintz, Yuval * 44719198e4eSPrabhakar Kushwaha * Return: Int. 4482a351fd9SMintz, Yuval */ 4492a351fd9SMintz, Yuval int qed_sp_pf_update_stag(struct qed_hwfn *p_hwfn); 4502a351fd9SMintz, Yuval 4512a351fd9SMintz, Yuval /** 45219198e4eSPrabhakar Kushwaha * qed_sp_pf_update_ufp(): PF ufp update Ramrod. 453fe56b9e6SYuval Mintz * 45419198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 455fe56b9e6SYuval Mintz * 45619198e4eSPrabhakar Kushwaha * Return: Int. 457cac6f691SSudarsana Reddy Kalluru */ 458cac6f691SSudarsana Reddy Kalluru int qed_sp_pf_update_ufp(struct qed_hwfn *p_hwfn); 459cac6f691SSudarsana Reddy Kalluru 460fe56b9e6SYuval Mintz int qed_sp_pf_stop(struct qed_hwfn *p_hwfn); 461fe56b9e6SYuval Mintz 462464f6645SManish Chopra int qed_sp_pf_update_tunn_cfg(struct qed_hwfn *p_hwfn, 4634f64675fSManish Chopra struct qed_ptt *p_ptt, 46419968430SChopra, Manish struct qed_tunnel_info *p_tunn, 465464f6645SManish Chopra enum spq_mode comp_mode, 466464f6645SManish Chopra struct qed_spq_comp_cb *p_comp_data); 46703dc76caSSudarsana Reddy Kalluru /** 46819198e4eSPrabhakar Kushwaha * qed_sp_heartbeat_ramrod(): Send empty Ramrod. 46903dc76caSSudarsana Reddy Kalluru * 47019198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 47103dc76caSSudarsana Reddy Kalluru * 47219198e4eSPrabhakar Kushwaha * Return: Int. 47303dc76caSSudarsana Reddy Kalluru */ 47403dc76caSSudarsana Reddy Kalluru 47503dc76caSSudarsana Reddy Kalluru int qed_sp_heartbeat_ramrod(struct qed_hwfn *p_hwfn); 47603dc76caSSudarsana Reddy Kalluru 477fe56b9e6SYuval Mintz #endif 478