xref: /openbmc/linux/drivers/net/ethernet/mscc/ocelot.c (revision 28de0f9fec5a84bd5b56d6364432a8730eac410a)
1a556c76aSAlexandre Belloni // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2a556c76aSAlexandre Belloni /*
3a556c76aSAlexandre Belloni  * Microsemi Ocelot Switch driver
4a556c76aSAlexandre Belloni  *
5a556c76aSAlexandre Belloni  * Copyright (c) 2017 Microsemi Corporation
6a556c76aSAlexandre Belloni  */
740d3f295SVladimir Oltean #include <linux/dsa/ocelot.h>
8a556c76aSAlexandre Belloni #include <linux/if_bridge.h>
939e5308bSYangbo Lu #include <linux/ptp_classify.h>
1020968054SVladimir Oltean #include <soc/mscc/ocelot_vcap.h>
11a556c76aSAlexandre Belloni #include "ocelot.h"
123c83654fSVladimir Oltean #include "ocelot_vcap.h"
13a556c76aSAlexandre Belloni 
14639c1b26SSteen Hegelund #define TABLE_UPDATE_SLEEP_US 10
15639c1b26SSteen Hegelund #define TABLE_UPDATE_TIMEOUT_US 100000
1654c31984SVladimir Oltean #define OCELOT_RSV_VLAN_RANGE_START 4000
17639c1b26SSteen Hegelund 
18a556c76aSAlexandre Belloni struct ocelot_mact_entry {
19a556c76aSAlexandre Belloni 	u8 mac[ETH_ALEN];
20a556c76aSAlexandre Belloni 	u16 vid;
21a556c76aSAlexandre Belloni 	enum macaccess_entry_type type;
22a556c76aSAlexandre Belloni };
23a556c76aSAlexandre Belloni 
242468346cSVladimir Oltean /* Caller must hold &ocelot->mact_lock */
25639c1b26SSteen Hegelund static inline u32 ocelot_mact_read_macaccess(struct ocelot *ocelot)
26639c1b26SSteen Hegelund {
27639c1b26SSteen Hegelund 	return ocelot_read(ocelot, ANA_TABLES_MACACCESS);
28639c1b26SSteen Hegelund }
29639c1b26SSteen Hegelund 
302468346cSVladimir Oltean /* Caller must hold &ocelot->mact_lock */
31a556c76aSAlexandre Belloni static inline int ocelot_mact_wait_for_completion(struct ocelot *ocelot)
32a556c76aSAlexandre Belloni {
33639c1b26SSteen Hegelund 	u32 val;
34a556c76aSAlexandre Belloni 
35639c1b26SSteen Hegelund 	return readx_poll_timeout(ocelot_mact_read_macaccess,
36639c1b26SSteen Hegelund 		ocelot, val,
37639c1b26SSteen Hegelund 		(val & ANA_TABLES_MACACCESS_MAC_TABLE_CMD_M) ==
38639c1b26SSteen Hegelund 		MACACCESS_CMD_IDLE,
39639c1b26SSteen Hegelund 		TABLE_UPDATE_SLEEP_US, TABLE_UPDATE_TIMEOUT_US);
40a556c76aSAlexandre Belloni }
41a556c76aSAlexandre Belloni 
422468346cSVladimir Oltean /* Caller must hold &ocelot->mact_lock */
43a556c76aSAlexandre Belloni static void ocelot_mact_select(struct ocelot *ocelot,
44a556c76aSAlexandre Belloni 			       const unsigned char mac[ETH_ALEN],
45a556c76aSAlexandre Belloni 			       unsigned int vid)
46a556c76aSAlexandre Belloni {
47a556c76aSAlexandre Belloni 	u32 macl = 0, mach = 0;
48a556c76aSAlexandre Belloni 
49a556c76aSAlexandre Belloni 	/* Set the MAC address to handle and the vlan associated in a format
50a556c76aSAlexandre Belloni 	 * understood by the hardware.
51a556c76aSAlexandre Belloni 	 */
52a556c76aSAlexandre Belloni 	mach |= vid    << 16;
53a556c76aSAlexandre Belloni 	mach |= mac[0] << 8;
54a556c76aSAlexandre Belloni 	mach |= mac[1] << 0;
55a556c76aSAlexandre Belloni 	macl |= mac[2] << 24;
56a556c76aSAlexandre Belloni 	macl |= mac[3] << 16;
57a556c76aSAlexandre Belloni 	macl |= mac[4] << 8;
58a556c76aSAlexandre Belloni 	macl |= mac[5] << 0;
59a556c76aSAlexandre Belloni 
60a556c76aSAlexandre Belloni 	ocelot_write(ocelot, macl, ANA_TABLES_MACLDATA);
61a556c76aSAlexandre Belloni 	ocelot_write(ocelot, mach, ANA_TABLES_MACHDATA);
62a556c76aSAlexandre Belloni 
63a556c76aSAlexandre Belloni }
64a556c76aSAlexandre Belloni 
650568c3bfSXiaoliang Yang static int __ocelot_mact_learn(struct ocelot *ocelot, int port,
66a556c76aSAlexandre Belloni 			       const unsigned char mac[ETH_ALEN],
679c90eea3SVladimir Oltean 			       unsigned int vid, enum macaccess_entry_type type)
68a556c76aSAlexandre Belloni {
69584b7cfcSAlban Bedel 	u32 cmd = ANA_TABLES_MACACCESS_VALID |
70584b7cfcSAlban Bedel 		ANA_TABLES_MACACCESS_DEST_IDX(port) |
71584b7cfcSAlban Bedel 		ANA_TABLES_MACACCESS_ENTRYTYPE(type) |
72584b7cfcSAlban Bedel 		ANA_TABLES_MACACCESS_MAC_TABLE_CMD(MACACCESS_CMD_LEARN);
73584b7cfcSAlban Bedel 	unsigned int mc_ports;
742468346cSVladimir Oltean 	int err;
75584b7cfcSAlban Bedel 
76584b7cfcSAlban Bedel 	/* Set MAC_CPU_COPY if the CPU port is used by a multicast entry */
77584b7cfcSAlban Bedel 	if (type == ENTRYTYPE_MACv4)
78584b7cfcSAlban Bedel 		mc_ports = (mac[1] << 8) | mac[2];
79584b7cfcSAlban Bedel 	else if (type == ENTRYTYPE_MACv6)
80584b7cfcSAlban Bedel 		mc_ports = (mac[0] << 8) | mac[1];
81584b7cfcSAlban Bedel 	else
82584b7cfcSAlban Bedel 		mc_ports = 0;
83584b7cfcSAlban Bedel 
84584b7cfcSAlban Bedel 	if (mc_ports & BIT(ocelot->num_phys_ports))
85584b7cfcSAlban Bedel 		cmd |= ANA_TABLES_MACACCESS_MAC_CPU_COPY;
86584b7cfcSAlban Bedel 
87a556c76aSAlexandre Belloni 	ocelot_mact_select(ocelot, mac, vid);
88a556c76aSAlexandre Belloni 
89a556c76aSAlexandre Belloni 	/* Issue a write command */
90584b7cfcSAlban Bedel 	ocelot_write(ocelot, cmd, ANA_TABLES_MACACCESS);
91a556c76aSAlexandre Belloni 
922468346cSVladimir Oltean 	err = ocelot_mact_wait_for_completion(ocelot);
932468346cSVladimir Oltean 
940568c3bfSXiaoliang Yang 	return err;
950568c3bfSXiaoliang Yang }
960568c3bfSXiaoliang Yang 
970568c3bfSXiaoliang Yang int ocelot_mact_learn(struct ocelot *ocelot, int port,
980568c3bfSXiaoliang Yang 		      const unsigned char mac[ETH_ALEN],
990568c3bfSXiaoliang Yang 		      unsigned int vid, enum macaccess_entry_type type)
1000568c3bfSXiaoliang Yang {
1010568c3bfSXiaoliang Yang 	int ret;
1020568c3bfSXiaoliang Yang 
1030568c3bfSXiaoliang Yang 	mutex_lock(&ocelot->mact_lock);
1040568c3bfSXiaoliang Yang 	ret = __ocelot_mact_learn(ocelot, port, mac, vid, type);
1052468346cSVladimir Oltean 	mutex_unlock(&ocelot->mact_lock);
1062468346cSVladimir Oltean 
1070568c3bfSXiaoliang Yang 	return ret;
108a556c76aSAlexandre Belloni }
1099c90eea3SVladimir Oltean EXPORT_SYMBOL(ocelot_mact_learn);
110a556c76aSAlexandre Belloni 
1119c90eea3SVladimir Oltean int ocelot_mact_forget(struct ocelot *ocelot,
1129c90eea3SVladimir Oltean 		       const unsigned char mac[ETH_ALEN], unsigned int vid)
113a556c76aSAlexandre Belloni {
1142468346cSVladimir Oltean 	int err;
1152468346cSVladimir Oltean 
1162468346cSVladimir Oltean 	mutex_lock(&ocelot->mact_lock);
1172468346cSVladimir Oltean 
118a556c76aSAlexandre Belloni 	ocelot_mact_select(ocelot, mac, vid);
119a556c76aSAlexandre Belloni 
120a556c76aSAlexandre Belloni 	/* Issue a forget command */
121a556c76aSAlexandre Belloni 	ocelot_write(ocelot,
122a556c76aSAlexandre Belloni 		     ANA_TABLES_MACACCESS_MAC_TABLE_CMD(MACACCESS_CMD_FORGET),
123a556c76aSAlexandre Belloni 		     ANA_TABLES_MACACCESS);
124a556c76aSAlexandre Belloni 
1252468346cSVladimir Oltean 	err = ocelot_mact_wait_for_completion(ocelot);
1262468346cSVladimir Oltean 
1272468346cSVladimir Oltean 	mutex_unlock(&ocelot->mact_lock);
1282468346cSVladimir Oltean 
1292468346cSVladimir Oltean 	return err;
130a556c76aSAlexandre Belloni }
1319c90eea3SVladimir Oltean EXPORT_SYMBOL(ocelot_mact_forget);
132a556c76aSAlexandre Belloni 
1330568c3bfSXiaoliang Yang int ocelot_mact_lookup(struct ocelot *ocelot, int *dst_idx,
1340568c3bfSXiaoliang Yang 		       const unsigned char mac[ETH_ALEN],
1350568c3bfSXiaoliang Yang 		       unsigned int vid, enum macaccess_entry_type *type)
1360568c3bfSXiaoliang Yang {
1370568c3bfSXiaoliang Yang 	int val;
1380568c3bfSXiaoliang Yang 
1390568c3bfSXiaoliang Yang 	mutex_lock(&ocelot->mact_lock);
1400568c3bfSXiaoliang Yang 
1410568c3bfSXiaoliang Yang 	ocelot_mact_select(ocelot, mac, vid);
1420568c3bfSXiaoliang Yang 
1430568c3bfSXiaoliang Yang 	/* Issue a read command with MACACCESS_VALID=1. */
1440568c3bfSXiaoliang Yang 	ocelot_write(ocelot, ANA_TABLES_MACACCESS_VALID |
1450568c3bfSXiaoliang Yang 		     ANA_TABLES_MACACCESS_MAC_TABLE_CMD(MACACCESS_CMD_READ),
1460568c3bfSXiaoliang Yang 		     ANA_TABLES_MACACCESS);
1470568c3bfSXiaoliang Yang 
1480568c3bfSXiaoliang Yang 	if (ocelot_mact_wait_for_completion(ocelot)) {
1490568c3bfSXiaoliang Yang 		mutex_unlock(&ocelot->mact_lock);
1500568c3bfSXiaoliang Yang 		return -ETIMEDOUT;
1510568c3bfSXiaoliang Yang 	}
1520568c3bfSXiaoliang Yang 
1530568c3bfSXiaoliang Yang 	/* Read back the entry flags */
1540568c3bfSXiaoliang Yang 	val = ocelot_read(ocelot, ANA_TABLES_MACACCESS);
1550568c3bfSXiaoliang Yang 
1560568c3bfSXiaoliang Yang 	mutex_unlock(&ocelot->mact_lock);
1570568c3bfSXiaoliang Yang 
1580568c3bfSXiaoliang Yang 	if (!(val & ANA_TABLES_MACACCESS_VALID))
1590568c3bfSXiaoliang Yang 		return -ENOENT;
1600568c3bfSXiaoliang Yang 
1610568c3bfSXiaoliang Yang 	*dst_idx = ANA_TABLES_MACACCESS_DEST_IDX_X(val);
1620568c3bfSXiaoliang Yang 	*type = ANA_TABLES_MACACCESS_ENTRYTYPE_X(val);
1630568c3bfSXiaoliang Yang 
1640568c3bfSXiaoliang Yang 	return 0;
1650568c3bfSXiaoliang Yang }
1660568c3bfSXiaoliang Yang EXPORT_SYMBOL(ocelot_mact_lookup);
1670568c3bfSXiaoliang Yang 
1680568c3bfSXiaoliang Yang int ocelot_mact_learn_streamdata(struct ocelot *ocelot, int dst_idx,
1690568c3bfSXiaoliang Yang 				 const unsigned char mac[ETH_ALEN],
1700568c3bfSXiaoliang Yang 				 unsigned int vid,
1710568c3bfSXiaoliang Yang 				 enum macaccess_entry_type type,
1720568c3bfSXiaoliang Yang 				 int sfid, int ssid)
1730568c3bfSXiaoliang Yang {
1740568c3bfSXiaoliang Yang 	int ret;
1750568c3bfSXiaoliang Yang 
1760568c3bfSXiaoliang Yang 	mutex_lock(&ocelot->mact_lock);
1770568c3bfSXiaoliang Yang 
1780568c3bfSXiaoliang Yang 	ocelot_write(ocelot,
1790568c3bfSXiaoliang Yang 		     (sfid < 0 ? 0 : ANA_TABLES_STREAMDATA_SFID_VALID) |
1800568c3bfSXiaoliang Yang 		     ANA_TABLES_STREAMDATA_SFID(sfid) |
1810568c3bfSXiaoliang Yang 		     (ssid < 0 ? 0 : ANA_TABLES_STREAMDATA_SSID_VALID) |
1820568c3bfSXiaoliang Yang 		     ANA_TABLES_STREAMDATA_SSID(ssid),
1830568c3bfSXiaoliang Yang 		     ANA_TABLES_STREAMDATA);
1840568c3bfSXiaoliang Yang 
1850568c3bfSXiaoliang Yang 	ret = __ocelot_mact_learn(ocelot, dst_idx, mac, vid, type);
1860568c3bfSXiaoliang Yang 
1870568c3bfSXiaoliang Yang 	mutex_unlock(&ocelot->mact_lock);
1880568c3bfSXiaoliang Yang 
1890568c3bfSXiaoliang Yang 	return ret;
1900568c3bfSXiaoliang Yang }
1910568c3bfSXiaoliang Yang EXPORT_SYMBOL(ocelot_mact_learn_streamdata);
1920568c3bfSXiaoliang Yang 
193a556c76aSAlexandre Belloni static void ocelot_mact_init(struct ocelot *ocelot)
194a556c76aSAlexandre Belloni {
195a556c76aSAlexandre Belloni 	/* Configure the learning mode entries attributes:
196a556c76aSAlexandre Belloni 	 * - Do not copy the frame to the CPU extraction queues.
197a556c76aSAlexandre Belloni 	 * - Use the vlan and mac_cpoy for dmac lookup.
198a556c76aSAlexandre Belloni 	 */
199a556c76aSAlexandre Belloni 	ocelot_rmw(ocelot, 0,
200a556c76aSAlexandre Belloni 		   ANA_AGENCTRL_LEARN_CPU_COPY | ANA_AGENCTRL_IGNORE_DMAC_FLAGS
201a556c76aSAlexandre Belloni 		   | ANA_AGENCTRL_LEARN_FWD_KILL
202a556c76aSAlexandre Belloni 		   | ANA_AGENCTRL_LEARN_IGNORE_VLAN,
203a556c76aSAlexandre Belloni 		   ANA_AGENCTRL);
204a556c76aSAlexandre Belloni 
2052468346cSVladimir Oltean 	/* Clear the MAC table. We are not concurrent with anyone, so
2062468346cSVladimir Oltean 	 * holding &ocelot->mact_lock is pointless.
2072468346cSVladimir Oltean 	 */
208a556c76aSAlexandre Belloni 	ocelot_write(ocelot, MACACCESS_CMD_INIT, ANA_TABLES_MACACCESS);
209a556c76aSAlexandre Belloni }
210a556c76aSAlexandre Belloni 
211f270dbfaSVladimir Oltean static void ocelot_vcap_enable(struct ocelot *ocelot, int port)
212b5962294SHoratiu Vultur {
213b5962294SHoratiu Vultur 	ocelot_write_gix(ocelot, ANA_PORT_VCAP_S2_CFG_S2_ENA |
214b5962294SHoratiu Vultur 			 ANA_PORT_VCAP_S2_CFG_S2_IP6_CFG(0xa),
215f270dbfaSVladimir Oltean 			 ANA_PORT_VCAP_S2_CFG, port);
21675944fdaSXiaoliang Yang 
21775944fdaSXiaoliang Yang 	ocelot_write_gix(ocelot, ANA_PORT_VCAP_CFG_S1_ENA,
21875944fdaSXiaoliang Yang 			 ANA_PORT_VCAP_CFG, port);
2192f17c050SXiaoliang Yang 
2202f17c050SXiaoliang Yang 	ocelot_rmw_gix(ocelot, REW_PORT_CFG_ES0_EN,
2212f17c050SXiaoliang Yang 		       REW_PORT_CFG_ES0_EN,
2222f17c050SXiaoliang Yang 		       REW_PORT_CFG, port);
223b5962294SHoratiu Vultur }
224b5962294SHoratiu Vultur 
22554c31984SVladimir Oltean static int ocelot_single_vlan_aware_bridge(struct ocelot *ocelot,
22654c31984SVladimir Oltean 					   struct netlink_ext_ack *extack)
22754c31984SVladimir Oltean {
22854c31984SVladimir Oltean 	struct net_device *bridge = NULL;
22954c31984SVladimir Oltean 	int port;
23054c31984SVladimir Oltean 
23154c31984SVladimir Oltean 	for (port = 0; port < ocelot->num_phys_ports; port++) {
23254c31984SVladimir Oltean 		struct ocelot_port *ocelot_port = ocelot->ports[port];
23354c31984SVladimir Oltean 
23454c31984SVladimir Oltean 		if (!ocelot_port || !ocelot_port->bridge ||
23554c31984SVladimir Oltean 		    !br_vlan_enabled(ocelot_port->bridge))
23654c31984SVladimir Oltean 			continue;
23754c31984SVladimir Oltean 
23854c31984SVladimir Oltean 		if (!bridge) {
23954c31984SVladimir Oltean 			bridge = ocelot_port->bridge;
24054c31984SVladimir Oltean 			continue;
24154c31984SVladimir Oltean 		}
24254c31984SVladimir Oltean 
24354c31984SVladimir Oltean 		if (bridge == ocelot_port->bridge)
24454c31984SVladimir Oltean 			continue;
24554c31984SVladimir Oltean 
24654c31984SVladimir Oltean 		NL_SET_ERR_MSG_MOD(extack,
24754c31984SVladimir Oltean 				   "Only one VLAN-aware bridge is supported");
24854c31984SVladimir Oltean 		return -EBUSY;
24954c31984SVladimir Oltean 	}
25054c31984SVladimir Oltean 
25154c31984SVladimir Oltean 	return 0;
25254c31984SVladimir Oltean }
25354c31984SVladimir Oltean 
254639c1b26SSteen Hegelund static inline u32 ocelot_vlant_read_vlanaccess(struct ocelot *ocelot)
255639c1b26SSteen Hegelund {
256639c1b26SSteen Hegelund 	return ocelot_read(ocelot, ANA_TABLES_VLANACCESS);
257639c1b26SSteen Hegelund }
258639c1b26SSteen Hegelund 
259a556c76aSAlexandre Belloni static inline int ocelot_vlant_wait_for_completion(struct ocelot *ocelot)
260a556c76aSAlexandre Belloni {
261639c1b26SSteen Hegelund 	u32 val;
262a556c76aSAlexandre Belloni 
263639c1b26SSteen Hegelund 	return readx_poll_timeout(ocelot_vlant_read_vlanaccess,
264639c1b26SSteen Hegelund 		ocelot,
265639c1b26SSteen Hegelund 		val,
266639c1b26SSteen Hegelund 		(val & ANA_TABLES_VLANACCESS_VLAN_TBL_CMD_M) ==
267639c1b26SSteen Hegelund 		ANA_TABLES_VLANACCESS_CMD_IDLE,
268639c1b26SSteen Hegelund 		TABLE_UPDATE_SLEEP_US, TABLE_UPDATE_TIMEOUT_US);
269a556c76aSAlexandre Belloni }
270a556c76aSAlexandre Belloni 
2717142529fSAntoine Tenart static int ocelot_vlant_set_mask(struct ocelot *ocelot, u16 vid, u32 mask)
2727142529fSAntoine Tenart {
2737142529fSAntoine Tenart 	/* Select the VID to configure */
2747142529fSAntoine Tenart 	ocelot_write(ocelot, ANA_TABLES_VLANTIDX_V_INDEX(vid),
2757142529fSAntoine Tenart 		     ANA_TABLES_VLANTIDX);
2767142529fSAntoine Tenart 	/* Set the vlan port members mask and issue a write command */
2777142529fSAntoine Tenart 	ocelot_write(ocelot, ANA_TABLES_VLANACCESS_VLAN_PORT_MASK(mask) |
2787142529fSAntoine Tenart 			     ANA_TABLES_VLANACCESS_CMD_WRITE,
2797142529fSAntoine Tenart 		     ANA_TABLES_VLANACCESS);
2807142529fSAntoine Tenart 
2817142529fSAntoine Tenart 	return ocelot_vlant_wait_for_completion(ocelot);
2827142529fSAntoine Tenart }
2837142529fSAntoine Tenart 
2840da1a1c4SVladimir Oltean static int ocelot_port_num_untagged_vlans(struct ocelot *ocelot, int port)
2850da1a1c4SVladimir Oltean {
2860da1a1c4SVladimir Oltean 	struct ocelot_bridge_vlan *vlan;
2870da1a1c4SVladimir Oltean 	int num_untagged = 0;
2880da1a1c4SVladimir Oltean 
2890da1a1c4SVladimir Oltean 	list_for_each_entry(vlan, &ocelot->vlans, list) {
2900da1a1c4SVladimir Oltean 		if (!(vlan->portmask & BIT(port)))
2910da1a1c4SVladimir Oltean 			continue;
2920da1a1c4SVladimir Oltean 
2930da1a1c4SVladimir Oltean 		if (vlan->untagged & BIT(port))
2940da1a1c4SVladimir Oltean 			num_untagged++;
2950da1a1c4SVladimir Oltean 	}
2960da1a1c4SVladimir Oltean 
2970da1a1c4SVladimir Oltean 	return num_untagged;
2980da1a1c4SVladimir Oltean }
2990da1a1c4SVladimir Oltean 
3000da1a1c4SVladimir Oltean static int ocelot_port_num_tagged_vlans(struct ocelot *ocelot, int port)
3010da1a1c4SVladimir Oltean {
3020da1a1c4SVladimir Oltean 	struct ocelot_bridge_vlan *vlan;
3030da1a1c4SVladimir Oltean 	int num_tagged = 0;
3040da1a1c4SVladimir Oltean 
3050da1a1c4SVladimir Oltean 	list_for_each_entry(vlan, &ocelot->vlans, list) {
3060da1a1c4SVladimir Oltean 		if (!(vlan->portmask & BIT(port)))
3070da1a1c4SVladimir Oltean 			continue;
3080da1a1c4SVladimir Oltean 
3090da1a1c4SVladimir Oltean 		if (!(vlan->untagged & BIT(port)))
3100da1a1c4SVladimir Oltean 			num_tagged++;
3110da1a1c4SVladimir Oltean 	}
3120da1a1c4SVladimir Oltean 
3130da1a1c4SVladimir Oltean 	return num_tagged;
3140da1a1c4SVladimir Oltean }
3150da1a1c4SVladimir Oltean 
3160da1a1c4SVladimir Oltean /* We use native VLAN when we have to mix egress-tagged VLANs with exactly
3170da1a1c4SVladimir Oltean  * _one_ egress-untagged VLAN (_the_ native VLAN)
3180da1a1c4SVladimir Oltean  */
3190da1a1c4SVladimir Oltean static bool ocelot_port_uses_native_vlan(struct ocelot *ocelot, int port)
3200da1a1c4SVladimir Oltean {
3210da1a1c4SVladimir Oltean 	return ocelot_port_num_tagged_vlans(ocelot, port) &&
3220da1a1c4SVladimir Oltean 	       ocelot_port_num_untagged_vlans(ocelot, port) == 1;
3230da1a1c4SVladimir Oltean }
3240da1a1c4SVladimir Oltean 
3250da1a1c4SVladimir Oltean static struct ocelot_bridge_vlan *
3260da1a1c4SVladimir Oltean ocelot_port_find_native_vlan(struct ocelot *ocelot, int port)
3270da1a1c4SVladimir Oltean {
3280da1a1c4SVladimir Oltean 	struct ocelot_bridge_vlan *vlan;
3290da1a1c4SVladimir Oltean 
3300da1a1c4SVladimir Oltean 	list_for_each_entry(vlan, &ocelot->vlans, list)
3310da1a1c4SVladimir Oltean 		if (vlan->portmask & BIT(port) && vlan->untagged & BIT(port))
3320da1a1c4SVladimir Oltean 			return vlan;
3330da1a1c4SVladimir Oltean 
3340da1a1c4SVladimir Oltean 	return NULL;
3350da1a1c4SVladimir Oltean }
3360da1a1c4SVladimir Oltean 
3370da1a1c4SVladimir Oltean /* Keep in sync REW_TAG_CFG_TAG_CFG and, if applicable,
3380da1a1c4SVladimir Oltean  * REW_PORT_VLAN_CFG_PORT_VID, with the bridge VLAN table and VLAN awareness
3390da1a1c4SVladimir Oltean  * state of the port.
3400da1a1c4SVladimir Oltean  */
3410da1a1c4SVladimir Oltean static void ocelot_port_manage_port_tag(struct ocelot *ocelot, int port)
34297bb69e1SVladimir Oltean {
34397bb69e1SVladimir Oltean 	struct ocelot_port *ocelot_port = ocelot->ports[port];
34462a22bcbSVladimir Oltean 	enum ocelot_port_tag_config tag_cfg;
3450da1a1c4SVladimir Oltean 	bool uses_native_vlan = false;
34697bb69e1SVladimir Oltean 
34787b0f983SVladimir Oltean 	if (ocelot_port->vlan_aware) {
3480da1a1c4SVladimir Oltean 		uses_native_vlan = ocelot_port_uses_native_vlan(ocelot, port);
3490da1a1c4SVladimir Oltean 
3500da1a1c4SVladimir Oltean 		if (uses_native_vlan)
35162a22bcbSVladimir Oltean 			tag_cfg = OCELOT_PORT_TAG_NATIVE;
3520da1a1c4SVladimir Oltean 		else if (ocelot_port_num_untagged_vlans(ocelot, port))
3530da1a1c4SVladimir Oltean 			tag_cfg = OCELOT_PORT_TAG_DISABLED;
35487b0f983SVladimir Oltean 		else
35562a22bcbSVladimir Oltean 			tag_cfg = OCELOT_PORT_TAG_TRUNK;
35687b0f983SVladimir Oltean 	} else {
35762a22bcbSVladimir Oltean 		tag_cfg = OCELOT_PORT_TAG_DISABLED;
35887b0f983SVladimir Oltean 	}
3590da1a1c4SVladimir Oltean 
36062a22bcbSVladimir Oltean 	ocelot_rmw_gix(ocelot, REW_TAG_CFG_TAG_CFG(tag_cfg),
36187b0f983SVladimir Oltean 		       REW_TAG_CFG_TAG_CFG_M,
36287b0f983SVladimir Oltean 		       REW_TAG_CFG, port);
3630da1a1c4SVladimir Oltean 
3640da1a1c4SVladimir Oltean 	if (uses_native_vlan) {
3650da1a1c4SVladimir Oltean 		struct ocelot_bridge_vlan *native_vlan;
3660da1a1c4SVladimir Oltean 
3670da1a1c4SVladimir Oltean 		/* Not having a native VLAN is impossible, because
3680da1a1c4SVladimir Oltean 		 * ocelot_port_num_untagged_vlans has returned 1.
3690da1a1c4SVladimir Oltean 		 * So there is no use in checking for NULL here.
3700da1a1c4SVladimir Oltean 		 */
3710da1a1c4SVladimir Oltean 		native_vlan = ocelot_port_find_native_vlan(ocelot, port);
3720da1a1c4SVladimir Oltean 
3730da1a1c4SVladimir Oltean 		ocelot_rmw_gix(ocelot,
3740da1a1c4SVladimir Oltean 			       REW_PORT_VLAN_CFG_PORT_VID(native_vlan->vid),
3750da1a1c4SVladimir Oltean 			       REW_PORT_VLAN_CFG_PORT_VID_M,
3760da1a1c4SVladimir Oltean 			       REW_PORT_VLAN_CFG, port);
3770da1a1c4SVladimir Oltean 	}
37897bb69e1SVladimir Oltean }
37997bb69e1SVladimir Oltean 
38054c31984SVladimir Oltean int ocelot_bridge_num_find(struct ocelot *ocelot,
38154c31984SVladimir Oltean 			   const struct net_device *bridge)
38254c31984SVladimir Oltean {
38354c31984SVladimir Oltean 	int port;
38454c31984SVladimir Oltean 
38554c31984SVladimir Oltean 	for (port = 0; port < ocelot->num_phys_ports; port++) {
38654c31984SVladimir Oltean 		struct ocelot_port *ocelot_port = ocelot->ports[port];
38754c31984SVladimir Oltean 
38854c31984SVladimir Oltean 		if (ocelot_port && ocelot_port->bridge == bridge)
38954c31984SVladimir Oltean 			return ocelot_port->bridge_num;
39054c31984SVladimir Oltean 	}
39154c31984SVladimir Oltean 
39254c31984SVladimir Oltean 	return -1;
39354c31984SVladimir Oltean }
39454c31984SVladimir Oltean EXPORT_SYMBOL_GPL(ocelot_bridge_num_find);
39554c31984SVladimir Oltean 
39654c31984SVladimir Oltean static u16 ocelot_vlan_unaware_pvid(struct ocelot *ocelot,
39754c31984SVladimir Oltean 				    const struct net_device *bridge)
39854c31984SVladimir Oltean {
39954c31984SVladimir Oltean 	int bridge_num;
40054c31984SVladimir Oltean 
40154c31984SVladimir Oltean 	/* Standalone ports use VID 0 */
40254c31984SVladimir Oltean 	if (!bridge)
40354c31984SVladimir Oltean 		return 0;
40454c31984SVladimir Oltean 
40554c31984SVladimir Oltean 	bridge_num = ocelot_bridge_num_find(ocelot, bridge);
40654c31984SVladimir Oltean 	if (WARN_ON(bridge_num < 0))
40754c31984SVladimir Oltean 		return 0;
40854c31984SVladimir Oltean 
40954c31984SVladimir Oltean 	/* VLAN-unaware bridges use a reserved VID going from 4095 downwards */
41054c31984SVladimir Oltean 	return VLAN_N_VID - bridge_num - 1;
41154c31984SVladimir Oltean }
41254c31984SVladimir Oltean 
41375e5a554SVladimir Oltean /* Default vlan to clasify for untagged frames (may be zero) */
414c3e58a75SVladimir Oltean static void ocelot_port_set_pvid(struct ocelot *ocelot, int port,
415d4004422SVladimir Oltean 				 const struct ocelot_bridge_vlan *pvid_vlan)
41675e5a554SVladimir Oltean {
41775e5a554SVladimir Oltean 	struct ocelot_port *ocelot_port = ocelot->ports[port];
41854c31984SVladimir Oltean 	u16 pvid = ocelot_vlan_unaware_pvid(ocelot, ocelot_port->bridge);
419be0576feSVladimir Oltean 	u32 val = 0;
42075e5a554SVladimir Oltean 
421c3e58a75SVladimir Oltean 	ocelot_port->pvid_vlan = pvid_vlan;
42275e5a554SVladimir Oltean 
423d4004422SVladimir Oltean 	if (ocelot_port->vlan_aware && pvid_vlan)
424d4004422SVladimir Oltean 		pvid = pvid_vlan->vid;
42575e5a554SVladimir Oltean 
42675e5a554SVladimir Oltean 	ocelot_rmw_gix(ocelot,
427d4004422SVladimir Oltean 		       ANA_PORT_VLAN_CFG_VLAN_VID(pvid),
42875e5a554SVladimir Oltean 		       ANA_PORT_VLAN_CFG_VLAN_VID_M,
42975e5a554SVladimir Oltean 		       ANA_PORT_VLAN_CFG, port);
430be0576feSVladimir Oltean 
431be0576feSVladimir Oltean 	/* If there's no pvid, we should drop not only untagged traffic (which
432be0576feSVladimir Oltean 	 * happens automatically), but also 802.1p traffic which gets
433be0576feSVladimir Oltean 	 * classified to VLAN 0, but that is always in our RX filter, so it
434be0576feSVladimir Oltean 	 * would get accepted were it not for this setting.
435be0576feSVladimir Oltean 	 */
436d4004422SVladimir Oltean 	if (!pvid_vlan && ocelot_port->vlan_aware)
437be0576feSVladimir Oltean 		val = ANA_PORT_DROP_CFG_DROP_PRIO_S_TAGGED_ENA |
438be0576feSVladimir Oltean 		      ANA_PORT_DROP_CFG_DROP_PRIO_C_TAGGED_ENA;
439be0576feSVladimir Oltean 
440be0576feSVladimir Oltean 	ocelot_rmw_gix(ocelot, val,
441be0576feSVladimir Oltean 		       ANA_PORT_DROP_CFG_DROP_PRIO_S_TAGGED_ENA |
442be0576feSVladimir Oltean 		       ANA_PORT_DROP_CFG_DROP_PRIO_C_TAGGED_ENA,
443be0576feSVladimir Oltean 		       ANA_PORT_DROP_CFG, port);
44475e5a554SVladimir Oltean }
44575e5a554SVladimir Oltean 
44690e0aa8dSVladimir Oltean static struct ocelot_bridge_vlan *ocelot_bridge_vlan_find(struct ocelot *ocelot,
44790e0aa8dSVladimir Oltean 							  u16 vid)
448bbf6a2d9SVladimir Oltean {
44990e0aa8dSVladimir Oltean 	struct ocelot_bridge_vlan *vlan;
450bbf6a2d9SVladimir Oltean 
45190e0aa8dSVladimir Oltean 	list_for_each_entry(vlan, &ocelot->vlans, list)
45290e0aa8dSVladimir Oltean 		if (vlan->vid == vid)
45390e0aa8dSVladimir Oltean 			return vlan;
454bbf6a2d9SVladimir Oltean 
45590e0aa8dSVladimir Oltean 	return NULL;
456bbf6a2d9SVladimir Oltean }
457bbf6a2d9SVladimir Oltean 
4580da1a1c4SVladimir Oltean static int ocelot_vlan_member_add(struct ocelot *ocelot, int port, u16 vid,
4590da1a1c4SVladimir Oltean 				  bool untagged)
460bbf6a2d9SVladimir Oltean {
46190e0aa8dSVladimir Oltean 	struct ocelot_bridge_vlan *vlan = ocelot_bridge_vlan_find(ocelot, vid);
46290e0aa8dSVladimir Oltean 	unsigned long portmask;
46390e0aa8dSVladimir Oltean 	int err;
46490e0aa8dSVladimir Oltean 
46590e0aa8dSVladimir Oltean 	if (vlan) {
46690e0aa8dSVladimir Oltean 		portmask = vlan->portmask | BIT(port);
46790e0aa8dSVladimir Oltean 
46890e0aa8dSVladimir Oltean 		err = ocelot_vlant_set_mask(ocelot, vid, portmask);
46990e0aa8dSVladimir Oltean 		if (err)
47090e0aa8dSVladimir Oltean 			return err;
47190e0aa8dSVladimir Oltean 
47290e0aa8dSVladimir Oltean 		vlan->portmask = portmask;
4730da1a1c4SVladimir Oltean 		/* Bridge VLANs can be overwritten with a different
4740da1a1c4SVladimir Oltean 		 * egress-tagging setting, so make sure to override an untagged
4750da1a1c4SVladimir Oltean 		 * with a tagged VID if that's going on.
4760da1a1c4SVladimir Oltean 		 */
4770da1a1c4SVladimir Oltean 		if (untagged)
4780da1a1c4SVladimir Oltean 			vlan->untagged |= BIT(port);
4790da1a1c4SVladimir Oltean 		else
4800da1a1c4SVladimir Oltean 			vlan->untagged &= ~BIT(port);
48190e0aa8dSVladimir Oltean 
48290e0aa8dSVladimir Oltean 		return 0;
48390e0aa8dSVladimir Oltean 	}
48490e0aa8dSVladimir Oltean 
48590e0aa8dSVladimir Oltean 	vlan = kzalloc(sizeof(*vlan), GFP_KERNEL);
48690e0aa8dSVladimir Oltean 	if (!vlan)
48790e0aa8dSVladimir Oltean 		return -ENOMEM;
48890e0aa8dSVladimir Oltean 
48990e0aa8dSVladimir Oltean 	portmask = BIT(port);
49090e0aa8dSVladimir Oltean 
49190e0aa8dSVladimir Oltean 	err = ocelot_vlant_set_mask(ocelot, vid, portmask);
49290e0aa8dSVladimir Oltean 	if (err) {
49390e0aa8dSVladimir Oltean 		kfree(vlan);
49490e0aa8dSVladimir Oltean 		return err;
49590e0aa8dSVladimir Oltean 	}
49690e0aa8dSVladimir Oltean 
49790e0aa8dSVladimir Oltean 	vlan->vid = vid;
49890e0aa8dSVladimir Oltean 	vlan->portmask = portmask;
4990da1a1c4SVladimir Oltean 	if (untagged)
5000da1a1c4SVladimir Oltean 		vlan->untagged = BIT(port);
50190e0aa8dSVladimir Oltean 	INIT_LIST_HEAD(&vlan->list);
50290e0aa8dSVladimir Oltean 	list_add_tail(&vlan->list, &ocelot->vlans);
50390e0aa8dSVladimir Oltean 
50490e0aa8dSVladimir Oltean 	return 0;
505bbf6a2d9SVladimir Oltean }
506bbf6a2d9SVladimir Oltean 
507bbf6a2d9SVladimir Oltean static int ocelot_vlan_member_del(struct ocelot *ocelot, int port, u16 vid)
508bbf6a2d9SVladimir Oltean {
50990e0aa8dSVladimir Oltean 	struct ocelot_bridge_vlan *vlan = ocelot_bridge_vlan_find(ocelot, vid);
51090e0aa8dSVladimir Oltean 	unsigned long portmask;
51190e0aa8dSVladimir Oltean 	int err;
51290e0aa8dSVladimir Oltean 
51390e0aa8dSVladimir Oltean 	if (!vlan)
51490e0aa8dSVladimir Oltean 		return 0;
51590e0aa8dSVladimir Oltean 
51690e0aa8dSVladimir Oltean 	portmask = vlan->portmask & ~BIT(port);
51790e0aa8dSVladimir Oltean 
51890e0aa8dSVladimir Oltean 	err = ocelot_vlant_set_mask(ocelot, vid, portmask);
51990e0aa8dSVladimir Oltean 	if (err)
52090e0aa8dSVladimir Oltean 		return err;
52190e0aa8dSVladimir Oltean 
52290e0aa8dSVladimir Oltean 	vlan->portmask = portmask;
52390e0aa8dSVladimir Oltean 	if (vlan->portmask)
52490e0aa8dSVladimir Oltean 		return 0;
52590e0aa8dSVladimir Oltean 
52690e0aa8dSVladimir Oltean 	list_del(&vlan->list);
52790e0aa8dSVladimir Oltean 	kfree(vlan);
52890e0aa8dSVladimir Oltean 
52990e0aa8dSVladimir Oltean 	return 0;
530bbf6a2d9SVladimir Oltean }
531bbf6a2d9SVladimir Oltean 
53254c31984SVladimir Oltean static int ocelot_add_vlan_unaware_pvid(struct ocelot *ocelot, int port,
53354c31984SVladimir Oltean 					const struct net_device *bridge)
53454c31984SVladimir Oltean {
53554c31984SVladimir Oltean 	u16 vid = ocelot_vlan_unaware_pvid(ocelot, bridge);
53654c31984SVladimir Oltean 
53754c31984SVladimir Oltean 	return ocelot_vlan_member_add(ocelot, port, vid, true);
53854c31984SVladimir Oltean }
53954c31984SVladimir Oltean 
54054c31984SVladimir Oltean static int ocelot_del_vlan_unaware_pvid(struct ocelot *ocelot, int port,
54154c31984SVladimir Oltean 					const struct net_device *bridge)
54254c31984SVladimir Oltean {
54354c31984SVladimir Oltean 	u16 vid = ocelot_vlan_unaware_pvid(ocelot, bridge);
54454c31984SVladimir Oltean 
54554c31984SVladimir Oltean 	return ocelot_vlan_member_del(ocelot, port, vid);
54654c31984SVladimir Oltean }
54754c31984SVladimir Oltean 
5482e554a7aSVladimir Oltean int ocelot_port_vlan_filtering(struct ocelot *ocelot, int port,
5493b95d1b2SVladimir Oltean 			       bool vlan_aware, struct netlink_ext_ack *extack)
55087b0f983SVladimir Oltean {
55170edfae1SVladimir Oltean 	struct ocelot_vcap_block *block = &ocelot->block[VCAP_IS1];
552bae33f2bSVladimir Oltean 	struct ocelot_port *ocelot_port = ocelot->ports[port];
55370edfae1SVladimir Oltean 	struct ocelot_vcap_filter *filter;
5541fcb8fb3SVladimir Oltean 	int err = 0;
555bae33f2bSVladimir Oltean 	u32 val;
55670edfae1SVladimir Oltean 
55770edfae1SVladimir Oltean 	list_for_each_entry(filter, &block->rules, list) {
55870edfae1SVladimir Oltean 		if (filter->ingress_port_mask & BIT(port) &&
55970edfae1SVladimir Oltean 		    filter->action.vid_replace_ena) {
5603b95d1b2SVladimir Oltean 			NL_SET_ERR_MSG_MOD(extack,
5613b95d1b2SVladimir Oltean 					   "Cannot change VLAN state with vlan modify rules active");
56270edfae1SVladimir Oltean 			return -EBUSY;
56370edfae1SVladimir Oltean 		}
56470edfae1SVladimir Oltean 	}
56570edfae1SVladimir Oltean 
56654c31984SVladimir Oltean 	err = ocelot_single_vlan_aware_bridge(ocelot, extack);
56754c31984SVladimir Oltean 	if (err)
56854c31984SVladimir Oltean 		return err;
56954c31984SVladimir Oltean 
57054c31984SVladimir Oltean 	if (vlan_aware)
57154c31984SVladimir Oltean 		err = ocelot_del_vlan_unaware_pvid(ocelot, port,
57254c31984SVladimir Oltean 						   ocelot_port->bridge);
5731fcb8fb3SVladimir Oltean 	else if (ocelot_port->bridge)
57454c31984SVladimir Oltean 		err = ocelot_add_vlan_unaware_pvid(ocelot, port,
57554c31984SVladimir Oltean 						   ocelot_port->bridge);
57654c31984SVladimir Oltean 	if (err)
57754c31984SVladimir Oltean 		return err;
57854c31984SVladimir Oltean 
57987b0f983SVladimir Oltean 	ocelot_port->vlan_aware = vlan_aware;
58087b0f983SVladimir Oltean 
58187b0f983SVladimir Oltean 	if (vlan_aware)
58287b0f983SVladimir Oltean 		val = ANA_PORT_VLAN_CFG_VLAN_AWARE_ENA |
58387b0f983SVladimir Oltean 		      ANA_PORT_VLAN_CFG_VLAN_POP_CNT(1);
58487b0f983SVladimir Oltean 	else
58587b0f983SVladimir Oltean 		val = 0;
58687b0f983SVladimir Oltean 	ocelot_rmw_gix(ocelot, val,
58787b0f983SVladimir Oltean 		       ANA_PORT_VLAN_CFG_VLAN_AWARE_ENA |
58887b0f983SVladimir Oltean 		       ANA_PORT_VLAN_CFG_VLAN_POP_CNT_M,
58987b0f983SVladimir Oltean 		       ANA_PORT_VLAN_CFG, port);
59087b0f983SVladimir Oltean 
591c3e58a75SVladimir Oltean 	ocelot_port_set_pvid(ocelot, port, ocelot_port->pvid_vlan);
5920da1a1c4SVladimir Oltean 	ocelot_port_manage_port_tag(ocelot, port);
5932e554a7aSVladimir Oltean 
5942e554a7aSVladimir Oltean 	return 0;
59587b0f983SVladimir Oltean }
59687b0f983SVladimir Oltean EXPORT_SYMBOL(ocelot_port_vlan_filtering);
59787b0f983SVladimir Oltean 
5982f0402feSVladimir Oltean int ocelot_vlan_prepare(struct ocelot *ocelot, int port, u16 vid, bool pvid,
59901af940eSVladimir Oltean 			bool untagged, struct netlink_ext_ack *extack)
6002f0402feSVladimir Oltean {
6010da1a1c4SVladimir Oltean 	if (untagged) {
6020da1a1c4SVladimir Oltean 		/* We are adding an egress-tagged VLAN */
6030da1a1c4SVladimir Oltean 		if (ocelot_port_uses_native_vlan(ocelot, port)) {
60401af940eSVladimir Oltean 			NL_SET_ERR_MSG_MOD(extack,
6050da1a1c4SVladimir Oltean 					   "Port with egress-tagged VLANs cannot have more than one egress-untagged (native) VLAN");
6062f0402feSVladimir Oltean 			return -EBUSY;
6072f0402feSVladimir Oltean 		}
6080da1a1c4SVladimir Oltean 	} else {
6090da1a1c4SVladimir Oltean 		/* We are adding an egress-tagged VLAN */
6100da1a1c4SVladimir Oltean 		if (ocelot_port_num_untagged_vlans(ocelot, port) > 1) {
6110da1a1c4SVladimir Oltean 			NL_SET_ERR_MSG_MOD(extack,
6120da1a1c4SVladimir Oltean 					   "Port with more than one egress-untagged VLAN cannot have egress-tagged VLANs");
6130da1a1c4SVladimir Oltean 			return -EBUSY;
6140da1a1c4SVladimir Oltean 		}
6150da1a1c4SVladimir Oltean 	}
6162f0402feSVladimir Oltean 
61754c31984SVladimir Oltean 	if (vid > OCELOT_RSV_VLAN_RANGE_START) {
61854c31984SVladimir Oltean 		NL_SET_ERR_MSG_MOD(extack,
61954c31984SVladimir Oltean 				   "VLAN range 4000-4095 reserved for VLAN-unaware bridging");
62054c31984SVladimir Oltean 		return -EBUSY;
62154c31984SVladimir Oltean 	}
62254c31984SVladimir Oltean 
6232f0402feSVladimir Oltean 	return 0;
6242f0402feSVladimir Oltean }
6252f0402feSVladimir Oltean EXPORT_SYMBOL(ocelot_vlan_prepare);
6262f0402feSVladimir Oltean 
6275e256365SVladimir Oltean int ocelot_vlan_add(struct ocelot *ocelot, int port, u16 vid, bool pvid,
6287142529fSAntoine Tenart 		    bool untagged)
6297142529fSAntoine Tenart {
630bbf6a2d9SVladimir Oltean 	int err;
6317142529fSAntoine Tenart 
6329323ac36SVladimir Oltean 	/* Ignore VID 0 added to our RX filter by the 8021q module, since
6339323ac36SVladimir Oltean 	 * that collides with OCELOT_STANDALONE_PVID and changes it from
6349323ac36SVladimir Oltean 	 * egress-untagged to egress-tagged.
6359323ac36SVladimir Oltean 	 */
6369323ac36SVladimir Oltean 	if (!vid)
6379323ac36SVladimir Oltean 		return 0;
6389323ac36SVladimir Oltean 
6390da1a1c4SVladimir Oltean 	err = ocelot_vlan_member_add(ocelot, port, vid, untagged);
640bbf6a2d9SVladimir Oltean 	if (err)
641bbf6a2d9SVladimir Oltean 		return err;
6427142529fSAntoine Tenart 
6437142529fSAntoine Tenart 	/* Default ingress vlan classification */
644d4004422SVladimir Oltean 	if (pvid)
645d4004422SVladimir Oltean 		ocelot_port_set_pvid(ocelot, port,
646d4004422SVladimir Oltean 				     ocelot_bridge_vlan_find(ocelot, vid));
6477142529fSAntoine Tenart 
6487142529fSAntoine Tenart 	/* Untagged egress vlan clasification */
6490da1a1c4SVladimir Oltean 	ocelot_port_manage_port_tag(ocelot, port);
6507142529fSAntoine Tenart 
6517142529fSAntoine Tenart 	return 0;
6527142529fSAntoine Tenart }
6535e256365SVladimir Oltean EXPORT_SYMBOL(ocelot_vlan_add);
6547142529fSAntoine Tenart 
6555e256365SVladimir Oltean int ocelot_vlan_del(struct ocelot *ocelot, int port, u16 vid)
6569855934cSVladimir Oltean {
6579855934cSVladimir Oltean 	struct ocelot_port *ocelot_port = ocelot->ports[port];
658ef576405SVladimir Oltean 	bool del_pvid = false;
659bbf6a2d9SVladimir Oltean 	int err;
6607142529fSAntoine Tenart 
6619323ac36SVladimir Oltean 	if (!vid)
6629323ac36SVladimir Oltean 		return 0;
6639323ac36SVladimir Oltean 
664ef576405SVladimir Oltean 	if (ocelot_port->pvid_vlan && ocelot_port->pvid_vlan->vid == vid)
665ef576405SVladimir Oltean 		del_pvid = true;
666ef576405SVladimir Oltean 
667bbf6a2d9SVladimir Oltean 	err = ocelot_vlan_member_del(ocelot, port, vid);
668bbf6a2d9SVladimir Oltean 	if (err)
669bbf6a2d9SVladimir Oltean 		return err;
6707142529fSAntoine Tenart 
671be0576feSVladimir Oltean 	/* Ingress */
672ef576405SVladimir Oltean 	if (del_pvid)
673d4004422SVladimir Oltean 		ocelot_port_set_pvid(ocelot, port, NULL);
674be0576feSVladimir Oltean 
6757142529fSAntoine Tenart 	/* Egress */
6760da1a1c4SVladimir Oltean 	ocelot_port_manage_port_tag(ocelot, port);
6777142529fSAntoine Tenart 
6787142529fSAntoine Tenart 	return 0;
6797142529fSAntoine Tenart }
6805e256365SVladimir Oltean EXPORT_SYMBOL(ocelot_vlan_del);
6817142529fSAntoine Tenart 
682a556c76aSAlexandre Belloni static void ocelot_vlan_init(struct ocelot *ocelot)
683a556c76aSAlexandre Belloni {
684bbf6a2d9SVladimir Oltean 	unsigned long all_ports = GENMASK(ocelot->num_phys_ports - 1, 0);
6857142529fSAntoine Tenart 	u16 port, vid;
6867142529fSAntoine Tenart 
687a556c76aSAlexandre Belloni 	/* Clear VLAN table, by default all ports are members of all VLANs */
688a556c76aSAlexandre Belloni 	ocelot_write(ocelot, ANA_TABLES_VLANACCESS_CMD_INIT,
689a556c76aSAlexandre Belloni 		     ANA_TABLES_VLANACCESS);
690a556c76aSAlexandre Belloni 	ocelot_vlant_wait_for_completion(ocelot);
6917142529fSAntoine Tenart 
6927142529fSAntoine Tenart 	/* Configure the port VLAN memberships */
693bbf6a2d9SVladimir Oltean 	for (vid = 1; vid < VLAN_N_VID; vid++)
69490e0aa8dSVladimir Oltean 		ocelot_vlant_set_mask(ocelot, vid, 0);
6957142529fSAntoine Tenart 
69654c31984SVladimir Oltean 	/* We need VID 0 to get traffic on standalone ports.
69754c31984SVladimir Oltean 	 * It is added automatically if the 8021q module is loaded, but we
69854c31984SVladimir Oltean 	 * can't rely on that since it might not be.
6997142529fSAntoine Tenart 	 */
70054c31984SVladimir Oltean 	ocelot_vlant_set_mask(ocelot, OCELOT_STANDALONE_PVID, all_ports);
7017142529fSAntoine Tenart 
7027142529fSAntoine Tenart 	/* Set vlan ingress filter mask to all ports but the CPU port by
7037142529fSAntoine Tenart 	 * default.
7047142529fSAntoine Tenart 	 */
705bbf6a2d9SVladimir Oltean 	ocelot_write(ocelot, all_ports, ANA_VLANMASK);
7067142529fSAntoine Tenart 
7077142529fSAntoine Tenart 	for (port = 0; port < ocelot->num_phys_ports; port++) {
7087142529fSAntoine Tenart 		ocelot_write_gix(ocelot, 0, REW_PORT_VLAN_CFG, port);
7097142529fSAntoine Tenart 		ocelot_write_gix(ocelot, 0, REW_TAG_CFG, port);
7107142529fSAntoine Tenart 	}
711a556c76aSAlexandre Belloni }
712a556c76aSAlexandre Belloni 
713eb4733d7SVladimir Oltean static u32 ocelot_read_eq_avail(struct ocelot *ocelot, int port)
714eb4733d7SVladimir Oltean {
715eb4733d7SVladimir Oltean 	return ocelot_read_rix(ocelot, QSYS_SW_STATUS, port);
716eb4733d7SVladimir Oltean }
717eb4733d7SVladimir Oltean 
718e6e12df6SVladimir Oltean static int ocelot_port_flush(struct ocelot *ocelot, int port)
719eb4733d7SVladimir Oltean {
7201650bdb1SVladimir Oltean 	unsigned int pause_ena;
721eb4733d7SVladimir Oltean 	int err, val;
722eb4733d7SVladimir Oltean 
723eb4733d7SVladimir Oltean 	/* Disable dequeuing from the egress queues */
724eb4733d7SVladimir Oltean 	ocelot_rmw_rix(ocelot, QSYS_PORT_MODE_DEQUEUE_DIS,
725eb4733d7SVladimir Oltean 		       QSYS_PORT_MODE_DEQUEUE_DIS,
726eb4733d7SVladimir Oltean 		       QSYS_PORT_MODE, port);
727eb4733d7SVladimir Oltean 
728eb4733d7SVladimir Oltean 	/* Disable flow control */
7291650bdb1SVladimir Oltean 	ocelot_fields_read(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA, &pause_ena);
730eb4733d7SVladimir Oltean 	ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA, 0);
731eb4733d7SVladimir Oltean 
732eb4733d7SVladimir Oltean 	/* Disable priority flow control */
733eb4733d7SVladimir Oltean 	ocelot_fields_write(ocelot, port,
734eb4733d7SVladimir Oltean 			    QSYS_SWITCH_PORT_MODE_TX_PFC_ENA, 0);
735eb4733d7SVladimir Oltean 
736eb4733d7SVladimir Oltean 	/* Wait at least the time it takes to receive a frame of maximum length
737eb4733d7SVladimir Oltean 	 * at the port.
738eb4733d7SVladimir Oltean 	 * Worst-case delays for 10 kilobyte jumbo frames are:
739eb4733d7SVladimir Oltean 	 * 8 ms on a 10M port
740eb4733d7SVladimir Oltean 	 * 800 μs on a 100M port
741eb4733d7SVladimir Oltean 	 * 80 μs on a 1G port
742eb4733d7SVladimir Oltean 	 * 32 μs on a 2.5G port
743eb4733d7SVladimir Oltean 	 */
744eb4733d7SVladimir Oltean 	usleep_range(8000, 10000);
745eb4733d7SVladimir Oltean 
746eb4733d7SVladimir Oltean 	/* Disable half duplex backpressure. */
747eb4733d7SVladimir Oltean 	ocelot_rmw_rix(ocelot, 0, SYS_FRONT_PORT_MODE_HDX_MODE,
748eb4733d7SVladimir Oltean 		       SYS_FRONT_PORT_MODE, port);
749eb4733d7SVladimir Oltean 
750eb4733d7SVladimir Oltean 	/* Flush the queues associated with the port. */
751eb4733d7SVladimir Oltean 	ocelot_rmw_gix(ocelot, REW_PORT_CFG_FLUSH_ENA, REW_PORT_CFG_FLUSH_ENA,
752eb4733d7SVladimir Oltean 		       REW_PORT_CFG, port);
753eb4733d7SVladimir Oltean 
754eb4733d7SVladimir Oltean 	/* Enable dequeuing from the egress queues. */
755eb4733d7SVladimir Oltean 	ocelot_rmw_rix(ocelot, 0, QSYS_PORT_MODE_DEQUEUE_DIS, QSYS_PORT_MODE,
756eb4733d7SVladimir Oltean 		       port);
757eb4733d7SVladimir Oltean 
758eb4733d7SVladimir Oltean 	/* Wait until flushing is complete. */
759eb4733d7SVladimir Oltean 	err = read_poll_timeout(ocelot_read_eq_avail, val, !val,
760eb4733d7SVladimir Oltean 				100, 2000000, false, ocelot, port);
761eb4733d7SVladimir Oltean 
762eb4733d7SVladimir Oltean 	/* Clear flushing again. */
763eb4733d7SVladimir Oltean 	ocelot_rmw_gix(ocelot, 0, REW_PORT_CFG_FLUSH_ENA, REW_PORT_CFG, port);
764eb4733d7SVladimir Oltean 
7651650bdb1SVladimir Oltean 	/* Re-enable flow control */
7661650bdb1SVladimir Oltean 	ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA, pause_ena);
7671650bdb1SVladimir Oltean 
768eb4733d7SVladimir Oltean 	return err;
769eb4733d7SVladimir Oltean }
770eb4733d7SVladimir Oltean 
771e6e12df6SVladimir Oltean void ocelot_phylink_mac_link_down(struct ocelot *ocelot, int port,
772e6e12df6SVladimir Oltean 				  unsigned int link_an_mode,
773e6e12df6SVladimir Oltean 				  phy_interface_t interface,
774e6e12df6SVladimir Oltean 				  unsigned long quirks)
775a556c76aSAlexandre Belloni {
77626f4dbabSVladimir Oltean 	struct ocelot_port *ocelot_port = ocelot->ports[port];
777e6e12df6SVladimir Oltean 	int err;
778a556c76aSAlexandre Belloni 
7798abe1970SVladimir Oltean 	ocelot_port->speed = SPEED_UNKNOWN;
7808abe1970SVladimir Oltean 
781e6e12df6SVladimir Oltean 	ocelot_port_rmwl(ocelot_port, 0, DEV_MAC_ENA_CFG_RX_ENA,
782e6e12df6SVladimir Oltean 			 DEV_MAC_ENA_CFG);
783e6e12df6SVladimir Oltean 
7848abe1970SVladimir Oltean 	if (ocelot->ops->cut_through_fwd) {
7858abe1970SVladimir Oltean 		mutex_lock(&ocelot->fwd_domain_lock);
7868abe1970SVladimir Oltean 		ocelot->ops->cut_through_fwd(ocelot);
7878abe1970SVladimir Oltean 		mutex_unlock(&ocelot->fwd_domain_lock);
7888abe1970SVladimir Oltean 	}
7898abe1970SVladimir Oltean 
790e6e12df6SVladimir Oltean 	ocelot_fields_write(ocelot, port, QSYS_SWITCH_PORT_MODE_PORT_ENA, 0);
791e6e12df6SVladimir Oltean 
792e6e12df6SVladimir Oltean 	err = ocelot_port_flush(ocelot, port);
793e6e12df6SVladimir Oltean 	if (err)
794e6e12df6SVladimir Oltean 		dev_err(ocelot->dev, "failed to flush port %d: %d\n",
795e6e12df6SVladimir Oltean 			port, err);
796e6e12df6SVladimir Oltean 
797e6e12df6SVladimir Oltean 	/* Put the port in reset. */
798e6e12df6SVladimir Oltean 	if (interface != PHY_INTERFACE_MODE_QSGMII ||
799e6e12df6SVladimir Oltean 	    !(quirks & OCELOT_QUIRK_QSGMII_PORTS_MUST_BE_UP))
800e6e12df6SVladimir Oltean 		ocelot_port_rmwl(ocelot_port,
801e6e12df6SVladimir Oltean 				 DEV_CLOCK_CFG_MAC_TX_RST |
80274a3bc42SWan Jiabing 				 DEV_CLOCK_CFG_MAC_RX_RST,
803e6e12df6SVladimir Oltean 				 DEV_CLOCK_CFG_MAC_TX_RST |
80474a3bc42SWan Jiabing 				 DEV_CLOCK_CFG_MAC_RX_RST,
805e6e12df6SVladimir Oltean 				 DEV_CLOCK_CFG);
806e6e12df6SVladimir Oltean }
807e6e12df6SVladimir Oltean EXPORT_SYMBOL_GPL(ocelot_phylink_mac_link_down);
808e6e12df6SVladimir Oltean 
809e6e12df6SVladimir Oltean void ocelot_phylink_mac_link_up(struct ocelot *ocelot, int port,
810e6e12df6SVladimir Oltean 				struct phy_device *phydev,
811e6e12df6SVladimir Oltean 				unsigned int link_an_mode,
812e6e12df6SVladimir Oltean 				phy_interface_t interface,
813e6e12df6SVladimir Oltean 				int speed, int duplex,
814e6e12df6SVladimir Oltean 				bool tx_pause, bool rx_pause,
815e6e12df6SVladimir Oltean 				unsigned long quirks)
816e6e12df6SVladimir Oltean {
817e6e12df6SVladimir Oltean 	struct ocelot_port *ocelot_port = ocelot->ports[port];
818e6e12df6SVladimir Oltean 	int mac_speed, mode = 0;
819e6e12df6SVladimir Oltean 	u32 mac_fc_cfg;
820e6e12df6SVladimir Oltean 
8218abe1970SVladimir Oltean 	ocelot_port->speed = speed;
8228abe1970SVladimir Oltean 
823e6e12df6SVladimir Oltean 	/* The MAC might be integrated in systems where the MAC speed is fixed
824e6e12df6SVladimir Oltean 	 * and it's the PCS who is performing the rate adaptation, so we have
825e6e12df6SVladimir Oltean 	 * to write "1000Mbps" into the LINK_SPEED field of DEV_CLOCK_CFG
826e6e12df6SVladimir Oltean 	 * (which is also its default value).
827e6e12df6SVladimir Oltean 	 */
828e6e12df6SVladimir Oltean 	if ((quirks & OCELOT_QUIRK_PCS_PERFORMS_RATE_ADAPTATION) ||
829e6e12df6SVladimir Oltean 	    speed == SPEED_1000) {
830e6e12df6SVladimir Oltean 		mac_speed = OCELOT_SPEED_1000;
831e6e12df6SVladimir Oltean 		mode = DEV_MAC_MODE_CFG_GIGA_MODE_ENA;
832e6e12df6SVladimir Oltean 	} else if (speed == SPEED_2500) {
833e6e12df6SVladimir Oltean 		mac_speed = OCELOT_SPEED_2500;
834e6e12df6SVladimir Oltean 		mode = DEV_MAC_MODE_CFG_GIGA_MODE_ENA;
835e6e12df6SVladimir Oltean 	} else if (speed == SPEED_100) {
836e6e12df6SVladimir Oltean 		mac_speed = OCELOT_SPEED_100;
837e6e12df6SVladimir Oltean 	} else {
838e6e12df6SVladimir Oltean 		mac_speed = OCELOT_SPEED_10;
839e6e12df6SVladimir Oltean 	}
840e6e12df6SVladimir Oltean 
841e6e12df6SVladimir Oltean 	if (duplex == DUPLEX_FULL)
842e6e12df6SVladimir Oltean 		mode |= DEV_MAC_MODE_CFG_FDX_ENA;
843e6e12df6SVladimir Oltean 
844e6e12df6SVladimir Oltean 	ocelot_port_writel(ocelot_port, mode, DEV_MAC_MODE_CFG);
845e6e12df6SVladimir Oltean 
846e6e12df6SVladimir Oltean 	/* Take port out of reset by clearing the MAC_TX_RST, MAC_RX_RST and
847e6e12df6SVladimir Oltean 	 * PORT_RST bits in DEV_CLOCK_CFG.
848e6e12df6SVladimir Oltean 	 */
849e6e12df6SVladimir Oltean 	ocelot_port_writel(ocelot_port, DEV_CLOCK_CFG_LINK_SPEED(mac_speed),
850e6e12df6SVladimir Oltean 			   DEV_CLOCK_CFG);
851e6e12df6SVladimir Oltean 
852e6e12df6SVladimir Oltean 	switch (speed) {
853a556c76aSAlexandre Belloni 	case SPEED_10:
854e6e12df6SVladimir Oltean 		mac_fc_cfg = SYS_MAC_FC_CFG_FC_LINK_SPEED(OCELOT_SPEED_10);
855a556c76aSAlexandre Belloni 		break;
856a556c76aSAlexandre Belloni 	case SPEED_100:
857e6e12df6SVladimir Oltean 		mac_fc_cfg = SYS_MAC_FC_CFG_FC_LINK_SPEED(OCELOT_SPEED_100);
858a556c76aSAlexandre Belloni 		break;
859a556c76aSAlexandre Belloni 	case SPEED_1000:
860a556c76aSAlexandre Belloni 	case SPEED_2500:
861e6e12df6SVladimir Oltean 		mac_fc_cfg = SYS_MAC_FC_CFG_FC_LINK_SPEED(OCELOT_SPEED_1000);
862a556c76aSAlexandre Belloni 		break;
863a556c76aSAlexandre Belloni 	default:
864e6e12df6SVladimir Oltean 		dev_err(ocelot->dev, "Unsupported speed on port %d: %d\n",
865e6e12df6SVladimir Oltean 			port, speed);
866a556c76aSAlexandre Belloni 		return;
867a556c76aSAlexandre Belloni 	}
868a556c76aSAlexandre Belloni 
869e6e12df6SVladimir Oltean 	/* Handle RX pause in all cases, with 2500base-X this is used for rate
870e6e12df6SVladimir Oltean 	 * adaptation.
871e6e12df6SVladimir Oltean 	 */
872e6e12df6SVladimir Oltean 	mac_fc_cfg |= SYS_MAC_FC_CFG_RX_FC_ENA;
873a556c76aSAlexandre Belloni 
874e6e12df6SVladimir Oltean 	if (tx_pause)
875e6e12df6SVladimir Oltean 		mac_fc_cfg |= SYS_MAC_FC_CFG_TX_FC_ENA |
876e6e12df6SVladimir Oltean 			      SYS_MAC_FC_CFG_PAUSE_VAL_CFG(0xffff) |
877e6e12df6SVladimir Oltean 			      SYS_MAC_FC_CFG_FC_LATENCY_CFG(0x7) |
878e6e12df6SVladimir Oltean 			      SYS_MAC_FC_CFG_ZERO_PAUSE_ENA;
879a556c76aSAlexandre Belloni 
880e6e12df6SVladimir Oltean 	/* Flow control. Link speed is only used here to evaluate the time
881e6e12df6SVladimir Oltean 	 * specification in incoming pause frames.
882e6e12df6SVladimir Oltean 	 */
883e6e12df6SVladimir Oltean 	ocelot_write_rix(ocelot, mac_fc_cfg, SYS_MAC_FC_CFG, port);
884a556c76aSAlexandre Belloni 
885e6e12df6SVladimir Oltean 	ocelot_write_rix(ocelot, 0, ANA_POL_FLOWC, port);
8861ba8f656SVladimir Oltean 
88733cb0ff3SVladimir Oltean 	/* Don't attempt to send PAUSE frames on the NPI port, it's broken */
88833cb0ff3SVladimir Oltean 	if (port != ocelot->npi)
88933cb0ff3SVladimir Oltean 		ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA,
89033cb0ff3SVladimir Oltean 				    tx_pause);
8911ba8f656SVladimir Oltean 
892e6e12df6SVladimir Oltean 	/* Undo the effects of ocelot_phylink_mac_link_down:
893e6e12df6SVladimir Oltean 	 * enable MAC module
894e6e12df6SVladimir Oltean 	 */
895004d44f6SVladimir Oltean 	ocelot_port_writel(ocelot_port, DEV_MAC_ENA_CFG_RX_ENA |
896a556c76aSAlexandre Belloni 			   DEV_MAC_ENA_CFG_TX_ENA, DEV_MAC_ENA_CFG);
897a556c76aSAlexandre Belloni 
8988abe1970SVladimir Oltean 	/* If the port supports cut-through forwarding, update the masks before
8998abe1970SVladimir Oltean 	 * enabling forwarding on the port.
9008abe1970SVladimir Oltean 	 */
9018abe1970SVladimir Oltean 	if (ocelot->ops->cut_through_fwd) {
9028abe1970SVladimir Oltean 		mutex_lock(&ocelot->fwd_domain_lock);
9038abe1970SVladimir Oltean 		ocelot->ops->cut_through_fwd(ocelot);
9048abe1970SVladimir Oltean 		mutex_unlock(&ocelot->fwd_domain_lock);
9058abe1970SVladimir Oltean 	}
9068abe1970SVladimir Oltean 
907a556c76aSAlexandre Belloni 	/* Core: Enable port for frame transfer */
908886e1387SVladimir Oltean 	ocelot_fields_write(ocelot, port,
909886e1387SVladimir Oltean 			    QSYS_SWITCH_PORT_MODE_PORT_ENA, 1);
910a556c76aSAlexandre Belloni }
911e6e12df6SVladimir Oltean EXPORT_SYMBOL_GPL(ocelot_phylink_mac_link_up);
912889b8950SVladimir Oltean 
91352849bcfSVladimir Oltean static int ocelot_port_add_txtstamp_skb(struct ocelot *ocelot, int port,
914e2f9a8feSVladimir Oltean 					struct sk_buff *clone)
915400928bfSYangbo Lu {
916e2f9a8feSVladimir Oltean 	struct ocelot_port *ocelot_port = ocelot->ports[port];
91752849bcfSVladimir Oltean 	unsigned long flags;
918400928bfSYangbo Lu 
91952849bcfSVladimir Oltean 	spin_lock_irqsave(&ocelot->ts_id_lock, flags);
92052849bcfSVladimir Oltean 
92152849bcfSVladimir Oltean 	if (ocelot_port->ptp_skbs_in_flight == OCELOT_MAX_PTP_ID ||
92252849bcfSVladimir Oltean 	    ocelot->ptp_skbs_in_flight == OCELOT_PTP_FIFO_SIZE) {
92352849bcfSVladimir Oltean 		spin_unlock_irqrestore(&ocelot->ts_id_lock, flags);
92452849bcfSVladimir Oltean 		return -EBUSY;
92552849bcfSVladimir Oltean 	}
9266565243cSVladimir Oltean 
927e2f9a8feSVladimir Oltean 	skb_shinfo(clone)->tx_flags |= SKBTX_IN_PROGRESS;
928c4b364ceSYangbo Lu 	/* Store timestamp ID in OCELOT_SKB_CB(clone)->ts_id */
929c4b364ceSYangbo Lu 	OCELOT_SKB_CB(clone)->ts_id = ocelot_port->ts_id;
93052849bcfSVladimir Oltean 
931c57fe003SVladimir Oltean 	ocelot_port->ts_id++;
932c57fe003SVladimir Oltean 	if (ocelot_port->ts_id == OCELOT_MAX_PTP_ID)
933c57fe003SVladimir Oltean 		ocelot_port->ts_id = 0;
93452849bcfSVladimir Oltean 
93552849bcfSVladimir Oltean 	ocelot_port->ptp_skbs_in_flight++;
93652849bcfSVladimir Oltean 	ocelot->ptp_skbs_in_flight++;
93752849bcfSVladimir Oltean 
938e2f9a8feSVladimir Oltean 	skb_queue_tail(&ocelot_port->tx_skbs, clone);
9396565243cSVladimir Oltean 
94052849bcfSVladimir Oltean 	spin_unlock_irqrestore(&ocelot->ts_id_lock, flags);
94152849bcfSVladimir Oltean 
94252849bcfSVladimir Oltean 	return 0;
943400928bfSYangbo Lu }
944682eaad9SYangbo Lu 
945fba01283SVladimir Oltean static bool ocelot_ptp_is_onestep_sync(struct sk_buff *skb,
946fba01283SVladimir Oltean 				       unsigned int ptp_class)
94739e5308bSYangbo Lu {
94839e5308bSYangbo Lu 	struct ptp_header *hdr;
94939e5308bSYangbo Lu 	u8 msgtype, twostep;
95039e5308bSYangbo Lu 
95139e5308bSYangbo Lu 	hdr = ptp_parse_header(skb, ptp_class);
95239e5308bSYangbo Lu 	if (!hdr)
95339e5308bSYangbo Lu 		return false;
95439e5308bSYangbo Lu 
95539e5308bSYangbo Lu 	msgtype = ptp_get_msgtype(hdr, ptp_class);
95639e5308bSYangbo Lu 	twostep = hdr->flag_field[0] & 0x2;
95739e5308bSYangbo Lu 
95839e5308bSYangbo Lu 	if (msgtype == PTP_MSGTYPE_SYNC && twostep == 0)
95939e5308bSYangbo Lu 		return true;
96039e5308bSYangbo Lu 
96139e5308bSYangbo Lu 	return false;
96239e5308bSYangbo Lu }
96339e5308bSYangbo Lu 
964682eaad9SYangbo Lu int ocelot_port_txtstamp_request(struct ocelot *ocelot, int port,
965682eaad9SYangbo Lu 				 struct sk_buff *skb,
966682eaad9SYangbo Lu 				 struct sk_buff **clone)
967682eaad9SYangbo Lu {
968682eaad9SYangbo Lu 	struct ocelot_port *ocelot_port = ocelot->ports[port];
969682eaad9SYangbo Lu 	u8 ptp_cmd = ocelot_port->ptp_cmd;
970fba01283SVladimir Oltean 	unsigned int ptp_class;
97152849bcfSVladimir Oltean 	int err;
972682eaad9SYangbo Lu 
973fba01283SVladimir Oltean 	/* Don't do anything if PTP timestamping not enabled */
974fba01283SVladimir Oltean 	if (!ptp_cmd)
975fba01283SVladimir Oltean 		return 0;
976fba01283SVladimir Oltean 
977fba01283SVladimir Oltean 	ptp_class = ptp_classify_raw(skb);
978fba01283SVladimir Oltean 	if (ptp_class == PTP_CLASS_NONE)
979fba01283SVladimir Oltean 		return -EINVAL;
980682eaad9SYangbo Lu 
98139e5308bSYangbo Lu 	/* Store ptp_cmd in OCELOT_SKB_CB(skb)->ptp_cmd */
98239e5308bSYangbo Lu 	if (ptp_cmd == IFH_REW_OP_ORIGIN_PTP) {
983fba01283SVladimir Oltean 		if (ocelot_ptp_is_onestep_sync(skb, ptp_class)) {
98439e5308bSYangbo Lu 			OCELOT_SKB_CB(skb)->ptp_cmd = ptp_cmd;
98539e5308bSYangbo Lu 			return 0;
98639e5308bSYangbo Lu 		}
98739e5308bSYangbo Lu 
98839e5308bSYangbo Lu 		/* Fall back to two-step timestamping */
98939e5308bSYangbo Lu 		ptp_cmd = IFH_REW_OP_TWO_STEP_PTP;
99039e5308bSYangbo Lu 	}
99139e5308bSYangbo Lu 
992682eaad9SYangbo Lu 	if (ptp_cmd == IFH_REW_OP_TWO_STEP_PTP) {
993682eaad9SYangbo Lu 		*clone = skb_clone_sk(skb);
994682eaad9SYangbo Lu 		if (!(*clone))
995682eaad9SYangbo Lu 			return -ENOMEM;
996682eaad9SYangbo Lu 
99752849bcfSVladimir Oltean 		err = ocelot_port_add_txtstamp_skb(ocelot, port, *clone);
99852849bcfSVladimir Oltean 		if (err)
99952849bcfSVladimir Oltean 			return err;
100052849bcfSVladimir Oltean 
100139e5308bSYangbo Lu 		OCELOT_SKB_CB(skb)->ptp_cmd = ptp_cmd;
1002ebb4c6a9SVladimir Oltean 		OCELOT_SKB_CB(*clone)->ptp_class = ptp_class;
1003682eaad9SYangbo Lu 	}
1004682eaad9SYangbo Lu 
1005682eaad9SYangbo Lu 	return 0;
1006682eaad9SYangbo Lu }
1007682eaad9SYangbo Lu EXPORT_SYMBOL(ocelot_port_txtstamp_request);
1008400928bfSYangbo Lu 
1009e23a7b3eSYangbo Lu static void ocelot_get_hwtimestamp(struct ocelot *ocelot,
1010e23a7b3eSYangbo Lu 				   struct timespec64 *ts)
10114e3b0468SAntoine Tenart {
10124e3b0468SAntoine Tenart 	unsigned long flags;
10134e3b0468SAntoine Tenart 	u32 val;
10144e3b0468SAntoine Tenart 
10154e3b0468SAntoine Tenart 	spin_lock_irqsave(&ocelot->ptp_clock_lock, flags);
10164e3b0468SAntoine Tenart 
10174e3b0468SAntoine Tenart 	/* Read current PTP time to get seconds */
10184e3b0468SAntoine Tenart 	val = ocelot_read_rix(ocelot, PTP_PIN_CFG, TOD_ACC_PIN);
10194e3b0468SAntoine Tenart 
10204e3b0468SAntoine Tenart 	val &= ~(PTP_PIN_CFG_SYNC | PTP_PIN_CFG_ACTION_MASK | PTP_PIN_CFG_DOM);
10214e3b0468SAntoine Tenart 	val |= PTP_PIN_CFG_ACTION(PTP_PIN_ACTION_SAVE);
10224e3b0468SAntoine Tenart 	ocelot_write_rix(ocelot, val, PTP_PIN_CFG, TOD_ACC_PIN);
10234e3b0468SAntoine Tenart 	ts->tv_sec = ocelot_read_rix(ocelot, PTP_PIN_TOD_SEC_LSB, TOD_ACC_PIN);
10244e3b0468SAntoine Tenart 
10254e3b0468SAntoine Tenart 	/* Read packet HW timestamp from FIFO */
10264e3b0468SAntoine Tenart 	val = ocelot_read(ocelot, SYS_PTP_TXSTAMP);
10274e3b0468SAntoine Tenart 	ts->tv_nsec = SYS_PTP_TXSTAMP_PTP_TXSTAMP(val);
10284e3b0468SAntoine Tenart 
10294e3b0468SAntoine Tenart 	/* Sec has incremented since the ts was registered */
10304e3b0468SAntoine Tenart 	if ((ts->tv_sec & 0x1) != !!(val & SYS_PTP_TXSTAMP_PTP_TXSTAMP_SEC))
10314e3b0468SAntoine Tenart 		ts->tv_sec--;
10324e3b0468SAntoine Tenart 
10334e3b0468SAntoine Tenart 	spin_unlock_irqrestore(&ocelot->ptp_clock_lock, flags);
10344e3b0468SAntoine Tenart }
1035e23a7b3eSYangbo Lu 
1036ebb4c6a9SVladimir Oltean static bool ocelot_validate_ptp_skb(struct sk_buff *clone, u16 seqid)
1037ebb4c6a9SVladimir Oltean {
1038ebb4c6a9SVladimir Oltean 	struct ptp_header *hdr;
1039ebb4c6a9SVladimir Oltean 
1040ebb4c6a9SVladimir Oltean 	hdr = ptp_parse_header(clone, OCELOT_SKB_CB(clone)->ptp_class);
1041ebb4c6a9SVladimir Oltean 	if (WARN_ON(!hdr))
1042ebb4c6a9SVladimir Oltean 		return false;
1043ebb4c6a9SVladimir Oltean 
1044ebb4c6a9SVladimir Oltean 	return seqid == ntohs(hdr->sequence_id);
1045ebb4c6a9SVladimir Oltean }
1046ebb4c6a9SVladimir Oltean 
1047e23a7b3eSYangbo Lu void ocelot_get_txtstamp(struct ocelot *ocelot)
1048e23a7b3eSYangbo Lu {
1049e23a7b3eSYangbo Lu 	int budget = OCELOT_PTP_QUEUE_SZ;
1050e23a7b3eSYangbo Lu 
1051e23a7b3eSYangbo Lu 	while (budget--) {
1052b049da13SYangbo Lu 		struct sk_buff *skb, *skb_tmp, *skb_match = NULL;
1053e23a7b3eSYangbo Lu 		struct skb_shared_hwtstamps shhwtstamps;
1054ebb4c6a9SVladimir Oltean 		u32 val, id, seqid, txport;
1055e23a7b3eSYangbo Lu 		struct ocelot_port *port;
1056e23a7b3eSYangbo Lu 		struct timespec64 ts;
1057b049da13SYangbo Lu 		unsigned long flags;
1058e23a7b3eSYangbo Lu 
1059e23a7b3eSYangbo Lu 		val = ocelot_read(ocelot, SYS_PTP_STATUS);
1060e23a7b3eSYangbo Lu 
1061e23a7b3eSYangbo Lu 		/* Check if a timestamp can be retrieved */
1062e23a7b3eSYangbo Lu 		if (!(val & SYS_PTP_STATUS_PTP_MESS_VLD))
1063e23a7b3eSYangbo Lu 			break;
1064e23a7b3eSYangbo Lu 
1065e23a7b3eSYangbo Lu 		WARN_ON(val & SYS_PTP_STATUS_PTP_OVFL);
1066e23a7b3eSYangbo Lu 
1067e23a7b3eSYangbo Lu 		/* Retrieve the ts ID and Tx port */
1068e23a7b3eSYangbo Lu 		id = SYS_PTP_STATUS_PTP_MESS_ID_X(val);
1069e23a7b3eSYangbo Lu 		txport = SYS_PTP_STATUS_PTP_MESS_TXPORT_X(val);
1070ebb4c6a9SVladimir Oltean 		seqid = SYS_PTP_STATUS_PTP_MESS_SEQ_ID(val);
1071e23a7b3eSYangbo Lu 
1072e23a7b3eSYangbo Lu 		port = ocelot->ports[txport];
1073e23a7b3eSYangbo Lu 
107452849bcfSVladimir Oltean 		spin_lock(&ocelot->ts_id_lock);
107552849bcfSVladimir Oltean 		port->ptp_skbs_in_flight--;
107652849bcfSVladimir Oltean 		ocelot->ptp_skbs_in_flight--;
107752849bcfSVladimir Oltean 		spin_unlock(&ocelot->ts_id_lock);
107852849bcfSVladimir Oltean 
107952849bcfSVladimir Oltean 		/* Retrieve its associated skb */
1080ebb4c6a9SVladimir Oltean try_again:
1081b049da13SYangbo Lu 		spin_lock_irqsave(&port->tx_skbs.lock, flags);
1082b049da13SYangbo Lu 
1083b049da13SYangbo Lu 		skb_queue_walk_safe(&port->tx_skbs, skb, skb_tmp) {
1084c4b364ceSYangbo Lu 			if (OCELOT_SKB_CB(skb)->ts_id != id)
1085e23a7b3eSYangbo Lu 				continue;
1086b049da13SYangbo Lu 			__skb_unlink(skb, &port->tx_skbs);
1087b049da13SYangbo Lu 			skb_match = skb;
1088fc62c094SYangbo Lu 			break;
1089e23a7b3eSYangbo Lu 		}
1090e23a7b3eSYangbo Lu 
1091b049da13SYangbo Lu 		spin_unlock_irqrestore(&port->tx_skbs.lock, flags);
1092b049da13SYangbo Lu 
10939fde506eSVladimir Oltean 		if (WARN_ON(!skb_match))
10949fde506eSVladimir Oltean 			continue;
10959fde506eSVladimir Oltean 
1096ebb4c6a9SVladimir Oltean 		if (!ocelot_validate_ptp_skb(skb_match, seqid)) {
1097ebb4c6a9SVladimir Oltean 			dev_err_ratelimited(ocelot->dev,
1098ebb4c6a9SVladimir Oltean 					    "port %d received stale TX timestamp for seqid %d, discarding\n",
1099ebb4c6a9SVladimir Oltean 					    txport, seqid);
1100ebb4c6a9SVladimir Oltean 			dev_kfree_skb_any(skb);
1101ebb4c6a9SVladimir Oltean 			goto try_again;
1102ebb4c6a9SVladimir Oltean 		}
1103ebb4c6a9SVladimir Oltean 
11045fd82200Slaurent brando 		/* Get the h/w timestamp */
11055fd82200Slaurent brando 		ocelot_get_hwtimestamp(ocelot, &ts);
1106e23a7b3eSYangbo Lu 
1107e23a7b3eSYangbo Lu 		/* Set the timestamp into the skb */
1108e23a7b3eSYangbo Lu 		memset(&shhwtstamps, 0, sizeof(shhwtstamps));
1109e23a7b3eSYangbo Lu 		shhwtstamps.hwtstamp = ktime_set(ts.tv_sec, ts.tv_nsec);
1110e2f9a8feSVladimir Oltean 		skb_complete_tx_timestamp(skb_match, &shhwtstamps);
11115fd82200Slaurent brando 
11125fd82200Slaurent brando 		/* Next ts */
11135fd82200Slaurent brando 		ocelot_write(ocelot, SYS_PTP_NXT_PTP_NXT, SYS_PTP_NXT);
1114e23a7b3eSYangbo Lu 	}
1115e23a7b3eSYangbo Lu }
1116e23a7b3eSYangbo Lu EXPORT_SYMBOL(ocelot_get_txtstamp);
11174e3b0468SAntoine Tenart 
1118924ee317SVladimir Oltean static int ocelot_rx_frame_word(struct ocelot *ocelot, u8 grp, bool ifh,
1119924ee317SVladimir Oltean 				u32 *rval)
1120924ee317SVladimir Oltean {
1121924ee317SVladimir Oltean 	u32 bytes_valid, val;
1122924ee317SVladimir Oltean 
1123924ee317SVladimir Oltean 	val = ocelot_read_rix(ocelot, QS_XTR_RD, grp);
1124924ee317SVladimir Oltean 	if (val == XTR_NOT_READY) {
1125924ee317SVladimir Oltean 		if (ifh)
1126924ee317SVladimir Oltean 			return -EIO;
1127924ee317SVladimir Oltean 
1128924ee317SVladimir Oltean 		do {
1129924ee317SVladimir Oltean 			val = ocelot_read_rix(ocelot, QS_XTR_RD, grp);
1130924ee317SVladimir Oltean 		} while (val == XTR_NOT_READY);
1131924ee317SVladimir Oltean 	}
1132924ee317SVladimir Oltean 
1133924ee317SVladimir Oltean 	switch (val) {
1134924ee317SVladimir Oltean 	case XTR_ABORT:
1135924ee317SVladimir Oltean 		return -EIO;
1136924ee317SVladimir Oltean 	case XTR_EOF_0:
1137924ee317SVladimir Oltean 	case XTR_EOF_1:
1138924ee317SVladimir Oltean 	case XTR_EOF_2:
1139924ee317SVladimir Oltean 	case XTR_EOF_3:
1140924ee317SVladimir Oltean 	case XTR_PRUNED:
1141924ee317SVladimir Oltean 		bytes_valid = XTR_VALID_BYTES(val);
1142924ee317SVladimir Oltean 		val = ocelot_read_rix(ocelot, QS_XTR_RD, grp);
1143924ee317SVladimir Oltean 		if (val == XTR_ESCAPE)
1144924ee317SVladimir Oltean 			*rval = ocelot_read_rix(ocelot, QS_XTR_RD, grp);
1145924ee317SVladimir Oltean 		else
1146924ee317SVladimir Oltean 			*rval = val;
1147924ee317SVladimir Oltean 
1148924ee317SVladimir Oltean 		return bytes_valid;
1149924ee317SVladimir Oltean 	case XTR_ESCAPE:
1150924ee317SVladimir Oltean 		*rval = ocelot_read_rix(ocelot, QS_XTR_RD, grp);
1151924ee317SVladimir Oltean 
1152924ee317SVladimir Oltean 		return 4;
1153924ee317SVladimir Oltean 	default:
1154924ee317SVladimir Oltean 		*rval = val;
1155924ee317SVladimir Oltean 
1156924ee317SVladimir Oltean 		return 4;
1157924ee317SVladimir Oltean 	}
1158924ee317SVladimir Oltean }
1159924ee317SVladimir Oltean 
1160924ee317SVladimir Oltean static int ocelot_xtr_poll_xfh(struct ocelot *ocelot, int grp, u32 *xfh)
1161924ee317SVladimir Oltean {
1162924ee317SVladimir Oltean 	int i, err = 0;
1163924ee317SVladimir Oltean 
1164924ee317SVladimir Oltean 	for (i = 0; i < OCELOT_TAG_LEN / 4; i++) {
1165924ee317SVladimir Oltean 		err = ocelot_rx_frame_word(ocelot, grp, true, &xfh[i]);
1166924ee317SVladimir Oltean 		if (err != 4)
1167924ee317SVladimir Oltean 			return (err < 0) ? err : -EIO;
1168924ee317SVladimir Oltean 	}
1169924ee317SVladimir Oltean 
1170924ee317SVladimir Oltean 	return 0;
1171924ee317SVladimir Oltean }
1172924ee317SVladimir Oltean 
1173b471a71eSClément Léger void ocelot_ptp_rx_timestamp(struct ocelot *ocelot, struct sk_buff *skb,
1174b471a71eSClément Léger 			     u64 timestamp)
1175924ee317SVladimir Oltean {
1176924ee317SVladimir Oltean 	struct skb_shared_hwtstamps *shhwtstamps;
11772ed2c5f0SHoratiu Vultur 	u64 tod_in_ns, full_ts_in_ns;
1178b471a71eSClément Léger 	struct timespec64 ts;
1179b471a71eSClément Léger 
1180b471a71eSClément Léger 	ocelot_ptp_gettime64(&ocelot->ptp_info, &ts);
1181b471a71eSClément Léger 
1182b471a71eSClément Léger 	tod_in_ns = ktime_set(ts.tv_sec, ts.tv_nsec);
1183b471a71eSClément Léger 	if ((tod_in_ns & 0xffffffff) < timestamp)
1184b471a71eSClément Léger 		full_ts_in_ns = (((tod_in_ns >> 32) - 1) << 32) |
1185b471a71eSClément Léger 				timestamp;
1186b471a71eSClément Léger 	else
1187b471a71eSClément Léger 		full_ts_in_ns = (tod_in_ns & GENMASK_ULL(63, 32)) |
1188b471a71eSClément Léger 				timestamp;
1189b471a71eSClément Léger 
1190b471a71eSClément Léger 	shhwtstamps = skb_hwtstamps(skb);
1191b471a71eSClément Léger 	memset(shhwtstamps, 0, sizeof(struct skb_shared_hwtstamps));
1192b471a71eSClément Léger 	shhwtstamps->hwtstamp = full_ts_in_ns;
1193b471a71eSClément Léger }
1194b471a71eSClément Léger EXPORT_SYMBOL(ocelot_ptp_rx_timestamp);
1195b471a71eSClément Léger 
1196b471a71eSClément Léger int ocelot_xtr_poll_frame(struct ocelot *ocelot, int grp, struct sk_buff **nskb)
1197b471a71eSClément Léger {
1198924ee317SVladimir Oltean 	u64 timestamp, src_port, len;
1199924ee317SVladimir Oltean 	u32 xfh[OCELOT_TAG_LEN / 4];
1200924ee317SVladimir Oltean 	struct net_device *dev;
1201924ee317SVladimir Oltean 	struct sk_buff *skb;
1202924ee317SVladimir Oltean 	int sz, buf_len;
1203924ee317SVladimir Oltean 	u32 val, *buf;
1204924ee317SVladimir Oltean 	int err;
1205924ee317SVladimir Oltean 
1206924ee317SVladimir Oltean 	err = ocelot_xtr_poll_xfh(ocelot, grp, xfh);
1207924ee317SVladimir Oltean 	if (err)
1208924ee317SVladimir Oltean 		return err;
1209924ee317SVladimir Oltean 
1210924ee317SVladimir Oltean 	ocelot_xfh_get_src_port(xfh, &src_port);
1211924ee317SVladimir Oltean 	ocelot_xfh_get_len(xfh, &len);
1212924ee317SVladimir Oltean 	ocelot_xfh_get_rew_val(xfh, &timestamp);
1213924ee317SVladimir Oltean 
1214924ee317SVladimir Oltean 	if (WARN_ON(src_port >= ocelot->num_phys_ports))
1215924ee317SVladimir Oltean 		return -EINVAL;
1216924ee317SVladimir Oltean 
1217924ee317SVladimir Oltean 	dev = ocelot->ops->port_to_netdev(ocelot, src_port);
1218924ee317SVladimir Oltean 	if (!dev)
1219924ee317SVladimir Oltean 		return -EINVAL;
1220924ee317SVladimir Oltean 
1221924ee317SVladimir Oltean 	skb = netdev_alloc_skb(dev, len);
1222924ee317SVladimir Oltean 	if (unlikely(!skb)) {
1223924ee317SVladimir Oltean 		netdev_err(dev, "Unable to allocate sk_buff\n");
1224924ee317SVladimir Oltean 		return -ENOMEM;
1225924ee317SVladimir Oltean 	}
1226924ee317SVladimir Oltean 
1227924ee317SVladimir Oltean 	buf_len = len - ETH_FCS_LEN;
1228924ee317SVladimir Oltean 	buf = (u32 *)skb_put(skb, buf_len);
1229924ee317SVladimir Oltean 
1230924ee317SVladimir Oltean 	len = 0;
1231924ee317SVladimir Oltean 	do {
1232924ee317SVladimir Oltean 		sz = ocelot_rx_frame_word(ocelot, grp, false, &val);
1233924ee317SVladimir Oltean 		if (sz < 0) {
1234924ee317SVladimir Oltean 			err = sz;
1235924ee317SVladimir Oltean 			goto out_free_skb;
1236924ee317SVladimir Oltean 		}
1237924ee317SVladimir Oltean 		*buf++ = val;
1238924ee317SVladimir Oltean 		len += sz;
1239924ee317SVladimir Oltean 	} while (len < buf_len);
1240924ee317SVladimir Oltean 
1241924ee317SVladimir Oltean 	/* Read the FCS */
1242924ee317SVladimir Oltean 	sz = ocelot_rx_frame_word(ocelot, grp, false, &val);
1243924ee317SVladimir Oltean 	if (sz < 0) {
1244924ee317SVladimir Oltean 		err = sz;
1245924ee317SVladimir Oltean 		goto out_free_skb;
1246924ee317SVladimir Oltean 	}
1247924ee317SVladimir Oltean 
1248924ee317SVladimir Oltean 	/* Update the statistics if part of the FCS was read before */
1249924ee317SVladimir Oltean 	len -= ETH_FCS_LEN - sz;
1250924ee317SVladimir Oltean 
1251924ee317SVladimir Oltean 	if (unlikely(dev->features & NETIF_F_RXFCS)) {
1252924ee317SVladimir Oltean 		buf = (u32 *)skb_put(skb, ETH_FCS_LEN);
1253924ee317SVladimir Oltean 		*buf = val;
1254924ee317SVladimir Oltean 	}
1255924ee317SVladimir Oltean 
1256b471a71eSClément Léger 	if (ocelot->ptp)
1257b471a71eSClément Léger 		ocelot_ptp_rx_timestamp(ocelot, skb, timestamp);
1258924ee317SVladimir Oltean 
1259924ee317SVladimir Oltean 	/* Everything we see on an interface that is in the HW bridge
1260924ee317SVladimir Oltean 	 * has already been forwarded.
1261924ee317SVladimir Oltean 	 */
1262df291e54SVladimir Oltean 	if (ocelot->ports[src_port]->bridge)
1263924ee317SVladimir Oltean 		skb->offload_fwd_mark = 1;
1264924ee317SVladimir Oltean 
1265924ee317SVladimir Oltean 	skb->protocol = eth_type_trans(skb, dev);
1266d8ea7ff3SHoratiu Vultur 
1267924ee317SVladimir Oltean 	*nskb = skb;
1268924ee317SVladimir Oltean 
1269924ee317SVladimir Oltean 	return 0;
1270924ee317SVladimir Oltean 
1271924ee317SVladimir Oltean out_free_skb:
1272924ee317SVladimir Oltean 	kfree_skb(skb);
1273924ee317SVladimir Oltean 	return err;
1274924ee317SVladimir Oltean }
1275924ee317SVladimir Oltean EXPORT_SYMBOL(ocelot_xtr_poll_frame);
1276924ee317SVladimir Oltean 
1277137ffbc4SVladimir Oltean bool ocelot_can_inject(struct ocelot *ocelot, int grp)
1278137ffbc4SVladimir Oltean {
1279137ffbc4SVladimir Oltean 	u32 val = ocelot_read(ocelot, QS_INJ_STATUS);
1280137ffbc4SVladimir Oltean 
1281137ffbc4SVladimir Oltean 	if (!(val & QS_INJ_STATUS_FIFO_RDY(BIT(grp))))
1282137ffbc4SVladimir Oltean 		return false;
1283137ffbc4SVladimir Oltean 	if (val & QS_INJ_STATUS_WMARK_REACHED(BIT(grp)))
1284137ffbc4SVladimir Oltean 		return false;
1285137ffbc4SVladimir Oltean 
1286137ffbc4SVladimir Oltean 	return true;
1287137ffbc4SVladimir Oltean }
1288137ffbc4SVladimir Oltean EXPORT_SYMBOL(ocelot_can_inject);
1289137ffbc4SVladimir Oltean 
1290e5150f00SClément Léger void ocelot_ifh_port_set(void *ifh, int port, u32 rew_op, u32 vlan_tag)
1291e5150f00SClément Léger {
1292e5150f00SClément Léger 	ocelot_ifh_set_bypass(ifh, 1);
1293e5150f00SClément Léger 	ocelot_ifh_set_dest(ifh, BIT_ULL(port));
1294e5150f00SClément Léger 	ocelot_ifh_set_tag_type(ifh, IFH_TAG_TYPE_C);
1295e5150f00SClément Léger 	if (vlan_tag)
1296e5150f00SClément Léger 		ocelot_ifh_set_vlan_tci(ifh, vlan_tag);
1297e5150f00SClément Léger 	if (rew_op)
1298e5150f00SClément Léger 		ocelot_ifh_set_rew_op(ifh, rew_op);
1299e5150f00SClément Léger }
1300e5150f00SClément Léger EXPORT_SYMBOL(ocelot_ifh_port_set);
1301e5150f00SClément Léger 
1302137ffbc4SVladimir Oltean void ocelot_port_inject_frame(struct ocelot *ocelot, int port, int grp,
1303137ffbc4SVladimir Oltean 			      u32 rew_op, struct sk_buff *skb)
1304137ffbc4SVladimir Oltean {
130540d3f295SVladimir Oltean 	u32 ifh[OCELOT_TAG_LEN / 4] = {0};
1306137ffbc4SVladimir Oltean 	unsigned int i, count, last;
1307137ffbc4SVladimir Oltean 
1308137ffbc4SVladimir Oltean 	ocelot_write_rix(ocelot, QS_INJ_CTRL_GAP_SIZE(1) |
1309137ffbc4SVladimir Oltean 			 QS_INJ_CTRL_SOF, QS_INJ_CTRL, grp);
1310137ffbc4SVladimir Oltean 
1311e5150f00SClément Léger 	ocelot_ifh_port_set(ifh, port, rew_op, skb_vlan_tag_get(skb));
1312137ffbc4SVladimir Oltean 
1313137ffbc4SVladimir Oltean 	for (i = 0; i < OCELOT_TAG_LEN / 4; i++)
131440d3f295SVladimir Oltean 		ocelot_write_rix(ocelot, ifh[i], QS_INJ_WR, grp);
1315137ffbc4SVladimir Oltean 
1316137ffbc4SVladimir Oltean 	count = DIV_ROUND_UP(skb->len, 4);
1317137ffbc4SVladimir Oltean 	last = skb->len % 4;
1318137ffbc4SVladimir Oltean 	for (i = 0; i < count; i++)
1319137ffbc4SVladimir Oltean 		ocelot_write_rix(ocelot, ((u32 *)skb->data)[i], QS_INJ_WR, grp);
1320137ffbc4SVladimir Oltean 
1321137ffbc4SVladimir Oltean 	/* Add padding */
1322137ffbc4SVladimir Oltean 	while (i < (OCELOT_BUFFER_CELL_SZ / 4)) {
1323137ffbc4SVladimir Oltean 		ocelot_write_rix(ocelot, 0, QS_INJ_WR, grp);
1324137ffbc4SVladimir Oltean 		i++;
1325137ffbc4SVladimir Oltean 	}
1326137ffbc4SVladimir Oltean 
1327137ffbc4SVladimir Oltean 	/* Indicate EOF and valid bytes in last word */
1328137ffbc4SVladimir Oltean 	ocelot_write_rix(ocelot, QS_INJ_CTRL_GAP_SIZE(1) |
1329137ffbc4SVladimir Oltean 			 QS_INJ_CTRL_VLD_BYTES(skb->len < OCELOT_BUFFER_CELL_SZ ? 0 : last) |
1330137ffbc4SVladimir Oltean 			 QS_INJ_CTRL_EOF,
1331137ffbc4SVladimir Oltean 			 QS_INJ_CTRL, grp);
1332137ffbc4SVladimir Oltean 
1333137ffbc4SVladimir Oltean 	/* Add dummy CRC */
1334137ffbc4SVladimir Oltean 	ocelot_write_rix(ocelot, 0, QS_INJ_WR, grp);
1335137ffbc4SVladimir Oltean 	skb_tx_timestamp(skb);
1336137ffbc4SVladimir Oltean 
1337137ffbc4SVladimir Oltean 	skb->dev->stats.tx_packets++;
1338137ffbc4SVladimir Oltean 	skb->dev->stats.tx_bytes += skb->len;
1339137ffbc4SVladimir Oltean }
1340137ffbc4SVladimir Oltean EXPORT_SYMBOL(ocelot_port_inject_frame);
1341137ffbc4SVladimir Oltean 
13420a6f17c6SVladimir Oltean void ocelot_drain_cpu_queue(struct ocelot *ocelot, int grp)
13430a6f17c6SVladimir Oltean {
13440a6f17c6SVladimir Oltean 	while (ocelot_read(ocelot, QS_XTR_DATA_PRESENT) & BIT(grp))
13450a6f17c6SVladimir Oltean 		ocelot_read_rix(ocelot, QS_XTR_RD, grp);
13460a6f17c6SVladimir Oltean }
13470a6f17c6SVladimir Oltean EXPORT_SYMBOL(ocelot_drain_cpu_queue);
13480a6f17c6SVladimir Oltean 
134954c31984SVladimir Oltean int ocelot_fdb_add(struct ocelot *ocelot, int port, const unsigned char *addr,
135054c31984SVladimir Oltean 		   u16 vid, const struct net_device *bridge)
1351a556c76aSAlexandre Belloni {
1352471beb11SVladimir Oltean 	int pgid = port;
1353471beb11SVladimir Oltean 
1354471beb11SVladimir Oltean 	if (port == ocelot->npi)
1355471beb11SVladimir Oltean 		pgid = PGID_CPU;
1356a556c76aSAlexandre Belloni 
135754c31984SVladimir Oltean 	if (!vid)
135854c31984SVladimir Oltean 		vid = ocelot_vlan_unaware_pvid(ocelot, bridge);
135954c31984SVladimir Oltean 
1360471beb11SVladimir Oltean 	return ocelot_mact_learn(ocelot, pgid, addr, vid, ENTRYTYPE_LOCKED);
1361a556c76aSAlexandre Belloni }
13625e256365SVladimir Oltean EXPORT_SYMBOL(ocelot_fdb_add);
1363a556c76aSAlexandre Belloni 
136454c31984SVladimir Oltean int ocelot_fdb_del(struct ocelot *ocelot, int port, const unsigned char *addr,
136554c31984SVladimir Oltean 		   u16 vid, const struct net_device *bridge)
1366531ee1a6SVladimir Oltean {
136754c31984SVladimir Oltean 	if (!vid)
136854c31984SVladimir Oltean 		vid = ocelot_vlan_unaware_pvid(ocelot, bridge);
136954c31984SVladimir Oltean 
1370531ee1a6SVladimir Oltean 	return ocelot_mact_forget(ocelot, addr, vid);
1371531ee1a6SVladimir Oltean }
13725e256365SVladimir Oltean EXPORT_SYMBOL(ocelot_fdb_del);
1373531ee1a6SVladimir Oltean 
13749c90eea3SVladimir Oltean int ocelot_port_fdb_do_dump(const unsigned char *addr, u16 vid,
1375531ee1a6SVladimir Oltean 			    bool is_static, void *data)
1376a556c76aSAlexandre Belloni {
1377531ee1a6SVladimir Oltean 	struct ocelot_dump_ctx *dump = data;
1378a556c76aSAlexandre Belloni 	u32 portid = NETLINK_CB(dump->cb->skb).portid;
1379a556c76aSAlexandre Belloni 	u32 seq = dump->cb->nlh->nlmsg_seq;
1380a556c76aSAlexandre Belloni 	struct nlmsghdr *nlh;
1381a556c76aSAlexandre Belloni 	struct ndmsg *ndm;
1382a556c76aSAlexandre Belloni 
1383a556c76aSAlexandre Belloni 	if (dump->idx < dump->cb->args[2])
1384a556c76aSAlexandre Belloni 		goto skip;
1385a556c76aSAlexandre Belloni 
1386a556c76aSAlexandre Belloni 	nlh = nlmsg_put(dump->skb, portid, seq, RTM_NEWNEIGH,
1387a556c76aSAlexandre Belloni 			sizeof(*ndm), NLM_F_MULTI);
1388a556c76aSAlexandre Belloni 	if (!nlh)
1389a556c76aSAlexandre Belloni 		return -EMSGSIZE;
1390a556c76aSAlexandre Belloni 
1391a556c76aSAlexandre Belloni 	ndm = nlmsg_data(nlh);
1392a556c76aSAlexandre Belloni 	ndm->ndm_family  = AF_BRIDGE;
1393a556c76aSAlexandre Belloni 	ndm->ndm_pad1    = 0;
1394a556c76aSAlexandre Belloni 	ndm->ndm_pad2    = 0;
1395a556c76aSAlexandre Belloni 	ndm->ndm_flags   = NTF_SELF;
1396a556c76aSAlexandre Belloni 	ndm->ndm_type    = 0;
1397a556c76aSAlexandre Belloni 	ndm->ndm_ifindex = dump->dev->ifindex;
1398531ee1a6SVladimir Oltean 	ndm->ndm_state   = is_static ? NUD_NOARP : NUD_REACHABLE;
1399a556c76aSAlexandre Belloni 
1400531ee1a6SVladimir Oltean 	if (nla_put(dump->skb, NDA_LLADDR, ETH_ALEN, addr))
1401a556c76aSAlexandre Belloni 		goto nla_put_failure;
1402a556c76aSAlexandre Belloni 
1403531ee1a6SVladimir Oltean 	if (vid && nla_put_u16(dump->skb, NDA_VLAN, vid))
1404a556c76aSAlexandre Belloni 		goto nla_put_failure;
1405a556c76aSAlexandre Belloni 
1406a556c76aSAlexandre Belloni 	nlmsg_end(dump->skb, nlh);
1407a556c76aSAlexandre Belloni 
1408a556c76aSAlexandre Belloni skip:
1409a556c76aSAlexandre Belloni 	dump->idx++;
1410a556c76aSAlexandre Belloni 	return 0;
1411a556c76aSAlexandre Belloni 
1412a556c76aSAlexandre Belloni nla_put_failure:
1413a556c76aSAlexandre Belloni 	nlmsg_cancel(dump->skb, nlh);
1414a556c76aSAlexandre Belloni 	return -EMSGSIZE;
1415a556c76aSAlexandre Belloni }
14169c90eea3SVladimir Oltean EXPORT_SYMBOL(ocelot_port_fdb_do_dump);
1417a556c76aSAlexandre Belloni 
14182468346cSVladimir Oltean /* Caller must hold &ocelot->mact_lock */
1419531ee1a6SVladimir Oltean static int ocelot_mact_read(struct ocelot *ocelot, int port, int row, int col,
1420a556c76aSAlexandre Belloni 			    struct ocelot_mact_entry *entry)
1421a556c76aSAlexandre Belloni {
1422a556c76aSAlexandre Belloni 	u32 val, dst, macl, mach;
1423531ee1a6SVladimir Oltean 	char mac[ETH_ALEN];
1424a556c76aSAlexandre Belloni 
1425a556c76aSAlexandre Belloni 	/* Set row and column to read from */
1426a556c76aSAlexandre Belloni 	ocelot_field_write(ocelot, ANA_TABLES_MACTINDX_M_INDEX, row);
1427a556c76aSAlexandre Belloni 	ocelot_field_write(ocelot, ANA_TABLES_MACTINDX_BUCKET, col);
1428a556c76aSAlexandre Belloni 
1429a556c76aSAlexandre Belloni 	/* Issue a read command */
1430a556c76aSAlexandre Belloni 	ocelot_write(ocelot,
1431a556c76aSAlexandre Belloni 		     ANA_TABLES_MACACCESS_MAC_TABLE_CMD(MACACCESS_CMD_READ),
1432a556c76aSAlexandre Belloni 		     ANA_TABLES_MACACCESS);
1433a556c76aSAlexandre Belloni 
1434a556c76aSAlexandre Belloni 	if (ocelot_mact_wait_for_completion(ocelot))
1435a556c76aSAlexandre Belloni 		return -ETIMEDOUT;
1436a556c76aSAlexandre Belloni 
1437a556c76aSAlexandre Belloni 	/* Read the entry flags */
1438a556c76aSAlexandre Belloni 	val = ocelot_read(ocelot, ANA_TABLES_MACACCESS);
1439a556c76aSAlexandre Belloni 	if (!(val & ANA_TABLES_MACACCESS_VALID))
1440a556c76aSAlexandre Belloni 		return -EINVAL;
1441a556c76aSAlexandre Belloni 
1442a556c76aSAlexandre Belloni 	/* If the entry read has another port configured as its destination,
1443a556c76aSAlexandre Belloni 	 * do not report it.
1444a556c76aSAlexandre Belloni 	 */
1445a556c76aSAlexandre Belloni 	dst = (val & ANA_TABLES_MACACCESS_DEST_IDX_M) >> 3;
1446531ee1a6SVladimir Oltean 	if (dst != port)
1447a556c76aSAlexandre Belloni 		return -EINVAL;
1448a556c76aSAlexandre Belloni 
1449a556c76aSAlexandre Belloni 	/* Get the entry's MAC address and VLAN id */
1450a556c76aSAlexandre Belloni 	macl = ocelot_read(ocelot, ANA_TABLES_MACLDATA);
1451a556c76aSAlexandre Belloni 	mach = ocelot_read(ocelot, ANA_TABLES_MACHDATA);
1452a556c76aSAlexandre Belloni 
1453a556c76aSAlexandre Belloni 	mac[0] = (mach >> 8)  & 0xff;
1454a556c76aSAlexandre Belloni 	mac[1] = (mach >> 0)  & 0xff;
1455a556c76aSAlexandre Belloni 	mac[2] = (macl >> 24) & 0xff;
1456a556c76aSAlexandre Belloni 	mac[3] = (macl >> 16) & 0xff;
1457a556c76aSAlexandre Belloni 	mac[4] = (macl >> 8)  & 0xff;
1458a556c76aSAlexandre Belloni 	mac[5] = (macl >> 0)  & 0xff;
1459a556c76aSAlexandre Belloni 
1460a556c76aSAlexandre Belloni 	entry->vid = (mach >> 16) & 0xfff;
1461a556c76aSAlexandre Belloni 	ether_addr_copy(entry->mac, mac);
1462a556c76aSAlexandre Belloni 
1463a556c76aSAlexandre Belloni 	return 0;
1464a556c76aSAlexandre Belloni }
1465a556c76aSAlexandre Belloni 
14665cad43a5SVladimir Oltean int ocelot_mact_flush(struct ocelot *ocelot, int port)
14675cad43a5SVladimir Oltean {
14685cad43a5SVladimir Oltean 	int err;
14695cad43a5SVladimir Oltean 
14705cad43a5SVladimir Oltean 	mutex_lock(&ocelot->mact_lock);
14715cad43a5SVladimir Oltean 
14725cad43a5SVladimir Oltean 	/* Program ageing filter for a single port */
14735cad43a5SVladimir Oltean 	ocelot_write(ocelot, ANA_ANAGEFIL_PID_EN | ANA_ANAGEFIL_PID_VAL(port),
14745cad43a5SVladimir Oltean 		     ANA_ANAGEFIL);
14755cad43a5SVladimir Oltean 
14765cad43a5SVladimir Oltean 	/* Flushing dynamic FDB entries requires two successive age scans */
14775cad43a5SVladimir Oltean 	ocelot_write(ocelot,
14785cad43a5SVladimir Oltean 		     ANA_TABLES_MACACCESS_MAC_TABLE_CMD(MACACCESS_CMD_AGE),
14795cad43a5SVladimir Oltean 		     ANA_TABLES_MACACCESS);
14805cad43a5SVladimir Oltean 
14815cad43a5SVladimir Oltean 	err = ocelot_mact_wait_for_completion(ocelot);
14825cad43a5SVladimir Oltean 	if (err) {
14835cad43a5SVladimir Oltean 		mutex_unlock(&ocelot->mact_lock);
14845cad43a5SVladimir Oltean 		return err;
14855cad43a5SVladimir Oltean 	}
14865cad43a5SVladimir Oltean 
14875cad43a5SVladimir Oltean 	/* And second... */
14885cad43a5SVladimir Oltean 	ocelot_write(ocelot,
14895cad43a5SVladimir Oltean 		     ANA_TABLES_MACACCESS_MAC_TABLE_CMD(MACACCESS_CMD_AGE),
14905cad43a5SVladimir Oltean 		     ANA_TABLES_MACACCESS);
14915cad43a5SVladimir Oltean 
14925cad43a5SVladimir Oltean 	err = ocelot_mact_wait_for_completion(ocelot);
14935cad43a5SVladimir Oltean 
14945cad43a5SVladimir Oltean 	/* Restore ageing filter */
14955cad43a5SVladimir Oltean 	ocelot_write(ocelot, 0, ANA_ANAGEFIL);
14965cad43a5SVladimir Oltean 
14975cad43a5SVladimir Oltean 	mutex_unlock(&ocelot->mact_lock);
14985cad43a5SVladimir Oltean 
14995cad43a5SVladimir Oltean 	return err;
15005cad43a5SVladimir Oltean }
15015cad43a5SVladimir Oltean EXPORT_SYMBOL_GPL(ocelot_mact_flush);
15025cad43a5SVladimir Oltean 
15035e256365SVladimir Oltean int ocelot_fdb_dump(struct ocelot *ocelot, int port,
1504531ee1a6SVladimir Oltean 		    dsa_fdb_dump_cb_t *cb, void *data)
1505a556c76aSAlexandre Belloni {
15062468346cSVladimir Oltean 	int err = 0;
1507531ee1a6SVladimir Oltean 	int i, j;
1508a556c76aSAlexandre Belloni 
15092468346cSVladimir Oltean 	/* We could take the lock just around ocelot_mact_read, but doing so
15102468346cSVladimir Oltean 	 * thousands of times in a row seems rather pointless and inefficient.
15112468346cSVladimir Oltean 	 */
15122468346cSVladimir Oltean 	mutex_lock(&ocelot->mact_lock);
15132468346cSVladimir Oltean 
151421ce7f3eSVladimir Oltean 	/* Loop through all the mac tables entries. */
151521ce7f3eSVladimir Oltean 	for (i = 0; i < ocelot->num_mact_rows; i++) {
1516a556c76aSAlexandre Belloni 		for (j = 0; j < 4; j++) {
1517531ee1a6SVladimir Oltean 			struct ocelot_mact_entry entry;
1518531ee1a6SVladimir Oltean 			bool is_static;
1519531ee1a6SVladimir Oltean 
15202468346cSVladimir Oltean 			err = ocelot_mact_read(ocelot, port, i, j, &entry);
1521a556c76aSAlexandre Belloni 			/* If the entry is invalid (wrong port, invalid...),
1522a556c76aSAlexandre Belloni 			 * skip it.
1523a556c76aSAlexandre Belloni 			 */
15242468346cSVladimir Oltean 			if (err == -EINVAL)
1525a556c76aSAlexandre Belloni 				continue;
15262468346cSVladimir Oltean 			else if (err)
15272468346cSVladimir Oltean 				break;
1528a556c76aSAlexandre Belloni 
1529531ee1a6SVladimir Oltean 			is_static = (entry.type == ENTRYTYPE_LOCKED);
1530531ee1a6SVladimir Oltean 
153154c31984SVladimir Oltean 			/* Hide the reserved VLANs used for
153254c31984SVladimir Oltean 			 * VLAN-unaware bridging.
153354c31984SVladimir Oltean 			 */
153454c31984SVladimir Oltean 			if (entry.vid > OCELOT_RSV_VLAN_RANGE_START)
153554c31984SVladimir Oltean 				entry.vid = 0;
153654c31984SVladimir Oltean 
15372468346cSVladimir Oltean 			err = cb(entry.mac, entry.vid, is_static, data);
15382468346cSVladimir Oltean 			if (err)
15392468346cSVladimir Oltean 				break;
1540a556c76aSAlexandre Belloni 		}
1541a556c76aSAlexandre Belloni 	}
1542a556c76aSAlexandre Belloni 
15432468346cSVladimir Oltean 	mutex_unlock(&ocelot->mact_lock);
15442468346cSVladimir Oltean 
15452468346cSVladimir Oltean 	return err;
1546531ee1a6SVladimir Oltean }
15475e256365SVladimir Oltean EXPORT_SYMBOL(ocelot_fdb_dump);
1548531ee1a6SVladimir Oltean 
154996ca08c0SVladimir Oltean static void ocelot_populate_l2_ptp_trap_key(struct ocelot_vcap_filter *trap)
155096ca08c0SVladimir Oltean {
155196ca08c0SVladimir Oltean 	trap->key_type = OCELOT_VCAP_KEY_ETYPE;
155296ca08c0SVladimir Oltean 	*(__be16 *)trap->key.etype.etype.value = htons(ETH_P_1588);
155396ca08c0SVladimir Oltean 	*(__be16 *)trap->key.etype.etype.mask = htons(0xffff);
155496ca08c0SVladimir Oltean }
155596ca08c0SVladimir Oltean 
155696ca08c0SVladimir Oltean static void
155796ca08c0SVladimir Oltean ocelot_populate_ipv4_ptp_event_trap_key(struct ocelot_vcap_filter *trap)
155896ca08c0SVladimir Oltean {
155996ca08c0SVladimir Oltean 	trap->key_type = OCELOT_VCAP_KEY_IPV4;
156059085208SVladimir Oltean 	trap->key.ipv4.proto.value[0] = IPPROTO_UDP;
156159085208SVladimir Oltean 	trap->key.ipv4.proto.mask[0] = 0xff;
156296ca08c0SVladimir Oltean 	trap->key.ipv4.dport.value = PTP_EV_PORT;
156396ca08c0SVladimir Oltean 	trap->key.ipv4.dport.mask = 0xffff;
156496ca08c0SVladimir Oltean }
156596ca08c0SVladimir Oltean 
156696ca08c0SVladimir Oltean static void
156796ca08c0SVladimir Oltean ocelot_populate_ipv6_ptp_event_trap_key(struct ocelot_vcap_filter *trap)
156896ca08c0SVladimir Oltean {
156996ca08c0SVladimir Oltean 	trap->key_type = OCELOT_VCAP_KEY_IPV6;
157059085208SVladimir Oltean 	trap->key.ipv4.proto.value[0] = IPPROTO_UDP;
157159085208SVladimir Oltean 	trap->key.ipv4.proto.mask[0] = 0xff;
157296ca08c0SVladimir Oltean 	trap->key.ipv6.dport.value = PTP_EV_PORT;
157396ca08c0SVladimir Oltean 	trap->key.ipv6.dport.mask = 0xffff;
157496ca08c0SVladimir Oltean }
157596ca08c0SVladimir Oltean 
157696ca08c0SVladimir Oltean static void
157796ca08c0SVladimir Oltean ocelot_populate_ipv4_ptp_general_trap_key(struct ocelot_vcap_filter *trap)
157896ca08c0SVladimir Oltean {
157996ca08c0SVladimir Oltean 	trap->key_type = OCELOT_VCAP_KEY_IPV4;
158059085208SVladimir Oltean 	trap->key.ipv4.proto.value[0] = IPPROTO_UDP;
158159085208SVladimir Oltean 	trap->key.ipv4.proto.mask[0] = 0xff;
158296ca08c0SVladimir Oltean 	trap->key.ipv4.dport.value = PTP_GEN_PORT;
158396ca08c0SVladimir Oltean 	trap->key.ipv4.dport.mask = 0xffff;
158496ca08c0SVladimir Oltean }
158596ca08c0SVladimir Oltean 
158696ca08c0SVladimir Oltean static void
158796ca08c0SVladimir Oltean ocelot_populate_ipv6_ptp_general_trap_key(struct ocelot_vcap_filter *trap)
158896ca08c0SVladimir Oltean {
158996ca08c0SVladimir Oltean 	trap->key_type = OCELOT_VCAP_KEY_IPV6;
159059085208SVladimir Oltean 	trap->key.ipv4.proto.value[0] = IPPROTO_UDP;
159159085208SVladimir Oltean 	trap->key.ipv4.proto.mask[0] = 0xff;
159296ca08c0SVladimir Oltean 	trap->key.ipv6.dport.value = PTP_GEN_PORT;
159396ca08c0SVladimir Oltean 	trap->key.ipv6.dport.mask = 0xffff;
159496ca08c0SVladimir Oltean }
159596ca08c0SVladimir Oltean 
15969d75b881SVladimir Oltean int ocelot_trap_add(struct ocelot *ocelot, int port,
15979d75b881SVladimir Oltean 		    unsigned long cookie, bool take_ts,
159896ca08c0SVladimir Oltean 		    void (*populate)(struct ocelot_vcap_filter *f))
159996ca08c0SVladimir Oltean {
160096ca08c0SVladimir Oltean 	struct ocelot_vcap_block *block_vcap_is2;
160196ca08c0SVladimir Oltean 	struct ocelot_vcap_filter *trap;
160296ca08c0SVladimir Oltean 	bool new = false;
160396ca08c0SVladimir Oltean 	int err;
160496ca08c0SVladimir Oltean 
160596ca08c0SVladimir Oltean 	block_vcap_is2 = &ocelot->block[VCAP_IS2];
160696ca08c0SVladimir Oltean 
160796ca08c0SVladimir Oltean 	trap = ocelot_vcap_block_find_filter_by_id(block_vcap_is2, cookie,
160896ca08c0SVladimir Oltean 						   false);
160996ca08c0SVladimir Oltean 	if (!trap) {
161096ca08c0SVladimir Oltean 		trap = kzalloc(sizeof(*trap), GFP_KERNEL);
161196ca08c0SVladimir Oltean 		if (!trap)
161296ca08c0SVladimir Oltean 			return -ENOMEM;
161396ca08c0SVladimir Oltean 
161496ca08c0SVladimir Oltean 		populate(trap);
161596ca08c0SVladimir Oltean 		trap->prio = 1;
161696ca08c0SVladimir Oltean 		trap->id.cookie = cookie;
161796ca08c0SVladimir Oltean 		trap->id.tc_offload = false;
161896ca08c0SVladimir Oltean 		trap->block_id = VCAP_IS2;
161996ca08c0SVladimir Oltean 		trap->type = OCELOT_VCAP_FILTER_OFFLOAD;
162096ca08c0SVladimir Oltean 		trap->lookup = 0;
162196ca08c0SVladimir Oltean 		trap->action.cpu_copy_ena = true;
162296ca08c0SVladimir Oltean 		trap->action.mask_mode = OCELOT_MASK_MODE_PERMIT_DENY;
162396ca08c0SVladimir Oltean 		trap->action.port_mask = 0;
16249d75b881SVladimir Oltean 		trap->take_ts = take_ts;
1625e42bd4edSVladimir Oltean 		list_add_tail(&trap->trap_list, &ocelot->traps);
162696ca08c0SVladimir Oltean 		new = true;
162796ca08c0SVladimir Oltean 	}
162896ca08c0SVladimir Oltean 
162996ca08c0SVladimir Oltean 	trap->ingress_port_mask |= BIT(port);
163096ca08c0SVladimir Oltean 
163196ca08c0SVladimir Oltean 	if (new)
163296ca08c0SVladimir Oltean 		err = ocelot_vcap_filter_add(ocelot, trap, NULL);
163396ca08c0SVladimir Oltean 	else
163496ca08c0SVladimir Oltean 		err = ocelot_vcap_filter_replace(ocelot, trap);
163596ca08c0SVladimir Oltean 	if (err) {
163696ca08c0SVladimir Oltean 		trap->ingress_port_mask &= ~BIT(port);
1637e42bd4edSVladimir Oltean 		if (!trap->ingress_port_mask) {
1638e42bd4edSVladimir Oltean 			list_del(&trap->trap_list);
163996ca08c0SVladimir Oltean 			kfree(trap);
1640e42bd4edSVladimir Oltean 		}
164196ca08c0SVladimir Oltean 		return err;
164296ca08c0SVladimir Oltean 	}
164396ca08c0SVladimir Oltean 
164496ca08c0SVladimir Oltean 	return 0;
164596ca08c0SVladimir Oltean }
164696ca08c0SVladimir Oltean 
1647b9bace6eSVladimir Oltean int ocelot_trap_del(struct ocelot *ocelot, int port, unsigned long cookie)
164896ca08c0SVladimir Oltean {
164996ca08c0SVladimir Oltean 	struct ocelot_vcap_block *block_vcap_is2;
165096ca08c0SVladimir Oltean 	struct ocelot_vcap_filter *trap;
165196ca08c0SVladimir Oltean 
165296ca08c0SVladimir Oltean 	block_vcap_is2 = &ocelot->block[VCAP_IS2];
165396ca08c0SVladimir Oltean 
165496ca08c0SVladimir Oltean 	trap = ocelot_vcap_block_find_filter_by_id(block_vcap_is2, cookie,
165596ca08c0SVladimir Oltean 						   false);
165696ca08c0SVladimir Oltean 	if (!trap)
165796ca08c0SVladimir Oltean 		return 0;
165896ca08c0SVladimir Oltean 
165996ca08c0SVladimir Oltean 	trap->ingress_port_mask &= ~BIT(port);
1660e42bd4edSVladimir Oltean 	if (!trap->ingress_port_mask) {
1661e42bd4edSVladimir Oltean 		list_del(&trap->trap_list);
1662e42bd4edSVladimir Oltean 
166396ca08c0SVladimir Oltean 		return ocelot_vcap_filter_del(ocelot, trap);
1664e42bd4edSVladimir Oltean 	}
166596ca08c0SVladimir Oltean 
166696ca08c0SVladimir Oltean 	return ocelot_vcap_filter_replace(ocelot, trap);
166796ca08c0SVladimir Oltean }
166896ca08c0SVladimir Oltean 
166996ca08c0SVladimir Oltean static int ocelot_l2_ptp_trap_add(struct ocelot *ocelot, int port)
167096ca08c0SVladimir Oltean {
1671c518afecSVladimir Oltean 	unsigned long l2_cookie = OCELOT_VCAP_IS2_L2_PTP_TRAP(ocelot);
167296ca08c0SVladimir Oltean 
16739d75b881SVladimir Oltean 	return ocelot_trap_add(ocelot, port, l2_cookie, true,
167496ca08c0SVladimir Oltean 			       ocelot_populate_l2_ptp_trap_key);
167596ca08c0SVladimir Oltean }
167696ca08c0SVladimir Oltean 
167796ca08c0SVladimir Oltean static int ocelot_l2_ptp_trap_del(struct ocelot *ocelot, int port)
167896ca08c0SVladimir Oltean {
1679c518afecSVladimir Oltean 	unsigned long l2_cookie = OCELOT_VCAP_IS2_L2_PTP_TRAP(ocelot);
168096ca08c0SVladimir Oltean 
168196ca08c0SVladimir Oltean 	return ocelot_trap_del(ocelot, port, l2_cookie);
168296ca08c0SVladimir Oltean }
168396ca08c0SVladimir Oltean 
168496ca08c0SVladimir Oltean static int ocelot_ipv4_ptp_trap_add(struct ocelot *ocelot, int port)
168596ca08c0SVladimir Oltean {
1686c518afecSVladimir Oltean 	unsigned long ipv4_gen_cookie = OCELOT_VCAP_IS2_IPV4_GEN_PTP_TRAP(ocelot);
1687c518afecSVladimir Oltean 	unsigned long ipv4_ev_cookie = OCELOT_VCAP_IS2_IPV4_EV_PTP_TRAP(ocelot);
168896ca08c0SVladimir Oltean 	int err;
168996ca08c0SVladimir Oltean 
16909d75b881SVladimir Oltean 	err = ocelot_trap_add(ocelot, port, ipv4_ev_cookie, true,
169196ca08c0SVladimir Oltean 			      ocelot_populate_ipv4_ptp_event_trap_key);
169296ca08c0SVladimir Oltean 	if (err)
169396ca08c0SVladimir Oltean 		return err;
169496ca08c0SVladimir Oltean 
16959d75b881SVladimir Oltean 	err = ocelot_trap_add(ocelot, port, ipv4_gen_cookie, false,
169696ca08c0SVladimir Oltean 			      ocelot_populate_ipv4_ptp_general_trap_key);
169796ca08c0SVladimir Oltean 	if (err)
169896ca08c0SVladimir Oltean 		ocelot_trap_del(ocelot, port, ipv4_ev_cookie);
169996ca08c0SVladimir Oltean 
170096ca08c0SVladimir Oltean 	return err;
170196ca08c0SVladimir Oltean }
170296ca08c0SVladimir Oltean 
170396ca08c0SVladimir Oltean static int ocelot_ipv4_ptp_trap_del(struct ocelot *ocelot, int port)
170496ca08c0SVladimir Oltean {
1705c518afecSVladimir Oltean 	unsigned long ipv4_gen_cookie = OCELOT_VCAP_IS2_IPV4_GEN_PTP_TRAP(ocelot);
1706c518afecSVladimir Oltean 	unsigned long ipv4_ev_cookie = OCELOT_VCAP_IS2_IPV4_EV_PTP_TRAP(ocelot);
170796ca08c0SVladimir Oltean 	int err;
170896ca08c0SVladimir Oltean 
170996ca08c0SVladimir Oltean 	err = ocelot_trap_del(ocelot, port, ipv4_ev_cookie);
171096ca08c0SVladimir Oltean 	err |= ocelot_trap_del(ocelot, port, ipv4_gen_cookie);
171196ca08c0SVladimir Oltean 	return err;
171296ca08c0SVladimir Oltean }
171396ca08c0SVladimir Oltean 
171496ca08c0SVladimir Oltean static int ocelot_ipv6_ptp_trap_add(struct ocelot *ocelot, int port)
171596ca08c0SVladimir Oltean {
1716c518afecSVladimir Oltean 	unsigned long ipv6_gen_cookie = OCELOT_VCAP_IS2_IPV6_GEN_PTP_TRAP(ocelot);
1717c518afecSVladimir Oltean 	unsigned long ipv6_ev_cookie = OCELOT_VCAP_IS2_IPV6_EV_PTP_TRAP(ocelot);
171896ca08c0SVladimir Oltean 	int err;
171996ca08c0SVladimir Oltean 
17209d75b881SVladimir Oltean 	err = ocelot_trap_add(ocelot, port, ipv6_ev_cookie, true,
172196ca08c0SVladimir Oltean 			      ocelot_populate_ipv6_ptp_event_trap_key);
172296ca08c0SVladimir Oltean 	if (err)
172396ca08c0SVladimir Oltean 		return err;
172496ca08c0SVladimir Oltean 
17259d75b881SVladimir Oltean 	err = ocelot_trap_add(ocelot, port, ipv6_gen_cookie, false,
172696ca08c0SVladimir Oltean 			      ocelot_populate_ipv6_ptp_general_trap_key);
172796ca08c0SVladimir Oltean 	if (err)
172896ca08c0SVladimir Oltean 		ocelot_trap_del(ocelot, port, ipv6_ev_cookie);
172996ca08c0SVladimir Oltean 
173096ca08c0SVladimir Oltean 	return err;
173196ca08c0SVladimir Oltean }
173296ca08c0SVladimir Oltean 
173396ca08c0SVladimir Oltean static int ocelot_ipv6_ptp_trap_del(struct ocelot *ocelot, int port)
173496ca08c0SVladimir Oltean {
1735c518afecSVladimir Oltean 	unsigned long ipv6_gen_cookie = OCELOT_VCAP_IS2_IPV6_GEN_PTP_TRAP(ocelot);
1736c518afecSVladimir Oltean 	unsigned long ipv6_ev_cookie = OCELOT_VCAP_IS2_IPV6_EV_PTP_TRAP(ocelot);
173796ca08c0SVladimir Oltean 	int err;
173896ca08c0SVladimir Oltean 
173996ca08c0SVladimir Oltean 	err = ocelot_trap_del(ocelot, port, ipv6_ev_cookie);
174096ca08c0SVladimir Oltean 	err |= ocelot_trap_del(ocelot, port, ipv6_gen_cookie);
174196ca08c0SVladimir Oltean 	return err;
174296ca08c0SVladimir Oltean }
174396ca08c0SVladimir Oltean 
174496ca08c0SVladimir Oltean static int ocelot_setup_ptp_traps(struct ocelot *ocelot, int port,
174596ca08c0SVladimir Oltean 				  bool l2, bool l4)
174696ca08c0SVladimir Oltean {
174796ca08c0SVladimir Oltean 	int err;
174896ca08c0SVladimir Oltean 
174996ca08c0SVladimir Oltean 	if (l2)
175096ca08c0SVladimir Oltean 		err = ocelot_l2_ptp_trap_add(ocelot, port);
175196ca08c0SVladimir Oltean 	else
175296ca08c0SVladimir Oltean 		err = ocelot_l2_ptp_trap_del(ocelot, port);
175396ca08c0SVladimir Oltean 	if (err)
175496ca08c0SVladimir Oltean 		return err;
175596ca08c0SVladimir Oltean 
175696ca08c0SVladimir Oltean 	if (l4) {
175796ca08c0SVladimir Oltean 		err = ocelot_ipv4_ptp_trap_add(ocelot, port);
175896ca08c0SVladimir Oltean 		if (err)
175996ca08c0SVladimir Oltean 			goto err_ipv4;
176096ca08c0SVladimir Oltean 
176196ca08c0SVladimir Oltean 		err = ocelot_ipv6_ptp_trap_add(ocelot, port);
176296ca08c0SVladimir Oltean 		if (err)
176396ca08c0SVladimir Oltean 			goto err_ipv6;
176496ca08c0SVladimir Oltean 	} else {
176596ca08c0SVladimir Oltean 		err = ocelot_ipv4_ptp_trap_del(ocelot, port);
176696ca08c0SVladimir Oltean 
176796ca08c0SVladimir Oltean 		err |= ocelot_ipv6_ptp_trap_del(ocelot, port);
176896ca08c0SVladimir Oltean 	}
176996ca08c0SVladimir Oltean 	if (err)
177096ca08c0SVladimir Oltean 		return err;
177196ca08c0SVladimir Oltean 
177296ca08c0SVladimir Oltean 	return 0;
177396ca08c0SVladimir Oltean 
177496ca08c0SVladimir Oltean err_ipv6:
177596ca08c0SVladimir Oltean 	ocelot_ipv4_ptp_trap_del(ocelot, port);
177696ca08c0SVladimir Oltean err_ipv4:
177796ca08c0SVladimir Oltean 	if (l2)
177896ca08c0SVladimir Oltean 		ocelot_l2_ptp_trap_del(ocelot, port);
177996ca08c0SVladimir Oltean 	return err;
178096ca08c0SVladimir Oltean }
178196ca08c0SVladimir Oltean 
1782f145922dSYangbo Lu int ocelot_hwstamp_get(struct ocelot *ocelot, int port, struct ifreq *ifr)
17834e3b0468SAntoine Tenart {
17844e3b0468SAntoine Tenart 	return copy_to_user(ifr->ifr_data, &ocelot->hwtstamp_config,
17854e3b0468SAntoine Tenart 			    sizeof(ocelot->hwtstamp_config)) ? -EFAULT : 0;
17864e3b0468SAntoine Tenart }
1787f145922dSYangbo Lu EXPORT_SYMBOL(ocelot_hwstamp_get);
17884e3b0468SAntoine Tenart 
1789f145922dSYangbo Lu int ocelot_hwstamp_set(struct ocelot *ocelot, int port, struct ifreq *ifr)
17904e3b0468SAntoine Tenart {
1791306fd44bSVladimir Oltean 	struct ocelot_port *ocelot_port = ocelot->ports[port];
179296ca08c0SVladimir Oltean 	bool l2 = false, l4 = false;
17934e3b0468SAntoine Tenart 	struct hwtstamp_config cfg;
179496ca08c0SVladimir Oltean 	int err;
17954e3b0468SAntoine Tenart 
17964e3b0468SAntoine Tenart 	if (copy_from_user(&cfg, ifr->ifr_data, sizeof(cfg)))
17974e3b0468SAntoine Tenart 		return -EFAULT;
17984e3b0468SAntoine Tenart 
17994e3b0468SAntoine Tenart 	/* Tx type sanity check */
18004e3b0468SAntoine Tenart 	switch (cfg.tx_type) {
18014e3b0468SAntoine Tenart 	case HWTSTAMP_TX_ON:
1802306fd44bSVladimir Oltean 		ocelot_port->ptp_cmd = IFH_REW_OP_TWO_STEP_PTP;
18034e3b0468SAntoine Tenart 		break;
18044e3b0468SAntoine Tenart 	case HWTSTAMP_TX_ONESTEP_SYNC:
18054e3b0468SAntoine Tenart 		/* IFH_REW_OP_ONE_STEP_PTP updates the correctional field, we
18064e3b0468SAntoine Tenart 		 * need to update the origin time.
18074e3b0468SAntoine Tenart 		 */
1808306fd44bSVladimir Oltean 		ocelot_port->ptp_cmd = IFH_REW_OP_ORIGIN_PTP;
18094e3b0468SAntoine Tenart 		break;
18104e3b0468SAntoine Tenart 	case HWTSTAMP_TX_OFF:
1811306fd44bSVladimir Oltean 		ocelot_port->ptp_cmd = 0;
18124e3b0468SAntoine Tenart 		break;
18134e3b0468SAntoine Tenart 	default:
18144e3b0468SAntoine Tenart 		return -ERANGE;
18154e3b0468SAntoine Tenart 	}
18164e3b0468SAntoine Tenart 
18174e3b0468SAntoine Tenart 	mutex_lock(&ocelot->ptp_lock);
18184e3b0468SAntoine Tenart 
18194e3b0468SAntoine Tenart 	switch (cfg.rx_filter) {
18204e3b0468SAntoine Tenart 	case HWTSTAMP_FILTER_NONE:
18214e3b0468SAntoine Tenart 		break;
18224e3b0468SAntoine Tenart 	case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
18234e3b0468SAntoine Tenart 	case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
18244e3b0468SAntoine Tenart 	case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
182596ca08c0SVladimir Oltean 		l4 = true;
182696ca08c0SVladimir Oltean 		break;
18274e3b0468SAntoine Tenart 	case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
18284e3b0468SAntoine Tenart 	case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
18294e3b0468SAntoine Tenart 	case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
183096ca08c0SVladimir Oltean 		l2 = true;
183196ca08c0SVladimir Oltean 		break;
18324e3b0468SAntoine Tenart 	case HWTSTAMP_FILTER_PTP_V2_EVENT:
18334e3b0468SAntoine Tenart 	case HWTSTAMP_FILTER_PTP_V2_SYNC:
18344e3b0468SAntoine Tenart 	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
183596ca08c0SVladimir Oltean 		l2 = true;
183696ca08c0SVladimir Oltean 		l4 = true;
18374e3b0468SAntoine Tenart 		break;
18384e3b0468SAntoine Tenart 	default:
18394e3b0468SAntoine Tenart 		mutex_unlock(&ocelot->ptp_lock);
18404e3b0468SAntoine Tenart 		return -ERANGE;
18414e3b0468SAntoine Tenart 	}
18424e3b0468SAntoine Tenart 
184396ca08c0SVladimir Oltean 	err = ocelot_setup_ptp_traps(ocelot, port, l2, l4);
18449c32950fSLv Ruyi 	if (err) {
18459c32950fSLv Ruyi 		mutex_unlock(&ocelot->ptp_lock);
184696ca08c0SVladimir Oltean 		return err;
18479c32950fSLv Ruyi 	}
184896ca08c0SVladimir Oltean 
184996ca08c0SVladimir Oltean 	if (l2 && l4)
185096ca08c0SVladimir Oltean 		cfg.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
185196ca08c0SVladimir Oltean 	else if (l2)
185296ca08c0SVladimir Oltean 		cfg.rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT;
185396ca08c0SVladimir Oltean 	else if (l4)
185496ca08c0SVladimir Oltean 		cfg.rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_EVENT;
185596ca08c0SVladimir Oltean 	else
185696ca08c0SVladimir Oltean 		cfg.rx_filter = HWTSTAMP_FILTER_NONE;
185796ca08c0SVladimir Oltean 
18584e3b0468SAntoine Tenart 	/* Commit back the result & save it */
18594e3b0468SAntoine Tenart 	memcpy(&ocelot->hwtstamp_config, &cfg, sizeof(cfg));
18604e3b0468SAntoine Tenart 	mutex_unlock(&ocelot->ptp_lock);
18614e3b0468SAntoine Tenart 
18624e3b0468SAntoine Tenart 	return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0;
18634e3b0468SAntoine Tenart }
1864f145922dSYangbo Lu EXPORT_SYMBOL(ocelot_hwstamp_set);
18654e3b0468SAntoine Tenart 
18665e256365SVladimir Oltean void ocelot_get_strings(struct ocelot *ocelot, int port, u32 sset, u8 *data)
1867a556c76aSAlexandre Belloni {
1868a556c76aSAlexandre Belloni 	int i;
1869a556c76aSAlexandre Belloni 
1870a556c76aSAlexandre Belloni 	if (sset != ETH_SS_STATS)
1871a556c76aSAlexandre Belloni 		return;
1872a556c76aSAlexandre Belloni 
1873a556c76aSAlexandre Belloni 	for (i = 0; i < ocelot->num_stats; i++)
1874a556c76aSAlexandre Belloni 		memcpy(data + i * ETH_GSTRING_LEN, ocelot->stats_layout[i].name,
1875a556c76aSAlexandre Belloni 		       ETH_GSTRING_LEN);
1876a556c76aSAlexandre Belloni }
18775e256365SVladimir Oltean EXPORT_SYMBOL(ocelot_get_strings);
1878a556c76aSAlexandre Belloni 
18797fbf6795SColin Foster /* Caller must hold &ocelot->stats_lock */
1880d87b1c08SColin Foster static int ocelot_port_update_stats(struct ocelot *ocelot, int port)
1881a556c76aSAlexandre Belloni {
1882d87b1c08SColin Foster 	unsigned int idx = port * ocelot->num_stats;
1883d87b1c08SColin Foster 	struct ocelot_stats_region *region;
1884d87b1c08SColin Foster 	int err, j;
1885a556c76aSAlexandre Belloni 
1886a556c76aSAlexandre Belloni 	/* Configure the port to read the stats from */
1887e27d785eSColin Foster 	ocelot_write(ocelot, SYS_STAT_CFG_STAT_VIEW(port), SYS_STAT_CFG);
1888a556c76aSAlexandre Belloni 
1889d87b1c08SColin Foster 	list_for_each_entry(region, &ocelot->stats_regions, node) {
1890d87b1c08SColin Foster 		err = ocelot_bulk_read_rix(ocelot, SYS_COUNT_RX_OCTETS,
1891d87b1c08SColin Foster 					   region->offset, region->buf,
1892d87b1c08SColin Foster 					   region->count);
1893d87b1c08SColin Foster 		if (err)
1894d87b1c08SColin Foster 			return err;
1895a556c76aSAlexandre Belloni 
1896d87b1c08SColin Foster 		for (j = 0; j < region->count; j++) {
1897d87b1c08SColin Foster 			u64 *stat = &ocelot->stats[idx + j];
1898d87b1c08SColin Foster 			u64 val = region->buf[j];
1899a556c76aSAlexandre Belloni 
1900d87b1c08SColin Foster 			if (val < (*stat & U32_MAX))
1901d87b1c08SColin Foster 				*stat += (u64)1 << 32;
1902a556c76aSAlexandre Belloni 
1903d87b1c08SColin Foster 			*stat = (*stat & ~(u64)U32_MAX) + val;
1904a556c76aSAlexandre Belloni 		}
1905d87b1c08SColin Foster 
1906d87b1c08SColin Foster 		idx += region->count;
1907d87b1c08SColin Foster 	}
1908d87b1c08SColin Foster 
1909d87b1c08SColin Foster 	return err;
19101e1caa97SClaudiu Manoil }
19111e1caa97SClaudiu Manoil 
19121e1caa97SClaudiu Manoil static void ocelot_check_stats_work(struct work_struct *work)
19131e1caa97SClaudiu Manoil {
19141e1caa97SClaudiu Manoil 	struct delayed_work *del_work = to_delayed_work(work);
19151e1caa97SClaudiu Manoil 	struct ocelot *ocelot = container_of(del_work, struct ocelot,
19161e1caa97SClaudiu Manoil 					     stats_work);
1917d87b1c08SColin Foster 	int i, err;
19181e1caa97SClaudiu Manoil 
19197fbf6795SColin Foster 	mutex_lock(&ocelot->stats_lock);
1920d87b1c08SColin Foster 	for (i = 0; i < ocelot->num_phys_ports; i++) {
1921d87b1c08SColin Foster 		err = ocelot_port_update_stats(ocelot, i);
1922d87b1c08SColin Foster 		if (err)
1923d87b1c08SColin Foster 			break;
1924d87b1c08SColin Foster 	}
19257fbf6795SColin Foster 	mutex_unlock(&ocelot->stats_lock);
19261e1caa97SClaudiu Manoil 
1927d87b1c08SColin Foster 	if (err)
1928d87b1c08SColin Foster 		dev_err(ocelot->dev, "Error %d updating ethtool stats\n",  err);
1929d87b1c08SColin Foster 
1930a556c76aSAlexandre Belloni 	queue_delayed_work(ocelot->stats_queue, &ocelot->stats_work,
1931a556c76aSAlexandre Belloni 			   OCELOT_STATS_CHECK_DELAY);
1932a556c76aSAlexandre Belloni }
1933a556c76aSAlexandre Belloni 
19345e256365SVladimir Oltean void ocelot_get_ethtool_stats(struct ocelot *ocelot, int port, u64 *data)
1935a556c76aSAlexandre Belloni {
1936d87b1c08SColin Foster 	int i, err;
1937a556c76aSAlexandre Belloni 
19387fbf6795SColin Foster 	mutex_lock(&ocelot->stats_lock);
19397fbf6795SColin Foster 
1940a556c76aSAlexandre Belloni 	/* check and update now */
1941d87b1c08SColin Foster 	err = ocelot_port_update_stats(ocelot, port);
1942a556c76aSAlexandre Belloni 
1943a556c76aSAlexandre Belloni 	/* Copy all counters */
1944a556c76aSAlexandre Belloni 	for (i = 0; i < ocelot->num_stats; i++)
1945004d44f6SVladimir Oltean 		*data++ = ocelot->stats[port * ocelot->num_stats + i];
19467fbf6795SColin Foster 
19477fbf6795SColin Foster 	mutex_unlock(&ocelot->stats_lock);
1948d87b1c08SColin Foster 
1949d87b1c08SColin Foster 	if (err)
1950d87b1c08SColin Foster 		dev_err(ocelot->dev, "Error %d updating ethtool stats\n", err);
1951a556c76aSAlexandre Belloni }
19525e256365SVladimir Oltean EXPORT_SYMBOL(ocelot_get_ethtool_stats);
1953a556c76aSAlexandre Belloni 
19545e256365SVladimir Oltean int ocelot_get_sset_count(struct ocelot *ocelot, int port, int sset)
1955c7282d38SVladimir Oltean {
1956a556c76aSAlexandre Belloni 	if (sset != ETH_SS_STATS)
1957a556c76aSAlexandre Belloni 		return -EOPNOTSUPP;
1958c7282d38SVladimir Oltean 
1959a556c76aSAlexandre Belloni 	return ocelot->num_stats;
1960a556c76aSAlexandre Belloni }
19615e256365SVladimir Oltean EXPORT_SYMBOL(ocelot_get_sset_count);
1962a556c76aSAlexandre Belloni 
1963d87b1c08SColin Foster static int ocelot_prepare_stats_regions(struct ocelot *ocelot)
1964d87b1c08SColin Foster {
1965d87b1c08SColin Foster 	struct ocelot_stats_region *region = NULL;
1966d87b1c08SColin Foster 	unsigned int last;
1967d87b1c08SColin Foster 	int i;
1968d87b1c08SColin Foster 
1969d87b1c08SColin Foster 	INIT_LIST_HEAD(&ocelot->stats_regions);
1970d87b1c08SColin Foster 
1971d87b1c08SColin Foster 	for (i = 0; i < ocelot->num_stats; i++) {
1972d87b1c08SColin Foster 		if (region && ocelot->stats_layout[i].offset == last + 1) {
1973d87b1c08SColin Foster 			region->count++;
1974d87b1c08SColin Foster 		} else {
1975d87b1c08SColin Foster 			region = devm_kzalloc(ocelot->dev, sizeof(*region),
1976d87b1c08SColin Foster 					      GFP_KERNEL);
1977d87b1c08SColin Foster 			if (!region)
1978d87b1c08SColin Foster 				return -ENOMEM;
1979d87b1c08SColin Foster 
1980d87b1c08SColin Foster 			region->offset = ocelot->stats_layout[i].offset;
1981d87b1c08SColin Foster 			region->count = 1;
1982d87b1c08SColin Foster 			list_add_tail(&region->node, &ocelot->stats_regions);
1983d87b1c08SColin Foster 		}
1984d87b1c08SColin Foster 
1985d87b1c08SColin Foster 		last = ocelot->stats_layout[i].offset;
1986d87b1c08SColin Foster 	}
1987d87b1c08SColin Foster 
1988d87b1c08SColin Foster 	list_for_each_entry(region, &ocelot->stats_regions, node) {
1989d87b1c08SColin Foster 		region->buf = devm_kcalloc(ocelot->dev, region->count,
1990d87b1c08SColin Foster 					   sizeof(*region->buf), GFP_KERNEL);
1991d87b1c08SColin Foster 		if (!region->buf)
1992d87b1c08SColin Foster 			return -ENOMEM;
1993d87b1c08SColin Foster 	}
1994d87b1c08SColin Foster 
1995d87b1c08SColin Foster 	return 0;
1996d87b1c08SColin Foster }
1997d87b1c08SColin Foster 
19985e256365SVladimir Oltean int ocelot_get_ts_info(struct ocelot *ocelot, int port,
1999c7282d38SVladimir Oltean 		       struct ethtool_ts_info *info)
2000c7282d38SVladimir Oltean {
20014e3b0468SAntoine Tenart 	info->phc_index = ocelot->ptp_clock ?
20024e3b0468SAntoine Tenart 			  ptp_clock_index(ocelot->ptp_clock) : -1;
2003d2b09a8eSYangbo Lu 	if (info->phc_index == -1) {
2004d2b09a8eSYangbo Lu 		info->so_timestamping |= SOF_TIMESTAMPING_TX_SOFTWARE |
2005d2b09a8eSYangbo Lu 					 SOF_TIMESTAMPING_RX_SOFTWARE |
2006d2b09a8eSYangbo Lu 					 SOF_TIMESTAMPING_SOFTWARE;
2007d2b09a8eSYangbo Lu 		return 0;
2008d2b09a8eSYangbo Lu 	}
20094e3b0468SAntoine Tenart 	info->so_timestamping |= SOF_TIMESTAMPING_TX_SOFTWARE |
20104e3b0468SAntoine Tenart 				 SOF_TIMESTAMPING_RX_SOFTWARE |
20114e3b0468SAntoine Tenart 				 SOF_TIMESTAMPING_SOFTWARE |
20124e3b0468SAntoine Tenart 				 SOF_TIMESTAMPING_TX_HARDWARE |
20134e3b0468SAntoine Tenart 				 SOF_TIMESTAMPING_RX_HARDWARE |
20144e3b0468SAntoine Tenart 				 SOF_TIMESTAMPING_RAW_HARDWARE;
20154e3b0468SAntoine Tenart 	info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON) |
20164e3b0468SAntoine Tenart 			 BIT(HWTSTAMP_TX_ONESTEP_SYNC);
2017c49a35eeSVladimir Oltean 	info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
2018c49a35eeSVladimir Oltean 			   BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) |
2019c49a35eeSVladimir Oltean 			   BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |
2020c49a35eeSVladimir Oltean 			   BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT);
20214e3b0468SAntoine Tenart 
20224e3b0468SAntoine Tenart 	return 0;
20234e3b0468SAntoine Tenart }
20245e256365SVladimir Oltean EXPORT_SYMBOL(ocelot_get_ts_info);
20254e3b0468SAntoine Tenart 
2026a14e6b69SVladimir Oltean static u32 ocelot_get_bond_mask(struct ocelot *ocelot, struct net_device *bond)
2027b80af659SVladimir Oltean {
2028b80af659SVladimir Oltean 	u32 mask = 0;
2029b80af659SVladimir Oltean 	int port;
2030b80af659SVladimir Oltean 
2031961d8b69SVladimir Oltean 	lockdep_assert_held(&ocelot->fwd_domain_lock);
2032961d8b69SVladimir Oltean 
2033b80af659SVladimir Oltean 	for (port = 0; port < ocelot->num_phys_ports; port++) {
2034b80af659SVladimir Oltean 		struct ocelot_port *ocelot_port = ocelot->ports[port];
2035b80af659SVladimir Oltean 
2036b80af659SVladimir Oltean 		if (!ocelot_port)
2037b80af659SVladimir Oltean 			continue;
2038b80af659SVladimir Oltean 
2039a14e6b69SVladimir Oltean 		if (ocelot_port->bond == bond)
2040b80af659SVladimir Oltean 			mask |= BIT(port);
2041b80af659SVladimir Oltean 	}
2042b80af659SVladimir Oltean 
2043b80af659SVladimir Oltean 	return mask;
2044b80af659SVladimir Oltean }
2045b80af659SVladimir Oltean 
2046961d8b69SVladimir Oltean /* The logical port number of a LAG is equal to the lowest numbered physical
2047961d8b69SVladimir Oltean  * port ID present in that LAG. It may change if that port ever leaves the LAG.
2048961d8b69SVladimir Oltean  */
2049961d8b69SVladimir Oltean static int ocelot_bond_get_id(struct ocelot *ocelot, struct net_device *bond)
2050961d8b69SVladimir Oltean {
2051961d8b69SVladimir Oltean 	int bond_mask = ocelot_get_bond_mask(ocelot, bond);
2052961d8b69SVladimir Oltean 
2053961d8b69SVladimir Oltean 	if (!bond_mask)
2054961d8b69SVladimir Oltean 		return -ENOENT;
2055961d8b69SVladimir Oltean 
2056961d8b69SVladimir Oltean 	return __ffs(bond_mask);
2057961d8b69SVladimir Oltean }
2058961d8b69SVladimir Oltean 
20598abe1970SVladimir Oltean u32 ocelot_get_bridge_fwd_mask(struct ocelot *ocelot, int src_port)
2060df291e54SVladimir Oltean {
2061acc64f52SVladimir Oltean 	struct ocelot_port *ocelot_port = ocelot->ports[src_port];
2062a8bd9fa5SVladimir Oltean 	const struct net_device *bridge;
2063df291e54SVladimir Oltean 	u32 mask = 0;
2064df291e54SVladimir Oltean 	int port;
2065df291e54SVladimir Oltean 
2066a8bd9fa5SVladimir Oltean 	if (!ocelot_port || ocelot_port->stp_state != BR_STATE_FORWARDING)
2067a8bd9fa5SVladimir Oltean 		return 0;
2068a8bd9fa5SVladimir Oltean 
2069a8bd9fa5SVladimir Oltean 	bridge = ocelot_port->bridge;
2070a8bd9fa5SVladimir Oltean 	if (!bridge)
2071acc64f52SVladimir Oltean 		return 0;
2072acc64f52SVladimir Oltean 
2073df291e54SVladimir Oltean 	for (port = 0; port < ocelot->num_phys_ports; port++) {
2074acc64f52SVladimir Oltean 		ocelot_port = ocelot->ports[port];
2075df291e54SVladimir Oltean 
2076df291e54SVladimir Oltean 		if (!ocelot_port)
2077df291e54SVladimir Oltean 			continue;
2078df291e54SVladimir Oltean 
2079df291e54SVladimir Oltean 		if (ocelot_port->stp_state == BR_STATE_FORWARDING &&
2080df291e54SVladimir Oltean 		    ocelot_port->bridge == bridge)
2081df291e54SVladimir Oltean 			mask |= BIT(port);
2082df291e54SVladimir Oltean 	}
2083df291e54SVladimir Oltean 
2084df291e54SVladimir Oltean 	return mask;
2085df291e54SVladimir Oltean }
20868abe1970SVladimir Oltean EXPORT_SYMBOL_GPL(ocelot_get_bridge_fwd_mask);
2087df291e54SVladimir Oltean 
20888abe1970SVladimir Oltean u32 ocelot_get_dsa_8021q_cpu_mask(struct ocelot *ocelot)
20899b521250SVladimir Oltean {
2090e21268efSVladimir Oltean 	u32 mask = 0;
20919b521250SVladimir Oltean 	int port;
20929b521250SVladimir Oltean 
2093e21268efSVladimir Oltean 	for (port = 0; port < ocelot->num_phys_ports; port++) {
2094e21268efSVladimir Oltean 		struct ocelot_port *ocelot_port = ocelot->ports[port];
2095e21268efSVladimir Oltean 
2096e21268efSVladimir Oltean 		if (!ocelot_port)
2097e21268efSVladimir Oltean 			continue;
2098e21268efSVladimir Oltean 
2099e21268efSVladimir Oltean 		if (ocelot_port->is_dsa_8021q_cpu)
2100e21268efSVladimir Oltean 			mask |= BIT(port);
2101e21268efSVladimir Oltean 	}
2102e21268efSVladimir Oltean 
2103e21268efSVladimir Oltean 	return mask;
2104e21268efSVladimir Oltean }
21058abe1970SVladimir Oltean EXPORT_SYMBOL_GPL(ocelot_get_dsa_8021q_cpu_mask);
2106e21268efSVladimir Oltean 
21078abe1970SVladimir Oltean void ocelot_apply_bridge_fwd_mask(struct ocelot *ocelot, bool joining)
2108e21268efSVladimir Oltean {
2109e21268efSVladimir Oltean 	unsigned long cpu_fwd_mask;
2110e21268efSVladimir Oltean 	int port;
2111e21268efSVladimir Oltean 
21128abe1970SVladimir Oltean 	lockdep_assert_held(&ocelot->fwd_domain_lock);
21138abe1970SVladimir Oltean 
21148abe1970SVladimir Oltean 	/* If cut-through forwarding is supported, update the masks before a
21158abe1970SVladimir Oltean 	 * port joins the forwarding domain, to avoid potential underruns if it
21168abe1970SVladimir Oltean 	 * has the highest speed from the new domain.
21178abe1970SVladimir Oltean 	 */
21188abe1970SVladimir Oltean 	if (joining && ocelot->ops->cut_through_fwd)
21198abe1970SVladimir Oltean 		ocelot->ops->cut_through_fwd(ocelot);
21208abe1970SVladimir Oltean 
2121e21268efSVladimir Oltean 	/* If a DSA tag_8021q CPU exists, it needs to be included in the
2122e21268efSVladimir Oltean 	 * regular forwarding path of the front ports regardless of whether
2123e21268efSVladimir Oltean 	 * those are bridged or standalone.
2124e21268efSVladimir Oltean 	 * If DSA tag_8021q is not used, this returns 0, which is fine because
2125e21268efSVladimir Oltean 	 * the hardware-based CPU port module can be a destination for packets
2126e21268efSVladimir Oltean 	 * even if it isn't part of PGID_SRC.
2127e21268efSVladimir Oltean 	 */
2128e21268efSVladimir Oltean 	cpu_fwd_mask = ocelot_get_dsa_8021q_cpu_mask(ocelot);
2129e21268efSVladimir Oltean 
21309b521250SVladimir Oltean 	/* Apply FWD mask. The loop is needed to add/remove the current port as
21319b521250SVladimir Oltean 	 * a source for the other ports.
21329b521250SVladimir Oltean 	 */
21339b521250SVladimir Oltean 	for (port = 0; port < ocelot->num_phys_ports; port++) {
2134e21268efSVladimir Oltean 		struct ocelot_port *ocelot_port = ocelot->ports[port];
2135e21268efSVladimir Oltean 		unsigned long mask;
2136e21268efSVladimir Oltean 
2137e21268efSVladimir Oltean 		if (!ocelot_port) {
2138e21268efSVladimir Oltean 			/* Unused ports can't send anywhere */
2139e21268efSVladimir Oltean 			mask = 0;
2140e21268efSVladimir Oltean 		} else if (ocelot_port->is_dsa_8021q_cpu) {
2141e21268efSVladimir Oltean 			/* The DSA tag_8021q CPU ports need to be able to
2142e21268efSVladimir Oltean 			 * forward packets to all other ports except for
2143e21268efSVladimir Oltean 			 * themselves
2144e21268efSVladimir Oltean 			 */
2145e21268efSVladimir Oltean 			mask = GENMASK(ocelot->num_phys_ports - 1, 0);
2146e21268efSVladimir Oltean 			mask &= ~cpu_fwd_mask;
2147df291e54SVladimir Oltean 		} else if (ocelot_port->bridge) {
2148528d3f19SVladimir Oltean 			struct net_device *bond = ocelot_port->bond;
21499b521250SVladimir Oltean 
2150a8bd9fa5SVladimir Oltean 			mask = ocelot_get_bridge_fwd_mask(ocelot, port);
2151c1930148SVladimir Oltean 			mask |= cpu_fwd_mask;
2152df291e54SVladimir Oltean 			mask &= ~BIT(port);
2153a14e6b69SVladimir Oltean 			if (bond)
2154a14e6b69SVladimir Oltean 				mask &= ~ocelot_get_bond_mask(ocelot, bond);
21559b521250SVladimir Oltean 		} else {
2156e21268efSVladimir Oltean 			/* Standalone ports forward only to DSA tag_8021q CPU
2157e21268efSVladimir Oltean 			 * ports (if those exist), or to the hardware CPU port
2158e21268efSVladimir Oltean 			 * module otherwise.
2159e21268efSVladimir Oltean 			 */
2160e21268efSVladimir Oltean 			mask = cpu_fwd_mask;
2161e21268efSVladimir Oltean 		}
2162e21268efSVladimir Oltean 
2163e21268efSVladimir Oltean 		ocelot_write_rix(ocelot, mask, ANA_PGID_PGID, PGID_SRC + port);
21649b521250SVladimir Oltean 	}
21658abe1970SVladimir Oltean 
21668abe1970SVladimir Oltean 	/* If cut-through forwarding is supported and a port is leaving, there
21678abe1970SVladimir Oltean 	 * is a chance that cut-through was disabled on the other ports due to
21688abe1970SVladimir Oltean 	 * the port which is leaving (it has a higher link speed). We need to
21698abe1970SVladimir Oltean 	 * update the cut-through masks of the remaining ports no earlier than
21708abe1970SVladimir Oltean 	 * after the port has left, to prevent underruns from happening between
21718abe1970SVladimir Oltean 	 * the cut-through update and the forwarding domain update.
21728abe1970SVladimir Oltean 	 */
21738abe1970SVladimir Oltean 	if (!joining && ocelot->ops->cut_through_fwd)
21748abe1970SVladimir Oltean 		ocelot->ops->cut_through_fwd(ocelot);
21759b521250SVladimir Oltean }
2176e21268efSVladimir Oltean EXPORT_SYMBOL(ocelot_apply_bridge_fwd_mask);
21779b521250SVladimir Oltean 
217854c31984SVladimir Oltean void ocelot_port_set_dsa_8021q_cpu(struct ocelot *ocelot, int port)
217954c31984SVladimir Oltean {
218054c31984SVladimir Oltean 	u16 vid;
218154c31984SVladimir Oltean 
218254c31984SVladimir Oltean 	ocelot->ports[port]->is_dsa_8021q_cpu = true;
218354c31984SVladimir Oltean 
218454c31984SVladimir Oltean 	for (vid = OCELOT_RSV_VLAN_RANGE_START; vid < VLAN_N_VID; vid++)
218554c31984SVladimir Oltean 		ocelot_vlan_member_add(ocelot, port, vid, true);
218654c31984SVladimir Oltean }
218754c31984SVladimir Oltean EXPORT_SYMBOL_GPL(ocelot_port_set_dsa_8021q_cpu);
218854c31984SVladimir Oltean 
218954c31984SVladimir Oltean void ocelot_port_unset_dsa_8021q_cpu(struct ocelot *ocelot, int port)
219054c31984SVladimir Oltean {
219154c31984SVladimir Oltean 	u16 vid;
219254c31984SVladimir Oltean 
219354c31984SVladimir Oltean 	ocelot->ports[port]->is_dsa_8021q_cpu = false;
219454c31984SVladimir Oltean 
219554c31984SVladimir Oltean 	for (vid = OCELOT_RSV_VLAN_RANGE_START; vid < VLAN_N_VID; vid++)
219654c31984SVladimir Oltean 		ocelot_vlan_member_del(ocelot, port, vid);
219754c31984SVladimir Oltean }
219854c31984SVladimir Oltean EXPORT_SYMBOL_GPL(ocelot_port_unset_dsa_8021q_cpu);
219954c31984SVladimir Oltean 
22005e256365SVladimir Oltean void ocelot_bridge_stp_state_set(struct ocelot *ocelot, int port, u8 state)
2201a556c76aSAlexandre Belloni {
2202421741eaSVladimir Oltean 	struct ocelot_port *ocelot_port = ocelot->ports[port];
2203df291e54SVladimir Oltean 	u32 learn_ena = 0;
2204a556c76aSAlexandre Belloni 
22058abe1970SVladimir Oltean 	mutex_lock(&ocelot->fwd_domain_lock);
22068abe1970SVladimir Oltean 
2207df291e54SVladimir Oltean 	ocelot_port->stp_state = state;
2208a556c76aSAlexandre Belloni 
2209df291e54SVladimir Oltean 	if ((state == BR_STATE_LEARNING || state == BR_STATE_FORWARDING) &&
2210df291e54SVladimir Oltean 	    ocelot_port->learn_ena)
2211df291e54SVladimir Oltean 		learn_ena = ANA_PORT_PORT_CFG_LEARN_ENA;
2212a556c76aSAlexandre Belloni 
2213df291e54SVladimir Oltean 	ocelot_rmw_gix(ocelot, learn_ena, ANA_PORT_PORT_CFG_LEARN_ENA,
2214df291e54SVladimir Oltean 		       ANA_PORT_PORT_CFG, port);
2215a556c76aSAlexandre Belloni 
22168abe1970SVladimir Oltean 	ocelot_apply_bridge_fwd_mask(ocelot, state == BR_STATE_FORWARDING);
22178abe1970SVladimir Oltean 
22188abe1970SVladimir Oltean 	mutex_unlock(&ocelot->fwd_domain_lock);
2219a556c76aSAlexandre Belloni }
22205e256365SVladimir Oltean EXPORT_SYMBOL(ocelot_bridge_stp_state_set);
2221a556c76aSAlexandre Belloni 
22225e256365SVladimir Oltean void ocelot_set_ageing_time(struct ocelot *ocelot, unsigned int msecs)
22234bda1415SVladimir Oltean {
2224c0d7eccbSVladimir Oltean 	unsigned int age_period = ANA_AUTOAGE_AGE_PERIOD(msecs / 2000);
2225c0d7eccbSVladimir Oltean 
2226c0d7eccbSVladimir Oltean 	/* Setting AGE_PERIOD to zero effectively disables automatic aging,
2227c0d7eccbSVladimir Oltean 	 * which is clearly not what our intention is. So avoid that.
2228c0d7eccbSVladimir Oltean 	 */
2229c0d7eccbSVladimir Oltean 	if (!age_period)
2230c0d7eccbSVladimir Oltean 		age_period = 1;
2231c0d7eccbSVladimir Oltean 
2232c0d7eccbSVladimir Oltean 	ocelot_rmw(ocelot, age_period, ANA_AUTOAGE_AGE_PERIOD_M, ANA_AUTOAGE);
2233a556c76aSAlexandre Belloni }
22345e256365SVladimir Oltean EXPORT_SYMBOL(ocelot_set_ageing_time);
2235a556c76aSAlexandre Belloni 
2236a556c76aSAlexandre Belloni static struct ocelot_multicast *ocelot_multicast_get(struct ocelot *ocelot,
2237a556c76aSAlexandre Belloni 						     const unsigned char *addr,
2238a556c76aSAlexandre Belloni 						     u16 vid)
2239a556c76aSAlexandre Belloni {
2240a556c76aSAlexandre Belloni 	struct ocelot_multicast *mc;
2241a556c76aSAlexandre Belloni 
2242a556c76aSAlexandre Belloni 	list_for_each_entry(mc, &ocelot->multicast, list) {
2243a556c76aSAlexandre Belloni 		if (ether_addr_equal(mc->addr, addr) && mc->vid == vid)
2244a556c76aSAlexandre Belloni 			return mc;
2245a556c76aSAlexandre Belloni 	}
2246a556c76aSAlexandre Belloni 
2247a556c76aSAlexandre Belloni 	return NULL;
2248a556c76aSAlexandre Belloni }
2249a556c76aSAlexandre Belloni 
22509403c158SVladimir Oltean static enum macaccess_entry_type ocelot_classify_mdb(const unsigned char *addr)
22519403c158SVladimir Oltean {
22529403c158SVladimir Oltean 	if (addr[0] == 0x01 && addr[1] == 0x00 && addr[2] == 0x5e)
22539403c158SVladimir Oltean 		return ENTRYTYPE_MACv4;
22549403c158SVladimir Oltean 	if (addr[0] == 0x33 && addr[1] == 0x33)
22559403c158SVladimir Oltean 		return ENTRYTYPE_MACv6;
22567c313143SVladimir Oltean 	return ENTRYTYPE_LOCKED;
22579403c158SVladimir Oltean }
22589403c158SVladimir Oltean 
2259e5d1f896SVladimir Oltean static struct ocelot_pgid *ocelot_pgid_alloc(struct ocelot *ocelot, int index,
2260e5d1f896SVladimir Oltean 					     unsigned long ports)
2261e5d1f896SVladimir Oltean {
2262e5d1f896SVladimir Oltean 	struct ocelot_pgid *pgid;
2263e5d1f896SVladimir Oltean 
2264e5d1f896SVladimir Oltean 	pgid = kzalloc(sizeof(*pgid), GFP_KERNEL);
2265e5d1f896SVladimir Oltean 	if (!pgid)
2266e5d1f896SVladimir Oltean 		return ERR_PTR(-ENOMEM);
2267e5d1f896SVladimir Oltean 
2268e5d1f896SVladimir Oltean 	pgid->ports = ports;
2269e5d1f896SVladimir Oltean 	pgid->index = index;
2270e5d1f896SVladimir Oltean 	refcount_set(&pgid->refcount, 1);
2271e5d1f896SVladimir Oltean 	list_add_tail(&pgid->list, &ocelot->pgids);
2272e5d1f896SVladimir Oltean 
2273e5d1f896SVladimir Oltean 	return pgid;
2274e5d1f896SVladimir Oltean }
2275e5d1f896SVladimir Oltean 
2276e5d1f896SVladimir Oltean static void ocelot_pgid_free(struct ocelot *ocelot, struct ocelot_pgid *pgid)
2277e5d1f896SVladimir Oltean {
2278e5d1f896SVladimir Oltean 	if (!refcount_dec_and_test(&pgid->refcount))
2279e5d1f896SVladimir Oltean 		return;
2280e5d1f896SVladimir Oltean 
2281e5d1f896SVladimir Oltean 	list_del(&pgid->list);
2282e5d1f896SVladimir Oltean 	kfree(pgid);
2283e5d1f896SVladimir Oltean }
2284e5d1f896SVladimir Oltean 
2285e5d1f896SVladimir Oltean static struct ocelot_pgid *ocelot_mdb_get_pgid(struct ocelot *ocelot,
2286bb8d53fdSVladimir Oltean 					       const struct ocelot_multicast *mc)
22879403c158SVladimir Oltean {
2288e5d1f896SVladimir Oltean 	struct ocelot_pgid *pgid;
2289e5d1f896SVladimir Oltean 	int index;
22909403c158SVladimir Oltean 
22919403c158SVladimir Oltean 	/* According to VSC7514 datasheet 3.9.1.5 IPv4 Multicast Entries and
22929403c158SVladimir Oltean 	 * 3.9.1.6 IPv6 Multicast Entries, "Instead of a lookup in the
22939403c158SVladimir Oltean 	 * destination mask table (PGID), the destination set is programmed as
22949403c158SVladimir Oltean 	 * part of the entry MAC address.", and the DEST_IDX is set to 0.
22959403c158SVladimir Oltean 	 */
2296bb8d53fdSVladimir Oltean 	if (mc->entry_type == ENTRYTYPE_MACv4 ||
2297bb8d53fdSVladimir Oltean 	    mc->entry_type == ENTRYTYPE_MACv6)
2298e5d1f896SVladimir Oltean 		return ocelot_pgid_alloc(ocelot, 0, mc->ports);
22999403c158SVladimir Oltean 
2300e5d1f896SVladimir Oltean 	list_for_each_entry(pgid, &ocelot->pgids, list) {
2301e5d1f896SVladimir Oltean 		/* When searching for a nonreserved multicast PGID, ignore the
2302e5d1f896SVladimir Oltean 		 * dummy PGID of zero that we have for MACv4/MACv6 entries
2303e5d1f896SVladimir Oltean 		 */
2304e5d1f896SVladimir Oltean 		if (pgid->index && pgid->ports == mc->ports) {
2305e5d1f896SVladimir Oltean 			refcount_inc(&pgid->refcount);
2306e5d1f896SVladimir Oltean 			return pgid;
2307e5d1f896SVladimir Oltean 		}
2308e5d1f896SVladimir Oltean 	}
2309e5d1f896SVladimir Oltean 
2310e5d1f896SVladimir Oltean 	/* Search for a free index in the nonreserved multicast PGID area */
2311e5d1f896SVladimir Oltean 	for_each_nonreserved_multicast_dest_pgid(ocelot, index) {
23129403c158SVladimir Oltean 		bool used = false;
23139403c158SVladimir Oltean 
2314e5d1f896SVladimir Oltean 		list_for_each_entry(pgid, &ocelot->pgids, list) {
2315e5d1f896SVladimir Oltean 			if (pgid->index == index) {
23169403c158SVladimir Oltean 				used = true;
23179403c158SVladimir Oltean 				break;
23189403c158SVladimir Oltean 			}
23199403c158SVladimir Oltean 		}
23209403c158SVladimir Oltean 
23219403c158SVladimir Oltean 		if (!used)
2322e5d1f896SVladimir Oltean 			return ocelot_pgid_alloc(ocelot, index, mc->ports);
23239403c158SVladimir Oltean 	}
23249403c158SVladimir Oltean 
2325e5d1f896SVladimir Oltean 	return ERR_PTR(-ENOSPC);
23269403c158SVladimir Oltean }
23279403c158SVladimir Oltean 
23289403c158SVladimir Oltean static void ocelot_encode_ports_to_mdb(unsigned char *addr,
2329bb8d53fdSVladimir Oltean 				       struct ocelot_multicast *mc)
23309403c158SVladimir Oltean {
2331ebbd860eSVladimir Oltean 	ether_addr_copy(addr, mc->addr);
23329403c158SVladimir Oltean 
2333bb8d53fdSVladimir Oltean 	if (mc->entry_type == ENTRYTYPE_MACv4) {
23349403c158SVladimir Oltean 		addr[0] = 0;
23359403c158SVladimir Oltean 		addr[1] = mc->ports >> 8;
23369403c158SVladimir Oltean 		addr[2] = mc->ports & 0xff;
2337bb8d53fdSVladimir Oltean 	} else if (mc->entry_type == ENTRYTYPE_MACv6) {
23389403c158SVladimir Oltean 		addr[0] = mc->ports >> 8;
23399403c158SVladimir Oltean 		addr[1] = mc->ports & 0xff;
23409403c158SVladimir Oltean 	}
23419403c158SVladimir Oltean }
23429403c158SVladimir Oltean 
2343209edf95SVladimir Oltean int ocelot_port_mdb_add(struct ocelot *ocelot, int port,
234454c31984SVladimir Oltean 			const struct switchdev_obj_port_mdb *mdb,
234554c31984SVladimir Oltean 			const struct net_device *bridge)
2346a556c76aSAlexandre Belloni {
2347a556c76aSAlexandre Belloni 	unsigned char addr[ETH_ALEN];
2348004d44f6SVladimir Oltean 	struct ocelot_multicast *mc;
2349e5d1f896SVladimir Oltean 	struct ocelot_pgid *pgid;
2350a556c76aSAlexandre Belloni 	u16 vid = mdb->vid;
2351a556c76aSAlexandre Belloni 
2352471beb11SVladimir Oltean 	if (port == ocelot->npi)
2353471beb11SVladimir Oltean 		port = ocelot->num_phys_ports;
2354471beb11SVladimir Oltean 
235554c31984SVladimir Oltean 	if (!vid)
235654c31984SVladimir Oltean 		vid = ocelot_vlan_unaware_pvid(ocelot, bridge);
235754c31984SVladimir Oltean 
2358a556c76aSAlexandre Belloni 	mc = ocelot_multicast_get(ocelot, mdb->addr, vid);
2359a556c76aSAlexandre Belloni 	if (!mc) {
2360728e69aeSVladimir Oltean 		/* New entry */
2361bb8d53fdSVladimir Oltean 		mc = devm_kzalloc(ocelot->dev, sizeof(*mc), GFP_KERNEL);
2362bb8d53fdSVladimir Oltean 		if (!mc)
2363bb8d53fdSVladimir Oltean 			return -ENOMEM;
2364bb8d53fdSVladimir Oltean 
2365bb8d53fdSVladimir Oltean 		mc->entry_type = ocelot_classify_mdb(mdb->addr);
2366bb8d53fdSVladimir Oltean 		ether_addr_copy(mc->addr, mdb->addr);
2367bb8d53fdSVladimir Oltean 		mc->vid = vid;
2368bb8d53fdSVladimir Oltean 
2369a556c76aSAlexandre Belloni 		list_add_tail(&mc->list, &ocelot->multicast);
2370728e69aeSVladimir Oltean 	} else {
2371e5d1f896SVladimir Oltean 		/* Existing entry. Clean up the current port mask from
2372e5d1f896SVladimir Oltean 		 * hardware now, because we'll be modifying it.
2373e5d1f896SVladimir Oltean 		 */
2374e5d1f896SVladimir Oltean 		ocelot_pgid_free(ocelot, mc->pgid);
2375bb8d53fdSVladimir Oltean 		ocelot_encode_ports_to_mdb(addr, mc);
2376a556c76aSAlexandre Belloni 		ocelot_mact_forget(ocelot, addr, vid);
2377a556c76aSAlexandre Belloni 	}
2378a556c76aSAlexandre Belloni 
2379004d44f6SVladimir Oltean 	mc->ports |= BIT(port);
2380e5d1f896SVladimir Oltean 
2381e5d1f896SVladimir Oltean 	pgid = ocelot_mdb_get_pgid(ocelot, mc);
2382e5d1f896SVladimir Oltean 	if (IS_ERR(pgid)) {
2383e5d1f896SVladimir Oltean 		dev_err(ocelot->dev,
2384e5d1f896SVladimir Oltean 			"Cannot allocate PGID for mdb %pM vid %d\n",
2385e5d1f896SVladimir Oltean 			mc->addr, mc->vid);
2386e5d1f896SVladimir Oltean 		devm_kfree(ocelot->dev, mc);
2387e5d1f896SVladimir Oltean 		return PTR_ERR(pgid);
2388e5d1f896SVladimir Oltean 	}
2389e5d1f896SVladimir Oltean 	mc->pgid = pgid;
2390e5d1f896SVladimir Oltean 
2391bb8d53fdSVladimir Oltean 	ocelot_encode_ports_to_mdb(addr, mc);
2392a556c76aSAlexandre Belloni 
2393e5d1f896SVladimir Oltean 	if (mc->entry_type != ENTRYTYPE_MACv4 &&
2394e5d1f896SVladimir Oltean 	    mc->entry_type != ENTRYTYPE_MACv6)
2395e5d1f896SVladimir Oltean 		ocelot_write_rix(ocelot, pgid->ports, ANA_PGID_PGID,
2396e5d1f896SVladimir Oltean 				 pgid->index);
2397e5d1f896SVladimir Oltean 
2398e5d1f896SVladimir Oltean 	return ocelot_mact_learn(ocelot, pgid->index, addr, vid,
2399bb8d53fdSVladimir Oltean 				 mc->entry_type);
2400a556c76aSAlexandre Belloni }
2401209edf95SVladimir Oltean EXPORT_SYMBOL(ocelot_port_mdb_add);
2402a556c76aSAlexandre Belloni 
2403209edf95SVladimir Oltean int ocelot_port_mdb_del(struct ocelot *ocelot, int port,
240454c31984SVladimir Oltean 			const struct switchdev_obj_port_mdb *mdb,
240554c31984SVladimir Oltean 			const struct net_device *bridge)
2406a556c76aSAlexandre Belloni {
2407a556c76aSAlexandre Belloni 	unsigned char addr[ETH_ALEN];
2408004d44f6SVladimir Oltean 	struct ocelot_multicast *mc;
2409e5d1f896SVladimir Oltean 	struct ocelot_pgid *pgid;
2410a556c76aSAlexandre Belloni 	u16 vid = mdb->vid;
2411a556c76aSAlexandre Belloni 
2412471beb11SVladimir Oltean 	if (port == ocelot->npi)
2413471beb11SVladimir Oltean 		port = ocelot->num_phys_ports;
2414471beb11SVladimir Oltean 
241554c31984SVladimir Oltean 	if (!vid)
241654c31984SVladimir Oltean 		vid = ocelot_vlan_unaware_pvid(ocelot, bridge);
241754c31984SVladimir Oltean 
2418a556c76aSAlexandre Belloni 	mc = ocelot_multicast_get(ocelot, mdb->addr, vid);
2419a556c76aSAlexandre Belloni 	if (!mc)
2420a556c76aSAlexandre Belloni 		return -ENOENT;
2421a556c76aSAlexandre Belloni 
2422bb8d53fdSVladimir Oltean 	ocelot_encode_ports_to_mdb(addr, mc);
2423a556c76aSAlexandre Belloni 	ocelot_mact_forget(ocelot, addr, vid);
2424a556c76aSAlexandre Belloni 
2425e5d1f896SVladimir Oltean 	ocelot_pgid_free(ocelot, mc->pgid);
2426004d44f6SVladimir Oltean 	mc->ports &= ~BIT(port);
2427a556c76aSAlexandre Belloni 	if (!mc->ports) {
2428a556c76aSAlexandre Belloni 		list_del(&mc->list);
2429a556c76aSAlexandre Belloni 		devm_kfree(ocelot->dev, mc);
2430a556c76aSAlexandre Belloni 		return 0;
2431a556c76aSAlexandre Belloni 	}
2432a556c76aSAlexandre Belloni 
2433e5d1f896SVladimir Oltean 	/* We have a PGID with fewer ports now */
2434e5d1f896SVladimir Oltean 	pgid = ocelot_mdb_get_pgid(ocelot, mc);
2435e5d1f896SVladimir Oltean 	if (IS_ERR(pgid))
2436e5d1f896SVladimir Oltean 		return PTR_ERR(pgid);
2437e5d1f896SVladimir Oltean 	mc->pgid = pgid;
2438e5d1f896SVladimir Oltean 
2439bb8d53fdSVladimir Oltean 	ocelot_encode_ports_to_mdb(addr, mc);
2440a556c76aSAlexandre Belloni 
2441e5d1f896SVladimir Oltean 	if (mc->entry_type != ENTRYTYPE_MACv4 &&
2442e5d1f896SVladimir Oltean 	    mc->entry_type != ENTRYTYPE_MACv6)
2443e5d1f896SVladimir Oltean 		ocelot_write_rix(ocelot, pgid->ports, ANA_PGID_PGID,
2444e5d1f896SVladimir Oltean 				 pgid->index);
2445e5d1f896SVladimir Oltean 
2446e5d1f896SVladimir Oltean 	return ocelot_mact_learn(ocelot, pgid->index, addr, vid,
2447bb8d53fdSVladimir Oltean 				 mc->entry_type);
2448a556c76aSAlexandre Belloni }
2449209edf95SVladimir Oltean EXPORT_SYMBOL(ocelot_port_mdb_del);
2450a556c76aSAlexandre Belloni 
245154c31984SVladimir Oltean int ocelot_port_bridge_join(struct ocelot *ocelot, int port,
245254c31984SVladimir Oltean 			    struct net_device *bridge, int bridge_num,
245354c31984SVladimir Oltean 			    struct netlink_ext_ack *extack)
2454a556c76aSAlexandre Belloni {
2455df291e54SVladimir Oltean 	struct ocelot_port *ocelot_port = ocelot->ports[port];
245654c31984SVladimir Oltean 	int err;
245754c31984SVladimir Oltean 
245854c31984SVladimir Oltean 	err = ocelot_single_vlan_aware_bridge(ocelot, extack);
245954c31984SVladimir Oltean 	if (err)
246054c31984SVladimir Oltean 		return err;
2461a556c76aSAlexandre Belloni 
24628abe1970SVladimir Oltean 	mutex_lock(&ocelot->fwd_domain_lock);
24638abe1970SVladimir Oltean 
2464df291e54SVladimir Oltean 	ocelot_port->bridge = bridge;
246554c31984SVladimir Oltean 	ocelot_port->bridge_num = bridge_num;
2466a556c76aSAlexandre Belloni 
24678abe1970SVladimir Oltean 	ocelot_apply_bridge_fwd_mask(ocelot, true);
24688abe1970SVladimir Oltean 
24698abe1970SVladimir Oltean 	mutex_unlock(&ocelot->fwd_domain_lock);
247054c31984SVladimir Oltean 
247154c31984SVladimir Oltean 	if (br_vlan_enabled(bridge))
247254c31984SVladimir Oltean 		return 0;
247354c31984SVladimir Oltean 
247454c31984SVladimir Oltean 	return ocelot_add_vlan_unaware_pvid(ocelot, port, bridge);
2475a556c76aSAlexandre Belloni }
24765e256365SVladimir Oltean EXPORT_SYMBOL(ocelot_port_bridge_join);
2477a556c76aSAlexandre Belloni 
2478e4bd44e8SVladimir Oltean void ocelot_port_bridge_leave(struct ocelot *ocelot, int port,
2479a556c76aSAlexandre Belloni 			      struct net_device *bridge)
2480a556c76aSAlexandre Belloni {
2481df291e54SVladimir Oltean 	struct ocelot_port *ocelot_port = ocelot->ports[port];
24822e554a7aSVladimir Oltean 
24838abe1970SVladimir Oltean 	mutex_lock(&ocelot->fwd_domain_lock);
24848abe1970SVladimir Oltean 
248554c31984SVladimir Oltean 	if (!br_vlan_enabled(bridge))
248654c31984SVladimir Oltean 		ocelot_del_vlan_unaware_pvid(ocelot, port, bridge);
248754c31984SVladimir Oltean 
2488df291e54SVladimir Oltean 	ocelot_port->bridge = NULL;
248954c31984SVladimir Oltean 	ocelot_port->bridge_num = -1;
24907142529fSAntoine Tenart 
2491d4004422SVladimir Oltean 	ocelot_port_set_pvid(ocelot, port, NULL);
24920da1a1c4SVladimir Oltean 	ocelot_port_manage_port_tag(ocelot, port);
24938abe1970SVladimir Oltean 	ocelot_apply_bridge_fwd_mask(ocelot, false);
24948abe1970SVladimir Oltean 
24958abe1970SVladimir Oltean 	mutex_unlock(&ocelot->fwd_domain_lock);
2496a556c76aSAlexandre Belloni }
24975e256365SVladimir Oltean EXPORT_SYMBOL(ocelot_port_bridge_leave);
2498a556c76aSAlexandre Belloni 
2499dc96ee37SAlexandre Belloni static void ocelot_set_aggr_pgids(struct ocelot *ocelot)
2500dc96ee37SAlexandre Belloni {
2501528d3f19SVladimir Oltean 	unsigned long visited = GENMASK(ocelot->num_phys_ports - 1, 0);
2502dc96ee37SAlexandre Belloni 	int i, port, lag;
2503dc96ee37SAlexandre Belloni 
2504dc96ee37SAlexandre Belloni 	/* Reset destination and aggregation PGIDS */
250596b029b0SVladimir Oltean 	for_each_unicast_dest_pgid(ocelot, port)
2506dc96ee37SAlexandre Belloni 		ocelot_write_rix(ocelot, BIT(port), ANA_PGID_PGID, port);
2507dc96ee37SAlexandre Belloni 
250896b029b0SVladimir Oltean 	for_each_aggr_pgid(ocelot, i)
2509dc96ee37SAlexandre Belloni 		ocelot_write_rix(ocelot, GENMASK(ocelot->num_phys_ports - 1, 0),
2510dc96ee37SAlexandre Belloni 				 ANA_PGID_PGID, i);
2511dc96ee37SAlexandre Belloni 
2512528d3f19SVladimir Oltean 	/* The visited ports bitmask holds the list of ports offloading any
2513528d3f19SVladimir Oltean 	 * bonding interface. Initially we mark all these ports as unvisited,
2514528d3f19SVladimir Oltean 	 * then every time we visit a port in this bitmask, we know that it is
2515528d3f19SVladimir Oltean 	 * the lowest numbered port, i.e. the one whose logical ID == physical
2516528d3f19SVladimir Oltean 	 * port ID == LAG ID. So we mark as visited all further ports in the
2517528d3f19SVladimir Oltean 	 * bitmask that are offloading the same bonding interface. This way,
2518528d3f19SVladimir Oltean 	 * we set up the aggregation PGIDs only once per bonding interface.
2519528d3f19SVladimir Oltean 	 */
2520528d3f19SVladimir Oltean 	for (port = 0; port < ocelot->num_phys_ports; port++) {
2521528d3f19SVladimir Oltean 		struct ocelot_port *ocelot_port = ocelot->ports[port];
2522528d3f19SVladimir Oltean 
2523528d3f19SVladimir Oltean 		if (!ocelot_port || !ocelot_port->bond)
2524528d3f19SVladimir Oltean 			continue;
2525528d3f19SVladimir Oltean 
2526528d3f19SVladimir Oltean 		visited &= ~BIT(port);
2527528d3f19SVladimir Oltean 	}
2528528d3f19SVladimir Oltean 
2529528d3f19SVladimir Oltean 	/* Now, set PGIDs for each active LAG */
2530dc96ee37SAlexandre Belloni 	for (lag = 0; lag < ocelot->num_phys_ports; lag++) {
2531528d3f19SVladimir Oltean 		struct net_device *bond = ocelot->ports[lag]->bond;
253223ca3b72SVladimir Oltean 		int num_active_ports = 0;
2533dc96ee37SAlexandre Belloni 		unsigned long bond_mask;
2534dc96ee37SAlexandre Belloni 		u8 aggr_idx[16];
2535dc96ee37SAlexandre Belloni 
2536528d3f19SVladimir Oltean 		if (!bond || (visited & BIT(lag)))
2537dc96ee37SAlexandre Belloni 			continue;
2538dc96ee37SAlexandre Belloni 
2539a14e6b69SVladimir Oltean 		bond_mask = ocelot_get_bond_mask(ocelot, bond);
2540528d3f19SVladimir Oltean 
2541dc96ee37SAlexandre Belloni 		for_each_set_bit(port, &bond_mask, ocelot->num_phys_ports) {
2542a14e6b69SVladimir Oltean 			struct ocelot_port *ocelot_port = ocelot->ports[port];
2543a14e6b69SVladimir Oltean 
2544dc96ee37SAlexandre Belloni 			// Destination mask
2545dc96ee37SAlexandre Belloni 			ocelot_write_rix(ocelot, bond_mask,
2546dc96ee37SAlexandre Belloni 					 ANA_PGID_PGID, port);
2547a14e6b69SVladimir Oltean 
2548a14e6b69SVladimir Oltean 			if (ocelot_port->lag_tx_active)
254923ca3b72SVladimir Oltean 				aggr_idx[num_active_ports++] = port;
2550dc96ee37SAlexandre Belloni 		}
2551dc96ee37SAlexandre Belloni 
255296b029b0SVladimir Oltean 		for_each_aggr_pgid(ocelot, i) {
2553dc96ee37SAlexandre Belloni 			u32 ac;
2554dc96ee37SAlexandre Belloni 
2555dc96ee37SAlexandre Belloni 			ac = ocelot_read_rix(ocelot, ANA_PGID_PGID, i);
2556dc96ee37SAlexandre Belloni 			ac &= ~bond_mask;
255723ca3b72SVladimir Oltean 			/* Don't do division by zero if there was no active
255823ca3b72SVladimir Oltean 			 * port. Just make all aggregation codes zero.
255923ca3b72SVladimir Oltean 			 */
256023ca3b72SVladimir Oltean 			if (num_active_ports)
256123ca3b72SVladimir Oltean 				ac |= BIT(aggr_idx[i % num_active_ports]);
2562dc96ee37SAlexandre Belloni 			ocelot_write_rix(ocelot, ac, ANA_PGID_PGID, i);
2563dc96ee37SAlexandre Belloni 		}
2564528d3f19SVladimir Oltean 
2565528d3f19SVladimir Oltean 		/* Mark all ports in the same LAG as visited to avoid applying
2566528d3f19SVladimir Oltean 		 * the same config again.
2567528d3f19SVladimir Oltean 		 */
2568528d3f19SVladimir Oltean 		for (port = lag; port < ocelot->num_phys_ports; port++) {
2569528d3f19SVladimir Oltean 			struct ocelot_port *ocelot_port = ocelot->ports[port];
2570528d3f19SVladimir Oltean 
2571528d3f19SVladimir Oltean 			if (!ocelot_port)
2572528d3f19SVladimir Oltean 				continue;
2573528d3f19SVladimir Oltean 
2574528d3f19SVladimir Oltean 			if (ocelot_port->bond == bond)
2575528d3f19SVladimir Oltean 				visited |= BIT(port);
2576528d3f19SVladimir Oltean 		}
2577dc96ee37SAlexandre Belloni 	}
2578dc96ee37SAlexandre Belloni }
2579dc96ee37SAlexandre Belloni 
25802527f2e8SVladimir Oltean /* When offloading a bonding interface, the switch ports configured under the
25812527f2e8SVladimir Oltean  * same bond must have the same logical port ID, equal to the physical port ID
25822527f2e8SVladimir Oltean  * of the lowest numbered physical port in that bond. Otherwise, in standalone/
25832527f2e8SVladimir Oltean  * bridged mode, each port has a logical port ID equal to its physical port ID.
25842527f2e8SVladimir Oltean  */
25852527f2e8SVladimir Oltean static void ocelot_setup_logical_port_ids(struct ocelot *ocelot)
2586dc96ee37SAlexandre Belloni {
25872527f2e8SVladimir Oltean 	int port;
2588dc96ee37SAlexandre Belloni 
25892527f2e8SVladimir Oltean 	for (port = 0; port < ocelot->num_phys_ports; port++) {
25902527f2e8SVladimir Oltean 		struct ocelot_port *ocelot_port = ocelot->ports[port];
25912527f2e8SVladimir Oltean 		struct net_device *bond;
2592dc96ee37SAlexandre Belloni 
25932527f2e8SVladimir Oltean 		if (!ocelot_port)
25942527f2e8SVladimir Oltean 			continue;
2595dc96ee37SAlexandre Belloni 
25962527f2e8SVladimir Oltean 		bond = ocelot_port->bond;
25972527f2e8SVladimir Oltean 		if (bond) {
2598961d8b69SVladimir Oltean 			int lag = ocelot_bond_get_id(ocelot, bond);
25992527f2e8SVladimir Oltean 
26002527f2e8SVladimir Oltean 			ocelot_rmw_gix(ocelot,
2601dc96ee37SAlexandre Belloni 				       ANA_PORT_PORT_CFG_PORTID_VAL(lag),
26022527f2e8SVladimir Oltean 				       ANA_PORT_PORT_CFG_PORTID_VAL_M,
26032527f2e8SVladimir Oltean 				       ANA_PORT_PORT_CFG, port);
26042527f2e8SVladimir Oltean 		} else {
26052527f2e8SVladimir Oltean 			ocelot_rmw_gix(ocelot,
26062527f2e8SVladimir Oltean 				       ANA_PORT_PORT_CFG_PORTID_VAL(port),
26072527f2e8SVladimir Oltean 				       ANA_PORT_PORT_CFG_PORTID_VAL_M,
26082527f2e8SVladimir Oltean 				       ANA_PORT_PORT_CFG, port);
26092527f2e8SVladimir Oltean 		}
2610dc96ee37SAlexandre Belloni 	}
2611dc96ee37SAlexandre Belloni }
2612dc96ee37SAlexandre Belloni 
2613*28de0f9fSVladimir Oltean static int ocelot_migrate_mc(struct ocelot *ocelot, struct ocelot_multicast *mc,
2614*28de0f9fSVladimir Oltean 			     unsigned long from_mask, unsigned long to_mask)
2615*28de0f9fSVladimir Oltean {
2616*28de0f9fSVladimir Oltean 	unsigned char addr[ETH_ALEN];
2617*28de0f9fSVladimir Oltean 	struct ocelot_pgid *pgid;
2618*28de0f9fSVladimir Oltean 	u16 vid = mc->vid;
2619*28de0f9fSVladimir Oltean 
2620*28de0f9fSVladimir Oltean 	dev_dbg(ocelot->dev,
2621*28de0f9fSVladimir Oltean 		"Migrating multicast %pM vid %d from port mask 0x%lx to 0x%lx\n",
2622*28de0f9fSVladimir Oltean 		mc->addr, mc->vid, from_mask, to_mask);
2623*28de0f9fSVladimir Oltean 
2624*28de0f9fSVladimir Oltean 	/* First clean up the current port mask from hardware, because
2625*28de0f9fSVladimir Oltean 	 * we'll be modifying it.
2626*28de0f9fSVladimir Oltean 	 */
2627*28de0f9fSVladimir Oltean 	ocelot_pgid_free(ocelot, mc->pgid);
2628*28de0f9fSVladimir Oltean 	ocelot_encode_ports_to_mdb(addr, mc);
2629*28de0f9fSVladimir Oltean 	ocelot_mact_forget(ocelot, addr, vid);
2630*28de0f9fSVladimir Oltean 
2631*28de0f9fSVladimir Oltean 	mc->ports &= ~from_mask;
2632*28de0f9fSVladimir Oltean 	mc->ports |= to_mask;
2633*28de0f9fSVladimir Oltean 
2634*28de0f9fSVladimir Oltean 	pgid = ocelot_mdb_get_pgid(ocelot, mc);
2635*28de0f9fSVladimir Oltean 	if (IS_ERR(pgid)) {
2636*28de0f9fSVladimir Oltean 		dev_err(ocelot->dev,
2637*28de0f9fSVladimir Oltean 			"Cannot allocate PGID for mdb %pM vid %d\n",
2638*28de0f9fSVladimir Oltean 			mc->addr, mc->vid);
2639*28de0f9fSVladimir Oltean 		devm_kfree(ocelot->dev, mc);
2640*28de0f9fSVladimir Oltean 		return PTR_ERR(pgid);
2641*28de0f9fSVladimir Oltean 	}
2642*28de0f9fSVladimir Oltean 	mc->pgid = pgid;
2643*28de0f9fSVladimir Oltean 
2644*28de0f9fSVladimir Oltean 	ocelot_encode_ports_to_mdb(addr, mc);
2645*28de0f9fSVladimir Oltean 
2646*28de0f9fSVladimir Oltean 	if (mc->entry_type != ENTRYTYPE_MACv4 &&
2647*28de0f9fSVladimir Oltean 	    mc->entry_type != ENTRYTYPE_MACv6)
2648*28de0f9fSVladimir Oltean 		ocelot_write_rix(ocelot, pgid->ports, ANA_PGID_PGID,
2649*28de0f9fSVladimir Oltean 				 pgid->index);
2650*28de0f9fSVladimir Oltean 
2651*28de0f9fSVladimir Oltean 	return ocelot_mact_learn(ocelot, pgid->index, addr, vid,
2652*28de0f9fSVladimir Oltean 				 mc->entry_type);
2653*28de0f9fSVladimir Oltean }
2654*28de0f9fSVladimir Oltean 
2655*28de0f9fSVladimir Oltean int ocelot_migrate_mdbs(struct ocelot *ocelot, unsigned long from_mask,
2656*28de0f9fSVladimir Oltean 			unsigned long to_mask)
2657*28de0f9fSVladimir Oltean {
2658*28de0f9fSVladimir Oltean 	struct ocelot_multicast *mc;
2659*28de0f9fSVladimir Oltean 	int err;
2660*28de0f9fSVladimir Oltean 
2661*28de0f9fSVladimir Oltean 	list_for_each_entry(mc, &ocelot->multicast, list) {
2662*28de0f9fSVladimir Oltean 		if (!(mc->ports & from_mask))
2663*28de0f9fSVladimir Oltean 			continue;
2664*28de0f9fSVladimir Oltean 
2665*28de0f9fSVladimir Oltean 		err = ocelot_migrate_mc(ocelot, mc, from_mask, to_mask);
2666*28de0f9fSVladimir Oltean 		if (err)
2667*28de0f9fSVladimir Oltean 			return err;
2668*28de0f9fSVladimir Oltean 	}
2669*28de0f9fSVladimir Oltean 
2670*28de0f9fSVladimir Oltean 	return 0;
2671*28de0f9fSVladimir Oltean }
2672*28de0f9fSVladimir Oltean EXPORT_SYMBOL_GPL(ocelot_migrate_mdbs);
2673*28de0f9fSVladimir Oltean 
2674961d8b69SVladimir Oltean /* Documentation for PORTID_VAL says:
2675961d8b69SVladimir Oltean  *     Logical port number for front port. If port is not a member of a LLAG,
2676961d8b69SVladimir Oltean  *     then PORTID must be set to the physical port number.
2677961d8b69SVladimir Oltean  *     If port is a member of a LLAG, then PORTID must be set to the common
2678961d8b69SVladimir Oltean  *     PORTID_VAL used for all member ports of the LLAG.
2679961d8b69SVladimir Oltean  *     The value must not exceed the number of physical ports on the device.
2680961d8b69SVladimir Oltean  *
2681961d8b69SVladimir Oltean  * This means we have little choice but to migrate FDB entries pointing towards
2682961d8b69SVladimir Oltean  * a logical port when that changes.
2683961d8b69SVladimir Oltean  */
2684961d8b69SVladimir Oltean static void ocelot_migrate_lag_fdbs(struct ocelot *ocelot,
2685961d8b69SVladimir Oltean 				    struct net_device *bond,
2686961d8b69SVladimir Oltean 				    int lag)
2687961d8b69SVladimir Oltean {
2688961d8b69SVladimir Oltean 	struct ocelot_lag_fdb *fdb;
2689961d8b69SVladimir Oltean 	int err;
2690961d8b69SVladimir Oltean 
2691961d8b69SVladimir Oltean 	lockdep_assert_held(&ocelot->fwd_domain_lock);
2692961d8b69SVladimir Oltean 
2693961d8b69SVladimir Oltean 	list_for_each_entry(fdb, &ocelot->lag_fdbs, list) {
2694961d8b69SVladimir Oltean 		if (fdb->bond != bond)
2695961d8b69SVladimir Oltean 			continue;
2696961d8b69SVladimir Oltean 
2697961d8b69SVladimir Oltean 		err = ocelot_mact_forget(ocelot, fdb->addr, fdb->vid);
2698961d8b69SVladimir Oltean 		if (err) {
2699961d8b69SVladimir Oltean 			dev_err(ocelot->dev,
2700961d8b69SVladimir Oltean 				"failed to delete LAG %s FDB %pM vid %d: %pe\n",
2701961d8b69SVladimir Oltean 				bond->name, fdb->addr, fdb->vid, ERR_PTR(err));
2702961d8b69SVladimir Oltean 		}
2703961d8b69SVladimir Oltean 
2704961d8b69SVladimir Oltean 		err = ocelot_mact_learn(ocelot, lag, fdb->addr, fdb->vid,
2705961d8b69SVladimir Oltean 					ENTRYTYPE_LOCKED);
2706961d8b69SVladimir Oltean 		if (err) {
2707961d8b69SVladimir Oltean 			dev_err(ocelot->dev,
2708961d8b69SVladimir Oltean 				"failed to migrate LAG %s FDB %pM vid %d: %pe\n",
2709961d8b69SVladimir Oltean 				bond->name, fdb->addr, fdb->vid, ERR_PTR(err));
2710961d8b69SVladimir Oltean 		}
2711961d8b69SVladimir Oltean 	}
2712961d8b69SVladimir Oltean }
2713961d8b69SVladimir Oltean 
27149c90eea3SVladimir Oltean int ocelot_port_lag_join(struct ocelot *ocelot, int port,
2715583cbbe3SVladimir Oltean 			 struct net_device *bond,
2716583cbbe3SVladimir Oltean 			 struct netdev_lag_upper_info *info)
2717dc96ee37SAlexandre Belloni {
2718583cbbe3SVladimir Oltean 	if (info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
2719583cbbe3SVladimir Oltean 		return -EOPNOTSUPP;
2720583cbbe3SVladimir Oltean 
27218abe1970SVladimir Oltean 	mutex_lock(&ocelot->fwd_domain_lock);
27228abe1970SVladimir Oltean 
2723b80af659SVladimir Oltean 	ocelot->ports[port]->bond = bond;
2724dc96ee37SAlexandre Belloni 
27252527f2e8SVladimir Oltean 	ocelot_setup_logical_port_ids(ocelot);
27268abe1970SVladimir Oltean 	ocelot_apply_bridge_fwd_mask(ocelot, true);
2727dc96ee37SAlexandre Belloni 	ocelot_set_aggr_pgids(ocelot);
2728dc96ee37SAlexandre Belloni 
27298abe1970SVladimir Oltean 	mutex_unlock(&ocelot->fwd_domain_lock);
27308abe1970SVladimir Oltean 
2731dc96ee37SAlexandre Belloni 	return 0;
2732dc96ee37SAlexandre Belloni }
27339c90eea3SVladimir Oltean EXPORT_SYMBOL(ocelot_port_lag_join);
2734dc96ee37SAlexandre Belloni 
27359c90eea3SVladimir Oltean void ocelot_port_lag_leave(struct ocelot *ocelot, int port,
2736dc96ee37SAlexandre Belloni 			   struct net_device *bond)
2737dc96ee37SAlexandre Belloni {
2738961d8b69SVladimir Oltean 	int old_lag_id, new_lag_id;
2739961d8b69SVladimir Oltean 
27408abe1970SVladimir Oltean 	mutex_lock(&ocelot->fwd_domain_lock);
27418abe1970SVladimir Oltean 
2742961d8b69SVladimir Oltean 	old_lag_id = ocelot_bond_get_id(ocelot, bond);
2743961d8b69SVladimir Oltean 
2744b80af659SVladimir Oltean 	ocelot->ports[port]->bond = NULL;
2745b80af659SVladimir Oltean 
27462527f2e8SVladimir Oltean 	ocelot_setup_logical_port_ids(ocelot);
27478abe1970SVladimir Oltean 	ocelot_apply_bridge_fwd_mask(ocelot, false);
2748dc96ee37SAlexandre Belloni 	ocelot_set_aggr_pgids(ocelot);
27498abe1970SVladimir Oltean 
2750961d8b69SVladimir Oltean 	new_lag_id = ocelot_bond_get_id(ocelot, bond);
2751961d8b69SVladimir Oltean 
2752961d8b69SVladimir Oltean 	if (new_lag_id >= 0 && old_lag_id != new_lag_id)
2753961d8b69SVladimir Oltean 		ocelot_migrate_lag_fdbs(ocelot, bond, new_lag_id);
2754961d8b69SVladimir Oltean 
27558abe1970SVladimir Oltean 	mutex_unlock(&ocelot->fwd_domain_lock);
2756dc96ee37SAlexandre Belloni }
27579c90eea3SVladimir Oltean EXPORT_SYMBOL(ocelot_port_lag_leave);
27580e332c85SPetr Machata 
275923ca3b72SVladimir Oltean void ocelot_port_lag_change(struct ocelot *ocelot, int port, bool lag_tx_active)
276023ca3b72SVladimir Oltean {
276123ca3b72SVladimir Oltean 	struct ocelot_port *ocelot_port = ocelot->ports[port];
276223ca3b72SVladimir Oltean 
2763961d8b69SVladimir Oltean 	mutex_lock(&ocelot->fwd_domain_lock);
2764961d8b69SVladimir Oltean 
276523ca3b72SVladimir Oltean 	ocelot_port->lag_tx_active = lag_tx_active;
276623ca3b72SVladimir Oltean 
276723ca3b72SVladimir Oltean 	/* Rebalance the LAGs */
276823ca3b72SVladimir Oltean 	ocelot_set_aggr_pgids(ocelot);
2769961d8b69SVladimir Oltean 
2770961d8b69SVladimir Oltean 	mutex_unlock(&ocelot->fwd_domain_lock);
277123ca3b72SVladimir Oltean }
277223ca3b72SVladimir Oltean EXPORT_SYMBOL(ocelot_port_lag_change);
277323ca3b72SVladimir Oltean 
2774961d8b69SVladimir Oltean int ocelot_lag_fdb_add(struct ocelot *ocelot, struct net_device *bond,
277554c31984SVladimir Oltean 		       const unsigned char *addr, u16 vid,
277654c31984SVladimir Oltean 		       const struct net_device *bridge)
2777961d8b69SVladimir Oltean {
2778961d8b69SVladimir Oltean 	struct ocelot_lag_fdb *fdb;
2779961d8b69SVladimir Oltean 	int lag, err;
2780961d8b69SVladimir Oltean 
2781961d8b69SVladimir Oltean 	fdb = kzalloc(sizeof(*fdb), GFP_KERNEL);
2782961d8b69SVladimir Oltean 	if (!fdb)
2783961d8b69SVladimir Oltean 		return -ENOMEM;
2784961d8b69SVladimir Oltean 
278554c31984SVladimir Oltean 	mutex_lock(&ocelot->fwd_domain_lock);
278654c31984SVladimir Oltean 
278754c31984SVladimir Oltean 	if (!vid)
278854c31984SVladimir Oltean 		vid = ocelot_vlan_unaware_pvid(ocelot, bridge);
278954c31984SVladimir Oltean 
2790961d8b69SVladimir Oltean 	ether_addr_copy(fdb->addr, addr);
2791961d8b69SVladimir Oltean 	fdb->vid = vid;
2792961d8b69SVladimir Oltean 	fdb->bond = bond;
2793961d8b69SVladimir Oltean 
2794961d8b69SVladimir Oltean 	lag = ocelot_bond_get_id(ocelot, bond);
2795961d8b69SVladimir Oltean 
2796961d8b69SVladimir Oltean 	err = ocelot_mact_learn(ocelot, lag, addr, vid, ENTRYTYPE_LOCKED);
2797961d8b69SVladimir Oltean 	if (err) {
2798961d8b69SVladimir Oltean 		mutex_unlock(&ocelot->fwd_domain_lock);
2799961d8b69SVladimir Oltean 		kfree(fdb);
2800961d8b69SVladimir Oltean 		return err;
2801961d8b69SVladimir Oltean 	}
2802961d8b69SVladimir Oltean 
2803961d8b69SVladimir Oltean 	list_add_tail(&fdb->list, &ocelot->lag_fdbs);
2804961d8b69SVladimir Oltean 	mutex_unlock(&ocelot->fwd_domain_lock);
2805961d8b69SVladimir Oltean 
2806961d8b69SVladimir Oltean 	return 0;
2807961d8b69SVladimir Oltean }
2808961d8b69SVladimir Oltean EXPORT_SYMBOL_GPL(ocelot_lag_fdb_add);
2809961d8b69SVladimir Oltean 
2810961d8b69SVladimir Oltean int ocelot_lag_fdb_del(struct ocelot *ocelot, struct net_device *bond,
281154c31984SVladimir Oltean 		       const unsigned char *addr, u16 vid,
281254c31984SVladimir Oltean 		       const struct net_device *bridge)
2813961d8b69SVladimir Oltean {
2814961d8b69SVladimir Oltean 	struct ocelot_lag_fdb *fdb, *tmp;
2815961d8b69SVladimir Oltean 
2816961d8b69SVladimir Oltean 	mutex_lock(&ocelot->fwd_domain_lock);
2817961d8b69SVladimir Oltean 
281854c31984SVladimir Oltean 	if (!vid)
281954c31984SVladimir Oltean 		vid = ocelot_vlan_unaware_pvid(ocelot, bridge);
282054c31984SVladimir Oltean 
2821961d8b69SVladimir Oltean 	list_for_each_entry_safe(fdb, tmp, &ocelot->lag_fdbs, list) {
2822961d8b69SVladimir Oltean 		if (!ether_addr_equal(fdb->addr, addr) || fdb->vid != vid ||
2823961d8b69SVladimir Oltean 		    fdb->bond != bond)
2824961d8b69SVladimir Oltean 			continue;
2825961d8b69SVladimir Oltean 
2826961d8b69SVladimir Oltean 		ocelot_mact_forget(ocelot, addr, vid);
2827961d8b69SVladimir Oltean 		list_del(&fdb->list);
2828961d8b69SVladimir Oltean 		mutex_unlock(&ocelot->fwd_domain_lock);
2829961d8b69SVladimir Oltean 		kfree(fdb);
2830961d8b69SVladimir Oltean 
2831961d8b69SVladimir Oltean 		return 0;
2832961d8b69SVladimir Oltean 	}
2833961d8b69SVladimir Oltean 
2834961d8b69SVladimir Oltean 	mutex_unlock(&ocelot->fwd_domain_lock);
2835961d8b69SVladimir Oltean 
2836961d8b69SVladimir Oltean 	return -ENOENT;
2837961d8b69SVladimir Oltean }
2838961d8b69SVladimir Oltean EXPORT_SYMBOL_GPL(ocelot_lag_fdb_del);
2839961d8b69SVladimir Oltean 
2840a8015dedSVladimir Oltean /* Configure the maximum SDU (L2 payload) on RX to the value specified in @sdu.
2841a8015dedSVladimir Oltean  * The length of VLAN tags is accounted for automatically via DEV_MAC_TAGS_CFG.
28420b912fc9SVladimir Oltean  * In the special case that it's the NPI port that we're configuring, the
28430b912fc9SVladimir Oltean  * length of the tag and optional prefix needs to be accounted for privately,
28440b912fc9SVladimir Oltean  * in order to be able to sustain communication at the requested @sdu.
2845a8015dedSVladimir Oltean  */
28460b912fc9SVladimir Oltean void ocelot_port_set_maxlen(struct ocelot *ocelot, int port, size_t sdu)
284731350d7fSVladimir Oltean {
284831350d7fSVladimir Oltean 	struct ocelot_port *ocelot_port = ocelot->ports[port];
2849a8015dedSVladimir Oltean 	int maxlen = sdu + ETH_HLEN + ETH_FCS_LEN;
2850e8e6e73dSVladimir Oltean 	int pause_start, pause_stop;
2851601e984fSVladimir Oltean 	int atop, atop_tot;
285231350d7fSVladimir Oltean 
28530b912fc9SVladimir Oltean 	if (port == ocelot->npi) {
28540b912fc9SVladimir Oltean 		maxlen += OCELOT_TAG_LEN;
28550b912fc9SVladimir Oltean 
2856cacea62fSVladimir Oltean 		if (ocelot->npi_inj_prefix == OCELOT_TAG_PREFIX_SHORT)
28570b912fc9SVladimir Oltean 			maxlen += OCELOT_SHORT_PREFIX_LEN;
2858cacea62fSVladimir Oltean 		else if (ocelot->npi_inj_prefix == OCELOT_TAG_PREFIX_LONG)
28590b912fc9SVladimir Oltean 			maxlen += OCELOT_LONG_PREFIX_LEN;
28600b912fc9SVladimir Oltean 	}
28610b912fc9SVladimir Oltean 
2862a8015dedSVladimir Oltean 	ocelot_port_writel(ocelot_port, maxlen, DEV_MAC_MAXLEN_CFG);
2863fa914e9cSVladimir Oltean 
2864e8e6e73dSVladimir Oltean 	/* Set Pause watermark hysteresis */
2865e8e6e73dSVladimir Oltean 	pause_start = 6 * maxlen / OCELOT_BUFFER_CELL_SZ;
2866e8e6e73dSVladimir Oltean 	pause_stop = 4 * maxlen / OCELOT_BUFFER_CELL_SZ;
2867541132f0SMaxim Kochetkov 	ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_START,
2868541132f0SMaxim Kochetkov 			    pause_start);
2869541132f0SMaxim Kochetkov 	ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_STOP,
2870541132f0SMaxim Kochetkov 			    pause_stop);
2871fa914e9cSVladimir Oltean 
2872601e984fSVladimir Oltean 	/* Tail dropping watermarks */
2873f6fe01d6SVladimir Oltean 	atop_tot = (ocelot->packet_buffer_size - 9 * maxlen) /
2874a8015dedSVladimir Oltean 		   OCELOT_BUFFER_CELL_SZ;
2875601e984fSVladimir Oltean 	atop = (9 * maxlen) / OCELOT_BUFFER_CELL_SZ;
2876601e984fSVladimir Oltean 	ocelot_write_rix(ocelot, ocelot->ops->wm_enc(atop), SYS_ATOP, port);
2877601e984fSVladimir Oltean 	ocelot_write(ocelot, ocelot->ops->wm_enc(atop_tot), SYS_ATOP_TOT_CFG);
2878fa914e9cSVladimir Oltean }
28790b912fc9SVladimir Oltean EXPORT_SYMBOL(ocelot_port_set_maxlen);
28800b912fc9SVladimir Oltean 
28810b912fc9SVladimir Oltean int ocelot_get_max_mtu(struct ocelot *ocelot, int port)
28820b912fc9SVladimir Oltean {
28830b912fc9SVladimir Oltean 	int max_mtu = 65535 - ETH_HLEN - ETH_FCS_LEN;
28840b912fc9SVladimir Oltean 
28850b912fc9SVladimir Oltean 	if (port == ocelot->npi) {
28860b912fc9SVladimir Oltean 		max_mtu -= OCELOT_TAG_LEN;
28870b912fc9SVladimir Oltean 
2888cacea62fSVladimir Oltean 		if (ocelot->npi_inj_prefix == OCELOT_TAG_PREFIX_SHORT)
28890b912fc9SVladimir Oltean 			max_mtu -= OCELOT_SHORT_PREFIX_LEN;
2890cacea62fSVladimir Oltean 		else if (ocelot->npi_inj_prefix == OCELOT_TAG_PREFIX_LONG)
28910b912fc9SVladimir Oltean 			max_mtu -= OCELOT_LONG_PREFIX_LEN;
28920b912fc9SVladimir Oltean 	}
28930b912fc9SVladimir Oltean 
28940b912fc9SVladimir Oltean 	return max_mtu;
28950b912fc9SVladimir Oltean }
28960b912fc9SVladimir Oltean EXPORT_SYMBOL(ocelot_get_max_mtu);
2897fa914e9cSVladimir Oltean 
2898421741eaSVladimir Oltean static void ocelot_port_set_learning(struct ocelot *ocelot, int port,
2899421741eaSVladimir Oltean 				     bool enabled)
2900421741eaSVladimir Oltean {
2901421741eaSVladimir Oltean 	struct ocelot_port *ocelot_port = ocelot->ports[port];
2902421741eaSVladimir Oltean 	u32 val = 0;
2903421741eaSVladimir Oltean 
2904421741eaSVladimir Oltean 	if (enabled)
2905421741eaSVladimir Oltean 		val = ANA_PORT_PORT_CFG_LEARN_ENA;
2906421741eaSVladimir Oltean 
2907421741eaSVladimir Oltean 	ocelot_rmw_gix(ocelot, val, ANA_PORT_PORT_CFG_LEARN_ENA,
2908421741eaSVladimir Oltean 		       ANA_PORT_PORT_CFG, port);
2909421741eaSVladimir Oltean 
2910421741eaSVladimir Oltean 	ocelot_port->learn_ena = enabled;
2911421741eaSVladimir Oltean }
2912421741eaSVladimir Oltean 
2913421741eaSVladimir Oltean static void ocelot_port_set_ucast_flood(struct ocelot *ocelot, int port,
2914421741eaSVladimir Oltean 					bool enabled)
2915421741eaSVladimir Oltean {
2916421741eaSVladimir Oltean 	u32 val = 0;
2917421741eaSVladimir Oltean 
2918421741eaSVladimir Oltean 	if (enabled)
2919421741eaSVladimir Oltean 		val = BIT(port);
2920421741eaSVladimir Oltean 
2921421741eaSVladimir Oltean 	ocelot_rmw_rix(ocelot, val, BIT(port), ANA_PGID_PGID, PGID_UC);
2922421741eaSVladimir Oltean }
2923421741eaSVladimir Oltean 
2924421741eaSVladimir Oltean static void ocelot_port_set_mcast_flood(struct ocelot *ocelot, int port,
2925421741eaSVladimir Oltean 					bool enabled)
2926421741eaSVladimir Oltean {
2927421741eaSVladimir Oltean 	u32 val = 0;
2928421741eaSVladimir Oltean 
2929421741eaSVladimir Oltean 	if (enabled)
2930421741eaSVladimir Oltean 		val = BIT(port);
2931421741eaSVladimir Oltean 
2932421741eaSVladimir Oltean 	ocelot_rmw_rix(ocelot, val, BIT(port), ANA_PGID_PGID, PGID_MC);
29334cf35a2bSVladimir Oltean 	ocelot_rmw_rix(ocelot, val, BIT(port), ANA_PGID_PGID, PGID_MCIPV4);
29344cf35a2bSVladimir Oltean 	ocelot_rmw_rix(ocelot, val, BIT(port), ANA_PGID_PGID, PGID_MCIPV6);
2935421741eaSVladimir Oltean }
2936421741eaSVladimir Oltean 
2937421741eaSVladimir Oltean static void ocelot_port_set_bcast_flood(struct ocelot *ocelot, int port,
2938421741eaSVladimir Oltean 					bool enabled)
2939421741eaSVladimir Oltean {
2940421741eaSVladimir Oltean 	u32 val = 0;
2941421741eaSVladimir Oltean 
2942421741eaSVladimir Oltean 	if (enabled)
2943421741eaSVladimir Oltean 		val = BIT(port);
2944421741eaSVladimir Oltean 
2945421741eaSVladimir Oltean 	ocelot_rmw_rix(ocelot, val, BIT(port), ANA_PGID_PGID, PGID_BC);
2946421741eaSVladimir Oltean }
2947421741eaSVladimir Oltean 
2948421741eaSVladimir Oltean int ocelot_port_pre_bridge_flags(struct ocelot *ocelot, int port,
2949421741eaSVladimir Oltean 				 struct switchdev_brport_flags flags)
2950421741eaSVladimir Oltean {
2951421741eaSVladimir Oltean 	if (flags.mask & ~(BR_LEARNING | BR_FLOOD | BR_MCAST_FLOOD |
2952421741eaSVladimir Oltean 			   BR_BCAST_FLOOD))
2953421741eaSVladimir Oltean 		return -EINVAL;
2954421741eaSVladimir Oltean 
2955421741eaSVladimir Oltean 	return 0;
2956421741eaSVladimir Oltean }
2957421741eaSVladimir Oltean EXPORT_SYMBOL(ocelot_port_pre_bridge_flags);
2958421741eaSVladimir Oltean 
2959421741eaSVladimir Oltean void ocelot_port_bridge_flags(struct ocelot *ocelot, int port,
2960421741eaSVladimir Oltean 			      struct switchdev_brport_flags flags)
2961421741eaSVladimir Oltean {
2962ac455209SVladimir Oltean 	if (port == ocelot->npi)
2963ac455209SVladimir Oltean 		port = ocelot->num_phys_ports;
2964ac455209SVladimir Oltean 
2965421741eaSVladimir Oltean 	if (flags.mask & BR_LEARNING)
2966421741eaSVladimir Oltean 		ocelot_port_set_learning(ocelot, port,
2967421741eaSVladimir Oltean 					 !!(flags.val & BR_LEARNING));
2968421741eaSVladimir Oltean 
2969421741eaSVladimir Oltean 	if (flags.mask & BR_FLOOD)
2970421741eaSVladimir Oltean 		ocelot_port_set_ucast_flood(ocelot, port,
2971421741eaSVladimir Oltean 					    !!(flags.val & BR_FLOOD));
2972421741eaSVladimir Oltean 
2973421741eaSVladimir Oltean 	if (flags.mask & BR_MCAST_FLOOD)
2974421741eaSVladimir Oltean 		ocelot_port_set_mcast_flood(ocelot, port,
2975421741eaSVladimir Oltean 					    !!(flags.val & BR_MCAST_FLOOD));
2976421741eaSVladimir Oltean 
2977421741eaSVladimir Oltean 	if (flags.mask & BR_BCAST_FLOOD)
2978421741eaSVladimir Oltean 		ocelot_port_set_bcast_flood(ocelot, port,
2979421741eaSVladimir Oltean 					    !!(flags.val & BR_BCAST_FLOOD));
2980421741eaSVladimir Oltean }
2981421741eaSVladimir Oltean EXPORT_SYMBOL(ocelot_port_bridge_flags);
2982421741eaSVladimir Oltean 
2983978777d0SVladimir Oltean int ocelot_port_get_default_prio(struct ocelot *ocelot, int port)
2984978777d0SVladimir Oltean {
2985978777d0SVladimir Oltean 	int val = ocelot_read_gix(ocelot, ANA_PORT_QOS_CFG, port);
2986978777d0SVladimir Oltean 
2987978777d0SVladimir Oltean 	return ANA_PORT_QOS_CFG_QOS_DEFAULT_VAL_X(val);
2988978777d0SVladimir Oltean }
2989978777d0SVladimir Oltean EXPORT_SYMBOL_GPL(ocelot_port_get_default_prio);
2990978777d0SVladimir Oltean 
2991978777d0SVladimir Oltean int ocelot_port_set_default_prio(struct ocelot *ocelot, int port, u8 prio)
2992978777d0SVladimir Oltean {
299372f56fdbSVladimir Oltean 	if (prio >= OCELOT_NUM_TC)
2994978777d0SVladimir Oltean 		return -ERANGE;
2995978777d0SVladimir Oltean 
2996978777d0SVladimir Oltean 	ocelot_rmw_gix(ocelot,
2997978777d0SVladimir Oltean 		       ANA_PORT_QOS_CFG_QOS_DEFAULT_VAL(prio),
2998978777d0SVladimir Oltean 		       ANA_PORT_QOS_CFG_QOS_DEFAULT_VAL_M,
2999978777d0SVladimir Oltean 		       ANA_PORT_QOS_CFG,
3000978777d0SVladimir Oltean 		       port);
3001978777d0SVladimir Oltean 
3002978777d0SVladimir Oltean 	return 0;
3003978777d0SVladimir Oltean }
3004978777d0SVladimir Oltean EXPORT_SYMBOL_GPL(ocelot_port_set_default_prio);
3005978777d0SVladimir Oltean 
3006978777d0SVladimir Oltean int ocelot_port_get_dscp_prio(struct ocelot *ocelot, int port, u8 dscp)
3007978777d0SVladimir Oltean {
3008978777d0SVladimir Oltean 	int qos_cfg = ocelot_read_gix(ocelot, ANA_PORT_QOS_CFG, port);
3009978777d0SVladimir Oltean 	int dscp_cfg = ocelot_read_rix(ocelot, ANA_DSCP_CFG, dscp);
3010978777d0SVladimir Oltean 
3011978777d0SVladimir Oltean 	/* Return error if DSCP prioritization isn't enabled */
3012978777d0SVladimir Oltean 	if (!(qos_cfg & ANA_PORT_QOS_CFG_QOS_DSCP_ENA))
3013978777d0SVladimir Oltean 		return -EOPNOTSUPP;
3014978777d0SVladimir Oltean 
3015978777d0SVladimir Oltean 	if (qos_cfg & ANA_PORT_QOS_CFG_DSCP_TRANSLATE_ENA) {
3016978777d0SVladimir Oltean 		dscp = ANA_DSCP_CFG_DSCP_TRANSLATE_VAL_X(dscp_cfg);
3017978777d0SVladimir Oltean 		/* Re-read ANA_DSCP_CFG for the translated DSCP */
3018978777d0SVladimir Oltean 		dscp_cfg = ocelot_read_rix(ocelot, ANA_DSCP_CFG, dscp);
3019978777d0SVladimir Oltean 	}
3020978777d0SVladimir Oltean 
3021978777d0SVladimir Oltean 	/* If the DSCP value is not trusted, the QoS classification falls back
3022978777d0SVladimir Oltean 	 * to VLAN PCP or port-based default.
3023978777d0SVladimir Oltean 	 */
3024978777d0SVladimir Oltean 	if (!(dscp_cfg & ANA_DSCP_CFG_DSCP_TRUST_ENA))
3025978777d0SVladimir Oltean 		return -EOPNOTSUPP;
3026978777d0SVladimir Oltean 
3027978777d0SVladimir Oltean 	return ANA_DSCP_CFG_QOS_DSCP_VAL_X(dscp_cfg);
3028978777d0SVladimir Oltean }
3029978777d0SVladimir Oltean EXPORT_SYMBOL_GPL(ocelot_port_get_dscp_prio);
3030978777d0SVladimir Oltean 
3031978777d0SVladimir Oltean int ocelot_port_add_dscp_prio(struct ocelot *ocelot, int port, u8 dscp, u8 prio)
3032978777d0SVladimir Oltean {
3033978777d0SVladimir Oltean 	int mask, val;
3034978777d0SVladimir Oltean 
303572f56fdbSVladimir Oltean 	if (prio >= OCELOT_NUM_TC)
3036978777d0SVladimir Oltean 		return -ERANGE;
3037978777d0SVladimir Oltean 
3038978777d0SVladimir Oltean 	/* There is at least one app table priority (this one), so we need to
3039978777d0SVladimir Oltean 	 * make sure DSCP prioritization is enabled on the port.
3040978777d0SVladimir Oltean 	 * Also make sure DSCP translation is disabled
3041978777d0SVladimir Oltean 	 * (dcbnl doesn't support it).
3042978777d0SVladimir Oltean 	 */
3043978777d0SVladimir Oltean 	mask = ANA_PORT_QOS_CFG_QOS_DSCP_ENA |
3044978777d0SVladimir Oltean 	       ANA_PORT_QOS_CFG_DSCP_TRANSLATE_ENA;
3045978777d0SVladimir Oltean 
3046978777d0SVladimir Oltean 	ocelot_rmw_gix(ocelot, ANA_PORT_QOS_CFG_QOS_DSCP_ENA, mask,
3047978777d0SVladimir Oltean 		       ANA_PORT_QOS_CFG, port);
3048978777d0SVladimir Oltean 
3049978777d0SVladimir Oltean 	/* Trust this DSCP value and map it to the given QoS class */
3050978777d0SVladimir Oltean 	val = ANA_DSCP_CFG_DSCP_TRUST_ENA | ANA_DSCP_CFG_QOS_DSCP_VAL(prio);
3051978777d0SVladimir Oltean 
3052978777d0SVladimir Oltean 	ocelot_write_rix(ocelot, val, ANA_DSCP_CFG, dscp);
3053978777d0SVladimir Oltean 
3054978777d0SVladimir Oltean 	return 0;
3055978777d0SVladimir Oltean }
3056978777d0SVladimir Oltean EXPORT_SYMBOL_GPL(ocelot_port_add_dscp_prio);
3057978777d0SVladimir Oltean 
3058978777d0SVladimir Oltean int ocelot_port_del_dscp_prio(struct ocelot *ocelot, int port, u8 dscp, u8 prio)
3059978777d0SVladimir Oltean {
3060978777d0SVladimir Oltean 	int dscp_cfg = ocelot_read_rix(ocelot, ANA_DSCP_CFG, dscp);
3061978777d0SVladimir Oltean 	int mask, i;
3062978777d0SVladimir Oltean 
3063978777d0SVladimir Oltean 	/* During a "dcb app replace" command, the new app table entry will be
3064978777d0SVladimir Oltean 	 * added first, then the old one will be deleted. But the hardware only
3065978777d0SVladimir Oltean 	 * supports one QoS class per DSCP value (duh), so if we blindly delete
3066978777d0SVladimir Oltean 	 * the app table entry for this DSCP value, we end up deleting the
3067978777d0SVladimir Oltean 	 * entry with the new priority. Avoid that by checking whether user
3068978777d0SVladimir Oltean 	 * space wants to delete the priority which is currently configured, or
3069978777d0SVladimir Oltean 	 * something else which is no longer current.
3070978777d0SVladimir Oltean 	 */
3071978777d0SVladimir Oltean 	if (ANA_DSCP_CFG_QOS_DSCP_VAL_X(dscp_cfg) != prio)
3072978777d0SVladimir Oltean 		return 0;
3073978777d0SVladimir Oltean 
3074978777d0SVladimir Oltean 	/* Untrust this DSCP value */
3075978777d0SVladimir Oltean 	ocelot_write_rix(ocelot, 0, ANA_DSCP_CFG, dscp);
3076978777d0SVladimir Oltean 
3077978777d0SVladimir Oltean 	for (i = 0; i < 64; i++) {
3078978777d0SVladimir Oltean 		int dscp_cfg = ocelot_read_rix(ocelot, ANA_DSCP_CFG, i);
3079978777d0SVladimir Oltean 
3080978777d0SVladimir Oltean 		/* There are still app table entries on the port, so we need to
3081978777d0SVladimir Oltean 		 * keep DSCP enabled, nothing to do.
3082978777d0SVladimir Oltean 		 */
3083978777d0SVladimir Oltean 		if (dscp_cfg & ANA_DSCP_CFG_DSCP_TRUST_ENA)
3084978777d0SVladimir Oltean 			return 0;
3085978777d0SVladimir Oltean 	}
3086978777d0SVladimir Oltean 
3087978777d0SVladimir Oltean 	/* Disable DSCP QoS classification if there isn't any trusted
3088978777d0SVladimir Oltean 	 * DSCP value left.
3089978777d0SVladimir Oltean 	 */
3090978777d0SVladimir Oltean 	mask = ANA_PORT_QOS_CFG_QOS_DSCP_ENA |
3091978777d0SVladimir Oltean 	       ANA_PORT_QOS_CFG_DSCP_TRANSLATE_ENA;
3092978777d0SVladimir Oltean 
3093978777d0SVladimir Oltean 	ocelot_rmw_gix(ocelot, 0, mask, ANA_PORT_QOS_CFG, port);
3094978777d0SVladimir Oltean 
3095978777d0SVladimir Oltean 	return 0;
3096978777d0SVladimir Oltean }
3097978777d0SVladimir Oltean EXPORT_SYMBOL_GPL(ocelot_port_del_dscp_prio);
3098978777d0SVladimir Oltean 
3099f2a0e216SVladimir Oltean struct ocelot_mirror *ocelot_mirror_get(struct ocelot *ocelot, int to,
3100ccb6ed42SVladimir Oltean 					struct netlink_ext_ack *extack)
3101ccb6ed42SVladimir Oltean {
3102ccb6ed42SVladimir Oltean 	struct ocelot_mirror *m = ocelot->mirror;
3103ccb6ed42SVladimir Oltean 
3104ccb6ed42SVladimir Oltean 	if (m) {
3105ccb6ed42SVladimir Oltean 		if (m->to != to) {
3106ccb6ed42SVladimir Oltean 			NL_SET_ERR_MSG_MOD(extack,
3107ccb6ed42SVladimir Oltean 					   "Mirroring already configured towards different egress port");
3108ccb6ed42SVladimir Oltean 			return ERR_PTR(-EBUSY);
3109ccb6ed42SVladimir Oltean 		}
3110ccb6ed42SVladimir Oltean 
3111ccb6ed42SVladimir Oltean 		refcount_inc(&m->refcount);
3112ccb6ed42SVladimir Oltean 		return m;
3113ccb6ed42SVladimir Oltean 	}
3114ccb6ed42SVladimir Oltean 
3115ccb6ed42SVladimir Oltean 	m = kzalloc(sizeof(*m), GFP_KERNEL);
3116ccb6ed42SVladimir Oltean 	if (!m)
3117ccb6ed42SVladimir Oltean 		return ERR_PTR(-ENOMEM);
3118ccb6ed42SVladimir Oltean 
3119ccb6ed42SVladimir Oltean 	m->to = to;
3120ccb6ed42SVladimir Oltean 	refcount_set(&m->refcount, 1);
3121ccb6ed42SVladimir Oltean 	ocelot->mirror = m;
3122ccb6ed42SVladimir Oltean 
3123ccb6ed42SVladimir Oltean 	/* Program the mirror port to hardware */
3124ccb6ed42SVladimir Oltean 	ocelot_write(ocelot, BIT(to), ANA_MIRRORPORTS);
3125ccb6ed42SVladimir Oltean 
3126ccb6ed42SVladimir Oltean 	return m;
3127ccb6ed42SVladimir Oltean }
3128ccb6ed42SVladimir Oltean 
3129f2a0e216SVladimir Oltean void ocelot_mirror_put(struct ocelot *ocelot)
3130ccb6ed42SVladimir Oltean {
3131ccb6ed42SVladimir Oltean 	struct ocelot_mirror *m = ocelot->mirror;
3132ccb6ed42SVladimir Oltean 
3133ccb6ed42SVladimir Oltean 	if (!refcount_dec_and_test(&m->refcount))
3134ccb6ed42SVladimir Oltean 		return;
3135ccb6ed42SVladimir Oltean 
3136ccb6ed42SVladimir Oltean 	ocelot_write(ocelot, 0, ANA_MIRRORPORTS);
3137ccb6ed42SVladimir Oltean 	ocelot->mirror = NULL;
3138ccb6ed42SVladimir Oltean 	kfree(m);
3139ccb6ed42SVladimir Oltean }
3140ccb6ed42SVladimir Oltean 
3141ccb6ed42SVladimir Oltean int ocelot_port_mirror_add(struct ocelot *ocelot, int from, int to,
3142ccb6ed42SVladimir Oltean 			   bool ingress, struct netlink_ext_ack *extack)
3143ccb6ed42SVladimir Oltean {
3144ccb6ed42SVladimir Oltean 	struct ocelot_mirror *m = ocelot_mirror_get(ocelot, to, extack);
3145ccb6ed42SVladimir Oltean 
3146ccb6ed42SVladimir Oltean 	if (IS_ERR(m))
3147ccb6ed42SVladimir Oltean 		return PTR_ERR(m);
3148ccb6ed42SVladimir Oltean 
3149ccb6ed42SVladimir Oltean 	if (ingress) {
3150ccb6ed42SVladimir Oltean 		ocelot_rmw_gix(ocelot, ANA_PORT_PORT_CFG_SRC_MIRROR_ENA,
3151ccb6ed42SVladimir Oltean 			       ANA_PORT_PORT_CFG_SRC_MIRROR_ENA,
3152ccb6ed42SVladimir Oltean 			       ANA_PORT_PORT_CFG, from);
3153ccb6ed42SVladimir Oltean 	} else {
3154ccb6ed42SVladimir Oltean 		ocelot_rmw(ocelot, BIT(from), BIT(from),
3155ccb6ed42SVladimir Oltean 			   ANA_EMIRRORPORTS);
3156ccb6ed42SVladimir Oltean 	}
3157ccb6ed42SVladimir Oltean 
3158ccb6ed42SVladimir Oltean 	return 0;
3159ccb6ed42SVladimir Oltean }
3160ccb6ed42SVladimir Oltean EXPORT_SYMBOL_GPL(ocelot_port_mirror_add);
3161ccb6ed42SVladimir Oltean 
3162ccb6ed42SVladimir Oltean void ocelot_port_mirror_del(struct ocelot *ocelot, int from, bool ingress)
3163ccb6ed42SVladimir Oltean {
3164ccb6ed42SVladimir Oltean 	if (ingress) {
3165ccb6ed42SVladimir Oltean 		ocelot_rmw_gix(ocelot, 0, ANA_PORT_PORT_CFG_SRC_MIRROR_ENA,
3166ccb6ed42SVladimir Oltean 			       ANA_PORT_PORT_CFG, from);
3167ccb6ed42SVladimir Oltean 	} else {
3168ccb6ed42SVladimir Oltean 		ocelot_rmw(ocelot, 0, BIT(from), ANA_EMIRRORPORTS);
3169ccb6ed42SVladimir Oltean 	}
3170ccb6ed42SVladimir Oltean 
3171ccb6ed42SVladimir Oltean 	ocelot_mirror_put(ocelot);
3172ccb6ed42SVladimir Oltean }
3173ccb6ed42SVladimir Oltean EXPORT_SYMBOL_GPL(ocelot_port_mirror_del);
3174ccb6ed42SVladimir Oltean 
31755e256365SVladimir Oltean void ocelot_init_port(struct ocelot *ocelot, int port)
3176fa914e9cSVladimir Oltean {
3177fa914e9cSVladimir Oltean 	struct ocelot_port *ocelot_port = ocelot->ports[port];
3178fa914e9cSVladimir Oltean 
3179b049da13SYangbo Lu 	skb_queue_head_init(&ocelot_port->tx_skbs);
318031350d7fSVladimir Oltean 
318131350d7fSVladimir Oltean 	/* Basic L2 initialization */
318231350d7fSVladimir Oltean 
31835bc9d2e6SVladimir Oltean 	/* Set MAC IFG Gaps
31845bc9d2e6SVladimir Oltean 	 * FDX: TX_IFG = 5, RX_IFG1 = RX_IFG2 = 0
31855bc9d2e6SVladimir Oltean 	 * !FDX: TX_IFG = 5, RX_IFG1 = RX_IFG2 = 5
31865bc9d2e6SVladimir Oltean 	 */
31875bc9d2e6SVladimir Oltean 	ocelot_port_writel(ocelot_port, DEV_MAC_IFG_CFG_TX_IFG(5),
31885bc9d2e6SVladimir Oltean 			   DEV_MAC_IFG_CFG);
31895bc9d2e6SVladimir Oltean 
31905bc9d2e6SVladimir Oltean 	/* Load seed (0) and set MAC HDX late collision  */
31915bc9d2e6SVladimir Oltean 	ocelot_port_writel(ocelot_port, DEV_MAC_HDX_CFG_LATE_COL_POS(67) |
31925bc9d2e6SVladimir Oltean 			   DEV_MAC_HDX_CFG_SEED_LOAD,
31935bc9d2e6SVladimir Oltean 			   DEV_MAC_HDX_CFG);
31945bc9d2e6SVladimir Oltean 	mdelay(1);
31955bc9d2e6SVladimir Oltean 	ocelot_port_writel(ocelot_port, DEV_MAC_HDX_CFG_LATE_COL_POS(67),
31965bc9d2e6SVladimir Oltean 			   DEV_MAC_HDX_CFG);
31975bc9d2e6SVladimir Oltean 
31985bc9d2e6SVladimir Oltean 	/* Set Max Length and maximum tags allowed */
3199a8015dedSVladimir Oltean 	ocelot_port_set_maxlen(ocelot, port, ETH_DATA_LEN);
32005bc9d2e6SVladimir Oltean 	ocelot_port_writel(ocelot_port, DEV_MAC_TAGS_CFG_TAG_ID(ETH_P_8021AD) |
32015bc9d2e6SVladimir Oltean 			   DEV_MAC_TAGS_CFG_VLAN_AWR_ENA |
3202a8015dedSVladimir Oltean 			   DEV_MAC_TAGS_CFG_VLAN_DBL_AWR_ENA |
32035bc9d2e6SVladimir Oltean 			   DEV_MAC_TAGS_CFG_VLAN_LEN_AWR_ENA,
32045bc9d2e6SVladimir Oltean 			   DEV_MAC_TAGS_CFG);
32055bc9d2e6SVladimir Oltean 
32065bc9d2e6SVladimir Oltean 	/* Set SMAC of Pause frame (00:00:00:00:00:00) */
32075bc9d2e6SVladimir Oltean 	ocelot_port_writel(ocelot_port, 0, DEV_MAC_FC_MAC_HIGH_CFG);
32085bc9d2e6SVladimir Oltean 	ocelot_port_writel(ocelot_port, 0, DEV_MAC_FC_MAC_LOW_CFG);
32095bc9d2e6SVladimir Oltean 
3210e8e6e73dSVladimir Oltean 	/* Enable transmission of pause frames */
3211541132f0SMaxim Kochetkov 	ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA, 1);
3212e8e6e73dSVladimir Oltean 
321331350d7fSVladimir Oltean 	/* Drop frames with multicast source address */
321431350d7fSVladimir Oltean 	ocelot_rmw_gix(ocelot, ANA_PORT_DROP_CFG_DROP_MC_SMAC_ENA,
321531350d7fSVladimir Oltean 		       ANA_PORT_DROP_CFG_DROP_MC_SMAC_ENA,
321631350d7fSVladimir Oltean 		       ANA_PORT_DROP_CFG, port);
321731350d7fSVladimir Oltean 
321831350d7fSVladimir Oltean 	/* Set default VLAN and tag type to 8021Q. */
321931350d7fSVladimir Oltean 	ocelot_rmw_gix(ocelot, REW_PORT_VLAN_CFG_PORT_TPID(ETH_P_8021Q),
322031350d7fSVladimir Oltean 		       REW_PORT_VLAN_CFG_PORT_TPID_M,
322131350d7fSVladimir Oltean 		       REW_PORT_VLAN_CFG, port);
322231350d7fSVladimir Oltean 
3223421741eaSVladimir Oltean 	/* Disable source address learning for standalone mode */
3224421741eaSVladimir Oltean 	ocelot_port_set_learning(ocelot, port, false);
3225421741eaSVladimir Oltean 
322646efe4efSVladimir Oltean 	/* Set the port's initial logical port ID value, enable receiving
322746efe4efSVladimir Oltean 	 * frames on it, and configure the MAC address learning type to
322846efe4efSVladimir Oltean 	 * automatic.
322946efe4efSVladimir Oltean 	 */
323046efe4efSVladimir Oltean 	ocelot_write_gix(ocelot, ANA_PORT_PORT_CFG_LEARNAUTO |
323146efe4efSVladimir Oltean 			 ANA_PORT_PORT_CFG_RECV_ENA |
323246efe4efSVladimir Oltean 			 ANA_PORT_PORT_CFG_PORTID_VAL(port),
323346efe4efSVladimir Oltean 			 ANA_PORT_PORT_CFG, port);
323446efe4efSVladimir Oltean 
323531350d7fSVladimir Oltean 	/* Enable vcap lookups */
323631350d7fSVladimir Oltean 	ocelot_vcap_enable(ocelot, port);
323731350d7fSVladimir Oltean }
32385e256365SVladimir Oltean EXPORT_SYMBOL(ocelot_init_port);
323931350d7fSVladimir Oltean 
32402d44b097SVladimir Oltean /* Configure and enable the CPU port module, which is a set of queues
32412d44b097SVladimir Oltean  * accessible through register MMIO, frame DMA or Ethernet (in case
32422d44b097SVladimir Oltean  * NPI mode is used).
324369df578cSVladimir Oltean  */
32442d44b097SVladimir Oltean static void ocelot_cpu_port_init(struct ocelot *ocelot)
324521468199SVladimir Oltean {
324669df578cSVladimir Oltean 	int cpu = ocelot->num_phys_ports;
324769df578cSVladimir Oltean 
324869df578cSVladimir Oltean 	/* The unicast destination PGID for the CPU port module is unused */
324921468199SVladimir Oltean 	ocelot_write_rix(ocelot, 0, ANA_PGID_PGID, cpu);
325069df578cSVladimir Oltean 	/* Instead set up a multicast destination PGID for traffic copied to
325169df578cSVladimir Oltean 	 * the CPU. Whitelisted MAC addresses like the port netdevice MAC
325269df578cSVladimir Oltean 	 * addresses will be copied to the CPU via this PGID.
325369df578cSVladimir Oltean 	 */
325421468199SVladimir Oltean 	ocelot_write_rix(ocelot, BIT(cpu), ANA_PGID_PGID, PGID_CPU);
325521468199SVladimir Oltean 	ocelot_write_gix(ocelot, ANA_PORT_PORT_CFG_RECV_ENA |
325621468199SVladimir Oltean 			 ANA_PORT_PORT_CFG_PORTID_VAL(cpu),
325721468199SVladimir Oltean 			 ANA_PORT_PORT_CFG, cpu);
325821468199SVladimir Oltean 
325969df578cSVladimir Oltean 	/* Enable CPU port module */
3260886e1387SVladimir Oltean 	ocelot_fields_write(ocelot, cpu, QSYS_SWITCH_PORT_MODE_PORT_ENA, 1);
326169df578cSVladimir Oltean 	/* CPU port Injection/Extraction configuration */
3262886e1387SVladimir Oltean 	ocelot_fields_write(ocelot, cpu, SYS_PORT_MODE_INCL_XTR_HDR,
3263cacea62fSVladimir Oltean 			    OCELOT_TAG_PREFIX_NONE);
3264886e1387SVladimir Oltean 	ocelot_fields_write(ocelot, cpu, SYS_PORT_MODE_INCL_INJ_HDR,
3265cacea62fSVladimir Oltean 			    OCELOT_TAG_PREFIX_NONE);
326621468199SVladimir Oltean 
326721468199SVladimir Oltean 	/* Configure the CPU port to be VLAN aware */
3268bfbab310SVladimir Oltean 	ocelot_write_gix(ocelot,
326954c31984SVladimir Oltean 			 ANA_PORT_VLAN_CFG_VLAN_VID(OCELOT_STANDALONE_PVID) |
327021468199SVladimir Oltean 			 ANA_PORT_VLAN_CFG_VLAN_AWARE_ENA |
327121468199SVladimir Oltean 			 ANA_PORT_VLAN_CFG_VLAN_POP_CNT(1),
327221468199SVladimir Oltean 			 ANA_PORT_VLAN_CFG, cpu);
327321468199SVladimir Oltean }
327421468199SVladimir Oltean 
3275f6fe01d6SVladimir Oltean static void ocelot_detect_features(struct ocelot *ocelot)
3276f6fe01d6SVladimir Oltean {
3277f6fe01d6SVladimir Oltean 	int mmgt, eq_ctrl;
3278f6fe01d6SVladimir Oltean 
3279f6fe01d6SVladimir Oltean 	/* For Ocelot, Felix, Seville, Serval etc, SYS:MMGT:MMGT:FREECNT holds
3280f6fe01d6SVladimir Oltean 	 * the number of 240-byte free memory words (aka 4-cell chunks) and not
3281f6fe01d6SVladimir Oltean 	 * 192 bytes as the documentation incorrectly says.
3282f6fe01d6SVladimir Oltean 	 */
3283f6fe01d6SVladimir Oltean 	mmgt = ocelot_read(ocelot, SYS_MMGT);
3284f6fe01d6SVladimir Oltean 	ocelot->packet_buffer_size = 240 * SYS_MMGT_FREECNT(mmgt);
3285f6fe01d6SVladimir Oltean 
3286f6fe01d6SVladimir Oltean 	eq_ctrl = ocelot_read(ocelot, QSYS_EQ_CTRL);
3287f6fe01d6SVladimir Oltean 	ocelot->num_frame_refs = QSYS_MMGT_EQ_CTRL_FP_FREE_CNT(eq_ctrl);
3288f6fe01d6SVladimir Oltean }
3289f6fe01d6SVladimir Oltean 
3290a556c76aSAlexandre Belloni int ocelot_init(struct ocelot *ocelot)
3291a556c76aSAlexandre Belloni {
32922f187bfaSColin Foster 	const struct ocelot_stat_layout *stat;
3293a556c76aSAlexandre Belloni 	char queue_name[32];
329421468199SVladimir Oltean 	int i, ret;
329521468199SVladimir Oltean 	u32 port;
3296a556c76aSAlexandre Belloni 
32973a77b593SVladimir Oltean 	if (ocelot->ops->reset) {
32983a77b593SVladimir Oltean 		ret = ocelot->ops->reset(ocelot);
32993a77b593SVladimir Oltean 		if (ret) {
33003a77b593SVladimir Oltean 			dev_err(ocelot->dev, "Switch reset failed\n");
33013a77b593SVladimir Oltean 			return ret;
33023a77b593SVladimir Oltean 		}
33033a77b593SVladimir Oltean 	}
33043a77b593SVladimir Oltean 
33052f187bfaSColin Foster 	ocelot->num_stats = 0;
33062f187bfaSColin Foster 	for_each_stat(ocelot, stat)
33072f187bfaSColin Foster 		ocelot->num_stats++;
33082f187bfaSColin Foster 
3309a556c76aSAlexandre Belloni 	ocelot->stats = devm_kcalloc(ocelot->dev,
3310a556c76aSAlexandre Belloni 				     ocelot->num_phys_ports * ocelot->num_stats,
3311a556c76aSAlexandre Belloni 				     sizeof(u64), GFP_KERNEL);
3312a556c76aSAlexandre Belloni 	if (!ocelot->stats)
3313a556c76aSAlexandre Belloni 		return -ENOMEM;
3314a556c76aSAlexandre Belloni 
3315a556c76aSAlexandre Belloni 	mutex_init(&ocelot->stats_lock);
33164e3b0468SAntoine Tenart 	mutex_init(&ocelot->ptp_lock);
33172468346cSVladimir Oltean 	mutex_init(&ocelot->mact_lock);
33188abe1970SVladimir Oltean 	mutex_init(&ocelot->fwd_domain_lock);
33194e3b0468SAntoine Tenart 	spin_lock_init(&ocelot->ptp_clock_lock);
332052849bcfSVladimir Oltean 	spin_lock_init(&ocelot->ts_id_lock);
3321a556c76aSAlexandre Belloni 	snprintf(queue_name, sizeof(queue_name), "%s-stats",
3322a556c76aSAlexandre Belloni 		 dev_name(ocelot->dev));
3323a556c76aSAlexandre Belloni 	ocelot->stats_queue = create_singlethread_workqueue(queue_name);
3324a556c76aSAlexandre Belloni 	if (!ocelot->stats_queue)
3325a556c76aSAlexandre Belloni 		return -ENOMEM;
3326a556c76aSAlexandre Belloni 
3327ca0b272bSVladimir Oltean 	ocelot->owq = alloc_ordered_workqueue("ocelot-owq", 0);
3328ca0b272bSVladimir Oltean 	if (!ocelot->owq) {
3329ca0b272bSVladimir Oltean 		destroy_workqueue(ocelot->stats_queue);
3330ca0b272bSVladimir Oltean 		return -ENOMEM;
3331ca0b272bSVladimir Oltean 	}
3332ca0b272bSVladimir Oltean 
33332b120ddeSClaudiu Manoil 	INIT_LIST_HEAD(&ocelot->multicast);
3334e5d1f896SVladimir Oltean 	INIT_LIST_HEAD(&ocelot->pgids);
333590e0aa8dSVladimir Oltean 	INIT_LIST_HEAD(&ocelot->vlans);
3336961d8b69SVladimir Oltean 	INIT_LIST_HEAD(&ocelot->lag_fdbs);
3337f6fe01d6SVladimir Oltean 	ocelot_detect_features(ocelot);
3338a556c76aSAlexandre Belloni 	ocelot_mact_init(ocelot);
3339a556c76aSAlexandre Belloni 	ocelot_vlan_init(ocelot);
3340aae4e500SVladimir Oltean 	ocelot_vcap_init(ocelot);
33412d44b097SVladimir Oltean 	ocelot_cpu_port_init(ocelot);
3342a556c76aSAlexandre Belloni 
334323e2c506SXiaoliang Yang 	if (ocelot->ops->psfp_init)
334423e2c506SXiaoliang Yang 		ocelot->ops->psfp_init(ocelot);
334523e2c506SXiaoliang Yang 
3346a556c76aSAlexandre Belloni 	for (port = 0; port < ocelot->num_phys_ports; port++) {
3347a556c76aSAlexandre Belloni 		/* Clear all counters (5 groups) */
3348a556c76aSAlexandre Belloni 		ocelot_write(ocelot, SYS_STAT_CFG_STAT_VIEW(port) |
3349a556c76aSAlexandre Belloni 				     SYS_STAT_CFG_STAT_CLEAR_SHOT(0x7f),
3350a556c76aSAlexandre Belloni 			     SYS_STAT_CFG);
3351a556c76aSAlexandre Belloni 	}
3352a556c76aSAlexandre Belloni 
3353a556c76aSAlexandre Belloni 	/* Only use S-Tag */
3354a556c76aSAlexandre Belloni 	ocelot_write(ocelot, ETH_P_8021AD, SYS_VLAN_ETYPE_CFG);
3355a556c76aSAlexandre Belloni 
3356a556c76aSAlexandre Belloni 	/* Aggregation mode */
3357a556c76aSAlexandre Belloni 	ocelot_write(ocelot, ANA_AGGR_CFG_AC_SMAC_ENA |
3358a556c76aSAlexandre Belloni 			     ANA_AGGR_CFG_AC_DMAC_ENA |
3359a556c76aSAlexandre Belloni 			     ANA_AGGR_CFG_AC_IP4_SIPDIP_ENA |
3360f79c20c8SVladimir Oltean 			     ANA_AGGR_CFG_AC_IP4_TCPUDP_ENA |
3361f79c20c8SVladimir Oltean 			     ANA_AGGR_CFG_AC_IP6_FLOW_LBL_ENA |
3362f79c20c8SVladimir Oltean 			     ANA_AGGR_CFG_AC_IP6_TCPUDP_ENA,
3363f79c20c8SVladimir Oltean 			     ANA_AGGR_CFG);
3364a556c76aSAlexandre Belloni 
3365a556c76aSAlexandre Belloni 	/* Set MAC age time to default value. The entry is aged after
3366a556c76aSAlexandre Belloni 	 * 2*AGE_PERIOD
3367a556c76aSAlexandre Belloni 	 */
3368a556c76aSAlexandre Belloni 	ocelot_write(ocelot,
3369a556c76aSAlexandre Belloni 		     ANA_AUTOAGE_AGE_PERIOD(BR_DEFAULT_AGEING_TIME / 2 / HZ),
3370a556c76aSAlexandre Belloni 		     ANA_AUTOAGE);
3371a556c76aSAlexandre Belloni 
3372a556c76aSAlexandre Belloni 	/* Disable learning for frames discarded by VLAN ingress filtering */
3373a556c76aSAlexandre Belloni 	regmap_field_write(ocelot->regfields[ANA_ADVLEARN_VLAN_CHK], 1);
3374a556c76aSAlexandre Belloni 
3375a556c76aSAlexandre Belloni 	/* Setup frame ageing - fixed value "2 sec" - in 6.5 us units */
3376a556c76aSAlexandre Belloni 	ocelot_write(ocelot, SYS_FRM_AGING_AGE_TX_ENA |
3377a556c76aSAlexandre Belloni 		     SYS_FRM_AGING_MAX_AGE(307692), SYS_FRM_AGING);
3378a556c76aSAlexandre Belloni 
3379a556c76aSAlexandre Belloni 	/* Setup flooding PGIDs */
3380edd2410bSVladimir Oltean 	for (i = 0; i < ocelot->num_flooding_pgids; i++)
3381a556c76aSAlexandre Belloni 		ocelot_write_rix(ocelot, ANA_FLOODING_FLD_MULTICAST(PGID_MC) |
3382b360d94fSVladimir Oltean 				 ANA_FLOODING_FLD_BROADCAST(PGID_BC) |
3383a556c76aSAlexandre Belloni 				 ANA_FLOODING_FLD_UNICAST(PGID_UC),
3384edd2410bSVladimir Oltean 				 ANA_FLOODING, i);
3385a556c76aSAlexandre Belloni 	ocelot_write(ocelot, ANA_FLOODING_IPMC_FLD_MC6_DATA(PGID_MCIPV6) |
3386a556c76aSAlexandre Belloni 		     ANA_FLOODING_IPMC_FLD_MC6_CTRL(PGID_MC) |
3387a556c76aSAlexandre Belloni 		     ANA_FLOODING_IPMC_FLD_MC4_DATA(PGID_MCIPV4) |
3388a556c76aSAlexandre Belloni 		     ANA_FLOODING_IPMC_FLD_MC4_CTRL(PGID_MC),
3389a556c76aSAlexandre Belloni 		     ANA_FLOODING_IPMC);
3390a556c76aSAlexandre Belloni 
3391a556c76aSAlexandre Belloni 	for (port = 0; port < ocelot->num_phys_ports; port++) {
3392a556c76aSAlexandre Belloni 		/* Transmit the frame to the local port. */
3393a556c76aSAlexandre Belloni 		ocelot_write_rix(ocelot, BIT(port), ANA_PGID_PGID, port);
3394a556c76aSAlexandre Belloni 		/* Do not forward BPDU frames to the front ports. */
3395a556c76aSAlexandre Belloni 		ocelot_write_gix(ocelot,
3396a556c76aSAlexandre Belloni 				 ANA_PORT_CPU_FWD_BPDU_CFG_BPDU_REDIR_ENA(0xffff),
3397a556c76aSAlexandre Belloni 				 ANA_PORT_CPU_FWD_BPDU_CFG,
3398a556c76aSAlexandre Belloni 				 port);
3399a556c76aSAlexandre Belloni 		/* Ensure bridging is disabled */
3400a556c76aSAlexandre Belloni 		ocelot_write_rix(ocelot, 0, ANA_PGID_PGID, PGID_SRC + port);
3401a556c76aSAlexandre Belloni 	}
3402a556c76aSAlexandre Belloni 
340396b029b0SVladimir Oltean 	for_each_nonreserved_multicast_dest_pgid(ocelot, i) {
3404a556c76aSAlexandre Belloni 		u32 val = ANA_PGID_PGID_PGID(GENMASK(ocelot->num_phys_ports - 1, 0));
3405a556c76aSAlexandre Belloni 
3406a556c76aSAlexandre Belloni 		ocelot_write_rix(ocelot, val, ANA_PGID_PGID, i);
3407a556c76aSAlexandre Belloni 	}
3408ebb1bb40SHoratiu Vultur 
3409ebb1bb40SHoratiu Vultur 	ocelot_write_rix(ocelot, 0, ANA_PGID_PGID, PGID_BLACKHOLE);
3410ebb1bb40SHoratiu Vultur 
3411b360d94fSVladimir Oltean 	/* Allow broadcast and unknown L2 multicast to the CPU. */
3412b360d94fSVladimir Oltean 	ocelot_rmw_rix(ocelot, ANA_PGID_PGID_PGID(BIT(ocelot->num_phys_ports)),
3413b360d94fSVladimir Oltean 		       ANA_PGID_PGID_PGID(BIT(ocelot->num_phys_ports)),
3414a556c76aSAlexandre Belloni 		       ANA_PGID_PGID, PGID_MC);
3415b360d94fSVladimir Oltean 	ocelot_rmw_rix(ocelot, ANA_PGID_PGID_PGID(BIT(ocelot->num_phys_ports)),
3416b360d94fSVladimir Oltean 		       ANA_PGID_PGID_PGID(BIT(ocelot->num_phys_ports)),
3417b360d94fSVladimir Oltean 		       ANA_PGID_PGID, PGID_BC);
3418a556c76aSAlexandre Belloni 	ocelot_write_rix(ocelot, 0, ANA_PGID_PGID, PGID_MCIPV4);
3419a556c76aSAlexandre Belloni 	ocelot_write_rix(ocelot, 0, ANA_PGID_PGID, PGID_MCIPV6);
3420a556c76aSAlexandre Belloni 
3421a556c76aSAlexandre Belloni 	/* Allow manual injection via DEVCPU_QS registers, and byte swap these
3422a556c76aSAlexandre Belloni 	 * registers endianness.
3423a556c76aSAlexandre Belloni 	 */
3424a556c76aSAlexandre Belloni 	ocelot_write_rix(ocelot, QS_INJ_GRP_CFG_BYTE_SWAP |
3425a556c76aSAlexandre Belloni 			 QS_INJ_GRP_CFG_MODE(1), QS_INJ_GRP_CFG, 0);
3426a556c76aSAlexandre Belloni 	ocelot_write_rix(ocelot, QS_XTR_GRP_CFG_BYTE_SWAP |
3427a556c76aSAlexandre Belloni 			 QS_XTR_GRP_CFG_MODE(1), QS_XTR_GRP_CFG, 0);
3428a556c76aSAlexandre Belloni 	ocelot_write(ocelot, ANA_CPUQ_CFG_CPUQ_MIRROR(2) |
3429a556c76aSAlexandre Belloni 		     ANA_CPUQ_CFG_CPUQ_LRN(2) |
3430a556c76aSAlexandre Belloni 		     ANA_CPUQ_CFG_CPUQ_MAC_COPY(2) |
3431a556c76aSAlexandre Belloni 		     ANA_CPUQ_CFG_CPUQ_SRC_COPY(2) |
3432a556c76aSAlexandre Belloni 		     ANA_CPUQ_CFG_CPUQ_LOCKED_PORTMOVE(2) |
3433a556c76aSAlexandre Belloni 		     ANA_CPUQ_CFG_CPUQ_ALLBRIDGE(6) |
3434a556c76aSAlexandre Belloni 		     ANA_CPUQ_CFG_CPUQ_IPMC_CTRL(6) |
3435a556c76aSAlexandre Belloni 		     ANA_CPUQ_CFG_CPUQ_IGMP(6) |
3436a556c76aSAlexandre Belloni 		     ANA_CPUQ_CFG_CPUQ_MLD(6), ANA_CPUQ_CFG);
3437a556c76aSAlexandre Belloni 	for (i = 0; i < 16; i++)
3438a556c76aSAlexandre Belloni 		ocelot_write_rix(ocelot, ANA_CPUQ_8021_CFG_CPUQ_GARP_VAL(6) |
3439a556c76aSAlexandre Belloni 				 ANA_CPUQ_8021_CFG_CPUQ_BPDU_VAL(6),
3440a556c76aSAlexandre Belloni 				 ANA_CPUQ_8021_CFG, i);
3441a556c76aSAlexandre Belloni 
3442d87b1c08SColin Foster 	ret = ocelot_prepare_stats_regions(ocelot);
3443d87b1c08SColin Foster 	if (ret) {
3444d87b1c08SColin Foster 		destroy_workqueue(ocelot->stats_queue);
3445d87b1c08SColin Foster 		destroy_workqueue(ocelot->owq);
3446d87b1c08SColin Foster 		return ret;
3447d87b1c08SColin Foster 	}
3448d87b1c08SColin Foster 
34491e1caa97SClaudiu Manoil 	INIT_DELAYED_WORK(&ocelot->stats_work, ocelot_check_stats_work);
3450a556c76aSAlexandre Belloni 	queue_delayed_work(ocelot->stats_queue, &ocelot->stats_work,
3451a556c76aSAlexandre Belloni 			   OCELOT_STATS_CHECK_DELAY);
34524e3b0468SAntoine Tenart 
3453a556c76aSAlexandre Belloni 	return 0;
3454a556c76aSAlexandre Belloni }
3455a556c76aSAlexandre Belloni EXPORT_SYMBOL(ocelot_init);
3456a556c76aSAlexandre Belloni 
3457a556c76aSAlexandre Belloni void ocelot_deinit(struct ocelot *ocelot)
3458a556c76aSAlexandre Belloni {
3459c5d13969SClaudiu Manoil 	cancel_delayed_work(&ocelot->stats_work);
3460a556c76aSAlexandre Belloni 	destroy_workqueue(ocelot->stats_queue);
3461ca0b272bSVladimir Oltean 	destroy_workqueue(ocelot->owq);
3462a556c76aSAlexandre Belloni 	mutex_destroy(&ocelot->stats_lock);
3463a556c76aSAlexandre Belloni }
3464a556c76aSAlexandre Belloni EXPORT_SYMBOL(ocelot_deinit);
3465a556c76aSAlexandre Belloni 
3466e5fb512dSVladimir Oltean void ocelot_deinit_port(struct ocelot *ocelot, int port)
3467e5fb512dSVladimir Oltean {
3468e5fb512dSVladimir Oltean 	struct ocelot_port *ocelot_port = ocelot->ports[port];
3469e5fb512dSVladimir Oltean 
3470e5fb512dSVladimir Oltean 	skb_queue_purge(&ocelot_port->tx_skbs);
3471e5fb512dSVladimir Oltean }
3472e5fb512dSVladimir Oltean EXPORT_SYMBOL(ocelot_deinit_port);
3473e5fb512dSVladimir Oltean 
3474a556c76aSAlexandre Belloni MODULE_LICENSE("Dual MIT/GPL");
3475