1c9c12d33SAleksey Makarov /* SPDX-License-Identifier: GPL-2.0 */ 2cb0e3ec4SSunil Goutham /* Marvell RVU Ethernet driver 3cb0e3ec4SSunil Goutham * 4cb0e3ec4SSunil Goutham * Copyright (C) 2020 Marvell. 5cb0e3ec4SSunil Goutham * 6cb0e3ec4SSunil Goutham */ 7c9c12d33SAleksey Makarov 8c9c12d33SAleksey Makarov #ifndef OTX2_PTP_H 9c9c12d33SAleksey Makarov #define OTX2_PTP_H 10c9c12d33SAleksey Makarov otx2_ptp_convert_rx_timestamp(u64 timestamp)11*74c1b233SNaveen Mamindlapallistatic inline u64 otx2_ptp_convert_rx_timestamp(u64 timestamp) 12*74c1b233SNaveen Mamindlapalli { 13*74c1b233SNaveen Mamindlapalli return be64_to_cpu(*(__be64 *)×tamp); 14*74c1b233SNaveen Mamindlapalli } 15*74c1b233SNaveen Mamindlapalli otx2_ptp_convert_tx_timestamp(u64 timestamp)16*74c1b233SNaveen Mamindlapallistatic inline u64 otx2_ptp_convert_tx_timestamp(u64 timestamp) 17*74c1b233SNaveen Mamindlapalli { 18*74c1b233SNaveen Mamindlapalli return timestamp; 19*74c1b233SNaveen Mamindlapalli } 20*74c1b233SNaveen Mamindlapalli cn10k_ptp_convert_timestamp(u64 timestamp)21*74c1b233SNaveen Mamindlapallistatic inline u64 cn10k_ptp_convert_timestamp(u64 timestamp) 22*74c1b233SNaveen Mamindlapalli { 23*74c1b233SNaveen Mamindlapalli return ((timestamp >> 32) * NSEC_PER_SEC) + (timestamp & 0xFFFFFFFFUL); 24*74c1b233SNaveen Mamindlapalli } 25*74c1b233SNaveen Mamindlapalli 26c9c12d33SAleksey Makarov int otx2_ptp_init(struct otx2_nic *pfvf); 27c9c12d33SAleksey Makarov void otx2_ptp_destroy(struct otx2_nic *pfvf); 28c9c12d33SAleksey Makarov 29c9c12d33SAleksey Makarov int otx2_ptp_clock_index(struct otx2_nic *pfvf); 30c9c12d33SAleksey Makarov int otx2_ptp_tstamp2time(struct otx2_nic *pfvf, u64 tstamp, u64 *tsns); 31c9c12d33SAleksey Makarov 32c9c12d33SAleksey Makarov #endif 33