xref: /openbmc/linux/drivers/net/ethernet/korina.c (revision f029c781dd6d8e2f13593c927c66db7e8826ed28)
1790aad0eSDavid S. Miller /*
219c72cacSJeff Kirsher  *  Driver for the IDT RC32434 (Korina) on-chip ethernet controller.
319c72cacSJeff Kirsher  *
419c72cacSJeff Kirsher  *  Copyright 2004 IDT Inc. (rischelp@idt.com)
519c72cacSJeff Kirsher  *  Copyright 2006 Felix Fietkau <nbd@openwrt.org>
619c72cacSJeff Kirsher  *  Copyright 2008 Florian Fainelli <florian@openwrt.org>
787736fc6SRoman Yeryomin  *  Copyright 2017 Roman Yeryomin <roman@advem.lv>
819c72cacSJeff Kirsher  *
919c72cacSJeff Kirsher  *  This program is free software; you can redistribute  it and/or modify it
1019c72cacSJeff Kirsher  *  under  the terms of  the GNU General  Public License as published by the
1119c72cacSJeff Kirsher  *  Free Software Foundation;  either version 2 of the  License, or (at your
1219c72cacSJeff Kirsher  *  option) any later version.
1319c72cacSJeff Kirsher  *
1419c72cacSJeff Kirsher  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
1519c72cacSJeff Kirsher  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
1619c72cacSJeff Kirsher  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
1719c72cacSJeff Kirsher  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
1819c72cacSJeff Kirsher  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
1919c72cacSJeff Kirsher  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
2019c72cacSJeff Kirsher  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
2119c72cacSJeff Kirsher  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
2219c72cacSJeff Kirsher  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
2319c72cacSJeff Kirsher  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2419c72cacSJeff Kirsher  *
2519c72cacSJeff Kirsher  *  You should have received a copy of the  GNU General Public License along
2619c72cacSJeff Kirsher  *  with this program; if not, write  to the Free Software Foundation, Inc.,
2719c72cacSJeff Kirsher  *  675 Mass Ave, Cambridge, MA 02139, USA.
2819c72cacSJeff Kirsher  *
2919c72cacSJeff Kirsher  *  Writing to a DMA status register:
3019c72cacSJeff Kirsher  *
3119c72cacSJeff Kirsher  *  When writing to the status register, you should mask the bit you have
3219c72cacSJeff Kirsher  *  been testing the status register with. Both Tx and Rx DMA registers
3319c72cacSJeff Kirsher  *  should stick to this procedure.
3419c72cacSJeff Kirsher  */
3519c72cacSJeff Kirsher 
3619c72cacSJeff Kirsher #include <linux/module.h>
3719c72cacSJeff Kirsher #include <linux/kernel.h>
3819c72cacSJeff Kirsher #include <linux/moduleparam.h>
3919c72cacSJeff Kirsher #include <linux/sched.h>
4019c72cacSJeff Kirsher #include <linux/ctype.h>
4119c72cacSJeff Kirsher #include <linux/types.h>
4219c72cacSJeff Kirsher #include <linux/interrupt.h>
4319c72cacSJeff Kirsher #include <linux/ioport.h>
4489f9d540SThomas Bogendoerfer #include <linux/iopoll.h>
4519c72cacSJeff Kirsher #include <linux/in.h>
4610b26f07SThomas Bogendoerfer #include <linux/of_device.h>
4710b26f07SThomas Bogendoerfer #include <linux/of_net.h>
4819c72cacSJeff Kirsher #include <linux/slab.h>
4919c72cacSJeff Kirsher #include <linux/string.h>
5019c72cacSJeff Kirsher #include <linux/delay.h>
5119c72cacSJeff Kirsher #include <linux/netdevice.h>
5219c72cacSJeff Kirsher #include <linux/etherdevice.h>
5319c72cacSJeff Kirsher #include <linux/skbuff.h>
5419c72cacSJeff Kirsher #include <linux/errno.h>
5519c72cacSJeff Kirsher #include <linux/platform_device.h>
5619c72cacSJeff Kirsher #include <linux/mii.h>
5719c72cacSJeff Kirsher #include <linux/ethtool.h>
5819c72cacSJeff Kirsher #include <linux/crc32.h>
5965fddcfcSMike Rapoport #include <linux/pgtable.h>
60e4cd854eSThomas Bogendoerfer #include <linux/clk.h>
6119c72cacSJeff Kirsher 
6219c72cacSJeff Kirsher #define DRV_NAME	"korina"
63da1d2defSRoman Yeryomin #define DRV_VERSION	"0.20"
64da1d2defSRoman Yeryomin #define DRV_RELDATE	"15Sep2017"
6519c72cacSJeff Kirsher 
666ef92063SThomas Bogendoerfer struct eth_regs {
676ef92063SThomas Bogendoerfer 	u32 ethintfc;
686ef92063SThomas Bogendoerfer 	u32 ethfifott;
696ef92063SThomas Bogendoerfer 	u32 etharc;
706ef92063SThomas Bogendoerfer 	u32 ethhash0;
716ef92063SThomas Bogendoerfer 	u32 ethhash1;
726ef92063SThomas Bogendoerfer 	u32 ethu0[4];		/* Reserved. */
736ef92063SThomas Bogendoerfer 	u32 ethpfs;
746ef92063SThomas Bogendoerfer 	u32 ethmcp;
756ef92063SThomas Bogendoerfer 	u32 eth_u1[10];		/* Reserved. */
766ef92063SThomas Bogendoerfer 	u32 ethspare;
776ef92063SThomas Bogendoerfer 	u32 eth_u2[42];		/* Reserved. */
786ef92063SThomas Bogendoerfer 	u32 ethsal0;
796ef92063SThomas Bogendoerfer 	u32 ethsah0;
806ef92063SThomas Bogendoerfer 	u32 ethsal1;
816ef92063SThomas Bogendoerfer 	u32 ethsah1;
826ef92063SThomas Bogendoerfer 	u32 ethsal2;
836ef92063SThomas Bogendoerfer 	u32 ethsah2;
846ef92063SThomas Bogendoerfer 	u32 ethsal3;
856ef92063SThomas Bogendoerfer 	u32 ethsah3;
866ef92063SThomas Bogendoerfer 	u32 ethrbc;
876ef92063SThomas Bogendoerfer 	u32 ethrpc;
886ef92063SThomas Bogendoerfer 	u32 ethrupc;
896ef92063SThomas Bogendoerfer 	u32 ethrfc;
906ef92063SThomas Bogendoerfer 	u32 ethtbc;
916ef92063SThomas Bogendoerfer 	u32 ethgpf;
926ef92063SThomas Bogendoerfer 	u32 eth_u9[50];		/* Reserved. */
936ef92063SThomas Bogendoerfer 	u32 ethmac1;
946ef92063SThomas Bogendoerfer 	u32 ethmac2;
956ef92063SThomas Bogendoerfer 	u32 ethipgt;
966ef92063SThomas Bogendoerfer 	u32 ethipgr;
976ef92063SThomas Bogendoerfer 	u32 ethclrt;
986ef92063SThomas Bogendoerfer 	u32 ethmaxf;
996ef92063SThomas Bogendoerfer 	u32 eth_u10;		/* Reserved. */
1006ef92063SThomas Bogendoerfer 	u32 ethmtest;
1016ef92063SThomas Bogendoerfer 	u32 miimcfg;
1026ef92063SThomas Bogendoerfer 	u32 miimcmd;
1036ef92063SThomas Bogendoerfer 	u32 miimaddr;
1046ef92063SThomas Bogendoerfer 	u32 miimwtd;
1056ef92063SThomas Bogendoerfer 	u32 miimrdd;
1066ef92063SThomas Bogendoerfer 	u32 miimind;
1076ef92063SThomas Bogendoerfer 	u32 eth_u11;		/* Reserved. */
1086ef92063SThomas Bogendoerfer 	u32 eth_u12;		/* Reserved. */
1096ef92063SThomas Bogendoerfer 	u32 ethcfsa0;
1106ef92063SThomas Bogendoerfer 	u32 ethcfsa1;
1116ef92063SThomas Bogendoerfer 	u32 ethcfsa2;
1126ef92063SThomas Bogendoerfer };
1136ef92063SThomas Bogendoerfer 
1146ef92063SThomas Bogendoerfer /* Ethernet interrupt registers */
1156ef92063SThomas Bogendoerfer #define ETH_INT_FC_EN		BIT(0)
1166ef92063SThomas Bogendoerfer #define ETH_INT_FC_ITS		BIT(1)
1176ef92063SThomas Bogendoerfer #define ETH_INT_FC_RIP		BIT(2)
1186ef92063SThomas Bogendoerfer #define ETH_INT_FC_JAM		BIT(3)
1196ef92063SThomas Bogendoerfer #define ETH_INT_FC_OVR		BIT(4)
1206ef92063SThomas Bogendoerfer #define ETH_INT_FC_UND		BIT(5)
1216ef92063SThomas Bogendoerfer #define ETH_INT_FC_IOC		0x000000c0
1226ef92063SThomas Bogendoerfer 
1236ef92063SThomas Bogendoerfer /* Ethernet FIFO registers */
1246ef92063SThomas Bogendoerfer #define ETH_FIFI_TT_TTH_BIT	0
1256ef92063SThomas Bogendoerfer #define ETH_FIFO_TT_TTH		0x0000007f
1266ef92063SThomas Bogendoerfer 
1276ef92063SThomas Bogendoerfer /* Ethernet ARC/multicast registers */
1286ef92063SThomas Bogendoerfer #define ETH_ARC_PRO		BIT(0)
1296ef92063SThomas Bogendoerfer #define ETH_ARC_AM		BIT(1)
1306ef92063SThomas Bogendoerfer #define ETH_ARC_AFM		BIT(2)
1316ef92063SThomas Bogendoerfer #define ETH_ARC_AB		BIT(3)
1326ef92063SThomas Bogendoerfer 
1336ef92063SThomas Bogendoerfer /* Ethernet SAL registers */
1346ef92063SThomas Bogendoerfer #define ETH_SAL_BYTE_5		0x000000ff
1356ef92063SThomas Bogendoerfer #define ETH_SAL_BYTE_4		0x0000ff00
1366ef92063SThomas Bogendoerfer #define ETH_SAL_BYTE_3		0x00ff0000
1376ef92063SThomas Bogendoerfer #define ETH_SAL_BYTE_2		0xff000000
1386ef92063SThomas Bogendoerfer 
1396ef92063SThomas Bogendoerfer /* Ethernet SAH registers */
1406ef92063SThomas Bogendoerfer #define ETH_SAH_BYTE1		0x000000ff
1416ef92063SThomas Bogendoerfer #define ETH_SAH_BYTE0		0x0000ff00
1426ef92063SThomas Bogendoerfer 
1436ef92063SThomas Bogendoerfer /* Ethernet GPF register */
1446ef92063SThomas Bogendoerfer #define ETH_GPF_PTV		0x0000ffff
1456ef92063SThomas Bogendoerfer 
1466ef92063SThomas Bogendoerfer /* Ethernet PFG register */
1476ef92063SThomas Bogendoerfer #define ETH_PFS_PFD		BIT(0)
1486ef92063SThomas Bogendoerfer 
1496ef92063SThomas Bogendoerfer /* Ethernet CFSA[0-3] registers */
1506ef92063SThomas Bogendoerfer #define ETH_CFSA0_CFSA4		0x000000ff
1516ef92063SThomas Bogendoerfer #define ETH_CFSA0_CFSA5		0x0000ff00
1526ef92063SThomas Bogendoerfer #define ETH_CFSA1_CFSA2		0x000000ff
1536ef92063SThomas Bogendoerfer #define ETH_CFSA1_CFSA3		0x0000ff00
1546ef92063SThomas Bogendoerfer #define ETH_CFSA1_CFSA0		0x000000ff
1556ef92063SThomas Bogendoerfer #define ETH_CFSA1_CFSA1		0x0000ff00
1566ef92063SThomas Bogendoerfer 
1576ef92063SThomas Bogendoerfer /* Ethernet MAC1 registers */
1586ef92063SThomas Bogendoerfer #define ETH_MAC1_RE		BIT(0)
1596ef92063SThomas Bogendoerfer #define ETH_MAC1_PAF		BIT(1)
1606ef92063SThomas Bogendoerfer #define ETH_MAC1_RFC		BIT(2)
1616ef92063SThomas Bogendoerfer #define ETH_MAC1_TFC		BIT(3)
1626ef92063SThomas Bogendoerfer #define ETH_MAC1_LB		BIT(4)
1636ef92063SThomas Bogendoerfer #define ETH_MAC1_MR		BIT(31)
1646ef92063SThomas Bogendoerfer 
1656ef92063SThomas Bogendoerfer /* Ethernet MAC2 registers */
1666ef92063SThomas Bogendoerfer #define ETH_MAC2_FD		BIT(0)
1676ef92063SThomas Bogendoerfer #define ETH_MAC2_FLC		BIT(1)
1686ef92063SThomas Bogendoerfer #define ETH_MAC2_HFE		BIT(2)
1696ef92063SThomas Bogendoerfer #define ETH_MAC2_DC		BIT(3)
1706ef92063SThomas Bogendoerfer #define ETH_MAC2_CEN		BIT(4)
1716ef92063SThomas Bogendoerfer #define ETH_MAC2_PE		BIT(5)
1726ef92063SThomas Bogendoerfer #define ETH_MAC2_VPE		BIT(6)
1736ef92063SThomas Bogendoerfer #define ETH_MAC2_APE		BIT(7)
1746ef92063SThomas Bogendoerfer #define ETH_MAC2_PPE		BIT(8)
1756ef92063SThomas Bogendoerfer #define ETH_MAC2_LPE		BIT(9)
1766ef92063SThomas Bogendoerfer #define ETH_MAC2_NB		BIT(12)
1776ef92063SThomas Bogendoerfer #define ETH_MAC2_BP		BIT(13)
1786ef92063SThomas Bogendoerfer #define ETH_MAC2_ED		BIT(14)
1796ef92063SThomas Bogendoerfer 
1806ef92063SThomas Bogendoerfer /* Ethernet IPGT register */
1816ef92063SThomas Bogendoerfer #define ETH_IPGT		0x0000007f
1826ef92063SThomas Bogendoerfer 
1836ef92063SThomas Bogendoerfer /* Ethernet IPGR registers */
1846ef92063SThomas Bogendoerfer #define ETH_IPGR_IPGR2		0x0000007f
1856ef92063SThomas Bogendoerfer #define ETH_IPGR_IPGR1		0x00007f00
1866ef92063SThomas Bogendoerfer 
1876ef92063SThomas Bogendoerfer /* Ethernet CLRT registers */
1886ef92063SThomas Bogendoerfer #define ETH_CLRT_MAX_RET	0x0000000f
1896ef92063SThomas Bogendoerfer #define ETH_CLRT_COL_WIN	0x00003f00
1906ef92063SThomas Bogendoerfer 
1916ef92063SThomas Bogendoerfer /* Ethernet MAXF register */
1926ef92063SThomas Bogendoerfer #define ETH_MAXF		0x0000ffff
1936ef92063SThomas Bogendoerfer 
1946ef92063SThomas Bogendoerfer /* Ethernet test registers */
1956ef92063SThomas Bogendoerfer #define ETH_TEST_REG		BIT(2)
1966ef92063SThomas Bogendoerfer #define ETH_MCP_DIV		0x000000ff
1976ef92063SThomas Bogendoerfer 
1986ef92063SThomas Bogendoerfer /* MII registers */
1996ef92063SThomas Bogendoerfer #define ETH_MII_CFG_RSVD	0x0000000c
2006ef92063SThomas Bogendoerfer #define ETH_MII_CMD_RD		BIT(0)
2016ef92063SThomas Bogendoerfer #define ETH_MII_CMD_SCN		BIT(1)
2026ef92063SThomas Bogendoerfer #define ETH_MII_REG_ADDR	0x0000001f
2036ef92063SThomas Bogendoerfer #define ETH_MII_PHY_ADDR	0x00001f00
2046ef92063SThomas Bogendoerfer #define ETH_MII_WTD_DATA	0x0000ffff
2056ef92063SThomas Bogendoerfer #define ETH_MII_RDD_DATA	0x0000ffff
2066ef92063SThomas Bogendoerfer #define ETH_MII_IND_BSY		BIT(0)
2076ef92063SThomas Bogendoerfer #define ETH_MII_IND_SCN		BIT(1)
2086ef92063SThomas Bogendoerfer #define ETH_MII_IND_NV		BIT(2)
2096ef92063SThomas Bogendoerfer 
2106ef92063SThomas Bogendoerfer /* Values for the DEVCS field of the Ethernet DMA Rx and Tx descriptors. */
2116ef92063SThomas Bogendoerfer #define ETH_RX_FD		BIT(0)
2126ef92063SThomas Bogendoerfer #define ETH_RX_LD		BIT(1)
2136ef92063SThomas Bogendoerfer #define ETH_RX_ROK		BIT(2)
2146ef92063SThomas Bogendoerfer #define ETH_RX_FM		BIT(3)
2156ef92063SThomas Bogendoerfer #define ETH_RX_MP		BIT(4)
2166ef92063SThomas Bogendoerfer #define ETH_RX_BP		BIT(5)
2176ef92063SThomas Bogendoerfer #define ETH_RX_VLT		BIT(6)
2186ef92063SThomas Bogendoerfer #define ETH_RX_CF		BIT(7)
2196ef92063SThomas Bogendoerfer #define ETH_RX_OVR		BIT(8)
2206ef92063SThomas Bogendoerfer #define ETH_RX_CRC		BIT(9)
2216ef92063SThomas Bogendoerfer #define ETH_RX_CV		BIT(10)
2226ef92063SThomas Bogendoerfer #define ETH_RX_DB		BIT(11)
2236ef92063SThomas Bogendoerfer #define ETH_RX_LE		BIT(12)
2246ef92063SThomas Bogendoerfer #define ETH_RX_LOR		BIT(13)
2256ef92063SThomas Bogendoerfer #define ETH_RX_CES		BIT(14)
2266ef92063SThomas Bogendoerfer #define ETH_RX_LEN_BIT		16
2276ef92063SThomas Bogendoerfer #define ETH_RX_LEN		0xffff0000
2286ef92063SThomas Bogendoerfer 
2296ef92063SThomas Bogendoerfer #define ETH_TX_FD		BIT(0)
2306ef92063SThomas Bogendoerfer #define ETH_TX_LD		BIT(1)
2316ef92063SThomas Bogendoerfer #define ETH_TX_OEN		BIT(2)
2326ef92063SThomas Bogendoerfer #define ETH_TX_PEN		BIT(3)
2336ef92063SThomas Bogendoerfer #define ETH_TX_CEN		BIT(4)
2346ef92063SThomas Bogendoerfer #define ETH_TX_HEN		BIT(5)
2356ef92063SThomas Bogendoerfer #define ETH_TX_TOK		BIT(6)
2366ef92063SThomas Bogendoerfer #define ETH_TX_MP		BIT(7)
2376ef92063SThomas Bogendoerfer #define ETH_TX_BP		BIT(8)
2386ef92063SThomas Bogendoerfer #define ETH_TX_UND		BIT(9)
2396ef92063SThomas Bogendoerfer #define ETH_TX_OF		BIT(10)
2406ef92063SThomas Bogendoerfer #define ETH_TX_ED		BIT(11)
2416ef92063SThomas Bogendoerfer #define ETH_TX_EC		BIT(12)
2426ef92063SThomas Bogendoerfer #define ETH_TX_LC		BIT(13)
2436ef92063SThomas Bogendoerfer #define ETH_TX_TD		BIT(14)
2446ef92063SThomas Bogendoerfer #define ETH_TX_CRC		BIT(15)
2456ef92063SThomas Bogendoerfer #define ETH_TX_LE		BIT(16)
2466ef92063SThomas Bogendoerfer #define ETH_TX_CC		0x001E0000
2476ef92063SThomas Bogendoerfer 
2486ef92063SThomas Bogendoerfer /* DMA descriptor (in physical memory). */
2496ef92063SThomas Bogendoerfer struct dma_desc {
2506ef92063SThomas Bogendoerfer 	u32 control;			/* Control. use DMAD_* */
2516ef92063SThomas Bogendoerfer 	u32 ca;				/* Current Address. */
2526ef92063SThomas Bogendoerfer 	u32 devcs;			/* Device control and status. */
2536ef92063SThomas Bogendoerfer 	u32 link;			/* Next descriptor in chain. */
2546ef92063SThomas Bogendoerfer };
2556ef92063SThomas Bogendoerfer 
2566ef92063SThomas Bogendoerfer #define DMA_DESC_COUNT_BIT		0
2576ef92063SThomas Bogendoerfer #define DMA_DESC_COUNT_MSK		0x0003ffff
2586ef92063SThomas Bogendoerfer #define DMA_DESC_DS_BIT			20
2596ef92063SThomas Bogendoerfer #define DMA_DESC_DS_MSK			0x00300000
2606ef92063SThomas Bogendoerfer 
2616ef92063SThomas Bogendoerfer #define DMA_DESC_DEV_CMD_BIT		22
2626ef92063SThomas Bogendoerfer #define DMA_DESC_DEV_CMD_MSK		0x01c00000
2636ef92063SThomas Bogendoerfer 
2646ef92063SThomas Bogendoerfer /* DMA descriptors interrupts */
2656ef92063SThomas Bogendoerfer #define DMA_DESC_COF			BIT(25) /* Chain on finished */
2666ef92063SThomas Bogendoerfer #define DMA_DESC_COD			BIT(26) /* Chain on done */
2676ef92063SThomas Bogendoerfer #define DMA_DESC_IOF			BIT(27) /* Interrupt on finished */
2686ef92063SThomas Bogendoerfer #define DMA_DESC_IOD			BIT(28) /* Interrupt on done */
2696ef92063SThomas Bogendoerfer #define DMA_DESC_TERM			BIT(29) /* Terminated */
2706ef92063SThomas Bogendoerfer #define DMA_DESC_DONE			BIT(30) /* Done */
2716ef92063SThomas Bogendoerfer #define DMA_DESC_FINI			BIT(31) /* Finished */
2726ef92063SThomas Bogendoerfer 
2736ef92063SThomas Bogendoerfer /* DMA register (within Internal Register Map).  */
2746ef92063SThomas Bogendoerfer struct dma_reg {
2756ef92063SThomas Bogendoerfer 	u32 dmac;		/* Control. */
2766ef92063SThomas Bogendoerfer 	u32 dmas;		/* Status. */
2776ef92063SThomas Bogendoerfer 	u32 dmasm;		/* Mask. */
2786ef92063SThomas Bogendoerfer 	u32 dmadptr;		/* Descriptor pointer. */
2796ef92063SThomas Bogendoerfer 	u32 dmandptr;		/* Next descriptor pointer. */
2806ef92063SThomas Bogendoerfer };
2816ef92063SThomas Bogendoerfer 
2826ef92063SThomas Bogendoerfer /* DMA channels specific registers */
2836ef92063SThomas Bogendoerfer #define DMA_CHAN_RUN_BIT		BIT(0)
2846ef92063SThomas Bogendoerfer #define DMA_CHAN_DONE_BIT		BIT(1)
2856ef92063SThomas Bogendoerfer #define DMA_CHAN_MODE_BIT		BIT(2)
2866ef92063SThomas Bogendoerfer #define DMA_CHAN_MODE_MSK		0x0000000c
2876ef92063SThomas Bogendoerfer #define	 DMA_CHAN_MODE_AUTO		0
2886ef92063SThomas Bogendoerfer #define	 DMA_CHAN_MODE_BURST		1
2896ef92063SThomas Bogendoerfer #define	 DMA_CHAN_MODE_XFRT		2
2906ef92063SThomas Bogendoerfer #define	 DMA_CHAN_MODE_RSVD		3
2916ef92063SThomas Bogendoerfer #define DMA_CHAN_ACT_BIT		BIT(4)
2926ef92063SThomas Bogendoerfer 
2936ef92063SThomas Bogendoerfer /* DMA status registers */
2946ef92063SThomas Bogendoerfer #define DMA_STAT_FINI			BIT(0)
2956ef92063SThomas Bogendoerfer #define DMA_STAT_DONE			BIT(1)
2966ef92063SThomas Bogendoerfer #define DMA_STAT_CHAIN			BIT(2)
2976ef92063SThomas Bogendoerfer #define DMA_STAT_ERR			BIT(3)
2986ef92063SThomas Bogendoerfer #define DMA_STAT_HALT			BIT(4)
2996ef92063SThomas Bogendoerfer 
30019c72cacSJeff Kirsher #define STATION_ADDRESS_HIGH(dev) (((dev)->dev_addr[0] << 8) | \
30119c72cacSJeff Kirsher 				   ((dev)->dev_addr[1]))
30219c72cacSJeff Kirsher #define STATION_ADDRESS_LOW(dev)  (((dev)->dev_addr[2] << 24) | \
30319c72cacSJeff Kirsher 				   ((dev)->dev_addr[3] << 16) | \
30419c72cacSJeff Kirsher 				   ((dev)->dev_addr[4] << 8)  | \
30519c72cacSJeff Kirsher 				   ((dev)->dev_addr[5]))
30619c72cacSJeff Kirsher 
30719c72cacSJeff Kirsher #define MII_CLOCK	1250000 /* no more than 2.5MHz */
30819c72cacSJeff Kirsher 
30919c72cacSJeff Kirsher /* the following must be powers of two */
31019c72cacSJeff Kirsher #define KORINA_NUM_RDS	64  /* number of receive descriptors */
31119c72cacSJeff Kirsher #define KORINA_NUM_TDS	64  /* number of transmit descriptors */
31219c72cacSJeff Kirsher 
31319c72cacSJeff Kirsher /* KORINA_RBSIZE is the hardware's default maximum receive
31419c72cacSJeff Kirsher  * frame size in bytes. Having this hardcoded means that there
31519c72cacSJeff Kirsher  * is no support for MTU sizes greater than 1500. */
31619c72cacSJeff Kirsher #define KORINA_RBSIZE	1536 /* size of one resource buffer = Ether MTU */
31719c72cacSJeff Kirsher #define KORINA_RDS_MASK	(KORINA_NUM_RDS - 1)
31819c72cacSJeff Kirsher #define KORINA_TDS_MASK	(KORINA_NUM_TDS - 1)
31919c72cacSJeff Kirsher #define RD_RING_SIZE	(KORINA_NUM_RDS * sizeof(struct dma_desc))
32019c72cacSJeff Kirsher #define TD_RING_SIZE	(KORINA_NUM_TDS * sizeof(struct dma_desc))
32119c72cacSJeff Kirsher 
32219c72cacSJeff Kirsher #define TX_TIMEOUT	(6000 * HZ / 1000)
32319c72cacSJeff Kirsher 
3242e5396b1SRoman Yeryomin enum chain_status {
3252e5396b1SRoman Yeryomin 	desc_filled,
32656e2e5deSDavid S. Miller 	desc_is_empty
3272e5396b1SRoman Yeryomin };
3282e5396b1SRoman Yeryomin 
3296ef92063SThomas Bogendoerfer #define DMA_COUNT(count)	((count) & DMA_DESC_COUNT_MSK)
33019c72cacSJeff Kirsher #define IS_DMA_FINISHED(X)	(((X) & (DMA_DESC_FINI)) != 0)
33119c72cacSJeff Kirsher #define IS_DMA_DONE(X)		(((X) & (DMA_DESC_DONE)) != 0)
33219c72cacSJeff Kirsher #define RCVPKT_LENGTH(X)	(((X) & ETH_RX_LEN) >> ETH_RX_LEN_BIT)
33319c72cacSJeff Kirsher 
33419c72cacSJeff Kirsher /* Information that need to be kept for each board. */
33519c72cacSJeff Kirsher struct korina_private {
336b4cd249aSThomas Bogendoerfer 	struct eth_regs __iomem *eth_regs;
337b4cd249aSThomas Bogendoerfer 	struct dma_reg __iomem *rx_dma_regs;
338b4cd249aSThomas Bogendoerfer 	struct dma_reg __iomem *tx_dma_regs;
33919c72cacSJeff Kirsher 	struct dma_desc *td_ring; /* transmit descriptor ring */
34019c72cacSJeff Kirsher 	struct dma_desc *rd_ring; /* receive descriptor ring  */
3410fc96939SThomas Bogendoerfer 	dma_addr_t td_dma;
3420fc96939SThomas Bogendoerfer 	dma_addr_t rd_dma;
34319c72cacSJeff Kirsher 
34419c72cacSJeff Kirsher 	struct sk_buff *tx_skb[KORINA_NUM_TDS];
34519c72cacSJeff Kirsher 	struct sk_buff *rx_skb[KORINA_NUM_RDS];
34619c72cacSJeff Kirsher 
3470fc96939SThomas Bogendoerfer 	dma_addr_t rx_skb_dma[KORINA_NUM_RDS];
3480fc96939SThomas Bogendoerfer 	dma_addr_t tx_skb_dma[KORINA_NUM_TDS];
3490fc96939SThomas Bogendoerfer 
35019c72cacSJeff Kirsher 	int rx_next_done;
35119c72cacSJeff Kirsher 	int rx_chain_head;
35219c72cacSJeff Kirsher 	int rx_chain_tail;
35319c72cacSJeff Kirsher 	enum chain_status rx_chain_status;
35419c72cacSJeff Kirsher 
35519c72cacSJeff Kirsher 	int tx_next_done;
35619c72cacSJeff Kirsher 	int tx_chain_head;
35719c72cacSJeff Kirsher 	int tx_chain_tail;
35819c72cacSJeff Kirsher 	enum chain_status tx_chain_status;
35919c72cacSJeff Kirsher 	int tx_count;
36019c72cacSJeff Kirsher 	int tx_full;
36119c72cacSJeff Kirsher 
36219c72cacSJeff Kirsher 	int rx_irq;
36319c72cacSJeff Kirsher 	int tx_irq;
36419c72cacSJeff Kirsher 
36519c72cacSJeff Kirsher 	spinlock_t lock;	/* NIC xmit lock */
36619c72cacSJeff Kirsher 
36719c72cacSJeff Kirsher 	int dma_halt_cnt;
36819c72cacSJeff Kirsher 	int dma_run_cnt;
36919c72cacSJeff Kirsher 	struct napi_struct napi;
37019c72cacSJeff Kirsher 	struct timer_list media_check_timer;
37119c72cacSJeff Kirsher 	struct mii_if_info mii_if;
37219c72cacSJeff Kirsher 	struct work_struct restart_task;
37319c72cacSJeff Kirsher 	struct net_device *dev;
3740fc96939SThomas Bogendoerfer 	struct device *dmadev;
375e4cd854eSThomas Bogendoerfer 	int mii_clock_freq;
37619c72cacSJeff Kirsher };
37719c72cacSJeff Kirsher 
3780fc96939SThomas Bogendoerfer static dma_addr_t korina_tx_dma(struct korina_private *lp, int idx)
3790fc96939SThomas Bogendoerfer {
3800fc96939SThomas Bogendoerfer 	return lp->td_dma + (idx * sizeof(struct dma_desc));
3810fc96939SThomas Bogendoerfer }
3820fc96939SThomas Bogendoerfer 
3830fc96939SThomas Bogendoerfer static dma_addr_t korina_rx_dma(struct korina_private *lp, int idx)
3840fc96939SThomas Bogendoerfer {
3850fc96939SThomas Bogendoerfer 	return lp->rd_dma + (idx * sizeof(struct dma_desc));
3860fc96939SThomas Bogendoerfer }
3870fc96939SThomas Bogendoerfer 
38819c72cacSJeff Kirsher static inline void korina_abort_dma(struct net_device *dev,
38919c72cacSJeff Kirsher 					struct dma_reg *ch)
39019c72cacSJeff Kirsher {
39119c72cacSJeff Kirsher 	if (readl(&ch->dmac) & DMA_CHAN_RUN_BIT) {
39219c72cacSJeff Kirsher 		writel(0x10, &ch->dmac);
39319c72cacSJeff Kirsher 
39419c72cacSJeff Kirsher 		while (!(readl(&ch->dmas) & DMA_STAT_HALT))
395860e9538SFlorian Westphal 			netif_trans_update(dev);
39619c72cacSJeff Kirsher 
39719c72cacSJeff Kirsher 		writel(0, &ch->dmas);
39819c72cacSJeff Kirsher 	}
39919c72cacSJeff Kirsher 
40019c72cacSJeff Kirsher 	writel(0, &ch->dmadptr);
40119c72cacSJeff Kirsher 	writel(0, &ch->dmandptr);
40219c72cacSJeff Kirsher }
40319c72cacSJeff Kirsher 
40419c72cacSJeff Kirsher static void korina_abort_tx(struct net_device *dev)
40519c72cacSJeff Kirsher {
40619c72cacSJeff Kirsher 	struct korina_private *lp = netdev_priv(dev);
40719c72cacSJeff Kirsher 
40819c72cacSJeff Kirsher 	korina_abort_dma(dev, lp->tx_dma_regs);
40919c72cacSJeff Kirsher }
41019c72cacSJeff Kirsher 
41119c72cacSJeff Kirsher static void korina_abort_rx(struct net_device *dev)
41219c72cacSJeff Kirsher {
41319c72cacSJeff Kirsher 	struct korina_private *lp = netdev_priv(dev);
41419c72cacSJeff Kirsher 
41519c72cacSJeff Kirsher 	korina_abort_dma(dev, lp->rx_dma_regs);
41619c72cacSJeff Kirsher }
41719c72cacSJeff Kirsher 
41819c72cacSJeff Kirsher /* transmit packet */
41919c72cacSJeff Kirsher static int korina_send_packet(struct sk_buff *skb, struct net_device *dev)
42019c72cacSJeff Kirsher {
42119c72cacSJeff Kirsher 	struct korina_private *lp = netdev_priv(dev);
42219c72cacSJeff Kirsher 	u32 chain_prev, chain_next;
4230fc96939SThomas Bogendoerfer 	unsigned long flags;
42419c72cacSJeff Kirsher 	struct dma_desc *td;
4250fc96939SThomas Bogendoerfer 	dma_addr_t ca;
4260fc96939SThomas Bogendoerfer 	u32 length;
4270fc96939SThomas Bogendoerfer 	int idx;
42819c72cacSJeff Kirsher 
42919c72cacSJeff Kirsher 	spin_lock_irqsave(&lp->lock, flags);
43019c72cacSJeff Kirsher 
4310fc96939SThomas Bogendoerfer 	idx = lp->tx_chain_tail;
4320fc96939SThomas Bogendoerfer 	td = &lp->td_ring[idx];
43319c72cacSJeff Kirsher 
43419c72cacSJeff Kirsher 	/* stop queue when full, drop pkts if queue already full */
43519c72cacSJeff Kirsher 	if (lp->tx_count >= (KORINA_NUM_TDS - 2)) {
43619c72cacSJeff Kirsher 		lp->tx_full = 1;
43719c72cacSJeff Kirsher 
43819c72cacSJeff Kirsher 		if (lp->tx_count == (KORINA_NUM_TDS - 2))
43919c72cacSJeff Kirsher 			netif_stop_queue(dev);
4400fc96939SThomas Bogendoerfer 		else
4410fc96939SThomas Bogendoerfer 			goto drop_packet;
44219c72cacSJeff Kirsher 	}
44319c72cacSJeff Kirsher 
44419c72cacSJeff Kirsher 	lp->tx_count++;
44519c72cacSJeff Kirsher 
4460fc96939SThomas Bogendoerfer 	lp->tx_skb[idx] = skb;
44719c72cacSJeff Kirsher 
44819c72cacSJeff Kirsher 	length = skb->len;
44919c72cacSJeff Kirsher 
45019c72cacSJeff Kirsher 	/* Setup the transmit descriptor. */
4510fc96939SThomas Bogendoerfer 	ca = dma_map_single(lp->dmadev, skb->data, length, DMA_TO_DEVICE);
4520fc96939SThomas Bogendoerfer 	if (dma_mapping_error(lp->dmadev, ca))
4530fc96939SThomas Bogendoerfer 		goto drop_packet;
4540fc96939SThomas Bogendoerfer 
4550fc96939SThomas Bogendoerfer 	lp->tx_skb_dma[idx] = ca;
4560fc96939SThomas Bogendoerfer 	td->ca = ca;
4570fc96939SThomas Bogendoerfer 
4580fc96939SThomas Bogendoerfer 	chain_prev = (idx - 1) & KORINA_TDS_MASK;
4590fc96939SThomas Bogendoerfer 	chain_next = (idx + 1) & KORINA_TDS_MASK;
46019c72cacSJeff Kirsher 
46119c72cacSJeff Kirsher 	if (readl(&(lp->tx_dma_regs->dmandptr)) == 0) {
46256e2e5deSDavid S. Miller 		if (lp->tx_chain_status == desc_is_empty) {
46319c72cacSJeff Kirsher 			/* Update tail */
46419c72cacSJeff Kirsher 			td->control = DMA_COUNT(length) |
46519c72cacSJeff Kirsher 					DMA_DESC_COF | DMA_DESC_IOF;
46619c72cacSJeff Kirsher 			/* Move tail */
46719c72cacSJeff Kirsher 			lp->tx_chain_tail = chain_next;
46819c72cacSJeff Kirsher 			/* Write to NDPTR */
4690fc96939SThomas Bogendoerfer 			writel(korina_tx_dma(lp, lp->tx_chain_head),
47019c72cacSJeff Kirsher 			       &lp->tx_dma_regs->dmandptr);
47119c72cacSJeff Kirsher 			/* Move head to tail */
47219c72cacSJeff Kirsher 			lp->tx_chain_head = lp->tx_chain_tail;
47319c72cacSJeff Kirsher 		} else {
47419c72cacSJeff Kirsher 			/* Update tail */
47519c72cacSJeff Kirsher 			td->control = DMA_COUNT(length) |
47619c72cacSJeff Kirsher 					DMA_DESC_COF | DMA_DESC_IOF;
47719c72cacSJeff Kirsher 			/* Link to prev */
47819c72cacSJeff Kirsher 			lp->td_ring[chain_prev].control &=
47919c72cacSJeff Kirsher 					~DMA_DESC_COF;
48019c72cacSJeff Kirsher 			/* Link to prev */
4810fc96939SThomas Bogendoerfer 			lp->td_ring[chain_prev].link = korina_tx_dma(lp, idx);
48219c72cacSJeff Kirsher 			/* Move tail */
48319c72cacSJeff Kirsher 			lp->tx_chain_tail = chain_next;
48419c72cacSJeff Kirsher 			/* Write to NDPTR */
4850fc96939SThomas Bogendoerfer 			writel(korina_tx_dma(lp, lp->tx_chain_head),
4860fc96939SThomas Bogendoerfer 			       &lp->tx_dma_regs->dmandptr);
48719c72cacSJeff Kirsher 			/* Move head to tail */
48819c72cacSJeff Kirsher 			lp->tx_chain_head = lp->tx_chain_tail;
48956e2e5deSDavid S. Miller 			lp->tx_chain_status = desc_is_empty;
49019c72cacSJeff Kirsher 		}
49119c72cacSJeff Kirsher 	} else {
49256e2e5deSDavid S. Miller 		if (lp->tx_chain_status == desc_is_empty) {
49319c72cacSJeff Kirsher 			/* Update tail */
49419c72cacSJeff Kirsher 			td->control = DMA_COUNT(length) |
49519c72cacSJeff Kirsher 					DMA_DESC_COF | DMA_DESC_IOF;
49619c72cacSJeff Kirsher 			/* Move tail */
49719c72cacSJeff Kirsher 			lp->tx_chain_tail = chain_next;
49819c72cacSJeff Kirsher 			lp->tx_chain_status = desc_filled;
49919c72cacSJeff Kirsher 		} else {
50019c72cacSJeff Kirsher 			/* Update tail */
50119c72cacSJeff Kirsher 			td->control = DMA_COUNT(length) |
50219c72cacSJeff Kirsher 					DMA_DESC_COF | DMA_DESC_IOF;
50319c72cacSJeff Kirsher 			lp->td_ring[chain_prev].control &=
50419c72cacSJeff Kirsher 					~DMA_DESC_COF;
5050fc96939SThomas Bogendoerfer 			lp->td_ring[chain_prev].link = korina_tx_dma(lp, idx);
50619c72cacSJeff Kirsher 			lp->tx_chain_tail = chain_next;
50719c72cacSJeff Kirsher 		}
50819c72cacSJeff Kirsher 	}
50919c72cacSJeff Kirsher 
510860e9538SFlorian Westphal 	netif_trans_update(dev);
51119c72cacSJeff Kirsher 	spin_unlock_irqrestore(&lp->lock, flags);
51219c72cacSJeff Kirsher 
51319c72cacSJeff Kirsher 	return NETDEV_TX_OK;
5140fc96939SThomas Bogendoerfer 
5150fc96939SThomas Bogendoerfer drop_packet:
5160fc96939SThomas Bogendoerfer 	dev->stats.tx_dropped++;
5170fc96939SThomas Bogendoerfer 	dev_kfree_skb_any(skb);
5180fc96939SThomas Bogendoerfer 	spin_unlock_irqrestore(&lp->lock, flags);
5190fc96939SThomas Bogendoerfer 
5200fc96939SThomas Bogendoerfer 	return NETDEV_TX_OK;
52119c72cacSJeff Kirsher }
52219c72cacSJeff Kirsher 
52389f9d540SThomas Bogendoerfer static int korina_mdio_wait(struct korina_private *lp)
52489f9d540SThomas Bogendoerfer {
52589f9d540SThomas Bogendoerfer 	u32 value;
52689f9d540SThomas Bogendoerfer 
52789f9d540SThomas Bogendoerfer 	return readl_poll_timeout_atomic(&lp->eth_regs->miimind,
52889f9d540SThomas Bogendoerfer 					 value, value & ETH_MII_IND_BSY,
52989f9d540SThomas Bogendoerfer 					 1, 1000);
53089f9d540SThomas Bogendoerfer }
53189f9d540SThomas Bogendoerfer 
53289f9d540SThomas Bogendoerfer static int korina_mdio_read(struct net_device *dev, int phy, int reg)
53319c72cacSJeff Kirsher {
53419c72cacSJeff Kirsher 	struct korina_private *lp = netdev_priv(dev);
53519c72cacSJeff Kirsher 	int ret;
53619c72cacSJeff Kirsher 
53789f9d540SThomas Bogendoerfer 	ret = korina_mdio_wait(lp);
53889f9d540SThomas Bogendoerfer 	if (ret < 0)
53989f9d540SThomas Bogendoerfer 		return ret;
54019c72cacSJeff Kirsher 
54189f9d540SThomas Bogendoerfer 	writel(phy << 8 | reg, &lp->eth_regs->miimaddr);
54289f9d540SThomas Bogendoerfer 	writel(1, &lp->eth_regs->miimcmd);
54389f9d540SThomas Bogendoerfer 
54489f9d540SThomas Bogendoerfer 	ret = korina_mdio_wait(lp);
54589f9d540SThomas Bogendoerfer 	if (ret < 0)
54689f9d540SThomas Bogendoerfer 		return ret;
54789f9d540SThomas Bogendoerfer 
54889f9d540SThomas Bogendoerfer 	if (readl(&lp->eth_regs->miimind) & ETH_MII_IND_NV)
54989f9d540SThomas Bogendoerfer 		return -EINVAL;
55089f9d540SThomas Bogendoerfer 
55189f9d540SThomas Bogendoerfer 	ret = readl(&lp->eth_regs->miimrdd);
55219c72cacSJeff Kirsher 	writel(0, &lp->eth_regs->miimcmd);
55319c72cacSJeff Kirsher 	return ret;
55419c72cacSJeff Kirsher }
55519c72cacSJeff Kirsher 
55689f9d540SThomas Bogendoerfer static void korina_mdio_write(struct net_device *dev, int phy, int reg, int val)
55719c72cacSJeff Kirsher {
55819c72cacSJeff Kirsher 	struct korina_private *lp = netdev_priv(dev);
55919c72cacSJeff Kirsher 
56089f9d540SThomas Bogendoerfer 	if (korina_mdio_wait(lp))
56189f9d540SThomas Bogendoerfer 		return;
56219c72cacSJeff Kirsher 
56389f9d540SThomas Bogendoerfer 	writel(0, &lp->eth_regs->miimcmd);
56489f9d540SThomas Bogendoerfer 	writel(phy << 8 | reg, &lp->eth_regs->miimaddr);
56519c72cacSJeff Kirsher 	writel(val, &lp->eth_regs->miimwtd);
56619c72cacSJeff Kirsher }
56719c72cacSJeff Kirsher 
56819c72cacSJeff Kirsher /* Ethernet Rx DMA interrupt */
56919c72cacSJeff Kirsher static irqreturn_t korina_rx_dma_interrupt(int irq, void *dev_id)
57019c72cacSJeff Kirsher {
57119c72cacSJeff Kirsher 	struct net_device *dev = dev_id;
57219c72cacSJeff Kirsher 	struct korina_private *lp = netdev_priv(dev);
57319c72cacSJeff Kirsher 	u32 dmas, dmasm;
57419c72cacSJeff Kirsher 	irqreturn_t retval;
57519c72cacSJeff Kirsher 
57619c72cacSJeff Kirsher 	dmas = readl(&lp->rx_dma_regs->dmas);
57719c72cacSJeff Kirsher 	if (dmas & (DMA_STAT_DONE | DMA_STAT_HALT | DMA_STAT_ERR)) {
57819c72cacSJeff Kirsher 		dmasm = readl(&lp->rx_dma_regs->dmasm);
57919c72cacSJeff Kirsher 		writel(dmasm | (DMA_STAT_DONE |
58019c72cacSJeff Kirsher 				DMA_STAT_HALT | DMA_STAT_ERR),
58119c72cacSJeff Kirsher 				&lp->rx_dma_regs->dmasm);
58219c72cacSJeff Kirsher 
58319c72cacSJeff Kirsher 		napi_schedule(&lp->napi);
58419c72cacSJeff Kirsher 
58519c72cacSJeff Kirsher 		if (dmas & DMA_STAT_ERR)
58619c72cacSJeff Kirsher 			printk(KERN_ERR "%s: DMA error\n", dev->name);
58719c72cacSJeff Kirsher 
58819c72cacSJeff Kirsher 		retval = IRQ_HANDLED;
58919c72cacSJeff Kirsher 	} else
59019c72cacSJeff Kirsher 		retval = IRQ_NONE;
59119c72cacSJeff Kirsher 
59219c72cacSJeff Kirsher 	return retval;
59319c72cacSJeff Kirsher }
59419c72cacSJeff Kirsher 
59519c72cacSJeff Kirsher static int korina_rx(struct net_device *dev, int limit)
59619c72cacSJeff Kirsher {
59719c72cacSJeff Kirsher 	struct korina_private *lp = netdev_priv(dev);
59819c72cacSJeff Kirsher 	struct dma_desc *rd = &lp->rd_ring[lp->rx_next_done];
59919c72cacSJeff Kirsher 	struct sk_buff *skb, *skb_new;
60019c72cacSJeff Kirsher 	u32 devcs, pkt_len, dmas;
6010fc96939SThomas Bogendoerfer 	dma_addr_t ca;
60219c72cacSJeff Kirsher 	int count;
60319c72cacSJeff Kirsher 
60419c72cacSJeff Kirsher 	for (count = 0; count < limit; count++) {
60519c72cacSJeff Kirsher 		skb = lp->rx_skb[lp->rx_next_done];
60619c72cacSJeff Kirsher 		skb_new = NULL;
60719c72cacSJeff Kirsher 
60819c72cacSJeff Kirsher 		devcs = rd->devcs;
60919c72cacSJeff Kirsher 
61019c72cacSJeff Kirsher 		if ((KORINA_RBSIZE - (u32)DMA_COUNT(rd->control)) == 0)
61119c72cacSJeff Kirsher 			break;
61219c72cacSJeff Kirsher 
613364a97f5SRoman Yeryomin 		/* check that this is a whole packet
614364a97f5SRoman Yeryomin 		 * WARNING: DMA_FD bit incorrectly set
615364a97f5SRoman Yeryomin 		 * in Rc32434 (errata ref #077) */
616364a97f5SRoman Yeryomin 		if (!(devcs & ETH_RX_LD))
617364a97f5SRoman Yeryomin 			goto next;
618364a97f5SRoman Yeryomin 
619364a97f5SRoman Yeryomin 		if (!(devcs & ETH_RX_ROK)) {
62019c72cacSJeff Kirsher 			/* Update statistics counters */
621364a97f5SRoman Yeryomin 			dev->stats.rx_errors++;
622364a97f5SRoman Yeryomin 			dev->stats.rx_dropped++;
62319c72cacSJeff Kirsher 			if (devcs & ETH_RX_CRC)
62419c72cacSJeff Kirsher 				dev->stats.rx_crc_errors++;
62519c72cacSJeff Kirsher 			if (devcs & ETH_RX_LE)
62619c72cacSJeff Kirsher 				dev->stats.rx_length_errors++;
62719c72cacSJeff Kirsher 			if (devcs & ETH_RX_OVR)
62819c72cacSJeff Kirsher 				dev->stats.rx_fifo_errors++;
62919c72cacSJeff Kirsher 			if (devcs & ETH_RX_CV)
63019c72cacSJeff Kirsher 				dev->stats.rx_frame_errors++;
63119c72cacSJeff Kirsher 			if (devcs & ETH_RX_CES)
632364a97f5SRoman Yeryomin 				dev->stats.rx_frame_errors++;
63319c72cacSJeff Kirsher 
634364a97f5SRoman Yeryomin 			goto next;
635364a97f5SRoman Yeryomin 		}
636364a97f5SRoman Yeryomin 
63719c72cacSJeff Kirsher 		/* Malloc up new buffer. */
63819c72cacSJeff Kirsher 		skb_new = netdev_alloc_skb_ip_align(dev, KORINA_RBSIZE);
63919c72cacSJeff Kirsher 		if (!skb_new)
64019c72cacSJeff Kirsher 			break;
6410fc96939SThomas Bogendoerfer 
6420fc96939SThomas Bogendoerfer 		ca = dma_map_single(lp->dmadev, skb_new->data, KORINA_RBSIZE,
6430fc96939SThomas Bogendoerfer 				    DMA_FROM_DEVICE);
6440fc96939SThomas Bogendoerfer 		if (dma_mapping_error(lp->dmadev, ca)) {
6450fc96939SThomas Bogendoerfer 			dev_kfree_skb_any(skb_new);
6460fc96939SThomas Bogendoerfer 			break;
6470fc96939SThomas Bogendoerfer 		}
6480fc96939SThomas Bogendoerfer 
6490fc96939SThomas Bogendoerfer 		pkt_len = RCVPKT_LENGTH(devcs);
6500fc96939SThomas Bogendoerfer 		dma_unmap_single(lp->dmadev, lp->rx_skb_dma[lp->rx_next_done],
6510fc96939SThomas Bogendoerfer 				 pkt_len, DMA_FROM_DEVICE);
6520fc96939SThomas Bogendoerfer 
65319c72cacSJeff Kirsher 		/* Do not count the CRC */
65419c72cacSJeff Kirsher 		skb_put(skb, pkt_len - 4);
65519c72cacSJeff Kirsher 		skb->protocol = eth_type_trans(skb, dev);
65619c72cacSJeff Kirsher 
65719c72cacSJeff Kirsher 		/* Pass the packet to upper layers */
658247c78f2SRoman Yeryomin 		napi_gro_receive(&lp->napi, skb);
65919c72cacSJeff Kirsher 		dev->stats.rx_packets++;
66019c72cacSJeff Kirsher 		dev->stats.rx_bytes += pkt_len;
66119c72cacSJeff Kirsher 
66219c72cacSJeff Kirsher 		/* Update the mcast stats */
66319c72cacSJeff Kirsher 		if (devcs & ETH_RX_MP)
66419c72cacSJeff Kirsher 			dev->stats.multicast++;
66519c72cacSJeff Kirsher 
66619c72cacSJeff Kirsher 		lp->rx_skb[lp->rx_next_done] = skb_new;
6670fc96939SThomas Bogendoerfer 		lp->rx_skb_dma[lp->rx_next_done] = ca;
66819c72cacSJeff Kirsher 
669364a97f5SRoman Yeryomin next:
67019c72cacSJeff Kirsher 		rd->devcs = 0;
67119c72cacSJeff Kirsher 
67219c72cacSJeff Kirsher 		/* Restore descriptor's curr_addr */
6730fc96939SThomas Bogendoerfer 		rd->ca = lp->rx_skb_dma[lp->rx_next_done];
67419c72cacSJeff Kirsher 
67519c72cacSJeff Kirsher 		rd->control = DMA_COUNT(KORINA_RBSIZE) |
67619c72cacSJeff Kirsher 			DMA_DESC_COD | DMA_DESC_IOD;
67719c72cacSJeff Kirsher 		lp->rd_ring[(lp->rx_next_done - 1) &
67819c72cacSJeff Kirsher 			KORINA_RDS_MASK].control &=
67919c72cacSJeff Kirsher 			~DMA_DESC_COD;
68019c72cacSJeff Kirsher 
68119c72cacSJeff Kirsher 		lp->rx_next_done = (lp->rx_next_done + 1) & KORINA_RDS_MASK;
68219c72cacSJeff Kirsher 		rd = &lp->rd_ring[lp->rx_next_done];
6836ef92063SThomas Bogendoerfer 		writel((u32)~DMA_STAT_DONE, &lp->rx_dma_regs->dmas);
68419c72cacSJeff Kirsher 	}
68519c72cacSJeff Kirsher 
68619c72cacSJeff Kirsher 	dmas = readl(&lp->rx_dma_regs->dmas);
68719c72cacSJeff Kirsher 
68819c72cacSJeff Kirsher 	if (dmas & DMA_STAT_HALT) {
6896ef92063SThomas Bogendoerfer 		writel((u32)~(DMA_STAT_HALT | DMA_STAT_ERR),
69019c72cacSJeff Kirsher 		       &lp->rx_dma_regs->dmas);
69119c72cacSJeff Kirsher 
69219c72cacSJeff Kirsher 		lp->dma_halt_cnt++;
69319c72cacSJeff Kirsher 		rd->devcs = 0;
6940fc96939SThomas Bogendoerfer 		rd->ca = lp->rx_skb_dma[lp->rx_next_done];
6950fc96939SThomas Bogendoerfer 		writel(korina_rx_dma(lp, rd - lp->rd_ring),
6960fc96939SThomas Bogendoerfer 		       &lp->rx_dma_regs->dmandptr);
69719c72cacSJeff Kirsher 	}
69819c72cacSJeff Kirsher 
69919c72cacSJeff Kirsher 	return count;
70019c72cacSJeff Kirsher }
70119c72cacSJeff Kirsher 
70219c72cacSJeff Kirsher static int korina_poll(struct napi_struct *napi, int budget)
70319c72cacSJeff Kirsher {
70419c72cacSJeff Kirsher 	struct korina_private *lp =
70519c72cacSJeff Kirsher 		container_of(napi, struct korina_private, napi);
70619c72cacSJeff Kirsher 	struct net_device *dev = lp->dev;
70719c72cacSJeff Kirsher 	int work_done;
70819c72cacSJeff Kirsher 
70919c72cacSJeff Kirsher 	work_done = korina_rx(dev, budget);
71019c72cacSJeff Kirsher 	if (work_done < budget) {
7116ad20165SEric Dumazet 		napi_complete_done(napi, work_done);
71219c72cacSJeff Kirsher 
71319c72cacSJeff Kirsher 		writel(readl(&lp->rx_dma_regs->dmasm) &
71419c72cacSJeff Kirsher 			~(DMA_STAT_DONE | DMA_STAT_HALT | DMA_STAT_ERR),
71519c72cacSJeff Kirsher 			&lp->rx_dma_regs->dmasm);
71619c72cacSJeff Kirsher 	}
71719c72cacSJeff Kirsher 	return work_done;
71819c72cacSJeff Kirsher }
71919c72cacSJeff Kirsher 
72019c72cacSJeff Kirsher /*
72119c72cacSJeff Kirsher  * Set or clear the multicast filter for this adaptor.
72219c72cacSJeff Kirsher  */
72319c72cacSJeff Kirsher static void korina_multicast_list(struct net_device *dev)
72419c72cacSJeff Kirsher {
72519c72cacSJeff Kirsher 	struct korina_private *lp = netdev_priv(dev);
72619c72cacSJeff Kirsher 	unsigned long flags;
72719c72cacSJeff Kirsher 	struct netdev_hw_addr *ha;
72819c72cacSJeff Kirsher 	u32 recognise = ETH_ARC_AB;	/* always accept broadcasts */
72919c72cacSJeff Kirsher 
73019c72cacSJeff Kirsher 	/* Set promiscuous mode */
73119c72cacSJeff Kirsher 	if (dev->flags & IFF_PROMISC)
73219c72cacSJeff Kirsher 		recognise |= ETH_ARC_PRO;
73319c72cacSJeff Kirsher 
73419c72cacSJeff Kirsher 	else if ((dev->flags & IFF_ALLMULTI) || (netdev_mc_count(dev) > 4))
73519c72cacSJeff Kirsher 		/* All multicast and broadcast */
73619c72cacSJeff Kirsher 		recognise |= ETH_ARC_AM;
73719c72cacSJeff Kirsher 
73819c72cacSJeff Kirsher 	/* Build the hash table */
73919c72cacSJeff Kirsher 	if (netdev_mc_count(dev) > 4) {
740e998fd41SEmilio López 		u16 hash_table[4] = { 0 };
74119c72cacSJeff Kirsher 		u32 crc;
74219c72cacSJeff Kirsher 
74319c72cacSJeff Kirsher 		netdev_for_each_mc_addr(ha, dev) {
74419c72cacSJeff Kirsher 			crc = ether_crc_le(6, ha->addr);
74519c72cacSJeff Kirsher 			crc >>= 26;
74619c72cacSJeff Kirsher 			hash_table[crc >> 4] |= 1 << (15 - (crc & 0xf));
74719c72cacSJeff Kirsher 		}
74819c72cacSJeff Kirsher 		/* Accept filtered multicast */
74919c72cacSJeff Kirsher 		recognise |= ETH_ARC_AFM;
75019c72cacSJeff Kirsher 
75119c72cacSJeff Kirsher 		/* Fill the MAC hash tables with their values */
75219c72cacSJeff Kirsher 		writel((u32)(hash_table[1] << 16 | hash_table[0]),
75319c72cacSJeff Kirsher 					&lp->eth_regs->ethhash0);
75419c72cacSJeff Kirsher 		writel((u32)(hash_table[3] << 16 | hash_table[2]),
75519c72cacSJeff Kirsher 					&lp->eth_regs->ethhash1);
75619c72cacSJeff Kirsher 	}
75719c72cacSJeff Kirsher 
75819c72cacSJeff Kirsher 	spin_lock_irqsave(&lp->lock, flags);
75919c72cacSJeff Kirsher 	writel(recognise, &lp->eth_regs->etharc);
76019c72cacSJeff Kirsher 	spin_unlock_irqrestore(&lp->lock, flags);
76119c72cacSJeff Kirsher }
76219c72cacSJeff Kirsher 
76319c72cacSJeff Kirsher static void korina_tx(struct net_device *dev)
76419c72cacSJeff Kirsher {
76519c72cacSJeff Kirsher 	struct korina_private *lp = netdev_priv(dev);
76619c72cacSJeff Kirsher 	struct dma_desc *td = &lp->td_ring[lp->tx_next_done];
76719c72cacSJeff Kirsher 	u32 devcs;
76819c72cacSJeff Kirsher 	u32 dmas;
76919c72cacSJeff Kirsher 
77019c72cacSJeff Kirsher 	spin_lock(&lp->lock);
77119c72cacSJeff Kirsher 
77219c72cacSJeff Kirsher 	/* Process all desc that are done */
77319c72cacSJeff Kirsher 	while (IS_DMA_FINISHED(td->control)) {
77419c72cacSJeff Kirsher 		if (lp->tx_full == 1) {
77519c72cacSJeff Kirsher 			netif_wake_queue(dev);
77619c72cacSJeff Kirsher 			lp->tx_full = 0;
77719c72cacSJeff Kirsher 		}
77819c72cacSJeff Kirsher 
77919c72cacSJeff Kirsher 		devcs = lp->td_ring[lp->tx_next_done].devcs;
78019c72cacSJeff Kirsher 		if ((devcs & (ETH_TX_FD | ETH_TX_LD)) !=
78119c72cacSJeff Kirsher 				(ETH_TX_FD | ETH_TX_LD)) {
78219c72cacSJeff Kirsher 			dev->stats.tx_errors++;
78319c72cacSJeff Kirsher 			dev->stats.tx_dropped++;
78419c72cacSJeff Kirsher 
78519c72cacSJeff Kirsher 			/* Should never happen */
78619c72cacSJeff Kirsher 			printk(KERN_ERR "%s: split tx ignored\n",
78719c72cacSJeff Kirsher 							dev->name);
78819c72cacSJeff Kirsher 		} else if (devcs & ETH_TX_TOK) {
78919c72cacSJeff Kirsher 			dev->stats.tx_packets++;
79019c72cacSJeff Kirsher 			dev->stats.tx_bytes +=
79119c72cacSJeff Kirsher 					lp->tx_skb[lp->tx_next_done]->len;
79219c72cacSJeff Kirsher 		} else {
79319c72cacSJeff Kirsher 			dev->stats.tx_errors++;
79419c72cacSJeff Kirsher 			dev->stats.tx_dropped++;
79519c72cacSJeff Kirsher 
79619c72cacSJeff Kirsher 			/* Underflow */
79719c72cacSJeff Kirsher 			if (devcs & ETH_TX_UND)
79819c72cacSJeff Kirsher 				dev->stats.tx_fifo_errors++;
79919c72cacSJeff Kirsher 
80019c72cacSJeff Kirsher 			/* Oversized frame */
80119c72cacSJeff Kirsher 			if (devcs & ETH_TX_OF)
80219c72cacSJeff Kirsher 				dev->stats.tx_aborted_errors++;
80319c72cacSJeff Kirsher 
80419c72cacSJeff Kirsher 			/* Excessive deferrals */
80519c72cacSJeff Kirsher 			if (devcs & ETH_TX_ED)
80619c72cacSJeff Kirsher 				dev->stats.tx_carrier_errors++;
80719c72cacSJeff Kirsher 
80819c72cacSJeff Kirsher 			/* Collisions: medium busy */
80919c72cacSJeff Kirsher 			if (devcs & ETH_TX_EC)
81019c72cacSJeff Kirsher 				dev->stats.collisions++;
81119c72cacSJeff Kirsher 
81219c72cacSJeff Kirsher 			/* Late collision */
81319c72cacSJeff Kirsher 			if (devcs & ETH_TX_LC)
81419c72cacSJeff Kirsher 				dev->stats.tx_window_errors++;
81519c72cacSJeff Kirsher 		}
81619c72cacSJeff Kirsher 
81719c72cacSJeff Kirsher 		/* We must always free the original skb */
81819c72cacSJeff Kirsher 		if (lp->tx_skb[lp->tx_next_done]) {
8190fc96939SThomas Bogendoerfer 			dma_unmap_single(lp->dmadev,
8200fc96939SThomas Bogendoerfer 					 lp->tx_skb_dma[lp->tx_next_done],
8210fc96939SThomas Bogendoerfer 					 lp->tx_skb[lp->tx_next_done]->len,
8220fc96939SThomas Bogendoerfer 					 DMA_TO_DEVICE);
82319c72cacSJeff Kirsher 			dev_kfree_skb_any(lp->tx_skb[lp->tx_next_done]);
82419c72cacSJeff Kirsher 			lp->tx_skb[lp->tx_next_done] = NULL;
82519c72cacSJeff Kirsher 		}
82619c72cacSJeff Kirsher 
82719c72cacSJeff Kirsher 		lp->td_ring[lp->tx_next_done].control = DMA_DESC_IOF;
82819c72cacSJeff Kirsher 		lp->td_ring[lp->tx_next_done].devcs = ETH_TX_FD | ETH_TX_LD;
82919c72cacSJeff Kirsher 		lp->td_ring[lp->tx_next_done].link = 0;
83019c72cacSJeff Kirsher 		lp->td_ring[lp->tx_next_done].ca = 0;
83119c72cacSJeff Kirsher 		lp->tx_count--;
83219c72cacSJeff Kirsher 
83319c72cacSJeff Kirsher 		/* Go on to next transmission */
83419c72cacSJeff Kirsher 		lp->tx_next_done = (lp->tx_next_done + 1) & KORINA_TDS_MASK;
83519c72cacSJeff Kirsher 		td = &lp->td_ring[lp->tx_next_done];
83619c72cacSJeff Kirsher 
83719c72cacSJeff Kirsher 	}
83819c72cacSJeff Kirsher 
83919c72cacSJeff Kirsher 	/* Clear the DMA status register */
84019c72cacSJeff Kirsher 	dmas = readl(&lp->tx_dma_regs->dmas);
84119c72cacSJeff Kirsher 	writel(~dmas, &lp->tx_dma_regs->dmas);
84219c72cacSJeff Kirsher 
84319c72cacSJeff Kirsher 	writel(readl(&lp->tx_dma_regs->dmasm) &
84419c72cacSJeff Kirsher 			~(DMA_STAT_FINI | DMA_STAT_ERR),
84519c72cacSJeff Kirsher 			&lp->tx_dma_regs->dmasm);
84619c72cacSJeff Kirsher 
84719c72cacSJeff Kirsher 	spin_unlock(&lp->lock);
84819c72cacSJeff Kirsher }
84919c72cacSJeff Kirsher 
85019c72cacSJeff Kirsher static irqreturn_t
85119c72cacSJeff Kirsher korina_tx_dma_interrupt(int irq, void *dev_id)
85219c72cacSJeff Kirsher {
85319c72cacSJeff Kirsher 	struct net_device *dev = dev_id;
85419c72cacSJeff Kirsher 	struct korina_private *lp = netdev_priv(dev);
85519c72cacSJeff Kirsher 	u32 dmas, dmasm;
85619c72cacSJeff Kirsher 	irqreturn_t retval;
85719c72cacSJeff Kirsher 
85819c72cacSJeff Kirsher 	dmas = readl(&lp->tx_dma_regs->dmas);
85919c72cacSJeff Kirsher 
86019c72cacSJeff Kirsher 	if (dmas & (DMA_STAT_FINI | DMA_STAT_ERR)) {
86119c72cacSJeff Kirsher 		dmasm = readl(&lp->tx_dma_regs->dmasm);
86219c72cacSJeff Kirsher 		writel(dmasm | (DMA_STAT_FINI | DMA_STAT_ERR),
86319c72cacSJeff Kirsher 				&lp->tx_dma_regs->dmasm);
86419c72cacSJeff Kirsher 
86519c72cacSJeff Kirsher 		korina_tx(dev);
86619c72cacSJeff Kirsher 
86719c72cacSJeff Kirsher 		if (lp->tx_chain_status == desc_filled &&
86819c72cacSJeff Kirsher 			(readl(&(lp->tx_dma_regs->dmandptr)) == 0)) {
8690fc96939SThomas Bogendoerfer 			writel(korina_tx_dma(lp, lp->tx_chain_head),
8700fc96939SThomas Bogendoerfer 			       &lp->tx_dma_regs->dmandptr);
87156e2e5deSDavid S. Miller 			lp->tx_chain_status = desc_is_empty;
87219c72cacSJeff Kirsher 			lp->tx_chain_head = lp->tx_chain_tail;
873860e9538SFlorian Westphal 			netif_trans_update(dev);
87419c72cacSJeff Kirsher 		}
87519c72cacSJeff Kirsher 		if (dmas & DMA_STAT_ERR)
87619c72cacSJeff Kirsher 			printk(KERN_ERR "%s: DMA error\n", dev->name);
87719c72cacSJeff Kirsher 
87819c72cacSJeff Kirsher 		retval = IRQ_HANDLED;
87919c72cacSJeff Kirsher 	} else
88019c72cacSJeff Kirsher 		retval = IRQ_NONE;
88119c72cacSJeff Kirsher 
88219c72cacSJeff Kirsher 	return retval;
88319c72cacSJeff Kirsher }
88419c72cacSJeff Kirsher 
88519c72cacSJeff Kirsher 
88619c72cacSJeff Kirsher static void korina_check_media(struct net_device *dev, unsigned int init_media)
88719c72cacSJeff Kirsher {
88819c72cacSJeff Kirsher 	struct korina_private *lp = netdev_priv(dev);
88919c72cacSJeff Kirsher 
89089f9d540SThomas Bogendoerfer 	mii_check_media(&lp->mii_if, 1, init_media);
89119c72cacSJeff Kirsher 
89219c72cacSJeff Kirsher 	if (lp->mii_if.full_duplex)
89319c72cacSJeff Kirsher 		writel(readl(&lp->eth_regs->ethmac2) | ETH_MAC2_FD,
89419c72cacSJeff Kirsher 						&lp->eth_regs->ethmac2);
89519c72cacSJeff Kirsher 	else
89619c72cacSJeff Kirsher 		writel(readl(&lp->eth_regs->ethmac2) & ~ETH_MAC2_FD,
89719c72cacSJeff Kirsher 						&lp->eth_regs->ethmac2);
89819c72cacSJeff Kirsher }
89919c72cacSJeff Kirsher 
90034309b36SKees Cook static void korina_poll_media(struct timer_list *t)
90119c72cacSJeff Kirsher {
90234309b36SKees Cook 	struct korina_private *lp = from_timer(lp, t, media_check_timer);
90334309b36SKees Cook 	struct net_device *dev = lp->dev;
90419c72cacSJeff Kirsher 
90519c72cacSJeff Kirsher 	korina_check_media(dev, 0);
90619c72cacSJeff Kirsher 	mod_timer(&lp->media_check_timer, jiffies + HZ);
90719c72cacSJeff Kirsher }
90819c72cacSJeff Kirsher 
90919c72cacSJeff Kirsher static void korina_set_carrier(struct mii_if_info *mii)
91019c72cacSJeff Kirsher {
91119c72cacSJeff Kirsher 	if (mii->force_media) {
91219c72cacSJeff Kirsher 		/* autoneg is off: Link is always assumed to be up */
91319c72cacSJeff Kirsher 		if (!netif_carrier_ok(mii->dev))
91419c72cacSJeff Kirsher 			netif_carrier_on(mii->dev);
91519c72cacSJeff Kirsher 	} else  /* Let MMI library update carrier status */
91619c72cacSJeff Kirsher 		korina_check_media(mii->dev, 0);
91719c72cacSJeff Kirsher }
91819c72cacSJeff Kirsher 
91919c72cacSJeff Kirsher static int korina_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
92019c72cacSJeff Kirsher {
92119c72cacSJeff Kirsher 	struct korina_private *lp = netdev_priv(dev);
92219c72cacSJeff Kirsher 	struct mii_ioctl_data *data = if_mii(rq);
92319c72cacSJeff Kirsher 	int rc;
92419c72cacSJeff Kirsher 
92519c72cacSJeff Kirsher 	if (!netif_running(dev))
92619c72cacSJeff Kirsher 		return -EINVAL;
92719c72cacSJeff Kirsher 	spin_lock_irq(&lp->lock);
92819c72cacSJeff Kirsher 	rc = generic_mii_ioctl(&lp->mii_if, data, cmd, NULL);
92919c72cacSJeff Kirsher 	spin_unlock_irq(&lp->lock);
93019c72cacSJeff Kirsher 	korina_set_carrier(&lp->mii_if);
93119c72cacSJeff Kirsher 
93219c72cacSJeff Kirsher 	return rc;
93319c72cacSJeff Kirsher }
93419c72cacSJeff Kirsher 
93519c72cacSJeff Kirsher /* ethtool helpers */
93619c72cacSJeff Kirsher static void netdev_get_drvinfo(struct net_device *dev,
93719c72cacSJeff Kirsher 				struct ethtool_drvinfo *info)
93819c72cacSJeff Kirsher {
93919c72cacSJeff Kirsher 	struct korina_private *lp = netdev_priv(dev);
94019c72cacSJeff Kirsher 
941*f029c781SWolfram Sang 	strscpy(info->driver, DRV_NAME, sizeof(info->driver));
942*f029c781SWolfram Sang 	strscpy(info->version, DRV_VERSION, sizeof(info->version));
943*f029c781SWolfram Sang 	strscpy(info->bus_info, lp->dev->name, sizeof(info->bus_info));
94419c72cacSJeff Kirsher }
94519c72cacSJeff Kirsher 
946af473688SPhilippe Reynes static int netdev_get_link_ksettings(struct net_device *dev,
947af473688SPhilippe Reynes 				     struct ethtool_link_ksettings *cmd)
94819c72cacSJeff Kirsher {
94919c72cacSJeff Kirsher 	struct korina_private *lp = netdev_priv(dev);
95019c72cacSJeff Kirsher 
95119c72cacSJeff Kirsher 	spin_lock_irq(&lp->lock);
95282c01a84Syuval.shaia@oracle.com 	mii_ethtool_get_link_ksettings(&lp->mii_if, cmd);
95319c72cacSJeff Kirsher 	spin_unlock_irq(&lp->lock);
95419c72cacSJeff Kirsher 
95582c01a84Syuval.shaia@oracle.com 	return 0;
95619c72cacSJeff Kirsher }
95719c72cacSJeff Kirsher 
958af473688SPhilippe Reynes static int netdev_set_link_ksettings(struct net_device *dev,
959af473688SPhilippe Reynes 				     const struct ethtool_link_ksettings *cmd)
96019c72cacSJeff Kirsher {
96119c72cacSJeff Kirsher 	struct korina_private *lp = netdev_priv(dev);
96219c72cacSJeff Kirsher 	int rc;
96319c72cacSJeff Kirsher 
96419c72cacSJeff Kirsher 	spin_lock_irq(&lp->lock);
965af473688SPhilippe Reynes 	rc = mii_ethtool_set_link_ksettings(&lp->mii_if, cmd);
96619c72cacSJeff Kirsher 	spin_unlock_irq(&lp->lock);
96719c72cacSJeff Kirsher 	korina_set_carrier(&lp->mii_if);
96819c72cacSJeff Kirsher 
96919c72cacSJeff Kirsher 	return rc;
97019c72cacSJeff Kirsher }
97119c72cacSJeff Kirsher 
97219c72cacSJeff Kirsher static u32 netdev_get_link(struct net_device *dev)
97319c72cacSJeff Kirsher {
97419c72cacSJeff Kirsher 	struct korina_private *lp = netdev_priv(dev);
97519c72cacSJeff Kirsher 
97619c72cacSJeff Kirsher 	return mii_link_ok(&lp->mii_if);
97719c72cacSJeff Kirsher }
97819c72cacSJeff Kirsher 
97919c72cacSJeff Kirsher static const struct ethtool_ops netdev_ethtool_ops = {
98019c72cacSJeff Kirsher 	.get_drvinfo		= netdev_get_drvinfo,
98119c72cacSJeff Kirsher 	.get_link		= netdev_get_link,
982af473688SPhilippe Reynes 	.get_link_ksettings	= netdev_get_link_ksettings,
983af473688SPhilippe Reynes 	.set_link_ksettings	= netdev_set_link_ksettings,
98419c72cacSJeff Kirsher };
98519c72cacSJeff Kirsher 
98619c72cacSJeff Kirsher static int korina_alloc_ring(struct net_device *dev)
98719c72cacSJeff Kirsher {
98819c72cacSJeff Kirsher 	struct korina_private *lp = netdev_priv(dev);
98919c72cacSJeff Kirsher 	struct sk_buff *skb;
9900fc96939SThomas Bogendoerfer 	dma_addr_t ca;
99119c72cacSJeff Kirsher 	int i;
99219c72cacSJeff Kirsher 
99319c72cacSJeff Kirsher 	/* Initialize the transmit descriptors */
99419c72cacSJeff Kirsher 	for (i = 0; i < KORINA_NUM_TDS; i++) {
99519c72cacSJeff Kirsher 		lp->td_ring[i].control = DMA_DESC_IOF;
99619c72cacSJeff Kirsher 		lp->td_ring[i].devcs = ETH_TX_FD | ETH_TX_LD;
99719c72cacSJeff Kirsher 		lp->td_ring[i].ca = 0;
99819c72cacSJeff Kirsher 		lp->td_ring[i].link = 0;
99919c72cacSJeff Kirsher 	}
100019c72cacSJeff Kirsher 	lp->tx_next_done = lp->tx_chain_head = lp->tx_chain_tail =
100119c72cacSJeff Kirsher 			lp->tx_full = lp->tx_count = 0;
100256e2e5deSDavid S. Miller 	lp->tx_chain_status = desc_is_empty;
100319c72cacSJeff Kirsher 
100419c72cacSJeff Kirsher 	/* Initialize the receive descriptors */
100519c72cacSJeff Kirsher 	for (i = 0; i < KORINA_NUM_RDS; i++) {
100619c72cacSJeff Kirsher 		skb = netdev_alloc_skb_ip_align(dev, KORINA_RBSIZE);
100719c72cacSJeff Kirsher 		if (!skb)
100819c72cacSJeff Kirsher 			return -ENOMEM;
100919c72cacSJeff Kirsher 		lp->rx_skb[i] = skb;
101019c72cacSJeff Kirsher 		lp->rd_ring[i].control = DMA_DESC_IOD |
101119c72cacSJeff Kirsher 				DMA_COUNT(KORINA_RBSIZE);
101219c72cacSJeff Kirsher 		lp->rd_ring[i].devcs = 0;
10130fc96939SThomas Bogendoerfer 		ca = dma_map_single(lp->dmadev, skb->data, KORINA_RBSIZE,
10140fc96939SThomas Bogendoerfer 				    DMA_FROM_DEVICE);
10150fc96939SThomas Bogendoerfer 		if (dma_mapping_error(lp->dmadev, ca))
10160fc96939SThomas Bogendoerfer 			return -ENOMEM;
10170fc96939SThomas Bogendoerfer 		lp->rd_ring[i].ca = ca;
10180fc96939SThomas Bogendoerfer 		lp->rx_skb_dma[i] = ca;
10190fc96939SThomas Bogendoerfer 		lp->rd_ring[i].link = korina_rx_dma(lp, i + 1);
102019c72cacSJeff Kirsher 	}
102119c72cacSJeff Kirsher 
102219c72cacSJeff Kirsher 	/* loop back receive descriptors, so the last
102319c72cacSJeff Kirsher 	 * descriptor points to the first one */
10240fc96939SThomas Bogendoerfer 	lp->rd_ring[i - 1].link = lp->rd_dma;
102519c72cacSJeff Kirsher 	lp->rd_ring[i - 1].control |= DMA_DESC_COD;
102619c72cacSJeff Kirsher 
102719c72cacSJeff Kirsher 	lp->rx_next_done  = 0;
102819c72cacSJeff Kirsher 	lp->rx_chain_head = 0;
102919c72cacSJeff Kirsher 	lp->rx_chain_tail = 0;
103056e2e5deSDavid S. Miller 	lp->rx_chain_status = desc_is_empty;
103119c72cacSJeff Kirsher 
103219c72cacSJeff Kirsher 	return 0;
103319c72cacSJeff Kirsher }
103419c72cacSJeff Kirsher 
103519c72cacSJeff Kirsher static void korina_free_ring(struct net_device *dev)
103619c72cacSJeff Kirsher {
103719c72cacSJeff Kirsher 	struct korina_private *lp = netdev_priv(dev);
103819c72cacSJeff Kirsher 	int i;
103919c72cacSJeff Kirsher 
104019c72cacSJeff Kirsher 	for (i = 0; i < KORINA_NUM_RDS; i++) {
104119c72cacSJeff Kirsher 		lp->rd_ring[i].control = 0;
10420fc96939SThomas Bogendoerfer 		if (lp->rx_skb[i]) {
10430fc96939SThomas Bogendoerfer 			dma_unmap_single(lp->dmadev, lp->rx_skb_dma[i],
10440fc96939SThomas Bogendoerfer 					 KORINA_RBSIZE, DMA_FROM_DEVICE);
104519c72cacSJeff Kirsher 			dev_kfree_skb_any(lp->rx_skb[i]);
104619c72cacSJeff Kirsher 			lp->rx_skb[i] = NULL;
104719c72cacSJeff Kirsher 		}
10480fc96939SThomas Bogendoerfer 	}
104919c72cacSJeff Kirsher 
105019c72cacSJeff Kirsher 	for (i = 0; i < KORINA_NUM_TDS; i++) {
105119c72cacSJeff Kirsher 		lp->td_ring[i].control = 0;
10520fc96939SThomas Bogendoerfer 		if (lp->tx_skb[i]) {
10530fc96939SThomas Bogendoerfer 			dma_unmap_single(lp->dmadev, lp->tx_skb_dma[i],
10540fc96939SThomas Bogendoerfer 					 lp->tx_skb[i]->len, DMA_TO_DEVICE);
105519c72cacSJeff Kirsher 			dev_kfree_skb_any(lp->tx_skb[i]);
105619c72cacSJeff Kirsher 			lp->tx_skb[i] = NULL;
105719c72cacSJeff Kirsher 		}
105819c72cacSJeff Kirsher 	}
10590fc96939SThomas Bogendoerfer }
106019c72cacSJeff Kirsher 
106119c72cacSJeff Kirsher /*
106219c72cacSJeff Kirsher  * Initialize the RC32434 ethernet controller.
106319c72cacSJeff Kirsher  */
106419c72cacSJeff Kirsher static int korina_init(struct net_device *dev)
106519c72cacSJeff Kirsher {
106619c72cacSJeff Kirsher 	struct korina_private *lp = netdev_priv(dev);
106719c72cacSJeff Kirsher 
106819c72cacSJeff Kirsher 	/* Disable DMA */
106919c72cacSJeff Kirsher 	korina_abort_tx(dev);
107019c72cacSJeff Kirsher 	korina_abort_rx(dev);
107119c72cacSJeff Kirsher 
107219c72cacSJeff Kirsher 	/* reset ethernet logic */
107319c72cacSJeff Kirsher 	writel(0, &lp->eth_regs->ethintfc);
107419c72cacSJeff Kirsher 	while ((readl(&lp->eth_regs->ethintfc) & ETH_INT_FC_RIP))
1075860e9538SFlorian Westphal 		netif_trans_update(dev);
107619c72cacSJeff Kirsher 
107719c72cacSJeff Kirsher 	/* Enable Ethernet Interface */
107819c72cacSJeff Kirsher 	writel(ETH_INT_FC_EN, &lp->eth_regs->ethintfc);
107919c72cacSJeff Kirsher 
108019c72cacSJeff Kirsher 	/* Allocate rings */
108119c72cacSJeff Kirsher 	if (korina_alloc_ring(dev)) {
108219c72cacSJeff Kirsher 		printk(KERN_ERR "%s: descriptor allocation failed\n", dev->name);
108319c72cacSJeff Kirsher 		korina_free_ring(dev);
108419c72cacSJeff Kirsher 		return -ENOMEM;
108519c72cacSJeff Kirsher 	}
108619c72cacSJeff Kirsher 
108719c72cacSJeff Kirsher 	writel(0, &lp->rx_dma_regs->dmas);
108819c72cacSJeff Kirsher 	/* Start Rx DMA */
10890fe63247SThomas Bogendoerfer 	writel(0, &lp->rx_dma_regs->dmandptr);
10900fc96939SThomas Bogendoerfer 	writel(korina_rx_dma(lp, 0), &lp->rx_dma_regs->dmadptr);
109119c72cacSJeff Kirsher 
109219c72cacSJeff Kirsher 	writel(readl(&lp->tx_dma_regs->dmasm) &
109319c72cacSJeff Kirsher 			~(DMA_STAT_FINI | DMA_STAT_ERR),
109419c72cacSJeff Kirsher 			&lp->tx_dma_regs->dmasm);
109519c72cacSJeff Kirsher 	writel(readl(&lp->rx_dma_regs->dmasm) &
109619c72cacSJeff Kirsher 			~(DMA_STAT_DONE | DMA_STAT_HALT | DMA_STAT_ERR),
109719c72cacSJeff Kirsher 			&lp->rx_dma_regs->dmasm);
109819c72cacSJeff Kirsher 
109919c72cacSJeff Kirsher 	/* Accept only packets destined for this Ethernet device address */
110019c72cacSJeff Kirsher 	writel(ETH_ARC_AB, &lp->eth_regs->etharc);
110119c72cacSJeff Kirsher 
110219c72cacSJeff Kirsher 	/* Set all Ether station address registers to their initial values */
110319c72cacSJeff Kirsher 	writel(STATION_ADDRESS_LOW(dev), &lp->eth_regs->ethsal0);
110419c72cacSJeff Kirsher 	writel(STATION_ADDRESS_HIGH(dev), &lp->eth_regs->ethsah0);
110519c72cacSJeff Kirsher 
110619c72cacSJeff Kirsher 	writel(STATION_ADDRESS_LOW(dev), &lp->eth_regs->ethsal1);
110719c72cacSJeff Kirsher 	writel(STATION_ADDRESS_HIGH(dev), &lp->eth_regs->ethsah1);
110819c72cacSJeff Kirsher 
110919c72cacSJeff Kirsher 	writel(STATION_ADDRESS_LOW(dev), &lp->eth_regs->ethsal2);
111019c72cacSJeff Kirsher 	writel(STATION_ADDRESS_HIGH(dev), &lp->eth_regs->ethsah2);
111119c72cacSJeff Kirsher 
111219c72cacSJeff Kirsher 	writel(STATION_ADDRESS_LOW(dev), &lp->eth_regs->ethsal3);
111319c72cacSJeff Kirsher 	writel(STATION_ADDRESS_HIGH(dev), &lp->eth_regs->ethsah3);
111419c72cacSJeff Kirsher 
111519c72cacSJeff Kirsher 
111619c72cacSJeff Kirsher 	/* Frame Length Checking, Pad Enable, CRC Enable, Full Duplex set */
111719c72cacSJeff Kirsher 	writel(ETH_MAC2_PE | ETH_MAC2_CEN | ETH_MAC2_FD,
111819c72cacSJeff Kirsher 			&lp->eth_regs->ethmac2);
111919c72cacSJeff Kirsher 
112019c72cacSJeff Kirsher 	/* Back to back inter-packet-gap */
112119c72cacSJeff Kirsher 	writel(0x15, &lp->eth_regs->ethipgt);
112219c72cacSJeff Kirsher 	/* Non - Back to back inter-packet-gap */
112319c72cacSJeff Kirsher 	writel(0x12, &lp->eth_regs->ethipgr);
112419c72cacSJeff Kirsher 
112519c72cacSJeff Kirsher 	/* Management Clock Prescaler Divisor
112619c72cacSJeff Kirsher 	 * Clock independent setting */
1127e4cd854eSThomas Bogendoerfer 	writel(((lp->mii_clock_freq) / MII_CLOCK + 1) & ~1,
112819c72cacSJeff Kirsher 	       &lp->eth_regs->ethmcp);
112989f9d540SThomas Bogendoerfer 	writel(0, &lp->eth_regs->miimcfg);
113019c72cacSJeff Kirsher 
113119c72cacSJeff Kirsher 	/* don't transmit until fifo contains 48b */
113219c72cacSJeff Kirsher 	writel(48, &lp->eth_regs->ethfifott);
113319c72cacSJeff Kirsher 
113419c72cacSJeff Kirsher 	writel(ETH_MAC1_RE, &lp->eth_regs->ethmac1);
113519c72cacSJeff Kirsher 
113689f9d540SThomas Bogendoerfer 	korina_check_media(dev, 1);
113789f9d540SThomas Bogendoerfer 
113819c72cacSJeff Kirsher 	napi_enable(&lp->napi);
113919c72cacSJeff Kirsher 	netif_start_queue(dev);
114019c72cacSJeff Kirsher 
114119c72cacSJeff Kirsher 	return 0;
114219c72cacSJeff Kirsher }
114319c72cacSJeff Kirsher 
114419c72cacSJeff Kirsher /*
114519c72cacSJeff Kirsher  * Restart the RC32434 ethernet controller.
114619c72cacSJeff Kirsher  */
114719c72cacSJeff Kirsher static void korina_restart_task(struct work_struct *work)
114819c72cacSJeff Kirsher {
114919c72cacSJeff Kirsher 	struct korina_private *lp = container_of(work,
115019c72cacSJeff Kirsher 			struct korina_private, restart_task);
115119c72cacSJeff Kirsher 	struct net_device *dev = lp->dev;
115219c72cacSJeff Kirsher 
115319c72cacSJeff Kirsher 	/*
115419c72cacSJeff Kirsher 	 * Disable interrupts
115519c72cacSJeff Kirsher 	 */
115619c72cacSJeff Kirsher 	disable_irq(lp->rx_irq);
115719c72cacSJeff Kirsher 	disable_irq(lp->tx_irq);
115819c72cacSJeff Kirsher 
115919c72cacSJeff Kirsher 	writel(readl(&lp->tx_dma_regs->dmasm) |
116019c72cacSJeff Kirsher 				DMA_STAT_FINI | DMA_STAT_ERR,
116119c72cacSJeff Kirsher 				&lp->tx_dma_regs->dmasm);
116219c72cacSJeff Kirsher 	writel(readl(&lp->rx_dma_regs->dmasm) |
116319c72cacSJeff Kirsher 				DMA_STAT_DONE | DMA_STAT_HALT | DMA_STAT_ERR,
116419c72cacSJeff Kirsher 				&lp->rx_dma_regs->dmasm);
116519c72cacSJeff Kirsher 
116619c72cacSJeff Kirsher 	napi_disable(&lp->napi);
116719c72cacSJeff Kirsher 
1168e6afb1adSFlorian Fainelli 	korina_free_ring(dev);
1169e6afb1adSFlorian Fainelli 
117019c72cacSJeff Kirsher 	if (korina_init(dev) < 0) {
117119c72cacSJeff Kirsher 		printk(KERN_ERR "%s: cannot restart device\n", dev->name);
117219c72cacSJeff Kirsher 		return;
117319c72cacSJeff Kirsher 	}
117419c72cacSJeff Kirsher 	korina_multicast_list(dev);
117519c72cacSJeff Kirsher 
117619c72cacSJeff Kirsher 	enable_irq(lp->tx_irq);
117719c72cacSJeff Kirsher 	enable_irq(lp->rx_irq);
117819c72cacSJeff Kirsher }
117919c72cacSJeff Kirsher 
11800290bd29SMichael S. Tsirkin static void korina_tx_timeout(struct net_device *dev, unsigned int txqueue)
118119c72cacSJeff Kirsher {
118219c72cacSJeff Kirsher 	struct korina_private *lp = netdev_priv(dev);
118319c72cacSJeff Kirsher 
118419c72cacSJeff Kirsher 	schedule_work(&lp->restart_task);
118519c72cacSJeff Kirsher }
118619c72cacSJeff Kirsher 
118719c72cacSJeff Kirsher #ifdef CONFIG_NET_POLL_CONTROLLER
118819c72cacSJeff Kirsher static void korina_poll_controller(struct net_device *dev)
118919c72cacSJeff Kirsher {
119019c72cacSJeff Kirsher 	disable_irq(dev->irq);
119119c72cacSJeff Kirsher 	korina_tx_dma_interrupt(dev->irq, dev);
119219c72cacSJeff Kirsher 	enable_irq(dev->irq);
119319c72cacSJeff Kirsher }
119419c72cacSJeff Kirsher #endif
119519c72cacSJeff Kirsher 
119619c72cacSJeff Kirsher static int korina_open(struct net_device *dev)
119719c72cacSJeff Kirsher {
119819c72cacSJeff Kirsher 	struct korina_private *lp = netdev_priv(dev);
119919c72cacSJeff Kirsher 	int ret;
120019c72cacSJeff Kirsher 
120119c72cacSJeff Kirsher 	/* Initialize */
120219c72cacSJeff Kirsher 	ret = korina_init(dev);
120319c72cacSJeff Kirsher 	if (ret < 0) {
120419c72cacSJeff Kirsher 		printk(KERN_ERR "%s: cannot open device\n", dev->name);
120519c72cacSJeff Kirsher 		goto out;
120619c72cacSJeff Kirsher 	}
120719c72cacSJeff Kirsher 
120819c72cacSJeff Kirsher 	/* Install the interrupt handler
12097ce103b4SRoman Yeryomin 	 * that handles the Done Finished */
121019c72cacSJeff Kirsher 	ret = request_irq(lp->rx_irq, korina_rx_dma_interrupt,
12112414fe16SMichael Opdenacker 			0, "Korina ethernet Rx", dev);
121219c72cacSJeff Kirsher 	if (ret < 0) {
121319c72cacSJeff Kirsher 		printk(KERN_ERR "%s: unable to get Rx DMA IRQ %d\n",
121419c72cacSJeff Kirsher 			dev->name, lp->rx_irq);
121519c72cacSJeff Kirsher 		goto err_release;
121619c72cacSJeff Kirsher 	}
121719c72cacSJeff Kirsher 	ret = request_irq(lp->tx_irq, korina_tx_dma_interrupt,
12182414fe16SMichael Opdenacker 			0, "Korina ethernet Tx", dev);
121919c72cacSJeff Kirsher 	if (ret < 0) {
122019c72cacSJeff Kirsher 		printk(KERN_ERR "%s: unable to get Tx DMA IRQ %d\n",
122119c72cacSJeff Kirsher 			dev->name, lp->tx_irq);
122219c72cacSJeff Kirsher 		goto err_free_rx_irq;
122319c72cacSJeff Kirsher 	}
122419c72cacSJeff Kirsher 
122519c72cacSJeff Kirsher 	mod_timer(&lp->media_check_timer, jiffies + 1);
122619c72cacSJeff Kirsher out:
122719c72cacSJeff Kirsher 	return ret;
122819c72cacSJeff Kirsher 
122919c72cacSJeff Kirsher err_free_rx_irq:
123019c72cacSJeff Kirsher 	free_irq(lp->rx_irq, dev);
123119c72cacSJeff Kirsher err_release:
123219c72cacSJeff Kirsher 	korina_free_ring(dev);
123319c72cacSJeff Kirsher 	goto out;
123419c72cacSJeff Kirsher }
123519c72cacSJeff Kirsher 
123619c72cacSJeff Kirsher static int korina_close(struct net_device *dev)
123719c72cacSJeff Kirsher {
123819c72cacSJeff Kirsher 	struct korina_private *lp = netdev_priv(dev);
123919c72cacSJeff Kirsher 	u32 tmp;
124019c72cacSJeff Kirsher 
124119c72cacSJeff Kirsher 	del_timer(&lp->media_check_timer);
124219c72cacSJeff Kirsher 
124319c72cacSJeff Kirsher 	/* Disable interrupts */
124419c72cacSJeff Kirsher 	disable_irq(lp->rx_irq);
124519c72cacSJeff Kirsher 	disable_irq(lp->tx_irq);
124619c72cacSJeff Kirsher 
124719c72cacSJeff Kirsher 	korina_abort_tx(dev);
124819c72cacSJeff Kirsher 	tmp = readl(&lp->tx_dma_regs->dmasm);
124919c72cacSJeff Kirsher 	tmp = tmp | DMA_STAT_FINI | DMA_STAT_ERR;
125019c72cacSJeff Kirsher 	writel(tmp, &lp->tx_dma_regs->dmasm);
125119c72cacSJeff Kirsher 
125219c72cacSJeff Kirsher 	korina_abort_rx(dev);
125319c72cacSJeff Kirsher 	tmp = readl(&lp->rx_dma_regs->dmasm);
125419c72cacSJeff Kirsher 	tmp = tmp | DMA_STAT_DONE | DMA_STAT_HALT | DMA_STAT_ERR;
125519c72cacSJeff Kirsher 	writel(tmp, &lp->rx_dma_regs->dmasm);
125619c72cacSJeff Kirsher 
125719c72cacSJeff Kirsher 	napi_disable(&lp->napi);
125819c72cacSJeff Kirsher 
125919c72cacSJeff Kirsher 	cancel_work_sync(&lp->restart_task);
126019c72cacSJeff Kirsher 
1261e6afb1adSFlorian Fainelli 	korina_free_ring(dev);
1262e6afb1adSFlorian Fainelli 
126319c72cacSJeff Kirsher 	free_irq(lp->rx_irq, dev);
126419c72cacSJeff Kirsher 	free_irq(lp->tx_irq, dev);
126519c72cacSJeff Kirsher 
126619c72cacSJeff Kirsher 	return 0;
126719c72cacSJeff Kirsher }
126819c72cacSJeff Kirsher 
126919c72cacSJeff Kirsher static const struct net_device_ops korina_netdev_ops = {
127019c72cacSJeff Kirsher 	.ndo_open		= korina_open,
127119c72cacSJeff Kirsher 	.ndo_stop		= korina_close,
127219c72cacSJeff Kirsher 	.ndo_start_xmit		= korina_send_packet,
1273afc4b13dSJiri Pirko 	.ndo_set_rx_mode	= korina_multicast_list,
127419c72cacSJeff Kirsher 	.ndo_tx_timeout		= korina_tx_timeout,
1275a7605370SArnd Bergmann 	.ndo_eth_ioctl		= korina_ioctl,
127619c72cacSJeff Kirsher 	.ndo_validate_addr	= eth_validate_addr,
127719c72cacSJeff Kirsher 	.ndo_set_mac_address	= eth_mac_addr,
127819c72cacSJeff Kirsher #ifdef CONFIG_NET_POLL_CONTROLLER
127919c72cacSJeff Kirsher 	.ndo_poll_controller	= korina_poll_controller,
128019c72cacSJeff Kirsher #endif
128119c72cacSJeff Kirsher };
128219c72cacSJeff Kirsher 
128319c72cacSJeff Kirsher static int korina_probe(struct platform_device *pdev)
128419c72cacSJeff Kirsher {
1285af80425eSThomas Bogendoerfer 	u8 *mac_addr = dev_get_platdata(&pdev->dev);
128619c72cacSJeff Kirsher 	struct korina_private *lp;
128719c72cacSJeff Kirsher 	struct net_device *dev;
1288e4cd854eSThomas Bogendoerfer 	struct clk *clk;
1289b4cd249aSThomas Bogendoerfer 	void __iomem *p;
129019c72cacSJeff Kirsher 	int rc;
129119c72cacSJeff Kirsher 
1292b4cd249aSThomas Bogendoerfer 	dev = devm_alloc_etherdev(&pdev->dev, sizeof(struct korina_private));
129341de8d4cSJoe Perches 	if (!dev)
129419c72cacSJeff Kirsher 		return -ENOMEM;
129541de8d4cSJoe Perches 
129619c72cacSJeff Kirsher 	SET_NETDEV_DEV(dev, &pdev->dev);
129719c72cacSJeff Kirsher 	lp = netdev_priv(dev);
129819c72cacSJeff Kirsher 
129910b26f07SThomas Bogendoerfer 	if (mac_addr)
1300f3956ebbSJakub Kicinski 		eth_hw_addr_set(dev, mac_addr);
13019ca01b25SJakub Kicinski 	else if (of_get_ethdev_address(pdev->dev.of_node, dev) < 0)
130210b26f07SThomas Bogendoerfer 		eth_hw_addr_random(dev);
130319c72cacSJeff Kirsher 
1304e4cd854eSThomas Bogendoerfer 	clk = devm_clk_get_optional(&pdev->dev, "mdioclk");
1305e4cd854eSThomas Bogendoerfer 	if (IS_ERR(clk))
1306e4cd854eSThomas Bogendoerfer 		return PTR_ERR(clk);
1307e4cd854eSThomas Bogendoerfer 	if (clk) {
1308e4cd854eSThomas Bogendoerfer 		clk_prepare_enable(clk);
1309e4cd854eSThomas Bogendoerfer 		lp->mii_clock_freq = clk_get_rate(clk);
1310e4cd854eSThomas Bogendoerfer 	} else {
1311e4cd854eSThomas Bogendoerfer 		lp->mii_clock_freq = 200000000; /* max possible input clk */
1312e4cd854eSThomas Bogendoerfer 	}
1313e4cd854eSThomas Bogendoerfer 
131410b26f07SThomas Bogendoerfer 	lp->rx_irq = platform_get_irq_byname(pdev, "rx");
131510b26f07SThomas Bogendoerfer 	lp->tx_irq = platform_get_irq_byname(pdev, "tx");
131619c72cacSJeff Kirsher 
131710b26f07SThomas Bogendoerfer 	p = devm_platform_ioremap_resource_byname(pdev, "emac");
1318c7d83024SWei Yongjun 	if (IS_ERR(p)) {
131919c72cacSJeff Kirsher 		printk(KERN_ERR DRV_NAME ": cannot remap registers\n");
1320c7d83024SWei Yongjun 		return PTR_ERR(p);
132119c72cacSJeff Kirsher 	}
1322b4cd249aSThomas Bogendoerfer 	lp->eth_regs = p;
132319c72cacSJeff Kirsher 
132410b26f07SThomas Bogendoerfer 	p = devm_platform_ioremap_resource_byname(pdev, "dma_rx");
1325c7d83024SWei Yongjun 	if (IS_ERR(p)) {
132619c72cacSJeff Kirsher 		printk(KERN_ERR DRV_NAME ": cannot remap Rx DMA registers\n");
1327c7d83024SWei Yongjun 		return PTR_ERR(p);
132819c72cacSJeff Kirsher 	}
1329b4cd249aSThomas Bogendoerfer 	lp->rx_dma_regs = p;
133019c72cacSJeff Kirsher 
133110b26f07SThomas Bogendoerfer 	p = devm_platform_ioremap_resource_byname(pdev, "dma_tx");
1332c7d83024SWei Yongjun 	if (IS_ERR(p)) {
133319c72cacSJeff Kirsher 		printk(KERN_ERR DRV_NAME ": cannot remap Tx DMA registers\n");
1334c7d83024SWei Yongjun 		return PTR_ERR(p);
133519c72cacSJeff Kirsher 	}
1336b4cd249aSThomas Bogendoerfer 	lp->tx_dma_regs = p;
133719c72cacSJeff Kirsher 
13380fc96939SThomas Bogendoerfer 	lp->td_ring = dmam_alloc_coherent(&pdev->dev, TD_RING_SIZE,
13390fc96939SThomas Bogendoerfer 					  &lp->td_dma, GFP_KERNEL);
1340b4cd249aSThomas Bogendoerfer 	if (!lp->td_ring)
1341b4cd249aSThomas Bogendoerfer 		return -ENOMEM;
134219c72cacSJeff Kirsher 
13430fc96939SThomas Bogendoerfer 	lp->rd_ring = dmam_alloc_coherent(&pdev->dev, RD_RING_SIZE,
13440fc96939SThomas Bogendoerfer 					  &lp->rd_dma, GFP_KERNEL);
13450fc96939SThomas Bogendoerfer 	if (!lp->rd_ring)
13460fc96939SThomas Bogendoerfer 		return -ENOMEM;
134719c72cacSJeff Kirsher 
134819c72cacSJeff Kirsher 	spin_lock_init(&lp->lock);
134919c72cacSJeff Kirsher 	/* just use the rx dma irq */
135019c72cacSJeff Kirsher 	dev->irq = lp->rx_irq;
135119c72cacSJeff Kirsher 	lp->dev = dev;
13520fc96939SThomas Bogendoerfer 	lp->dmadev = &pdev->dev;
135319c72cacSJeff Kirsher 
135419c72cacSJeff Kirsher 	dev->netdev_ops = &korina_netdev_ops;
135519c72cacSJeff Kirsher 	dev->ethtool_ops = &netdev_ethtool_ops;
135619c72cacSJeff Kirsher 	dev->watchdog_timeo = TX_TIMEOUT;
1357d609d289SRoman Yeryomin 	netif_napi_add(dev, &lp->napi, korina_poll, NAPI_POLL_WEIGHT);
135819c72cacSJeff Kirsher 
135919c72cacSJeff Kirsher 	lp->mii_if.dev = dev;
136089f9d540SThomas Bogendoerfer 	lp->mii_if.mdio_read = korina_mdio_read;
136189f9d540SThomas Bogendoerfer 	lp->mii_if.mdio_write = korina_mdio_write;
136289f9d540SThomas Bogendoerfer 	lp->mii_if.phy_id = 1;
136319c72cacSJeff Kirsher 	lp->mii_if.phy_id_mask = 0x1f;
136419c72cacSJeff Kirsher 	lp->mii_if.reg_num_mask = 0x1f;
136519c72cacSJeff Kirsher 
1366af80425eSThomas Bogendoerfer 	platform_set_drvdata(pdev, dev);
1367af80425eSThomas Bogendoerfer 
136819c72cacSJeff Kirsher 	rc = register_netdev(dev);
136919c72cacSJeff Kirsher 	if (rc < 0) {
137019c72cacSJeff Kirsher 		printk(KERN_ERR DRV_NAME
137119c72cacSJeff Kirsher 			": cannot register net device: %d\n", rc);
1372b4cd249aSThomas Bogendoerfer 		return rc;
137319c72cacSJeff Kirsher 	}
137434309b36SKees Cook 	timer_setup(&lp->media_check_timer, korina_poll_media, 0);
137519c72cacSJeff Kirsher 
137619c72cacSJeff Kirsher 	INIT_WORK(&lp->restart_task, korina_restart_task);
137719c72cacSJeff Kirsher 
137819c72cacSJeff Kirsher 	printk(KERN_INFO "%s: " DRV_NAME "-" DRV_VERSION " " DRV_RELDATE "\n",
137919c72cacSJeff Kirsher 			dev->name);
138019c72cacSJeff Kirsher 	return rc;
138119c72cacSJeff Kirsher }
138219c72cacSJeff Kirsher 
138319c72cacSJeff Kirsher static int korina_remove(struct platform_device *pdev)
138419c72cacSJeff Kirsher {
1385af80425eSThomas Bogendoerfer 	struct net_device *dev = platform_get_drvdata(pdev);
138619c72cacSJeff Kirsher 
1387af80425eSThomas Bogendoerfer 	unregister_netdev(dev);
138819c72cacSJeff Kirsher 
138919c72cacSJeff Kirsher 	return 0;
139019c72cacSJeff Kirsher }
139119c72cacSJeff Kirsher 
139210b26f07SThomas Bogendoerfer #ifdef CONFIG_OF
139310b26f07SThomas Bogendoerfer static const struct of_device_id korina_match[] = {
139410b26f07SThomas Bogendoerfer 	{
139510b26f07SThomas Bogendoerfer 		.compatible = "idt,3243x-emac",
139610b26f07SThomas Bogendoerfer 	},
139710b26f07SThomas Bogendoerfer 	{ }
139810b26f07SThomas Bogendoerfer };
139910b26f07SThomas Bogendoerfer MODULE_DEVICE_TABLE(of, korina_match);
140010b26f07SThomas Bogendoerfer #endif
140110b26f07SThomas Bogendoerfer 
140219c72cacSJeff Kirsher static struct platform_driver korina_driver = {
140310b26f07SThomas Bogendoerfer 	.driver = {
140410b26f07SThomas Bogendoerfer 		.name = "korina",
140510b26f07SThomas Bogendoerfer 		.of_match_table = of_match_ptr(korina_match),
140610b26f07SThomas Bogendoerfer 	},
140719c72cacSJeff Kirsher 	.probe = korina_probe,
140819c72cacSJeff Kirsher 	.remove = korina_remove,
140919c72cacSJeff Kirsher };
141019c72cacSJeff Kirsher 
1411db62f684SAxel Lin module_platform_driver(korina_driver);
141219c72cacSJeff Kirsher 
141319c72cacSJeff Kirsher MODULE_AUTHOR("Philip Rischel <rischelp@idt.com>");
141419c72cacSJeff Kirsher MODULE_AUTHOR("Felix Fietkau <nbd@openwrt.org>");
141519c72cacSJeff Kirsher MODULE_AUTHOR("Florian Fainelli <florian@openwrt.org>");
141687736fc6SRoman Yeryomin MODULE_AUTHOR("Roman Yeryomin <roman@advem.lv>");
141719c72cacSJeff Kirsher MODULE_DESCRIPTION("IDT RC32434 (Korina) Ethernet driver");
141819c72cacSJeff Kirsher MODULE_LICENSE("GPL");
1419