1ae06c70bSJeff Kirsher /* SPDX-License-Identifier: GPL-2.0 */ 2*51dce24bSJeff Kirsher /* Copyright(c) 2007 - 2018 Intel Corporation. */ 3dee1ad47SJeff Kirsher 4dee1ad47SJeff Kirsher #ifndef _E1000_NVM_H_ 5dee1ad47SJeff Kirsher #define _E1000_NVM_H_ 6dee1ad47SJeff Kirsher 7dee1ad47SJeff Kirsher s32 igb_acquire_nvm(struct e1000_hw *hw); 8dee1ad47SJeff Kirsher void igb_release_nvm(struct e1000_hw *hw); 9dee1ad47SJeff Kirsher s32 igb_read_mac_addr(struct e1000_hw *hw); 10dee1ad47SJeff Kirsher s32 igb_read_part_num(struct e1000_hw *hw, u32 *part_num); 11dee1ad47SJeff Kirsher s32 igb_read_part_string(struct e1000_hw *hw, u8 *part_num, 12dee1ad47SJeff Kirsher u32 part_num_size); 13dee1ad47SJeff Kirsher s32 igb_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data); 14dee1ad47SJeff Kirsher s32 igb_read_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data); 15dee1ad47SJeff Kirsher s32 igb_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data); 16dee1ad47SJeff Kirsher s32 igb_validate_nvm_checksum(struct e1000_hw *hw); 17dee1ad47SJeff Kirsher s32 igb_update_nvm_checksum(struct e1000_hw *hw); 18dee1ad47SJeff Kirsher 190b1a6f2eSCarolyn Wyborny struct e1000_fw_version { 200b1a6f2eSCarolyn Wyborny u32 etrack_id; 210b1a6f2eSCarolyn Wyborny u16 eep_major; 220b1a6f2eSCarolyn Wyborny u16 eep_minor; 237dc98a62SCarolyn Wyborny u16 eep_build; 240b1a6f2eSCarolyn Wyborny 250b1a6f2eSCarolyn Wyborny u8 invm_major; 260b1a6f2eSCarolyn Wyborny u8 invm_minor; 270b1a6f2eSCarolyn Wyborny u8 invm_img_type; 280b1a6f2eSCarolyn Wyborny 290b1a6f2eSCarolyn Wyborny bool or_valid; 300b1a6f2eSCarolyn Wyborny u16 or_major; 310b1a6f2eSCarolyn Wyborny u16 or_build; 320b1a6f2eSCarolyn Wyborny u16 or_patch; 330b1a6f2eSCarolyn Wyborny }; 340b1a6f2eSCarolyn Wyborny void igb_get_fw_version(struct e1000_hw *hw, struct e1000_fw_version *fw_vers); 350b1a6f2eSCarolyn Wyborny 36dee1ad47SJeff Kirsher #endif 37